Add new subtargets: msp430x1610, msp430x1611, msp430x1612, msp430x415,
[deliverable/binutils-gdb.git] / gas / config / tc-msp430.c
1 /* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
2
3 Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
4 Contributed by Dmitry Diky <diwil@mail.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include <stdio.h>
24 #include <string.h>
25 #include <stdlib.h>
26 #include <limits.h>
27
28 #define PUSH_1X_WORKAROUND
29 #include "as.h"
30 #include "subsegs.h"
31 #include "opcode/msp430.h"
32 #include "safe-ctype.h"
33
34 const char comment_chars[] = ";";
35 const char line_comment_chars[] = "#";
36 const char line_separator_chars[] = "";
37 const char EXP_CHARS[] = "eE";
38 const char FLT_CHARS[] = "dD";
39
40 /* Handle long expressions. */
41 extern LITTLENUM_TYPE generic_bignum[];
42
43 static struct hash_control *msp430_hash;
44
45 static unsigned int msp430_operands
46 PARAMS ((struct msp430_opcode_s *, char *));
47 static int msp430_srcoperand
48 PARAMS ((struct msp430_operand_s *, char *, int, int *));
49 static int msp430_dstoperand
50 PARAMS ((struct msp430_operand_s *, char *, int));
51 static char *parse_exp
52 PARAMS ((char *, expressionS *));
53 static inline char *skip_space
54 PARAMS ((char *));
55 static int check_reg
56 PARAMS ((char *));
57 static void msp430_set_arch
58 PARAMS ((int));
59 static void show_mcu_list
60 PARAMS ((FILE *));
61 static void del_spaces
62 PARAMS ((char *));
63
64 #define MAX_OP_LEN 256
65
66 struct mcu_type_s
67 {
68 char *name;
69 int isa;
70 int mach;
71 };
72
73 #define MSP430_ISA_11 11
74 #define MSP430_ISA_110 110
75 #define MSP430_ISA_12 12
76 #define MSP430_ISA_13 13
77 #define MSP430_ISA_14 14
78 #define MSP430_ISA_15 15
79 #define MSP430_ISA_16 16
80 #define MSP430_ISA_31 31
81 #define MSP430_ISA_32 32
82 #define MSP430_ISA_33 33
83 #define MSP430_ISA_41 41
84 #define MSP430_ISA_42 42
85 #define MSP430_ISA_43 43
86 #define MSP430_ISA_44 44
87
88 #define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
89 #define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
90
91 static struct mcu_type_s mcu_types[] =
92 {
93 {"msp1", MSP430_ISA_11, bfd_mach_msp11},
94 {"msp2", MSP430_ISA_14, bfd_mach_msp14},
95 {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
96 {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
97 {"msp430x1101",MSP430_ISA_110, bfd_mach_msp110},
98 {"msp430x1111",MSP430_ISA_110, bfd_mach_msp110},
99 {"msp430x1121",MSP430_ISA_110, bfd_mach_msp110},
100 {"msp430x1122",MSP430_ISA_11, bfd_mach_msp110},
101 {"msp430x1132",MSP430_ISA_11, bfd_mach_msp110},
102
103 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
104 {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
105 {"msp430x1222",MSP430_ISA_12, bfd_mach_msp12},
106 {"msp430x1232",MSP430_ISA_12, bfd_mach_msp12},
107
108 {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
109 {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
110 {"msp430x1331",MSP430_ISA_13, bfd_mach_msp13},
111 {"msp430x1351",MSP430_ISA_13, bfd_mach_msp13},
112 {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
113 {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
114 {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
115
116 {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
117 {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
118 {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
119 {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
120 {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
121 {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
122 {"msp430x1610", MSP430_ISA_16, bfd_mach_msp16},
123 {"msp430x1611", MSP430_ISA_16, bfd_mach_msp16},
124 {"msp430x1612", MSP430_ISA_16, bfd_mach_msp16},
125
126 {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
127 {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
128 {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
129 {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
130 {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
131 {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
132 {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
133 {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
134 {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
135
136 {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
137 {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
138 {"msp430x415", MSP430_ISA_41, bfd_mach_msp41},
139 {"msp430x417", MSP430_ISA_41, bfd_mach_msp41},
140
141 {"msp430xE423", MSP430_ISA_42, bfd_mach_msp42},
142 {"msp430xE425", MSP430_ISA_42, bfd_mach_msp42},
143 {"msp430xE427", MSP430_ISA_42, bfd_mach_msp42},
144
145 {"msp430xW423", MSP430_ISA_42, bfd_mach_msp42},
146 {"msp430xW425", MSP430_ISA_42, bfd_mach_msp42},
147 {"msp430xW427", MSP430_ISA_42, bfd_mach_msp42},
148
149 {"msp430xG437", MSP430_ISA_43, bfd_mach_msp43},
150 {"msp430xG438", MSP430_ISA_43, bfd_mach_msp43},
151 {"msp430xG439", MSP430_ISA_43, bfd_mach_msp43},
152
153 {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
154 {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
155 {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
156 {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
157 {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
158 {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
159
160 {NULL, 0, 0}
161 };
162
163
164 static struct mcu_type_s default_mcu =
165 { "msp430x11", MSP430_ISA_11, bfd_mach_msp11 };
166
167 static struct mcu_type_s *msp430_mcu = &default_mcu;
168
169 const pseudo_typeS md_pseudo_table[] =
170 {
171 {"arch", msp430_set_arch, 0},
172 {NULL, NULL, 0}
173 };
174
175 #define OPTION_MMCU 'm'
176
177 const char *md_shortopts = "m:";
178
179 struct option md_longopts[] =
180 {
181 {"mmcu", required_argument, NULL, OPTION_MMCU},
182 {NULL, no_argument, NULL, 0}
183 };
184
185 size_t md_longopts_size = sizeof (md_longopts);
186
187 static void
188 show_mcu_list (stream)
189 FILE *stream;
190 {
191 int i;
192
193 fprintf (stream, _("Known MCU names:\n"));
194
195 for (i = 0; mcu_types[i].name; i++)
196 fprintf (stream, _("\t %s\n"), mcu_types[i].name);
197
198 fprintf (stream, "\n");
199 }
200
201 void
202 md_show_usage (FILE *stream)
203 {
204 fprintf (stream,
205 _("MSP430 options:\n"
206 " -mmcu=[msp430-name] select microcontroller type\n"
207 " msp430x110 msp430x112\n"
208 " msp430x1101 msp430x1111\n"
209 " msp430x1121 msp430x1122 msp430x1132\n"
210 " msp430x122 msp430x123\n"
211 " msp430x1222 msp430x1232\n"
212 " msp430x133 msp430x135\n"
213 " msp430x1331 msp430x1351\n"
214 " msp430x147 msp430x148 msp430x149\n"
215 " msp430x155 msp430x156 msp430x157\n"
216 " msp430x167 msp430x168 msp430x169\n"
217 " msp430x1610 msp430x1611 msp430x1612\n"
218 " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
219 " msp430x323 msp430x325\n"
220 " msp430x336 msp430x337\n"
221 " msp430x412 msp430x413 msp430x415 msp430x417\n"
222 " msp430xE423 msp430xE425 msp430E427\n"
223 " msp430xW423 msp430xW425 msp430W427\n"
224 " msp430xG437 msp430xG438 msp430G439\n"
225 " msp430x435 msp430x436 msp430x437\n"
226 " msp430x447 msp430x448 msp430x449\n"));
227
228 show_mcu_list (stream);
229 }
230
231 static char *
232 extract_word (char *from, char *to, int limit)
233 {
234 char *op_start;
235 char *op_end;
236 int size = 0;
237
238 /* Drop leading whitespace. */
239 from = skip_space (from);
240 *to = 0;
241
242 /* Find the op code end. */
243 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
244 {
245 to[size++] = *op_end++;
246 if (size + 1 >= limit)
247 break;
248 }
249
250 to[size] = 0;
251 return op_end;
252 }
253
254 static void
255 msp430_set_arch (dummy)
256 int dummy ATTRIBUTE_UNUSED;
257 {
258 char *str = (char *) alloca (32); /* 32 for good measure. */
259
260 input_line_pointer = extract_word (input_line_pointer, str, 32);
261
262 md_parse_option (OPTION_MMCU, str);
263 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
264 }
265
266 int
267 md_parse_option (c, arg)
268 int c;
269 char *arg;
270 {
271 int i;
272
273 switch (c)
274 {
275 case OPTION_MMCU:
276 for (i = 0; mcu_types[i].name; ++i)
277 if (strcmp (mcu_types[i].name, arg) == 0)
278 break;
279
280 if (!mcu_types[i].name)
281 {
282 show_mcu_list (stderr);
283 as_fatal (_("unknown MCU: %s\n"), arg);
284 }
285
286 if (msp430_mcu == &default_mcu || msp430_mcu->mach == mcu_types[i].mach)
287 msp430_mcu = &mcu_types[i];
288 else
289 as_fatal (_("redefinition of mcu type %s' to %s'"),
290 msp430_mcu->name, mcu_types[i].name);
291 return 1;
292 }
293
294 return 0;
295 }
296
297 symbolS *
298 md_undefined_symbol (name)
299 char *name ATTRIBUTE_UNUSED;
300 {
301 return 0;
302 }
303
304 static inline char *
305 skip_space (s)
306 char *s;
307 {
308 while (ISSPACE (*s))
309 ++s;
310 return s;
311 }
312
313 /* Delete spaces from s: X ( r 1 2) => X(r12). */
314
315 static void
316 del_spaces (s)
317 char *s;
318 {
319 while (*s)
320 {
321 if (ISSPACE (*s))
322 {
323 char *m = s + 1;
324
325 while (ISSPACE (*m) && *m)
326 m++;
327 memmove (s, m, strlen (m) + 1);
328 }
329 else
330 s++;
331 }
332 }
333
334 /* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */
335
336 static char *
337 extract_operand (char *from, char *to, int limit)
338 {
339 int size = 0;
340
341 /* Drop leading whitespace. */
342 from = skip_space (from);
343
344 while (size < limit && *from)
345 {
346 *(to + size) = *from;
347 if (*from == ',' || *from == ';' || *from == '\n')
348 break;
349 from++;
350 size++;
351 }
352
353 *(to + size) = 0;
354 del_spaces (to);
355
356 from++;
357
358 return from;
359 }
360
361 static char *
362 extract_cmd (char *from, char *to, int limit)
363 {
364 int size = 0;
365
366 while (*from && ! ISSPACE (*from) && *from != '.' && limit > size)
367 {
368 *(to + size) = *from;
369 from++;
370 size++;
371 }
372
373 *(to + size) = 0;
374
375 return from;
376 }
377
378 /* Turn a string in input_line_pointer into a floating point constant
379 of type TYPE, and store the appropriate bytes in *LITP. The number
380 of LITTLENUMS emitted is stored in *SIZEP. An error message is
381 returned, or NULL on OK. */
382
383 char *
384 md_atof (type, litP, sizeP)
385 int type;
386 char *litP;
387 int *sizeP;
388 {
389 int prec;
390 LITTLENUM_TYPE words[4];
391 LITTLENUM_TYPE *wordP;
392 char *t;
393
394 switch (type)
395 {
396 case 'f':
397 prec = 2;
398 break;
399 case 'd':
400 prec = 4;
401 break;
402 default:
403 *sizeP = 0;
404 return _("bad call to md_atof");
405 }
406
407 t = atof_ieee (input_line_pointer, type, words);
408 if (t)
409 input_line_pointer = t;
410
411 *sizeP = prec * sizeof (LITTLENUM_TYPE);
412
413 /* This loop outputs the LITTLENUMs in REVERSE order. */
414 for (wordP = words + prec - 1; prec--;)
415 {
416 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
417 litP += sizeof (LITTLENUM_TYPE);
418 }
419
420 return NULL;
421 }
422
423 void
424 md_convert_frag (abfd, sec, fragP)
425 bfd *abfd ATTRIBUTE_UNUSED;
426 asection *sec ATTRIBUTE_UNUSED;
427 fragS *fragP ATTRIBUTE_UNUSED;
428 {
429 abort ();
430 }
431
432 void
433 md_begin ()
434 {
435 struct msp430_opcode_s *opcode;
436 msp430_hash = hash_new ();
437
438 for (opcode = msp430_opcodes; opcode->name; opcode++)
439 hash_insert (msp430_hash, opcode->name, (char *) opcode);
440
441 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
442 }
443
444 void
445 md_assemble (str)
446 char *str;
447 {
448 struct msp430_opcode_s *opcode;
449 char cmd[32];
450 unsigned int i = 0;
451
452 str = skip_space (str); /* Skip leading spaces. */
453 str = extract_cmd (str, cmd, sizeof (cmd));
454
455 while (cmd[i] && i < sizeof (cmd))
456 {
457 char a = TOLOWER (cmd[i]);
458 cmd[i] = a;
459 i++;
460 }
461
462 if (!cmd[0])
463 {
464 as_bad (_("can't find opcode "));
465 return;
466 }
467
468 opcode = (struct msp430_opcode_s *) hash_find (msp430_hash, cmd);
469
470 if (opcode == NULL)
471 {
472 as_bad (_("unknown opcode `%s'"), cmd);
473 return;
474 }
475
476 {
477 char *__t = input_line_pointer;
478 msp430_operands (opcode, str);
479 input_line_pointer = __t;
480 }
481 }
482
483 /* Parse instruction operands.
484 Return binary opcode. */
485
486 static unsigned int
487 msp430_operands (opcode, line)
488 struct msp430_opcode_s *opcode;
489 char *line;
490 {
491 int bin = opcode->bin_opcode; /* opcode mask. */
492 int __is;
493 char l1[MAX_OP_LEN], l2[MAX_OP_LEN];
494 char *frag;
495 int where;
496 struct msp430_operand_s op1, op2;
497 int res = 0;
498 static short ZEROS = 0;
499 int byte_op, imm_op;
500
501 /* opcode is the one from opcodes table
502 line contains something like
503 [.w] @r2+, 5(R1)
504 or
505 .b @r2+, 5(R1). */
506
507 /* Check if byte or word operation. */
508 if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
509 {
510 bin |= BYTE_OPERATION;
511 byte_op = 1;
512 }
513 else
514 byte_op = 0;
515
516 /* skip .[bwBW]. */
517 while (! ISSPACE (*line) && *line)
518 line++;
519
520 if (opcode->insn_opnumb && (!*line || *line == '\n'))
521 {
522 as_bad (_("instruction %s requires %d operand(s)"),
523 opcode->name, opcode->insn_opnumb);
524 return 0;
525 }
526
527 memset (l1, 0, sizeof (l1));
528 memset (l2, 0, sizeof (l2));
529 memset (&op1, 0, sizeof (op1));
530 memset (&op2, 0, sizeof (op2));
531
532 imm_op = 0;
533
534 switch (opcode->fmt)
535 {
536 case 0: /* Emulated. */
537 switch (opcode->insn_opnumb)
538 {
539 case 0:
540 /* Set/clear bits instructions. */
541 __is = 2;
542 frag = frag_more (__is);
543 bfd_putl16 ((bfd_vma) bin, frag);
544 break;
545 case 1:
546 /* Something which works with destination operand. */
547 line = extract_operand (line, l1, sizeof (l1));
548 res = msp430_dstoperand (&op1, l1, opcode->bin_opcode);
549 if (res)
550 break;
551
552 bin |= (op1.reg | (op1.am << 7));
553 __is = 1 + op1.ol;
554 frag = frag_more (2 * __is);
555 where = frag - frag_now->fr_literal;
556 bfd_putl16 ((bfd_vma) bin, frag);
557
558 if (op1.mode == OP_EXP)
559 {
560 where += 2;
561 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
562
563 if (op1.reg)
564 fix_new_exp (frag_now, where, 2,
565 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
566 else
567 fix_new_exp (frag_now, where, 2,
568 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
569 }
570 break;
571
572 case 2:
573 {
574 /* Shift instruction. */
575 line = extract_operand (line, l1, sizeof (l1));
576 strncpy (l2, l1, sizeof (l2));
577 l2[sizeof (l2) - 1] = '\0';
578 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
579 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
580
581 if (res)
582 break; /* An error occurred. All warnings were done before. */
583
584 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
585
586 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
587 frag = frag_more (2 * __is);
588 where = frag - frag_now->fr_literal;
589 bfd_putl16 ((bfd_vma) bin, frag);
590
591 if (op1.mode == OP_EXP)
592 {
593 where += 2; /* Advance 'where' as we do not know _where_. */
594 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
595
596 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
597 fix_new_exp (frag_now, where, 2,
598 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
599 else
600 fix_new_exp (frag_now, where, 2,
601 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
602 }
603
604 if (op2.mode == OP_EXP)
605 {
606 imm_op = 0;
607 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
608
609 if (op2.reg) /* Not PC relative. */
610 fix_new_exp (frag_now, where + 2, 2,
611 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
612 else
613 fix_new_exp (frag_now, where + 2, 2,
614 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
615 }
616 break;
617 }
618 case 3:
619 /* Branch instruction => mov dst, r0. */
620 line = extract_operand (line, l1, sizeof (l1));
621
622 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
623 if (res)
624 break;
625
626 byte_op = 0;
627 imm_op = 0;
628
629 bin |= ((op1.reg << 8) | (op1.am << 4));
630 __is = 1 + op1.ol;
631 frag = frag_more (2 * __is);
632 where = frag - frag_now->fr_literal;
633 bfd_putl16 ((bfd_vma) bin, frag);
634
635 if (op1.mode == OP_EXP)
636 {
637 where += 2;
638 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
639
640 if (op1.reg || (op1.reg == 0 && op1.am == 3))
641 fix_new_exp (frag_now, where, 2,
642 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
643 else
644 fix_new_exp (frag_now, where, 2,
645 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
646 }
647 break;
648 }
649 break;
650
651 case 1: /* Format 1, double operand. */
652 line = extract_operand (line, l1, sizeof (l1));
653 line = extract_operand (line, l2, sizeof (l2));
654 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
655 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
656
657 if (res)
658 break; /* Error occurred. All warnings were done before. */
659
660 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
661
662 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
663 frag = frag_more (2 * __is);
664 where = frag - frag_now->fr_literal;
665 bfd_putl16 ((bfd_vma) bin, frag);
666
667 if (op1.mode == OP_EXP)
668 {
669 where += 2; /* Advance where as we do not know _where_. */
670 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
671
672 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
673 fix_new_exp (frag_now, where, 2,
674 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
675 else
676 fix_new_exp (frag_now, where, 2,
677 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
678 }
679
680 if (op2.mode == OP_EXP)
681 {
682 imm_op = 0;
683 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
684
685 if (op2.reg) /* Not PC relative. */
686 fix_new_exp (frag_now, where + 2, 2,
687 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
688 else
689 fix_new_exp (frag_now, where + 2, 2,
690 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
691 }
692 break;
693
694 case 2: /* Single-operand mostly instr. */
695 if (opcode->insn_opnumb == 0)
696 {
697 /* reti instruction. */
698 frag = frag_more (2);
699 bfd_putl16 ((bfd_vma) bin, frag);
700 break;
701 }
702
703 line = extract_operand (line, l1, sizeof (l1));
704 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
705 if (res)
706 break; /* Error in operand. */
707
708 bin |= op1.reg | (op1.am << 4);
709 __is = 1 + op1.ol;
710 frag = frag_more (2 * __is);
711 where = frag - frag_now->fr_literal;
712 bfd_putl16 ((bfd_vma) bin, frag);
713
714 if (op1.mode == OP_EXP)
715 {
716 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
717
718 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
719 fix_new_exp (frag_now, where + 2, 2,
720 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
721 else
722 fix_new_exp (frag_now, where + 2, 2,
723 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
724 }
725 break;
726
727 case 3: /* Conditional jumps instructions. */
728 line = extract_operand (line, l1, sizeof (l1));
729 /* l1 is a label. */
730 if (l1[0])
731 {
732 char *m = l1;
733 expressionS exp;
734
735 if (*m == '$')
736 m++;
737
738 parse_exp (m, &exp);
739 frag = frag_more (2); /* Instr size is 1 word. */
740
741 /* In order to handle something like:
742
743 and #0x8000, r5
744 tst r5
745 jz 4 ; skip next 4 bytes
746 inv r5
747 inc r5
748 nop ; will jump here if r5 positive or zero
749
750 jCOND -n ;assumes jump n bytes backward:
751
752 mov r5,r6
753 jmp -2
754
755 is equal to:
756 lab:
757 mov r5,r6
758 jmp lab
759
760 jCOND $n ; jump from PC in either direction. */
761
762 if (exp.X_op == O_constant)
763 {
764 int x = exp.X_add_number;
765
766 if (x & 1)
767 {
768 as_warn (_("Even number required. Rounded to %d"), x + 1);
769 x++;
770 }
771
772 if ((*l1 == '$' && x > 0) || x < 0)
773 x -= 2;
774
775 x >>= 1;
776
777 if (x > 512 || x < -511)
778 {
779 as_bad (_("Wrong displacement %d"), x << 1);
780 break;
781 }
782
783 bin |= x & 0x3ff;
784 bfd_putl16 ((bfd_vma) bin, frag);
785 }
786 else if (exp.X_op == O_symbol && *l1 != '$')
787 {
788 where = frag - frag_now->fr_literal;
789 fix_new_exp (frag_now, where, 2,
790 &exp, TRUE, BFD_RELOC_MSP430_10_PCREL);
791
792 bfd_putl16 ((bfd_vma) bin, frag);
793 }
794 else if (*l1 == '$')
795 {
796 as_bad (_("instruction requires label sans '$'"));
797 break;
798 }
799 else
800 {
801 as_bad (_
802 ("instruction requires label or value in range -511:512"));
803 break;
804 }
805 }
806 else
807 {
808 as_bad (_("instruction requires label"));
809 break;
810 }
811 break;
812
813 default:
814 as_bad (_("Ilegal instruction or not implmented opcode."));
815 }
816
817 input_line_pointer = line;
818 return 0;
819 }
820
821 static int
822 msp430_dstoperand (op, l, bin)
823 struct msp430_operand_s *op;
824 char *l;
825 int bin;
826 {
827 int dummy;
828 int ret = msp430_srcoperand (op, l, bin, &dummy);
829 if (ret)
830 return ret;
831
832 if (op->am == 2)
833 {
834 char *__tl = "0";
835
836 op->mode = OP_EXP;
837 op->am = 1;
838 op->ol = 1;
839 parse_exp (__tl, &(op->exp));
840 if (op->exp.X_op != O_constant || op->exp.X_add_number != 0)
841 {
842 as_bad (_("Internal bug. Try to use 0(r%d) instead of @r%d"),
843 op->reg, op->reg);
844 return 1;
845 }
846 return 0;
847 }
848
849 if (op->am > 1)
850 {
851 as_bad (_
852 ("this addressing mode is not applicable for destination operand"));
853 return 1;
854 }
855 return 0;
856 }
857
858
859 static int
860 check_reg (t)
861 char *t;
862 {
863 /* If this is a reg numb, str 't' must be a number from 0 - 15. */
864
865 if (strlen (t) > 2 && *(t + 2) != '+')
866 return 1;
867
868 while (*t)
869 {
870 if ((*t < '0' || *t > '9') && *t != '+')
871 break;
872 t++;
873 }
874
875 if (*t)
876 return 1;
877
878 return 0;
879 }
880
881
882 static int
883 msp430_srcoperand (op, l, bin, imm_op)
884 struct msp430_operand_s *op;
885 char *l;
886 int bin;
887 int *imm_op;
888 {
889 char *__tl = l;
890
891 /* Check if an immediate #VALUE. The hash sign should be only at the beginning! */
892 if (*l == '#')
893 {
894 char *h = l;
895 int vshift = -1;
896 int rval = 0;
897
898 /* Check if there is:
899 llo(x) - least significant 16 bits, x &= 0xffff
900 lhi(x) - x = (x >> 16) & 0xffff,
901 hlo(x) - x = (x >> 32) & 0xffff,
902 hhi(x) - x = (x >> 48) & 0xffff
903 The value _MUST_ be constant expression: #hlo(1231231231). */
904
905 *imm_op = 1;
906
907 if (strncasecmp (h, "#llo(", 5) == 0)
908 {
909 vshift = 0;
910 rval = 3;
911 }
912 else if (strncasecmp (h, "#lhi(", 5) == 0)
913 {
914 vshift = 1;
915 rval = 3;
916 }
917 else if (strncasecmp (h, "#hlo(", 5) == 0)
918 {
919 vshift = 2;
920 rval = 3;
921 }
922 else if (strncasecmp (h, "#hhi(", 5) == 0)
923 {
924 vshift = 3;
925 rval = 3;
926 }
927 else if (strncasecmp (h, "#lo(", 4) == 0)
928 {
929 vshift = 0;
930 rval = 2;
931 }
932 else if (strncasecmp (h, "#hi(", 4) == 0)
933 {
934 vshift = 1;
935 rval = 2;
936 }
937
938 op->reg = 0; /* Reg PC. */
939 op->am = 3;
940 op->ol = 1; /* Immediate will follow an instruction. */
941 __tl = h + 1 + rval;
942 op->mode = OP_EXP;
943 parse_exp (__tl, &(op->exp));
944 if (op->exp.X_op == O_constant)
945 {
946 int x = op->exp.X_add_number;
947
948 if (vshift == 0)
949 {
950 x = x & 0xffff;
951 op->exp.X_add_number = x;
952 }
953 else if (vshift == 1)
954 {
955 x = (x >> 16) & 0xffff;
956 op->exp.X_add_number = x;
957 }
958 else if (vshift > 1)
959 {
960 if (x < 0)
961 op->exp.X_add_number = -1;
962 else
963 op->exp.X_add_number = 0; /* Nothing left. */
964 x = op->exp.X_add_number;
965 }
966
967 if (op->exp.X_add_number > 65535 || op->exp.X_add_number < -32768)
968 {
969 as_bad (_("value %ld out of range. Use #lo() or #hi()"), x);
970 return 1;
971 }
972
973 /* Now check constants. */
974 /* Substitute register mode with a constant generator if applicable. */
975
976 x = (short) x; /* Extend sign. */
977
978 if (x == 0)
979 {
980 op->reg = 3;
981 op->am = 0;
982 op->ol = 0;
983 op->mode = OP_REG;
984 }
985 else if (x == 1)
986 {
987 op->reg = 3;
988 op->am = 1;
989 op->ol = 0;
990 op->mode = OP_REG;
991 }
992 else if (x == 2)
993 {
994 op->reg = 3;
995 op->am = 2;
996 op->ol = 0;
997 op->mode = OP_REG;
998 }
999 else if (x == -1)
1000 {
1001 op->reg = 3;
1002 op->am = 3;
1003 op->ol = 0;
1004 op->mode = OP_REG;
1005 }
1006 else if (x == 4)
1007 {
1008 #ifdef PUSH_1X_WORKAROUND
1009 if (bin == 0x1200)
1010 {
1011 /* Remove warning as confusing.
1012 as_warn(_("Hardware push bug workaround")); */
1013 }
1014 else
1015 #endif
1016 {
1017 op->reg = 2;
1018 op->am = 2;
1019 op->ol = 0;
1020 op->mode = OP_REG;
1021 }
1022 }
1023 else if (x == 8)
1024 {
1025 #ifdef PUSH_1X_WORKAROUND
1026 if (bin == 0x1200)
1027 {
1028 /* Remove warning as confusing.
1029 as_warn(_("Hardware push bug workaround")); */
1030 }
1031 else
1032 #endif
1033 {
1034 op->reg = 2;
1035 op->am = 3;
1036 op->ol = 0;
1037 op->mode = OP_REG;
1038 }
1039 }
1040 }
1041 else if (op->exp.X_op == O_symbol)
1042 {
1043 op->mode = OP_EXP;
1044 }
1045 else if (op->exp.X_op == O_big)
1046 {
1047 short x;
1048 if (vshift != -1)
1049 {
1050 op->exp.X_op = O_constant;
1051 op->exp.X_add_number = 0xffff & generic_bignum[vshift];
1052 x = op->exp.X_add_number;
1053 }
1054 else
1055 {
1056 as_bad (_
1057 ("unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() "),
1058 l);
1059 return 1;
1060 }
1061
1062 if (x == 0)
1063 {
1064 op->reg = 3;
1065 op->am = 0;
1066 op->ol = 0;
1067 op->mode = OP_REG;
1068 }
1069 else if (x == 1)
1070 {
1071 op->reg = 3;
1072 op->am = 1;
1073 op->ol = 0;
1074 op->mode = OP_REG;
1075 }
1076 else if (x == 2)
1077 {
1078 op->reg = 3;
1079 op->am = 2;
1080 op->ol = 0;
1081 op->mode = OP_REG;
1082 }
1083 else if (x == -1)
1084 {
1085 op->reg = 3;
1086 op->am = 3;
1087 op->ol = 0;
1088 op->mode = OP_REG;
1089 }
1090 else if (x == 4)
1091 {
1092 op->reg = 2;
1093 op->am = 2;
1094 op->ol = 0;
1095 op->mode = OP_REG;
1096 }
1097 else if (x == 8)
1098 {
1099 op->reg = 2;
1100 op->am = 3;
1101 op->ol = 0;
1102 op->mode = OP_REG;
1103 }
1104 }
1105 else
1106 {
1107 as_bad (_("unknown operand %s"), l);
1108 }
1109 return 0;
1110 }
1111
1112 /* Check if absolute &VALUE (assume that we can construct something like ((a&b)<<7 + 25). */
1113 if (*l == '&')
1114 {
1115 char *h = l;
1116
1117 op->reg = 2; /* reg 2 in absolute addr mode. */
1118 op->am = 1; /* mode As == 01 bin. */
1119 op->ol = 1; /* Immediate value followed by instruction. */
1120 __tl = h + 1;
1121 parse_exp (__tl, &(op->exp));
1122 op->mode = OP_EXP;
1123 if (op->exp.X_op == O_constant)
1124 {
1125 int x = op->exp.X_add_number;
1126 if (x > 65535 || x < -32768)
1127 {
1128 as_bad (_("value out of range: %d"), x);
1129 return 1;
1130 }
1131 }
1132 else if (op->exp.X_op == O_symbol)
1133 {
1134 }
1135 else
1136 {
1137 as_bad (_("unknown expression in operand %s"), l);
1138 return 1;
1139 }
1140 return 0;
1141 }
1142
1143 /* Check if indirect register mode @Rn / postincrement @Rn+. */
1144 if (*l == '@')
1145 {
1146 char *t = l;
1147 char *m = strchr (l, '+');
1148
1149 if (t != l)
1150 {
1151 as_bad (_("unknown addressing mode %s"), l);
1152 return 1;
1153 }
1154
1155 t++;
1156 if (*t != 'r' && *t != 'R')
1157 {
1158 as_bad (_("unknown addressing mode %s"), l);
1159 return 1;
1160 }
1161
1162 t++; /* Points to the reg value. */
1163
1164 if (check_reg (t))
1165 {
1166 as_bad (_("Bad register name r%s"), t);
1167 return 1;
1168 }
1169
1170 op->mode = OP_REG;
1171 op->am = m ? 3 : 2;
1172 op->ol = 0;
1173 if (m)
1174 *m = 0; /* strip '+' */
1175 op->reg = atoi (t);
1176 if (op->reg < 0 || op->reg > 15)
1177 {
1178 as_bad (_("MSP430 does not have %d registers"), op->reg);
1179 return 1;
1180 }
1181
1182 return 0;
1183 }
1184
1185 /* Check if register indexed X(Rn). */
1186 do
1187 {
1188 char *h = strrchr (l, '(');
1189 char *m = strrchr (l, ')');
1190 char *t;
1191
1192 *imm_op = 1;
1193
1194 if (!h)
1195 break;
1196 if (!m)
1197 {
1198 as_bad (_("')' required"));
1199 return 1;
1200 }
1201
1202 t = h;
1203 op->am = 1;
1204 op->ol = 1;
1205 /* Extract a register. */
1206 t++; /* Advance pointer. */
1207
1208 if (*t != 'r' && *t != 'R')
1209 {
1210 as_bad (_
1211 ("unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?"),
1212 l);
1213 return 1;
1214 }
1215 t++;
1216
1217 op->reg = *t - '0';
1218 if (op->reg > 9 || op->reg < 0)
1219 {
1220 as_bad (_("unknown operator (r%s substituded as a register name"),
1221 t);
1222 return 1;
1223 }
1224 t++;
1225 if (*t != ')')
1226 {
1227 op->reg = op->reg * 10;
1228 op->reg += *t - '0';
1229
1230 if (op->reg > 15)
1231 {
1232 as_bad (_("unknown operator %s"), l);
1233 return 1;
1234 }
1235 if (op->reg == 2)
1236 {
1237 as_bad (_("r2 should not be used in indexed addressing mode"));
1238 return 1;
1239 }
1240
1241 if (*(t + 1) != ')')
1242 {
1243 as_bad (_("unknown operator %s"), l);
1244 return 1;
1245 }
1246 }
1247
1248 /* Extract constant. */
1249 __tl = l;
1250 *h = 0;
1251 op->mode = OP_EXP;
1252 parse_exp (__tl, &(op->exp));
1253 if (op->exp.X_op == O_constant)
1254 {
1255 int x = op->exp.X_add_number;
1256
1257 if (x > 65535 || x < -32768)
1258 {
1259 as_bad (_("value out of range: %d"), x);
1260 return 1;
1261 }
1262
1263 if (x == 0)
1264 {
1265 op->mode = OP_REG;
1266 op->am = 2;
1267 op->ol = 0;
1268 return 0;
1269 }
1270 }
1271 else if (op->exp.X_op == O_symbol)
1272 {
1273 }
1274 else
1275 {
1276 as_bad (_("unknown expression in operand %s"), l);
1277 return 1;
1278 }
1279
1280 return 0;
1281 }
1282 while (0);
1283
1284 /* Register mode 'mov r1,r2'. */
1285 do
1286 {
1287 char *t = l;
1288
1289 /* Operand should be a register. */
1290 if (*t == 'r' || *t == 'R')
1291 {
1292 int x = atoi (t + 1);
1293
1294 if (check_reg (t + 1))
1295 break;
1296
1297 if (x < 0 || x > 15)
1298 break; /* Symbolic mode. */
1299
1300 op->mode = OP_REG;
1301 op->am = 0;
1302 op->ol = 0;
1303 op->reg = x;
1304 return 0;
1305 }
1306 }
1307 while (0);
1308
1309 /* Symbolic mode 'mov a, b' == 'mov x(pc), y(pc)'. */
1310 do
1311 {
1312 char *t = l;
1313
1314 __tl = l;
1315
1316 while (*t)
1317 {
1318 /* alpha/number underline dot for labels. */
1319 if (! ISALNUM (*t) && *t != '_' && *t != '.')
1320 {
1321 as_bad (_("unknown operand %s"), l);
1322 return 1;
1323 }
1324 t++;
1325 }
1326
1327 op->mode = OP_EXP;
1328 op->reg = 0; /* PC relative... be careful. */
1329 op->am = 1;
1330 op->ol = 1;
1331 __tl = l;
1332 parse_exp (__tl, &(op->exp));
1333 return 0;
1334 }
1335 while (0);
1336
1337 /* Unreachable. */
1338 as_bad (_("unknown addressing mode for operand %s"), l);
1339 return 1;
1340 }
1341
1342
1343 /* GAS will call this function for each section at the end of the assembly,
1344 to permit the CPU backend to adjust the alignment of a section. */
1345
1346 valueT
1347 md_section_align (seg, addr)
1348 asection *seg;
1349 valueT addr;
1350 {
1351 int align = bfd_get_section_alignment (stdoutput, seg);
1352
1353 return ((addr + (1 << align) - 1) & (-1 << align));
1354 }
1355
1356 /* If you define this macro, it should return the offset between the
1357 address of a PC relative fixup and the position from which the PC
1358 relative adjustment should be made. On many processors, the base
1359 of a PC relative instruction is the next instruction, so this
1360 macro would return the length of an instruction. */
1361
1362 long
1363 md_pcrel_from_section (fixp, sec)
1364 fixS *fixp;
1365 segT sec;
1366 {
1367 if (fixp->fx_addsy != (symbolS *) NULL
1368 && (!S_IS_DEFINED (fixp->fx_addsy)
1369 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1370 return 0;
1371
1372 return fixp->fx_frag->fr_address + fixp->fx_where;
1373 }
1374
1375 /* GAS will call this for each fixup. It should store the correct
1376 value in the object file. */
1377
1378 void
1379 md_apply_fix3 (fixp, valuep, seg)
1380 fixS *fixp;
1381 valueT *valuep;
1382 segT seg;
1383 {
1384 unsigned char *where;
1385 unsigned long insn;
1386 long value;
1387
1388 if (fixp->fx_addsy == (symbolS *) NULL)
1389 {
1390 value = *valuep;
1391 fixp->fx_done = 1;
1392 }
1393 else if (fixp->fx_pcrel)
1394 {
1395 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1396
1397 if (fixp->fx_addsy && (s == seg || s == absolute_section))
1398 {
1399 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
1400 fixp->fx_done = 1;
1401 }
1402 else
1403 value = *valuep;
1404 }
1405 else
1406 {
1407 value = fixp->fx_offset;
1408
1409 if (fixp->fx_subsy != (symbolS *) NULL)
1410 {
1411 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1412 {
1413 value -= S_GET_VALUE (fixp->fx_subsy);
1414 fixp->fx_done = 1;
1415 }
1416 else
1417 {
1418 /* We don't actually support subtracting a symbol. */
1419 as_bad_where (fixp->fx_file, fixp->fx_line,
1420 _("expression too complex"));
1421 }
1422 }
1423 }
1424
1425 switch (fixp->fx_r_type)
1426 {
1427 default:
1428 fixp->fx_no_overflow = 1;
1429 break;
1430 case BFD_RELOC_MSP430_10_PCREL:
1431 break;
1432 }
1433
1434 if (fixp->fx_done)
1435 {
1436 /* Fetch the instruction, insert the fully resolved operand
1437 value, and stuff the instruction back again. */
1438
1439 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1440
1441 insn = bfd_getl16 (where);
1442
1443 switch (fixp->fx_r_type)
1444 {
1445 case BFD_RELOC_MSP430_10_PCREL:
1446 if (value & 1)
1447 as_bad_where (fixp->fx_file, fixp->fx_line,
1448 _("odd address operand: %ld"), value);
1449
1450 /* Jumps are in words. */
1451 value >>= 1;
1452 --value; /* Correct PC. */
1453
1454 if (value < -512 || value > 511)
1455 as_bad_where (fixp->fx_file, fixp->fx_line,
1456 _("operand out of range: %ld"), value);
1457
1458 value &= 0x3ff; /* get rid of extended sign */
1459 bfd_putl16 ((bfd_vma) (value | insn), where);
1460 break;
1461
1462 case BFD_RELOC_MSP430_16_PCREL:
1463 if (value & 1)
1464 as_bad_where (fixp->fx_file, fixp->fx_line,
1465 _("odd address operand: %ld"), value);
1466
1467 /* Nothing to be corrected here. */
1468 if (value < -32768 || value > 65536)
1469 as_bad_where (fixp->fx_file, fixp->fx_line,
1470 _("operand out of range: %ld"), value);
1471
1472 value &= 0xffff; /* Get rid of extended sign. */
1473 bfd_putl16 ((bfd_vma) value, where);
1474 break;
1475
1476 case BFD_RELOC_MSP430_16_PCREL_BYTE:
1477 /* Nothing to be corrected here. */
1478 if (value < -32768 || value > 65536)
1479 as_bad_where (fixp->fx_file, fixp->fx_line,
1480 _("operand out of range: %ld"), value);
1481
1482 value &= 0xffff; /* Get rid of extended sign. */
1483 bfd_putl16 ((bfd_vma) value, where);
1484 break;
1485
1486 case BFD_RELOC_32:
1487 bfd_putl16 ((bfd_vma) value, where);
1488 break;
1489
1490 case BFD_RELOC_MSP430_16:
1491 case BFD_RELOC_16:
1492 case BFD_RELOC_MSP430_16_BYTE:
1493 value &= 0xffff;
1494 bfd_putl16 ((bfd_vma) value, where);
1495 break;
1496
1497 default:
1498 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1499 fixp->fx_line, fixp->fx_r_type);
1500 break;
1501 }
1502 }
1503 else
1504 {
1505 fixp->fx_addnumber = value;
1506 }
1507 }
1508
1509 /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1510 will pass the resulting reloc to `bfd_install_relocation'. This
1511 currently works poorly, as `bfd_install_relocation' often does the
1512 wrong thing, and instances of `tc_gen_reloc' have been written to
1513 work around the problems, which in turns makes it difficult to fix
1514 `bfd_install_relocation'. */
1515
1516 /* If while processing a fixup, a reloc really needs to be created
1517 then it is done here. */
1518
1519 arelent *
1520 tc_gen_reloc (seg, fixp)
1521 asection *seg ATTRIBUTE_UNUSED;
1522 fixS *fixp;
1523 {
1524 arelent *reloc;
1525
1526 reloc = (arelent *) xmalloc (sizeof (arelent));
1527
1528 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1529 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1530
1531 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1532 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1533 if (reloc->howto == (reloc_howto_type *) NULL)
1534 {
1535 as_bad_where (fixp->fx_file, fixp->fx_line,
1536 _("reloc %d not supported by object file format"),
1537 (int) fixp->fx_r_type);
1538 return NULL;
1539 }
1540
1541 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1542 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1543 reloc->address = fixp->fx_offset;
1544
1545 reloc->addend = fixp->fx_offset;
1546
1547 return reloc;
1548 }
1549
1550 /* Parse ordinary expression. */
1551
1552 static char *
1553 parse_exp (s, op)
1554 char *s;
1555 expressionS *op;
1556 {
1557 input_line_pointer = s;
1558 expression (op);
1559 if (op->X_op == O_absent)
1560 as_bad (_("missing operand"));
1561 return input_line_pointer;
1562 }
1563
1564
1565 int
1566 md_estimate_size_before_relax (fragp, seg)
1567 fragS *fragp ATTRIBUTE_UNUSED;
1568 asection *seg ATTRIBUTE_UNUSED;
1569 {
1570 abort ();
1571 return 0;
1572 }
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