1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 is_ppc64_target (const bfd_target
*targ
, void *data ATTRIBUTE_UNUSED
)
1326 switch (targ
->flavour
)
1329 case bfd_target_elf_flavour
:
1330 return strncmp (targ
->name
, "elf64-powerpc", 13) == 0;
1333 case bfd_target_xcoff_flavour
:
1334 return (strcmp (targ
->name
, "aixcoff64-rs6000") == 0
1335 || strcmp (targ
->name
, "aix5coff64-rs6000") == 0);
1343 md_show_usage (FILE *stream
)
1345 fprintf (stream
, _("\
1346 PowerPC options:\n"));
1347 fprintf (stream
, _("\
1348 -a32 generate ELF32/XCOFF32\n"));
1349 if (bfd_iterate_over_targets (is_ppc64_target
, NULL
))
1350 fprintf (stream
, _("\
1351 -a64 generate ELF64/XCOFF64\n"));
1352 fprintf (stream
, _("\
1354 fprintf (stream
, _("\
1355 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n"));
1356 fprintf (stream
, _("\
1357 -mpwr generate code for POWER (RIOS1)\n"));
1358 fprintf (stream
, _("\
1359 -m601 generate code for PowerPC 601\n"));
1360 fprintf (stream
, _("\
1361 -mppc, -mppc32, -m603, -m604\n\
1362 generate code for PowerPC 603/604\n"));
1363 fprintf (stream
, _("\
1364 -m403 generate code for PowerPC 403\n"));
1365 fprintf (stream
, _("\
1366 -m405 generate code for PowerPC 405\n"));
1367 fprintf (stream
, _("\
1368 -m440 generate code for PowerPC 440\n"));
1369 fprintf (stream
, _("\
1370 -m464 generate code for PowerPC 464\n"));
1371 fprintf (stream
, _("\
1372 -m476 generate code for PowerPC 476\n"));
1373 fprintf (stream
, _("\
1374 -m7400, -m7410, -m7450, -m7455\n\
1375 generate code for PowerPC 7400/7410/7450/7455\n"));
1376 fprintf (stream
, _("\
1377 -m750cl, -mgekko, -mbroadway\n\
1378 generate code for PowerPC 750cl/Gekko/Broadway\n"));
1379 fprintf (stream
, _("\
1380 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1381 fprintf (stream
, _("\
1382 -mppc64, -m620 generate code for PowerPC 620/625/630\n"));
1383 fprintf (stream
, _("\
1384 -mppc64bridge generate code for PowerPC 64, including bridge insns\n"));
1385 fprintf (stream
, _("\
1386 -mbooke generate code for 32-bit PowerPC BookE\n"));
1387 fprintf (stream
, _("\
1388 -ma2 generate code for A2 architecture\n"));
1389 fprintf (stream
, _("\
1390 -mpower4, -mpwr4 generate code for Power4 architecture\n"));
1391 fprintf (stream
, _("\
1392 -mpower5, -mpwr5, -mpwr5x\n\
1393 generate code for Power5 architecture\n"));
1394 fprintf (stream
, _("\
1395 -mpower6, -mpwr6 generate code for Power6 architecture\n"));
1396 fprintf (stream
, _("\
1397 -mpower7, -mpwr7 generate code for Power7 architecture\n"));
1398 fprintf (stream
, _("\
1399 -mpower8, -mpwr8 generate code for Power8 architecture\n"));
1400 fprintf (stream
, _("\
1401 -mpower9, -mpwr9 generate code for Power9 architecture\n"));
1402 fprintf (stream
, _("\
1403 -mcell generate code for Cell Broadband Engine architecture\n"));
1404 fprintf (stream
, _("\
1405 -mcom generate code for Power/PowerPC common instructions\n"));
1406 fprintf (stream
, _("\
1407 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1408 fprintf (stream
, _("\
1409 -maltivec generate code for AltiVec\n"));
1410 fprintf (stream
, _("\
1411 -mvsx generate code for Vector-Scalar (VSX) instructions\n"));
1412 fprintf (stream
, _("\
1413 -me300 generate code for PowerPC e300 family\n"));
1414 fprintf (stream
, _("\
1415 -me500, -me500x2 generate code for Motorola e500 core complex\n"));
1416 fprintf (stream
, _("\
1417 -me500mc, generate code for Freescale e500mc core complex\n"));
1418 fprintf (stream
, _("\
1419 -me500mc64, generate code for Freescale e500mc64 core complex\n"));
1420 fprintf (stream
, _("\
1421 -me5500, generate code for Freescale e5500 core complex\n"));
1422 fprintf (stream
, _("\
1423 -me6500, generate code for Freescale e6500 core complex\n"));
1424 fprintf (stream
, _("\
1425 -mspe generate code for Motorola SPE instructions\n"));
1426 fprintf (stream
, _("\
1427 -mspe2 generate code for Freescale SPE2 instructions\n"));
1428 fprintf (stream
, _("\
1429 -mvle generate code for Freescale VLE instructions\n"));
1430 fprintf (stream
, _("\
1431 -mtitan generate code for AppliedMicro Titan core complex\n"));
1432 fprintf (stream
, _("\
1433 -mregnames Allow symbolic names for registers\n"));
1434 fprintf (stream
, _("\
1435 -mno-regnames Do not allow symbolic names for registers\n"));
1437 fprintf (stream
, _("\
1438 -mrelocatable support for GCC's -mrelocatble option\n"));
1439 fprintf (stream
, _("\
1440 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n"));
1441 fprintf (stream
, _("\
1442 -memb set PPC_EMB bit in ELF flags\n"));
1443 fprintf (stream
, _("\
1444 -mlittle, -mlittle-endian, -le\n\
1445 generate code for a little endian machine\n"));
1446 fprintf (stream
, _("\
1447 -mbig, -mbig-endian, -be\n\
1448 generate code for a big endian machine\n"));
1449 fprintf (stream
, _("\
1450 -msolaris generate code for Solaris\n"));
1451 fprintf (stream
, _("\
1452 -mno-solaris do not generate code for Solaris\n"));
1453 fprintf (stream
, _("\
1454 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n"));
1455 fprintf (stream
, _("\
1456 -V print assembler version number\n"));
1457 fprintf (stream
, _("\
1458 -Qy, -Qn ignored\n"));
1460 fprintf (stream
, _("\
1461 -nops=count when aligning, more than COUNT nops uses a branch\n"));
1462 fprintf (stream
, _("\
1463 -ppc476-workaround warn if emitting data to code sections\n"));
1466 /* Set ppc_cpu if it is not already set. */
1471 const char *default_os
= TARGET_OS
;
1472 const char *default_cpu
= TARGET_CPU
;
1474 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1477 if (target_big_endian
)
1478 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1480 /* The minimum supported cpu for 64-bit little-endian is power8. */
1481 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1482 else if (strncmp (default_os
, "aix", 3) == 0
1483 && default_os
[3] >= '4' && default_os
[3] <= '9')
1484 ppc_cpu
|= PPC_OPCODE_COMMON
;
1485 else if (strncmp (default_os
, "aix3", 4) == 0)
1486 ppc_cpu
|= PPC_OPCODE_POWER
;
1487 else if (strcmp (default_cpu
, "rs6000") == 0)
1488 ppc_cpu
|= PPC_OPCODE_POWER
;
1489 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1490 ppc_cpu
|= PPC_OPCODE_PPC
;
1492 as_fatal (_("unknown default cpu = %s, os = %s"),
1493 default_cpu
, default_os
);
1497 /* Figure out the BFD architecture to use. This function and ppc_mach
1498 are called well before md_begin, when the output file is opened. */
1500 enum bfd_architecture
1503 const char *default_cpu
= TARGET_CPU
;
1506 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1507 return bfd_arch_powerpc
;
1508 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1509 return bfd_arch_powerpc
;
1510 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1511 return bfd_arch_rs6000
;
1512 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1514 if (strcmp (default_cpu
, "rs6000") == 0)
1515 return bfd_arch_rs6000
;
1516 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1517 return bfd_arch_powerpc
;
1520 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1521 return bfd_arch_unknown
;
1528 return bfd_mach_ppc64
;
1529 else if (ppc_arch () == bfd_arch_rs6000
)
1530 return bfd_mach_rs6k
;
1531 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1532 return bfd_mach_ppc_titan
;
1533 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1534 return bfd_mach_ppc_vle
;
1536 return bfd_mach_ppc
;
1540 ppc_target_format (void)
1544 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1546 return "xcoff-powermac";
1549 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1551 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1557 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1558 # elif defined (TE_VXWORKS)
1559 return "elf32-powerpc-vxworks";
1561 return (target_big_endian
1562 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1563 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1568 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1569 Return TRUE if there's a problem, otherwise FALSE. */
1572 insn_validate (const struct powerpc_opcode
*op
)
1574 const unsigned char *o
;
1575 uint64_t omask
= op
->mask
;
1577 /* The mask had better not trim off opcode bits. */
1578 if ((op
->opcode
& omask
) != op
->opcode
)
1580 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1584 /* The operands must not overlap the opcode or each other. */
1585 for (o
= op
->operands
; *o
; ++o
)
1587 bfd_boolean optional
= FALSE
;
1588 if (*o
>= num_powerpc_operands
)
1590 as_bad (_("operand index error for %s"), op
->name
);
1596 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1597 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1604 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1606 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1608 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1610 else if (operand
->shift
>= 0)
1611 mask
= operand
->bitm
<< operand
->shift
;
1613 mask
= operand
->bitm
>> -operand
->shift
;
1616 as_bad (_("operand %d overlap in %s"),
1617 (int) (o
- op
->operands
), op
->name
);
1621 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1625 as_bad (_("non-optional operand %d follows optional operand in %s"),
1626 (int) (o
- op
->operands
), op
->name
);
1634 /* Insert opcodes and macros into hash tables. Called at startup and
1635 for .machine pseudo. */
1638 ppc_setup_opcodes (void)
1640 const struct powerpc_opcode
*op
;
1641 const struct powerpc_opcode
*op_end
;
1642 const struct powerpc_macro
*macro
;
1643 const struct powerpc_macro
*macro_end
;
1644 bfd_boolean bad_insn
= FALSE
;
1646 if (ppc_hash
!= NULL
)
1647 hash_die (ppc_hash
);
1648 if (ppc_macro_hash
!= NULL
)
1649 hash_die (ppc_macro_hash
);
1651 /* Insert the opcodes into a hash table. */
1652 ppc_hash
= hash_new ();
1654 if (ENABLE_CHECKING
)
1658 /* An index into powerpc_operands is stored in struct fix
1659 fx_pcrel_adjust which is 8 bits wide. */
1660 gas_assert (num_powerpc_operands
< 256);
1662 /* Check operand masks. Code here and in the disassembler assumes
1663 all the 1's in the mask are contiguous. */
1664 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1666 uint64_t mask
= powerpc_operands
[i
].bitm
;
1670 right_bit
= mask
& -mask
;
1672 right_bit
= mask
& -mask
;
1673 if (mask
!= right_bit
)
1675 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1678 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1679 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1680 sizeof (powerpc_operands
[0])) == 0)
1682 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1689 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1690 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1692 if (ENABLE_CHECKING
)
1694 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1696 #ifdef PRINT_OPCODE_TABLE
1697 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1698 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1699 new_opcode
, (unsigned long long) op
->opcode
,
1700 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1703 /* The major opcodes had better be sorted. Code in the disassembler
1704 assumes the insns are sorted according to major opcode. */
1705 if (op
!= powerpc_opcodes
1706 && new_opcode
< PPC_OP (op
[-1].opcode
))
1708 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1712 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1714 as_bad (_("%s is enabled by vle flag"), op
->name
);
1717 if (PPC_OP (op
->opcode
) != 4
1718 && PPC_OP (op
->opcode
) != 31
1719 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1721 as_bad (_("%s not disabled by vle flag"), op
->name
);
1724 bad_insn
|= insn_validate (op
);
1727 if ((ppc_cpu
& op
->flags
) != 0
1728 && !(ppc_cpu
& op
->deprecated
))
1732 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1735 as_bad (_("duplicate instruction %s"),
1742 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1743 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1744 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1746 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1747 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1749 if (ENABLE_CHECKING
)
1751 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1753 #ifdef PRINT_OPCODE_TABLE
1754 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1755 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1756 new_opcode
, (unsigned long long) op
->opcode
,
1757 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1760 /* The major opcodes had better be sorted. Code in the disassembler
1761 assumes the insns are sorted according to major opcode. */
1762 if (op
!= prefix_opcodes
1763 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1765 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1768 bad_insn
|= insn_validate (op
);
1771 if ((ppc_cpu
& op
->flags
) != 0
1772 && !(ppc_cpu
& op
->deprecated
))
1776 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1779 as_bad (_("duplicate instruction %s"),
1786 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1787 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1788 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1790 op_end
= vle_opcodes
+ vle_num_opcodes
;
1791 for (op
= vle_opcodes
; op
< op_end
; op
++)
1793 if (ENABLE_CHECKING
)
1795 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1797 #ifdef PRINT_OPCODE_TABLE
1798 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1799 op
->name
, (unsigned int) (op
- vle_opcodes
),
1800 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1801 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1804 /* The major opcodes had better be sorted. Code in the disassembler
1805 assumes the insns are sorted according to major opcode. */
1806 if (op
!= vle_opcodes
1807 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1809 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1813 bad_insn
|= insn_validate (op
);
1816 if ((ppc_cpu
& op
->flags
) != 0
1817 && !(ppc_cpu
& op
->deprecated
))
1821 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1824 as_bad (_("duplicate instruction %s"),
1831 /* SPE2 instructions */
1832 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1834 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1835 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1837 if (ENABLE_CHECKING
)
1839 if (op
!= spe2_opcodes
)
1841 unsigned old_seg
, new_seg
;
1843 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1844 old_seg
= VLE_OP_TO_SEG (old_seg
);
1845 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1846 new_seg
= VLE_OP_TO_SEG (new_seg
);
1848 /* The major opcodes had better be sorted. Code in the
1849 disassembler assumes the insns are sorted according to
1851 if (new_seg
< old_seg
)
1853 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1858 bad_insn
|= insn_validate (op
);
1861 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1865 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1868 as_bad (_("duplicate instruction %s"),
1875 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1876 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1879 /* Insert the macros into a hash table. */
1880 ppc_macro_hash
= hash_new ();
1882 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1883 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1885 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1889 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1890 if (retval
!= (const char *) NULL
)
1892 as_bad (_("duplicate macro %s"), macro
->name
);
1902 /* This function is called when the assembler starts up. It is called
1903 after the options have been parsed and the output file has been
1911 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1912 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1915 /* Set the ELF flags if desired. */
1916 if (ppc_flags
&& !msolaris
)
1917 bfd_set_private_flags (stdoutput
, ppc_flags
);
1920 ppc_setup_opcodes ();
1922 /* Tell the main code what the endianness is if it is not overridden
1924 if (!set_target_endian
)
1926 set_target_endian
= 1;
1927 target_big_endian
= PPC_BIG_ENDIAN
;
1931 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1933 /* Create dummy symbols to serve as initial csects. This forces the
1934 text csects to precede the data csects. These symbols will not
1936 ppc_text_csects
= symbol_make ("dummy\001");
1937 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1938 ppc_data_csects
= symbol_make ("dummy\001");
1939 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1944 ppc_current_section
= text_section
;
1945 ppc_previous_section
= 0;
1954 if (ppc_apuinfo_list
== NULL
)
1957 /* Ok, so write the section info out. We have this layout:
1961 0 8 length of "APUinfo\0"
1962 4 (n*4) number of APU's (4 bytes each)
1965 20 APU#1 first APU's info
1966 24 APU#2 second APU's info
1971 asection
*seg
= now_seg
;
1972 subsegT subseg
= now_subseg
;
1973 asection
*apuinfo_secp
= (asection
*) NULL
;
1976 /* Create the .PPC.EMB.apuinfo section. */
1977 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1978 bfd_set_section_flags (stdoutput
,
1980 SEC_HAS_CONTENTS
| SEC_READONLY
);
1983 md_number_to_chars (p
, (valueT
) 8, 4);
1986 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1989 md_number_to_chars (p
, (valueT
) 2, 4);
1992 strcpy (p
, APUINFO_LABEL
);
1994 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1997 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
2000 frag_align (2, 0, 0);
2002 /* We probably can't restore the current segment, for there likely
2005 subseg_set (seg
, subseg
);
2010 /* Insert an operand value into an instruction. */
2013 ppc_insert_operand (uint64_t insn
,
2014 const struct powerpc_operand
*operand
,
2020 int64_t min
, max
, right
;
2022 max
= operand
->bitm
;
2026 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
2028 /* Extend the allowed range for addis to [-32768, 65535].
2029 Similarly for cmpli and some VLE high part insns. For 64-bit
2030 it would be good to disable this for signed fields since the
2031 value is sign extended into the high 32 bits of the register.
2032 If the value is, say, an address, then we might care about
2033 the high bits. However, gcc as of 2014-06 uses unsigned
2034 values when loading the high part of 64-bit constants using
2036 min
= ~(max
>> 1) & -right
;
2038 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
2040 max
= (max
>> 1) & -right
;
2041 min
= ~max
& -right
;
2044 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
2047 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
2056 /* Some people write constants with the sign extension done by
2057 hand but only up to 32 bits. This shouldn't really be valid,
2058 but, to permit this code to assemble on a 64-bit host, we
2059 sign extend the 32-bit value to 64 bits if so doing makes the
2060 value valid. We only do this for operands that are 32-bits or
2063 && (operand
->bitm
& ~0xffffffffULL
) == 0
2064 && (val
- (1LL << 32)) >= min
2065 && (val
- (1LL << 32)) <= max
2066 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
2067 val
= val
- (1LL << 32);
2069 /* Similarly, people write expressions like ~(1<<15), and expect
2070 this to be OK for a 32-bit unsigned value. */
2072 && (operand
->bitm
& ~0xffffffffULL
) == 0
2073 && (val
+ (1LL << 32)) >= min
2074 && (val
+ (1LL << 32)) <= max
2075 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2076 val
= val
+ (1LL << 32);
2080 || (val
& (right
- 1)) != 0)
2081 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2084 if (operand
->insert
)
2089 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2090 if (errmsg
!= (const char *) NULL
)
2091 as_bad_where (file
, line
, "%s", errmsg
);
2093 else if (operand
->shift
>= 0)
2094 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2096 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2103 /* Parse @got, etc. and return the desired relocation. */
2104 static bfd_reloc_code_real_type
2105 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2109 unsigned int length
: 8;
2110 unsigned int valid32
: 1;
2111 unsigned int valid64
: 1;
2120 const struct map_bfd
*ptr
;
2122 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2123 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2124 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2126 static const struct map_bfd mapping
[] = {
2127 MAP ("l", BFD_RELOC_LO16
),
2128 MAP ("h", BFD_RELOC_HI16
),
2129 MAP ("ha", BFD_RELOC_HI16_S
),
2130 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2131 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2132 MAP ("got", BFD_RELOC_16_GOTOFF
),
2133 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2134 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2135 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2136 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2137 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2138 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2139 MAP ("copy", BFD_RELOC_PPC_COPY
),
2140 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2141 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2142 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2143 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2144 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2145 MAP ("tls", BFD_RELOC_PPC_TLS
),
2146 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2147 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2148 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2149 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2150 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2151 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2152 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2153 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2154 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2155 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2156 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2157 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2158 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2159 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2160 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2161 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2162 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2163 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2164 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2165 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2166 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2167 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2168 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2169 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2170 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2171 MAP32 ("fixup", BFD_RELOC_CTOR
),
2172 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2173 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2174 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2175 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2176 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2177 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2178 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2179 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2180 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2181 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2182 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2183 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2184 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2185 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2186 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2187 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2188 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2189 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2190 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2191 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2192 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2193 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2194 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2195 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2196 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2197 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2198 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2199 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2200 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2201 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2202 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2203 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2204 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2205 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2206 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2207 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2208 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2209 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2210 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2211 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2212 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2213 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2214 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2215 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2216 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2217 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2218 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2219 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2220 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2221 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2222 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2223 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2224 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2225 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2226 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2227 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL
),
2228 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD34
),
2229 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD34
),
2230 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL34
),
2231 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL34
),
2232 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2233 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2234 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2235 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2236 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2240 return BFD_RELOC_NONE
;
2242 for (ch
= *str
, str2
= ident
;
2243 (str2
< ident
+ sizeof (ident
) - 1
2244 && (ISALNUM (ch
) || ch
== '@'));
2247 *str2
++ = TOLOWER (ch
);
2254 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2255 if (ch
== ptr
->string
[0]
2256 && len
== ptr
->length
2257 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2258 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2260 int reloc
= ptr
->reloc
;
2262 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2266 case BFD_RELOC_16_GOTOFF
:
2267 case BFD_RELOC_LO16_GOTOFF
:
2268 case BFD_RELOC_HI16_GOTOFF
:
2269 case BFD_RELOC_HI16_S_GOTOFF
:
2270 as_warn (_("symbol+offset@%s means symbol@%s+offset"),
2271 ptr
->string
, ptr
->string
);
2274 case BFD_RELOC_PPC_GOT_TLSGD16
:
2275 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2276 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2277 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2278 case BFD_RELOC_PPC_GOT_TLSLD16
:
2279 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2280 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2281 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2282 case BFD_RELOC_PPC_GOT_DTPREL16
:
2283 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2284 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2285 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2286 case BFD_RELOC_PPC_GOT_TPREL16
:
2287 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2288 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2289 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2290 as_bad (_("symbol+offset@%s not supported"), ptr
->string
);
2295 /* Now check for identifier@suffix+constant. */
2296 if (*str
== '-' || *str
== '+')
2298 char *orig_line
= input_line_pointer
;
2299 expressionS new_exp
;
2301 input_line_pointer
= str
;
2302 expression (&new_exp
);
2303 if (new_exp
.X_op
== O_constant
)
2305 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2306 str
= input_line_pointer
;
2309 if (&input_line_pointer
!= str_p
)
2310 input_line_pointer
= orig_line
;
2314 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2315 && exp_p
->X_op
== O_symbol
2316 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2318 /* Change the symbol so that the dummy .TOC. symbol can be
2319 omitted from the object file. */
2320 exp_p
->X_add_symbol
= &abs_symbol
;
2323 return (bfd_reloc_code_real_type
) reloc
;
2326 return BFD_RELOC_NONE
;
2329 /* Support @got, etc. on constants emitted via .short, .int etc. */
2331 bfd_reloc_code_real_type
2332 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2335 if (nbytes
>= 2 && *input_line_pointer
== '@')
2336 return ppc_elf_suffix (&input_line_pointer
, exp
);
2337 return BFD_RELOC_NONE
;
2340 /* Warn when emitting data to code sections, unless we are emitting
2341 a relocation that ld --ppc476-workaround uses to recognise data
2342 *and* there was an unconditional branch prior to the data. */
2345 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2346 unsigned int nbytes
, fixS
*fix
)
2349 && (now_seg
->flags
& SEC_CODE
) != 0
2352 || !(fix
->fx_r_type
== BFD_RELOC_32
2353 || fix
->fx_r_type
== BFD_RELOC_CTOR
2354 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2355 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2356 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2357 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2358 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2359 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2360 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2361 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2363 /* Flag that we've warned. */
2367 as_warn (_("data in executable section"));
2371 /* Solaris pseduo op to change to the .rodata section. */
2373 ppc_elf_rdata (int xxx
)
2375 char *save_line
= input_line_pointer
;
2376 static char section
[] = ".rodata\n";
2378 /* Just pretend this is .section .rodata */
2379 input_line_pointer
= section
;
2380 obj_elf_section (xxx
);
2382 input_line_pointer
= save_line
;
2385 /* Pseudo op to make file scope bss items. */
2387 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2400 c
= get_symbol_name (&name
);
2402 /* Just after name is now '\0'. */
2403 p
= input_line_pointer
;
2405 SKIP_WHITESPACE_AFTER_NAME ();
2406 if (*input_line_pointer
!= ',')
2408 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2409 ignore_rest_of_line ();
2413 input_line_pointer
++; /* skip ',' */
2414 if ((size
= get_absolute_expression ()) < 0)
2416 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2417 ignore_rest_of_line ();
2421 /* The third argument to .lcomm is the alignment. */
2422 if (*input_line_pointer
!= ',')
2426 ++input_line_pointer
;
2427 align
= get_absolute_expression ();
2430 as_warn (_("ignoring bad alignment"));
2436 symbolP
= symbol_find_or_make (name
);
2439 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2441 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2442 S_GET_NAME (symbolP
));
2443 ignore_rest_of_line ();
2447 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2449 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2450 S_GET_NAME (symbolP
),
2451 (long) S_GET_VALUE (symbolP
),
2454 ignore_rest_of_line ();
2460 old_subsec
= now_subseg
;
2463 /* Convert to a power of 2 alignment. */
2464 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2467 as_bad (_("common alignment not a power of 2"));
2468 ignore_rest_of_line ();
2475 record_alignment (bss_section
, align2
);
2476 subseg_set (bss_section
, 1);
2478 frag_align (align2
, 0, 0);
2479 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2480 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2481 symbol_set_frag (symbolP
, frag_now
);
2482 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2485 S_SET_SIZE (symbolP
, size
);
2486 S_SET_SEGMENT (symbolP
, bss_section
);
2487 subseg_set (old_sec
, old_subsec
);
2488 demand_empty_rest_of_line ();
2491 /* Pseudo op to set symbol local entry point. */
2493 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2496 char c
= get_symbol_name (&name
);
2501 elf_symbol_type
*elfsym
;
2503 p
= input_line_pointer
;
2505 SKIP_WHITESPACE_AFTER_NAME ();
2506 if (*input_line_pointer
!= ',')
2509 as_bad (_("expected comma after name `%s' in .localentry directive"),
2512 ignore_rest_of_line ();
2515 input_line_pointer
++;
2517 if (exp
.X_op
== O_absent
)
2519 as_bad (_("missing expression in .localentry directive"));
2520 exp
.X_op
= O_constant
;
2521 exp
.X_add_number
= 0;
2524 sym
= symbol_find_or_make (name
);
2527 if (resolve_expression (&exp
)
2528 && exp
.X_op
== O_constant
)
2530 unsigned int encoded
, ok
;
2533 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2534 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2537 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2538 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2540 as_bad (_(".localentry expression for `%s' "
2541 "is not a valid power of 2"), S_GET_NAME (sym
));
2547 bfdsym
= symbol_get_bfdsym (sym
);
2548 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2549 gas_assert (elfsym
);
2550 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2551 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2552 if (ppc_abiversion
== 0)
2557 as_bad (_(".localentry expression for `%s' "
2558 "does not evaluate to a constant"), S_GET_NAME (sym
));
2560 demand_empty_rest_of_line ();
2563 /* Pseudo op to set ABI version. */
2565 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2570 if (exp
.X_op
== O_absent
)
2572 as_bad (_("missing expression in .abiversion directive"));
2573 exp
.X_op
= O_constant
;
2574 exp
.X_add_number
= 0;
2577 if (resolve_expression (&exp
)
2578 && exp
.X_op
== O_constant
)
2579 ppc_abiversion
= exp
.X_add_number
;
2581 as_bad (_(".abiversion expression does not evaluate to a constant"));
2582 demand_empty_rest_of_line ();
2585 /* Parse a .gnu_attribute directive. */
2587 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2589 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2591 /* Check validity of defined powerpc tags. */
2592 if (tag
== Tag_GNU_Power_ABI_FP
2593 || tag
== Tag_GNU_Power_ABI_Vector
2594 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2598 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2600 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2601 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2602 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2603 as_warn (_("unknown .gnu_attribute value"));
2607 /* Set ABI version in output file. */
2611 if (ppc_obj64
&& ppc_abiversion
!= 0)
2613 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2614 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2616 /* Any selection of opcodes based on ppc_cpu after gas has finished
2617 parsing the file is invalid. md_apply_fix and ppc_handle_align
2618 must select opcodes based on the machine in force at the point
2619 where the fixup or alignment frag was created, not the machine in
2620 force at the end of file. */
2624 /* Validate any relocations emitted for -mrelocatable, possibly adding
2625 fixups for word relocations in writable segments, so we can adjust
2628 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2630 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2639 case SHLIB_MRELOCATABLE
:
2640 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2641 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2642 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2643 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2644 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2645 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2646 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2647 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2648 && (seg
->flags
& SEC_LOAD
) != 0
2649 && strcmp (segment_name (seg
), ".got2") != 0
2650 && strcmp (segment_name (seg
), ".dtors") != 0
2651 && strcmp (segment_name (seg
), ".ctors") != 0
2652 && strcmp (segment_name (seg
), ".fixup") != 0
2653 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2654 && strcmp (segment_name (seg
), ".eh_frame") != 0
2655 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2657 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2658 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2660 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2661 _("relocation cannot be done when using -mrelocatable"));
2668 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2669 function descriptor sym if the corresponding code sym is used. */
2672 ppc_frob_file_before_adjust (void)
2680 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2686 name
= S_GET_NAME (symp
);
2690 if (! S_IS_WEAK (symp
)
2691 || S_IS_DEFINED (symp
))
2694 dotname
= concat (".", name
, (char *) NULL
);
2695 dotsym
= symbol_find_noref (dotname
, 1);
2697 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2698 || symbol_used_in_reloc_p (dotsym
)))
2699 symbol_mark_used (symp
);
2703 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2705 && toc_reloc_types
!= has_large_toc_reloc
2706 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2707 as_warn (_("TOC section size exceeds 64k"));
2710 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2711 emitted. Other uses of .TOC. will cause the symbol to be marked
2712 with BSF_KEEP in md_apply_fix. */
2715 ppc_elf_adjust_symtab (void)
2720 symp
= symbol_find (".TOC.");
2723 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2724 if ((bsym
->flags
& BSF_KEEP
) == 0)
2725 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2729 #endif /* OBJ_ELF */
2734 * Summary of parse_toc_entry.
2736 * in: Input_line_pointer points to the '[' in one of:
2738 * [toc] [tocv] [toc32] [toc64]
2740 * Anything else is an error of one kind or another.
2743 * return value: success or failure
2744 * toc_kind: kind of toc reference
2745 * input_line_pointer:
2746 * success: first char after the ']'
2747 * failure: unchanged
2751 * [toc] - rv == success, toc_kind = default_toc
2752 * [tocv] - rv == success, toc_kind = data_in_toc
2753 * [toc32] - rv == success, toc_kind = must_be_32
2754 * [toc64] - rv == success, toc_kind = must_be_64
2758 enum toc_size_qualifier
2760 default_toc
, /* The toc cell constructed should be the system default size */
2761 data_in_toc
, /* This is a direct reference to a toc cell */
2762 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2763 must_be_64
/* The toc cell constructed must be 64 bits wide */
2767 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2772 enum toc_size_qualifier t
;
2774 /* Save the input_line_pointer. */
2775 start
= input_line_pointer
;
2777 /* Skip over the '[' , and whitespace. */
2778 ++input_line_pointer
;
2781 /* Find the spelling of the operand. */
2782 c
= get_symbol_name (&toc_spec
);
2784 if (strcmp (toc_spec
, "toc") == 0)
2788 else if (strcmp (toc_spec
, "tocv") == 0)
2792 else if (strcmp (toc_spec
, "toc32") == 0)
2796 else if (strcmp (toc_spec
, "toc64") == 0)
2802 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2803 *input_line_pointer
= c
;
2804 input_line_pointer
= start
;
2808 /* Now find the ']'. */
2809 *input_line_pointer
= c
;
2811 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2812 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2816 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2817 input_line_pointer
= start
;
2826 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2827 /* See whether a symbol is in the TOC section. */
2830 ppc_is_toc_sym (symbolS
*sym
)
2833 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2834 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2837 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2839 return strcmp (sname
, ".toc") == 0;
2841 return strcmp (sname
, ".got") == 0;
2844 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2848 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2850 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2854 /* Check we don't already exist. */
2855 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2856 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2859 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2861 if (ppc_apuinfo_num_alloc
== 0)
2863 ppc_apuinfo_num_alloc
= 4;
2864 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2868 ppc_apuinfo_num_alloc
+= 4;
2869 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2870 ppc_apuinfo_num_alloc
);
2873 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2878 /* Various frobbings of labels and their addresses. */
2880 /* Symbols labelling the current insn. */
2881 struct insn_label_list
2883 struct insn_label_list
*next
;
2887 static struct insn_label_list
*insn_labels
;
2888 static struct insn_label_list
*free_insn_labels
;
2891 ppc_record_label (symbolS
*sym
)
2893 struct insn_label_list
*l
;
2895 if (free_insn_labels
== NULL
)
2896 l
= XNEW (struct insn_label_list
);
2899 l
= free_insn_labels
;
2900 free_insn_labels
= l
->next
;
2904 l
->next
= insn_labels
;
2909 ppc_clear_labels (void)
2911 while (insn_labels
!= NULL
)
2913 struct insn_label_list
*l
= insn_labels
;
2914 insn_labels
= l
->next
;
2915 l
->next
= free_insn_labels
;
2916 free_insn_labels
= l
;
2921 ppc_start_line_hook (void)
2923 ppc_clear_labels ();
2927 ppc_new_dot_label (symbolS
*sym
)
2929 ppc_record_label (sym
);
2931 /* Anchor this label to the current csect for relocations. */
2932 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2937 ppc_frob_label (symbolS
*sym
)
2939 ppc_record_label (sym
);
2942 /* Set the class of a label based on where it is defined. This handles
2943 symbols without suffixes. Also, move the symbol so that it follows
2944 the csect symbol. */
2945 if (ppc_current_csect
!= (symbolS
*) NULL
)
2947 if (symbol_get_tc (sym
)->symbol_class
== -1)
2948 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2950 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2951 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2952 &symbol_rootP
, &symbol_lastP
);
2953 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2954 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2959 dwarf2_emit_label (sym
);
2963 /* We need to keep a list of fixups. We can't simply generate them as
2964 we go, because that would require us to first create the frag, and
2965 that would screw up references to ``.''. */
2971 bfd_reloc_code_real_type reloc
;
2974 #define MAX_INSN_FIXUPS (5)
2976 /* Return the field size operated on by RELOC, and whether it is
2977 pc-relative in PC_RELATIVE. */
2980 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2982 unsigned int size
= 0;
2983 bfd_boolean pcrel
= FALSE
;
2987 /* This switch statement must handle all BFD_RELOC values
2988 possible in instruction fixups. As is, it handles all
2989 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2990 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2991 Overkill since data and marker relocs need not be handled
2992 here, but this way we can be sure a needed fixup reloc isn't
2993 accidentally omitted. */
2994 case BFD_RELOC_PPC_EMB_MRKREF
:
2995 case BFD_RELOC_VTABLE_ENTRY
:
2996 case BFD_RELOC_VTABLE_INHERIT
:
3004 case BFD_RELOC_16_BASEREL
:
3005 case BFD_RELOC_16_GOTOFF
:
3006 case BFD_RELOC_GPREL16
:
3007 case BFD_RELOC_HI16
:
3008 case BFD_RELOC_HI16_BASEREL
:
3009 case BFD_RELOC_HI16_GOTOFF
:
3010 case BFD_RELOC_HI16_PLTOFF
:
3011 case BFD_RELOC_HI16_S
:
3012 case BFD_RELOC_HI16_S_BASEREL
:
3013 case BFD_RELOC_HI16_S_GOTOFF
:
3014 case BFD_RELOC_HI16_S_PLTOFF
:
3015 case BFD_RELOC_LO16
:
3016 case BFD_RELOC_LO16_BASEREL
:
3017 case BFD_RELOC_LO16_GOTOFF
:
3018 case BFD_RELOC_LO16_PLTOFF
:
3019 case BFD_RELOC_PPC64_ADDR16_DS
:
3020 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3021 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3022 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
3023 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
3024 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
3025 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
3026 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
3027 case BFD_RELOC_PPC64_DTPREL16_DS
:
3028 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
3029 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
3030 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
3031 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
3032 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
3033 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
3034 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
3035 case BFD_RELOC_PPC64_GOT16_DS
:
3036 case BFD_RELOC_PPC64_GOT16_LO_DS
:
3037 case BFD_RELOC_PPC64_HIGHER
:
3038 case BFD_RELOC_PPC64_HIGHER_S
:
3039 case BFD_RELOC_PPC64_HIGHEST
:
3040 case BFD_RELOC_PPC64_HIGHEST_S
:
3041 case BFD_RELOC_PPC64_PLT16_LO_DS
:
3042 case BFD_RELOC_PPC64_PLTGOT16
:
3043 case BFD_RELOC_PPC64_PLTGOT16_DS
:
3044 case BFD_RELOC_PPC64_PLTGOT16_HA
:
3045 case BFD_RELOC_PPC64_PLTGOT16_HI
:
3046 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3047 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
3048 case BFD_RELOC_PPC64_SECTOFF_DS
:
3049 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
3050 case BFD_RELOC_PPC64_TOC16_DS
:
3051 case BFD_RELOC_PPC64_TOC16_HA
:
3052 case BFD_RELOC_PPC64_TOC16_HI
:
3053 case BFD_RELOC_PPC64_TOC16_LO
:
3054 case BFD_RELOC_PPC64_TOC16_LO_DS
:
3055 case BFD_RELOC_PPC64_TPREL16_DS
:
3056 case BFD_RELOC_PPC64_TPREL16_HIGH
:
3057 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
3058 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
3059 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
3060 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
3061 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
3062 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
3064 case BFD_RELOC_PPC_BA16
:
3066 case BFD_RELOC_PPC_DTPREL16
:
3067 case BFD_RELOC_PPC_DTPREL16_HA
:
3068 case BFD_RELOC_PPC_DTPREL16_HI
:
3069 case BFD_RELOC_PPC_DTPREL16_LO
:
3070 case BFD_RELOC_PPC_EMB_NADDR16
:
3071 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
3072 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
3073 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
3074 case BFD_RELOC_PPC_EMB_RELSDA
:
3075 case BFD_RELOC_PPC_EMB_RELSEC16
:
3076 case BFD_RELOC_PPC_EMB_RELST_LO
:
3077 case BFD_RELOC_PPC_EMB_RELST_HI
:
3078 case BFD_RELOC_PPC_EMB_RELST_HA
:
3079 case BFD_RELOC_PPC_EMB_SDA2I16
:
3080 case BFD_RELOC_PPC_EMB_SDA2REL
:
3081 case BFD_RELOC_PPC_EMB_SDAI16
:
3082 case BFD_RELOC_PPC_GOT_DTPREL16
:
3083 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3084 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3085 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3086 case BFD_RELOC_PPC_GOT_TLSGD16
:
3087 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3088 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3089 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3090 case BFD_RELOC_PPC_GOT_TLSLD16
:
3091 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3092 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3093 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3094 case BFD_RELOC_PPC_GOT_TPREL16
:
3095 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3096 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3097 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3098 case BFD_RELOC_PPC_TOC16
:
3099 case BFD_RELOC_PPC_TPREL16
:
3100 case BFD_RELOC_PPC_TPREL16_HA
:
3101 case BFD_RELOC_PPC_TPREL16_HI
:
3102 case BFD_RELOC_PPC_TPREL16_LO
:
3106 case BFD_RELOC_16_PCREL
:
3107 case BFD_RELOC_HI16_PCREL
:
3108 case BFD_RELOC_HI16_S_PCREL
:
3109 case BFD_RELOC_LO16_PCREL
:
3110 case BFD_RELOC_PPC64_REL16_HIGH
:
3111 case BFD_RELOC_PPC64_REL16_HIGHA
:
3112 case BFD_RELOC_PPC64_REL16_HIGHER
:
3113 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3114 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3115 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3116 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3117 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3118 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3119 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3121 case BFD_RELOC_PPC_B16
:
3123 case BFD_RELOC_PPC_VLE_REL8
:
3128 case BFD_RELOC_16_GOT_PCREL
: /* coff reloc, bad name re size. */
3130 case BFD_RELOC_32_GOTOFF
:
3131 case BFD_RELOC_32_PLTOFF
:
3133 case BFD_RELOC_CTOR
:
3135 case BFD_RELOC_PPC64_ENTRY
:
3136 case BFD_RELOC_PPC_16DX_HA
:
3138 case BFD_RELOC_PPC_BA16
:
3140 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3141 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3142 case BFD_RELOC_PPC_BA26
:
3143 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3144 case BFD_RELOC_PPC_EMB_NADDR32
:
3145 case BFD_RELOC_PPC_EMB_SDA21
:
3146 case BFD_RELOC_PPC_TLS
:
3147 case BFD_RELOC_PPC_TLSGD
:
3148 case BFD_RELOC_PPC_TLSLD
:
3149 case BFD_RELOC_PPC_VLE_HA16A
:
3150 case BFD_RELOC_PPC_VLE_HA16D
:
3151 case BFD_RELOC_PPC_VLE_HI16A
:
3152 case BFD_RELOC_PPC_VLE_HI16D
:
3153 case BFD_RELOC_PPC_VLE_LO16A
:
3154 case BFD_RELOC_PPC_VLE_LO16D
:
3155 case BFD_RELOC_PPC_VLE_SDA21
:
3156 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3157 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3158 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3159 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3160 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3161 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3162 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3163 case BFD_RELOC_PPC64_TLS_PCREL
:
3168 case BFD_RELOC_24_PLT_PCREL
:
3169 case BFD_RELOC_32_PCREL
:
3170 case BFD_RELOC_32_PLT_PCREL
:
3171 case BFD_RELOC_PPC64_REL24_NOTOC
:
3173 case BFD_RELOC_PPC_B16
:
3175 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3176 case BFD_RELOC_PPC_B16_BRTAKEN
:
3177 case BFD_RELOC_PPC_B26
:
3178 case BFD_RELOC_PPC_LOCAL24PC
:
3179 case BFD_RELOC_PPC_REL16DX_HA
:
3180 case BFD_RELOC_PPC_VLE_REL15
:
3181 case BFD_RELOC_PPC_VLE_REL24
:
3187 case BFD_RELOC_CTOR
:
3189 case BFD_RELOC_PPC_COPY
:
3190 case BFD_RELOC_PPC_DTPMOD
:
3191 case BFD_RELOC_PPC_DTPREL
:
3192 case BFD_RELOC_PPC_GLOB_DAT
:
3193 case BFD_RELOC_PPC_TPREL
:
3194 size
= ppc_obj64
? 8 : 4;
3198 case BFD_RELOC_64_PLTOFF
:
3199 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3200 case BFD_RELOC_PPC64_D28
:
3201 case BFD_RELOC_PPC64_D34
:
3202 case BFD_RELOC_PPC64_D34_LO
:
3203 case BFD_RELOC_PPC64_D34_HI30
:
3204 case BFD_RELOC_PPC64_D34_HA30
:
3205 case BFD_RELOC_PPC64_TPREL34
:
3206 case BFD_RELOC_PPC64_DTPREL34
:
3207 case BFD_RELOC_PPC64_TOC
:
3211 case BFD_RELOC_64_PCREL
:
3212 case BFD_RELOC_64_PLT_PCREL
:
3213 case BFD_RELOC_PPC64_GOT_PCREL34
:
3214 case BFD_RELOC_PPC64_GOT_TLSGD34
:
3215 case BFD_RELOC_PPC64_GOT_TLSLD34
:
3216 case BFD_RELOC_PPC64_GOT_TPREL34
:
3217 case BFD_RELOC_PPC64_GOT_DTPREL34
:
3218 case BFD_RELOC_PPC64_PCREL28
:
3219 case BFD_RELOC_PPC64_PCREL34
:
3220 case BFD_RELOC_PPC64_PLT_PCREL34
:
3229 if (ENABLE_CHECKING
)
3231 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3232 if (reloc_howto
!= NULL
3233 && (size
!= bfd_get_reloc_size (reloc_howto
)
3234 || pcrel
!= reloc_howto
->pc_relative
))
3236 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3241 *pc_relative
= pcrel
;
3246 /* If we have parsed a call to __tls_get_addr, parse an argument like
3247 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3248 is successfully parsed, *STR is updated past the trailing
3249 parenthesis and trailing white space, and *TLS_FIX contains the
3250 reloc and arg expression. */
3253 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3255 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3256 if (sym_name
[0] == '.')
3259 tls_fix
->reloc
= BFD_RELOC_NONE
;
3260 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3262 char *hold
= input_line_pointer
;
3263 input_line_pointer
= *str
+ 1;
3264 expression (&tls_fix
->exp
);
3265 if (tls_fix
->exp
.X_op
== O_symbol
)
3267 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3268 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3269 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3270 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3271 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3273 input_line_pointer
+= 7;
3275 *str
= input_line_pointer
;
3278 input_line_pointer
= hold
;
3280 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3284 /* This routine is called for each instruction to be assembled. */
3287 md_assemble (char *str
)
3290 const struct powerpc_opcode
*opcode
;
3292 const unsigned char *opindex_ptr
;
3295 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3300 unsigned int insn_length
;
3302 /* Get the opcode. */
3303 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3308 /* Look up the opcode in the hash table. */
3309 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
3310 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3312 const struct powerpc_macro
*macro
;
3314 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
3315 if (macro
== (const struct powerpc_macro
*) NULL
)
3316 as_bad (_("unrecognized opcode: `%s'"), str
);
3318 ppc_macro (s
, macro
);
3320 ppc_clear_labels ();
3324 insn
= opcode
->opcode
;
3327 while (ISSPACE (*str
))
3330 /* PowerPC operands are just expressions. The only real issue is
3331 that a few operand types are optional. If an instruction has
3332 multiple optional operands and one is omitted, then all optional
3333 operands past the first omitted one must also be omitted. */
3334 int num_optional_operands
= 0;
3335 int num_optional_provided
= 0;
3337 /* Gather the operands. */
3341 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3343 const struct powerpc_operand
*operand
;
3349 if (next_opindex
== 0)
3350 operand
= &powerpc_operands
[*opindex_ptr
];
3353 operand
= &powerpc_operands
[next_opindex
];
3358 /* If this is an optional operand, and we are skipping it, just
3359 insert the default value, usually a zero. */
3360 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3361 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3363 if (num_optional_operands
== 0)
3365 const unsigned char *optr
;
3371 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3373 const struct powerpc_operand
*op
;
3374 op
= &powerpc_operands
[*optr
];
3378 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3379 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3381 ++num_optional_operands
;
3383 if (s
!= NULL
&& *s
!= '\0')
3387 /* Look for the start of the next operand. */
3388 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3389 s
= strpbrk (s
, "(,");
3391 s
= strchr (s
, ',');
3397 omitted
= total
- provided
;
3398 num_optional_provided
= num_optional_operands
- omitted
;
3400 if (--num_optional_provided
< 0)
3402 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3403 num_optional_provided
);
3404 if (operand
->insert
)
3406 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3407 if (errmsg
!= (const char *) NULL
)
3408 as_bad ("%s", errmsg
);
3410 else if (operand
->shift
>= 0)
3411 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3413 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3415 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3416 next_opindex
= *opindex_ptr
+ 1;
3421 /* Gather the operand. */
3422 hold
= input_line_pointer
;
3423 input_line_pointer
= str
;
3426 if (*input_line_pointer
== '[')
3428 /* We are expecting something like the second argument here:
3430 * lwz r4,[toc].GS.0.static_int(rtoc)
3431 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3432 * The argument following the `]' must be a symbol name, and the
3433 * register must be the toc register: 'rtoc' or '2'
3435 * The effect is to 0 as the displacement field
3436 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3437 * the appropriate variation) reloc against it based on the symbol.
3438 * The linker will build the toc, and insert the resolved toc offset.
3441 * o The size of the toc entry is currently assumed to be
3442 * 32 bits. This should not be assumed to be a hard coded
3444 * o In an effort to cope with a change from 32 to 64 bits,
3445 * there are also toc entries that are specified to be
3446 * either 32 or 64 bits:
3447 * lwz r4,[toc32].GS.0.static_int(rtoc)
3448 * lwz r4,[toc64].GS.0.static_int(rtoc)
3449 * These demand toc entries of the specified size, and the
3450 * instruction probably requires it.
3454 enum toc_size_qualifier toc_kind
;
3455 bfd_reloc_code_real_type toc_reloc
;
3457 /* Go parse off the [tocXX] part. */
3458 valid_toc
= parse_toc_entry (&toc_kind
);
3462 ignore_rest_of_line ();
3466 /* Now get the symbol following the ']'. */
3472 /* In this case, we may not have seen the symbol yet,
3473 since it is allowed to appear on a .extern or .globl
3474 or just be a label in the .data section. */
3475 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3478 /* 1. The symbol must be defined and either in the toc
3479 section, or a global.
3480 2. The reloc generated must have the TOCDEFN flag set
3481 in upper bit mess of the reloc type.
3482 FIXME: It's a little confusing what the tocv
3483 qualifier can be used for. At the very least, I've
3484 seen three uses, only one of which I'm sure I can
3486 if (ex
.X_op
== O_symbol
)
3488 gas_assert (ex
.X_add_symbol
!= NULL
);
3489 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
3492 as_bad (_("[tocv] symbol is not a toc symbol"));
3496 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3499 /* FIXME: these next two specifically specify 32/64 bit
3500 toc entries. We don't support them today. Is this
3501 the right way to say that? */
3502 toc_reloc
= BFD_RELOC_NONE
;
3503 as_bad (_("unimplemented toc32 expression modifier"));
3506 /* FIXME: see above. */
3507 toc_reloc
= BFD_RELOC_NONE
;
3508 as_bad (_("unimplemented toc64 expression modifier"));
3512 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3518 /* We need to generate a fixup for this expression. */
3519 if (fc
>= MAX_INSN_FIXUPS
)
3520 as_fatal (_("too many fixups"));
3522 fixups
[fc
].reloc
= toc_reloc
;
3523 fixups
[fc
].exp
= ex
;
3524 fixups
[fc
].opindex
= *opindex_ptr
;
3527 /* Ok. We've set up the fixup for the instruction. Now make it
3528 look like the constant 0 was found here. */
3530 ex
.X_op
= O_constant
;
3531 ex
.X_add_number
= 0;
3532 ex
.X_add_symbol
= NULL
;
3533 ex
.X_op_symbol
= NULL
;
3540 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3541 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3542 || !register_name (&ex
))
3544 char save_lex
= lex_type
['%'];
3546 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3547 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3550 lex_type
['%'] |= LEX_BEGIN_NAME
;
3554 lex_type
['%'] = save_lex
;
3558 str
= input_line_pointer
;
3559 input_line_pointer
= hold
;
3561 if (ex
.X_op
== O_illegal
)
3562 as_bad (_("illegal operand"));
3563 else if (ex
.X_op
== O_absent
)
3564 as_bad (_("missing operand"));
3565 else if (ex
.X_op
== O_register
)
3569 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3570 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3571 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3572 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3573 && ex
.X_add_number
!= 0
3574 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3575 as_warn (_("invalid register expression"));
3576 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3577 ppc_cpu
, (char *) NULL
, 0);
3579 else if (ex
.X_op
== O_constant
)
3582 /* Allow @HA, @L, @H on constants. */
3583 bfd_reloc_code_real_type reloc
;
3584 char *orig_str
= str
;
3586 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3593 case BFD_RELOC_LO16
:
3594 ex
.X_add_number
&= 0xffff;
3595 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3596 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3599 case BFD_RELOC_HI16
:
3600 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3602 /* PowerPC64 @h is tested for overflow. */
3603 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3604 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3606 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3608 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3614 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3615 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3616 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3617 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3620 case BFD_RELOC_HI16_S
:
3621 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3623 /* PowerPC64 @ha is tested for overflow. */
3625 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3626 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3628 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3630 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3636 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3637 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3638 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3639 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3642 case BFD_RELOC_PPC64_HIGHER
:
3643 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3644 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3645 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3648 case BFD_RELOC_PPC64_HIGHER_S
:
3649 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3650 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3651 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3654 case BFD_RELOC_PPC64_HIGHEST
:
3655 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3656 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3657 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3660 case BFD_RELOC_PPC64_HIGHEST_S
:
3661 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3662 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3663 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3666 #endif /* OBJ_ELF */
3667 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3668 ppc_cpu
, (char *) NULL
, 0);
3672 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3674 /* Look for a __tls_get_addr arg using the insane old syntax. */
3675 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3676 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3678 fixups
[fc
].opindex
= *opindex_ptr
;
3682 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3684 /* If VLE-mode convert LO/HI/HA relocations. */
3685 if (opcode
->flags
& PPC_OPCODE_VLE
)
3687 uint64_t tmp_insn
= insn
& opcode
->mask
;
3689 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3690 || tmp_insn
== E_AND2I_DOT_INSN
3691 || tmp_insn
== E_OR2IS_INSN
3692 || tmp_insn
== E_LI_INSN
3693 || tmp_insn
== E_LIS_INSN
3694 || tmp_insn
== E_AND2IS_DOT_INSN
);
3697 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3698 || tmp_insn
== E_ADD2IS_INSN
3699 || tmp_insn
== E_CMP16I_INSN
3700 || tmp_insn
== E_MULL2I_INSN
3701 || tmp_insn
== E_CMPL16I_INSN
3702 || tmp_insn
== E_CMPH16I_INSN
3703 || tmp_insn
== E_CMPHL16I_INSN
);
3710 case BFD_RELOC_PPC_EMB_SDA21
:
3711 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3714 case BFD_RELOC_LO16
:
3716 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3717 else if (use_a_reloc
)
3718 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3721 case BFD_RELOC_HI16
:
3723 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3724 else if (use_a_reloc
)
3725 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3728 case BFD_RELOC_HI16_S
:
3730 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3731 else if (use_a_reloc
)
3732 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3735 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3737 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3740 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3742 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3745 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3747 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3752 /* TLS and other tweaks. */
3758 case BFD_RELOC_PPC_TLS
:
3759 case BFD_RELOC_PPC64_TLS_PCREL
:
3760 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3761 as_bad (_("@tls may not be used with \"%s\" operands"),
3763 else if (operand
->shift
!= 11)
3764 as_bad (_("@tls may only be used in last operand"));
3766 insn
= ppc_insert_operand (insn
, operand
,
3768 ppc_cpu
, (char *) NULL
, 0);
3771 /* We'll only use the 32 (or 64) bit form of these relocations
3772 in constants. Instructions get the 16 or 34 bit form. */
3773 case BFD_RELOC_PPC_DTPREL
:
3774 if (operand
->bitm
== 0x3ffffffffULL
)
3775 reloc
= BFD_RELOC_PPC64_DTPREL34
;
3777 reloc
= BFD_RELOC_PPC_DTPREL16
;
3780 case BFD_RELOC_PPC_TPREL
:
3781 if (operand
->bitm
== 0x3ffffffffULL
)
3782 reloc
= BFD_RELOC_PPC64_TPREL34
;
3784 reloc
= BFD_RELOC_PPC_TPREL16
;
3787 case BFD_RELOC_PPC64_PCREL34
:
3788 if (operand
->bitm
== 0xfffffffULL
)
3790 reloc
= BFD_RELOC_PPC64_PCREL28
;
3794 case BFD_RELOC_PPC64_GOT_PCREL34
:
3795 case BFD_RELOC_PPC64_PLT_PCREL34
:
3796 case BFD_RELOC_PPC64_GOT_TLSGD34
:
3797 case BFD_RELOC_PPC64_GOT_TLSLD34
:
3798 case BFD_RELOC_PPC64_GOT_TPREL34
:
3799 case BFD_RELOC_PPC64_GOT_DTPREL34
:
3800 if (operand
->bitm
!= 0x3ffffffffULL
3801 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3802 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3805 case BFD_RELOC_LO16
:
3806 if (operand
->bitm
== 0x3ffffffffULL
3807 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3808 reloc
= BFD_RELOC_PPC64_D34_LO
;
3809 else if ((operand
->bitm
| 0xf) != 0xffff
3810 || operand
->shift
!= 0
3811 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3812 as_warn (_("%s unsupported on this instruction"), "@l");
3815 case BFD_RELOC_HI16
:
3816 if (operand
->bitm
== 0x3ffffffffULL
3817 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3818 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3819 else if (operand
->bitm
!= 0xffff
3820 || operand
->shift
!= 0
3821 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3822 as_warn (_("%s unsupported on this instruction"), "@h");
3825 case BFD_RELOC_HI16_S
:
3826 if (operand
->bitm
== 0x3ffffffffULL
3827 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3828 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3829 else if (operand
->bitm
== 0xffff
3830 && operand
->shift
== (int) PPC_OPSHIFT_INV
3831 && opcode
->opcode
== (19 << 26) + (2 << 1))
3833 reloc
= BFD_RELOC_PPC_16DX_HA
;
3834 else if (operand
->bitm
!= 0xffff
3835 || operand
->shift
!= 0
3836 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3837 as_warn (_("%s unsupported on this instruction"), "@ha");
3840 #endif /* OBJ_ELF */
3842 if (reloc
!= BFD_RELOC_NONE
)
3844 /* Determine a BFD reloc value based on the operand information.
3845 We are only prepared to turn a few of the operands into
3847 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3848 | PPC_OPERAND_ABSOLUTE
)) != 0
3849 && operand
->bitm
== 0x3fffffc
3850 && operand
->shift
== 0)
3851 reloc
= BFD_RELOC_PPC_B26
;
3852 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3853 | PPC_OPERAND_ABSOLUTE
)) != 0
3854 && operand
->bitm
== 0xfffc
3855 && operand
->shift
== 0)
3856 reloc
= BFD_RELOC_PPC_B16
;
3857 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3858 && operand
->bitm
== 0x1fe
3859 && operand
->shift
== -1)
3860 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3861 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3862 && operand
->bitm
== 0xfffe
3863 && operand
->shift
== 0)
3864 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3865 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3866 && operand
->bitm
== 0x1fffffe
3867 && operand
->shift
== 0)
3868 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3869 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3870 && (operand
->bitm
& 0xfff0) == 0xfff0
3871 && operand
->shift
== 0)
3873 reloc
= BFD_RELOC_16
;
3874 #if defined OBJ_XCOFF || defined OBJ_ELF
3875 /* Note: the symbol may be not yet defined. */
3876 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3877 && ppc_is_toc_sym (ex
.X_add_symbol
))
3879 reloc
= BFD_RELOC_PPC_TOC16
;
3881 as_warn (_("assuming %s on symbol"),
3882 ppc_obj64
? "@toc" : "@xgot");
3887 else if (operand
->bitm
== 0x3ffffffffULL
)
3888 reloc
= BFD_RELOC_PPC64_D34
;
3889 else if (operand
->bitm
== 0xfffffffULL
)
3890 reloc
= BFD_RELOC_PPC64_D28
;
3892 /* For the absolute forms of branches, convert the PC
3893 relative form back into the absolute. */
3894 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3898 case BFD_RELOC_PPC_B26
:
3899 reloc
= BFD_RELOC_PPC_BA26
;
3901 case BFD_RELOC_PPC_B16
:
3902 reloc
= BFD_RELOC_PPC_BA16
;
3905 case BFD_RELOC_PPC_B16_BRTAKEN
:
3906 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3908 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3909 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3920 case BFD_RELOC_PPC_TOC16
:
3921 toc_reloc_types
|= has_small_toc_reloc
;
3923 case BFD_RELOC_PPC64_TOC16_LO
:
3924 case BFD_RELOC_PPC64_TOC16_HI
:
3925 case BFD_RELOC_PPC64_TOC16_HA
:
3926 toc_reloc_types
|= has_large_toc_reloc
;
3933 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3938 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3941 case BFD_RELOC_LO16
:
3942 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3945 case BFD_RELOC_16_GOTOFF
:
3946 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3949 case BFD_RELOC_LO16_GOTOFF
:
3950 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3953 case BFD_RELOC_LO16_PLTOFF
:
3954 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3957 case BFD_RELOC_16_BASEREL
:
3958 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3961 case BFD_RELOC_LO16_BASEREL
:
3962 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3965 case BFD_RELOC_PPC_TOC16
:
3966 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3969 case BFD_RELOC_PPC64_TOC16_LO
:
3970 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3973 case BFD_RELOC_PPC64_PLTGOT16
:
3974 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3977 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3978 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3981 case BFD_RELOC_PPC_DTPREL16
:
3982 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3985 case BFD_RELOC_PPC_DTPREL16_LO
:
3986 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3989 case BFD_RELOC_PPC_TPREL16
:
3990 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3993 case BFD_RELOC_PPC_TPREL16_LO
:
3994 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3997 case BFD_RELOC_PPC_GOT_DTPREL16
:
3998 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3999 case BFD_RELOC_PPC_GOT_TPREL16
:
4000 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
4004 as_bad (_("unsupported relocation for DS offset field"));
4009 /* Look for a __tls_get_addr arg after any __tls_get_addr
4010 modifiers like @plt. This fixup must be emitted before
4011 the usual call fixup. */
4012 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
4013 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
4015 fixups
[fc
].opindex
= *opindex_ptr
;
4020 /* We need to generate a fixup for this expression. */
4021 if (fc
>= MAX_INSN_FIXUPS
)
4022 as_fatal (_("too many fixups"));
4023 fixups
[fc
].exp
= ex
;
4024 fixups
[fc
].opindex
= *opindex_ptr
;
4025 fixups
[fc
].reloc
= reloc
;
4033 /* If expecting more operands, then we want to see "),". */
4034 if (*str
== endc
&& opindex_ptr
[1] != 0)
4038 while (ISSPACE (*str
));
4042 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
4047 /* The call to expression should have advanced str past any
4055 else if (*str
!= '\0')
4057 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
4060 else if (endc
== ')')
4062 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
4067 while (ISSPACE (*str
))
4071 as_bad (_("junk at end of line: `%s'"), str
);
4074 /* Do we need/want an APUinfo section? */
4075 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
4078 /* These are all version "1". */
4079 if (opcode
->flags
& PPC_OPCODE_SPE
)
4080 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
4081 if (opcode
->flags
& PPC_OPCODE_ISEL
)
4082 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
4083 if (opcode
->flags
& PPC_OPCODE_EFS
)
4084 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
4085 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
4086 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
4087 if (opcode
->flags
& PPC_OPCODE_PMR
)
4088 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
4089 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
4090 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
4091 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
4092 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
4093 /* Only set the VLE flag if the instruction has been pulled via
4094 the VLE instruction set. This way the flag is guaranteed to
4095 be set for VLE-only instructions or for VLE-only processors,
4096 however it'll remain clear for dual-mode instructions on
4097 dual-mode and, more importantly, standard-mode processors. */
4098 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4100 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4101 if (elf_section_data (now_seg
) != NULL
)
4102 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4107 /* Write out the instruction. */
4110 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4111 /* All instructions can start on a 2 byte boundary for VLE. */
4114 if (frag_now
->insn_addr
!= addr_mask
)
4116 /* Don't emit instructions to a frag started for data, or for a
4117 CPU differing in VLE mode. Data is allowed to be misaligned,
4118 and it's possible to start a new frag in the middle of
4120 frag_wane (frag_now
);
4124 /* Check that insns within the frag are aligned. ppc_frag_check
4125 will ensure that the frag start address is aligned. */
4126 if ((frag_now_fix () & addr_mask
) != 0)
4127 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4129 /* Differentiate between two, four, and eight byte insns. */
4131 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4133 else if ((opcode
->flags
& PPC_OPCODE_POWERXX
) != 0
4134 && PPC_PREFIX_P (insn
))
4136 struct insn_label_list
*l
;
4140 /* 8-byte prefix instructions are not allowed to cross 64-byte
4142 frag_align_code (6, 4);
4143 record_alignment (now_seg
, 6);
4145 /* Update "dot" in any expressions used by this instruction, and
4146 a label attached to the instruction. By "attached" we mean
4147 on the same source line as the instruction and without any
4148 intervening semicolons. */
4149 dot_value
= frag_now_fix ();
4150 dot_frag
= frag_now
;
4151 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4153 symbol_set_frag (l
->label
, dot_frag
);
4154 S_SET_VALUE (l
->label
, dot_value
);
4158 ppc_clear_labels ();
4160 f
= frag_more (insn_length
);
4161 frag_now
->insn_addr
= addr_mask
;
4163 /* The prefix part of an 8-byte instruction always occupies the lower
4164 addressed word in a doubleword, regardless of endianness. */
4165 if (!target_big_endian
&& insn_length
== 8)
4167 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4168 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4171 md_number_to_chars (f
, insn
, insn_length
);
4175 last_subseg
= now_subseg
;
4178 dwarf2_emit_insn (insn_length
);
4181 /* Create any fixups. */
4182 for (i
= 0; i
< fc
; i
++)
4185 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4188 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4189 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4191 fixP
= fix_new_exp (frag_now
,
4192 f
- frag_now
->fr_literal
+ offset
,
4200 const struct powerpc_operand
*operand
;
4202 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4203 fixP
= fix_new_exp (frag_now
,
4204 f
- frag_now
->fr_literal
,
4207 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4210 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4214 /* Handle a macro. Gather all the operands, transform them as
4215 described by the macro, and call md_assemble recursively. All the
4216 operands are separated by commas; we don't accept parentheses
4217 around operands here. */
4220 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4231 /* Gather the users operands into the operands array. */
4236 if (count
>= sizeof operands
/ sizeof operands
[0])
4238 operands
[count
++] = s
;
4239 s
= strchr (s
, ',');
4240 if (s
== (char *) NULL
)
4245 if (count
!= macro
->operands
)
4247 as_bad (_("wrong number of operands"));
4251 /* Work out how large the string must be (the size is unbounded
4252 because it includes user input). */
4254 format
= macro
->format
;
4255 while (*format
!= '\0')
4264 arg
= strtol (format
+ 1, &send
, 10);
4265 know (send
!= format
&& arg
< count
);
4266 len
+= strlen (operands
[arg
]);
4271 /* Put the string together. */
4272 complete
= s
= XNEWVEC (char, len
+ 1);
4273 format
= macro
->format
;
4274 while (*format
!= '\0')
4280 arg
= strtol (format
+ 1, &send
, 10);
4281 strcpy (s
, operands
[arg
]);
4288 /* Assemble the constructed instruction. */
4289 md_assemble (complete
);
4294 /* For ELF, add support for SHT_ORDERED. */
4297 ppc_section_type (char *str
, size_t len
)
4299 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
4306 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4308 if (type
== SHT_ORDERED
)
4309 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4315 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4320 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4323 #endif /* OBJ_ELF */
4326 /* Pseudo-op handling. */
4328 /* The .byte pseudo-op. This is similar to the normal .byte
4329 pseudo-op, but it can also take a single ASCII string. */
4332 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4336 if (*input_line_pointer
!= '\"')
4342 /* Gather characters. A real double quote is doubled. Unusual
4343 characters are not permitted. */
4344 ++input_line_pointer
;
4349 c
= *input_line_pointer
++;
4353 if (*input_line_pointer
!= '\"')
4355 ++input_line_pointer
;
4358 FRAG_APPEND_1_CHAR (c
);
4362 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4363 as_warn (_("data in executable section"));
4364 demand_empty_rest_of_line ();
4369 /* XCOFF specific pseudo-op handling. */
4371 /* This is set if we are creating a .stabx symbol, since we don't want
4372 to handle symbol suffixes for such symbols. */
4373 static bfd_boolean ppc_stab_symbol
;
4375 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4376 symbols in the .bss segment as though they were local common
4377 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4378 aligns .comm and .lcomm to 4 bytes. */
4381 ppc_comm (int lcomm
)
4383 asection
*current_seg
= now_seg
;
4384 subsegT current_subseg
= now_subseg
;
4390 symbolS
*lcomm_sym
= NULL
;
4394 endc
= get_symbol_name (&name
);
4395 end_name
= input_line_pointer
;
4396 (void) restore_line_pointer (endc
);
4398 if (*input_line_pointer
!= ',')
4400 as_bad (_("missing size"));
4401 ignore_rest_of_line ();
4404 ++input_line_pointer
;
4406 size
= get_absolute_expression ();
4409 as_bad (_("negative size"));
4410 ignore_rest_of_line ();
4416 /* The third argument to .comm is the alignment. */
4417 if (*input_line_pointer
!= ',')
4421 ++input_line_pointer
;
4422 align
= get_absolute_expression ();
4425 as_warn (_("ignoring bad alignment"));
4435 /* The third argument to .lcomm appears to be the real local
4436 common symbol to create. References to the symbol named in
4437 the first argument are turned into references to the third
4439 if (*input_line_pointer
!= ',')
4441 as_bad (_("missing real symbol name"));
4442 ignore_rest_of_line ();
4445 ++input_line_pointer
;
4447 lcomm_endc
= get_symbol_name (&lcomm_name
);
4449 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4451 (void) restore_line_pointer (lcomm_endc
);
4453 /* The fourth argument to .lcomm is the alignment. */
4454 if (*input_line_pointer
!= ',')
4463 ++input_line_pointer
;
4464 align
= get_absolute_expression ();
4467 as_warn (_("ignoring bad alignment"));
4474 sym
= symbol_find_or_make (name
);
4477 if (S_IS_DEFINED (sym
)
4478 || S_GET_VALUE (sym
) != 0)
4480 as_bad (_("attempt to redefine symbol"));
4481 ignore_rest_of_line ();
4485 record_alignment (bss_section
, align
);
4488 || ! S_IS_DEFINED (lcomm_sym
))
4497 S_SET_EXTERNAL (sym
);
4501 symbol_get_tc (lcomm_sym
)->output
= 1;
4502 def_sym
= lcomm_sym
;
4506 subseg_set (bss_section
, 1);
4507 frag_align (align
, 0, 0);
4509 symbol_set_frag (def_sym
, frag_now
);
4510 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4511 def_size
, (char *) NULL
);
4513 S_SET_SEGMENT (def_sym
, bss_section
);
4514 symbol_get_tc (def_sym
)->align
= align
;
4518 /* Align the size of lcomm_sym. */
4519 symbol_get_frag (lcomm_sym
)->fr_offset
=
4520 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4521 &~ ((1 << align
) - 1));
4522 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4523 symbol_get_tc (lcomm_sym
)->align
= align
;
4528 /* Make sym an offset from lcomm_sym. */
4529 S_SET_SEGMENT (sym
, bss_section
);
4530 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4531 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4532 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4535 subseg_set (current_seg
, current_subseg
);
4537 demand_empty_rest_of_line ();
4540 /* The .csect pseudo-op. This switches us into a different
4541 subsegment. The first argument is a symbol whose value is the
4542 start of the .csect. In COFF, csect symbols get special aux
4543 entries defined by the x_csect field of union internal_auxent. The
4544 optional second argument is the alignment (the default is 2). */
4547 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4554 endc
= get_symbol_name (&name
);
4556 sym
= symbol_find_or_make (name
);
4558 (void) restore_line_pointer (endc
);
4560 if (S_GET_NAME (sym
)[0] == '\0')
4562 /* An unnamed csect is assumed to be [PR]. */
4563 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4567 if (*input_line_pointer
== ',')
4569 ++input_line_pointer
;
4570 align
= get_absolute_expression ();
4573 ppc_change_csect (sym
, align
);
4575 demand_empty_rest_of_line ();
4578 /* Change to a different csect. */
4581 ppc_change_csect (symbolS
*sym
, offsetT align
)
4583 if (S_IS_DEFINED (sym
))
4584 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4594 /* This is a new csect. We need to look at the symbol class to
4595 figure out whether it should go in the text section or the
4599 switch (symbol_get_tc (sym
)->symbol_class
)
4609 S_SET_SEGMENT (sym
, text_section
);
4610 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4611 ++ppc_text_subsegment
;
4612 list_ptr
= &ppc_text_csects
;
4622 if (ppc_toc_csect
!= NULL
4623 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4624 == ppc_data_subsegment
))
4626 S_SET_SEGMENT (sym
, data_section
);
4627 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4628 ++ppc_data_subsegment
;
4629 list_ptr
= &ppc_data_csects
;
4635 /* We set the obstack chunk size to a small value before
4636 changing subsegments, so that we don't use a lot of memory
4637 space for what may be a small section. */
4638 hold_chunksize
= chunksize
;
4641 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4642 symbol_get_tc (sym
)->subseg
);
4644 chunksize
= hold_chunksize
;
4647 ppc_after_toc_frag
= frag_now
;
4649 record_alignment (sec
, align
);
4651 frag_align_code (align
, 0);
4653 frag_align (align
, 0, 0);
4655 symbol_set_frag (sym
, frag_now
);
4656 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4658 symbol_get_tc (sym
)->align
= align
;
4659 symbol_get_tc (sym
)->output
= 1;
4660 symbol_get_tc (sym
)->within
= sym
;
4662 for (list
= *list_ptr
;
4663 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4664 list
= symbol_get_tc (list
)->next
)
4666 symbol_get_tc (list
)->next
= sym
;
4668 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4669 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4673 ppc_current_csect
= sym
;
4677 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4681 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4683 sec
= subseg_new (dw
->name
, subseg
);
4684 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4685 if (oldflags
== SEC_NO_FLAGS
)
4687 /* Just created section. */
4688 gas_assert (dw_sections
[idx
].sect
== NULL
);
4690 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4691 bfd_set_section_alignment (stdoutput
, sec
, 0);
4692 dw_sections
[idx
].sect
= sec
;
4695 /* Not anymore in a csect. */
4696 ppc_current_csect
= NULL
;
4699 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4700 .dwsect flag [, opt-label ]
4704 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4708 const struct xcoff_dwsect_name
*dw
;
4709 struct dw_subsection
*subseg
;
4710 struct dw_section
*dws
;
4714 flag
= get_absolute_expression ();
4716 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4717 if (xcoff_dwsect_names
[i
].flag
== flag
)
4719 dw
= &xcoff_dwsect_names
[i
];
4723 /* Parse opt-label. */
4724 if (*input_line_pointer
== ',')
4729 ++input_line_pointer
;
4731 c
= get_symbol_name (&label
);
4732 opt_label
= symbol_find_or_make (label
);
4733 (void) restore_line_pointer (c
);
4738 demand_empty_rest_of_line ();
4740 /* Return now in case of unknown subsection. */
4743 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4748 /* Find the subsection. */
4749 dws
= &dw_sections
[i
];
4751 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4753 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4754 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4756 as_bad (_("label %s was not defined in this dwarf section"),
4757 S_GET_NAME (opt_label
));
4758 subseg
= dws
->anon_subseg
;
4762 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4767 /* Switch to the subsection. */
4768 ppc_change_debug_section (i
, subseg
->subseg
);
4772 /* Create a new dw subsection. */
4773 subseg
= XNEW (struct dw_subsection
);
4775 if (opt_label
== NULL
)
4777 /* The anonymous one. */
4779 subseg
->link
= NULL
;
4780 dws
->anon_subseg
= subseg
;
4785 if (dws
->list_subseg
!= NULL
)
4786 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4790 subseg
->link
= dws
->list_subseg
;
4791 dws
->list_subseg
= subseg
;
4792 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4795 ppc_change_debug_section (i
, subseg
->subseg
);
4799 /* Add the length field. */
4800 expressionS
*exp
= &subseg
->end_exp
;
4803 if (opt_label
!= NULL
)
4804 symbol_set_value_now (opt_label
);
4806 /* Add the length field. Note that according to the AIX assembler
4807 manual, the size of the length field is 4 for powerpc32 but
4808 12 for powerpc64. */
4811 /* Write the 64bit marker. */
4812 md_number_to_chars (frag_more (4), -1, 4);
4815 exp
->X_op
= O_subtract
;
4816 exp
->X_op_symbol
= symbol_temp_new_now ();
4817 exp
->X_add_symbol
= symbol_temp_make ();
4819 sz
= ppc_obj64
? 8 : 4;
4820 exp
->X_add_number
= -sz
;
4821 emit_expr (exp
, sz
);
4826 /* This function handles the .text and .data pseudo-ops. These
4827 pseudo-ops aren't really used by XCOFF; we implement them for the
4828 convenience of people who aren't used to XCOFF. */
4831 ppc_section (int type
)
4838 else if (type
== 'd')
4843 sym
= symbol_find_or_make (name
);
4845 ppc_change_csect (sym
, 2);
4847 demand_empty_rest_of_line ();
4850 /* This function handles the .section pseudo-op. This is mostly to
4851 give an error, since XCOFF only supports .text, .data and .bss, but
4852 we do permit the user to name the text or data section. */
4855 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4858 const char *real_name
;
4862 c
= get_symbol_name (&user_name
);
4864 if (strcmp (user_name
, ".text") == 0)
4865 real_name
= ".text[PR]";
4866 else if (strcmp (user_name
, ".data") == 0)
4867 real_name
= ".data[RW]";
4870 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4871 (void) restore_line_pointer (c
);
4872 ignore_rest_of_line ();
4876 (void) restore_line_pointer (c
);
4878 sym
= symbol_find_or_make (real_name
);
4880 ppc_change_csect (sym
, 2);
4882 demand_empty_rest_of_line ();
4885 /* The .extern pseudo-op. We create an undefined symbol. */
4888 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4893 endc
= get_symbol_name (&name
);
4895 (void) symbol_find_or_make (name
);
4897 (void) restore_line_pointer (endc
);
4899 demand_empty_rest_of_line ();
4902 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4905 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4911 endc
= get_symbol_name (&name
);
4913 sym
= symbol_find_or_make (name
);
4915 (void) restore_line_pointer (endc
);
4917 symbol_get_tc (sym
)->output
= 1;
4919 demand_empty_rest_of_line ();
4922 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4923 relocations at the beginning of the current csect.
4925 (In principle, there's no reason why the relocations _have_ to be at
4926 the beginning. Anywhere in the csect would do. However, inserting
4927 at the beginning is what the native assembler does, and it helps to
4928 deal with cases where the .ref statements follow the section contents.)
4930 ??? .refs don't work for empty .csects. However, the native assembler
4931 doesn't report an error in this case, and neither yet do we. */
4934 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4939 if (ppc_current_csect
== NULL
)
4941 as_bad (_(".ref outside .csect"));
4942 ignore_rest_of_line ();
4948 c
= get_symbol_name (&name
);
4950 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4951 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4953 *input_line_pointer
= c
;
4954 SKIP_WHITESPACE_AFTER_NAME ();
4955 c
= *input_line_pointer
;
4958 input_line_pointer
++;
4960 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4962 as_bad (_("missing symbol name"));
4963 ignore_rest_of_line ();
4970 demand_empty_rest_of_line ();
4973 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4974 although I don't know why it bothers. */
4977 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4984 endc
= get_symbol_name (&name
);
4986 sym
= symbol_find_or_make (name
);
4988 (void) restore_line_pointer (endc
);
4990 if (*input_line_pointer
!= ',')
4992 as_bad (_("missing rename string"));
4993 ignore_rest_of_line ();
4996 ++input_line_pointer
;
4998 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
5000 demand_empty_rest_of_line ();
5003 /* The .stabx pseudo-op. This is similar to a normal .stabs
5004 pseudo-op, but slightly different. A sample is
5005 .stabx "main:F-1",.main,142,0
5006 The first argument is the symbol name to create. The second is the
5007 value, and the third is the storage class. The fourth seems to be
5008 always zero, and I am assuming it is the type. */
5011 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
5018 name
= demand_copy_C_string (&len
);
5020 if (*input_line_pointer
!= ',')
5022 as_bad (_("missing value"));
5025 ++input_line_pointer
;
5027 ppc_stab_symbol
= TRUE
;
5028 sym
= symbol_make (name
);
5029 ppc_stab_symbol
= FALSE
;
5031 symbol_get_tc (sym
)->real_name
= name
;
5033 (void) expression (&exp
);
5040 as_bad (_("illegal .stabx expression; zero assumed"));
5041 exp
.X_add_number
= 0;
5044 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
5045 symbol_set_frag (sym
, &zero_address_frag
);
5049 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
5050 symbol_set_value_expression (sym
, &exp
);
5054 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
5055 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
5060 /* The value is some complex expression. This will probably
5061 fail at some later point, but this is probably the right
5062 thing to do here. */
5063 symbol_set_value_expression (sym
, &exp
);
5067 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5068 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5070 if (*input_line_pointer
!= ',')
5072 as_bad (_("missing class"));
5075 ++input_line_pointer
;
5077 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
5079 if (*input_line_pointer
!= ',')
5081 as_bad (_("missing type"));
5084 ++input_line_pointer
;
5086 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
5088 symbol_get_tc (sym
)->output
= 1;
5090 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
5095 .stabx "z",arrays_,133,0
5098 .comm arrays_,13768,3
5100 resolve_symbol_value will copy the exp's "within" into sym's when the
5101 offset is 0. Since this seems to be corner case problem,
5102 only do the correction for storage class C_STSYM. A better solution
5103 would be to have the tc field updated in ppc_symbol_new_hook. */
5105 if (exp
.X_op
== O_symbol
)
5107 if (ppc_current_block
== NULL
)
5108 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5110 symbol_get_tc (sym
)->within
= ppc_current_block
;
5111 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
5115 if (exp
.X_op
!= O_symbol
5116 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5117 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5118 ppc_frob_label (sym
);
5121 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5122 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5123 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5124 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5127 demand_empty_rest_of_line ();
5130 /* The .function pseudo-op. This takes several arguments. The first
5131 argument seems to be the external name of the symbol. The second
5132 argument seems to be the label for the start of the function. gcc
5133 uses the same name for both. I have no idea what the third and
5134 fourth arguments are meant to be. The optional fifth argument is
5135 an expression for the size of the function. In COFF this symbol
5136 gets an aux entry like that used for a csect. */
5139 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5147 endc
= get_symbol_name (&name
);
5149 /* Ignore any [PR] suffix. */
5150 name
= ppc_canonicalize_symbol_name (name
);
5151 s
= strchr (name
, '[');
5152 if (s
!= (char *) NULL
5153 && strcmp (s
+ 1, "PR]") == 0)
5156 ext_sym
= symbol_find_or_make (name
);
5158 (void) restore_line_pointer (endc
);
5160 if (*input_line_pointer
!= ',')
5162 as_bad (_("missing symbol name"));
5163 ignore_rest_of_line ();
5166 ++input_line_pointer
;
5168 endc
= get_symbol_name (&name
);
5170 lab_sym
= symbol_find_or_make (name
);
5172 (void) restore_line_pointer (endc
);
5174 if (ext_sym
!= lab_sym
)
5178 exp
.X_op
= O_symbol
;
5179 exp
.X_add_symbol
= lab_sym
;
5180 exp
.X_op_symbol
= NULL
;
5181 exp
.X_add_number
= 0;
5183 symbol_set_value_expression (ext_sym
, &exp
);
5186 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5187 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5188 symbol_get_tc (ext_sym
)->output
= 1;
5190 if (*input_line_pointer
== ',')
5194 /* Ignore the third argument. */
5195 ++input_line_pointer
;
5197 if (*input_line_pointer
== ',')
5199 /* Ignore the fourth argument. */
5200 ++input_line_pointer
;
5202 if (*input_line_pointer
== ',')
5204 /* The fifth argument is the function size. */
5205 ++input_line_pointer
;
5206 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
5207 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
5208 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5213 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5214 SF_SET_FUNCTION (ext_sym
);
5215 SF_SET_PROCESS (ext_sym
);
5216 coff_add_linesym (ext_sym
);
5218 demand_empty_rest_of_line ();
5221 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5222 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5223 with the correct line number */
5225 static symbolS
*saved_bi_sym
= 0;
5228 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5232 sym
= symbol_make (".bf");
5233 S_SET_SEGMENT (sym
, text_section
);
5234 symbol_set_frag (sym
, frag_now
);
5235 S_SET_VALUE (sym
, frag_now_fix ());
5236 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5238 coff_line_base
= get_absolute_expression ();
5240 S_SET_NUMBER_AUXILIARY (sym
, 1);
5241 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5243 /* Line number for bi. */
5246 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5251 symbol_get_tc (sym
)->output
= 1;
5253 ppc_frob_label (sym
);
5255 demand_empty_rest_of_line ();
5258 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5259 ".ef", except that the line number is absolute, not relative to the
5260 most recent ".bf" symbol. */
5263 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5267 sym
= symbol_make (".ef");
5268 S_SET_SEGMENT (sym
, text_section
);
5269 symbol_set_frag (sym
, frag_now
);
5270 S_SET_VALUE (sym
, frag_now_fix ());
5271 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5272 S_SET_NUMBER_AUXILIARY (sym
, 1);
5273 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5274 symbol_get_tc (sym
)->output
= 1;
5276 ppc_frob_label (sym
);
5278 demand_empty_rest_of_line ();
5281 /* The .bi and .ei pseudo-ops. These take a string argument and
5282 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5283 the symbol list. The value of .bi will be know when the next .bf
5289 static symbolS
*last_biei
;
5296 name
= demand_copy_C_string (&len
);
5298 /* The value of these symbols is actually file offset. Here we set
5299 the value to the index into the line number entries. In
5300 ppc_frob_symbols we set the fix_line field, which will cause BFD
5301 to do the right thing. */
5303 sym
= symbol_make (name
);
5304 /* obj-coff.c currently only handles line numbers correctly in the
5306 S_SET_SEGMENT (sym
, text_section
);
5307 S_SET_VALUE (sym
, coff_n_line_nos
);
5308 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5310 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5311 symbol_get_tc (sym
)->output
= 1;
5319 for (look
= last_biei
? last_biei
: symbol_rootP
;
5320 (look
!= (symbolS
*) NULL
5321 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5322 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5323 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5324 look
= symbol_next (look
))
5326 if (look
!= (symbolS
*) NULL
)
5328 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5329 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5333 demand_empty_rest_of_line ();
5336 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5337 There is one argument, which is a csect symbol. The value of the
5338 .bs symbol is the index of this csect symbol. */
5341 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5348 if (ppc_current_block
!= NULL
)
5349 as_bad (_("nested .bs blocks"));
5351 endc
= get_symbol_name (&name
);
5353 csect
= symbol_find_or_make (name
);
5355 (void) restore_line_pointer (endc
);
5357 sym
= symbol_make (".bs");
5358 S_SET_SEGMENT (sym
, now_seg
);
5359 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5360 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5361 symbol_get_tc (sym
)->output
= 1;
5363 symbol_get_tc (sym
)->within
= csect
;
5365 ppc_frob_label (sym
);
5367 ppc_current_block
= sym
;
5369 demand_empty_rest_of_line ();
5372 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5375 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5379 if (ppc_current_block
== NULL
)
5380 as_bad (_(".es without preceding .bs"));
5382 sym
= symbol_make (".es");
5383 S_SET_SEGMENT (sym
, now_seg
);
5384 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5385 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5386 symbol_get_tc (sym
)->output
= 1;
5388 ppc_frob_label (sym
);
5390 ppc_current_block
= NULL
;
5392 demand_empty_rest_of_line ();
5395 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5399 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5403 sym
= symbol_make (".bb");
5404 S_SET_SEGMENT (sym
, text_section
);
5405 symbol_set_frag (sym
, frag_now
);
5406 S_SET_VALUE (sym
, frag_now_fix ());
5407 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5409 S_SET_NUMBER_AUXILIARY (sym
, 1);
5410 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5412 symbol_get_tc (sym
)->output
= 1;
5414 SF_SET_PROCESS (sym
);
5416 ppc_frob_label (sym
);
5418 demand_empty_rest_of_line ();
5421 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5425 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5429 sym
= symbol_make (".eb");
5430 S_SET_SEGMENT (sym
, text_section
);
5431 symbol_set_frag (sym
, frag_now
);
5432 S_SET_VALUE (sym
, frag_now_fix ());
5433 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5434 S_SET_NUMBER_AUXILIARY (sym
, 1);
5435 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5436 symbol_get_tc (sym
)->output
= 1;
5438 SF_SET_PROCESS (sym
);
5440 ppc_frob_label (sym
);
5442 demand_empty_rest_of_line ();
5445 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5449 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5455 name
= demand_copy_C_string (&len
);
5456 sym
= symbol_make (name
);
5457 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5458 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5459 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5460 S_SET_VALUE (sym
, 0);
5461 symbol_get_tc (sym
)->output
= 1;
5463 ppc_frob_label (sym
);
5465 demand_empty_rest_of_line ();
5468 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5471 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5475 sym
= symbol_make (".ec");
5476 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5477 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5478 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5479 S_SET_VALUE (sym
, 0);
5480 symbol_get_tc (sym
)->output
= 1;
5482 ppc_frob_label (sym
);
5484 demand_empty_rest_of_line ();
5487 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5490 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5492 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5493 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5500 subseg
= ppc_data_subsegment
;
5501 ++ppc_data_subsegment
;
5503 subseg_new (segment_name (data_section
), subseg
);
5504 ppc_toc_frag
= frag_now
;
5506 sym
= symbol_find_or_make ("TOC[TC0]");
5507 symbol_set_frag (sym
, frag_now
);
5508 S_SET_SEGMENT (sym
, data_section
);
5509 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5510 symbol_get_tc (sym
)->subseg
= subseg
;
5511 symbol_get_tc (sym
)->output
= 1;
5512 symbol_get_tc (sym
)->within
= sym
;
5514 ppc_toc_csect
= sym
;
5516 for (list
= ppc_data_csects
;
5517 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5518 list
= symbol_get_tc (list
)->next
)
5520 symbol_get_tc (list
)->next
= sym
;
5522 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5523 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5527 ppc_current_csect
= ppc_toc_csect
;
5529 demand_empty_rest_of_line ();
5532 /* The AIX assembler automatically aligns the operands of a .long or
5533 .short pseudo-op, and we want to be compatible. */
5536 ppc_xcoff_cons (int log_size
)
5538 frag_align (log_size
, 0, 0);
5539 record_alignment (now_seg
, log_size
);
5540 cons (1 << log_size
);
5544 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5549 (void) expression (&exp
);
5551 if (exp
.X_op
!= O_constant
)
5553 as_bad (_("non-constant byte count"));
5557 byte_count
= exp
.X_add_number
;
5559 if (*input_line_pointer
!= ',')
5561 as_bad (_("missing value"));
5565 ++input_line_pointer
;
5570 ppc_xcoff_end (void)
5574 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5576 struct dw_section
*dws
= &dw_sections
[i
];
5577 struct dw_subsection
*dwss
;
5579 if (dws
->anon_subseg
)
5581 dwss
= dws
->anon_subseg
;
5582 dwss
->link
= dws
->list_subseg
;
5585 dwss
= dws
->list_subseg
;
5587 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5588 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5590 subseg_set (dws
->sect
, dwss
->subseg
);
5591 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5597 #endif /* OBJ_XCOFF */
5598 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5600 /* The .tc pseudo-op. This is used when generating either XCOFF or
5601 ELF. This takes two or more arguments.
5603 When generating XCOFF output, the first argument is the name to
5604 give to this location in the toc; this will be a symbol with class
5605 TC. The rest of the arguments are N-byte values to actually put at
5606 this location in the TOC; often there is just one more argument, a
5607 relocatable symbol reference. The size of the value to store
5608 depends on target word size. A 32-bit target uses 4-byte values, a
5609 64-bit target uses 8-byte values.
5611 When not generating XCOFF output, the arguments are the same, but
5612 the first argument is simply ignored. */
5615 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5619 /* Define the TOC symbol name. */
5625 if (ppc_toc_csect
== (symbolS
*) NULL
5626 || ppc_toc_csect
!= ppc_current_csect
)
5628 as_bad (_(".tc not in .toc section"));
5629 ignore_rest_of_line ();
5633 endc
= get_symbol_name (&name
);
5635 sym
= symbol_find_or_make (name
);
5637 (void) restore_line_pointer (endc
);
5639 if (S_IS_DEFINED (sym
))
5643 label
= symbol_get_tc (ppc_current_csect
)->within
;
5644 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5646 as_bad (_(".tc with no label"));
5647 ignore_rest_of_line ();
5651 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5652 symbol_set_frag (label
, symbol_get_frag (sym
));
5653 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5655 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5656 ++input_line_pointer
;
5661 S_SET_SEGMENT (sym
, now_seg
);
5662 symbol_set_frag (sym
, frag_now
);
5663 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5664 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5665 symbol_get_tc (sym
)->output
= 1;
5667 ppc_frob_label (sym
);
5670 #endif /* OBJ_XCOFF */
5674 /* Skip the TOC symbol name. */
5675 while (is_part_of_name (*input_line_pointer
)
5676 || *input_line_pointer
== ' '
5677 || *input_line_pointer
== '['
5678 || *input_line_pointer
== ']'
5679 || *input_line_pointer
== '{'
5680 || *input_line_pointer
== '}')
5681 ++input_line_pointer
;
5683 /* Align to a four/eight byte boundary. */
5684 align
= ppc_obj64
? 3 : 2;
5685 frag_align (align
, 0, 0);
5686 record_alignment (now_seg
, align
);
5687 #endif /* OBJ_ELF */
5689 if (*input_line_pointer
!= ',')
5690 demand_empty_rest_of_line ();
5693 ++input_line_pointer
;
5694 cons (ppc_obj64
? 8 : 4);
5698 /* Pseudo-op .machine. */
5701 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5705 #define MAX_HISTORY 100
5706 static ppc_cpu_t
*cpu_history
;
5707 static int curr_hist
;
5711 c
= get_symbol_name (&cpu_string
);
5712 cpu_string
= xstrdup (cpu_string
);
5713 (void) restore_line_pointer (c
);
5715 if (cpu_string
!= NULL
)
5717 ppc_cpu_t old_cpu
= ppc_cpu
;
5721 for (p
= cpu_string
; *p
!= 0; p
++)
5724 if (strcmp (cpu_string
, "push") == 0)
5726 if (cpu_history
== NULL
)
5727 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5729 if (curr_hist
>= MAX_HISTORY
)
5730 as_bad (_(".machine stack overflow"));
5732 cpu_history
[curr_hist
++] = ppc_cpu
;
5734 else if (strcmp (cpu_string
, "pop") == 0)
5737 as_bad (_(".machine stack underflow"));
5739 ppc_cpu
= cpu_history
[--curr_hist
];
5741 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5744 as_bad (_("invalid machine `%s'"), cpu_string
);
5746 if (ppc_cpu
!= old_cpu
)
5747 ppc_setup_opcodes ();
5750 demand_empty_rest_of_line ();
5752 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5756 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5758 /* Set the current section. */
5760 ppc_set_current_section (segT
new)
5762 ppc_previous_section
= ppc_current_section
;
5763 ppc_current_section
= new;
5766 /* pseudo-op: .previous
5767 behaviour: toggles the current section with the previous section.
5769 warnings: "No previous section" */
5772 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5774 if (ppc_previous_section
== NULL
)
5776 as_warn (_("no previous section to return to, ignored."));
5780 subseg_set (ppc_previous_section
, 0);
5782 ppc_set_current_section (ppc_previous_section
);
5785 /* pseudo-op: .pdata
5786 behaviour: predefined read only data section
5790 initial: .section .pdata "adr3"
5791 a - don't know -- maybe a misprint
5792 d - initialized data
5794 3 - double word aligned (that would be 4 byte boundary)
5797 Tag index tables (also known as the function table) for exception
5798 handling, debugging, etc. */
5801 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5803 if (pdata_section
== 0)
5805 pdata_section
= subseg_new (".pdata", 0);
5807 bfd_set_section_flags (stdoutput
, pdata_section
,
5808 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5809 | SEC_READONLY
| SEC_DATA
));
5811 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5815 pdata_section
= subseg_new (".pdata", 0);
5817 ppc_set_current_section (pdata_section
);
5820 /* pseudo-op: .ydata
5821 behaviour: predefined read only data section
5825 initial: .section .ydata "drw3"
5826 a - don't know -- maybe a misprint
5827 d - initialized data
5829 3 - double word aligned (that would be 4 byte boundary)
5831 Tag tables (also known as the scope table) for exception handling,
5835 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5837 if (ydata_section
== 0)
5839 ydata_section
= subseg_new (".ydata", 0);
5840 bfd_set_section_flags (stdoutput
, ydata_section
,
5841 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5842 | SEC_READONLY
| SEC_DATA
));
5844 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5848 ydata_section
= subseg_new (".ydata", 0);
5850 ppc_set_current_section (ydata_section
);
5853 /* pseudo-op: .reldata
5854 behaviour: predefined read write data section
5855 double word aligned (4-byte)
5856 FIXME: relocation is applied to it
5857 FIXME: what's the difference between this and .data?
5860 initial: .section .reldata "drw3"
5861 d - initialized data
5864 3 - double word aligned (that would be 8 byte boundary)
5867 Like .data, but intended to hold data subject to relocation, such as
5868 function descriptors, etc. */
5871 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5873 if (reldata_section
== 0)
5875 reldata_section
= subseg_new (".reldata", 0);
5877 bfd_set_section_flags (stdoutput
, reldata_section
,
5878 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5881 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5885 reldata_section
= subseg_new (".reldata", 0);
5887 ppc_set_current_section (reldata_section
);
5890 /* pseudo-op: .rdata
5891 behaviour: predefined read only data section
5895 initial: .section .rdata "dr3"
5896 d - initialized data
5898 3 - double word aligned (that would be 4 byte boundary) */
5901 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5903 if (rdata_section
== 0)
5905 rdata_section
= subseg_new (".rdata", 0);
5906 bfd_set_section_flags (stdoutput
, rdata_section
,
5907 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5908 | SEC_READONLY
| SEC_DATA
));
5910 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5914 rdata_section
= subseg_new (".rdata", 0);
5916 ppc_set_current_section (rdata_section
);
5919 /* pseudo-op: .ualong
5920 behaviour: much like .int, with the exception that no alignment is
5922 FIXME: test the alignment statement
5927 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5933 /* pseudo-op: .znop <symbol name>
5934 behaviour: Issue a nop instruction
5935 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5936 the supplied symbol name.
5938 warnings: Missing symbol name */
5941 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5944 const struct powerpc_opcode
*opcode
;
5951 /* Strip out the symbol name. */
5952 c
= get_symbol_name (&symbol_name
);
5954 name
= xstrdup (symbol_name
);
5956 sym
= symbol_find_or_make (name
);
5958 *input_line_pointer
= c
;
5960 SKIP_WHITESPACE_AFTER_NAME ();
5962 /* Look up the opcode in the hash table. */
5963 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5965 /* Stick in the nop. */
5966 insn
= opcode
->opcode
;
5968 /* Write out the instruction. */
5970 md_number_to_chars (f
, insn
, 4);
5972 f
- frag_now
->fr_literal
,
5977 BFD_RELOC_16_GOT_PCREL
);
5987 ppc_pe_comm (int lcomm
)
5996 c
= get_symbol_name (&name
);
5998 /* just after name is now '\0'. */
5999 p
= input_line_pointer
;
6001 SKIP_WHITESPACE_AFTER_NAME ();
6002 if (*input_line_pointer
!= ',')
6004 as_bad (_("expected comma after symbol-name: rest of line ignored."));
6005 ignore_rest_of_line ();
6009 input_line_pointer
++; /* skip ',' */
6010 if ((temp
= get_absolute_expression ()) < 0)
6012 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
6013 ignore_rest_of_line ();
6019 /* The third argument to .comm is the alignment. */
6020 if (*input_line_pointer
!= ',')
6024 ++input_line_pointer
;
6025 align
= get_absolute_expression ();
6028 as_warn (_("ignoring bad alignment"));
6035 symbolP
= symbol_find_or_make (name
);
6038 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
6040 as_bad (_("ignoring attempt to re-define symbol `%s'."),
6041 S_GET_NAME (symbolP
));
6042 ignore_rest_of_line ();
6046 if (S_GET_VALUE (symbolP
))
6048 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
6049 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
6050 S_GET_NAME (symbolP
),
6051 (long) S_GET_VALUE (symbolP
),
6056 S_SET_VALUE (symbolP
, (valueT
) temp
);
6057 S_SET_EXTERNAL (symbolP
);
6058 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
6061 demand_empty_rest_of_line ();
6065 * implement the .section pseudo op:
6066 * .section name {, "flags"}
6068 * | +--- optional flags: 'b' for bss
6070 * +-- section name 'l' for lib
6074 * 'd' (apparently m88k for data)
6076 * But if the argument is not a quoted string, treat it as a
6077 * subsegment number.
6079 * FIXME: this is a copy of the section processing from obj-coff.c, with
6080 * additions/changes for the moto-pas assembler support. There are three
6083 * FIXME: I just noticed this. This doesn't work at all really. It it
6084 * setting bits that bfd probably neither understands or uses. The
6085 * correct approach (?) will have to incorporate extra fields attached
6086 * to the section to hold the system specific stuff. (krk)
6089 * 'a' - unknown - referred to in documentation, but no definition supplied
6090 * 'c' - section has code
6091 * 'd' - section has initialized data
6092 * 'u' - section has uninitialized data
6093 * 'i' - section contains directives (info)
6094 * 'n' - section can be discarded
6095 * 'R' - remove section at link time
6097 * Section Protection:
6098 * 'r' - section is readable
6099 * 'w' - section is writable
6100 * 'x' - section is executable
6101 * 's' - section is sharable
6103 * Section Alignment:
6104 * '0' - align to byte boundary
6105 * '1' - align to halfword boundary
6106 * '2' - align to word boundary
6107 * '3' - align to doubleword boundary
6108 * '4' - align to quadword boundary
6109 * '5' - align to 32 byte boundary
6110 * '6' - align to 64 byte boundary
6115 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
6117 /* Strip out the section name. */
6126 c
= get_symbol_name (§ion_name
);
6128 name
= xstrdup (section_name
);
6130 *input_line_pointer
= c
;
6132 SKIP_WHITESPACE_AFTER_NAME ();
6135 flags
= SEC_NO_FLAGS
;
6137 if (strcmp (name
, ".idata$2") == 0)
6141 else if (strcmp (name
, ".idata$3") == 0)
6145 else if (strcmp (name
, ".idata$4") == 0)
6149 else if (strcmp (name
, ".idata$5") == 0)
6153 else if (strcmp (name
, ".idata$6") == 0)
6158 /* Default alignment to 16 byte boundary. */
6161 if (*input_line_pointer
== ',')
6163 ++input_line_pointer
;
6165 if (*input_line_pointer
!= '"')
6166 exp
= get_absolute_expression ();
6169 ++input_line_pointer
;
6170 while (*input_line_pointer
!= '"'
6171 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
6173 switch (*input_line_pointer
)
6175 /* Section Contents */
6176 case 'a': /* unknown */
6177 as_bad (_("unsupported section attribute -- 'a'"));
6179 case 'c': /* code section */
6182 case 'd': /* section has initialized data */
6185 case 'u': /* section has uninitialized data */
6186 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
6190 case 'i': /* section contains directives (info) */
6191 /* FIXME: This is IMAGE_SCN_LNK_INFO
6193 flags
|= SEC_HAS_CONTENTS
;
6195 case 'n': /* section can be discarded */
6198 case 'R': /* Remove section at link time */
6199 flags
|= SEC_NEVER_LOAD
;
6201 #if IFLICT_BRAIN_DAMAGE
6202 /* Section Protection */
6203 case 'r': /* section is readable */
6204 flags
|= IMAGE_SCN_MEM_READ
;
6206 case 'w': /* section is writable */
6207 flags
|= IMAGE_SCN_MEM_WRITE
;
6209 case 'x': /* section is executable */
6210 flags
|= IMAGE_SCN_MEM_EXECUTE
;
6212 case 's': /* section is sharable */
6213 flags
|= IMAGE_SCN_MEM_SHARED
;
6216 /* Section Alignment */
6217 case '0': /* align to byte boundary */
6218 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
6221 case '1': /* align to halfword boundary */
6222 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
6225 case '2': /* align to word boundary */
6226 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
6229 case '3': /* align to doubleword boundary */
6230 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
6233 case '4': /* align to quadword boundary */
6234 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
6237 case '5': /* align to 32 byte boundary */
6238 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
6241 case '6': /* align to 64 byte boundary */
6242 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
6247 as_bad (_("unknown section attribute '%c'"),
6248 *input_line_pointer
);
6251 ++input_line_pointer
;
6253 if (*input_line_pointer
== '"')
6254 ++input_line_pointer
;
6258 sec
= subseg_new (name
, (subsegT
) exp
);
6260 ppc_set_current_section (sec
);
6262 if (flags
!= SEC_NO_FLAGS
)
6264 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
6265 as_bad (_("error setting flags for \"%s\": %s"),
6266 bfd_section_name (stdoutput
, sec
),
6267 bfd_errmsg (bfd_get_error ()));
6270 bfd_set_section_alignment (stdoutput
, sec
, align
);
6274 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
6280 endc
= get_symbol_name (&name
);
6282 ext_sym
= symbol_find_or_make (name
);
6284 (void) restore_line_pointer (endc
);
6286 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
6287 SF_SET_FUNCTION (ext_sym
);
6288 SF_SET_PROCESS (ext_sym
);
6289 coff_add_linesym (ext_sym
);
6291 demand_empty_rest_of_line ();
6295 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
6297 if (tocdata_section
== 0)
6299 tocdata_section
= subseg_new (".tocd", 0);
6300 /* FIXME: section flags won't work. */
6301 bfd_set_section_flags (stdoutput
, tocdata_section
,
6302 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
6303 | SEC_READONLY
| SEC_DATA
));
6305 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
6309 rdata_section
= subseg_new (".tocd", 0);
6312 ppc_set_current_section (tocdata_section
);
6314 demand_empty_rest_of_line ();
6317 /* Don't adjust TOC relocs to use the section symbol. */
6320 ppc_pe_fix_adjustable (fixS
*fix
)
6322 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
6329 /* XCOFF specific symbol and file handling. */
6331 /* Canonicalize the symbol name. We use the to force the suffix, if
6332 any, to use square brackets, and to be in upper case. */
6335 ppc_canonicalize_symbol_name (char *name
)
6339 if (ppc_stab_symbol
)
6342 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
6356 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
6359 if (*s
== '\0' || s
[1] != '\0')
6360 as_bad (_("bad symbol suffix"));
6368 /* Set the class of a symbol based on the suffix, if any. This is
6369 called whenever a new symbol is created. */
6372 ppc_symbol_new_hook (symbolS
*sym
)
6374 struct ppc_tc_sy
*tc
;
6377 tc
= symbol_get_tc (sym
);
6380 tc
->symbol_class
= -1;
6381 tc
->real_name
= NULL
;
6388 if (ppc_stab_symbol
)
6391 s
= strchr (S_GET_NAME (sym
), '[');
6392 if (s
== (const char *) NULL
)
6394 /* There is no suffix. */
6403 if (strcmp (s
, "BS]") == 0)
6404 tc
->symbol_class
= XMC_BS
;
6407 if (strcmp (s
, "DB]") == 0)
6408 tc
->symbol_class
= XMC_DB
;
6409 else if (strcmp (s
, "DS]") == 0)
6410 tc
->symbol_class
= XMC_DS
;
6413 if (strcmp (s
, "GL]") == 0)
6414 tc
->symbol_class
= XMC_GL
;
6417 if (strcmp (s
, "PR]") == 0)
6418 tc
->symbol_class
= XMC_PR
;
6421 if (strcmp (s
, "RO]") == 0)
6422 tc
->symbol_class
= XMC_RO
;
6423 else if (strcmp (s
, "RW]") == 0)
6424 tc
->symbol_class
= XMC_RW
;
6427 if (strcmp (s
, "SV]") == 0)
6428 tc
->symbol_class
= XMC_SV
;
6431 if (strcmp (s
, "TC]") == 0)
6432 tc
->symbol_class
= XMC_TC
;
6433 else if (strcmp (s
, "TI]") == 0)
6434 tc
->symbol_class
= XMC_TI
;
6435 else if (strcmp (s
, "TB]") == 0)
6436 tc
->symbol_class
= XMC_TB
;
6437 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6438 tc
->symbol_class
= XMC_TC0
;
6441 if (strcmp (s
, "UA]") == 0)
6442 tc
->symbol_class
= XMC_UA
;
6443 else if (strcmp (s
, "UC]") == 0)
6444 tc
->symbol_class
= XMC_UC
;
6447 if (strcmp (s
, "XO]") == 0)
6448 tc
->symbol_class
= XMC_XO
;
6452 if (tc
->symbol_class
== -1)
6453 as_bad (_("unrecognized symbol suffix"));
6456 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6457 seen. It tells ppc_adjust_symtab whether it needs to look through
6460 static bfd_boolean ppc_saw_abs
;
6462 /* Change the name of a symbol just before writing it out. Set the
6463 real name if the .rename pseudo-op was used. Otherwise, remove any
6464 class suffix. Return 1 if the symbol should not be included in the
6468 ppc_frob_symbol (symbolS
*sym
)
6470 static symbolS
*ppc_last_function
;
6471 static symbolS
*set_end
;
6473 /* Discard symbols that should not be included in the output symbol
6475 if (! symbol_used_in_reloc_p (sym
)
6476 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6477 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6478 && ! symbol_get_tc (sym
)->output
6479 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6482 /* This one will disappear anyway. Don't make a csect sym for it. */
6483 if (sym
== abs_section_sym
)
6486 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6487 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6493 name
= S_GET_NAME (sym
);
6494 s
= strchr (name
, '[');
6495 if (s
!= (char *) NULL
)
6501 snew
= xstrndup (name
, len
);
6503 S_SET_NAME (sym
, snew
);
6507 if (set_end
!= (symbolS
*) NULL
)
6509 SA_SET_SYM_ENDNDX (set_end
, sym
);
6513 if (SF_GET_FUNCTION (sym
))
6515 if (ppc_last_function
!= (symbolS
*) NULL
)
6516 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6517 ppc_last_function
= sym
;
6518 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6520 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6521 SA_SET_SYM_FSIZE (sym
,
6522 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6525 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6526 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6528 if (ppc_last_function
== (symbolS
*) NULL
)
6529 as_bad (_(".ef with no preceding .function"));
6532 set_end
= ppc_last_function
;
6533 ppc_last_function
= NULL
;
6535 /* We don't have a C_EFCN symbol, but we need to force the
6536 COFF backend to believe that it has seen one. */
6537 coff_last_function
= NULL
;
6541 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6542 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6543 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6544 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6545 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6546 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6547 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6548 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6549 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6550 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6551 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6553 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6554 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6555 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6558 union internal_auxent
*a
;
6560 /* Create a csect aux. */
6561 i
= S_GET_NUMBER_AUXILIARY (sym
);
6562 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6563 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6564 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6566 /* This is the TOC table. */
6567 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6568 a
->x_csect
.x_scnlen
.l
= 0;
6569 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6571 else if (symbol_get_tc (sym
)->subseg
!= 0)
6573 /* This is a csect symbol. x_scnlen is the size of the
6575 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6576 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6577 S_GET_SEGMENT (sym
))
6578 - S_GET_VALUE (sym
));
6581 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6582 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6583 - S_GET_VALUE (sym
));
6585 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6587 else if (S_GET_SEGMENT (sym
) == bss_section
)
6589 /* This is a common symbol. */
6590 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6591 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6592 if (S_IS_EXTERNAL (sym
))
6593 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6595 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6597 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6599 /* This is an absolute symbol. The csect will be created by
6600 ppc_adjust_symtab. */
6602 a
->x_csect
.x_smtyp
= XTY_LD
;
6603 if (symbol_get_tc (sym
)->symbol_class
== -1)
6604 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6606 else if (! S_IS_DEFINED (sym
))
6608 /* This is an external symbol. */
6609 a
->x_csect
.x_scnlen
.l
= 0;
6610 a
->x_csect
.x_smtyp
= XTY_ER
;
6612 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6616 /* This is a TOC definition. x_scnlen is the size of the
6618 next
= symbol_next (sym
);
6619 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6620 next
= symbol_next (next
);
6621 if (next
== (symbolS
*) NULL
6622 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6624 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6625 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6627 - S_GET_VALUE (sym
));
6629 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6630 - S_GET_VALUE (sym
));
6634 resolve_symbol_value (next
);
6635 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6636 - S_GET_VALUE (sym
));
6638 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6644 /* This is a normal symbol definition. x_scnlen is the
6645 symbol index of the containing csect. */
6646 if (S_GET_SEGMENT (sym
) == text_section
)
6647 csect
= ppc_text_csects
;
6648 else if (S_GET_SEGMENT (sym
) == data_section
)
6649 csect
= ppc_data_csects
;
6653 /* Skip the initial dummy symbol. */
6654 csect
= symbol_get_tc (csect
)->next
;
6656 if (csect
== (symbolS
*) NULL
)
6658 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6659 a
->x_csect
.x_scnlen
.l
= 0;
6663 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6665 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6666 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6667 > S_GET_VALUE (sym
))
6669 csect
= symbol_get_tc (csect
)->next
;
6672 a
->x_csect
.x_scnlen
.p
=
6673 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6674 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6677 a
->x_csect
.x_smtyp
= XTY_LD
;
6680 a
->x_csect
.x_parmhash
= 0;
6681 a
->x_csect
.x_snhash
= 0;
6682 if (symbol_get_tc (sym
)->symbol_class
== -1)
6683 a
->x_csect
.x_smclas
= XMC_PR
;
6685 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6686 a
->x_csect
.x_stab
= 0;
6687 a
->x_csect
.x_snstab
= 0;
6689 /* Don't let the COFF backend resort these symbols. */
6690 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6692 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6694 /* We want the value to be the symbol index of the referenced
6695 csect symbol. BFD will do that for us if we set the right
6697 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6698 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6700 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6701 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6703 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6708 block
= symbol_get_tc (sym
)->within
;
6711 /* The value is the offset from the enclosing csect. */
6714 csect
= symbol_get_tc (block
)->within
;
6715 resolve_symbol_value (csect
);
6716 base
= S_GET_VALUE (csect
);
6721 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6723 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6724 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6726 /* We want the value to be a file offset into the line numbers.
6727 BFD will do that for us if we set the right flags. We have
6728 already set the value correctly. */
6729 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6735 /* Adjust the symbol table. This creates csect symbols for all
6736 absolute symbols. */
6739 ppc_adjust_symtab (void)
6746 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6750 union internal_auxent
*a
;
6752 if (S_GET_SEGMENT (sym
) != absolute_section
)
6755 csect
= symbol_create (".abs[XO]", absolute_section
,
6756 S_GET_VALUE (sym
), &zero_address_frag
);
6757 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6758 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6759 i
= S_GET_NUMBER_AUXILIARY (csect
);
6760 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6761 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6762 a
->x_csect
.x_scnlen
.l
= 0;
6763 a
->x_csect
.x_smtyp
= XTY_SD
;
6764 a
->x_csect
.x_parmhash
= 0;
6765 a
->x_csect
.x_snhash
= 0;
6766 a
->x_csect
.x_smclas
= XMC_XO
;
6767 a
->x_csect
.x_stab
= 0;
6768 a
->x_csect
.x_snstab
= 0;
6770 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6772 i
= S_GET_NUMBER_AUXILIARY (sym
);
6773 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6774 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6775 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6778 ppc_saw_abs
= FALSE
;
6781 /* Set the VMA for a section. This is called on all the sections in
6785 ppc_frob_section (asection
*sec
)
6787 static bfd_vma vma
= 0;
6789 /* Dwarf sections start at 0. */
6790 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6793 vma
= md_section_align (sec
, vma
);
6794 bfd_set_section_vma (stdoutput
, sec
, vma
);
6795 vma
+= bfd_section_size (stdoutput
, sec
);
6798 #endif /* OBJ_XCOFF */
6801 md_atof (int type
, char *litp
, int *sizep
)
6803 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6806 /* Write a value out to the object file, using the appropriate
6810 md_number_to_chars (char *buf
, valueT val
, int n
)
6812 if (target_big_endian
)
6813 number_to_chars_bigendian (buf
, val
, n
);
6815 number_to_chars_littleendian (buf
, val
, n
);
6818 /* Align a section (I don't know why this is machine dependent). */
6821 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6826 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6828 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6832 /* We don't have any form of relaxing. */
6835 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6836 asection
*seg ATTRIBUTE_UNUSED
)
6842 /* Convert a machine dependent frag. We never generate these. */
6845 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6846 asection
*sec ATTRIBUTE_UNUSED
,
6847 fragS
*fragp ATTRIBUTE_UNUSED
)
6852 /* We have no need to default values of symbols. */
6855 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6860 /* Functions concerning relocs. */
6862 /* The location from which a PC relative jump should be calculated,
6863 given a PC relative reloc. */
6866 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6868 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6873 /* This is called to see whether a fixup should be adjusted to use a
6874 section symbol. We take the opportunity to change a fixup against
6875 a symbol in the TOC subsegment into a reloc against the
6876 corresponding .tc symbol. */
6879 ppc_fix_adjustable (fixS
*fix
)
6881 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6882 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6883 TC_SYMFIELD_TYPE
*tc
;
6885 if (symseg
== absolute_section
)
6888 /* Always adjust symbols in debugging sections. */
6889 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6892 if (ppc_toc_csect
!= (symbolS
*) NULL
6893 && fix
->fx_addsy
!= ppc_toc_csect
6894 && symseg
== data_section
6895 && val
>= ppc_toc_frag
->fr_address
6896 && (ppc_after_toc_frag
== (fragS
*) NULL
6897 || val
< ppc_after_toc_frag
->fr_address
))
6901 for (sy
= symbol_next (ppc_toc_csect
);
6902 sy
!= (symbolS
*) NULL
;
6903 sy
= symbol_next (sy
))
6905 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6907 if (sy_tc
->symbol_class
== XMC_TC0
)
6909 if (sy_tc
->symbol_class
!= XMC_TC
)
6911 if (val
== resolve_symbol_value (sy
))
6914 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6919 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6920 _("symbol in .toc does not match any .tc"));
6923 /* Possibly adjust the reloc to be against the csect. */
6924 tc
= symbol_get_tc (fix
->fx_addsy
);
6926 && tc
->symbol_class
!= XMC_TC0
6927 && tc
->symbol_class
!= XMC_TC
6928 && symseg
!= bss_section
6929 /* Don't adjust if this is a reloc in the toc section. */
6930 && (symseg
!= data_section
6931 || ppc_toc_csect
== NULL
6932 || val
< ppc_toc_frag
->fr_address
6933 || (ppc_after_toc_frag
!= NULL
6934 && val
>= ppc_after_toc_frag
->fr_address
)))
6936 symbolS
*csect
= tc
->within
;
6938 /* If the symbol was not declared by a label (eg: a section symbol),
6939 use the section instead of the csect. This doesn't happen in
6940 normal AIX assembly code. */
6942 csect
= seg_info (symseg
)->sym
;
6944 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6945 fix
->fx_addsy
= csect
;
6950 /* Adjust a reloc against a .lcomm symbol to be against the base
6952 if (symseg
== bss_section
6953 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6955 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6957 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6964 /* A reloc from one csect to another must be kept. The assembler
6965 will, of course, keep relocs between sections, and it will keep
6966 absolute relocs, but we need to force it to keep PC relative relocs
6967 between two csects in the same section. */
6970 ppc_force_relocation (fixS
*fix
)
6972 /* At this point fix->fx_addsy should already have been converted to
6973 a csect symbol. If the csect does not include the fragment, then
6974 we need to force the relocation. */
6976 && fix
->fx_addsy
!= NULL
6977 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6978 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6979 > fix
->fx_frag
->fr_address
)
6980 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6981 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6982 <= fix
->fx_frag
->fr_address
))))
6985 return generic_force_reloc (fix
);
6987 #endif /* OBJ_XCOFF */
6990 /* If this function returns non-zero, it guarantees that a relocation
6991 will be emitted for a fixup. */
6994 ppc_force_relocation (fixS
*fix
)
6996 /* Branch prediction relocations must force a relocation, as must
6997 the vtable description relocs. */
6998 switch (fix
->fx_r_type
)
7000 case BFD_RELOC_PPC_B16_BRTAKEN
:
7001 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7002 case BFD_RELOC_PPC_BA16_BRTAKEN
:
7003 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
7004 case BFD_RELOC_24_PLT_PCREL
:
7005 case BFD_RELOC_PPC64_TOC
:
7007 case BFD_RELOC_PPC_B26
:
7008 case BFD_RELOC_PPC_BA26
:
7009 case BFD_RELOC_PPC_B16
:
7010 case BFD_RELOC_PPC_BA16
:
7011 case BFD_RELOC_PPC64_REL24_NOTOC
:
7012 /* All branch fixups targeting a localentry symbol must
7013 force a relocation. */
7016 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
7017 elf_symbol_type
*elfsym
7018 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
7019 gas_assert (elfsym
);
7020 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
7028 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
7029 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
)
7032 return generic_force_reloc (fix
);
7036 ppc_fix_adjustable (fixS
*fix
)
7038 switch (fix
->fx_r_type
)
7040 /* All branch fixups targeting a localentry symbol must
7041 continue using the symbol. */
7042 case BFD_RELOC_PPC_B26
:
7043 case BFD_RELOC_PPC_BA26
:
7044 case BFD_RELOC_PPC_B16
:
7045 case BFD_RELOC_PPC_BA16
:
7046 case BFD_RELOC_PPC_B16_BRTAKEN
:
7047 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7048 case BFD_RELOC_PPC_BA16_BRTAKEN
:
7049 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
7050 case BFD_RELOC_PPC64_REL24_NOTOC
:
7053 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
7054 elf_symbol_type
*elfsym
7055 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
7056 gas_assert (elfsym
);
7057 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
7065 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
7066 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
7067 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
7068 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
7069 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
7070 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
7071 && fix
->fx_r_type
!= BFD_RELOC_16_GOT_PCREL
7072 && fix
->fx_r_type
!= BFD_RELOC_32_GOTOFF
7073 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
7074 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
7075 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
7076 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
7077 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
7078 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
7079 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
7080 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
7081 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
7082 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
7083 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
7084 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
7085 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
7086 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
7087 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
7088 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
7089 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
7090 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
7091 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
7092 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
7093 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
7094 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
7095 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
7096 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
7097 && fix
->fx_r_type
<= BFD_RELOC_PPC64_TLS_PCREL
));
7102 ppc_frag_check (struct frag
*fragP
)
7104 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
7105 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7106 _("instruction address is not a multiple of %d"),
7107 fragP
->insn_addr
+ 1);
7110 /* rs_align_code frag handling. */
7112 enum ppc_nop_encoding_for_rs_align_code
7121 ppc_nop_select (void)
7123 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
7125 if ((ppc_cpu
& (PPC_OPCODE_POWER9
| PPC_OPCODE_E500MC
)) == 0)
7127 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
7128 return PPC_NOP_GROUP_P7
;
7129 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0)
7130 return PPC_NOP_GROUP_P6
;
7132 return PPC_NOP_VANILLA
;
7136 ppc_handle_align (struct frag
*fragP
)
7138 valueT count
= (fragP
->fr_next
->fr_address
7139 - (fragP
->fr_address
+ fragP
->fr_fix
));
7140 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
7141 enum ppc_nop_encoding_for_rs_align_code nop_select
= *dest
& 0xff;
7143 /* Pad with zeros if not inserting a whole number of instructions.
7144 We could pad with zeros up to an instruction boundary then follow
7145 with nops but odd counts indicate data in an executable section
7146 so padding with zeros is most appropriate. */
7148 || (nop_select
== PPC_NOP_VLE
? (count
& 1) != 0 : (count
& 3) != 0))
7154 if (nop_select
== PPC_NOP_VLE
)
7158 md_number_to_chars (dest
, 0x4400, 2);
7164 if (count
> 4 * nop_limit
&& count
< 0x2000000)
7168 /* Make a branch, then follow with nops. Insert another
7169 frag to handle the nops. */
7170 md_number_to_chars (dest
, 0x48000000 + count
, 4);
7175 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7176 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
7177 fragP
->fr_next
= rest
;
7179 rest
->fr_address
+= rest
->fr_fix
+ 4;
7181 /* If we leave the next frag as rs_align_code we'll come here
7182 again, resulting in a bunch of branches rather than a
7183 branch followed by nops. */
7184 rest
->fr_type
= rs_align
;
7185 dest
= rest
->fr_literal
;
7188 md_number_to_chars (dest
, 0x60000000, 4);
7190 if (nop_select
>= PPC_NOP_GROUP_P6
)
7192 /* For power6, power7, and power8, we want the last nop to
7193 be a group terminating one. Do this by inserting an
7194 rs_fill frag immediately after this one, with its address
7195 set to the last nop location. This will automatically
7196 reduce the number of nops in the current frag by one. */
7199 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7201 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
7202 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
7203 group_nop
->fr_fix
= 0;
7204 group_nop
->fr_offset
= 1;
7205 group_nop
->fr_type
= rs_fill
;
7206 fragP
->fr_next
= group_nop
;
7207 dest
= group_nop
->fr_literal
;
7210 if (nop_select
== PPC_NOP_GROUP_P6
)
7211 /* power6 group terminating nop: "ori 1,1,0". */
7212 md_number_to_chars (dest
, 0x60210000, 4);
7214 /* power7/power8 group terminating nop: "ori 2,2,0". */
7215 md_number_to_chars (dest
, 0x60420000, 4);
7220 /* Apply a fixup to the object code. This is called for all the
7221 fixups we generated by the calls to fix_new_exp, above. */
7224 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
7226 valueT value
= * valP
;
7228 const struct powerpc_operand
*operand
;
7231 if (fixP
->fx_addsy
!= NULL
)
7233 /* Hack around bfd_install_relocation brain damage. */
7235 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
7237 if (fixP
->fx_addsy
== abs_section_sym
)
7243 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7244 the symbol values. If we are doing this relocation the code in
7245 write.c is going to call bfd_install_relocation, which is also
7246 going to use the symbol value. That means that if the reloc is
7247 fully resolved we want to use *valP since bfd_install_relocation is
7249 However, if the reloc is not fully resolved we do not want to
7250 use *valP, and must use fx_offset instead. If the relocation
7251 is PC-relative, we then need to re-apply md_pcrel_from_section
7252 to this new relocation value. */
7253 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
7258 value
= fixP
->fx_offset
;
7260 value
-= md_pcrel_from_section (fixP
, seg
);
7264 /* We are only able to convert some relocs to pc-relative. */
7267 switch (fixP
->fx_r_type
)
7270 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7274 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7278 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7281 case BFD_RELOC_LO16
:
7282 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7285 case BFD_RELOC_HI16
:
7286 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7289 case BFD_RELOC_HI16_S
:
7290 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7293 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7294 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7297 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7298 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7301 case BFD_RELOC_PPC64_HIGHER
:
7302 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7305 case BFD_RELOC_PPC64_HIGHER_S
:
7306 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7309 case BFD_RELOC_PPC64_HIGHEST
:
7310 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7313 case BFD_RELOC_PPC64_HIGHEST_S
:
7314 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7317 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7318 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7321 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7322 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7325 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7326 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7329 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7330 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7333 case BFD_RELOC_PPC_16DX_HA
:
7334 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7337 case BFD_RELOC_PPC64_D34
:
7338 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7341 case BFD_RELOC_PPC64_D28
:
7342 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7349 else if (!fixP
->fx_done
7350 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7352 /* addpcis is relative to next insn address. */
7354 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7359 if (fixP
->fx_pcrel_adjust
!= 0)
7361 /* This is a fixup on an instruction. */
7362 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
7364 operand
= &powerpc_operands
[opindex
];
7366 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7367 does not generate a reloc. It uses the offset of `sym' within its
7368 csect. Other usages, such as `.long sym', generate relocs. This
7369 is the documented behaviour of non-TOC symbols. */
7370 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7371 && (operand
->bitm
& 0xfff0) == 0xfff0
7372 && operand
->shift
== 0
7373 && (operand
->insert
== NULL
|| ppc_obj64
)
7374 && fixP
->fx_addsy
!= NULL
7375 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7376 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7377 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
7378 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7380 value
= fixP
->fx_offset
;
7384 /* During parsing of instructions, a TOC16 reloc is generated for
7385 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7386 in the toc. But at parse time, SYM may be not yet defined, so
7387 check again here. */
7388 if (fixP
->fx_r_type
== BFD_RELOC_16
7389 && fixP
->fx_addsy
!= NULL
7390 && ppc_is_toc_sym (fixP
->fx_addsy
))
7391 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7395 /* Calculate value to be stored in field. */
7397 switch (fixP
->fx_r_type
)
7400 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7401 case BFD_RELOC_PPC_VLE_LO16A
:
7402 case BFD_RELOC_PPC_VLE_LO16D
:
7404 case BFD_RELOC_LO16
:
7405 case BFD_RELOC_LO16_PCREL
:
7406 fieldval
= value
& 0xffff;
7408 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7409 fieldval
= SEX16 (fieldval
);
7410 fixP
->fx_no_overflow
= 1;
7413 case BFD_RELOC_HI16
:
7414 case BFD_RELOC_HI16_PCREL
:
7416 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7418 fieldval
= value
>> 16;
7419 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7421 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7422 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7428 case BFD_RELOC_PPC_VLE_HI16A
:
7429 case BFD_RELOC_PPC_VLE_HI16D
:
7430 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7432 fieldval
= PPC_HI (value
);
7433 goto sign_extend_16
;
7435 case BFD_RELOC_HI16_S
:
7436 case BFD_RELOC_HI16_S_PCREL
:
7437 case BFD_RELOC_PPC_16DX_HA
:
7438 case BFD_RELOC_PPC_REL16DX_HA
:
7440 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7442 fieldval
= (value
+ 0x8000) >> 16;
7443 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7445 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7446 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7452 case BFD_RELOC_PPC_VLE_HA16A
:
7453 case BFD_RELOC_PPC_VLE_HA16D
:
7454 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7456 fieldval
= PPC_HA (value
);
7457 goto sign_extend_16
;
7460 case BFD_RELOC_PPC64_HIGHER
:
7461 fieldval
= PPC_HIGHER (value
);
7462 goto sign_extend_16
;
7464 case BFD_RELOC_PPC64_HIGHER_S
:
7465 fieldval
= PPC_HIGHERA (value
);
7466 goto sign_extend_16
;
7468 case BFD_RELOC_PPC64_HIGHEST
:
7469 fieldval
= PPC_HIGHEST (value
);
7470 goto sign_extend_16
;
7472 case BFD_RELOC_PPC64_HIGHEST_S
:
7473 fieldval
= PPC_HIGHESTA (value
);
7474 goto sign_extend_16
;
7481 if (operand
!= NULL
)
7483 /* Handle relocs in an insn. */
7484 switch (fixP
->fx_r_type
)
7487 /* The following relocs can't be calculated by the assembler.
7488 Leave the field zero. */
7489 case BFD_RELOC_PPC_TPREL16
:
7490 case BFD_RELOC_PPC_TPREL16_LO
:
7491 case BFD_RELOC_PPC_TPREL16_HI
:
7492 case BFD_RELOC_PPC_TPREL16_HA
:
7493 case BFD_RELOC_PPC_DTPREL16
:
7494 case BFD_RELOC_PPC_DTPREL16_LO
:
7495 case BFD_RELOC_PPC_DTPREL16_HI
:
7496 case BFD_RELOC_PPC_DTPREL16_HA
:
7497 case BFD_RELOC_PPC_GOT_TLSGD16
:
7498 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7499 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7500 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7501 case BFD_RELOC_PPC_GOT_TLSLD16
:
7502 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7503 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7504 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7505 case BFD_RELOC_PPC_GOT_TPREL16
:
7506 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7507 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7508 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7509 case BFD_RELOC_PPC_GOT_DTPREL16
:
7510 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7511 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7512 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7513 case BFD_RELOC_PPC64_TPREL16_DS
:
7514 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7515 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7516 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7517 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7518 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7519 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7520 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7521 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7522 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7523 case BFD_RELOC_PPC64_DTPREL16_DS
:
7524 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7525 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7526 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7527 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7528 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7529 case BFD_RELOC_PPC64_TPREL34
:
7530 case BFD_RELOC_PPC64_DTPREL34
:
7531 case BFD_RELOC_PPC64_GOT_TLSGD34
:
7532 case BFD_RELOC_PPC64_GOT_TLSLD34
:
7533 case BFD_RELOC_PPC64_GOT_TPREL34
:
7534 case BFD_RELOC_PPC64_GOT_DTPREL34
:
7535 gas_assert (fixP
->fx_addsy
!= NULL
);
7536 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7540 /* These also should leave the field zero for the same
7541 reason. Note that older versions of gas wrote values
7542 here. If we want to go back to the old behaviour, then
7543 all _LO and _LO_DS cases will need to be treated like
7544 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7545 case BFD_RELOC_16_GOTOFF
:
7546 case BFD_RELOC_LO16_GOTOFF
:
7547 case BFD_RELOC_HI16_GOTOFF
:
7548 case BFD_RELOC_HI16_S_GOTOFF
:
7549 case BFD_RELOC_LO16_PLTOFF
:
7550 case BFD_RELOC_HI16_PLTOFF
:
7551 case BFD_RELOC_HI16_S_PLTOFF
:
7552 case BFD_RELOC_GPREL16
:
7553 case BFD_RELOC_16_BASEREL
:
7554 case BFD_RELOC_LO16_BASEREL
:
7555 case BFD_RELOC_HI16_BASEREL
:
7556 case BFD_RELOC_HI16_S_BASEREL
:
7557 case BFD_RELOC_PPC_TOC16
:
7558 case BFD_RELOC_PPC64_TOC16_LO
:
7559 case BFD_RELOC_PPC64_TOC16_HI
:
7560 case BFD_RELOC_PPC64_TOC16_HA
:
7561 case BFD_RELOC_PPC64_PLTGOT16
:
7562 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7563 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7564 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7565 case BFD_RELOC_PPC64_GOT16_DS
:
7566 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7567 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7568 case BFD_RELOC_PPC64_SECTOFF_DS
:
7569 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7570 case BFD_RELOC_PPC64_TOC16_DS
:
7571 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7572 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7573 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7574 case BFD_RELOC_PPC_EMB_NADDR16
:
7575 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7576 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7577 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7578 case BFD_RELOC_PPC_EMB_SDAI16
:
7579 case BFD_RELOC_PPC_EMB_SDA2I16
:
7580 case BFD_RELOC_PPC_EMB_SDA2REL
:
7581 case BFD_RELOC_PPC_EMB_SDA21
:
7582 case BFD_RELOC_PPC_EMB_MRKREF
:
7583 case BFD_RELOC_PPC_EMB_RELSEC16
:
7584 case BFD_RELOC_PPC_EMB_RELST_LO
:
7585 case BFD_RELOC_PPC_EMB_RELST_HI
:
7586 case BFD_RELOC_PPC_EMB_RELST_HA
:
7587 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7588 case BFD_RELOC_PPC_EMB_RELSDA
:
7589 case BFD_RELOC_PPC_VLE_SDA21
:
7590 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7591 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7592 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7593 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7594 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7595 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7596 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7597 case BFD_RELOC_PPC64_GOT_PCREL34
:
7598 case BFD_RELOC_PPC64_PLT_PCREL34
:
7599 gas_assert (fixP
->fx_addsy
!= NULL
);
7602 case BFD_RELOC_PPC_TLS
:
7603 case BFD_RELOC_PPC_TLSGD
:
7604 case BFD_RELOC_PPC_TLSLD
:
7605 case BFD_RELOC_PPC64_TLS_PCREL
:
7611 case BFD_RELOC_PPC_B16
:
7612 /* Adjust the offset to the instruction boundary. */
7617 case BFD_RELOC_VTABLE_INHERIT
:
7618 case BFD_RELOC_VTABLE_ENTRY
:
7619 case BFD_RELOC_PPC_DTPMOD
:
7620 case BFD_RELOC_PPC_TPREL
:
7621 case BFD_RELOC_PPC_DTPREL
:
7622 case BFD_RELOC_PPC_COPY
:
7623 case BFD_RELOC_PPC_GLOB_DAT
:
7624 case BFD_RELOC_32_PLT_PCREL
:
7625 case BFD_RELOC_PPC_EMB_NADDR32
:
7626 case BFD_RELOC_PPC64_TOC
:
7627 case BFD_RELOC_CTOR
:
7629 case BFD_RELOC_32_PCREL
:
7632 case BFD_RELOC_64_PCREL
:
7633 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7634 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7635 _("%s unsupported as instruction fixup"),
7636 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7645 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7646 contents can stay at zero. */
7647 #define APPLY_RELOC fixP->fx_done
7649 #define APPLY_RELOC 1
7651 /* We need to call the insert function even when fieldval is
7652 zero if the insert function would translate that zero to a
7653 bit pattern other than all zeros. */
7654 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7657 unsigned char *where
;
7659 /* Fetch the instruction, insert the fully resolved operand
7660 value, and stuff the instruction back again. */
7661 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7662 if (target_big_endian
)
7664 if (fixP
->fx_size
< 4)
7665 insn
= bfd_getb16 (where
);
7668 insn
= bfd_getb32 (where
);
7669 if (fixP
->fx_size
> 4)
7670 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7675 if (fixP
->fx_size
< 4)
7676 insn
= bfd_getl16 (where
);
7679 insn
= bfd_getl32 (where
);
7680 if (fixP
->fx_size
> 4)
7681 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7684 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7685 fixP
->tc_fix_data
.ppc_cpu
,
7686 fixP
->fx_file
, fixP
->fx_line
);
7687 if (target_big_endian
)
7689 if (fixP
->fx_size
< 4)
7690 bfd_putb16 (insn
, where
);
7693 if (fixP
->fx_size
> 4)
7695 bfd_putb32 (insn
, where
+ 4);
7698 bfd_putb32 (insn
, where
);
7703 if (fixP
->fx_size
< 4)
7704 bfd_putl16 (insn
, where
);
7707 if (fixP
->fx_size
> 4)
7709 bfd_putl32 (insn
, where
+ 4);
7712 bfd_putl32 (insn
, where
);
7718 /* Nothing else to do here. */
7721 gas_assert (fixP
->fx_addsy
!= NULL
);
7722 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7727 /* Use expr_symbol_where to see if this is an expression
7729 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7730 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7731 _("unresolved expression that must be resolved"));
7733 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7734 _("unsupported relocation against %s"),
7735 S_GET_NAME (fixP
->fx_addsy
));
7742 /* Handle relocs in data. */
7743 switch (fixP
->fx_r_type
)
7745 case BFD_RELOC_VTABLE_INHERIT
:
7747 && !S_IS_DEFINED (fixP
->fx_addsy
)
7748 && !S_IS_WEAK (fixP
->fx_addsy
))
7749 S_SET_WEAK (fixP
->fx_addsy
);
7752 case BFD_RELOC_VTABLE_ENTRY
:
7757 /* These can appear with @l etc. in data. */
7758 case BFD_RELOC_LO16
:
7759 case BFD_RELOC_LO16_PCREL
:
7760 case BFD_RELOC_HI16
:
7761 case BFD_RELOC_HI16_PCREL
:
7762 case BFD_RELOC_HI16_S
:
7763 case BFD_RELOC_HI16_S_PCREL
:
7764 case BFD_RELOC_PPC64_HIGHER
:
7765 case BFD_RELOC_PPC64_HIGHER_S
:
7766 case BFD_RELOC_PPC64_HIGHEST
:
7767 case BFD_RELOC_PPC64_HIGHEST_S
:
7768 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7769 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7770 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7773 case BFD_RELOC_PPC_DTPMOD
:
7774 case BFD_RELOC_PPC_TPREL
:
7775 case BFD_RELOC_PPC_DTPREL
:
7776 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7779 /* Just punt all of these to the linker. */
7780 case BFD_RELOC_PPC_B16_BRTAKEN
:
7781 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7782 case BFD_RELOC_16_GOTOFF
:
7783 case BFD_RELOC_LO16_GOTOFF
:
7784 case BFD_RELOC_HI16_GOTOFF
:
7785 case BFD_RELOC_HI16_S_GOTOFF
:
7786 case BFD_RELOC_LO16_PLTOFF
:
7787 case BFD_RELOC_HI16_PLTOFF
:
7788 case BFD_RELOC_HI16_S_PLTOFF
:
7789 case BFD_RELOC_PPC_COPY
:
7790 case BFD_RELOC_PPC_GLOB_DAT
:
7791 case BFD_RELOC_16_BASEREL
:
7792 case BFD_RELOC_LO16_BASEREL
:
7793 case BFD_RELOC_HI16_BASEREL
:
7794 case BFD_RELOC_HI16_S_BASEREL
:
7795 case BFD_RELOC_PPC_TLS
:
7796 case BFD_RELOC_PPC_DTPREL16_LO
:
7797 case BFD_RELOC_PPC_DTPREL16_HI
:
7798 case BFD_RELOC_PPC_DTPREL16_HA
:
7799 case BFD_RELOC_PPC_TPREL16_LO
:
7800 case BFD_RELOC_PPC_TPREL16_HI
:
7801 case BFD_RELOC_PPC_TPREL16_HA
:
7802 case BFD_RELOC_PPC_GOT_TLSGD16
:
7803 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7804 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7805 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7806 case BFD_RELOC_PPC_GOT_TLSLD16
:
7807 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7808 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7809 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7810 case BFD_RELOC_PPC_GOT_DTPREL16
:
7811 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7812 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7813 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7814 case BFD_RELOC_PPC_GOT_TPREL16
:
7815 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7816 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7817 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7818 case BFD_RELOC_24_PLT_PCREL
:
7819 case BFD_RELOC_PPC_LOCAL24PC
:
7820 case BFD_RELOC_32_PLT_PCREL
:
7821 case BFD_RELOC_GPREL16
:
7822 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7823 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7824 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7825 case BFD_RELOC_PPC_EMB_NADDR32
:
7826 case BFD_RELOC_PPC_EMB_NADDR16
:
7827 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7828 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7829 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7830 case BFD_RELOC_PPC_EMB_SDAI16
:
7831 case BFD_RELOC_PPC_EMB_SDA2REL
:
7832 case BFD_RELOC_PPC_EMB_SDA2I16
:
7833 case BFD_RELOC_PPC_EMB_SDA21
:
7834 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7835 case BFD_RELOC_PPC_EMB_MRKREF
:
7836 case BFD_RELOC_PPC_EMB_RELSEC16
:
7837 case BFD_RELOC_PPC_EMB_RELST_LO
:
7838 case BFD_RELOC_PPC_EMB_RELST_HI
:
7839 case BFD_RELOC_PPC_EMB_RELST_HA
:
7840 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7841 case BFD_RELOC_PPC_EMB_RELSDA
:
7842 case BFD_RELOC_PPC64_TOC
:
7843 case BFD_RELOC_PPC_TOC16
:
7844 case BFD_RELOC_PPC64_TOC16_LO
:
7845 case BFD_RELOC_PPC64_TOC16_HI
:
7846 case BFD_RELOC_PPC64_TOC16_HA
:
7847 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7848 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7849 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7850 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7851 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7852 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7853 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7854 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7855 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7856 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7857 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7858 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7859 case BFD_RELOC_PPC64_TLS_PCREL
:
7865 case BFD_RELOC_NONE
:
7867 case BFD_RELOC_CTOR
:
7869 case BFD_RELOC_32_PCREL
:
7872 case BFD_RELOC_64_PCREL
:
7874 case BFD_RELOC_16_PCREL
:
7880 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7885 if (fixP
->fx_size
&& APPLY_RELOC
)
7886 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7887 fieldval
, fixP
->fx_size
);
7889 && (seg
->flags
& SEC_CODE
) != 0
7890 && fixP
->fx_size
== 4
7893 && (fixP
->fx_r_type
== BFD_RELOC_32
7894 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7895 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7896 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7897 _("data in executable section"));
7901 ppc_elf_validate_fix (fixP
, seg
);
7902 fixP
->fx_addnumber
= value
;
7904 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7905 from the section contents. If we are going to be emitting a reloc
7906 then the section contents are immaterial, so don't warn if they
7907 happen to overflow. Leave such warnings to ld. */
7910 fixP
->fx_no_overflow
= 1;
7912 /* Arrange to emit .TOC. as a normal symbol if used in anything
7913 but .TOC.@tocbase. */
7915 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7916 && fixP
->fx_addsy
!= NULL
7917 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7918 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7921 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7922 fixP
->fx_addnumber
= 0;
7926 fixP
->fx_addnumber
= 0;
7928 /* We want to use the offset within the toc, not the actual VMA
7930 fixP
->fx_addnumber
=
7931 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7932 - S_GET_VALUE (ppc_toc_csect
);
7933 /* Set *valP to avoid errors. */
7940 /* Generate a reloc for a fixup. */
7943 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7947 reloc
= XNEW (arelent
);
7949 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7950 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7951 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7952 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */
7953 if (fixp
->fx_r_type
== BFD_RELOC_PPC64_TLS_PCREL
)
7955 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7956 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7958 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7959 _("reloc %d not supported by object file format"),
7960 (int) fixp
->fx_r_type
);
7963 reloc
->addend
= fixp
->fx_addnumber
;
7969 ppc_cfi_frame_initial_instructions (void)
7971 cfi_add_CFA_def_cfa (1, 0);
7975 tc_ppc_regname_to_dw2regnum (char *regname
)
7977 unsigned int regnum
= -1;
7981 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7983 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7984 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7985 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7986 { "spe_acc", 111 }, { "spefscr", 112 }
7989 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7990 if (strcmp (regnames
[i
].name
, regname
) == 0)
7991 return regnames
[i
].dw2regnum
;
7993 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7995 p
= regname
+ 1 + (regname
[1] == '.');
7996 regnum
= strtoul (p
, &q
, 10);
7997 if (p
== q
|| *q
|| regnum
>= 32)
7999 if (regname
[0] == 'f')
8001 else if (regname
[0] == 'v')
8004 else if (regname
[0] == 'c' && regname
[1] == 'r')
8006 p
= regname
+ 2 + (regname
[2] == '.');
8007 if (p
[0] < '0' || p
[0] > '7' || p
[1])
8009 regnum
= p
[0] - '0' + 68;