1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian
;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian
= 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p
= TARGET_REG_NAMES_P
;
96 static void ppc_macro (char *, const struct powerpc_macro
*);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS
*, offsetT
);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars
[] = "#!";
162 static const char ppc_eabi_comment_chars
[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars
= ppc_solaris_comment_chars
;
167 const char *ppc_comment_chars
= ppc_eabi_comment_chars
;
170 const char comment_chars
[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars
[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars
[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS
[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS
[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars
[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment
;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length
;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit
= 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu
= 0;
205 ppc_cpu_t sticky
= 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion
= 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc
= 1,
214 has_small_toc_reloc
= 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table
[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte
, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm
, 0 },
237 { "lcomm", ppc_comm
, 1 },
241 { "bi", ppc_biei
, 0 },
243 { "csect", ppc_csect
, 0 },
244 { "dwsect", ppc_dwsect
, 0 },
245 { "data", ppc_section
, 'd' },
249 { "ei", ppc_biei
, 1 },
251 { "extern", ppc_extern
, 0 },
252 { "function", ppc_function
, 0 },
253 { "lglobl", ppc_lglobl
, 0 },
254 { "ref", ppc_ref
, 0 },
255 { "rename", ppc_rename
, 0 },
256 { "section", ppc_named_section
, 0 },
257 { "stabx", ppc_stabx
, 0 },
258 { "text", ppc_section
, 't' },
259 { "toc", ppc_toc
, 0 },
260 { "long", ppc_xcoff_cons
, 2 },
261 { "llong", ppc_xcoff_cons
, 3 },
262 { "word", ppc_xcoff_cons
, 1 },
263 { "short", ppc_xcoff_cons
, 1 },
264 { "vbyte", ppc_vbyte
, 0 },
268 { "llong", cons
, 8 },
269 { "rdata", ppc_elf_rdata
, 0 },
270 { "rodata", ppc_elf_rdata
, 0 },
271 { "lcomm", ppc_elf_lcomm
, 0 },
272 { "localentry", ppc_elf_localentry
, 0 },
273 { "abiversion", ppc_elf_abiversion
, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute
, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous
, 0 },
280 { "pdata", ppc_pdata
, 0 },
281 { "ydata", ppc_ydata
, 0 },
282 { "reldata", ppc_reldata
, 0 },
283 { "rdata", ppc_rdata
, 0 },
284 { "ualong", ppc_ualong
, 0 },
285 { "znop", ppc_znop
, 0 },
286 { "comm", ppc_pe_comm
, 0 },
287 { "lcomm", ppc_pe_comm
, 1 },
288 { "section", ppc_pe_section
, 0 },
289 { "function", ppc_pe_function
,0 },
290 { "tocd", ppc_pe_tocd
, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine
, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value
;
311 unsigned short flags
;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers
[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG
},
351 { "cr.1", 1, PPC_OPERAND_CR_REG
},
352 { "cr.2", 2, PPC_OPERAND_CR_REG
},
353 { "cr.3", 3, PPC_OPERAND_CR_REG
},
354 { "cr.4", 4, PPC_OPERAND_CR_REG
},
355 { "cr.5", 5, PPC_OPERAND_CR_REG
},
356 { "cr.6", 6, PPC_OPERAND_CR_REG
},
357 { "cr.7", 7, PPC_OPERAND_CR_REG
},
359 { "cr0", 0, PPC_OPERAND_CR_REG
},
360 { "cr1", 1, PPC_OPERAND_CR_REG
},
361 { "cr2", 2, PPC_OPERAND_CR_REG
},
362 { "cr3", 3, PPC_OPERAND_CR_REG
},
363 { "cr4", 4, PPC_OPERAND_CR_REG
},
364 { "cr5", 5, PPC_OPERAND_CR_REG
},
365 { "cr6", 6, PPC_OPERAND_CR_REG
},
366 { "cr7", 7, PPC_OPERAND_CR_REG
},
368 { "ctr", 9, PPC_OPERAND_SPR
},
369 { "dar", 19, PPC_OPERAND_SPR
},
370 { "dec", 22, PPC_OPERAND_SPR
},
371 { "dsisr", 18, PPC_OPERAND_SPR
},
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR
},
375 { "f.1", 1, PPC_OPERAND_FPR
},
376 { "f.10", 10, PPC_OPERAND_FPR
},
377 { "f.11", 11, PPC_OPERAND_FPR
},
378 { "f.12", 12, PPC_OPERAND_FPR
},
379 { "f.13", 13, PPC_OPERAND_FPR
},
380 { "f.14", 14, PPC_OPERAND_FPR
},
381 { "f.15", 15, PPC_OPERAND_FPR
},
382 { "f.16", 16, PPC_OPERAND_FPR
},
383 { "f.17", 17, PPC_OPERAND_FPR
},
384 { "f.18", 18, PPC_OPERAND_FPR
},
385 { "f.19", 19, PPC_OPERAND_FPR
},
386 { "f.2", 2, PPC_OPERAND_FPR
},
387 { "f.20", 20, PPC_OPERAND_FPR
},
388 { "f.21", 21, PPC_OPERAND_FPR
},
389 { "f.22", 22, PPC_OPERAND_FPR
},
390 { "f.23", 23, PPC_OPERAND_FPR
},
391 { "f.24", 24, PPC_OPERAND_FPR
},
392 { "f.25", 25, PPC_OPERAND_FPR
},
393 { "f.26", 26, PPC_OPERAND_FPR
},
394 { "f.27", 27, PPC_OPERAND_FPR
},
395 { "f.28", 28, PPC_OPERAND_FPR
},
396 { "f.29", 29, PPC_OPERAND_FPR
},
397 { "f.3", 3, PPC_OPERAND_FPR
},
398 { "f.30", 30, PPC_OPERAND_FPR
},
399 { "f.31", 31, PPC_OPERAND_FPR
},
400 { "f.32", 32, PPC_OPERAND_VSR
},
401 { "f.33", 33, PPC_OPERAND_VSR
},
402 { "f.34", 34, PPC_OPERAND_VSR
},
403 { "f.35", 35, PPC_OPERAND_VSR
},
404 { "f.36", 36, PPC_OPERAND_VSR
},
405 { "f.37", 37, PPC_OPERAND_VSR
},
406 { "f.38", 38, PPC_OPERAND_VSR
},
407 { "f.39", 39, PPC_OPERAND_VSR
},
408 { "f.4", 4, PPC_OPERAND_FPR
},
409 { "f.40", 40, PPC_OPERAND_VSR
},
410 { "f.41", 41, PPC_OPERAND_VSR
},
411 { "f.42", 42, PPC_OPERAND_VSR
},
412 { "f.43", 43, PPC_OPERAND_VSR
},
413 { "f.44", 44, PPC_OPERAND_VSR
},
414 { "f.45", 45, PPC_OPERAND_VSR
},
415 { "f.46", 46, PPC_OPERAND_VSR
},
416 { "f.47", 47, PPC_OPERAND_VSR
},
417 { "f.48", 48, PPC_OPERAND_VSR
},
418 { "f.49", 49, PPC_OPERAND_VSR
},
419 { "f.5", 5, PPC_OPERAND_FPR
},
420 { "f.50", 50, PPC_OPERAND_VSR
},
421 { "f.51", 51, PPC_OPERAND_VSR
},
422 { "f.52", 52, PPC_OPERAND_VSR
},
423 { "f.53", 53, PPC_OPERAND_VSR
},
424 { "f.54", 54, PPC_OPERAND_VSR
},
425 { "f.55", 55, PPC_OPERAND_VSR
},
426 { "f.56", 56, PPC_OPERAND_VSR
},
427 { "f.57", 57, PPC_OPERAND_VSR
},
428 { "f.58", 58, PPC_OPERAND_VSR
},
429 { "f.59", 59, PPC_OPERAND_VSR
},
430 { "f.6", 6, PPC_OPERAND_FPR
},
431 { "f.60", 60, PPC_OPERAND_VSR
},
432 { "f.61", 61, PPC_OPERAND_VSR
},
433 { "f.62", 62, PPC_OPERAND_VSR
},
434 { "f.63", 63, PPC_OPERAND_VSR
},
435 { "f.7", 7, PPC_OPERAND_FPR
},
436 { "f.8", 8, PPC_OPERAND_FPR
},
437 { "f.9", 9, PPC_OPERAND_FPR
},
439 { "f0", 0, PPC_OPERAND_FPR
},
440 { "f1", 1, PPC_OPERAND_FPR
},
441 { "f10", 10, PPC_OPERAND_FPR
},
442 { "f11", 11, PPC_OPERAND_FPR
},
443 { "f12", 12, PPC_OPERAND_FPR
},
444 { "f13", 13, PPC_OPERAND_FPR
},
445 { "f14", 14, PPC_OPERAND_FPR
},
446 { "f15", 15, PPC_OPERAND_FPR
},
447 { "f16", 16, PPC_OPERAND_FPR
},
448 { "f17", 17, PPC_OPERAND_FPR
},
449 { "f18", 18, PPC_OPERAND_FPR
},
450 { "f19", 19, PPC_OPERAND_FPR
},
451 { "f2", 2, PPC_OPERAND_FPR
},
452 { "f20", 20, PPC_OPERAND_FPR
},
453 { "f21", 21, PPC_OPERAND_FPR
},
454 { "f22", 22, PPC_OPERAND_FPR
},
455 { "f23", 23, PPC_OPERAND_FPR
},
456 { "f24", 24, PPC_OPERAND_FPR
},
457 { "f25", 25, PPC_OPERAND_FPR
},
458 { "f26", 26, PPC_OPERAND_FPR
},
459 { "f27", 27, PPC_OPERAND_FPR
},
460 { "f28", 28, PPC_OPERAND_FPR
},
461 { "f29", 29, PPC_OPERAND_FPR
},
462 { "f3", 3, PPC_OPERAND_FPR
},
463 { "f30", 30, PPC_OPERAND_FPR
},
464 { "f31", 31, PPC_OPERAND_FPR
},
465 { "f32", 32, PPC_OPERAND_VSR
},
466 { "f33", 33, PPC_OPERAND_VSR
},
467 { "f34", 34, PPC_OPERAND_VSR
},
468 { "f35", 35, PPC_OPERAND_VSR
},
469 { "f36", 36, PPC_OPERAND_VSR
},
470 { "f37", 37, PPC_OPERAND_VSR
},
471 { "f38", 38, PPC_OPERAND_VSR
},
472 { "f39", 39, PPC_OPERAND_VSR
},
473 { "f4", 4, PPC_OPERAND_FPR
},
474 { "f40", 40, PPC_OPERAND_VSR
},
475 { "f41", 41, PPC_OPERAND_VSR
},
476 { "f42", 42, PPC_OPERAND_VSR
},
477 { "f43", 43, PPC_OPERAND_VSR
},
478 { "f44", 44, PPC_OPERAND_VSR
},
479 { "f45", 45, PPC_OPERAND_VSR
},
480 { "f46", 46, PPC_OPERAND_VSR
},
481 { "f47", 47, PPC_OPERAND_VSR
},
482 { "f48", 48, PPC_OPERAND_VSR
},
483 { "f49", 49, PPC_OPERAND_VSR
},
484 { "f5", 5, PPC_OPERAND_FPR
},
485 { "f50", 50, PPC_OPERAND_VSR
},
486 { "f51", 51, PPC_OPERAND_VSR
},
487 { "f52", 52, PPC_OPERAND_VSR
},
488 { "f53", 53, PPC_OPERAND_VSR
},
489 { "f54", 54, PPC_OPERAND_VSR
},
490 { "f55", 55, PPC_OPERAND_VSR
},
491 { "f56", 56, PPC_OPERAND_VSR
},
492 { "f57", 57, PPC_OPERAND_VSR
},
493 { "f58", 58, PPC_OPERAND_VSR
},
494 { "f59", 59, PPC_OPERAND_VSR
},
495 { "f6", 6, PPC_OPERAND_FPR
},
496 { "f60", 60, PPC_OPERAND_VSR
},
497 { "f61", 61, PPC_OPERAND_VSR
},
498 { "f62", 62, PPC_OPERAND_VSR
},
499 { "f63", 63, PPC_OPERAND_VSR
},
500 { "f7", 7, PPC_OPERAND_FPR
},
501 { "f8", 8, PPC_OPERAND_FPR
},
502 { "f9", 9, PPC_OPERAND_FPR
},
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR
},
506 { "gqr.1", 1, PPC_OPERAND_GQR
},
507 { "gqr.2", 2, PPC_OPERAND_GQR
},
508 { "gqr.3", 3, PPC_OPERAND_GQR
},
509 { "gqr.4", 4, PPC_OPERAND_GQR
},
510 { "gqr.5", 5, PPC_OPERAND_GQR
},
511 { "gqr.6", 6, PPC_OPERAND_GQR
},
512 { "gqr.7", 7, PPC_OPERAND_GQR
},
513 { "gqr0", 0, PPC_OPERAND_GQR
},
514 { "gqr1", 1, PPC_OPERAND_GQR
},
515 { "gqr2", 2, PPC_OPERAND_GQR
},
516 { "gqr3", 3, PPC_OPERAND_GQR
},
517 { "gqr4", 4, PPC_OPERAND_GQR
},
518 { "gqr5", 5, PPC_OPERAND_GQR
},
519 { "gqr6", 6, PPC_OPERAND_GQR
},
520 { "gqr7", 7, PPC_OPERAND_GQR
},
522 { "lr", 8, PPC_OPERAND_SPR
},
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR
},
526 { "r.1", 1, PPC_OPERAND_GPR
},
527 { "r.10", 10, PPC_OPERAND_GPR
},
528 { "r.11", 11, PPC_OPERAND_GPR
},
529 { "r.12", 12, PPC_OPERAND_GPR
},
530 { "r.13", 13, PPC_OPERAND_GPR
},
531 { "r.14", 14, PPC_OPERAND_GPR
},
532 { "r.15", 15, PPC_OPERAND_GPR
},
533 { "r.16", 16, PPC_OPERAND_GPR
},
534 { "r.17", 17, PPC_OPERAND_GPR
},
535 { "r.18", 18, PPC_OPERAND_GPR
},
536 { "r.19", 19, PPC_OPERAND_GPR
},
537 { "r.2", 2, PPC_OPERAND_GPR
},
538 { "r.20", 20, PPC_OPERAND_GPR
},
539 { "r.21", 21, PPC_OPERAND_GPR
},
540 { "r.22", 22, PPC_OPERAND_GPR
},
541 { "r.23", 23, PPC_OPERAND_GPR
},
542 { "r.24", 24, PPC_OPERAND_GPR
},
543 { "r.25", 25, PPC_OPERAND_GPR
},
544 { "r.26", 26, PPC_OPERAND_GPR
},
545 { "r.27", 27, PPC_OPERAND_GPR
},
546 { "r.28", 28, PPC_OPERAND_GPR
},
547 { "r.29", 29, PPC_OPERAND_GPR
},
548 { "r.3", 3, PPC_OPERAND_GPR
},
549 { "r.30", 30, PPC_OPERAND_GPR
},
550 { "r.31", 31, PPC_OPERAND_GPR
},
551 { "r.4", 4, PPC_OPERAND_GPR
},
552 { "r.5", 5, PPC_OPERAND_GPR
},
553 { "r.6", 6, PPC_OPERAND_GPR
},
554 { "r.7", 7, PPC_OPERAND_GPR
},
555 { "r.8", 8, PPC_OPERAND_GPR
},
556 { "r.9", 9, PPC_OPERAND_GPR
},
558 { "r.sp", 1, PPC_OPERAND_GPR
},
560 { "r.toc", 2, PPC_OPERAND_GPR
},
562 { "r0", 0, PPC_OPERAND_GPR
},
563 { "r1", 1, PPC_OPERAND_GPR
},
564 { "r10", 10, PPC_OPERAND_GPR
},
565 { "r11", 11, PPC_OPERAND_GPR
},
566 { "r12", 12, PPC_OPERAND_GPR
},
567 { "r13", 13, PPC_OPERAND_GPR
},
568 { "r14", 14, PPC_OPERAND_GPR
},
569 { "r15", 15, PPC_OPERAND_GPR
},
570 { "r16", 16, PPC_OPERAND_GPR
},
571 { "r17", 17, PPC_OPERAND_GPR
},
572 { "r18", 18, PPC_OPERAND_GPR
},
573 { "r19", 19, PPC_OPERAND_GPR
},
574 { "r2", 2, PPC_OPERAND_GPR
},
575 { "r20", 20, PPC_OPERAND_GPR
},
576 { "r21", 21, PPC_OPERAND_GPR
},
577 { "r22", 22, PPC_OPERAND_GPR
},
578 { "r23", 23, PPC_OPERAND_GPR
},
579 { "r24", 24, PPC_OPERAND_GPR
},
580 { "r25", 25, PPC_OPERAND_GPR
},
581 { "r26", 26, PPC_OPERAND_GPR
},
582 { "r27", 27, PPC_OPERAND_GPR
},
583 { "r28", 28, PPC_OPERAND_GPR
},
584 { "r29", 29, PPC_OPERAND_GPR
},
585 { "r3", 3, PPC_OPERAND_GPR
},
586 { "r30", 30, PPC_OPERAND_GPR
},
587 { "r31", 31, PPC_OPERAND_GPR
},
588 { "r4", 4, PPC_OPERAND_GPR
},
589 { "r5", 5, PPC_OPERAND_GPR
},
590 { "r6", 6, PPC_OPERAND_GPR
},
591 { "r7", 7, PPC_OPERAND_GPR
},
592 { "r8", 8, PPC_OPERAND_GPR
},
593 { "r9", 9, PPC_OPERAND_GPR
},
595 { "rtoc", 2, PPC_OPERAND_GPR
},
597 { "sdr1", 25, PPC_OPERAND_SPR
},
599 { "sp", 1, PPC_OPERAND_GPR
},
601 { "srr0", 26, PPC_OPERAND_SPR
},
602 { "srr1", 27, PPC_OPERAND_SPR
},
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR
},
606 { "v.1", 1, PPC_OPERAND_VR
},
607 { "v.10", 10, PPC_OPERAND_VR
},
608 { "v.11", 11, PPC_OPERAND_VR
},
609 { "v.12", 12, PPC_OPERAND_VR
},
610 { "v.13", 13, PPC_OPERAND_VR
},
611 { "v.14", 14, PPC_OPERAND_VR
},
612 { "v.15", 15, PPC_OPERAND_VR
},
613 { "v.16", 16, PPC_OPERAND_VR
},
614 { "v.17", 17, PPC_OPERAND_VR
},
615 { "v.18", 18, PPC_OPERAND_VR
},
616 { "v.19", 19, PPC_OPERAND_VR
},
617 { "v.2", 2, PPC_OPERAND_VR
},
618 { "v.20", 20, PPC_OPERAND_VR
},
619 { "v.21", 21, PPC_OPERAND_VR
},
620 { "v.22", 22, PPC_OPERAND_VR
},
621 { "v.23", 23, PPC_OPERAND_VR
},
622 { "v.24", 24, PPC_OPERAND_VR
},
623 { "v.25", 25, PPC_OPERAND_VR
},
624 { "v.26", 26, PPC_OPERAND_VR
},
625 { "v.27", 27, PPC_OPERAND_VR
},
626 { "v.28", 28, PPC_OPERAND_VR
},
627 { "v.29", 29, PPC_OPERAND_VR
},
628 { "v.3", 3, PPC_OPERAND_VR
},
629 { "v.30", 30, PPC_OPERAND_VR
},
630 { "v.31", 31, PPC_OPERAND_VR
},
631 { "v.4", 4, PPC_OPERAND_VR
},
632 { "v.5", 5, PPC_OPERAND_VR
},
633 { "v.6", 6, PPC_OPERAND_VR
},
634 { "v.7", 7, PPC_OPERAND_VR
},
635 { "v.8", 8, PPC_OPERAND_VR
},
636 { "v.9", 9, PPC_OPERAND_VR
},
638 { "v0", 0, PPC_OPERAND_VR
},
639 { "v1", 1, PPC_OPERAND_VR
},
640 { "v10", 10, PPC_OPERAND_VR
},
641 { "v11", 11, PPC_OPERAND_VR
},
642 { "v12", 12, PPC_OPERAND_VR
},
643 { "v13", 13, PPC_OPERAND_VR
},
644 { "v14", 14, PPC_OPERAND_VR
},
645 { "v15", 15, PPC_OPERAND_VR
},
646 { "v16", 16, PPC_OPERAND_VR
},
647 { "v17", 17, PPC_OPERAND_VR
},
648 { "v18", 18, PPC_OPERAND_VR
},
649 { "v19", 19, PPC_OPERAND_VR
},
650 { "v2", 2, PPC_OPERAND_VR
},
651 { "v20", 20, PPC_OPERAND_VR
},
652 { "v21", 21, PPC_OPERAND_VR
},
653 { "v22", 22, PPC_OPERAND_VR
},
654 { "v23", 23, PPC_OPERAND_VR
},
655 { "v24", 24, PPC_OPERAND_VR
},
656 { "v25", 25, PPC_OPERAND_VR
},
657 { "v26", 26, PPC_OPERAND_VR
},
658 { "v27", 27, PPC_OPERAND_VR
},
659 { "v28", 28, PPC_OPERAND_VR
},
660 { "v29", 29, PPC_OPERAND_VR
},
661 { "v3", 3, PPC_OPERAND_VR
},
662 { "v30", 30, PPC_OPERAND_VR
},
663 { "v31", 31, PPC_OPERAND_VR
},
664 { "v4", 4, PPC_OPERAND_VR
},
665 { "v5", 5, PPC_OPERAND_VR
},
666 { "v6", 6, PPC_OPERAND_VR
},
667 { "v7", 7, PPC_OPERAND_VR
},
668 { "v8", 8, PPC_OPERAND_VR
},
669 { "v9", 9, PPC_OPERAND_VR
},
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR
},
673 { "vs.1", 1, PPC_OPERAND_VSR
},
674 { "vs.10", 10, PPC_OPERAND_VSR
},
675 { "vs.11", 11, PPC_OPERAND_VSR
},
676 { "vs.12", 12, PPC_OPERAND_VSR
},
677 { "vs.13", 13, PPC_OPERAND_VSR
},
678 { "vs.14", 14, PPC_OPERAND_VSR
},
679 { "vs.15", 15, PPC_OPERAND_VSR
},
680 { "vs.16", 16, PPC_OPERAND_VSR
},
681 { "vs.17", 17, PPC_OPERAND_VSR
},
682 { "vs.18", 18, PPC_OPERAND_VSR
},
683 { "vs.19", 19, PPC_OPERAND_VSR
},
684 { "vs.2", 2, PPC_OPERAND_VSR
},
685 { "vs.20", 20, PPC_OPERAND_VSR
},
686 { "vs.21", 21, PPC_OPERAND_VSR
},
687 { "vs.22", 22, PPC_OPERAND_VSR
},
688 { "vs.23", 23, PPC_OPERAND_VSR
},
689 { "vs.24", 24, PPC_OPERAND_VSR
},
690 { "vs.25", 25, PPC_OPERAND_VSR
},
691 { "vs.26", 26, PPC_OPERAND_VSR
},
692 { "vs.27", 27, PPC_OPERAND_VSR
},
693 { "vs.28", 28, PPC_OPERAND_VSR
},
694 { "vs.29", 29, PPC_OPERAND_VSR
},
695 { "vs.3", 3, PPC_OPERAND_VSR
},
696 { "vs.30", 30, PPC_OPERAND_VSR
},
697 { "vs.31", 31, PPC_OPERAND_VSR
},
698 { "vs.32", 32, PPC_OPERAND_VSR
},
699 { "vs.33", 33, PPC_OPERAND_VSR
},
700 { "vs.34", 34, PPC_OPERAND_VSR
},
701 { "vs.35", 35, PPC_OPERAND_VSR
},
702 { "vs.36", 36, PPC_OPERAND_VSR
},
703 { "vs.37", 37, PPC_OPERAND_VSR
},
704 { "vs.38", 38, PPC_OPERAND_VSR
},
705 { "vs.39", 39, PPC_OPERAND_VSR
},
706 { "vs.4", 4, PPC_OPERAND_VSR
},
707 { "vs.40", 40, PPC_OPERAND_VSR
},
708 { "vs.41", 41, PPC_OPERAND_VSR
},
709 { "vs.42", 42, PPC_OPERAND_VSR
},
710 { "vs.43", 43, PPC_OPERAND_VSR
},
711 { "vs.44", 44, PPC_OPERAND_VSR
},
712 { "vs.45", 45, PPC_OPERAND_VSR
},
713 { "vs.46", 46, PPC_OPERAND_VSR
},
714 { "vs.47", 47, PPC_OPERAND_VSR
},
715 { "vs.48", 48, PPC_OPERAND_VSR
},
716 { "vs.49", 49, PPC_OPERAND_VSR
},
717 { "vs.5", 5, PPC_OPERAND_VSR
},
718 { "vs.50", 50, PPC_OPERAND_VSR
},
719 { "vs.51", 51, PPC_OPERAND_VSR
},
720 { "vs.52", 52, PPC_OPERAND_VSR
},
721 { "vs.53", 53, PPC_OPERAND_VSR
},
722 { "vs.54", 54, PPC_OPERAND_VSR
},
723 { "vs.55", 55, PPC_OPERAND_VSR
},
724 { "vs.56", 56, PPC_OPERAND_VSR
},
725 { "vs.57", 57, PPC_OPERAND_VSR
},
726 { "vs.58", 58, PPC_OPERAND_VSR
},
727 { "vs.59", 59, PPC_OPERAND_VSR
},
728 { "vs.6", 6, PPC_OPERAND_VSR
},
729 { "vs.60", 60, PPC_OPERAND_VSR
},
730 { "vs.61", 61, PPC_OPERAND_VSR
},
731 { "vs.62", 62, PPC_OPERAND_VSR
},
732 { "vs.63", 63, PPC_OPERAND_VSR
},
733 { "vs.7", 7, PPC_OPERAND_VSR
},
734 { "vs.8", 8, PPC_OPERAND_VSR
},
735 { "vs.9", 9, PPC_OPERAND_VSR
},
737 { "vs0", 0, PPC_OPERAND_VSR
},
738 { "vs1", 1, PPC_OPERAND_VSR
},
739 { "vs10", 10, PPC_OPERAND_VSR
},
740 { "vs11", 11, PPC_OPERAND_VSR
},
741 { "vs12", 12, PPC_OPERAND_VSR
},
742 { "vs13", 13, PPC_OPERAND_VSR
},
743 { "vs14", 14, PPC_OPERAND_VSR
},
744 { "vs15", 15, PPC_OPERAND_VSR
},
745 { "vs16", 16, PPC_OPERAND_VSR
},
746 { "vs17", 17, PPC_OPERAND_VSR
},
747 { "vs18", 18, PPC_OPERAND_VSR
},
748 { "vs19", 19, PPC_OPERAND_VSR
},
749 { "vs2", 2, PPC_OPERAND_VSR
},
750 { "vs20", 20, PPC_OPERAND_VSR
},
751 { "vs21", 21, PPC_OPERAND_VSR
},
752 { "vs22", 22, PPC_OPERAND_VSR
},
753 { "vs23", 23, PPC_OPERAND_VSR
},
754 { "vs24", 24, PPC_OPERAND_VSR
},
755 { "vs25", 25, PPC_OPERAND_VSR
},
756 { "vs26", 26, PPC_OPERAND_VSR
},
757 { "vs27", 27, PPC_OPERAND_VSR
},
758 { "vs28", 28, PPC_OPERAND_VSR
},
759 { "vs29", 29, PPC_OPERAND_VSR
},
760 { "vs3", 3, PPC_OPERAND_VSR
},
761 { "vs30", 30, PPC_OPERAND_VSR
},
762 { "vs31", 31, PPC_OPERAND_VSR
},
763 { "vs32", 32, PPC_OPERAND_VSR
},
764 { "vs33", 33, PPC_OPERAND_VSR
},
765 { "vs34", 34, PPC_OPERAND_VSR
},
766 { "vs35", 35, PPC_OPERAND_VSR
},
767 { "vs36", 36, PPC_OPERAND_VSR
},
768 { "vs37", 37, PPC_OPERAND_VSR
},
769 { "vs38", 38, PPC_OPERAND_VSR
},
770 { "vs39", 39, PPC_OPERAND_VSR
},
771 { "vs4", 4, PPC_OPERAND_VSR
},
772 { "vs40", 40, PPC_OPERAND_VSR
},
773 { "vs41", 41, PPC_OPERAND_VSR
},
774 { "vs42", 42, PPC_OPERAND_VSR
},
775 { "vs43", 43, PPC_OPERAND_VSR
},
776 { "vs44", 44, PPC_OPERAND_VSR
},
777 { "vs45", 45, PPC_OPERAND_VSR
},
778 { "vs46", 46, PPC_OPERAND_VSR
},
779 { "vs47", 47, PPC_OPERAND_VSR
},
780 { "vs48", 48, PPC_OPERAND_VSR
},
781 { "vs49", 49, PPC_OPERAND_VSR
},
782 { "vs5", 5, PPC_OPERAND_VSR
},
783 { "vs50", 50, PPC_OPERAND_VSR
},
784 { "vs51", 51, PPC_OPERAND_VSR
},
785 { "vs52", 52, PPC_OPERAND_VSR
},
786 { "vs53", 53, PPC_OPERAND_VSR
},
787 { "vs54", 54, PPC_OPERAND_VSR
},
788 { "vs55", 55, PPC_OPERAND_VSR
},
789 { "vs56", 56, PPC_OPERAND_VSR
},
790 { "vs57", 57, PPC_OPERAND_VSR
},
791 { "vs58", 58, PPC_OPERAND_VSR
},
792 { "vs59", 59, PPC_OPERAND_VSR
},
793 { "vs6", 6, PPC_OPERAND_VSR
},
794 { "vs60", 60, PPC_OPERAND_VSR
},
795 { "vs61", 61, PPC_OPERAND_VSR
},
796 { "vs62", 62, PPC_OPERAND_VSR
},
797 { "vs63", 63, PPC_OPERAND_VSR
},
798 { "vs7", 7, PPC_OPERAND_VSR
},
799 { "vs8", 8, PPC_OPERAND_VSR
},
800 { "vs9", 9, PPC_OPERAND_VSR
},
802 { "xer", 1, PPC_OPERAND_SPR
}
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg
*
811 reg_name_search (const struct pd_reg
*regs
, int regcount
, const char *name
)
813 int middle
, low
, high
;
821 middle
= (low
+ high
) / 2;
822 cmp
= strcasecmp (name
, regs
[middle
].name
);
828 return ®s
[middle
];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS
*expressionP
)
850 const struct pd_reg
*reg
;
855 /* Find the spelling of the operand. */
856 start
= name
= input_line_pointer
;
857 if (name
[0] == '%' && ISALPHA (name
[1]))
858 name
= ++input_line_pointer
;
860 else if (!reg_names_p
|| !ISALPHA (name
[0]))
863 c
= get_symbol_name (&name
);
864 reg
= reg_name_search (pre_defined_registers
, REG_NAME_CNT
, name
);
866 /* Put back the delimiting char. */
867 *input_line_pointer
= c
;
869 /* Look to see if it's in the register table. */
872 expressionP
->X_op
= O_register
;
873 expressionP
->X_add_number
= reg
->value
;
874 expressionP
->X_md
= reg
->flags
;
876 /* Make the rest nice. */
877 expressionP
->X_add_symbol
= NULL
;
878 expressionP
->X_op_symbol
= NULL
;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer
= start
;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand
;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names
[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG
},
898 { "cr1", 1, PPC_OPERAND_CR_REG
},
899 { "cr2", 2, PPC_OPERAND_CR_REG
},
900 { "cr3", 3, PPC_OPERAND_CR_REG
},
901 { "cr4", 4, PPC_OPERAND_CR_REG
},
902 { "cr5", 5, PPC_OPERAND_CR_REG
},
903 { "cr6", 6, PPC_OPERAND_CR_REG
},
904 { "cr7", 7, PPC_OPERAND_CR_REG
},
905 { "eq", 2, PPC_OPERAND_CR_BIT
},
906 { "gt", 1, PPC_OPERAND_CR_BIT
},
907 { "lt", 0, PPC_OPERAND_CR_BIT
},
908 { "so", 3, PPC_OPERAND_CR_BIT
},
909 { "un", 3, PPC_OPERAND_CR_BIT
}
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name
, expressionS
*exp
)
918 const struct pd_reg
*reg
;
925 reg
= reg_name_search (cr_names
, sizeof cr_names
/ sizeof cr_names
[0],
930 exp
->X_op
= O_register
;
931 exp
->X_add_number
= reg
->value
;
932 exp
->X_md
= reg
->flags
;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS
*left
, operatorT op
, expressionS
*right
)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right
->X_op
== O_register
946 && right
->X_md
== PPC_OPERAND_CR_REG
947 && left
->X_op
== O_constant
948 && left
->X_add_number
== 4)
949 || (left
->X_op
== O_register
950 && left
->X_md
== PPC_OPERAND_CR_REG
951 && right
->X_op
== O_constant
952 && right
->X_add_number
== 4)))
954 left
->X_op
= O_register
;
955 left
->X_md
= PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
;
956 left
->X_add_number
*= right
->X_add_number
;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right
->X_op
== O_register
962 && left
->X_op
== O_register
964 && ((right
->X_md
== PPC_OPERAND_CR_BIT
965 && left
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
))
966 || (right
->X_md
== (PPC_OPERAND_CR_REG
| PPC_OPERAND_CR_BIT
)
967 && left
->X_md
== PPC_OPERAND_CR_BIT
)))
969 left
->X_md
= PPC_OPERAND_CR_BIT
;
970 right
->X_op
= O_constant
;
974 /* Accept reg +/- constant. */
975 if (left
->X_op
== O_register
976 && !((op
== O_add
|| op
== O_subtract
) && right
->X_op
== O_constant
))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right
->X_op
== O_register
)
982 if (op
== O_add
&& left
->X_op
== O_constant
)
983 left
->X_md
= right
->X_md
;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64
= BFD_DEFAULT_TARGET_SIZE
== 64;
996 /* Opcode hash table. */
997 static struct hash_control
*ppc_hash
;
999 /* Macro hash table. */
1000 static struct hash_control
*ppc_macro_hash
;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE
, SHLIB_PIC
, SHLIB_MRELOCATABLE
} shlib
= SHLIB_NONE
;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags
= 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris
= SOLARIS_P
;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment
= 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS
*ppc_text_csects
;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment
= 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS
*ppc_data_csects
;
1039 /* The current csect. */
1040 static symbolS
*ppc_current_csect
;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS
*ppc_toc_csect
;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS
*ppc_toc_frag
;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS
*ppc_after_toc_frag
;
1056 /* The current static block. */
1057 static symbolS
*ppc_current_block
;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection
*ppc_coff_debug_section
;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection
{
1066 /* Subsections are simply linked. */
1067 struct dw_subsection
*link
;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp
;
1076 static struct dw_section
{
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection
*list_subseg
;
1083 /* The anonymous subsection. */
1084 struct dw_subsection
*anon_subseg
;
1085 } dw_sections
[XCOFF_DWSECT_NBR_NAMES
];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section
;
1092 static segT pdata_section
;
1093 static segT reldata_section
;
1094 static segT rdata_section
;
1095 static segT tocdata_section
;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section
;
1099 static segT ppc_current_section
;
1104 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list
;
1106 unsigned int ppc_apuinfo_num
;
1107 unsigned int ppc_apuinfo_num_alloc
;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts
= "b:l:usm:K:VQ:";
1113 const char *const md_shortopts
= "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts
[] = {
1117 {"nops", required_argument
, NULL
, OPTION_NOPS
},
1118 {"ppc476-workaround", no_argument
, &warn_476
, 1},
1119 {"no-ppc476-workaround", no_argument
, &warn_476
, 0},
1120 {NULL
, no_argument
, NULL
, 0}
1122 const size_t md_longopts_size
= sizeof (md_longopts
);
1125 md_parse_option (int c
, const char *arg
)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg
, "e") == 0)
1142 target_big_endian
= 0;
1143 set_target_endian
= 1;
1144 if (ppc_cpu
& PPC_OPCODE_VLE
)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg
, "e") == 0)
1155 target_big_endian
= 1;
1156 set_target_endian
= 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg
, "PIC") == 0 || strcmp (arg
, "pic") == 0)
1168 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg
, "64") == 0)
1182 if (ppc_cpu
& PPC_OPCODE_VLE
)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg
, "32") == 0)
1195 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, arg
);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu
!= 0 && (new_cpu
& PPC_OPCODE_RAW
) == 0)
1200 if (strcmp (arg
, "vle") == 0)
1202 if (set_target_endian
&& target_big_endian
== 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg
, "no-vle") == 0)
1211 sticky
&= ~PPC_OPCODE_VLE
;
1213 new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, "booke");
1214 new_cpu
&= ~PPC_OPCODE_VLE
;
1219 else if (strcmp (arg
, "regnames") == 0)
1222 else if (strcmp (arg
, "no-regnames") == 0)
1223 reg_names_p
= FALSE
;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg
, "relocatable") == 0)
1230 shlib
= SHLIB_MRELOCATABLE
;
1231 ppc_flags
|= EF_PPC_RELOCATABLE
;
1234 else if (strcmp (arg
, "relocatable-lib") == 0)
1236 shlib
= SHLIB_MRELOCATABLE
;
1237 ppc_flags
|= EF_PPC_RELOCATABLE_LIB
;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg
, "emb") == 0)
1242 ppc_flags
|= EF_PPC_EMB
;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg
, "little") == 0
1246 || strcmp (arg
, "little-endian") == 0)
1248 target_big_endian
= 0;
1249 set_target_endian
= 1;
1250 if (ppc_cpu
& PPC_OPCODE_VLE
)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg
, "big") == 0 || strcmp (arg
, "big-endian") == 0)
1256 target_big_endian
= 1;
1257 set_target_endian
= 1;
1260 else if (strcmp (arg
, "solaris") == 0)
1263 ppc_comment_chars
= ppc_solaris_comment_chars
;
1266 else if (strcmp (arg
, "no-solaris") == 0)
1269 ppc_comment_chars
= ppc_eabi_comment_chars
;
1271 else if (strcmp (arg
, "spe2") == 0)
1273 ppc_cpu
|= PPC_OPCODE_SPE2
;
1278 as_bad (_("invalid switch -m%s"), arg
);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit
= strtoul (optarg
, &end
, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream
)
1326 fprintf (stream
, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl, -mgekko, -mbroadway\n\
1344 generate code for PowerPC 750cl/Gekko/Broadway\n\
1345 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1346 fprintf (stream
, _("\
1347 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1348 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1349 -mbooke generate code for 32-bit PowerPC BookE\n\
1350 -ma2 generate code for A2 architecture\n\
1351 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1352 -mpower5, -mpwr5, -mpwr5x\n\
1353 generate code for Power5 architecture\n\
1354 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1355 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1356 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1357 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1358 -mcell generate code for Cell Broadband Engine architecture\n\
1359 -mcom generate code for Power/PowerPC common instructions\n\
1360 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1361 fprintf (stream
, _("\
1362 -maltivec generate code for AltiVec\n\
1363 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1364 -me300 generate code for PowerPC e300 family\n\
1365 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1366 -me500mc, generate code for Freescale e500mc core complex\n\
1367 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1368 -me5500, generate code for Freescale e5500 core complex\n\
1369 -me6500, generate code for Freescale e6500 core complex\n\
1370 -mspe generate code for Motorola SPE instructions\n\
1371 -mspe2 generate code for Freescale SPE2 instructions\n\
1372 -mvle generate code for Freescale VLE instructions\n\
1373 -mtitan generate code for AppliedMicro Titan core complex\n\
1374 -mregnames Allow symbolic names for registers\n\
1375 -mno-regnames Do not allow symbolic names for registers\n"));
1377 fprintf (stream
, _("\
1378 -mrelocatable support for GCC's -mrelocatble option\n\
1379 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1380 -memb set PPC_EMB bit in ELF flags\n\
1381 -mlittle, -mlittle-endian, -le\n\
1382 generate code for a little endian machine\n\
1383 -mbig, -mbig-endian, -be\n\
1384 generate code for a big endian machine\n\
1385 -msolaris generate code for Solaris\n\
1386 -mno-solaris do not generate code for Solaris\n\
1387 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1388 -V print assembler version number\n\
1389 -Qy, -Qn ignored\n"));
1391 fprintf (stream
, _("\
1392 -nops=count when aligning, more than COUNT nops uses a branch\n\
1393 -ppc476-workaround warn if emitting data to code sections\n"));
1396 /* Set ppc_cpu if it is not already set. */
1401 const char *default_os
= TARGET_OS
;
1402 const char *default_cpu
= TARGET_CPU
;
1404 if ((ppc_cpu
& ~(ppc_cpu_t
) PPC_OPCODE_ANY
) == 0)
1407 if (target_big_endian
)
1408 ppc_cpu
|= PPC_OPCODE_PPC
| PPC_OPCODE_64
;
1410 /* The minimum supported cpu for 64-bit little-endian is power8. */
1411 ppc_cpu
|= ppc_parse_cpu (ppc_cpu
, &sticky
, "power8");
1412 else if (strncmp (default_os
, "aix", 3) == 0
1413 && default_os
[3] >= '4' && default_os
[3] <= '9')
1414 ppc_cpu
|= PPC_OPCODE_COMMON
;
1415 else if (strncmp (default_os
, "aix3", 4) == 0)
1416 ppc_cpu
|= PPC_OPCODE_POWER
;
1417 else if (strcmp (default_cpu
, "rs6000") == 0)
1418 ppc_cpu
|= PPC_OPCODE_POWER
;
1419 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1420 ppc_cpu
|= PPC_OPCODE_PPC
;
1422 as_fatal (_("unknown default cpu = %s, os = %s"),
1423 default_cpu
, default_os
);
1427 /* Figure out the BFD architecture to use. This function and ppc_mach
1428 are called well before md_begin, when the output file is opened. */
1430 enum bfd_architecture
1433 const char *default_cpu
= TARGET_CPU
;
1436 if ((ppc_cpu
& PPC_OPCODE_PPC
) != 0)
1437 return bfd_arch_powerpc
;
1438 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
1439 return bfd_arch_powerpc
;
1440 if ((ppc_cpu
& PPC_OPCODE_POWER
) != 0)
1441 return bfd_arch_rs6000
;
1442 if ((ppc_cpu
& (PPC_OPCODE_COMMON
| PPC_OPCODE_ANY
)) != 0)
1444 if (strcmp (default_cpu
, "rs6000") == 0)
1445 return bfd_arch_rs6000
;
1446 else if (strncmp (default_cpu
, "powerpc", 7) == 0)
1447 return bfd_arch_powerpc
;
1450 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1451 return bfd_arch_unknown
;
1458 return bfd_mach_ppc64
;
1459 else if (ppc_arch () == bfd_arch_rs6000
)
1460 return bfd_mach_rs6k
;
1461 else if (ppc_cpu
& PPC_OPCODE_TITAN
)
1462 return bfd_mach_ppc_titan
;
1463 else if (ppc_cpu
& PPC_OPCODE_VLE
)
1464 return bfd_mach_ppc_vle
;
1466 return bfd_mach_ppc
;
1470 ppc_target_format (void)
1474 return target_big_endian
? "pe-powerpc" : "pe-powerpcle";
1476 return "xcoff-powermac";
1479 return (ppc_obj64
? "aix5coff64-rs6000" : "aixcoff-rs6000");
1481 return (ppc_obj64
? "aixcoff64-rs6000" : "aixcoff-rs6000");
1487 return (ppc_obj64
? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1488 # elif defined (TE_VXWORKS)
1489 return "elf32-powerpc-vxworks";
1491 return (target_big_endian
1492 ? (ppc_obj64
? "elf64-powerpc" : "elf32-powerpc")
1493 : (ppc_obj64
? "elf64-powerpcle" : "elf32-powerpcle"));
1498 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1499 Return TRUE if there's a problem, otherwise FALSE. */
1502 insn_validate (const struct powerpc_opcode
*op
)
1504 const unsigned char *o
;
1505 uint64_t omask
= op
->mask
;
1507 /* The mask had better not trim off opcode bits. */
1508 if ((op
->opcode
& omask
) != op
->opcode
)
1510 as_bad (_("mask trims opcode bits for %s"), op
->name
);
1514 /* The operands must not overlap the opcode or each other. */
1515 for (o
= op
->operands
; *o
; ++o
)
1517 bfd_boolean optional
= FALSE
;
1518 if (*o
>= num_powerpc_operands
)
1520 as_bad (_("operand index error for %s"), op
->name
);
1526 const struct powerpc_operand
*operand
= &powerpc_operands
[*o
];
1527 if (operand
->shift
== (int) PPC_OPSHIFT_INV
)
1534 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1536 else if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1538 mask
= (*operand
->insert
) (0, val
, ppc_cpu
, &errmsg
);
1540 else if (operand
->shift
>= 0)
1541 mask
= operand
->bitm
<< operand
->shift
;
1543 mask
= operand
->bitm
>> -operand
->shift
;
1546 as_bad (_("operand %d overlap in %s"),
1547 (int) (o
- op
->operands
), op
->name
);
1551 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
1555 as_bad (_("non-optional operand %d follows optional operand in %s"),
1556 (int) (o
- op
->operands
), op
->name
);
1564 /* Insert opcodes and macros into hash tables. Called at startup and
1565 for .machine pseudo. */
1568 ppc_setup_opcodes (void)
1570 const struct powerpc_opcode
*op
;
1571 const struct powerpc_opcode
*op_end
;
1572 const struct powerpc_macro
*macro
;
1573 const struct powerpc_macro
*macro_end
;
1574 bfd_boolean bad_insn
= FALSE
;
1576 if (ppc_hash
!= NULL
)
1577 hash_die (ppc_hash
);
1578 if (ppc_macro_hash
!= NULL
)
1579 hash_die (ppc_macro_hash
);
1581 /* Insert the opcodes into a hash table. */
1582 ppc_hash
= hash_new ();
1584 if (ENABLE_CHECKING
)
1588 /* An index into powerpc_operands is stored in struct fix
1589 fx_pcrel_adjust which is 8 bits wide. */
1590 gas_assert (num_powerpc_operands
< 256);
1592 /* Check operand masks. Code here and in the disassembler assumes
1593 all the 1's in the mask are contiguous. */
1594 for (i
= 0; i
< num_powerpc_operands
; ++i
)
1596 uint64_t mask
= powerpc_operands
[i
].bitm
;
1600 right_bit
= mask
& -mask
;
1602 right_bit
= mask
& -mask
;
1603 if (mask
!= right_bit
)
1605 as_bad (_("powerpc_operands[%d].bitm invalid"), i
);
1608 for (j
= i
+ 1; j
< num_powerpc_operands
; ++j
)
1609 if (memcmp (&powerpc_operands
[i
], &powerpc_operands
[j
],
1610 sizeof (powerpc_operands
[0])) == 0)
1612 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1619 op_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
1620 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1622 if (ENABLE_CHECKING
)
1624 unsigned int new_opcode
= PPC_OP (op
[0].opcode
);
1626 #ifdef PRINT_OPCODE_TABLE
1627 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1628 op
->name
, (unsigned int) (op
- powerpc_opcodes
),
1629 new_opcode
, (unsigned long long) op
->opcode
,
1630 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1633 /* The major opcodes had better be sorted. Code in the disassembler
1634 assumes the insns are sorted according to major opcode. */
1635 if (op
!= powerpc_opcodes
1636 && new_opcode
< PPC_OP (op
[-1].opcode
))
1638 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1642 if ((op
->flags
& PPC_OPCODE_VLE
) != 0)
1644 as_bad (_("%s is enabled by vle flag"), op
->name
);
1647 if (PPC_OP (op
->opcode
) != 4
1648 && PPC_OP (op
->opcode
) != 31
1649 && (op
->deprecated
& PPC_OPCODE_VLE
) == 0)
1651 as_bad (_("%s not disabled by vle flag"), op
->name
);
1654 bad_insn
|= insn_validate (op
);
1657 if ((ppc_cpu
& op
->flags
) != 0
1658 && !(ppc_cpu
& op
->deprecated
))
1662 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1665 as_bad (_("duplicate instruction %s"),
1672 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1673 for (op
= powerpc_opcodes
; op
< op_end
; op
++)
1674 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1676 op_end
= prefix_opcodes
+ prefix_num_opcodes
;
1677 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1679 if (ENABLE_CHECKING
)
1681 unsigned int new_opcode
= PPC_PREFIX_SEG (op
[0].opcode
);
1683 #ifdef PRINT_OPCODE_TABLE
1684 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1685 op
->name
, (unsigned int) (op
- prefix_opcodes
),
1686 new_opcode
, (unsigned long long) op
->opcode
,
1687 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1690 /* The major opcodes had better be sorted. Code in the disassembler
1691 assumes the insns are sorted according to major opcode. */
1692 if (op
!= prefix_opcodes
1693 && new_opcode
< PPC_PREFIX_SEG (op
[-1].opcode
))
1695 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1698 bad_insn
|= insn_validate (op
);
1701 if ((ppc_cpu
& op
->flags
) != 0
1702 && !(ppc_cpu
& op
->deprecated
))
1706 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1709 as_bad (_("duplicate instruction %s"),
1716 if ((ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1717 for (op
= prefix_opcodes
; op
< op_end
; op
++)
1718 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1720 op_end
= vle_opcodes
+ vle_num_opcodes
;
1721 for (op
= vle_opcodes
; op
< op_end
; op
++)
1723 if (ENABLE_CHECKING
)
1725 unsigned new_seg
= VLE_OP_TO_SEG (VLE_OP (op
[0].opcode
, op
[0].mask
));
1727 #ifdef PRINT_OPCODE_TABLE
1728 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1729 op
->name
, (unsigned int) (op
- vle_opcodes
),
1730 (unsigned int) new_seg
, (unsigned long long) op
->opcode
,
1731 (unsigned long long) op
->mask
, (unsigned long long) op
->flags
);
1734 /* The major opcodes had better be sorted. Code in the disassembler
1735 assumes the insns are sorted according to major opcode. */
1736 if (op
!= vle_opcodes
1737 && new_seg
< VLE_OP_TO_SEG (VLE_OP (op
[-1].opcode
, op
[-1].mask
)))
1739 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1743 bad_insn
|= insn_validate (op
);
1746 if ((ppc_cpu
& op
->flags
) != 0
1747 && !(ppc_cpu
& op
->deprecated
))
1751 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1754 as_bad (_("duplicate instruction %s"),
1761 /* SPE2 instructions */
1762 if ((ppc_cpu
& PPC_OPCODE_SPE2
) == PPC_OPCODE_SPE2
)
1764 op_end
= spe2_opcodes
+ spe2_num_opcodes
;
1765 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1767 if (ENABLE_CHECKING
)
1769 if (op
!= spe2_opcodes
)
1771 unsigned old_seg
, new_seg
;
1773 old_seg
= VLE_OP (op
[-1].opcode
, op
[-1].mask
);
1774 old_seg
= VLE_OP_TO_SEG (old_seg
);
1775 new_seg
= VLE_OP (op
[0].opcode
, op
[0].mask
);
1776 new_seg
= VLE_OP_TO_SEG (new_seg
);
1778 /* The major opcodes had better be sorted. Code in the
1779 disassembler assumes the insns are sorted according to
1781 if (new_seg
< old_seg
)
1783 as_bad (_("major opcode is not sorted for %s"), op
->name
);
1788 bad_insn
|= insn_validate (op
);
1791 if ((ppc_cpu
& op
->flags
) != 0 && !(ppc_cpu
& op
->deprecated
))
1795 retval
= hash_insert (ppc_hash
, op
->name
, (void *) op
);
1798 as_bad (_("duplicate instruction %s"),
1805 for (op
= spe2_opcodes
; op
< op_end
; op
++)
1806 hash_insert (ppc_hash
, op
->name
, (void *) op
);
1809 /* Insert the macros into a hash table. */
1810 ppc_macro_hash
= hash_new ();
1812 macro_end
= powerpc_macros
+ powerpc_num_macros
;
1813 for (macro
= powerpc_macros
; macro
< macro_end
; macro
++)
1815 if ((macro
->flags
& ppc_cpu
) != 0 || (ppc_cpu
& PPC_OPCODE_ANY
) != 0)
1819 retval
= hash_insert (ppc_macro_hash
, macro
->name
, (void *) macro
);
1820 if (retval
!= (const char *) NULL
)
1822 as_bad (_("duplicate macro %s"), macro
->name
);
1832 /* This function is called when the assembler starts up. It is called
1833 after the options have been parsed and the output file has been
1841 ppc_cie_data_alignment
= ppc_obj64
? -8 : -4;
1842 ppc_dwarf2_line_min_insn_length
= (ppc_cpu
& PPC_OPCODE_VLE
) ? 2 : 4;
1845 /* Set the ELF flags if desired. */
1846 if (ppc_flags
&& !msolaris
)
1847 bfd_set_private_flags (stdoutput
, ppc_flags
);
1850 ppc_setup_opcodes ();
1852 /* Tell the main code what the endianness is if it is not overridden
1854 if (!set_target_endian
)
1856 set_target_endian
= 1;
1857 target_big_endian
= PPC_BIG_ENDIAN
;
1861 ppc_coff_debug_section
= coff_section_from_bfd_index (stdoutput
, N_DEBUG
);
1863 /* Create dummy symbols to serve as initial csects. This forces the
1864 text csects to precede the data csects. These symbols will not
1866 ppc_text_csects
= symbol_make ("dummy\001");
1867 symbol_get_tc (ppc_text_csects
)->within
= ppc_text_csects
;
1868 ppc_data_csects
= symbol_make ("dummy\001");
1869 symbol_get_tc (ppc_data_csects
)->within
= ppc_data_csects
;
1874 ppc_current_section
= text_section
;
1875 ppc_previous_section
= 0;
1884 if (ppc_apuinfo_list
== NULL
)
1887 /* Ok, so write the section info out. We have this layout:
1891 0 8 length of "APUinfo\0"
1892 4 (n*4) number of APU's (4 bytes each)
1895 20 APU#1 first APU's info
1896 24 APU#2 second APU's info
1901 asection
*seg
= now_seg
;
1902 subsegT subseg
= now_subseg
;
1903 asection
*apuinfo_secp
= (asection
*) NULL
;
1906 /* Create the .PPC.EMB.apuinfo section. */
1907 apuinfo_secp
= subseg_new (APUINFO_SECTION_NAME
, 0);
1908 bfd_set_section_flags (stdoutput
,
1910 SEC_HAS_CONTENTS
| SEC_READONLY
);
1913 md_number_to_chars (p
, (valueT
) 8, 4);
1916 md_number_to_chars (p
, (valueT
) ppc_apuinfo_num
* 4, 4);
1919 md_number_to_chars (p
, (valueT
) 2, 4);
1922 strcpy (p
, APUINFO_LABEL
);
1924 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
1927 md_number_to_chars (p
, (valueT
) ppc_apuinfo_list
[i
], 4);
1930 frag_align (2, 0, 0);
1932 /* We probably can't restore the current segment, for there likely
1935 subseg_set (seg
, subseg
);
1940 /* Insert an operand value into an instruction. */
1943 ppc_insert_operand (uint64_t insn
,
1944 const struct powerpc_operand
*operand
,
1950 int64_t min
, max
, right
;
1952 max
= operand
->bitm
;
1956 if ((operand
->flags
& PPC_OPERAND_SIGNOPT
) != 0)
1958 /* Extend the allowed range for addis to [-32768, 65535].
1959 Similarly for cmpli and some VLE high part insns. For 64-bit
1960 it would be good to disable this for signed fields since the
1961 value is sign extended into the high 32 bits of the register.
1962 If the value is, say, an address, then we might care about
1963 the high bits. However, gcc as of 2014-06 uses unsigned
1964 values when loading the high part of 64-bit constants using
1966 min
= ~(max
>> 1) & -right
;
1968 else if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
1970 max
= (max
>> 1) & -right
;
1971 min
= ~max
& -right
;
1974 if ((operand
->flags
& PPC_OPERAND_PLUS1
) != 0)
1977 if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
1986 /* Some people write constants with the sign extension done by
1987 hand but only up to 32 bits. This shouldn't really be valid,
1988 but, to permit this code to assemble on a 64-bit host, we
1989 sign extend the 32-bit value to 64 bits if so doing makes the
1990 value valid. We only do this for operands that are 32-bits or
1993 && (operand
->bitm
& ~0xffffffffULL
) == 0
1994 && (val
- (1LL << 32)) >= min
1995 && (val
- (1LL << 32)) <= max
1996 && ((val
- (1LL << 32)) & (right
- 1)) == 0)
1997 val
= val
- (1LL << 32);
1999 /* Similarly, people write expressions like ~(1<<15), and expect
2000 this to be OK for a 32-bit unsigned value. */
2002 && (operand
->bitm
& ~0xffffffffULL
) == 0
2003 && (val
+ (1LL << 32)) >= min
2004 && (val
+ (1LL << 32)) <= max
2005 && ((val
+ (1LL << 32)) & (right
- 1)) == 0)
2006 val
= val
+ (1LL << 32);
2010 || (val
& (right
- 1)) != 0)
2011 as_bad_value_out_of_range (_("operand"), val
, min
, max
, file
, line
);
2014 if (operand
->insert
)
2019 insn
= (*operand
->insert
) (insn
, val
, cpu
, &errmsg
);
2020 if (errmsg
!= (const char *) NULL
)
2021 as_bad_where (file
, line
, "%s", errmsg
);
2023 else if (operand
->shift
>= 0)
2024 insn
|= (val
& operand
->bitm
) << operand
->shift
;
2026 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
2033 /* Parse @got, etc. and return the desired relocation. */
2034 static bfd_reloc_code_real_type
2035 ppc_elf_suffix (char **str_p
, expressionS
*exp_p
)
2039 unsigned int length
: 8;
2040 unsigned int valid32
: 1;
2041 unsigned int valid64
: 1;
2050 const struct map_bfd
*ptr
;
2052 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2053 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2054 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2056 static const struct map_bfd mapping
[] = {
2057 MAP ("l", BFD_RELOC_LO16
),
2058 MAP ("h", BFD_RELOC_HI16
),
2059 MAP ("ha", BFD_RELOC_HI16_S
),
2060 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN
),
2061 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN
),
2062 MAP ("got", BFD_RELOC_16_GOTOFF
),
2063 MAP ("got@l", BFD_RELOC_LO16_GOTOFF
),
2064 MAP ("got@h", BFD_RELOC_HI16_GOTOFF
),
2065 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF
),
2066 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF
),
2067 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF
),
2068 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF
),
2069 MAP ("copy", BFD_RELOC_PPC_COPY
),
2070 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT
),
2071 MAP ("sectoff", BFD_RELOC_16_BASEREL
),
2072 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL
),
2073 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL
),
2074 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL
),
2075 MAP ("tls", BFD_RELOC_PPC_TLS
),
2076 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD
),
2077 MAP ("dtprel", BFD_RELOC_PPC_DTPREL
),
2078 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO
),
2079 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI
),
2080 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA
),
2081 MAP ("tprel", BFD_RELOC_PPC_TPREL
),
2082 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO
),
2083 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI
),
2084 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA
),
2085 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16
),
2086 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO
),
2087 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI
),
2088 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA
),
2089 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16
),
2090 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO
),
2091 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI
),
2092 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA
),
2093 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16
),
2094 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO
),
2095 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI
),
2096 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA
),
2097 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16
),
2098 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO
),
2099 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI
),
2100 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA
),
2101 MAP32 ("fixup", BFD_RELOC_CTOR
),
2102 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL
),
2103 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL
),
2104 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC
),
2105 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC
),
2106 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL
),
2107 MAP32 ("sdarel", BFD_RELOC_GPREL16
),
2108 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A
),
2109 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A
),
2110 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A
),
2111 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32
),
2112 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16
),
2113 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO
),
2114 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI
),
2115 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA
),
2116 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16
),
2117 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL
),
2118 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16
),
2119 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21
),
2120 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO
),
2121 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF
),
2122 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16
),
2123 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO
),
2124 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI
),
2125 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA
),
2126 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD
),
2127 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA
),
2128 MAP32 ("xgot", BFD_RELOC_PPC_TOC16
),
2129 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH
),
2130 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA
),
2131 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER
),
2132 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S
),
2133 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST
),
2134 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S
),
2135 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC
),
2136 MAP64 ("toc", BFD_RELOC_PPC_TOC16
),
2137 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO
),
2138 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI
),
2139 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA
),
2140 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH
),
2141 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA
),
2142 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER
),
2143 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA
),
2144 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST
),
2145 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA
),
2146 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL
),
2147 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH
),
2148 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA
),
2149 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER
),
2150 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA
),
2151 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST
),
2152 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA
),
2153 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC
),
2154 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34
),
2155 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34
),
2156 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34
),
2157 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34
),
2158 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34
),
2159 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34
),
2160 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34
),
2161 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE
}
2165 return BFD_RELOC_NONE
;
2167 for (ch
= *str
, str2
= ident
;
2168 (str2
< ident
+ sizeof (ident
) - 1
2169 && (ISALNUM (ch
) || ch
== '@'));
2172 *str2
++ = TOLOWER (ch
);
2179 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
2180 if (ch
== ptr
->string
[0]
2181 && len
== ptr
->length
2182 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0
2183 && (ppc_obj64
? ptr
->valid64
: ptr
->valid32
))
2185 int reloc
= ptr
->reloc
;
2187 if (!ppc_obj64
&& exp_p
->X_add_number
!= 0)
2191 case BFD_RELOC_16_GOTOFF
:
2192 case BFD_RELOC_LO16_GOTOFF
:
2193 case BFD_RELOC_HI16_GOTOFF
:
2194 case BFD_RELOC_HI16_S_GOTOFF
:
2195 as_warn (_("identifier+constant@got means "
2196 "identifier@got+constant"));
2199 case BFD_RELOC_PPC_GOT_TLSGD16
:
2200 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
2201 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
2202 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
2203 case BFD_RELOC_PPC_GOT_TLSLD16
:
2204 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
2205 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
2206 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
2207 case BFD_RELOC_PPC_GOT_DTPREL16
:
2208 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
2209 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
2210 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
2211 case BFD_RELOC_PPC_GOT_TPREL16
:
2212 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
2213 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
2214 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
2215 as_bad (_("symbol+offset not supported for got tls"));
2220 /* Now check for identifier@suffix+constant. */
2221 if (*str
== '-' || *str
== '+')
2223 char *orig_line
= input_line_pointer
;
2224 expressionS new_exp
;
2226 input_line_pointer
= str
;
2227 expression (&new_exp
);
2228 if (new_exp
.X_op
== O_constant
)
2230 exp_p
->X_add_number
+= new_exp
.X_add_number
;
2231 str
= input_line_pointer
;
2234 if (&input_line_pointer
!= str_p
)
2235 input_line_pointer
= orig_line
;
2239 if (reloc
== (int) BFD_RELOC_PPC64_TOC
2240 && exp_p
->X_op
== O_symbol
2241 && strcmp (S_GET_NAME (exp_p
->X_add_symbol
), ".TOC.") == 0)
2243 /* Change the symbol so that the dummy .TOC. symbol can be
2244 omitted from the object file. */
2245 exp_p
->X_add_symbol
= &abs_symbol
;
2248 return (bfd_reloc_code_real_type
) reloc
;
2251 return BFD_RELOC_NONE
;
2254 /* Support @got, etc. on constants emitted via .short, .int etc. */
2256 bfd_reloc_code_real_type
2257 ppc_elf_parse_cons (expressionS
*exp
, unsigned int nbytes
)
2260 if (nbytes
>= 2 && *input_line_pointer
== '@')
2261 return ppc_elf_suffix (&input_line_pointer
, exp
);
2262 return BFD_RELOC_NONE
;
2265 /* Warn when emitting data to code sections, unless we are emitting
2266 a relocation that ld --ppc476-workaround uses to recognise data
2267 *and* there was an unconditional branch prior to the data. */
2270 ppc_elf_cons_fix_check (expressionS
*exp ATTRIBUTE_UNUSED
,
2271 unsigned int nbytes
, fixS
*fix
)
2274 && (now_seg
->flags
& SEC_CODE
) != 0
2277 || !(fix
->fx_r_type
== BFD_RELOC_32
2278 || fix
->fx_r_type
== BFD_RELOC_CTOR
2279 || fix
->fx_r_type
== BFD_RELOC_32_PCREL
)
2280 || !(last_seg
== now_seg
&& last_subseg
== now_subseg
)
2281 || !((last_insn
& (0x3f << 26)) == (18u << 26)
2282 || ((last_insn
& (0x3f << 26)) == (16u << 26)
2283 && (last_insn
& (0x14 << 21)) == (0x14 << 21))
2284 || ((last_insn
& (0x3f << 26)) == (19u << 26)
2285 && (last_insn
& (0x3ff << 1)) == (16u << 1)
2286 && (last_insn
& (0x14 << 21)) == (0x14 << 21)))))
2288 /* Flag that we've warned. */
2292 as_warn (_("data in executable section"));
2296 /* Solaris pseduo op to change to the .rodata section. */
2298 ppc_elf_rdata (int xxx
)
2300 char *save_line
= input_line_pointer
;
2301 static char section
[] = ".rodata\n";
2303 /* Just pretend this is .section .rodata */
2304 input_line_pointer
= section
;
2305 obj_elf_section (xxx
);
2307 input_line_pointer
= save_line
;
2310 /* Pseudo op to make file scope bss items. */
2312 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED
)
2325 c
= get_symbol_name (&name
);
2327 /* Just after name is now '\0'. */
2328 p
= input_line_pointer
;
2330 SKIP_WHITESPACE_AFTER_NAME ();
2331 if (*input_line_pointer
!= ',')
2333 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2334 ignore_rest_of_line ();
2338 input_line_pointer
++; /* skip ',' */
2339 if ((size
= get_absolute_expression ()) < 0)
2341 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size
);
2342 ignore_rest_of_line ();
2346 /* The third argument to .lcomm is the alignment. */
2347 if (*input_line_pointer
!= ',')
2351 ++input_line_pointer
;
2352 align
= get_absolute_expression ();
2355 as_warn (_("ignoring bad alignment"));
2361 symbolP
= symbol_find_or_make (name
);
2364 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
2366 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2367 S_GET_NAME (symbolP
));
2368 ignore_rest_of_line ();
2372 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
2374 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2375 S_GET_NAME (symbolP
),
2376 (long) S_GET_VALUE (symbolP
),
2379 ignore_rest_of_line ();
2385 old_subsec
= now_subseg
;
2388 /* Convert to a power of 2 alignment. */
2389 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
);
2392 as_bad (_("common alignment not a power of 2"));
2393 ignore_rest_of_line ();
2400 record_alignment (bss_section
, align2
);
2401 subseg_set (bss_section
, 1);
2403 frag_align (align2
, 0, 0);
2404 if (S_GET_SEGMENT (symbolP
) == bss_section
)
2405 symbol_get_frag (symbolP
)->fr_symbol
= 0;
2406 symbol_set_frag (symbolP
, frag_now
);
2407 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
2410 S_SET_SIZE (symbolP
, size
);
2411 S_SET_SEGMENT (symbolP
, bss_section
);
2412 subseg_set (old_sec
, old_subsec
);
2413 demand_empty_rest_of_line ();
2416 /* Pseudo op to set symbol local entry point. */
2418 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED
)
2421 char c
= get_symbol_name (&name
);
2426 elf_symbol_type
*elfsym
;
2428 p
= input_line_pointer
;
2430 SKIP_WHITESPACE_AFTER_NAME ();
2431 if (*input_line_pointer
!= ',')
2434 as_bad (_("expected comma after name `%s' in .localentry directive"),
2437 ignore_rest_of_line ();
2440 input_line_pointer
++;
2442 if (exp
.X_op
== O_absent
)
2444 as_bad (_("missing expression in .localentry directive"));
2445 exp
.X_op
= O_constant
;
2446 exp
.X_add_number
= 0;
2449 sym
= symbol_find_or_make (name
);
2452 if (resolve_expression (&exp
)
2453 && exp
.X_op
== O_constant
)
2455 unsigned int encoded
, ok
;
2458 if (exp
.X_add_number
== 1 || exp
.X_add_number
== 7)
2459 encoded
= exp
.X_add_number
<< STO_PPC64_LOCAL_BIT
;
2462 encoded
= PPC64_SET_LOCAL_ENTRY_OFFSET (exp
.X_add_number
);
2463 if (exp
.X_add_number
!= (offsetT
) PPC64_LOCAL_ENTRY_OFFSET (encoded
))
2465 as_bad (_(".localentry expression for `%s' "
2466 "is not a valid power of 2"), S_GET_NAME (sym
));
2472 bfdsym
= symbol_get_bfdsym (sym
);
2473 elfsym
= elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
2474 gas_assert (elfsym
);
2475 elfsym
->internal_elf_sym
.st_other
&= ~STO_PPC64_LOCAL_MASK
;
2476 elfsym
->internal_elf_sym
.st_other
|= encoded
;
2477 if (ppc_abiversion
== 0)
2482 as_bad (_(".localentry expression for `%s' "
2483 "does not evaluate to a constant"), S_GET_NAME (sym
));
2485 demand_empty_rest_of_line ();
2488 /* Pseudo op to set ABI version. */
2490 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED
)
2495 if (exp
.X_op
== O_absent
)
2497 as_bad (_("missing expression in .abiversion directive"));
2498 exp
.X_op
= O_constant
;
2499 exp
.X_add_number
= 0;
2502 if (resolve_expression (&exp
)
2503 && exp
.X_op
== O_constant
)
2504 ppc_abiversion
= exp
.X_add_number
;
2506 as_bad (_(".abiversion expression does not evaluate to a constant"));
2507 demand_empty_rest_of_line ();
2510 /* Parse a .gnu_attribute directive. */
2512 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED
)
2514 int tag
= obj_elf_vendor_attribute (OBJ_ATTR_GNU
);
2516 /* Check validity of defined powerpc tags. */
2517 if (tag
== Tag_GNU_Power_ABI_FP
2518 || tag
== Tag_GNU_Power_ABI_Vector
2519 || tag
== Tag_GNU_Power_ABI_Struct_Return
)
2523 val
= bfd_elf_get_obj_attr_int (stdoutput
, OBJ_ATTR_GNU
, tag
);
2525 if ((tag
== Tag_GNU_Power_ABI_FP
&& val
> 15)
2526 || (tag
== Tag_GNU_Power_ABI_Vector
&& val
> 3)
2527 || (tag
== Tag_GNU_Power_ABI_Struct_Return
&& val
> 2))
2528 as_warn (_("unknown .gnu_attribute value"));
2532 /* Set ABI version in output file. */
2536 if (ppc_obj64
&& ppc_abiversion
!= 0)
2538 elf_elfheader (stdoutput
)->e_flags
&= ~EF_PPC64_ABI
;
2539 elf_elfheader (stdoutput
)->e_flags
|= ppc_abiversion
& EF_PPC64_ABI
;
2543 /* Validate any relocations emitted for -mrelocatable, possibly adding
2544 fixups for word relocations in writable segments, so we can adjust
2547 ppc_elf_validate_fix (fixS
*fixp
, segT seg
)
2549 if (fixp
->fx_done
|| fixp
->fx_pcrel
)
2558 case SHLIB_MRELOCATABLE
:
2559 if (fixp
->fx_r_type
!= BFD_RELOC_16_GOTOFF
2560 && fixp
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
2561 && fixp
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
2562 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
2563 && fixp
->fx_r_type
!= BFD_RELOC_16_BASEREL
2564 && fixp
->fx_r_type
!= BFD_RELOC_LO16_BASEREL
2565 && fixp
->fx_r_type
!= BFD_RELOC_HI16_BASEREL
2566 && fixp
->fx_r_type
!= BFD_RELOC_HI16_S_BASEREL
2567 && (seg
->flags
& SEC_LOAD
) != 0
2568 && strcmp (segment_name (seg
), ".got2") != 0
2569 && strcmp (segment_name (seg
), ".dtors") != 0
2570 && strcmp (segment_name (seg
), ".ctors") != 0
2571 && strcmp (segment_name (seg
), ".fixup") != 0
2572 && strcmp (segment_name (seg
), ".gcc_except_table") != 0
2573 && strcmp (segment_name (seg
), ".eh_frame") != 0
2574 && strcmp (segment_name (seg
), ".ex_shared") != 0)
2576 if ((seg
->flags
& (SEC_READONLY
| SEC_CODE
)) != 0
2577 || fixp
->fx_r_type
!= BFD_RELOC_CTOR
)
2579 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2580 _("relocation cannot be done when using -mrelocatable"));
2587 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2588 function descriptor sym if the corresponding code sym is used. */
2591 ppc_frob_file_before_adjust (void)
2599 for (symp
= symbol_rootP
; symp
; symp
= symbol_next (symp
))
2605 name
= S_GET_NAME (symp
);
2609 if (! S_IS_WEAK (symp
)
2610 || S_IS_DEFINED (symp
))
2613 dotname
= concat (".", name
, (char *) NULL
);
2614 dotsym
= symbol_find_noref (dotname
, 1);
2616 if (dotsym
!= NULL
&& (symbol_used_p (dotsym
)
2617 || symbol_used_in_reloc_p (dotsym
)))
2618 symbol_mark_used (symp
);
2622 toc
= bfd_get_section_by_name (stdoutput
, ".toc");
2624 && toc_reloc_types
!= has_large_toc_reloc
2625 && bfd_section_size (stdoutput
, toc
) > 0x10000)
2626 as_warn (_("TOC section size exceeds 64k"));
2629 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2630 emitted. Other uses of .TOC. will cause the symbol to be marked
2631 with BSF_KEEP in md_apply_fix. */
2634 ppc_elf_adjust_symtab (void)
2639 symp
= symbol_find (".TOC.");
2642 asymbol
*bsym
= symbol_get_bfdsym (symp
);
2643 if ((bsym
->flags
& BSF_KEEP
) == 0)
2644 symbol_remove (symp
, &symbol_rootP
, &symbol_lastP
);
2648 #endif /* OBJ_ELF */
2653 * Summary of parse_toc_entry.
2655 * in: Input_line_pointer points to the '[' in one of:
2657 * [toc] [tocv] [toc32] [toc64]
2659 * Anything else is an error of one kind or another.
2662 * return value: success or failure
2663 * toc_kind: kind of toc reference
2664 * input_line_pointer:
2665 * success: first char after the ']'
2666 * failure: unchanged
2670 * [toc] - rv == success, toc_kind = default_toc
2671 * [tocv] - rv == success, toc_kind = data_in_toc
2672 * [toc32] - rv == success, toc_kind = must_be_32
2673 * [toc64] - rv == success, toc_kind = must_be_64
2677 enum toc_size_qualifier
2679 default_toc
, /* The toc cell constructed should be the system default size */
2680 data_in_toc
, /* This is a direct reference to a toc cell */
2681 must_be_32
, /* The toc cell constructed must be 32 bits wide */
2682 must_be_64
/* The toc cell constructed must be 64 bits wide */
2686 parse_toc_entry (enum toc_size_qualifier
*toc_kind
)
2691 enum toc_size_qualifier t
;
2693 /* Save the input_line_pointer. */
2694 start
= input_line_pointer
;
2696 /* Skip over the '[' , and whitespace. */
2697 ++input_line_pointer
;
2700 /* Find the spelling of the operand. */
2701 c
= get_symbol_name (&toc_spec
);
2703 if (strcmp (toc_spec
, "toc") == 0)
2707 else if (strcmp (toc_spec
, "tocv") == 0)
2711 else if (strcmp (toc_spec
, "toc32") == 0)
2715 else if (strcmp (toc_spec
, "toc64") == 0)
2721 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec
);
2722 *input_line_pointer
= c
;
2723 input_line_pointer
= start
;
2727 /* Now find the ']'. */
2728 *input_line_pointer
= c
;
2730 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2731 c
= *input_line_pointer
++; /* input_line_pointer->past char in c. */
2735 as_bad (_("syntax error: expected `]', found `%c'"), c
);
2736 input_line_pointer
= start
;
2745 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2746 /* See whether a symbol is in the TOC section. */
2749 ppc_is_toc_sym (symbolS
*sym
)
2752 return (symbol_get_tc (sym
)->symbol_class
== XMC_TC
2753 || symbol_get_tc (sym
)->symbol_class
== XMC_TC0
);
2756 const char *sname
= segment_name (S_GET_SEGMENT (sym
));
2758 return strcmp (sname
, ".toc") == 0;
2760 return strcmp (sname
, ".got") == 0;
2763 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2767 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2769 ppc_apuinfo_section_add (unsigned int apu
, unsigned int version
)
2773 /* Check we don't already exist. */
2774 for (i
= 0; i
< ppc_apuinfo_num
; i
++)
2775 if (ppc_apuinfo_list
[i
] == APUID (apu
, version
))
2778 if (ppc_apuinfo_num
== ppc_apuinfo_num_alloc
)
2780 if (ppc_apuinfo_num_alloc
== 0)
2782 ppc_apuinfo_num_alloc
= 4;
2783 ppc_apuinfo_list
= XNEWVEC (unsigned long, ppc_apuinfo_num_alloc
);
2787 ppc_apuinfo_num_alloc
+= 4;
2788 ppc_apuinfo_list
= XRESIZEVEC (unsigned long, ppc_apuinfo_list
,
2789 ppc_apuinfo_num_alloc
);
2792 ppc_apuinfo_list
[ppc_apuinfo_num
++] = APUID (apu
, version
);
2797 /* Various frobbings of labels and their addresses. */
2799 /* Symbols labelling the current insn. */
2800 struct insn_label_list
2802 struct insn_label_list
*next
;
2806 static struct insn_label_list
*insn_labels
;
2807 static struct insn_label_list
*free_insn_labels
;
2810 ppc_record_label (symbolS
*sym
)
2812 struct insn_label_list
*l
;
2814 if (free_insn_labels
== NULL
)
2815 l
= XNEW (struct insn_label_list
);
2818 l
= free_insn_labels
;
2819 free_insn_labels
= l
->next
;
2823 l
->next
= insn_labels
;
2828 ppc_clear_labels (void)
2830 while (insn_labels
!= NULL
)
2832 struct insn_label_list
*l
= insn_labels
;
2833 insn_labels
= l
->next
;
2834 l
->next
= free_insn_labels
;
2835 free_insn_labels
= l
;
2840 ppc_start_line_hook (void)
2842 ppc_clear_labels ();
2846 ppc_new_dot_label (symbolS
*sym
)
2848 ppc_record_label (sym
);
2850 /* Anchor this label to the current csect for relocations. */
2851 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2856 ppc_frob_label (symbolS
*sym
)
2858 ppc_record_label (sym
);
2861 /* Set the class of a label based on where it is defined. This handles
2862 symbols without suffixes. Also, move the symbol so that it follows
2863 the csect symbol. */
2864 if (ppc_current_csect
!= (symbolS
*) NULL
)
2866 if (symbol_get_tc (sym
)->symbol_class
== -1)
2867 symbol_get_tc (sym
)->symbol_class
= symbol_get_tc (ppc_current_csect
)->symbol_class
;
2869 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
2870 symbol_append (sym
, symbol_get_tc (ppc_current_csect
)->within
,
2871 &symbol_rootP
, &symbol_lastP
);
2872 symbol_get_tc (ppc_current_csect
)->within
= sym
;
2873 symbol_get_tc (sym
)->within
= ppc_current_csect
;
2878 dwarf2_emit_label (sym
);
2882 /* We need to keep a list of fixups. We can't simply generate them as
2883 we go, because that would require us to first create the frag, and
2884 that would screw up references to ``.''. */
2890 bfd_reloc_code_real_type reloc
;
2893 #define MAX_INSN_FIXUPS (5)
2895 /* Return the field size operated on by RELOC, and whether it is
2896 pc-relative in PC_RELATIVE. */
2899 fixup_size (bfd_reloc_code_real_type reloc
, bfd_boolean
*pc_relative
)
2901 unsigned int size
= 0;
2902 bfd_boolean pcrel
= FALSE
;
2906 /* This switch statement must handle all BFD_RELOC values
2907 possible in instruction fixups. As is, it handles all
2908 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2909 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2910 Overkill since data and marker relocs need not be handled
2911 here, but this way we can be sure a needed fixup reloc isn't
2912 accidentally omitted. */
2913 case BFD_RELOC_PPC_EMB_MRKREF
:
2914 case BFD_RELOC_VTABLE_ENTRY
:
2915 case BFD_RELOC_VTABLE_INHERIT
:
2923 case BFD_RELOC_16_BASEREL
:
2924 case BFD_RELOC_16_GOTOFF
:
2925 case BFD_RELOC_GPREL16
:
2926 case BFD_RELOC_HI16
:
2927 case BFD_RELOC_HI16_BASEREL
:
2928 case BFD_RELOC_HI16_GOTOFF
:
2929 case BFD_RELOC_HI16_PLTOFF
:
2930 case BFD_RELOC_HI16_S
:
2931 case BFD_RELOC_HI16_S_BASEREL
:
2932 case BFD_RELOC_HI16_S_GOTOFF
:
2933 case BFD_RELOC_HI16_S_PLTOFF
:
2934 case BFD_RELOC_LO16
:
2935 case BFD_RELOC_LO16_BASEREL
:
2936 case BFD_RELOC_LO16_GOTOFF
:
2937 case BFD_RELOC_LO16_PLTOFF
:
2938 case BFD_RELOC_PPC64_ADDR16_DS
:
2939 case BFD_RELOC_PPC64_ADDR16_HIGH
:
2940 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
2941 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
2942 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
2943 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
2944 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
2945 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
2946 case BFD_RELOC_PPC64_DTPREL16_DS
:
2947 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
2948 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
2949 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
2950 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
2951 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
2952 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
2953 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
2954 case BFD_RELOC_PPC64_GOT16_DS
:
2955 case BFD_RELOC_PPC64_GOT16_LO_DS
:
2956 case BFD_RELOC_PPC64_HIGHER
:
2957 case BFD_RELOC_PPC64_HIGHER_S
:
2958 case BFD_RELOC_PPC64_HIGHEST
:
2959 case BFD_RELOC_PPC64_HIGHEST_S
:
2960 case BFD_RELOC_PPC64_PLT16_LO_DS
:
2961 case BFD_RELOC_PPC64_PLTGOT16
:
2962 case BFD_RELOC_PPC64_PLTGOT16_DS
:
2963 case BFD_RELOC_PPC64_PLTGOT16_HA
:
2964 case BFD_RELOC_PPC64_PLTGOT16_HI
:
2965 case BFD_RELOC_PPC64_PLTGOT16_LO
:
2966 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
2967 case BFD_RELOC_PPC64_SECTOFF_DS
:
2968 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
2969 case BFD_RELOC_PPC64_TOC16_DS
:
2970 case BFD_RELOC_PPC64_TOC16_HA
:
2971 case BFD_RELOC_PPC64_TOC16_HI
:
2972 case BFD_RELOC_PPC64_TOC16_LO
:
2973 case BFD_RELOC_PPC64_TOC16_LO_DS
:
2974 case BFD_RELOC_PPC64_TPREL16_DS
:
2975 case BFD_RELOC_PPC64_TPREL16_HIGH
:
2976 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
2977 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
2978 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
2979 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
2980 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
2981 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
2983 case BFD_RELOC_PPC_BA16
:
2985 case BFD_RELOC_PPC_DTPREL16
:
2986 case BFD_RELOC_PPC_DTPREL16_HA
:
2987 case BFD_RELOC_PPC_DTPREL16_HI
:
2988 case BFD_RELOC_PPC_DTPREL16_LO
:
2989 case BFD_RELOC_PPC_EMB_NADDR16
:
2990 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
2991 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
2992 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
2993 case BFD_RELOC_PPC_EMB_RELSDA
:
2994 case BFD_RELOC_PPC_EMB_RELSEC16
:
2995 case BFD_RELOC_PPC_EMB_RELST_LO
:
2996 case BFD_RELOC_PPC_EMB_RELST_HI
:
2997 case BFD_RELOC_PPC_EMB_RELST_HA
:
2998 case BFD_RELOC_PPC_EMB_SDA2I16
:
2999 case BFD_RELOC_PPC_EMB_SDA2REL
:
3000 case BFD_RELOC_PPC_EMB_SDAI16
:
3001 case BFD_RELOC_PPC_GOT_DTPREL16
:
3002 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
3003 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
3004 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3005 case BFD_RELOC_PPC_GOT_TLSGD16
:
3006 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
3007 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
3008 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
3009 case BFD_RELOC_PPC_GOT_TLSLD16
:
3010 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
3011 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
3012 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
3013 case BFD_RELOC_PPC_GOT_TPREL16
:
3014 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
3015 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
3016 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3017 case BFD_RELOC_PPC_TOC16
:
3018 case BFD_RELOC_PPC_TPREL16
:
3019 case BFD_RELOC_PPC_TPREL16_HA
:
3020 case BFD_RELOC_PPC_TPREL16_HI
:
3021 case BFD_RELOC_PPC_TPREL16_LO
:
3025 case BFD_RELOC_16_PCREL
:
3026 case BFD_RELOC_HI16_PCREL
:
3027 case BFD_RELOC_HI16_S_PCREL
:
3028 case BFD_RELOC_LO16_PCREL
:
3029 case BFD_RELOC_PPC64_REL16_HIGH
:
3030 case BFD_RELOC_PPC64_REL16_HIGHA
:
3031 case BFD_RELOC_PPC64_REL16_HIGHER
:
3032 case BFD_RELOC_PPC64_REL16_HIGHER34
:
3033 case BFD_RELOC_PPC64_REL16_HIGHERA
:
3034 case BFD_RELOC_PPC64_REL16_HIGHERA34
:
3035 case BFD_RELOC_PPC64_REL16_HIGHEST
:
3036 case BFD_RELOC_PPC64_REL16_HIGHEST34
:
3037 case BFD_RELOC_PPC64_REL16_HIGHESTA
:
3038 case BFD_RELOC_PPC64_REL16_HIGHESTA34
:
3040 case BFD_RELOC_PPC_B16
:
3042 case BFD_RELOC_PPC_VLE_REL8
:
3047 case BFD_RELOC_16_GOT_PCREL
: /* coff reloc, bad name re size. */
3049 case BFD_RELOC_32_GOTOFF
:
3050 case BFD_RELOC_32_PLTOFF
:
3052 case BFD_RELOC_CTOR
:
3054 case BFD_RELOC_PPC64_ENTRY
:
3055 case BFD_RELOC_PPC_16DX_HA
:
3057 case BFD_RELOC_PPC_BA16
:
3059 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
3060 case BFD_RELOC_PPC_BA16_BRTAKEN
:
3061 case BFD_RELOC_PPC_BA26
:
3062 case BFD_RELOC_PPC_EMB_BIT_FLD
:
3063 case BFD_RELOC_PPC_EMB_NADDR32
:
3064 case BFD_RELOC_PPC_EMB_SDA21
:
3065 case BFD_RELOC_PPC_TLS
:
3066 case BFD_RELOC_PPC_TLSGD
:
3067 case BFD_RELOC_PPC_TLSLD
:
3068 case BFD_RELOC_PPC_VLE_HA16A
:
3069 case BFD_RELOC_PPC_VLE_HA16D
:
3070 case BFD_RELOC_PPC_VLE_HI16A
:
3071 case BFD_RELOC_PPC_VLE_HI16D
:
3072 case BFD_RELOC_PPC_VLE_LO16A
:
3073 case BFD_RELOC_PPC_VLE_LO16D
:
3074 case BFD_RELOC_PPC_VLE_SDA21
:
3075 case BFD_RELOC_PPC_VLE_SDA21_LO
:
3076 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3077 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
3078 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3079 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
3080 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3081 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
3086 case BFD_RELOC_24_PLT_PCREL
:
3087 case BFD_RELOC_32_PCREL
:
3088 case BFD_RELOC_32_PLT_PCREL
:
3089 case BFD_RELOC_PPC64_REL24_NOTOC
:
3091 case BFD_RELOC_PPC_B16
:
3093 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3094 case BFD_RELOC_PPC_B16_BRTAKEN
:
3095 case BFD_RELOC_PPC_B26
:
3096 case BFD_RELOC_PPC_LOCAL24PC
:
3097 case BFD_RELOC_PPC_REL16DX_HA
:
3098 case BFD_RELOC_PPC_VLE_REL15
:
3099 case BFD_RELOC_PPC_VLE_REL24
:
3105 case BFD_RELOC_CTOR
:
3107 case BFD_RELOC_PPC_COPY
:
3108 case BFD_RELOC_PPC_DTPMOD
:
3109 case BFD_RELOC_PPC_DTPREL
:
3110 case BFD_RELOC_PPC_GLOB_DAT
:
3111 case BFD_RELOC_PPC_TPREL
:
3112 size
= ppc_obj64
? 8 : 4;
3116 case BFD_RELOC_64_PLTOFF
:
3117 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
3118 case BFD_RELOC_PPC64_D28
:
3119 case BFD_RELOC_PPC64_D34
:
3120 case BFD_RELOC_PPC64_D34_LO
:
3121 case BFD_RELOC_PPC64_D34_HI30
:
3122 case BFD_RELOC_PPC64_D34_HA30
:
3123 case BFD_RELOC_PPC64_TOC
:
3127 case BFD_RELOC_64_PCREL
:
3128 case BFD_RELOC_64_PLT_PCREL
:
3129 case BFD_RELOC_PPC64_GOT_PCREL34
:
3130 case BFD_RELOC_PPC64_PCREL28
:
3131 case BFD_RELOC_PPC64_PCREL34
:
3132 case BFD_RELOC_PPC64_PLT_PCREL34
:
3141 if (ENABLE_CHECKING
)
3143 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
3144 if (reloc_howto
!= NULL
3145 && (size
!= bfd_get_reloc_size (reloc_howto
)
3146 || pcrel
!= reloc_howto
->pc_relative
))
3148 as_bad (_("%s howto doesn't match size/pcrel in gas"),
3153 *pc_relative
= pcrel
;
3158 /* If we have parsed a call to __tls_get_addr, parse an argument like
3159 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3160 is successfully parsed, *STR is updated past the trailing
3161 parenthesis and trailing white space, and *TLS_FIX contains the
3162 reloc and arg expression. */
3165 parse_tls_arg (char **str
, const expressionS
*exp
, struct ppc_fixup
*tls_fix
)
3167 const char *sym_name
= S_GET_NAME (exp
->X_add_symbol
);
3168 if (sym_name
[0] == '.')
3171 tls_fix
->reloc
= BFD_RELOC_NONE
;
3172 if (strcasecmp (sym_name
, "__tls_get_addr") == 0)
3174 char *hold
= input_line_pointer
;
3175 input_line_pointer
= *str
+ 1;
3176 expression (&tls_fix
->exp
);
3177 if (tls_fix
->exp
.X_op
== O_symbol
)
3179 if (strncasecmp (input_line_pointer
, "@tlsgd)", 7) == 0)
3180 tls_fix
->reloc
= BFD_RELOC_PPC_TLSGD
;
3181 else if (strncasecmp (input_line_pointer
, "@tlsld)", 7) == 0)
3182 tls_fix
->reloc
= BFD_RELOC_PPC_TLSLD
;
3183 if (tls_fix
->reloc
!= BFD_RELOC_NONE
)
3185 input_line_pointer
+= 7;
3187 *str
= input_line_pointer
;
3190 input_line_pointer
= hold
;
3192 return tls_fix
->reloc
!= BFD_RELOC_NONE
;
3196 /* This routine is called for each instruction to be assembled. */
3199 md_assemble (char *str
)
3202 const struct powerpc_opcode
*opcode
;
3204 const unsigned char *opindex_ptr
;
3207 struct ppc_fixup fixups
[MAX_INSN_FIXUPS
];
3212 unsigned int insn_length
;
3214 /* Get the opcode. */
3215 for (s
= str
; *s
!= '\0' && ! ISSPACE (*s
); s
++)
3220 /* Look up the opcode in the hash table. */
3221 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, str
);
3222 if (opcode
== (const struct powerpc_opcode
*) NULL
)
3224 const struct powerpc_macro
*macro
;
3226 macro
= (const struct powerpc_macro
*) hash_find (ppc_macro_hash
, str
);
3227 if (macro
== (const struct powerpc_macro
*) NULL
)
3228 as_bad (_("unrecognized opcode: `%s'"), str
);
3230 ppc_macro (s
, macro
);
3232 ppc_clear_labels ();
3236 insn
= opcode
->opcode
;
3239 while (ISSPACE (*str
))
3242 /* PowerPC operands are just expressions. The only real issue is
3243 that a few operand types are optional. If an instruction has
3244 multiple optional operands and one is omitted, then all optional
3245 operands past the first omitted one must also be omitted. */
3246 int num_optional_operands
= 0;
3247 int num_optional_provided
= 0;
3249 /* Gather the operands. */
3253 for (opindex_ptr
= opcode
->operands
; *opindex_ptr
!= 0; opindex_ptr
++)
3255 const struct powerpc_operand
*operand
;
3261 if (next_opindex
== 0)
3262 operand
= &powerpc_operands
[*opindex_ptr
];
3265 operand
= &powerpc_operands
[next_opindex
];
3270 /* If this is an optional operand, and we are skipping it, just
3271 insert the default value, usually a zero. */
3272 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3273 && !((operand
->flags
& PPC_OPERAND_OPTIONAL32
) != 0 && ppc_obj64
))
3275 if (num_optional_operands
== 0)
3277 const unsigned char *optr
;
3283 for (optr
= opindex_ptr
; *optr
!= 0; optr
++)
3285 const struct powerpc_operand
*op
;
3286 op
= &powerpc_operands
[*optr
];
3290 if ((op
->flags
& PPC_OPERAND_OPTIONAL
) != 0
3291 && !((op
->flags
& PPC_OPERAND_OPTIONAL32
) != 0
3293 ++num_optional_operands
;
3295 if (s
!= NULL
&& *s
!= '\0')
3299 /* Look for the start of the next operand. */
3300 if ((op
->flags
& PPC_OPERAND_PARENS
) != 0)
3301 s
= strpbrk (s
, "(,");
3303 s
= strchr (s
, ',');
3309 omitted
= total
- provided
;
3310 num_optional_provided
= num_optional_operands
- omitted
;
3312 if (--num_optional_provided
< 0)
3314 int64_t val
= ppc_optional_operand_value (operand
, insn
, ppc_cpu
,
3315 num_optional_provided
);
3316 if (operand
->insert
)
3318 insn
= (*operand
->insert
) (insn
, val
, ppc_cpu
, &errmsg
);
3319 if (errmsg
!= (const char *) NULL
)
3320 as_bad ("%s", errmsg
);
3322 else if (operand
->shift
>= 0)
3323 insn
|= (val
& operand
->bitm
) << operand
->shift
;
3325 insn
|= (val
& operand
->bitm
) >> -operand
->shift
;
3327 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0)
3328 next_opindex
= *opindex_ptr
+ 1;
3333 /* Gather the operand. */
3334 hold
= input_line_pointer
;
3335 input_line_pointer
= str
;
3338 if (*input_line_pointer
== '[')
3340 /* We are expecting something like the second argument here:
3342 * lwz r4,[toc].GS.0.static_int(rtoc)
3343 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3344 * The argument following the `]' must be a symbol name, and the
3345 * register must be the toc register: 'rtoc' or '2'
3347 * The effect is to 0 as the displacement field
3348 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3349 * the appropriate variation) reloc against it based on the symbol.
3350 * The linker will build the toc, and insert the resolved toc offset.
3353 * o The size of the toc entry is currently assumed to be
3354 * 32 bits. This should not be assumed to be a hard coded
3356 * o In an effort to cope with a change from 32 to 64 bits,
3357 * there are also toc entries that are specified to be
3358 * either 32 or 64 bits:
3359 * lwz r4,[toc32].GS.0.static_int(rtoc)
3360 * lwz r4,[toc64].GS.0.static_int(rtoc)
3361 * These demand toc entries of the specified size, and the
3362 * instruction probably requires it.
3366 enum toc_size_qualifier toc_kind
;
3367 bfd_reloc_code_real_type toc_reloc
;
3369 /* Go parse off the [tocXX] part. */
3370 valid_toc
= parse_toc_entry (&toc_kind
);
3374 ignore_rest_of_line ();
3378 /* Now get the symbol following the ']'. */
3384 /* In this case, we may not have seen the symbol yet,
3385 since it is allowed to appear on a .extern or .globl
3386 or just be a label in the .data section. */
3387 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3390 /* 1. The symbol must be defined and either in the toc
3391 section, or a global.
3392 2. The reloc generated must have the TOCDEFN flag set
3393 in upper bit mess of the reloc type.
3394 FIXME: It's a little confusing what the tocv
3395 qualifier can be used for. At the very least, I've
3396 seen three uses, only one of which I'm sure I can
3398 if (ex
.X_op
== O_symbol
)
3400 gas_assert (ex
.X_add_symbol
!= NULL
);
3401 if (symbol_get_bfdsym (ex
.X_add_symbol
)->section
3404 as_bad (_("[tocv] symbol is not a toc symbol"));
3408 toc_reloc
= BFD_RELOC_PPC_TOC16
;
3411 /* FIXME: these next two specifically specify 32/64 bit
3412 toc entries. We don't support them today. Is this
3413 the right way to say that? */
3414 toc_reloc
= BFD_RELOC_NONE
;
3415 as_bad (_("unimplemented toc32 expression modifier"));
3418 /* FIXME: see above. */
3419 toc_reloc
= BFD_RELOC_NONE
;
3420 as_bad (_("unimplemented toc64 expression modifier"));
3424 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3430 /* We need to generate a fixup for this expression. */
3431 if (fc
>= MAX_INSN_FIXUPS
)
3432 as_fatal (_("too many fixups"));
3434 fixups
[fc
].reloc
= toc_reloc
;
3435 fixups
[fc
].exp
= ex
;
3436 fixups
[fc
].opindex
= *opindex_ptr
;
3439 /* Ok. We've set up the fixup for the instruction. Now make it
3440 look like the constant 0 was found here. */
3442 ex
.X_op
= O_constant
;
3443 ex
.X_add_number
= 0;
3444 ex
.X_add_symbol
= NULL
;
3445 ex
.X_op_symbol
= NULL
;
3452 && (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3453 || ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)))
3454 || !register_name (&ex
))
3456 char save_lex
= lex_type
['%'];
3458 if (((operand
->flags
& PPC_OPERAND_CR_REG
) != 0)
3459 || (operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
3462 lex_type
['%'] |= LEX_BEGIN_NAME
;
3466 lex_type
['%'] = save_lex
;
3470 str
= input_line_pointer
;
3471 input_line_pointer
= hold
;
3473 if (ex
.X_op
== O_illegal
)
3474 as_bad (_("illegal operand"));
3475 else if (ex
.X_op
== O_absent
)
3476 as_bad (_("missing operand"));
3477 else if (ex
.X_op
== O_register
)
3481 & (PPC_OPERAND_GPR
| PPC_OPERAND_FPR
| PPC_OPERAND_VR
3482 | PPC_OPERAND_VSR
| PPC_OPERAND_CR_BIT
| PPC_OPERAND_CR_REG
3483 | PPC_OPERAND_SPR
| PPC_OPERAND_GQR
)) != 0
3484 && !((ex
.X_md
& PPC_OPERAND_GPR
) != 0
3485 && ex
.X_add_number
!= 0
3486 && (operand
->flags
& PPC_OPERAND_GPR_0
) != 0))
3487 as_warn (_("invalid register expression"));
3488 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3489 ppc_cpu
, (char *) NULL
, 0);
3491 else if (ex
.X_op
== O_constant
)
3494 /* Allow @HA, @L, @H on constants. */
3495 bfd_reloc_code_real_type reloc
;
3496 char *orig_str
= str
;
3498 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3505 case BFD_RELOC_LO16
:
3506 ex
.X_add_number
&= 0xffff;
3507 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3508 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3511 case BFD_RELOC_HI16
:
3512 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3514 /* PowerPC64 @h is tested for overflow. */
3515 ex
.X_add_number
= (addressT
) ex
.X_add_number
>> 16;
3516 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3518 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3520 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3526 case BFD_RELOC_PPC64_ADDR16_HIGH
:
3527 ex
.X_add_number
= PPC_HI (ex
.X_add_number
);
3528 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3529 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3532 case BFD_RELOC_HI16_S
:
3533 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
3535 /* PowerPC64 @ha is tested for overflow. */
3537 = ((addressT
) ex
.X_add_number
+ 0x8000) >> 16;
3538 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3540 addressT sign
= (((addressT
) -1 >> 16) + 1) >> 1;
3542 = ((addressT
) ex
.X_add_number
^ sign
) - sign
;
3548 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
3549 ex
.X_add_number
= PPC_HA (ex
.X_add_number
);
3550 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3551 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3554 case BFD_RELOC_PPC64_HIGHER
:
3555 ex
.X_add_number
= PPC_HIGHER (ex
.X_add_number
);
3556 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3557 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3560 case BFD_RELOC_PPC64_HIGHER_S
:
3561 ex
.X_add_number
= PPC_HIGHERA (ex
.X_add_number
);
3562 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3563 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3566 case BFD_RELOC_PPC64_HIGHEST
:
3567 ex
.X_add_number
= PPC_HIGHEST (ex
.X_add_number
);
3568 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3569 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3572 case BFD_RELOC_PPC64_HIGHEST_S
:
3573 ex
.X_add_number
= PPC_HIGHESTA (ex
.X_add_number
);
3574 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
3575 ex
.X_add_number
= SEX16 (ex
.X_add_number
);
3578 #endif /* OBJ_ELF */
3579 insn
= ppc_insert_operand (insn
, operand
, ex
.X_add_number
,
3580 ppc_cpu
, (char *) NULL
, 0);
3584 bfd_reloc_code_real_type reloc
= BFD_RELOC_NONE
;
3586 /* Look for a __tls_get_addr arg using the insane old syntax. */
3587 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3588 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3590 fixups
[fc
].opindex
= *opindex_ptr
;
3594 if ((reloc
= ppc_elf_suffix (&str
, &ex
)) != BFD_RELOC_NONE
)
3596 /* If VLE-mode convert LO/HI/HA relocations. */
3597 if (opcode
->flags
& PPC_OPCODE_VLE
)
3599 uint64_t tmp_insn
= insn
& opcode
->mask
;
3601 int use_a_reloc
= (tmp_insn
== E_OR2I_INSN
3602 || tmp_insn
== E_AND2I_DOT_INSN
3603 || tmp_insn
== E_OR2IS_INSN
3604 || tmp_insn
== E_LI_INSN
3605 || tmp_insn
== E_LIS_INSN
3606 || tmp_insn
== E_AND2IS_DOT_INSN
);
3609 int use_d_reloc
= (tmp_insn
== E_ADD2I_DOT_INSN
3610 || tmp_insn
== E_ADD2IS_INSN
3611 || tmp_insn
== E_CMP16I_INSN
3612 || tmp_insn
== E_MULL2I_INSN
3613 || tmp_insn
== E_CMPL16I_INSN
3614 || tmp_insn
== E_CMPH16I_INSN
3615 || tmp_insn
== E_CMPHL16I_INSN
);
3622 case BFD_RELOC_PPC_EMB_SDA21
:
3623 reloc
= BFD_RELOC_PPC_VLE_SDA21
;
3626 case BFD_RELOC_LO16
:
3628 reloc
= BFD_RELOC_PPC_VLE_LO16D
;
3629 else if (use_a_reloc
)
3630 reloc
= BFD_RELOC_PPC_VLE_LO16A
;
3633 case BFD_RELOC_HI16
:
3635 reloc
= BFD_RELOC_PPC_VLE_HI16D
;
3636 else if (use_a_reloc
)
3637 reloc
= BFD_RELOC_PPC_VLE_HI16A
;
3640 case BFD_RELOC_HI16_S
:
3642 reloc
= BFD_RELOC_PPC_VLE_HA16D
;
3643 else if (use_a_reloc
)
3644 reloc
= BFD_RELOC_PPC_VLE_HA16A
;
3647 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
3649 reloc
= BFD_RELOC_PPC_VLE_SDAREL_LO16D
;
3652 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
3654 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HI16D
;
3657 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
3659 reloc
= BFD_RELOC_PPC_VLE_SDAREL_HA16D
;
3664 /* TLS and other tweaks. */
3670 case BFD_RELOC_PPC_TLS
:
3671 if (!_bfd_elf_ppc_at_tls_transform (opcode
->opcode
, 0))
3672 as_bad (_("@tls may not be used with \"%s\" operands"),
3674 else if (operand
->shift
!= 11)
3675 as_bad (_("@tls may only be used in last operand"));
3677 insn
= ppc_insert_operand (insn
, operand
,
3679 ppc_cpu
, (char *) NULL
, 0);
3682 /* We'll only use the 32 (or 64) bit form of these relocations
3683 in constants. Instructions get the 16 bit form. */
3684 case BFD_RELOC_PPC_DTPREL
:
3685 reloc
= BFD_RELOC_PPC_DTPREL16
;
3688 case BFD_RELOC_PPC_TPREL
:
3689 reloc
= BFD_RELOC_PPC_TPREL16
;
3692 case BFD_RELOC_PPC64_PCREL34
:
3693 if (operand
->bitm
== 0xfffffffULL
)
3695 reloc
= BFD_RELOC_PPC64_PCREL28
;
3699 case BFD_RELOC_PPC64_GOT_PCREL34
:
3700 case BFD_RELOC_PPC64_PLT_PCREL34
:
3701 if (operand
->bitm
!= 0x3ffffffffULL
3702 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3703 as_warn (_("%s unsupported on this instruction"), "@pcrel");
3706 case BFD_RELOC_LO16
:
3707 if (operand
->bitm
== 0x3ffffffffULL
3708 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3709 reloc
= BFD_RELOC_PPC64_D34_LO
;
3710 else if ((operand
->bitm
| 0xf) != 0xffff
3711 || operand
->shift
!= 0
3712 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3713 as_warn (_("%s unsupported on this instruction"), "@l");
3716 case BFD_RELOC_HI16
:
3717 if (operand
->bitm
== 0x3ffffffffULL
3718 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3719 reloc
= BFD_RELOC_PPC64_D34_HI30
;
3720 else if (operand
->bitm
!= 0xffff
3721 || operand
->shift
!= 0
3722 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3723 as_warn (_("%s unsupported on this instruction"), "@h");
3726 case BFD_RELOC_HI16_S
:
3727 if (operand
->bitm
== 0x3ffffffffULL
3728 && (operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0)
3729 reloc
= BFD_RELOC_PPC64_D34_HA30
;
3730 else if (operand
->bitm
== 0xffff
3731 && operand
->shift
== (int) PPC_OPSHIFT_INV
3732 && opcode
->opcode
== (19 << 26) + (2 << 1))
3734 reloc
= BFD_RELOC_PPC_16DX_HA
;
3735 else if (operand
->bitm
!= 0xffff
3736 || operand
->shift
!= 0
3737 || (operand
->flags
& PPC_OPERAND_NEGATIVE
) != 0)
3738 as_warn (_("%s unsupported on this instruction"), "@ha");
3741 #endif /* OBJ_ELF */
3743 if (reloc
!= BFD_RELOC_NONE
)
3745 /* Determine a BFD reloc value based on the operand information.
3746 We are only prepared to turn a few of the operands into
3748 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3749 | PPC_OPERAND_ABSOLUTE
)) != 0
3750 && operand
->bitm
== 0x3fffffc
3751 && operand
->shift
== 0)
3752 reloc
= BFD_RELOC_PPC_B26
;
3753 else if ((operand
->flags
& (PPC_OPERAND_RELATIVE
3754 | PPC_OPERAND_ABSOLUTE
)) != 0
3755 && operand
->bitm
== 0xfffc
3756 && operand
->shift
== 0)
3757 reloc
= BFD_RELOC_PPC_B16
;
3758 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3759 && operand
->bitm
== 0x1fe
3760 && operand
->shift
== -1)
3761 reloc
= BFD_RELOC_PPC_VLE_REL8
;
3762 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3763 && operand
->bitm
== 0xfffe
3764 && operand
->shift
== 0)
3765 reloc
= BFD_RELOC_PPC_VLE_REL15
;
3766 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0
3767 && operand
->bitm
== 0x1fffffe
3768 && operand
->shift
== 0)
3769 reloc
= BFD_RELOC_PPC_VLE_REL24
;
3770 else if ((operand
->flags
& PPC_OPERAND_NEGATIVE
) == 0
3771 && (operand
->bitm
& 0xfff0) == 0xfff0
3772 && operand
->shift
== 0)
3774 reloc
= BFD_RELOC_16
;
3775 #if defined OBJ_XCOFF || defined OBJ_ELF
3776 /* Note: the symbol may be not yet defined. */
3777 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
3778 && ppc_is_toc_sym (ex
.X_add_symbol
))
3780 reloc
= BFD_RELOC_PPC_TOC16
;
3782 as_warn (_("assuming %s on symbol"),
3783 ppc_obj64
? "@toc" : "@xgot");
3788 else if (operand
->bitm
== 0x3ffffffffULL
)
3789 reloc
= BFD_RELOC_PPC64_D34
;
3790 else if (operand
->bitm
== 0xfffffffULL
)
3791 reloc
= BFD_RELOC_PPC64_D28
;
3793 /* For the absolute forms of branches, convert the PC
3794 relative form back into the absolute. */
3795 if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
3799 case BFD_RELOC_PPC_B26
:
3800 reloc
= BFD_RELOC_PPC_BA26
;
3802 case BFD_RELOC_PPC_B16
:
3803 reloc
= BFD_RELOC_PPC_BA16
;
3806 case BFD_RELOC_PPC_B16_BRTAKEN
:
3807 reloc
= BFD_RELOC_PPC_BA16_BRTAKEN
;
3809 case BFD_RELOC_PPC_B16_BRNTAKEN
:
3810 reloc
= BFD_RELOC_PPC_BA16_BRNTAKEN
;
3821 case BFD_RELOC_PPC_TOC16
:
3822 toc_reloc_types
|= has_small_toc_reloc
;
3824 case BFD_RELOC_PPC64_TOC16_LO
:
3825 case BFD_RELOC_PPC64_TOC16_HI
:
3826 case BFD_RELOC_PPC64_TOC16_HA
:
3827 toc_reloc_types
|= has_large_toc_reloc
;
3834 && (operand
->flags
& (PPC_OPERAND_DS
| PPC_OPERAND_DQ
)) != 0)
3839 reloc
= BFD_RELOC_PPC64_ADDR16_DS
;
3842 case BFD_RELOC_LO16
:
3843 reloc
= BFD_RELOC_PPC64_ADDR16_LO_DS
;
3846 case BFD_RELOC_16_GOTOFF
:
3847 reloc
= BFD_RELOC_PPC64_GOT16_DS
;
3850 case BFD_RELOC_LO16_GOTOFF
:
3851 reloc
= BFD_RELOC_PPC64_GOT16_LO_DS
;
3854 case BFD_RELOC_LO16_PLTOFF
:
3855 reloc
= BFD_RELOC_PPC64_PLT16_LO_DS
;
3858 case BFD_RELOC_16_BASEREL
:
3859 reloc
= BFD_RELOC_PPC64_SECTOFF_DS
;
3862 case BFD_RELOC_LO16_BASEREL
:
3863 reloc
= BFD_RELOC_PPC64_SECTOFF_LO_DS
;
3866 case BFD_RELOC_PPC_TOC16
:
3867 reloc
= BFD_RELOC_PPC64_TOC16_DS
;
3870 case BFD_RELOC_PPC64_TOC16_LO
:
3871 reloc
= BFD_RELOC_PPC64_TOC16_LO_DS
;
3874 case BFD_RELOC_PPC64_PLTGOT16
:
3875 reloc
= BFD_RELOC_PPC64_PLTGOT16_DS
;
3878 case BFD_RELOC_PPC64_PLTGOT16_LO
:
3879 reloc
= BFD_RELOC_PPC64_PLTGOT16_LO_DS
;
3882 case BFD_RELOC_PPC_DTPREL16
:
3883 reloc
= BFD_RELOC_PPC64_DTPREL16_DS
;
3886 case BFD_RELOC_PPC_DTPREL16_LO
:
3887 reloc
= BFD_RELOC_PPC64_DTPREL16_LO_DS
;
3890 case BFD_RELOC_PPC_TPREL16
:
3891 reloc
= BFD_RELOC_PPC64_TPREL16_DS
;
3894 case BFD_RELOC_PPC_TPREL16_LO
:
3895 reloc
= BFD_RELOC_PPC64_TPREL16_LO_DS
;
3898 case BFD_RELOC_PPC_GOT_DTPREL16
:
3899 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
3900 case BFD_RELOC_PPC_GOT_TPREL16
:
3901 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
3905 as_bad (_("unsupported relocation for DS offset field"));
3910 /* Look for a __tls_get_addr arg after any __tls_get_addr
3911 modifiers like @plt. This fixup must be emitted before
3912 the usual call fixup. */
3913 if (ex
.X_op
== O_symbol
&& *str
== '(' && fc
< MAX_INSN_FIXUPS
3914 && parse_tls_arg (&str
, &ex
, &fixups
[fc
]))
3916 fixups
[fc
].opindex
= *opindex_ptr
;
3921 /* We need to generate a fixup for this expression. */
3922 if (fc
>= MAX_INSN_FIXUPS
)
3923 as_fatal (_("too many fixups"));
3924 fixups
[fc
].exp
= ex
;
3925 fixups
[fc
].opindex
= *opindex_ptr
;
3926 fixups
[fc
].reloc
= reloc
;
3934 /* If expecting more operands, then we want to see "),". */
3935 if (*str
== endc
&& opindex_ptr
[1] != 0)
3939 while (ISSPACE (*str
));
3943 else if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0)
3948 /* The call to expression should have advanced str past any
3956 else if (*str
!= '\0')
3958 as_bad (_("syntax error; found `%c', expected `%c'"), *str
, endc
);
3961 else if (endc
== ')')
3963 as_bad (_("syntax error; end of line, expected `%c'"), endc
);
3968 while (ISSPACE (*str
))
3972 as_bad (_("junk at end of line: `%s'"), str
);
3975 /* Do we need/want an APUinfo section? */
3976 if ((ppc_cpu
& (PPC_OPCODE_E500
| PPC_OPCODE_E500MC
| PPC_OPCODE_VLE
)) != 0
3979 /* These are all version "1". */
3980 if (opcode
->flags
& PPC_OPCODE_SPE
)
3981 ppc_apuinfo_section_add (PPC_APUINFO_SPE
, 1);
3982 if (opcode
->flags
& PPC_OPCODE_ISEL
)
3983 ppc_apuinfo_section_add (PPC_APUINFO_ISEL
, 1);
3984 if (opcode
->flags
& PPC_OPCODE_EFS
)
3985 ppc_apuinfo_section_add (PPC_APUINFO_EFS
, 1);
3986 if (opcode
->flags
& PPC_OPCODE_BRLOCK
)
3987 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK
, 1);
3988 if (opcode
->flags
& PPC_OPCODE_PMR
)
3989 ppc_apuinfo_section_add (PPC_APUINFO_PMR
, 1);
3990 if (opcode
->flags
& PPC_OPCODE_CACHELCK
)
3991 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK
, 1);
3992 if (opcode
->flags
& PPC_OPCODE_RFMCI
)
3993 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI
, 1);
3994 /* Only set the VLE flag if the instruction has been pulled via
3995 the VLE instruction set. This way the flag is guaranteed to
3996 be set for VLE-only instructions or for VLE-only processors,
3997 however it'll remain clear for dual-mode instructions on
3998 dual-mode and, more importantly, standard-mode processors. */
3999 if ((ppc_cpu
& opcode
->flags
) == PPC_OPCODE_VLE
)
4001 ppc_apuinfo_section_add (PPC_APUINFO_VLE
, 1);
4002 if (elf_section_data (now_seg
) != NULL
)
4003 elf_section_data (now_seg
)->this_hdr
.sh_flags
|= SHF_PPC_VLE
;
4008 /* Write out the instruction. */
4011 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0)
4012 /* All instructions can start on a 2 byte boundary for VLE. */
4015 if (frag_now
->insn_addr
!= addr_mask
)
4017 /* Don't emit instructions to a frag started for data, or for a
4018 CPU differing in VLE mode. Data is allowed to be misaligned,
4019 and it's possible to start a new frag in the middle of
4021 frag_wane (frag_now
);
4025 /* Check that insns within the frag are aligned. ppc_frag_check
4026 will ensure that the frag start address is aligned. */
4027 if ((frag_now_fix () & addr_mask
) != 0)
4028 as_bad (_("instruction address is not a multiple of %d"), addr_mask
+ 1);
4030 /* Differentiate between two, four, and eight byte insns. */
4032 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && PPC_OP_SE_VLE (insn
))
4034 else if ((opcode
->flags
& PPC_OPCODE_POWERXX
) != 0
4035 && PPC_PREFIX_P (insn
))
4037 struct insn_label_list
*l
;
4041 /* 8-byte prefix instructions are not allowed to cross 64-byte
4043 frag_align_code (6, 4);
4044 record_alignment (now_seg
, 6);
4046 /* Update "dot" in any expressions used by this instruction, and
4047 a label attached to the instruction. By "attached" we mean
4048 on the same source line as the instruction and without any
4049 intervening semicolons. */
4050 dot_value
= frag_now_fix ();
4051 dot_frag
= frag_now
;
4052 for (l
= insn_labels
; l
!= NULL
; l
= l
->next
)
4054 symbol_set_frag (l
->label
, dot_frag
);
4055 S_SET_VALUE (l
->label
, dot_value
);
4059 ppc_clear_labels ();
4061 f
= frag_more (insn_length
);
4062 frag_now
->insn_addr
= addr_mask
;
4064 /* The prefix part of an 8-byte instruction always occupies the lower
4065 addressed word in a doubleword, regardless of endianness. */
4066 if (!target_big_endian
&& insn_length
== 8)
4068 md_number_to_chars (f
, PPC_GET_PREFIX (insn
), 4);
4069 md_number_to_chars (f
+ 4, PPC_GET_SUFFIX (insn
), 4);
4072 md_number_to_chars (f
, insn
, insn_length
);
4076 last_subseg
= now_subseg
;
4079 dwarf2_emit_insn (insn_length
);
4082 /* Create any fixups. */
4083 for (i
= 0; i
< fc
; i
++)
4086 if (fixups
[i
].reloc
!= BFD_RELOC_NONE
)
4089 unsigned int size
= fixup_size (fixups
[i
].reloc
, &pcrel
);
4090 int offset
= target_big_endian
? (insn_length
- size
) : 0;
4092 fixP
= fix_new_exp (frag_now
,
4093 f
- frag_now
->fr_literal
+ offset
,
4101 const struct powerpc_operand
*operand
;
4103 operand
= &powerpc_operands
[fixups
[i
].opindex
];
4104 fixP
= fix_new_exp (frag_now
,
4105 f
- frag_now
->fr_literal
,
4108 (operand
->flags
& PPC_OPERAND_RELATIVE
) != 0,
4111 fixP
->fx_pcrel_adjust
= fixups
[i
].opindex
;
4115 /* Handle a macro. Gather all the operands, transform them as
4116 described by the macro, and call md_assemble recursively. All the
4117 operands are separated by commas; we don't accept parentheses
4118 around operands here. */
4121 ppc_macro (char *str
, const struct powerpc_macro
*macro
)
4132 /* Gather the users operands into the operands array. */
4137 if (count
>= sizeof operands
/ sizeof operands
[0])
4139 operands
[count
++] = s
;
4140 s
= strchr (s
, ',');
4141 if (s
== (char *) NULL
)
4146 if (count
!= macro
->operands
)
4148 as_bad (_("wrong number of operands"));
4152 /* Work out how large the string must be (the size is unbounded
4153 because it includes user input). */
4155 format
= macro
->format
;
4156 while (*format
!= '\0')
4165 arg
= strtol (format
+ 1, &send
, 10);
4166 know (send
!= format
&& arg
< count
);
4167 len
+= strlen (operands
[arg
]);
4172 /* Put the string together. */
4173 complete
= s
= XNEWVEC (char, len
+ 1);
4174 format
= macro
->format
;
4175 while (*format
!= '\0')
4181 arg
= strtol (format
+ 1, &send
, 10);
4182 strcpy (s
, operands
[arg
]);
4189 /* Assemble the constructed instruction. */
4190 md_assemble (complete
);
4195 /* For ELF, add support for SHT_ORDERED. */
4198 ppc_section_type (char *str
, size_t len
)
4200 if (len
== 7 && strncmp (str
, "ordered", 7) == 0)
4207 ppc_section_flags (flagword flags
, bfd_vma attr ATTRIBUTE_UNUSED
, int type
)
4209 if (type
== SHT_ORDERED
)
4210 flags
|= SEC_ALLOC
| SEC_LOAD
| SEC_SORT_ENTRIES
;
4216 ppc_elf_section_letter (int letter
, const char **ptrmsg
)
4221 *ptrmsg
= _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
4224 #endif /* OBJ_ELF */
4227 /* Pseudo-op handling. */
4229 /* The .byte pseudo-op. This is similar to the normal .byte
4230 pseudo-op, but it can also take a single ASCII string. */
4233 ppc_byte (int ignore ATTRIBUTE_UNUSED
)
4237 if (*input_line_pointer
!= '\"')
4243 /* Gather characters. A real double quote is doubled. Unusual
4244 characters are not permitted. */
4245 ++input_line_pointer
;
4250 c
= *input_line_pointer
++;
4254 if (*input_line_pointer
!= '\"')
4256 ++input_line_pointer
;
4259 FRAG_APPEND_1_CHAR (c
);
4263 if (warn_476
&& count
!= 0 && (now_seg
->flags
& SEC_CODE
) != 0)
4264 as_warn (_("data in executable section"));
4265 demand_empty_rest_of_line ();
4270 /* XCOFF specific pseudo-op handling. */
4272 /* This is set if we are creating a .stabx symbol, since we don't want
4273 to handle symbol suffixes for such symbols. */
4274 static bfd_boolean ppc_stab_symbol
;
4276 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4277 symbols in the .bss segment as though they were local common
4278 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4279 aligns .comm and .lcomm to 4 bytes. */
4282 ppc_comm (int lcomm
)
4284 asection
*current_seg
= now_seg
;
4285 subsegT current_subseg
= now_subseg
;
4291 symbolS
*lcomm_sym
= NULL
;
4295 endc
= get_symbol_name (&name
);
4296 end_name
= input_line_pointer
;
4297 (void) restore_line_pointer (endc
);
4299 if (*input_line_pointer
!= ',')
4301 as_bad (_("missing size"));
4302 ignore_rest_of_line ();
4305 ++input_line_pointer
;
4307 size
= get_absolute_expression ();
4310 as_bad (_("negative size"));
4311 ignore_rest_of_line ();
4317 /* The third argument to .comm is the alignment. */
4318 if (*input_line_pointer
!= ',')
4322 ++input_line_pointer
;
4323 align
= get_absolute_expression ();
4326 as_warn (_("ignoring bad alignment"));
4336 /* The third argument to .lcomm appears to be the real local
4337 common symbol to create. References to the symbol named in
4338 the first argument are turned into references to the third
4340 if (*input_line_pointer
!= ',')
4342 as_bad (_("missing real symbol name"));
4343 ignore_rest_of_line ();
4346 ++input_line_pointer
;
4348 lcomm_endc
= get_symbol_name (&lcomm_name
);
4350 lcomm_sym
= symbol_find_or_make (lcomm_name
);
4352 (void) restore_line_pointer (lcomm_endc
);
4354 /* The fourth argument to .lcomm is the alignment. */
4355 if (*input_line_pointer
!= ',')
4364 ++input_line_pointer
;
4365 align
= get_absolute_expression ();
4368 as_warn (_("ignoring bad alignment"));
4375 sym
= symbol_find_or_make (name
);
4378 if (S_IS_DEFINED (sym
)
4379 || S_GET_VALUE (sym
) != 0)
4381 as_bad (_("attempt to redefine symbol"));
4382 ignore_rest_of_line ();
4386 record_alignment (bss_section
, align
);
4389 || ! S_IS_DEFINED (lcomm_sym
))
4398 S_SET_EXTERNAL (sym
);
4402 symbol_get_tc (lcomm_sym
)->output
= 1;
4403 def_sym
= lcomm_sym
;
4407 subseg_set (bss_section
, 1);
4408 frag_align (align
, 0, 0);
4410 symbol_set_frag (def_sym
, frag_now
);
4411 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, def_sym
,
4412 def_size
, (char *) NULL
);
4414 S_SET_SEGMENT (def_sym
, bss_section
);
4415 symbol_get_tc (def_sym
)->align
= align
;
4419 /* Align the size of lcomm_sym. */
4420 symbol_get_frag (lcomm_sym
)->fr_offset
=
4421 ((symbol_get_frag (lcomm_sym
)->fr_offset
+ (1 << align
) - 1)
4422 &~ ((1 << align
) - 1));
4423 if (align
> symbol_get_tc (lcomm_sym
)->align
)
4424 symbol_get_tc (lcomm_sym
)->align
= align
;
4429 /* Make sym an offset from lcomm_sym. */
4430 S_SET_SEGMENT (sym
, bss_section
);
4431 symbol_set_frag (sym
, symbol_get_frag (lcomm_sym
));
4432 S_SET_VALUE (sym
, symbol_get_frag (lcomm_sym
)->fr_offset
);
4433 symbol_get_frag (lcomm_sym
)->fr_offset
+= size
;
4436 subseg_set (current_seg
, current_subseg
);
4438 demand_empty_rest_of_line ();
4441 /* The .csect pseudo-op. This switches us into a different
4442 subsegment. The first argument is a symbol whose value is the
4443 start of the .csect. In COFF, csect symbols get special aux
4444 entries defined by the x_csect field of union internal_auxent. The
4445 optional second argument is the alignment (the default is 2). */
4448 ppc_csect (int ignore ATTRIBUTE_UNUSED
)
4455 endc
= get_symbol_name (&name
);
4457 sym
= symbol_find_or_make (name
);
4459 (void) restore_line_pointer (endc
);
4461 if (S_GET_NAME (sym
)[0] == '\0')
4463 /* An unnamed csect is assumed to be [PR]. */
4464 symbol_get_tc (sym
)->symbol_class
= XMC_PR
;
4468 if (*input_line_pointer
== ',')
4470 ++input_line_pointer
;
4471 align
= get_absolute_expression ();
4474 ppc_change_csect (sym
, align
);
4476 demand_empty_rest_of_line ();
4479 /* Change to a different csect. */
4482 ppc_change_csect (symbolS
*sym
, offsetT align
)
4484 if (S_IS_DEFINED (sym
))
4485 subseg_set (S_GET_SEGMENT (sym
), symbol_get_tc (sym
)->subseg
);
4495 /* This is a new csect. We need to look at the symbol class to
4496 figure out whether it should go in the text section or the
4500 switch (symbol_get_tc (sym
)->symbol_class
)
4510 S_SET_SEGMENT (sym
, text_section
);
4511 symbol_get_tc (sym
)->subseg
= ppc_text_subsegment
;
4512 ++ppc_text_subsegment
;
4513 list_ptr
= &ppc_text_csects
;
4523 if (ppc_toc_csect
!= NULL
4524 && (symbol_get_tc (ppc_toc_csect
)->subseg
+ 1
4525 == ppc_data_subsegment
))
4527 S_SET_SEGMENT (sym
, data_section
);
4528 symbol_get_tc (sym
)->subseg
= ppc_data_subsegment
;
4529 ++ppc_data_subsegment
;
4530 list_ptr
= &ppc_data_csects
;
4536 /* We set the obstack chunk size to a small value before
4537 changing subsegments, so that we don't use a lot of memory
4538 space for what may be a small section. */
4539 hold_chunksize
= chunksize
;
4542 sec
= subseg_new (segment_name (S_GET_SEGMENT (sym
)),
4543 symbol_get_tc (sym
)->subseg
);
4545 chunksize
= hold_chunksize
;
4548 ppc_after_toc_frag
= frag_now
;
4550 record_alignment (sec
, align
);
4552 frag_align_code (align
, 0);
4554 frag_align (align
, 0, 0);
4556 symbol_set_frag (sym
, frag_now
);
4557 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
4559 symbol_get_tc (sym
)->align
= align
;
4560 symbol_get_tc (sym
)->output
= 1;
4561 symbol_get_tc (sym
)->within
= sym
;
4563 for (list
= *list_ptr
;
4564 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
4565 list
= symbol_get_tc (list
)->next
)
4567 symbol_get_tc (list
)->next
= sym
;
4569 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
4570 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
4574 ppc_current_csect
= sym
;
4578 ppc_change_debug_section (unsigned int idx
, subsegT subseg
)
4582 const struct xcoff_dwsect_name
*dw
= &xcoff_dwsect_names
[idx
];
4584 sec
= subseg_new (dw
->name
, subseg
);
4585 oldflags
= bfd_get_section_flags (stdoutput
, sec
);
4586 if (oldflags
== SEC_NO_FLAGS
)
4588 /* Just created section. */
4589 gas_assert (dw_sections
[idx
].sect
== NULL
);
4591 bfd_set_section_flags (stdoutput
, sec
, SEC_DEBUGGING
);
4592 bfd_set_section_alignment (stdoutput
, sec
, 0);
4593 dw_sections
[idx
].sect
= sec
;
4596 /* Not anymore in a csect. */
4597 ppc_current_csect
= NULL
;
4600 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4601 .dwsect flag [, opt-label ]
4605 ppc_dwsect (int ignore ATTRIBUTE_UNUSED
)
4609 const struct xcoff_dwsect_name
*dw
;
4610 struct dw_subsection
*subseg
;
4611 struct dw_section
*dws
;
4615 flag
= get_absolute_expression ();
4617 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
4618 if (xcoff_dwsect_names
[i
].flag
== flag
)
4620 dw
= &xcoff_dwsect_names
[i
];
4624 /* Parse opt-label. */
4625 if (*input_line_pointer
== ',')
4630 ++input_line_pointer
;
4632 c
= get_symbol_name (&label
);
4633 opt_label
= symbol_find_or_make (label
);
4634 (void) restore_line_pointer (c
);
4639 demand_empty_rest_of_line ();
4641 /* Return now in case of unknown subsection. */
4644 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4649 /* Find the subsection. */
4650 dws
= &dw_sections
[i
];
4652 if (opt_label
!= NULL
&& S_IS_DEFINED (opt_label
))
4654 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4655 if (dws
->sect
== NULL
|| S_GET_SEGMENT (opt_label
) != dws
->sect
)
4657 as_bad (_("label %s was not defined in this dwarf section"),
4658 S_GET_NAME (opt_label
));
4659 subseg
= dws
->anon_subseg
;
4663 subseg
= symbol_get_tc (opt_label
)->u
.dw
;
4668 /* Switch to the subsection. */
4669 ppc_change_debug_section (i
, subseg
->subseg
);
4673 /* Create a new dw subsection. */
4674 subseg
= XNEW (struct dw_subsection
);
4676 if (opt_label
== NULL
)
4678 /* The anonymous one. */
4680 subseg
->link
= NULL
;
4681 dws
->anon_subseg
= subseg
;
4686 if (dws
->list_subseg
!= NULL
)
4687 subseg
->subseg
= dws
->list_subseg
->subseg
+ 1;
4691 subseg
->link
= dws
->list_subseg
;
4692 dws
->list_subseg
= subseg
;
4693 symbol_get_tc (opt_label
)->u
.dw
= subseg
;
4696 ppc_change_debug_section (i
, subseg
->subseg
);
4700 /* Add the length field. */
4701 expressionS
*exp
= &subseg
->end_exp
;
4704 if (opt_label
!= NULL
)
4705 symbol_set_value_now (opt_label
);
4707 /* Add the length field. Note that according to the AIX assembler
4708 manual, the size of the length field is 4 for powerpc32 but
4709 12 for powerpc64. */
4712 /* Write the 64bit marker. */
4713 md_number_to_chars (frag_more (4), -1, 4);
4716 exp
->X_op
= O_subtract
;
4717 exp
->X_op_symbol
= symbol_temp_new_now ();
4718 exp
->X_add_symbol
= symbol_temp_make ();
4720 sz
= ppc_obj64
? 8 : 4;
4721 exp
->X_add_number
= -sz
;
4722 emit_expr (exp
, sz
);
4727 /* This function handles the .text and .data pseudo-ops. These
4728 pseudo-ops aren't really used by XCOFF; we implement them for the
4729 convenience of people who aren't used to XCOFF. */
4732 ppc_section (int type
)
4739 else if (type
== 'd')
4744 sym
= symbol_find_or_make (name
);
4746 ppc_change_csect (sym
, 2);
4748 demand_empty_rest_of_line ();
4751 /* This function handles the .section pseudo-op. This is mostly to
4752 give an error, since XCOFF only supports .text, .data and .bss, but
4753 we do permit the user to name the text or data section. */
4756 ppc_named_section (int ignore ATTRIBUTE_UNUSED
)
4759 const char *real_name
;
4763 c
= get_symbol_name (&user_name
);
4765 if (strcmp (user_name
, ".text") == 0)
4766 real_name
= ".text[PR]";
4767 else if (strcmp (user_name
, ".data") == 0)
4768 real_name
= ".data[RW]";
4771 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4772 (void) restore_line_pointer (c
);
4773 ignore_rest_of_line ();
4777 (void) restore_line_pointer (c
);
4779 sym
= symbol_find_or_make (real_name
);
4781 ppc_change_csect (sym
, 2);
4783 demand_empty_rest_of_line ();
4786 /* The .extern pseudo-op. We create an undefined symbol. */
4789 ppc_extern (int ignore ATTRIBUTE_UNUSED
)
4794 endc
= get_symbol_name (&name
);
4796 (void) symbol_find_or_make (name
);
4798 (void) restore_line_pointer (endc
);
4800 demand_empty_rest_of_line ();
4803 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4806 ppc_lglobl (int ignore ATTRIBUTE_UNUSED
)
4812 endc
= get_symbol_name (&name
);
4814 sym
= symbol_find_or_make (name
);
4816 (void) restore_line_pointer (endc
);
4818 symbol_get_tc (sym
)->output
= 1;
4820 demand_empty_rest_of_line ();
4823 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4824 relocations at the beginning of the current csect.
4826 (In principle, there's no reason why the relocations _have_ to be at
4827 the beginning. Anywhere in the csect would do. However, inserting
4828 at the beginning is what the native assembler does, and it helps to
4829 deal with cases where the .ref statements follow the section contents.)
4831 ??? .refs don't work for empty .csects. However, the native assembler
4832 doesn't report an error in this case, and neither yet do we. */
4835 ppc_ref (int ignore ATTRIBUTE_UNUSED
)
4840 if (ppc_current_csect
== NULL
)
4842 as_bad (_(".ref outside .csect"));
4843 ignore_rest_of_line ();
4849 c
= get_symbol_name (&name
);
4851 fix_at_start (symbol_get_frag (ppc_current_csect
), 0,
4852 symbol_find_or_make (name
), 0, FALSE
, BFD_RELOC_NONE
);
4854 *input_line_pointer
= c
;
4855 SKIP_WHITESPACE_AFTER_NAME ();
4856 c
= *input_line_pointer
;
4859 input_line_pointer
++;
4861 if (is_end_of_line
[(unsigned char) *input_line_pointer
])
4863 as_bad (_("missing symbol name"));
4864 ignore_rest_of_line ();
4871 demand_empty_rest_of_line ();
4874 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4875 although I don't know why it bothers. */
4878 ppc_rename (int ignore ATTRIBUTE_UNUSED
)
4885 endc
= get_symbol_name (&name
);
4887 sym
= symbol_find_or_make (name
);
4889 (void) restore_line_pointer (endc
);
4891 if (*input_line_pointer
!= ',')
4893 as_bad (_("missing rename string"));
4894 ignore_rest_of_line ();
4897 ++input_line_pointer
;
4899 symbol_get_tc (sym
)->real_name
= demand_copy_C_string (&len
);
4901 demand_empty_rest_of_line ();
4904 /* The .stabx pseudo-op. This is similar to a normal .stabs
4905 pseudo-op, but slightly different. A sample is
4906 .stabx "main:F-1",.main,142,0
4907 The first argument is the symbol name to create. The second is the
4908 value, and the third is the storage class. The fourth seems to be
4909 always zero, and I am assuming it is the type. */
4912 ppc_stabx (int ignore ATTRIBUTE_UNUSED
)
4919 name
= demand_copy_C_string (&len
);
4921 if (*input_line_pointer
!= ',')
4923 as_bad (_("missing value"));
4926 ++input_line_pointer
;
4928 ppc_stab_symbol
= TRUE
;
4929 sym
= symbol_make (name
);
4930 ppc_stab_symbol
= FALSE
;
4932 symbol_get_tc (sym
)->real_name
= name
;
4934 (void) expression (&exp
);
4941 as_bad (_("illegal .stabx expression; zero assumed"));
4942 exp
.X_add_number
= 0;
4945 S_SET_VALUE (sym
, (valueT
) exp
.X_add_number
);
4946 symbol_set_frag (sym
, &zero_address_frag
);
4950 if (S_GET_SEGMENT (exp
.X_add_symbol
) == undefined_section
)
4951 symbol_set_value_expression (sym
, &exp
);
4955 exp
.X_add_number
+ S_GET_VALUE (exp
.X_add_symbol
));
4956 symbol_set_frag (sym
, symbol_get_frag (exp
.X_add_symbol
));
4961 /* The value is some complex expression. This will probably
4962 fail at some later point, but this is probably the right
4963 thing to do here. */
4964 symbol_set_value_expression (sym
, &exp
);
4968 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
4969 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
4971 if (*input_line_pointer
!= ',')
4973 as_bad (_("missing class"));
4976 ++input_line_pointer
;
4978 S_SET_STORAGE_CLASS (sym
, get_absolute_expression ());
4980 if (*input_line_pointer
!= ',')
4982 as_bad (_("missing type"));
4985 ++input_line_pointer
;
4987 S_SET_DATA_TYPE (sym
, get_absolute_expression ());
4989 symbol_get_tc (sym
)->output
= 1;
4991 if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
4996 .stabx "z",arrays_,133,0
4999 .comm arrays_,13768,3
5001 resolve_symbol_value will copy the exp's "within" into sym's when the
5002 offset is 0. Since this seems to be corner case problem,
5003 only do the correction for storage class C_STSYM. A better solution
5004 would be to have the tc field updated in ppc_symbol_new_hook. */
5006 if (exp
.X_op
== O_symbol
)
5008 if (ppc_current_block
== NULL
)
5009 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
5011 symbol_get_tc (sym
)->within
= ppc_current_block
;
5012 symbol_get_tc (exp
.X_add_symbol
)->within
= ppc_current_block
;
5016 if (exp
.X_op
!= O_symbol
5017 || ! S_IS_EXTERNAL (exp
.X_add_symbol
)
5018 || S_GET_SEGMENT (exp
.X_add_symbol
) != bss_section
)
5019 ppc_frob_label (sym
);
5022 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5023 symbol_append (sym
, exp
.X_add_symbol
, &symbol_rootP
, &symbol_lastP
);
5024 if (symbol_get_tc (ppc_current_csect
)->within
== exp
.X_add_symbol
)
5025 symbol_get_tc (ppc_current_csect
)->within
= sym
;
5028 demand_empty_rest_of_line ();
5031 /* The .function pseudo-op. This takes several arguments. The first
5032 argument seems to be the external name of the symbol. The second
5033 argument seems to be the label for the start of the function. gcc
5034 uses the same name for both. I have no idea what the third and
5035 fourth arguments are meant to be. The optional fifth argument is
5036 an expression for the size of the function. In COFF this symbol
5037 gets an aux entry like that used for a csect. */
5040 ppc_function (int ignore ATTRIBUTE_UNUSED
)
5048 endc
= get_symbol_name (&name
);
5050 /* Ignore any [PR] suffix. */
5051 name
= ppc_canonicalize_symbol_name (name
);
5052 s
= strchr (name
, '[');
5053 if (s
!= (char *) NULL
5054 && strcmp (s
+ 1, "PR]") == 0)
5057 ext_sym
= symbol_find_or_make (name
);
5059 (void) restore_line_pointer (endc
);
5061 if (*input_line_pointer
!= ',')
5063 as_bad (_("missing symbol name"));
5064 ignore_rest_of_line ();
5067 ++input_line_pointer
;
5069 endc
= get_symbol_name (&name
);
5071 lab_sym
= symbol_find_or_make (name
);
5073 (void) restore_line_pointer (endc
);
5075 if (ext_sym
!= lab_sym
)
5079 exp
.X_op
= O_symbol
;
5080 exp
.X_add_symbol
= lab_sym
;
5081 exp
.X_op_symbol
= NULL
;
5082 exp
.X_add_number
= 0;
5084 symbol_set_value_expression (ext_sym
, &exp
);
5087 if (symbol_get_tc (ext_sym
)->symbol_class
== -1)
5088 symbol_get_tc (ext_sym
)->symbol_class
= XMC_PR
;
5089 symbol_get_tc (ext_sym
)->output
= 1;
5091 if (*input_line_pointer
== ',')
5095 /* Ignore the third argument. */
5096 ++input_line_pointer
;
5098 if (*input_line_pointer
== ',')
5100 /* Ignore the fourth argument. */
5101 ++input_line_pointer
;
5103 if (*input_line_pointer
== ',')
5105 /* The fifth argument is the function size. */
5106 ++input_line_pointer
;
5107 symbol_get_tc (ext_sym
)->u
.size
= symbol_new
5108 ("L0\001", absolute_section
,(valueT
) 0, &zero_address_frag
);
5109 pseudo_set (symbol_get_tc (ext_sym
)->u
.size
);
5114 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
5115 SF_SET_FUNCTION (ext_sym
);
5116 SF_SET_PROCESS (ext_sym
);
5117 coff_add_linesym (ext_sym
);
5119 demand_empty_rest_of_line ();
5122 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
5123 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
5124 with the correct line number */
5126 static symbolS
*saved_bi_sym
= 0;
5129 ppc_bf (int ignore ATTRIBUTE_UNUSED
)
5133 sym
= symbol_make (".bf");
5134 S_SET_SEGMENT (sym
, text_section
);
5135 symbol_set_frag (sym
, frag_now
);
5136 S_SET_VALUE (sym
, frag_now_fix ());
5137 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5139 coff_line_base
= get_absolute_expression ();
5141 S_SET_NUMBER_AUXILIARY (sym
, 1);
5142 SA_SET_SYM_LNNO (sym
, coff_line_base
);
5144 /* Line number for bi. */
5147 S_SET_VALUE (saved_bi_sym
, coff_n_line_nos
);
5152 symbol_get_tc (sym
)->output
= 1;
5154 ppc_frob_label (sym
);
5156 demand_empty_rest_of_line ();
5159 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
5160 ".ef", except that the line number is absolute, not relative to the
5161 most recent ".bf" symbol. */
5164 ppc_ef (int ignore ATTRIBUTE_UNUSED
)
5168 sym
= symbol_make (".ef");
5169 S_SET_SEGMENT (sym
, text_section
);
5170 symbol_set_frag (sym
, frag_now
);
5171 S_SET_VALUE (sym
, frag_now_fix ());
5172 S_SET_STORAGE_CLASS (sym
, C_FCN
);
5173 S_SET_NUMBER_AUXILIARY (sym
, 1);
5174 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5175 symbol_get_tc (sym
)->output
= 1;
5177 ppc_frob_label (sym
);
5179 demand_empty_rest_of_line ();
5182 /* The .bi and .ei pseudo-ops. These take a string argument and
5183 generates a C_BINCL or C_EINCL symbol, which goes at the start of
5184 the symbol list. The value of .bi will be know when the next .bf
5190 static symbolS
*last_biei
;
5197 name
= demand_copy_C_string (&len
);
5199 /* The value of these symbols is actually file offset. Here we set
5200 the value to the index into the line number entries. In
5201 ppc_frob_symbols we set the fix_line field, which will cause BFD
5202 to do the right thing. */
5204 sym
= symbol_make (name
);
5205 /* obj-coff.c currently only handles line numbers correctly in the
5207 S_SET_SEGMENT (sym
, text_section
);
5208 S_SET_VALUE (sym
, coff_n_line_nos
);
5209 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5211 S_SET_STORAGE_CLASS (sym
, ei
? C_EINCL
: C_BINCL
);
5212 symbol_get_tc (sym
)->output
= 1;
5220 for (look
= last_biei
? last_biei
: symbol_rootP
;
5221 (look
!= (symbolS
*) NULL
5222 && (S_GET_STORAGE_CLASS (look
) == C_FILE
5223 || S_GET_STORAGE_CLASS (look
) == C_BINCL
5224 || S_GET_STORAGE_CLASS (look
) == C_EINCL
));
5225 look
= symbol_next (look
))
5227 if (look
!= (symbolS
*) NULL
)
5229 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5230 symbol_insert (sym
, look
, &symbol_rootP
, &symbol_lastP
);
5234 demand_empty_rest_of_line ();
5237 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5238 There is one argument, which is a csect symbol. The value of the
5239 .bs symbol is the index of this csect symbol. */
5242 ppc_bs (int ignore ATTRIBUTE_UNUSED
)
5249 if (ppc_current_block
!= NULL
)
5250 as_bad (_("nested .bs blocks"));
5252 endc
= get_symbol_name (&name
);
5254 csect
= symbol_find_or_make (name
);
5256 (void) restore_line_pointer (endc
);
5258 sym
= symbol_make (".bs");
5259 S_SET_SEGMENT (sym
, now_seg
);
5260 S_SET_STORAGE_CLASS (sym
, C_BSTAT
);
5261 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5262 symbol_get_tc (sym
)->output
= 1;
5264 symbol_get_tc (sym
)->within
= csect
;
5266 ppc_frob_label (sym
);
5268 ppc_current_block
= sym
;
5270 demand_empty_rest_of_line ();
5273 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5276 ppc_es (int ignore ATTRIBUTE_UNUSED
)
5280 if (ppc_current_block
== NULL
)
5281 as_bad (_(".es without preceding .bs"));
5283 sym
= symbol_make (".es");
5284 S_SET_SEGMENT (sym
, now_seg
);
5285 S_SET_STORAGE_CLASS (sym
, C_ESTAT
);
5286 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5287 symbol_get_tc (sym
)->output
= 1;
5289 ppc_frob_label (sym
);
5291 ppc_current_block
= NULL
;
5293 demand_empty_rest_of_line ();
5296 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5300 ppc_bb (int ignore ATTRIBUTE_UNUSED
)
5304 sym
= symbol_make (".bb");
5305 S_SET_SEGMENT (sym
, text_section
);
5306 symbol_set_frag (sym
, frag_now
);
5307 S_SET_VALUE (sym
, frag_now_fix ());
5308 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5310 S_SET_NUMBER_AUXILIARY (sym
, 1);
5311 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5313 symbol_get_tc (sym
)->output
= 1;
5315 SF_SET_PROCESS (sym
);
5317 ppc_frob_label (sym
);
5319 demand_empty_rest_of_line ();
5322 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5326 ppc_eb (int ignore ATTRIBUTE_UNUSED
)
5330 sym
= symbol_make (".eb");
5331 S_SET_SEGMENT (sym
, text_section
);
5332 symbol_set_frag (sym
, frag_now
);
5333 S_SET_VALUE (sym
, frag_now_fix ());
5334 S_SET_STORAGE_CLASS (sym
, C_BLOCK
);
5335 S_SET_NUMBER_AUXILIARY (sym
, 1);
5336 SA_SET_SYM_LNNO (sym
, get_absolute_expression ());
5337 symbol_get_tc (sym
)->output
= 1;
5339 SF_SET_PROCESS (sym
);
5341 ppc_frob_label (sym
);
5343 demand_empty_rest_of_line ();
5346 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5350 ppc_bc (int ignore ATTRIBUTE_UNUSED
)
5356 name
= demand_copy_C_string (&len
);
5357 sym
= symbol_make (name
);
5358 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5359 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5360 S_SET_STORAGE_CLASS (sym
, C_BCOMM
);
5361 S_SET_VALUE (sym
, 0);
5362 symbol_get_tc (sym
)->output
= 1;
5364 ppc_frob_label (sym
);
5366 demand_empty_rest_of_line ();
5369 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5372 ppc_ec (int ignore ATTRIBUTE_UNUSED
)
5376 sym
= symbol_make (".ec");
5377 S_SET_SEGMENT (sym
, ppc_coff_debug_section
);
5378 symbol_get_bfdsym (sym
)->flags
|= BSF_DEBUGGING
;
5379 S_SET_STORAGE_CLASS (sym
, C_ECOMM
);
5380 S_SET_VALUE (sym
, 0);
5381 symbol_get_tc (sym
)->output
= 1;
5383 ppc_frob_label (sym
);
5385 demand_empty_rest_of_line ();
5388 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5391 ppc_toc (int ignore ATTRIBUTE_UNUSED
)
5393 if (ppc_toc_csect
!= (symbolS
*) NULL
)
5394 subseg_set (data_section
, symbol_get_tc (ppc_toc_csect
)->subseg
);
5401 subseg
= ppc_data_subsegment
;
5402 ++ppc_data_subsegment
;
5404 subseg_new (segment_name (data_section
), subseg
);
5405 ppc_toc_frag
= frag_now
;
5407 sym
= symbol_find_or_make ("TOC[TC0]");
5408 symbol_set_frag (sym
, frag_now
);
5409 S_SET_SEGMENT (sym
, data_section
);
5410 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5411 symbol_get_tc (sym
)->subseg
= subseg
;
5412 symbol_get_tc (sym
)->output
= 1;
5413 symbol_get_tc (sym
)->within
= sym
;
5415 ppc_toc_csect
= sym
;
5417 for (list
= ppc_data_csects
;
5418 symbol_get_tc (list
)->next
!= (symbolS
*) NULL
;
5419 list
= symbol_get_tc (list
)->next
)
5421 symbol_get_tc (list
)->next
= sym
;
5423 symbol_remove (sym
, &symbol_rootP
, &symbol_lastP
);
5424 symbol_append (sym
, symbol_get_tc (list
)->within
, &symbol_rootP
,
5428 ppc_current_csect
= ppc_toc_csect
;
5430 demand_empty_rest_of_line ();
5433 /* The AIX assembler automatically aligns the operands of a .long or
5434 .short pseudo-op, and we want to be compatible. */
5437 ppc_xcoff_cons (int log_size
)
5439 frag_align (log_size
, 0, 0);
5440 record_alignment (now_seg
, log_size
);
5441 cons (1 << log_size
);
5445 ppc_vbyte (int dummy ATTRIBUTE_UNUSED
)
5450 (void) expression (&exp
);
5452 if (exp
.X_op
!= O_constant
)
5454 as_bad (_("non-constant byte count"));
5458 byte_count
= exp
.X_add_number
;
5460 if (*input_line_pointer
!= ',')
5462 as_bad (_("missing value"));
5466 ++input_line_pointer
;
5471 ppc_xcoff_end (void)
5475 for (i
= 0; i
< XCOFF_DWSECT_NBR_NAMES
; i
++)
5477 struct dw_section
*dws
= &dw_sections
[i
];
5478 struct dw_subsection
*dwss
;
5480 if (dws
->anon_subseg
)
5482 dwss
= dws
->anon_subseg
;
5483 dwss
->link
= dws
->list_subseg
;
5486 dwss
= dws
->list_subseg
;
5488 for (; dwss
!= NULL
; dwss
= dwss
->link
)
5489 if (dwss
->end_exp
.X_add_symbol
!= NULL
)
5491 subseg_set (dws
->sect
, dwss
->subseg
);
5492 symbol_set_value_now (dwss
->end_exp
.X_add_symbol
);
5497 #endif /* OBJ_XCOFF */
5498 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5500 /* The .tc pseudo-op. This is used when generating either XCOFF or
5501 ELF. This takes two or more arguments.
5503 When generating XCOFF output, the first argument is the name to
5504 give to this location in the toc; this will be a symbol with class
5505 TC. The rest of the arguments are N-byte values to actually put at
5506 this location in the TOC; often there is just one more argument, a
5507 relocatable symbol reference. The size of the value to store
5508 depends on target word size. A 32-bit target uses 4-byte values, a
5509 64-bit target uses 8-byte values.
5511 When not generating XCOFF output, the arguments are the same, but
5512 the first argument is simply ignored. */
5515 ppc_tc (int ignore ATTRIBUTE_UNUSED
)
5519 /* Define the TOC symbol name. */
5525 if (ppc_toc_csect
== (symbolS
*) NULL
5526 || ppc_toc_csect
!= ppc_current_csect
)
5528 as_bad (_(".tc not in .toc section"));
5529 ignore_rest_of_line ();
5533 endc
= get_symbol_name (&name
);
5535 sym
= symbol_find_or_make (name
);
5537 (void) restore_line_pointer (endc
);
5539 if (S_IS_DEFINED (sym
))
5543 label
= symbol_get_tc (ppc_current_csect
)->within
;
5544 if (symbol_get_tc (label
)->symbol_class
!= XMC_TC0
)
5546 as_bad (_(".tc with no label"));
5547 ignore_rest_of_line ();
5551 S_SET_SEGMENT (label
, S_GET_SEGMENT (sym
));
5552 symbol_set_frag (label
, symbol_get_frag (sym
));
5553 S_SET_VALUE (label
, S_GET_VALUE (sym
));
5555 while (! is_end_of_line
[(unsigned char) *input_line_pointer
])
5556 ++input_line_pointer
;
5561 S_SET_SEGMENT (sym
, now_seg
);
5562 symbol_set_frag (sym
, frag_now
);
5563 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5564 symbol_get_tc (sym
)->symbol_class
= XMC_TC
;
5565 symbol_get_tc (sym
)->output
= 1;
5567 ppc_frob_label (sym
);
5570 #endif /* OBJ_XCOFF */
5574 /* Skip the TOC symbol name. */
5575 while (is_part_of_name (*input_line_pointer
)
5576 || *input_line_pointer
== ' '
5577 || *input_line_pointer
== '['
5578 || *input_line_pointer
== ']'
5579 || *input_line_pointer
== '{'
5580 || *input_line_pointer
== '}')
5581 ++input_line_pointer
;
5583 /* Align to a four/eight byte boundary. */
5584 align
= ppc_obj64
? 3 : 2;
5585 frag_align (align
, 0, 0);
5586 record_alignment (now_seg
, align
);
5587 #endif /* OBJ_ELF */
5589 if (*input_line_pointer
!= ',')
5590 demand_empty_rest_of_line ();
5593 ++input_line_pointer
;
5594 cons (ppc_obj64
? 8 : 4);
5598 /* Pseudo-op .machine. */
5601 ppc_machine (int ignore ATTRIBUTE_UNUSED
)
5605 #define MAX_HISTORY 100
5606 static ppc_cpu_t
*cpu_history
;
5607 static int curr_hist
;
5611 c
= get_symbol_name (&cpu_string
);
5612 cpu_string
= xstrdup (cpu_string
);
5613 (void) restore_line_pointer (c
);
5615 if (cpu_string
!= NULL
)
5617 ppc_cpu_t old_cpu
= ppc_cpu
;
5621 for (p
= cpu_string
; *p
!= 0; p
++)
5624 if (strcmp (cpu_string
, "push") == 0)
5626 if (cpu_history
== NULL
)
5627 cpu_history
= XNEWVEC (ppc_cpu_t
, MAX_HISTORY
);
5629 if (curr_hist
>= MAX_HISTORY
)
5630 as_bad (_(".machine stack overflow"));
5632 cpu_history
[curr_hist
++] = ppc_cpu
;
5634 else if (strcmp (cpu_string
, "pop") == 0)
5637 as_bad (_(".machine stack underflow"));
5639 ppc_cpu
= cpu_history
[--curr_hist
];
5641 else if ((new_cpu
= ppc_parse_cpu (ppc_cpu
, &sticky
, cpu_string
)) != 0)
5644 as_bad (_("invalid machine `%s'"), cpu_string
);
5646 if (ppc_cpu
!= old_cpu
)
5647 ppc_setup_opcodes ();
5650 demand_empty_rest_of_line ();
5652 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5656 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5658 /* Set the current section. */
5660 ppc_set_current_section (segT
new)
5662 ppc_previous_section
= ppc_current_section
;
5663 ppc_current_section
= new;
5666 /* pseudo-op: .previous
5667 behaviour: toggles the current section with the previous section.
5669 warnings: "No previous section" */
5672 ppc_previous (int ignore ATTRIBUTE_UNUSED
)
5674 if (ppc_previous_section
== NULL
)
5676 as_warn (_("no previous section to return to, ignored."));
5680 subseg_set (ppc_previous_section
, 0);
5682 ppc_set_current_section (ppc_previous_section
);
5685 /* pseudo-op: .pdata
5686 behaviour: predefined read only data section
5690 initial: .section .pdata "adr3"
5691 a - don't know -- maybe a misprint
5692 d - initialized data
5694 3 - double word aligned (that would be 4 byte boundary)
5697 Tag index tables (also known as the function table) for exception
5698 handling, debugging, etc. */
5701 ppc_pdata (int ignore ATTRIBUTE_UNUSED
)
5703 if (pdata_section
== 0)
5705 pdata_section
= subseg_new (".pdata", 0);
5707 bfd_set_section_flags (stdoutput
, pdata_section
,
5708 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5709 | SEC_READONLY
| SEC_DATA
));
5711 bfd_set_section_alignment (stdoutput
, pdata_section
, 2);
5715 pdata_section
= subseg_new (".pdata", 0);
5717 ppc_set_current_section (pdata_section
);
5720 /* pseudo-op: .ydata
5721 behaviour: predefined read only data section
5725 initial: .section .ydata "drw3"
5726 a - don't know -- maybe a misprint
5727 d - initialized data
5729 3 - double word aligned (that would be 4 byte boundary)
5731 Tag tables (also known as the scope table) for exception handling,
5735 ppc_ydata (int ignore ATTRIBUTE_UNUSED
)
5737 if (ydata_section
== 0)
5739 ydata_section
= subseg_new (".ydata", 0);
5740 bfd_set_section_flags (stdoutput
, ydata_section
,
5741 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5742 | SEC_READONLY
| SEC_DATA
));
5744 bfd_set_section_alignment (stdoutput
, ydata_section
, 3);
5748 ydata_section
= subseg_new (".ydata", 0);
5750 ppc_set_current_section (ydata_section
);
5753 /* pseudo-op: .reldata
5754 behaviour: predefined read write data section
5755 double word aligned (4-byte)
5756 FIXME: relocation is applied to it
5757 FIXME: what's the difference between this and .data?
5760 initial: .section .reldata "drw3"
5761 d - initialized data
5764 3 - double word aligned (that would be 8 byte boundary)
5767 Like .data, but intended to hold data subject to relocation, such as
5768 function descriptors, etc. */
5771 ppc_reldata (int ignore ATTRIBUTE_UNUSED
)
5773 if (reldata_section
== 0)
5775 reldata_section
= subseg_new (".reldata", 0);
5777 bfd_set_section_flags (stdoutput
, reldata_section
,
5778 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5781 bfd_set_section_alignment (stdoutput
, reldata_section
, 2);
5785 reldata_section
= subseg_new (".reldata", 0);
5787 ppc_set_current_section (reldata_section
);
5790 /* pseudo-op: .rdata
5791 behaviour: predefined read only data section
5795 initial: .section .rdata "dr3"
5796 d - initialized data
5798 3 - double word aligned (that would be 4 byte boundary) */
5801 ppc_rdata (int ignore ATTRIBUTE_UNUSED
)
5803 if (rdata_section
== 0)
5805 rdata_section
= subseg_new (".rdata", 0);
5806 bfd_set_section_flags (stdoutput
, rdata_section
,
5807 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
5808 | SEC_READONLY
| SEC_DATA
));
5810 bfd_set_section_alignment (stdoutput
, rdata_section
, 2);
5814 rdata_section
= subseg_new (".rdata", 0);
5816 ppc_set_current_section (rdata_section
);
5819 /* pseudo-op: .ualong
5820 behaviour: much like .int, with the exception that no alignment is
5822 FIXME: test the alignment statement
5827 ppc_ualong (int ignore ATTRIBUTE_UNUSED
)
5833 /* pseudo-op: .znop <symbol name>
5834 behaviour: Issue a nop instruction
5835 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5836 the supplied symbol name.
5838 warnings: Missing symbol name */
5841 ppc_znop (int ignore ATTRIBUTE_UNUSED
)
5844 const struct powerpc_opcode
*opcode
;
5851 /* Strip out the symbol name. */
5852 c
= get_symbol_name (&symbol_name
);
5854 name
= xstrdup (symbol_name
);
5856 sym
= symbol_find_or_make (name
);
5858 *input_line_pointer
= c
;
5860 SKIP_WHITESPACE_AFTER_NAME ();
5862 /* Look up the opcode in the hash table. */
5863 opcode
= (const struct powerpc_opcode
*) hash_find (ppc_hash
, "nop");
5865 /* Stick in the nop. */
5866 insn
= opcode
->opcode
;
5868 /* Write out the instruction. */
5870 md_number_to_chars (f
, insn
, 4);
5872 f
- frag_now
->fr_literal
,
5877 BFD_RELOC_16_GOT_PCREL
);
5887 ppc_pe_comm (int lcomm
)
5896 c
= get_symbol_name (&name
);
5898 /* just after name is now '\0'. */
5899 p
= input_line_pointer
;
5901 SKIP_WHITESPACE_AFTER_NAME ();
5902 if (*input_line_pointer
!= ',')
5904 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5905 ignore_rest_of_line ();
5909 input_line_pointer
++; /* skip ',' */
5910 if ((temp
= get_absolute_expression ()) < 0)
5912 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
5913 ignore_rest_of_line ();
5919 /* The third argument to .comm is the alignment. */
5920 if (*input_line_pointer
!= ',')
5924 ++input_line_pointer
;
5925 align
= get_absolute_expression ();
5928 as_warn (_("ignoring bad alignment"));
5935 symbolP
= symbol_find_or_make (name
);
5938 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
5940 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5941 S_GET_NAME (symbolP
));
5942 ignore_rest_of_line ();
5946 if (S_GET_VALUE (symbolP
))
5948 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
5949 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5950 S_GET_NAME (symbolP
),
5951 (long) S_GET_VALUE (symbolP
),
5956 S_SET_VALUE (symbolP
, (valueT
) temp
);
5957 S_SET_EXTERNAL (symbolP
);
5958 S_SET_SEGMENT (symbolP
, bfd_com_section_ptr
);
5961 demand_empty_rest_of_line ();
5965 * implement the .section pseudo op:
5966 * .section name {, "flags"}
5968 * | +--- optional flags: 'b' for bss
5970 * +-- section name 'l' for lib
5974 * 'd' (apparently m88k for data)
5976 * But if the argument is not a quoted string, treat it as a
5977 * subsegment number.
5979 * FIXME: this is a copy of the section processing from obj-coff.c, with
5980 * additions/changes for the moto-pas assembler support. There are three
5983 * FIXME: I just noticed this. This doesn't work at all really. It it
5984 * setting bits that bfd probably neither understands or uses. The
5985 * correct approach (?) will have to incorporate extra fields attached
5986 * to the section to hold the system specific stuff. (krk)
5989 * 'a' - unknown - referred to in documentation, but no definition supplied
5990 * 'c' - section has code
5991 * 'd' - section has initialized data
5992 * 'u' - section has uninitialized data
5993 * 'i' - section contains directives (info)
5994 * 'n' - section can be discarded
5995 * 'R' - remove section at link time
5997 * Section Protection:
5998 * 'r' - section is readable
5999 * 'w' - section is writable
6000 * 'x' - section is executable
6001 * 's' - section is sharable
6003 * Section Alignment:
6004 * '0' - align to byte boundary
6005 * '1' - align to halfword boundary
6006 * '2' - align to word boundary
6007 * '3' - align to doubleword boundary
6008 * '4' - align to quadword boundary
6009 * '5' - align to 32 byte boundary
6010 * '6' - align to 64 byte boundary
6015 ppc_pe_section (int ignore ATTRIBUTE_UNUSED
)
6017 /* Strip out the section name. */
6026 c
= get_symbol_name (§ion_name
);
6028 name
= xstrdup (section_name
);
6030 *input_line_pointer
= c
;
6032 SKIP_WHITESPACE_AFTER_NAME ();
6035 flags
= SEC_NO_FLAGS
;
6037 if (strcmp (name
, ".idata$2") == 0)
6041 else if (strcmp (name
, ".idata$3") == 0)
6045 else if (strcmp (name
, ".idata$4") == 0)
6049 else if (strcmp (name
, ".idata$5") == 0)
6053 else if (strcmp (name
, ".idata$6") == 0)
6058 /* Default alignment to 16 byte boundary. */
6061 if (*input_line_pointer
== ',')
6063 ++input_line_pointer
;
6065 if (*input_line_pointer
!= '"')
6066 exp
= get_absolute_expression ();
6069 ++input_line_pointer
;
6070 while (*input_line_pointer
!= '"'
6071 && ! is_end_of_line
[(unsigned char) *input_line_pointer
])
6073 switch (*input_line_pointer
)
6075 /* Section Contents */
6076 case 'a': /* unknown */
6077 as_bad (_("unsupported section attribute -- 'a'"));
6079 case 'c': /* code section */
6082 case 'd': /* section has initialized data */
6085 case 'u': /* section has uninitialized data */
6086 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
6090 case 'i': /* section contains directives (info) */
6091 /* FIXME: This is IMAGE_SCN_LNK_INFO
6093 flags
|= SEC_HAS_CONTENTS
;
6095 case 'n': /* section can be discarded */
6098 case 'R': /* Remove section at link time */
6099 flags
|= SEC_NEVER_LOAD
;
6101 #if IFLICT_BRAIN_DAMAGE
6102 /* Section Protection */
6103 case 'r': /* section is readable */
6104 flags
|= IMAGE_SCN_MEM_READ
;
6106 case 'w': /* section is writable */
6107 flags
|= IMAGE_SCN_MEM_WRITE
;
6109 case 'x': /* section is executable */
6110 flags
|= IMAGE_SCN_MEM_EXECUTE
;
6112 case 's': /* section is sharable */
6113 flags
|= IMAGE_SCN_MEM_SHARED
;
6116 /* Section Alignment */
6117 case '0': /* align to byte boundary */
6118 flags
|= IMAGE_SCN_ALIGN_1BYTES
;
6121 case '1': /* align to halfword boundary */
6122 flags
|= IMAGE_SCN_ALIGN_2BYTES
;
6125 case '2': /* align to word boundary */
6126 flags
|= IMAGE_SCN_ALIGN_4BYTES
;
6129 case '3': /* align to doubleword boundary */
6130 flags
|= IMAGE_SCN_ALIGN_8BYTES
;
6133 case '4': /* align to quadword boundary */
6134 flags
|= IMAGE_SCN_ALIGN_16BYTES
;
6137 case '5': /* align to 32 byte boundary */
6138 flags
|= IMAGE_SCN_ALIGN_32BYTES
;
6141 case '6': /* align to 64 byte boundary */
6142 flags
|= IMAGE_SCN_ALIGN_64BYTES
;
6147 as_bad (_("unknown section attribute '%c'"),
6148 *input_line_pointer
);
6151 ++input_line_pointer
;
6153 if (*input_line_pointer
== '"')
6154 ++input_line_pointer
;
6158 sec
= subseg_new (name
, (subsegT
) exp
);
6160 ppc_set_current_section (sec
);
6162 if (flags
!= SEC_NO_FLAGS
)
6164 if (! bfd_set_section_flags (stdoutput
, sec
, flags
))
6165 as_bad (_("error setting flags for \"%s\": %s"),
6166 bfd_section_name (stdoutput
, sec
),
6167 bfd_errmsg (bfd_get_error ()));
6170 bfd_set_section_alignment (stdoutput
, sec
, align
);
6174 ppc_pe_function (int ignore ATTRIBUTE_UNUSED
)
6180 endc
= get_symbol_name (&name
);
6182 ext_sym
= symbol_find_or_make (name
);
6184 (void) restore_line_pointer (endc
);
6186 S_SET_DATA_TYPE (ext_sym
, DT_FCN
<< N_BTSHFT
);
6187 SF_SET_FUNCTION (ext_sym
);
6188 SF_SET_PROCESS (ext_sym
);
6189 coff_add_linesym (ext_sym
);
6191 demand_empty_rest_of_line ();
6195 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED
)
6197 if (tocdata_section
== 0)
6199 tocdata_section
= subseg_new (".tocd", 0);
6200 /* FIXME: section flags won't work. */
6201 bfd_set_section_flags (stdoutput
, tocdata_section
,
6202 (SEC_ALLOC
| SEC_LOAD
| SEC_RELOC
6203 | SEC_READONLY
| SEC_DATA
));
6205 bfd_set_section_alignment (stdoutput
, tocdata_section
, 2);
6209 rdata_section
= subseg_new (".tocd", 0);
6212 ppc_set_current_section (tocdata_section
);
6214 demand_empty_rest_of_line ();
6217 /* Don't adjust TOC relocs to use the section symbol. */
6220 ppc_pe_fix_adjustable (fixS
*fix
)
6222 return fix
->fx_r_type
!= BFD_RELOC_PPC_TOC16
;
6229 /* XCOFF specific symbol and file handling. */
6231 /* Canonicalize the symbol name. We use the to force the suffix, if
6232 any, to use square brackets, and to be in upper case. */
6235 ppc_canonicalize_symbol_name (char *name
)
6239 if (ppc_stab_symbol
)
6242 for (s
= name
; *s
!= '\0' && *s
!= '{' && *s
!= '['; s
++)
6256 for (s
++; *s
!= '\0' && *s
!= brac
; s
++)
6259 if (*s
== '\0' || s
[1] != '\0')
6260 as_bad (_("bad symbol suffix"));
6268 /* Set the class of a symbol based on the suffix, if any. This is
6269 called whenever a new symbol is created. */
6272 ppc_symbol_new_hook (symbolS
*sym
)
6274 struct ppc_tc_sy
*tc
;
6277 tc
= symbol_get_tc (sym
);
6280 tc
->symbol_class
= -1;
6281 tc
->real_name
= NULL
;
6288 if (ppc_stab_symbol
)
6291 s
= strchr (S_GET_NAME (sym
), '[');
6292 if (s
== (const char *) NULL
)
6294 /* There is no suffix. */
6303 if (strcmp (s
, "BS]") == 0)
6304 tc
->symbol_class
= XMC_BS
;
6307 if (strcmp (s
, "DB]") == 0)
6308 tc
->symbol_class
= XMC_DB
;
6309 else if (strcmp (s
, "DS]") == 0)
6310 tc
->symbol_class
= XMC_DS
;
6313 if (strcmp (s
, "GL]") == 0)
6314 tc
->symbol_class
= XMC_GL
;
6317 if (strcmp (s
, "PR]") == 0)
6318 tc
->symbol_class
= XMC_PR
;
6321 if (strcmp (s
, "RO]") == 0)
6322 tc
->symbol_class
= XMC_RO
;
6323 else if (strcmp (s
, "RW]") == 0)
6324 tc
->symbol_class
= XMC_RW
;
6327 if (strcmp (s
, "SV]") == 0)
6328 tc
->symbol_class
= XMC_SV
;
6331 if (strcmp (s
, "TC]") == 0)
6332 tc
->symbol_class
= XMC_TC
;
6333 else if (strcmp (s
, "TI]") == 0)
6334 tc
->symbol_class
= XMC_TI
;
6335 else if (strcmp (s
, "TB]") == 0)
6336 tc
->symbol_class
= XMC_TB
;
6337 else if (strcmp (s
, "TC0]") == 0 || strcmp (s
, "T0]") == 0)
6338 tc
->symbol_class
= XMC_TC0
;
6341 if (strcmp (s
, "UA]") == 0)
6342 tc
->symbol_class
= XMC_UA
;
6343 else if (strcmp (s
, "UC]") == 0)
6344 tc
->symbol_class
= XMC_UC
;
6347 if (strcmp (s
, "XO]") == 0)
6348 tc
->symbol_class
= XMC_XO
;
6352 if (tc
->symbol_class
== -1)
6353 as_bad (_("unrecognized symbol suffix"));
6356 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6357 seen. It tells ppc_adjust_symtab whether it needs to look through
6360 static bfd_boolean ppc_saw_abs
;
6362 /* Change the name of a symbol just before writing it out. Set the
6363 real name if the .rename pseudo-op was used. Otherwise, remove any
6364 class suffix. Return 1 if the symbol should not be included in the
6368 ppc_frob_symbol (symbolS
*sym
)
6370 static symbolS
*ppc_last_function
;
6371 static symbolS
*set_end
;
6373 /* Discard symbols that should not be included in the output symbol
6375 if (! symbol_used_in_reloc_p (sym
)
6376 && ((symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) != 0
6377 || (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6378 && ! symbol_get_tc (sym
)->output
6379 && S_GET_STORAGE_CLASS (sym
) != C_FILE
)))
6382 /* This one will disappear anyway. Don't make a csect sym for it. */
6383 if (sym
== abs_section_sym
)
6386 if (symbol_get_tc (sym
)->real_name
!= (char *) NULL
)
6387 S_SET_NAME (sym
, symbol_get_tc (sym
)->real_name
);
6393 name
= S_GET_NAME (sym
);
6394 s
= strchr (name
, '[');
6395 if (s
!= (char *) NULL
)
6401 snew
= xstrndup (name
, len
);
6403 S_SET_NAME (sym
, snew
);
6407 if (set_end
!= (symbolS
*) NULL
)
6409 SA_SET_SYM_ENDNDX (set_end
, sym
);
6413 if (SF_GET_FUNCTION (sym
))
6415 if (ppc_last_function
!= (symbolS
*) NULL
)
6416 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6417 ppc_last_function
= sym
;
6418 if (symbol_get_tc (sym
)->u
.size
!= (symbolS
*) NULL
)
6420 resolve_symbol_value (symbol_get_tc (sym
)->u
.size
);
6421 SA_SET_SYM_FSIZE (sym
,
6422 (long) S_GET_VALUE (symbol_get_tc (sym
)->u
.size
));
6425 else if (S_GET_STORAGE_CLASS (sym
) == C_FCN
6426 && strcmp (S_GET_NAME (sym
), ".ef") == 0)
6428 if (ppc_last_function
== (symbolS
*) NULL
)
6429 as_bad (_(".ef with no preceding .function"));
6432 set_end
= ppc_last_function
;
6433 ppc_last_function
= NULL
;
6435 /* We don't have a C_EFCN symbol, but we need to force the
6436 COFF backend to believe that it has seen one. */
6437 coff_last_function
= NULL
;
6441 if (! (S_IS_EXTERNAL (sym
) || S_IS_WEAK (sym
))
6442 && (symbol_get_bfdsym (sym
)->flags
& BSF_SECTION_SYM
) == 0
6443 && S_GET_STORAGE_CLASS (sym
) != C_FILE
6444 && S_GET_STORAGE_CLASS (sym
) != C_FCN
6445 && S_GET_STORAGE_CLASS (sym
) != C_BLOCK
6446 && S_GET_STORAGE_CLASS (sym
) != C_BSTAT
6447 && S_GET_STORAGE_CLASS (sym
) != C_ESTAT
6448 && S_GET_STORAGE_CLASS (sym
) != C_BINCL
6449 && S_GET_STORAGE_CLASS (sym
) != C_EINCL
6450 && S_GET_SEGMENT (sym
) != ppc_coff_debug_section
)
6451 S_SET_STORAGE_CLASS (sym
, C_HIDEXT
);
6453 if (S_GET_STORAGE_CLASS (sym
) == C_EXT
6454 || S_GET_STORAGE_CLASS (sym
) == C_AIX_WEAKEXT
6455 || S_GET_STORAGE_CLASS (sym
) == C_HIDEXT
)
6458 union internal_auxent
*a
;
6460 /* Create a csect aux. */
6461 i
= S_GET_NUMBER_AUXILIARY (sym
);
6462 S_SET_NUMBER_AUXILIARY (sym
, i
+ 1);
6463 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].u
.auxent
;
6464 if (symbol_get_tc (sym
)->symbol_class
== XMC_TC0
)
6466 /* This is the TOC table. */
6467 know (strcmp (S_GET_NAME (sym
), "TOC") == 0);
6468 a
->x_csect
.x_scnlen
.l
= 0;
6469 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6471 else if (symbol_get_tc (sym
)->subseg
!= 0)
6473 /* This is a csect symbol. x_scnlen is the size of the
6475 if (symbol_get_tc (sym
)->next
== (symbolS
*) NULL
)
6476 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6477 S_GET_SEGMENT (sym
))
6478 - S_GET_VALUE (sym
));
6481 resolve_symbol_value (symbol_get_tc (sym
)->next
);
6482 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (symbol_get_tc (sym
)->next
)
6483 - S_GET_VALUE (sym
));
6485 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_SD
;
6487 else if (S_GET_SEGMENT (sym
) == bss_section
)
6489 /* This is a common symbol. */
6490 a
->x_csect
.x_scnlen
.l
= symbol_get_frag (sym
)->fr_offset
;
6491 a
->x_csect
.x_smtyp
= (symbol_get_tc (sym
)->align
<< 3) | XTY_CM
;
6492 if (S_IS_EXTERNAL (sym
))
6493 symbol_get_tc (sym
)->symbol_class
= XMC_RW
;
6495 symbol_get_tc (sym
)->symbol_class
= XMC_BS
;
6497 else if (S_GET_SEGMENT (sym
) == absolute_section
)
6499 /* This is an absolute symbol. The csect will be created by
6500 ppc_adjust_symtab. */
6502 a
->x_csect
.x_smtyp
= XTY_LD
;
6503 if (symbol_get_tc (sym
)->symbol_class
== -1)
6504 symbol_get_tc (sym
)->symbol_class
= XMC_XO
;
6506 else if (! S_IS_DEFINED (sym
))
6508 /* This is an external symbol. */
6509 a
->x_csect
.x_scnlen
.l
= 0;
6510 a
->x_csect
.x_smtyp
= XTY_ER
;
6512 else if (symbol_get_tc (sym
)->symbol_class
== XMC_TC
)
6516 /* This is a TOC definition. x_scnlen is the size of the
6518 next
= symbol_next (sym
);
6519 while (symbol_get_tc (next
)->symbol_class
== XMC_TC0
)
6520 next
= symbol_next (next
);
6521 if (next
== (symbolS
*) NULL
6522 || symbol_get_tc (next
)->symbol_class
!= XMC_TC
)
6524 if (ppc_after_toc_frag
== (fragS
*) NULL
)
6525 a
->x_csect
.x_scnlen
.l
= (bfd_section_size (stdoutput
,
6527 - S_GET_VALUE (sym
));
6529 a
->x_csect
.x_scnlen
.l
= (ppc_after_toc_frag
->fr_address
6530 - S_GET_VALUE (sym
));
6534 resolve_symbol_value (next
);
6535 a
->x_csect
.x_scnlen
.l
= (S_GET_VALUE (next
)
6536 - S_GET_VALUE (sym
));
6538 a
->x_csect
.x_smtyp
= (2 << 3) | XTY_SD
;
6544 /* This is a normal symbol definition. x_scnlen is the
6545 symbol index of the containing csect. */
6546 if (S_GET_SEGMENT (sym
) == text_section
)
6547 csect
= ppc_text_csects
;
6548 else if (S_GET_SEGMENT (sym
) == data_section
)
6549 csect
= ppc_data_csects
;
6553 /* Skip the initial dummy symbol. */
6554 csect
= symbol_get_tc (csect
)->next
;
6556 if (csect
== (symbolS
*) NULL
)
6558 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym
));
6559 a
->x_csect
.x_scnlen
.l
= 0;
6563 while (symbol_get_tc (csect
)->next
!= (symbolS
*) NULL
)
6565 resolve_symbol_value (symbol_get_tc (csect
)->next
);
6566 if (S_GET_VALUE (symbol_get_tc (csect
)->next
)
6567 > S_GET_VALUE (sym
))
6569 csect
= symbol_get_tc (csect
)->next
;
6572 a
->x_csect
.x_scnlen
.p
=
6573 coffsymbol (symbol_get_bfdsym (csect
))->native
;
6574 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
+ 1].fix_scnlen
=
6577 a
->x_csect
.x_smtyp
= XTY_LD
;
6580 a
->x_csect
.x_parmhash
= 0;
6581 a
->x_csect
.x_snhash
= 0;
6582 if (symbol_get_tc (sym
)->symbol_class
== -1)
6583 a
->x_csect
.x_smclas
= XMC_PR
;
6585 a
->x_csect
.x_smclas
= symbol_get_tc (sym
)->symbol_class
;
6586 a
->x_csect
.x_stab
= 0;
6587 a
->x_csect
.x_snstab
= 0;
6589 /* Don't let the COFF backend resort these symbols. */
6590 symbol_get_bfdsym (sym
)->flags
|= BSF_NOT_AT_END
;
6592 else if (S_GET_STORAGE_CLASS (sym
) == C_BSTAT
)
6594 /* We want the value to be the symbol index of the referenced
6595 csect symbol. BFD will do that for us if we set the right
6597 asymbol
*bsym
= symbol_get_bfdsym (symbol_get_tc (sym
)->within
);
6598 combined_entry_type
*c
= coffsymbol (bsym
)->native
;
6600 S_SET_VALUE (sym
, (valueT
) (size_t) c
);
6601 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_value
= 1;
6603 else if (S_GET_STORAGE_CLASS (sym
) == C_STSYM
)
6608 block
= symbol_get_tc (sym
)->within
;
6611 /* The value is the offset from the enclosing csect. */
6614 csect
= symbol_get_tc (block
)->within
;
6615 resolve_symbol_value (csect
);
6616 base
= S_GET_VALUE (csect
);
6621 S_SET_VALUE (sym
, S_GET_VALUE (sym
) - base
);
6623 else if (S_GET_STORAGE_CLASS (sym
) == C_BINCL
6624 || S_GET_STORAGE_CLASS (sym
) == C_EINCL
)
6626 /* We want the value to be a file offset into the line numbers.
6627 BFD will do that for us if we set the right flags. We have
6628 already set the value correctly. */
6629 coffsymbol (symbol_get_bfdsym (sym
))->native
->fix_line
= 1;
6635 /* Adjust the symbol table. This creates csect symbols for all
6636 absolute symbols. */
6639 ppc_adjust_symtab (void)
6646 for (sym
= symbol_rootP
; sym
!= NULL
; sym
= symbol_next (sym
))
6650 union internal_auxent
*a
;
6652 if (S_GET_SEGMENT (sym
) != absolute_section
)
6655 csect
= symbol_create (".abs[XO]", absolute_section
,
6656 S_GET_VALUE (sym
), &zero_address_frag
);
6657 symbol_get_bfdsym (csect
)->value
= S_GET_VALUE (sym
);
6658 S_SET_STORAGE_CLASS (csect
, C_HIDEXT
);
6659 i
= S_GET_NUMBER_AUXILIARY (csect
);
6660 S_SET_NUMBER_AUXILIARY (csect
, i
+ 1);
6661 a
= &coffsymbol (symbol_get_bfdsym (csect
))->native
[i
+ 1].u
.auxent
;
6662 a
->x_csect
.x_scnlen
.l
= 0;
6663 a
->x_csect
.x_smtyp
= XTY_SD
;
6664 a
->x_csect
.x_parmhash
= 0;
6665 a
->x_csect
.x_snhash
= 0;
6666 a
->x_csect
.x_smclas
= XMC_XO
;
6667 a
->x_csect
.x_stab
= 0;
6668 a
->x_csect
.x_snstab
= 0;
6670 symbol_insert (csect
, sym
, &symbol_rootP
, &symbol_lastP
);
6672 i
= S_GET_NUMBER_AUXILIARY (sym
);
6673 a
= &coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].u
.auxent
;
6674 a
->x_csect
.x_scnlen
.p
= coffsymbol (symbol_get_bfdsym (csect
))->native
;
6675 coffsymbol (symbol_get_bfdsym (sym
))->native
[i
].fix_scnlen
= 1;
6678 ppc_saw_abs
= FALSE
;
6681 /* Set the VMA for a section. This is called on all the sections in
6685 ppc_frob_section (asection
*sec
)
6687 static bfd_vma vma
= 0;
6689 /* Dwarf sections start at 0. */
6690 if (bfd_get_section_flags (NULL
, sec
) & SEC_DEBUGGING
)
6693 vma
= md_section_align (sec
, vma
);
6694 bfd_set_section_vma (stdoutput
, sec
, vma
);
6695 vma
+= bfd_section_size (stdoutput
, sec
);
6698 #endif /* OBJ_XCOFF */
6701 md_atof (int type
, char *litp
, int *sizep
)
6703 return ieee_md_atof (type
, litp
, sizep
, target_big_endian
);
6706 /* Write a value out to the object file, using the appropriate
6710 md_number_to_chars (char *buf
, valueT val
, int n
)
6712 if (target_big_endian
)
6713 number_to_chars_bigendian (buf
, val
, n
);
6715 number_to_chars_littleendian (buf
, val
, n
);
6718 /* Align a section (I don't know why this is machine dependent). */
6721 md_section_align (asection
*seg ATTRIBUTE_UNUSED
, valueT addr
)
6726 int align
= bfd_get_section_alignment (stdoutput
, seg
);
6728 return ((addr
+ (1 << align
) - 1) & -(1 << align
));
6732 /* We don't have any form of relaxing. */
6735 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
6736 asection
*seg ATTRIBUTE_UNUSED
)
6742 /* Convert a machine dependent frag. We never generate these. */
6745 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
6746 asection
*sec ATTRIBUTE_UNUSED
,
6747 fragS
*fragp ATTRIBUTE_UNUSED
)
6752 /* We have no need to default values of symbols. */
6755 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
6760 /* Functions concerning relocs. */
6762 /* The location from which a PC relative jump should be calculated,
6763 given a PC relative reloc. */
6766 md_pcrel_from_section (fixS
*fixp
, segT sec ATTRIBUTE_UNUSED
)
6768 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6773 /* This is called to see whether a fixup should be adjusted to use a
6774 section symbol. We take the opportunity to change a fixup against
6775 a symbol in the TOC subsegment into a reloc against the
6776 corresponding .tc symbol. */
6779 ppc_fix_adjustable (fixS
*fix
)
6781 valueT val
= resolve_symbol_value (fix
->fx_addsy
);
6782 segT symseg
= S_GET_SEGMENT (fix
->fx_addsy
);
6783 TC_SYMFIELD_TYPE
*tc
;
6785 if (symseg
== absolute_section
)
6788 /* Always adjust symbols in debugging sections. */
6789 if (bfd_get_section_flags (stdoutput
, symseg
) & SEC_DEBUGGING
)
6792 if (ppc_toc_csect
!= (symbolS
*) NULL
6793 && fix
->fx_addsy
!= ppc_toc_csect
6794 && symseg
== data_section
6795 && val
>= ppc_toc_frag
->fr_address
6796 && (ppc_after_toc_frag
== (fragS
*) NULL
6797 || val
< ppc_after_toc_frag
->fr_address
))
6801 for (sy
= symbol_next (ppc_toc_csect
);
6802 sy
!= (symbolS
*) NULL
;
6803 sy
= symbol_next (sy
))
6805 TC_SYMFIELD_TYPE
*sy_tc
= symbol_get_tc (sy
);
6807 if (sy_tc
->symbol_class
== XMC_TC0
)
6809 if (sy_tc
->symbol_class
!= XMC_TC
)
6811 if (val
== resolve_symbol_value (sy
))
6814 fix
->fx_addnumber
= val
- ppc_toc_frag
->fr_address
;
6819 as_bad_where (fix
->fx_file
, fix
->fx_line
,
6820 _("symbol in .toc does not match any .tc"));
6823 /* Possibly adjust the reloc to be against the csect. */
6824 tc
= symbol_get_tc (fix
->fx_addsy
);
6826 && tc
->symbol_class
!= XMC_TC0
6827 && tc
->symbol_class
!= XMC_TC
6828 && symseg
!= bss_section
6829 /* Don't adjust if this is a reloc in the toc section. */
6830 && (symseg
!= data_section
6831 || ppc_toc_csect
== NULL
6832 || val
< ppc_toc_frag
->fr_address
6833 || (ppc_after_toc_frag
!= NULL
6834 && val
>= ppc_after_toc_frag
->fr_address
)))
6836 symbolS
*csect
= tc
->within
;
6838 /* If the symbol was not declared by a label (eg: a section symbol),
6839 use the section instead of the csect. This doesn't happen in
6840 normal AIX assembly code. */
6842 csect
= seg_info (symseg
)->sym
;
6844 fix
->fx_offset
+= val
- symbol_get_frag (csect
)->fr_address
;
6845 fix
->fx_addsy
= csect
;
6850 /* Adjust a reloc against a .lcomm symbol to be against the base
6852 if (symseg
== bss_section
6853 && ! S_IS_EXTERNAL (fix
->fx_addsy
))
6855 symbolS
*sy
= symbol_get_frag (fix
->fx_addsy
)->fr_symbol
;
6857 fix
->fx_offset
+= val
- resolve_symbol_value (sy
);
6864 /* A reloc from one csect to another must be kept. The assembler
6865 will, of course, keep relocs between sections, and it will keep
6866 absolute relocs, but we need to force it to keep PC relative relocs
6867 between two csects in the same section. */
6870 ppc_force_relocation (fixS
*fix
)
6872 /* At this point fix->fx_addsy should already have been converted to
6873 a csect symbol. If the csect does not include the fragment, then
6874 we need to force the relocation. */
6876 && fix
->fx_addsy
!= NULL
6877 && symbol_get_tc (fix
->fx_addsy
)->subseg
!= 0
6878 && ((symbol_get_frag (fix
->fx_addsy
)->fr_address
6879 > fix
->fx_frag
->fr_address
)
6880 || (symbol_get_tc (fix
->fx_addsy
)->next
!= NULL
6881 && (symbol_get_frag (symbol_get_tc (fix
->fx_addsy
)->next
)->fr_address
6882 <= fix
->fx_frag
->fr_address
))))
6885 return generic_force_reloc (fix
);
6887 #endif /* OBJ_XCOFF */
6890 /* If this function returns non-zero, it guarantees that a relocation
6891 will be emitted for a fixup. */
6894 ppc_force_relocation (fixS
*fix
)
6896 /* Branch prediction relocations must force a relocation, as must
6897 the vtable description relocs. */
6898 switch (fix
->fx_r_type
)
6900 case BFD_RELOC_PPC_B16_BRTAKEN
:
6901 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6902 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6903 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6904 case BFD_RELOC_24_PLT_PCREL
:
6905 case BFD_RELOC_PPC64_TOC
:
6907 case BFD_RELOC_PPC_B26
:
6908 case BFD_RELOC_PPC_BA26
:
6909 case BFD_RELOC_PPC_B16
:
6910 case BFD_RELOC_PPC_BA16
:
6911 case BFD_RELOC_PPC64_REL24_NOTOC
:
6912 /* All branch fixups targeting a localentry symbol must
6913 force a relocation. */
6916 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6917 elf_symbol_type
*elfsym
6918 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6919 gas_assert (elfsym
);
6920 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6928 if (fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6929 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
)
6932 return generic_force_reloc (fix
);
6936 ppc_fix_adjustable (fixS
*fix
)
6938 switch (fix
->fx_r_type
)
6940 /* All branch fixups targeting a localentry symbol must
6941 continue using the symbol. */
6942 case BFD_RELOC_PPC_B26
:
6943 case BFD_RELOC_PPC_BA26
:
6944 case BFD_RELOC_PPC_B16
:
6945 case BFD_RELOC_PPC_BA16
:
6946 case BFD_RELOC_PPC_B16_BRTAKEN
:
6947 case BFD_RELOC_PPC_B16_BRNTAKEN
:
6948 case BFD_RELOC_PPC_BA16_BRTAKEN
:
6949 case BFD_RELOC_PPC_BA16_BRNTAKEN
:
6950 case BFD_RELOC_PPC64_REL24_NOTOC
:
6953 asymbol
*bfdsym
= symbol_get_bfdsym (fix
->fx_addsy
);
6954 elf_symbol_type
*elfsym
6955 = elf_symbol_from (bfd_asymbol_bfd (bfdsym
), bfdsym
);
6956 gas_assert (elfsym
);
6957 if ((STO_PPC64_LOCAL_MASK
& elfsym
->internal_elf_sym
.st_other
) != 0)
6965 return (fix
->fx_r_type
!= BFD_RELOC_16_GOTOFF
6966 && fix
->fx_r_type
!= BFD_RELOC_LO16_GOTOFF
6967 && fix
->fx_r_type
!= BFD_RELOC_HI16_GOTOFF
6968 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_GOTOFF
6969 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_DS
6970 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT16_LO_DS
6971 && fix
->fx_r_type
!= BFD_RELOC_16_GOT_PCREL
6972 && fix
->fx_r_type
!= BFD_RELOC_32_GOTOFF
6973 && fix
->fx_r_type
!= BFD_RELOC_PPC64_GOT_PCREL34
6974 && fix
->fx_r_type
!= BFD_RELOC_24_PLT_PCREL
6975 && fix
->fx_r_type
!= BFD_RELOC_32_PLTOFF
6976 && fix
->fx_r_type
!= BFD_RELOC_32_PLT_PCREL
6977 && fix
->fx_r_type
!= BFD_RELOC_LO16_PLTOFF
6978 && fix
->fx_r_type
!= BFD_RELOC_HI16_PLTOFF
6979 && fix
->fx_r_type
!= BFD_RELOC_HI16_S_PLTOFF
6980 && fix
->fx_r_type
!= BFD_RELOC_64_PLTOFF
6981 && fix
->fx_r_type
!= BFD_RELOC_64_PLT_PCREL
6982 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT16_LO_DS
6983 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLT_PCREL34
6984 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16
6985 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO
6986 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HI
6987 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_HA
6988 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_DS
6989 && fix
->fx_r_type
!= BFD_RELOC_PPC64_PLTGOT16_LO_DS
6990 && fix
->fx_r_type
!= BFD_RELOC_GPREL16
6991 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_LO16A
6992 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HI16A
6993 && fix
->fx_r_type
!= BFD_RELOC_PPC_VLE_SDAREL_HA16A
6994 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_INHERIT
6995 && fix
->fx_r_type
!= BFD_RELOC_VTABLE_ENTRY
6996 && !(fix
->fx_r_type
>= BFD_RELOC_PPC_TLS
6997 && fix
->fx_r_type
<= BFD_RELOC_PPC64_DTPREL16_HIGHESTA
));
7002 ppc_frag_check (struct frag
*fragP
)
7004 if ((fragP
->fr_address
& fragP
->insn_addr
) != 0)
7005 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7006 _("instruction address is not a multiple of %d"),
7007 fragP
->insn_addr
+ 1);
7010 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
7011 rs_align_code frag. */
7014 ppc_handle_align (struct frag
*fragP
)
7016 valueT count
= (fragP
->fr_next
->fr_address
7017 - (fragP
->fr_address
+ fragP
->fr_fix
));
7019 if ((ppc_cpu
& PPC_OPCODE_VLE
) != 0 && count
!= 0 && (count
& 1) == 0)
7021 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
7024 md_number_to_chars (dest
, 0x4400, 2);
7026 else if (count
!= 0 && (count
& 3) == 0)
7028 char *dest
= fragP
->fr_literal
+ fragP
->fr_fix
;
7032 if (count
> 4 * nop_limit
&& count
< 0x2000000)
7036 /* Make a branch, then follow with nops. Insert another
7037 frag to handle the nops. */
7038 md_number_to_chars (dest
, 0x48000000 + count
, 4);
7043 rest
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7044 memcpy (rest
, fragP
, SIZEOF_STRUCT_FRAG
);
7045 fragP
->fr_next
= rest
;
7047 rest
->fr_address
+= rest
->fr_fix
+ 4;
7049 /* If we leave the next frag as rs_align_code we'll come here
7050 again, resulting in a bunch of branches rather than a
7051 branch followed by nops. */
7052 rest
->fr_type
= rs_align
;
7053 dest
= rest
->fr_literal
;
7056 md_number_to_chars (dest
, 0x60000000, 4);
7058 if ((ppc_cpu
& PPC_OPCODE_POWER6
) != 0
7059 && (ppc_cpu
& PPC_OPCODE_POWER9
) == 0)
7061 /* For power6, power7, and power8, we want the last nop to
7062 be a group terminating one. Do this by inserting an
7063 rs_fill frag immediately after this one, with its address
7064 set to the last nop location. This will automatically
7065 reduce the number of nops in the current frag by one. */
7068 struct frag
*group_nop
= xmalloc (SIZEOF_STRUCT_FRAG
+ 4);
7070 memcpy (group_nop
, fragP
, SIZEOF_STRUCT_FRAG
);
7071 group_nop
->fr_address
= group_nop
->fr_next
->fr_address
- 4;
7072 group_nop
->fr_fix
= 0;
7073 group_nop
->fr_offset
= 1;
7074 group_nop
->fr_type
= rs_fill
;
7075 fragP
->fr_next
= group_nop
;
7076 dest
= group_nop
->fr_literal
;
7079 if ((ppc_cpu
& PPC_OPCODE_POWER7
) != 0)
7081 if (ppc_cpu
& PPC_OPCODE_E500MC
)
7082 /* e500mc group terminating nop: "ori 0,0,0". */
7083 md_number_to_chars (dest
, 0x60000000, 4);
7085 /* power7/power8 group terminating nop: "ori 2,2,0". */
7086 md_number_to_chars (dest
, 0x60420000, 4);
7089 /* power6 group terminating nop: "ori 1,1,0". */
7090 md_number_to_chars (dest
, 0x60210000, 4);
7095 /* Apply a fixup to the object code. This is called for all the
7096 fixups we generated by the calls to fix_new_exp, above. */
7099 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
7101 valueT value
= * valP
;
7103 const struct powerpc_operand
*operand
;
7106 if (fixP
->fx_addsy
!= NULL
)
7108 /* Hack around bfd_install_relocation brain damage. */
7110 value
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
7112 if (fixP
->fx_addsy
== abs_section_sym
)
7118 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7119 the symbol values. If we are doing this relocation the code in
7120 write.c is going to call bfd_install_relocation, which is also
7121 going to use the symbol value. That means that if the reloc is
7122 fully resolved we want to use *valP since bfd_install_relocation is
7124 However, if the reloc is not fully resolved we do not want to
7125 use *valP, and must use fx_offset instead. If the relocation
7126 is PC-relative, we then need to re-apply md_pcrel_from_section
7127 to this new relocation value. */
7128 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
7133 value
= fixP
->fx_offset
;
7135 value
-= md_pcrel_from_section (fixP
, seg
);
7139 /* We are only able to convert some relocs to pc-relative. */
7142 switch (fixP
->fx_r_type
)
7145 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
7149 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
7153 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
7156 case BFD_RELOC_LO16
:
7157 fixP
->fx_r_type
= BFD_RELOC_LO16_PCREL
;
7160 case BFD_RELOC_HI16
:
7161 fixP
->fx_r_type
= BFD_RELOC_HI16_PCREL
;
7164 case BFD_RELOC_HI16_S
:
7165 fixP
->fx_r_type
= BFD_RELOC_HI16_S_PCREL
;
7168 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7169 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGH
;
7172 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7173 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHA
;
7176 case BFD_RELOC_PPC64_HIGHER
:
7177 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER
;
7180 case BFD_RELOC_PPC64_HIGHER_S
:
7181 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA
;
7184 case BFD_RELOC_PPC64_HIGHEST
:
7185 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST
;
7188 case BFD_RELOC_PPC64_HIGHEST_S
:
7189 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA
;
7192 case BFD_RELOC_PPC64_ADDR16_HIGHER34
:
7193 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHER34
;
7196 case BFD_RELOC_PPC64_ADDR16_HIGHERA34
:
7197 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHERA34
;
7200 case BFD_RELOC_PPC64_ADDR16_HIGHEST34
:
7201 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHEST34
;
7204 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34
:
7205 fixP
->fx_r_type
= BFD_RELOC_PPC64_REL16_HIGHESTA34
;
7208 case BFD_RELOC_PPC_16DX_HA
:
7209 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7212 case BFD_RELOC_PPC64_D34
:
7213 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL34
;
7216 case BFD_RELOC_PPC64_D28
:
7217 fixP
->fx_r_type
= BFD_RELOC_PPC64_PCREL28
;
7224 else if (!fixP
->fx_done
7225 && fixP
->fx_r_type
== BFD_RELOC_PPC_16DX_HA
)
7227 /* addpcis is relative to next insn address. */
7229 fixP
->fx_r_type
= BFD_RELOC_PPC_REL16DX_HA
;
7234 if (fixP
->fx_pcrel_adjust
!= 0)
7236 /* This is a fixup on an instruction. */
7237 int opindex
= fixP
->fx_pcrel_adjust
& 0xff;
7239 operand
= &powerpc_operands
[opindex
];
7241 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
7242 does not generate a reloc. It uses the offset of `sym' within its
7243 csect. Other usages, such as `.long sym', generate relocs. This
7244 is the documented behaviour of non-TOC symbols. */
7245 if ((operand
->flags
& PPC_OPERAND_PARENS
) != 0
7246 && (operand
->bitm
& 0xfff0) == 0xfff0
7247 && operand
->shift
== 0
7248 && (operand
->insert
== NULL
|| ppc_obj64
)
7249 && fixP
->fx_addsy
!= NULL
7250 && symbol_get_tc (fixP
->fx_addsy
)->subseg
!= 0
7251 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC
7252 && symbol_get_tc (fixP
->fx_addsy
)->symbol_class
!= XMC_TC0
7253 && S_GET_SEGMENT (fixP
->fx_addsy
) != bss_section
)
7255 value
= fixP
->fx_offset
;
7259 /* During parsing of instructions, a TOC16 reloc is generated for
7260 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7261 in the toc. But at parse time, SYM may be not yet defined, so
7262 check again here. */
7263 if (fixP
->fx_r_type
== BFD_RELOC_16
7264 && fixP
->fx_addsy
!= NULL
7265 && ppc_is_toc_sym (fixP
->fx_addsy
))
7266 fixP
->fx_r_type
= BFD_RELOC_PPC_TOC16
;
7270 /* Calculate value to be stored in field. */
7272 switch (fixP
->fx_r_type
)
7275 case BFD_RELOC_PPC64_ADDR16_LO_DS
:
7276 case BFD_RELOC_PPC_VLE_LO16A
:
7277 case BFD_RELOC_PPC_VLE_LO16D
:
7279 case BFD_RELOC_LO16
:
7280 case BFD_RELOC_LO16_PCREL
:
7281 fieldval
= value
& 0xffff;
7283 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7284 fieldval
= SEX16 (fieldval
);
7285 fixP
->fx_no_overflow
= 1;
7288 case BFD_RELOC_HI16
:
7289 case BFD_RELOC_HI16_PCREL
:
7291 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7293 fieldval
= value
>> 16;
7294 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7296 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7297 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7303 case BFD_RELOC_PPC_VLE_HI16A
:
7304 case BFD_RELOC_PPC_VLE_HI16D
:
7305 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7307 fieldval
= PPC_HI (value
);
7308 goto sign_extend_16
;
7310 case BFD_RELOC_HI16_S
:
7311 case BFD_RELOC_HI16_S_PCREL
:
7312 case BFD_RELOC_PPC_16DX_HA
:
7313 case BFD_RELOC_PPC_REL16DX_HA
:
7315 if (REPORT_OVERFLOW_HI
&& ppc_obj64
)
7317 fieldval
= (value
+ 0x8000) >> 16;
7318 if (operand
!= NULL
&& (operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
7320 valueT sign
= (((valueT
) -1 >> 16) + 1) >> 1;
7321 fieldval
= ((valueT
) fieldval
^ sign
) - sign
;
7327 case BFD_RELOC_PPC_VLE_HA16A
:
7328 case BFD_RELOC_PPC_VLE_HA16D
:
7329 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7331 fieldval
= PPC_HA (value
);
7332 goto sign_extend_16
;
7335 case BFD_RELOC_PPC64_HIGHER
:
7336 fieldval
= PPC_HIGHER (value
);
7337 goto sign_extend_16
;
7339 case BFD_RELOC_PPC64_HIGHER_S
:
7340 fieldval
= PPC_HIGHERA (value
);
7341 goto sign_extend_16
;
7343 case BFD_RELOC_PPC64_HIGHEST
:
7344 fieldval
= PPC_HIGHEST (value
);
7345 goto sign_extend_16
;
7347 case BFD_RELOC_PPC64_HIGHEST_S
:
7348 fieldval
= PPC_HIGHESTA (value
);
7349 goto sign_extend_16
;
7356 if (operand
!= NULL
)
7358 /* Handle relocs in an insn. */
7359 switch (fixP
->fx_r_type
)
7362 /* The following relocs can't be calculated by the assembler.
7363 Leave the field zero. */
7364 case BFD_RELOC_PPC_TPREL16
:
7365 case BFD_RELOC_PPC_TPREL16_LO
:
7366 case BFD_RELOC_PPC_TPREL16_HI
:
7367 case BFD_RELOC_PPC_TPREL16_HA
:
7368 case BFD_RELOC_PPC_DTPREL16
:
7369 case BFD_RELOC_PPC_DTPREL16_LO
:
7370 case BFD_RELOC_PPC_DTPREL16_HI
:
7371 case BFD_RELOC_PPC_DTPREL16_HA
:
7372 case BFD_RELOC_PPC_GOT_TLSGD16
:
7373 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7374 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7375 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7376 case BFD_RELOC_PPC_GOT_TLSLD16
:
7377 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7378 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7379 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7380 case BFD_RELOC_PPC_GOT_TPREL16
:
7381 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7382 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7383 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7384 case BFD_RELOC_PPC_GOT_DTPREL16
:
7385 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7386 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7387 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7388 case BFD_RELOC_PPC64_TPREL16_DS
:
7389 case BFD_RELOC_PPC64_TPREL16_LO_DS
:
7390 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7391 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7392 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7393 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7394 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7395 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7396 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7397 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7398 case BFD_RELOC_PPC64_DTPREL16_DS
:
7399 case BFD_RELOC_PPC64_DTPREL16_LO_DS
:
7400 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7401 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7402 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7403 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7404 gas_assert (fixP
->fx_addsy
!= NULL
);
7405 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7409 /* These also should leave the field zero for the same
7410 reason. Note that older versions of gas wrote values
7411 here. If we want to go back to the old behaviour, then
7412 all _LO and _LO_DS cases will need to be treated like
7413 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7414 case BFD_RELOC_16_GOTOFF
:
7415 case BFD_RELOC_LO16_GOTOFF
:
7416 case BFD_RELOC_HI16_GOTOFF
:
7417 case BFD_RELOC_HI16_S_GOTOFF
:
7418 case BFD_RELOC_LO16_PLTOFF
:
7419 case BFD_RELOC_HI16_PLTOFF
:
7420 case BFD_RELOC_HI16_S_PLTOFF
:
7421 case BFD_RELOC_GPREL16
:
7422 case BFD_RELOC_16_BASEREL
:
7423 case BFD_RELOC_LO16_BASEREL
:
7424 case BFD_RELOC_HI16_BASEREL
:
7425 case BFD_RELOC_HI16_S_BASEREL
:
7426 case BFD_RELOC_PPC_TOC16
:
7427 case BFD_RELOC_PPC64_TOC16_LO
:
7428 case BFD_RELOC_PPC64_TOC16_HI
:
7429 case BFD_RELOC_PPC64_TOC16_HA
:
7430 case BFD_RELOC_PPC64_PLTGOT16
:
7431 case BFD_RELOC_PPC64_PLTGOT16_LO
:
7432 case BFD_RELOC_PPC64_PLTGOT16_HI
:
7433 case BFD_RELOC_PPC64_PLTGOT16_HA
:
7434 case BFD_RELOC_PPC64_GOT16_DS
:
7435 case BFD_RELOC_PPC64_GOT16_LO_DS
:
7436 case BFD_RELOC_PPC64_PLT16_LO_DS
:
7437 case BFD_RELOC_PPC64_SECTOFF_DS
:
7438 case BFD_RELOC_PPC64_SECTOFF_LO_DS
:
7439 case BFD_RELOC_PPC64_TOC16_DS
:
7440 case BFD_RELOC_PPC64_TOC16_LO_DS
:
7441 case BFD_RELOC_PPC64_PLTGOT16_DS
:
7442 case BFD_RELOC_PPC64_PLTGOT16_LO_DS
:
7443 case BFD_RELOC_PPC_EMB_NADDR16
:
7444 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7445 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7446 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7447 case BFD_RELOC_PPC_EMB_SDAI16
:
7448 case BFD_RELOC_PPC_EMB_SDA2I16
:
7449 case BFD_RELOC_PPC_EMB_SDA2REL
:
7450 case BFD_RELOC_PPC_EMB_SDA21
:
7451 case BFD_RELOC_PPC_EMB_MRKREF
:
7452 case BFD_RELOC_PPC_EMB_RELSEC16
:
7453 case BFD_RELOC_PPC_EMB_RELST_LO
:
7454 case BFD_RELOC_PPC_EMB_RELST_HI
:
7455 case BFD_RELOC_PPC_EMB_RELST_HA
:
7456 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7457 case BFD_RELOC_PPC_EMB_RELSDA
:
7458 case BFD_RELOC_PPC_VLE_SDA21
:
7459 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7460 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7461 case BFD_RELOC_PPC_VLE_SDAREL_LO16D
:
7462 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7463 case BFD_RELOC_PPC_VLE_SDAREL_HI16D
:
7464 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7465 case BFD_RELOC_PPC_VLE_SDAREL_HA16D
:
7466 case BFD_RELOC_PPC64_GOT_PCREL34
:
7467 case BFD_RELOC_PPC64_PLT_PCREL34
:
7468 gas_assert (fixP
->fx_addsy
!= NULL
);
7471 case BFD_RELOC_PPC_TLS
:
7472 case BFD_RELOC_PPC_TLSGD
:
7473 case BFD_RELOC_PPC_TLSLD
:
7479 case BFD_RELOC_PPC_B16
:
7480 /* Adjust the offset to the instruction boundary. */
7485 case BFD_RELOC_VTABLE_INHERIT
:
7486 case BFD_RELOC_VTABLE_ENTRY
:
7487 case BFD_RELOC_PPC_DTPMOD
:
7488 case BFD_RELOC_PPC_TPREL
:
7489 case BFD_RELOC_PPC_DTPREL
:
7490 case BFD_RELOC_PPC_COPY
:
7491 case BFD_RELOC_PPC_GLOB_DAT
:
7492 case BFD_RELOC_32_PLT_PCREL
:
7493 case BFD_RELOC_PPC_EMB_NADDR32
:
7494 case BFD_RELOC_PPC64_TOC
:
7495 case BFD_RELOC_CTOR
:
7497 case BFD_RELOC_32_PCREL
:
7500 case BFD_RELOC_64_PCREL
:
7501 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7502 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7503 _("%s unsupported as instruction fixup"),
7504 bfd_get_reloc_code_name (fixP
->fx_r_type
));
7513 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7514 contents can stay at zero. */
7515 #define APPLY_RELOC fixP->fx_done
7517 #define APPLY_RELOC 1
7519 /* We need to call the insert function even when fieldval is
7520 zero if the insert function would translate that zero to a
7521 bit pattern other than all zeros. */
7522 if ((fieldval
!= 0 && APPLY_RELOC
) || operand
->insert
!= NULL
)
7525 unsigned char *where
;
7527 /* Fetch the instruction, insert the fully resolved operand
7528 value, and stuff the instruction back again. */
7529 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
7530 if (target_big_endian
)
7532 if (fixP
->fx_size
< 4)
7533 insn
= bfd_getb16 (where
);
7536 insn
= bfd_getb32 (where
);
7537 if (fixP
->fx_size
> 4)
7538 insn
= insn
<< 32 | bfd_getb32 (where
+ 4);
7543 if (fixP
->fx_size
< 4)
7544 insn
= bfd_getl16 (where
);
7547 insn
= bfd_getl32 (where
);
7548 if (fixP
->fx_size
> 4)
7549 insn
= insn
<< 32 | bfd_getl32 (where
+ 4);
7552 insn
= ppc_insert_operand (insn
, operand
, fieldval
,
7553 fixP
->tc_fix_data
.ppc_cpu
,
7554 fixP
->fx_file
, fixP
->fx_line
);
7555 if (target_big_endian
)
7557 if (fixP
->fx_size
< 4)
7558 bfd_putb16 (insn
, where
);
7561 if (fixP
->fx_size
> 4)
7563 bfd_putb32 (insn
, where
+ 4);
7566 bfd_putb32 (insn
, where
);
7571 if (fixP
->fx_size
< 4)
7572 bfd_putl16 (insn
, where
);
7575 if (fixP
->fx_size
> 4)
7577 bfd_putl32 (insn
, where
+ 4);
7580 bfd_putl32 (insn
, where
);
7586 /* Nothing else to do here. */
7589 gas_assert (fixP
->fx_addsy
!= NULL
);
7590 if (fixP
->fx_r_type
== BFD_RELOC_NONE
)
7595 /* Use expr_symbol_where to see if this is an expression
7597 if (expr_symbol_where (fixP
->fx_addsy
, &sfile
, &sline
))
7598 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7599 _("unresolved expression that must be resolved"));
7601 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
7602 _("unsupported relocation against %s"),
7603 S_GET_NAME (fixP
->fx_addsy
));
7610 /* Handle relocs in data. */
7611 switch (fixP
->fx_r_type
)
7613 case BFD_RELOC_VTABLE_INHERIT
:
7615 && !S_IS_DEFINED (fixP
->fx_addsy
)
7616 && !S_IS_WEAK (fixP
->fx_addsy
))
7617 S_SET_WEAK (fixP
->fx_addsy
);
7620 case BFD_RELOC_VTABLE_ENTRY
:
7625 /* These can appear with @l etc. in data. */
7626 case BFD_RELOC_LO16
:
7627 case BFD_RELOC_LO16_PCREL
:
7628 case BFD_RELOC_HI16
:
7629 case BFD_RELOC_HI16_PCREL
:
7630 case BFD_RELOC_HI16_S
:
7631 case BFD_RELOC_HI16_S_PCREL
:
7632 case BFD_RELOC_PPC64_HIGHER
:
7633 case BFD_RELOC_PPC64_HIGHER_S
:
7634 case BFD_RELOC_PPC64_HIGHEST
:
7635 case BFD_RELOC_PPC64_HIGHEST_S
:
7636 case BFD_RELOC_PPC64_ADDR16_HIGH
:
7637 case BFD_RELOC_PPC64_ADDR16_HIGHA
:
7638 case BFD_RELOC_PPC64_ADDR64_LOCAL
:
7641 case BFD_RELOC_PPC_DTPMOD
:
7642 case BFD_RELOC_PPC_TPREL
:
7643 case BFD_RELOC_PPC_DTPREL
:
7644 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
7647 /* Just punt all of these to the linker. */
7648 case BFD_RELOC_PPC_B16_BRTAKEN
:
7649 case BFD_RELOC_PPC_B16_BRNTAKEN
:
7650 case BFD_RELOC_16_GOTOFF
:
7651 case BFD_RELOC_LO16_GOTOFF
:
7652 case BFD_RELOC_HI16_GOTOFF
:
7653 case BFD_RELOC_HI16_S_GOTOFF
:
7654 case BFD_RELOC_LO16_PLTOFF
:
7655 case BFD_RELOC_HI16_PLTOFF
:
7656 case BFD_RELOC_HI16_S_PLTOFF
:
7657 case BFD_RELOC_PPC_COPY
:
7658 case BFD_RELOC_PPC_GLOB_DAT
:
7659 case BFD_RELOC_16_BASEREL
:
7660 case BFD_RELOC_LO16_BASEREL
:
7661 case BFD_RELOC_HI16_BASEREL
:
7662 case BFD_RELOC_HI16_S_BASEREL
:
7663 case BFD_RELOC_PPC_TLS
:
7664 case BFD_RELOC_PPC_DTPREL16_LO
:
7665 case BFD_RELOC_PPC_DTPREL16_HI
:
7666 case BFD_RELOC_PPC_DTPREL16_HA
:
7667 case BFD_RELOC_PPC_TPREL16_LO
:
7668 case BFD_RELOC_PPC_TPREL16_HI
:
7669 case BFD_RELOC_PPC_TPREL16_HA
:
7670 case BFD_RELOC_PPC_GOT_TLSGD16
:
7671 case BFD_RELOC_PPC_GOT_TLSGD16_LO
:
7672 case BFD_RELOC_PPC_GOT_TLSGD16_HI
:
7673 case BFD_RELOC_PPC_GOT_TLSGD16_HA
:
7674 case BFD_RELOC_PPC_GOT_TLSLD16
:
7675 case BFD_RELOC_PPC_GOT_TLSLD16_LO
:
7676 case BFD_RELOC_PPC_GOT_TLSLD16_HI
:
7677 case BFD_RELOC_PPC_GOT_TLSLD16_HA
:
7678 case BFD_RELOC_PPC_GOT_DTPREL16
:
7679 case BFD_RELOC_PPC_GOT_DTPREL16_LO
:
7680 case BFD_RELOC_PPC_GOT_DTPREL16_HI
:
7681 case BFD_RELOC_PPC_GOT_DTPREL16_HA
:
7682 case BFD_RELOC_PPC_GOT_TPREL16
:
7683 case BFD_RELOC_PPC_GOT_TPREL16_LO
:
7684 case BFD_RELOC_PPC_GOT_TPREL16_HI
:
7685 case BFD_RELOC_PPC_GOT_TPREL16_HA
:
7686 case BFD_RELOC_24_PLT_PCREL
:
7687 case BFD_RELOC_PPC_LOCAL24PC
:
7688 case BFD_RELOC_32_PLT_PCREL
:
7689 case BFD_RELOC_GPREL16
:
7690 case BFD_RELOC_PPC_VLE_SDAREL_LO16A
:
7691 case BFD_RELOC_PPC_VLE_SDAREL_HI16A
:
7692 case BFD_RELOC_PPC_VLE_SDAREL_HA16A
:
7693 case BFD_RELOC_PPC_EMB_NADDR32
:
7694 case BFD_RELOC_PPC_EMB_NADDR16
:
7695 case BFD_RELOC_PPC_EMB_NADDR16_LO
:
7696 case BFD_RELOC_PPC_EMB_NADDR16_HI
:
7697 case BFD_RELOC_PPC_EMB_NADDR16_HA
:
7698 case BFD_RELOC_PPC_EMB_SDAI16
:
7699 case BFD_RELOC_PPC_EMB_SDA2REL
:
7700 case BFD_RELOC_PPC_EMB_SDA2I16
:
7701 case BFD_RELOC_PPC_EMB_SDA21
:
7702 case BFD_RELOC_PPC_VLE_SDA21_LO
:
7703 case BFD_RELOC_PPC_EMB_MRKREF
:
7704 case BFD_RELOC_PPC_EMB_RELSEC16
:
7705 case BFD_RELOC_PPC_EMB_RELST_LO
:
7706 case BFD_RELOC_PPC_EMB_RELST_HI
:
7707 case BFD_RELOC_PPC_EMB_RELST_HA
:
7708 case BFD_RELOC_PPC_EMB_BIT_FLD
:
7709 case BFD_RELOC_PPC_EMB_RELSDA
:
7710 case BFD_RELOC_PPC64_TOC
:
7711 case BFD_RELOC_PPC_TOC16
:
7712 case BFD_RELOC_PPC64_TOC16_LO
:
7713 case BFD_RELOC_PPC64_TOC16_HI
:
7714 case BFD_RELOC_PPC64_TOC16_HA
:
7715 case BFD_RELOC_PPC64_DTPREL16_HIGH
:
7716 case BFD_RELOC_PPC64_DTPREL16_HIGHA
:
7717 case BFD_RELOC_PPC64_DTPREL16_HIGHER
:
7718 case BFD_RELOC_PPC64_DTPREL16_HIGHERA
:
7719 case BFD_RELOC_PPC64_DTPREL16_HIGHEST
:
7720 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA
:
7721 case BFD_RELOC_PPC64_TPREL16_HIGH
:
7722 case BFD_RELOC_PPC64_TPREL16_HIGHA
:
7723 case BFD_RELOC_PPC64_TPREL16_HIGHER
:
7724 case BFD_RELOC_PPC64_TPREL16_HIGHERA
:
7725 case BFD_RELOC_PPC64_TPREL16_HIGHEST
:
7726 case BFD_RELOC_PPC64_TPREL16_HIGHESTA
:
7732 case BFD_RELOC_NONE
:
7734 case BFD_RELOC_CTOR
:
7736 case BFD_RELOC_32_PCREL
:
7739 case BFD_RELOC_64_PCREL
:
7741 case BFD_RELOC_16_PCREL
:
7747 _("Gas failure, reloc value %d\n"), fixP
->fx_r_type
);
7752 if (fixP
->fx_size
&& APPLY_RELOC
)
7753 md_number_to_chars (fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
,
7754 fieldval
, fixP
->fx_size
);
7756 && (seg
->flags
& SEC_CODE
) != 0
7757 && fixP
->fx_size
== 4
7760 && (fixP
->fx_r_type
== BFD_RELOC_32
7761 || fixP
->fx_r_type
== BFD_RELOC_CTOR
7762 || fixP
->fx_r_type
== BFD_RELOC_32_PCREL
))
7763 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
7764 _("data in executable section"));
7768 ppc_elf_validate_fix (fixP
, seg
);
7769 fixP
->fx_addnumber
= value
;
7771 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7772 from the section contents. If we are going to be emitting a reloc
7773 then the section contents are immaterial, so don't warn if they
7774 happen to overflow. Leave such warnings to ld. */
7777 fixP
->fx_no_overflow
= 1;
7779 /* Arrange to emit .TOC. as a normal symbol if used in anything
7780 but .TOC.@tocbase. */
7782 && fixP
->fx_r_type
!= BFD_RELOC_PPC64_TOC
7783 && fixP
->fx_addsy
!= NULL
7784 && strcmp (S_GET_NAME (fixP
->fx_addsy
), ".TOC.") == 0)
7785 symbol_get_bfdsym (fixP
->fx_addsy
)->flags
|= BSF_KEEP
;
7788 if (fixP
->fx_r_type
!= BFD_RELOC_PPC_TOC16
)
7789 fixP
->fx_addnumber
= 0;
7793 fixP
->fx_addnumber
= 0;
7795 /* We want to use the offset within the toc, not the actual VMA
7797 fixP
->fx_addnumber
=
7798 - bfd_get_section_vma (stdoutput
, S_GET_SEGMENT (fixP
->fx_addsy
))
7799 - S_GET_VALUE (ppc_toc_csect
);
7800 /* Set *valP to avoid errors. */
7807 /* Generate a reloc for a fixup. */
7810 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
7814 reloc
= XNEW (arelent
);
7816 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
7817 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
7818 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
7819 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
7820 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
7822 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
7823 _("reloc %d not supported by object file format"),
7824 (int) fixp
->fx_r_type
);
7827 reloc
->addend
= fixp
->fx_addnumber
;
7833 ppc_cfi_frame_initial_instructions (void)
7835 cfi_add_CFA_def_cfa (1, 0);
7839 tc_ppc_regname_to_dw2regnum (char *regname
)
7841 unsigned int regnum
= -1;
7845 static struct { const char *name
; int dw2regnum
; } regnames
[] =
7847 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7848 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7849 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7850 { "spe_acc", 111 }, { "spefscr", 112 }
7853 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
7854 if (strcmp (regnames
[i
].name
, regname
) == 0)
7855 return regnames
[i
].dw2regnum
;
7857 if (regname
[0] == 'r' || regname
[0] == 'f' || regname
[0] == 'v')
7859 p
= regname
+ 1 + (regname
[1] == '.');
7860 regnum
= strtoul (p
, &q
, 10);
7861 if (p
== q
|| *q
|| regnum
>= 32)
7863 if (regname
[0] == 'f')
7865 else if (regname
[0] == 'v')
7868 else if (regname
[0] == 'c' && regname
[1] == 'r')
7870 p
= regname
+ 2 + (regname
[2] == '.');
7871 if (p
[0] < '0' || p
[0] > '7' || p
[1])
7873 regnum
= p
[0] - '0' + 68;