1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
38 #include "dw2gencfi.h"
44 expressionS immediate
;
48 const char comment_chars
[] = "!";
49 const char line_separator_chars
[] = ";";
50 const char line_comment_chars
[] = "!#";
52 static void s_uses (int);
53 static void s_uacons (int);
56 static void sh_elf_cons (int);
58 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
62 big (int ignore ATTRIBUTE_UNUSED
)
64 if (! target_big_endian
)
65 as_bad (_("directive .big encountered when option -big required"));
67 /* Stop further messages. */
68 target_big_endian
= 1;
72 little (int ignore ATTRIBUTE_UNUSED
)
74 if (target_big_endian
)
75 as_bad (_("directive .little encountered when option -little required"));
77 /* Stop further messages. */
78 target_big_endian
= 0;
81 /* This table describes all the machine specific pseudo-ops the assembler
82 has to support. The fields are:
83 pseudo-op name without dot
84 function to call to execute this pseudo-op
85 Integer arg to pass to the function. */
87 const pseudo_typeS md_pseudo_table
[] =
90 {"long", sh_elf_cons
, 4},
91 {"int", sh_elf_cons
, 4},
92 {"word", sh_elf_cons
, 2},
93 {"short", sh_elf_cons
, 2},
99 {"form", listing_psize
, 0},
100 {"little", little
, 0},
101 {"heading", listing_title
, 0},
102 {"import", s_ignore
, 0},
103 {"page", listing_eject
, 0},
104 {"program", s_ignore
, 0},
106 {"uaword", s_uacons
, 2},
107 {"ualong", s_uacons
, 4},
108 {"uaquad", s_uacons
, 8},
109 {"2byte", s_uacons
, 2},
110 {"4byte", s_uacons
, 4},
111 {"8byte", s_uacons
, 8},
113 {"mode", s_sh64_mode
, 0 },
115 /* Have the old name too. */
116 {"isa", s_sh64_mode
, 0 },
118 /* Assert that the right ABI is used. */
119 {"abi", s_sh64_abi
, 0 },
121 { "vtable_inherit", sh64_vtable_inherit
, 0 },
122 { "vtable_entry", sh64_vtable_entry
, 0 },
123 #endif /* HAVE_SH64 */
127 int sh_relax
; /* set if -relax seen */
129 /* Whether -small was seen. */
133 /* Flag to generate relocations against symbol values for local symbols. */
135 static int dont_adjust_reloc_32
;
137 /* preset architecture set, if given; zero otherwise. */
139 static unsigned int preset_target_arch
;
141 /* The bit mask of architectures that could
142 accommodate the insns seen so far. */
143 static unsigned int valid_arch
;
145 const char EXP_CHARS
[] = "eE";
147 /* Chars that mean this number is a floating point constant. */
150 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
152 #define C(a,b) ENCODE_RELAX(a,b)
154 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
155 #define GET_WHAT(x) ((x>>4))
157 /* These are the three types of relaxable instruction. */
158 /* These are the types of relaxable instructions; except for END which is
161 #define COND_JUMP_DELAY 2
162 #define UNCOND_JUMP 3
166 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
167 #define SH64PCREL16_32 4
168 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
169 #define SH64PCREL16_64 5
171 /* Variants of the above for adjusting the insn to PTA or PTB according to
173 #define SH64PCREL16PT_32 6
174 #define SH64PCREL16PT_64 7
176 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
177 #define MOVI_IMM_32 8
178 #define MOVI_IMM_32_PCREL 9
179 #define MOVI_IMM_64 10
180 #define MOVI_IMM_64_PCREL 11
183 #else /* HAVE_SH64 */
187 #endif /* HAVE_SH64 */
193 #define UNDEF_WORD_DISP 4
199 #define UNDEF_SH64PCREL 0
200 #define SH64PCREL16 1
201 #define SH64PCREL32 2
202 #define SH64PCREL48 3
203 #define SH64PCREL64 4
204 #define SH64PCRELPLT 5
212 #define MOVI_GOTOFF 6
214 #endif /* HAVE_SH64 */
216 /* Branch displacements are from the address of the branch plus
217 four, thus all minimum and maximum values have 4 added to them. */
220 #define COND8_LENGTH 2
222 /* There is one extra instruction before the branch, so we must add
223 two more bytes to account for it. */
224 #define COND12_F 4100
225 #define COND12_M -4090
226 #define COND12_LENGTH 6
228 #define COND12_DELAY_LENGTH 4
230 /* ??? The minimum and maximum values are wrong, but this does not matter
231 since this relocation type is not supported yet. */
232 #define COND32_F (1<<30)
233 #define COND32_M -(1<<30)
234 #define COND32_LENGTH 14
236 #define UNCOND12_F 4098
237 #define UNCOND12_M -4092
238 #define UNCOND12_LENGTH 2
240 /* ??? The minimum and maximum values are wrong, but this does not matter
241 since this relocation type is not supported yet. */
242 #define UNCOND32_F (1<<30)
243 #define UNCOND32_M -(1<<30)
244 #define UNCOND32_LENGTH 14
247 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
248 TRd" as is the current insn, so no extra length. Note that the "reach"
249 is calculated from the address *after* that insn, but the offset in the
250 insn is calculated from the beginning of the insn. We also need to
251 take into account the implicit 1 coded as the "A" in PTA when counting
252 forward. If PTB reaches an odd address, we trap that as an error
253 elsewhere, so we don't have to have different relaxation entries. We
254 don't add a one to the negative range, since PTB would then have the
255 farthest backward-reaching value skipped, not generated at relaxation. */
256 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
257 #define SH64PCREL16_M (-32768 * 4 - 4)
258 #define SH64PCREL16_LENGTH 0
260 /* The next step is to change that PT insn into
261 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
262 SHORI (label - datalabel Ln) & 65535, R25
265 which means two extra insns, 8 extra bytes. This is the limit for the
268 The expressions look a bit bad since we have to adjust this to avoid overflow on a
270 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
271 #define SH64PCREL32_LENGTH (2 * 4)
273 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
275 #if BFD_HOST_64BIT_LONG
276 /* The "reach" type is long, so we can only do this for a 64-bit-long
278 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
279 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
280 #define SH64PCREL48_M (((long) -1 << 47) - 4)
281 #define SH64PCREL48_LENGTH (3 * 4)
283 /* If the host does not have 64-bit longs, just make this state identical
284 in reach to the 32-bit state. Note that we have a slightly incorrect
285 reach, but the correct one above will overflow a 32-bit number. */
286 #define SH64PCREL32_M (((long) -1 << 30) * 2)
287 #define SH64PCREL48_F SH64PCREL32_F
288 #define SH64PCREL48_M SH64PCREL32_M
289 #define SH64PCREL48_LENGTH (3 * 4)
290 #endif /* BFD_HOST_64BIT_LONG */
292 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
294 #define SH64PCREL64_LENGTH (4 * 4)
296 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
297 SH64PCREL expansions. The PCREL one is similar, but the other has no
298 pc-relative reach; it must be fully expanded in
299 shmedia_md_estimate_size_before_relax. */
300 #define MOVI_16_LENGTH 0
301 #define MOVI_16_F (32767 - 4)
302 #define MOVI_16_M (-32768 - 4)
303 #define MOVI_32_LENGTH 4
304 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
305 #define MOVI_48_LENGTH 8
307 #if BFD_HOST_64BIT_LONG
308 /* The "reach" type is long, so we can only do this for a 64-bit-long
310 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
311 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
312 #define MOVI_48_M (((long) -1 << 47) - 4)
314 /* If the host does not have 64-bit longs, just make this state identical
315 in reach to the 32-bit state. Note that we have a slightly incorrect
316 reach, but the correct one above will overflow a 32-bit number. */
317 #define MOVI_32_M (((long) -1 << 30) * 2)
318 #define MOVI_48_F MOVI_32_F
319 #define MOVI_48_M MOVI_32_M
320 #endif /* BFD_HOST_64BIT_LONG */
322 #define MOVI_64_LENGTH 12
323 #endif /* HAVE_SH64 */
325 #define EMPTY { 0, 0, 0, 0 }
327 const relax_typeS md_relax_table
[C (END
, 0)] = {
328 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
329 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
332 /* C (COND_JUMP, COND8) */
333 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
334 /* C (COND_JUMP, COND12) */
335 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
336 /* C (COND_JUMP, COND32) */
337 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
338 /* C (COND_JUMP, UNDEF_WORD_DISP) */
339 { 0, 0, COND32_LENGTH
, 0, },
341 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
344 /* C (COND_JUMP_DELAY, COND8) */
345 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
346 /* C (COND_JUMP_DELAY, COND12) */
347 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
348 /* C (COND_JUMP_DELAY, COND32) */
349 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
350 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
351 { 0, 0, COND32_LENGTH
, 0, },
353 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
356 /* C (UNCOND_JUMP, UNCOND12) */
357 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
358 /* C (UNCOND_JUMP, UNCOND32) */
359 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
361 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
362 { 0, 0, UNCOND32_LENGTH
, 0, },
364 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
367 /* C (SH64PCREL16_32, SH64PCREL16) */
369 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
370 /* C (SH64PCREL16_32, SH64PCREL32) */
371 { 0, 0, SH64PCREL32_LENGTH
, 0 },
373 /* C (SH64PCREL16_32, SH64PCRELPLT) */
374 { 0, 0, SH64PCREL32_LENGTH
, 0 },
376 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
378 /* C (SH64PCREL16_64, SH64PCREL16) */
380 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
381 /* C (SH64PCREL16_64, SH64PCREL32) */
382 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
383 /* C (SH64PCREL16_64, SH64PCREL48) */
384 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
385 /* C (SH64PCREL16_64, SH64PCREL64) */
386 { 0, 0, SH64PCREL64_LENGTH
, 0 },
387 /* C (SH64PCREL16_64, SH64PCRELPLT) */
388 { 0, 0, SH64PCREL64_LENGTH
, 0 },
390 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
392 /* C (SH64PCREL16PT_32, SH64PCREL16) */
394 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
395 /* C (SH64PCREL16PT_32, SH64PCREL32) */
396 { 0, 0, SH64PCREL32_LENGTH
, 0 },
398 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
399 { 0, 0, SH64PCREL32_LENGTH
, 0 },
401 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
403 /* C (SH64PCREL16PT_64, SH64PCREL16) */
405 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
406 /* C (SH64PCREL16PT_64, SH64PCREL32) */
410 C (SH64PCREL16PT_64
, SH64PCREL48
) },
411 /* C (SH64PCREL16PT_64, SH64PCREL48) */
412 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
413 /* C (SH64PCREL16PT_64, SH64PCREL64) */
414 { 0, 0, SH64PCREL64_LENGTH
, 0 },
415 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
416 { 0, 0, SH64PCREL64_LENGTH
, 0},
418 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
420 /* C (MOVI_IMM_32, UNDEF_MOVI) */
421 { 0, 0, MOVI_32_LENGTH
, 0 },
422 /* C (MOVI_IMM_32, MOVI_16) */
423 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
424 /* C (MOVI_IMM_32, MOVI_32) */
425 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
427 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
428 { 0, 0, MOVI_32_LENGTH
, 0 },
429 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
431 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
433 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
434 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
435 { 0, 0, MOVI_32_LENGTH
, 0 },
437 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
438 { 0, 0, MOVI_32_LENGTH
, 0 },
440 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
441 { 0, 0, MOVI_32_LENGTH
, 0 },
442 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
444 /* C (MOVI_IMM_64, UNDEF_MOVI) */
445 { 0, 0, MOVI_64_LENGTH
, 0 },
446 /* C (MOVI_IMM_64, MOVI_16) */
447 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
448 /* C (MOVI_IMM_64, MOVI_32) */
449 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
450 /* C (MOVI_IMM_64, MOVI_48) */
451 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
452 /* C (MOVI_IMM_64, MOVI_64) */
453 { 0, 0, MOVI_64_LENGTH
, 0 },
455 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
456 { 0, 0, MOVI_64_LENGTH
, 0 },
457 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
459 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
461 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
462 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
463 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
464 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
465 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
466 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
467 { 0, 0, MOVI_64_LENGTH
, 0 },
468 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
469 { 0, 0, MOVI_64_LENGTH
, 0 },
471 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
472 { 0, 0, MOVI_64_LENGTH
, 0 },
473 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
475 #endif /* HAVE_SH64 */
481 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
485 /* Determinet whether the symbol needs any kind of PIC relocation. */
488 sh_PIC_related_p (symbolS
*sym
)
495 if (sym
== GOT_symbol
)
499 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
503 exp
= symbol_get_value_expression (sym
);
505 return (exp
->X_op
== O_PIC_reloc
506 || sh_PIC_related_p (exp
->X_add_symbol
)
507 || sh_PIC_related_p (exp
->X_op_symbol
));
510 /* Determine the relocation type to be used to represent the
511 expression, that may be rearranged. */
514 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
516 expressionS
*exp
= main_exp
;
518 /* This is here for backward-compatibility only. GCC used to generated:
520 f@PLT + . - (.LPCS# + 2)
522 but we'd rather be able to handle this as a PIC-related reference
523 plus/minus a symbol. However, gas' parser gives us:
525 O_subtract (O_add (f@PLT, .), .LPCS#+2)
527 so we attempt to transform this into:
529 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
531 which we can handle simply below. */
532 if (exp
->X_op
== O_subtract
)
534 if (sh_PIC_related_p (exp
->X_op_symbol
))
537 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
539 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
542 if (exp
&& exp
->X_op
== O_add
543 && sh_PIC_related_p (exp
->X_add_symbol
))
545 symbolS
*sym
= exp
->X_add_symbol
;
547 exp
->X_op
= O_subtract
;
548 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
550 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
551 main_exp
->X_add_symbol
= sym
;
553 main_exp
->X_add_number
+= exp
->X_add_number
;
554 exp
->X_add_number
= 0;
559 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
562 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
565 if (exp
->X_add_symbol
566 && (exp
->X_add_symbol
== GOT_symbol
568 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
572 case BFD_RELOC_SH_IMM_LOW16
:
573 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
576 case BFD_RELOC_SH_IMM_MEDLOW16
:
577 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
580 case BFD_RELOC_SH_IMM_MEDHI16
:
581 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
584 case BFD_RELOC_SH_IMM_HI16
:
585 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
589 case BFD_RELOC_UNUSED
:
590 *r_type_p
= BFD_RELOC_SH_GOTPC
;
599 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
601 *r_type_p
= BFD_RELOC_SH_GOTPC
;
605 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
610 if (exp
->X_op
== O_PIC_reloc
)
616 case BFD_RELOC_UNUSED
:
617 *r_type_p
= exp
->X_md
;
620 case BFD_RELOC_SH_IMM_LOW16
:
623 case BFD_RELOC_32_GOTOFF
:
624 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
627 case BFD_RELOC_SH_GOTPLT32
:
628 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
631 case BFD_RELOC_32_GOT_PCREL
:
632 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
635 case BFD_RELOC_32_PLT_PCREL
:
636 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
644 case BFD_RELOC_SH_IMM_MEDLOW16
:
647 case BFD_RELOC_32_GOTOFF
:
648 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
651 case BFD_RELOC_SH_GOTPLT32
:
652 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
655 case BFD_RELOC_32_GOT_PCREL
:
656 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
659 case BFD_RELOC_32_PLT_PCREL
:
660 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
668 case BFD_RELOC_SH_IMM_MEDHI16
:
671 case BFD_RELOC_32_GOTOFF
:
672 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
675 case BFD_RELOC_SH_GOTPLT32
:
676 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
679 case BFD_RELOC_32_GOT_PCREL
:
680 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
683 case BFD_RELOC_32_PLT_PCREL
:
684 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
692 case BFD_RELOC_SH_IMM_HI16
:
695 case BFD_RELOC_32_GOTOFF
:
696 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
699 case BFD_RELOC_SH_GOTPLT32
:
700 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
703 case BFD_RELOC_32_GOT_PCREL
:
704 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
707 case BFD_RELOC_32_PLT_PCREL
:
708 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
720 *r_type_p
= exp
->X_md
;
723 exp
->X_op
= O_symbol
;
726 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
727 main_exp
->X_add_number
+= exp
->X_add_number
;
731 return (sh_PIC_related_p (exp
->X_add_symbol
)
732 || sh_PIC_related_p (exp
->X_op_symbol
));
737 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
740 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
742 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
744 if (sh_check_fixup (exp
, &r_type
))
745 as_bad (_("Invalid PIC expression."));
747 if (r_type
== BFD_RELOC_UNUSED
)
751 r_type
= BFD_RELOC_8
;
755 r_type
= BFD_RELOC_16
;
759 r_type
= BFD_RELOC_32
;
764 r_type
= BFD_RELOC_64
;
774 as_bad (_("unsupported BFD relocation size %u"), size
);
775 r_type
= BFD_RELOC_UNUSED
;
778 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
781 /* The regular cons() function, that reads constants, doesn't support
782 suffixes such as @GOT, @GOTOFF and @PLT, that generate
783 machine-specific relocation types. So we must define it here. */
784 /* Clobbers input_line_pointer, checks end-of-line. */
785 /* NBYTES 1=.byte, 2=.word, 4=.long */
787 sh_elf_cons (register int nbytes
)
793 /* Update existing range to include a previous insn, if there was one. */
794 sh64_update_contents_mark (TRUE
);
796 /* We need to make sure the contents type is set to data. */
799 #endif /* HAVE_SH64 */
801 if (is_it_end_of_statement ())
803 demand_empty_rest_of_line ();
808 md_cons_align (nbytes
);
814 emit_expr (&exp
, (unsigned int) nbytes
);
816 while (*input_line_pointer
++ == ',');
818 input_line_pointer
--; /* Put terminator back into stream. */
819 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
821 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
824 demand_empty_rest_of_line ();
829 /* This function is called once, at assembler startup time. This should
830 set up all the tables, etc that the MD part of the assembler needs. */
835 const sh_opcode_info
*opcode
;
836 char *prev_name
= "";
837 unsigned int target_arch
;
840 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
841 valid_arch
= target_arch
;
847 opcode_hash_control
= hash_new ();
849 /* Insert unique names into hash table. */
850 for (opcode
= sh_table
; opcode
->name
; opcode
++)
852 if (strcmp (prev_name
, opcode
->name
) != 0)
854 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
856 prev_name
= opcode
->name
;
857 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
864 static int reg_x
, reg_y
;
868 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
870 /* Try to parse a reg name. Return the number of chars consumed. */
873 parse_reg (char *src
, int *mode
, int *reg
)
875 char l0
= TOLOWER (src
[0]);
876 char l1
= l0
? TOLOWER (src
[1]) : 0;
878 /* We use ! IDENT_CHAR for the next character after the register name, to
879 make sure that we won't accidentally recognize a symbol name such as
880 'sram' or sr_ram as being a reference to the register 'sr'. */
886 if (src
[2] >= '0' && src
[2] <= '5'
887 && ! IDENT_CHAR ((unsigned char) src
[3]))
890 *reg
= 10 + src
[2] - '0';
894 if (l1
>= '0' && l1
<= '9'
895 && ! IDENT_CHAR ((unsigned char) src
[2]))
901 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
902 && ! IDENT_CHAR ((unsigned char) src
[7]))
909 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
914 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
925 if (! IDENT_CHAR ((unsigned char) src
[2]))
931 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
940 if (! IDENT_CHAR ((unsigned char) src
[2]))
946 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
954 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
955 && ! IDENT_CHAR ((unsigned char) src
[3]))
958 *reg
= 4 + (l1
- '0');
961 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
962 && ! IDENT_CHAR ((unsigned char) src
[3]))
965 *reg
= 6 + (l1
- '0');
968 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
969 && ! IDENT_CHAR ((unsigned char) src
[3]))
974 *reg
= n
| ((~n
& 2) << 1);
979 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
1001 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1002 && ! IDENT_CHAR ((unsigned char) src
[2]))
1005 *reg
= A_X0_NUM
+ l1
- '0';
1009 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1010 && ! IDENT_CHAR ((unsigned char) src
[2]))
1013 *reg
= A_Y0_NUM
+ l1
- '0';
1017 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1018 && ! IDENT_CHAR ((unsigned char) src
[2]))
1021 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1027 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1033 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1034 && ! IDENT_CHAR ((unsigned char) src
[3]))
1040 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1041 && ! IDENT_CHAR ((unsigned char) src
[3]))
1047 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1048 && ! IDENT_CHAR ((unsigned char) src
[3]))
1054 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1055 && ! IDENT_CHAR ((unsigned char) src
[3]))
1061 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1067 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1074 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1079 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1081 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1082 and use an uninitialized immediate. */
1086 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1087 && ! IDENT_CHAR ((unsigned char) src
[3]))
1092 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1093 && ! IDENT_CHAR ((unsigned char) src
[3]))
1099 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1100 && ! IDENT_CHAR ((unsigned char) src
[3]))
1105 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1106 && ! IDENT_CHAR ((unsigned char) src
[4]))
1108 if (TOLOWER (src
[3]) == 'l')
1113 if (TOLOWER (src
[3]) == 'h')
1119 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1120 && ! IDENT_CHAR ((unsigned char) src
[3]))
1125 if (l0
== 'f' && l1
== 'r')
1129 if (src
[3] >= '0' && src
[3] <= '5'
1130 && ! IDENT_CHAR ((unsigned char) src
[4]))
1133 *reg
= 10 + src
[3] - '0';
1137 if (src
[2] >= '0' && src
[2] <= '9'
1138 && ! IDENT_CHAR ((unsigned char) src
[3]))
1141 *reg
= (src
[2] - '0');
1145 if (l0
== 'd' && l1
== 'r')
1149 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1150 && ! IDENT_CHAR ((unsigned char) src
[4]))
1153 *reg
= 10 + src
[3] - '0';
1157 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1158 && ! IDENT_CHAR ((unsigned char) src
[3]))
1161 *reg
= (src
[2] - '0');
1165 if (l0
== 'x' && l1
== 'd')
1169 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1170 && ! IDENT_CHAR ((unsigned char) src
[4]))
1173 *reg
= 11 + src
[3] - '0';
1177 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1178 && ! IDENT_CHAR ((unsigned char) src
[3]))
1181 *reg
= (src
[2] - '0') + 1;
1185 if (l0
== 'f' && l1
== 'v')
1187 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1193 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1194 && ! IDENT_CHAR ((unsigned char) src
[3]))
1197 *reg
= (src
[2] - '0');
1201 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1202 && TOLOWER (src
[3]) == 'l'
1203 && ! IDENT_CHAR ((unsigned char) src
[4]))
1209 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1210 && TOLOWER (src
[3]) == 'c'
1211 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1217 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1218 && TOLOWER (src
[3]) == 'r'
1219 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1229 parse_exp (char *s
, sh_operand_info
*op
)
1234 save
= input_line_pointer
;
1235 input_line_pointer
= s
;
1236 expression (&op
->immediate
);
1237 if (op
->immediate
.X_op
== O_absent
)
1238 as_bad (_("missing operand"));
1240 else if (op
->immediate
.X_op
== O_PIC_reloc
1241 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1242 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1243 as_bad (_("misplaced PIC operand"));
1245 new = input_line_pointer
;
1246 input_line_pointer
= save
;
1250 /* The many forms of operand:
1253 @Rn Register indirect
1266 pr, gbr, vbr, macl, mach
1270 parse_at (char *src
, sh_operand_info
*op
)
1277 src
= parse_at (src
, op
);
1278 if (op
->type
== A_DISP_TBR
)
1279 op
->type
= A_DISP2_TBR
;
1281 as_bad (_("illegal double indirection"));
1283 else if (src
[0] == '-')
1285 /* Must be predecrement. */
1288 len
= parse_reg (src
, &mode
, &(op
->reg
));
1289 if (mode
!= A_REG_N
)
1290 as_bad (_("illegal register after @-"));
1295 else if (src
[0] == '(')
1297 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1300 len
= parse_reg (src
, &mode
, &(op
->reg
));
1301 if (len
&& mode
== A_REG_N
)
1306 as_bad (_("must be @(r0,...)"));
1311 /* Now can be rn or gbr. */
1312 len
= parse_reg (src
, &mode
, &(op
->reg
));
1322 op
->type
= A_R0_GBR
;
1324 else if (mode
== A_REG_N
)
1326 op
->type
= A_IND_R0_REG_N
;
1330 as_bad (_("syntax error in @(r0,...)"));
1335 as_bad (_("syntax error in @(r0...)"));
1340 /* Must be an @(disp,.. thing). */
1341 src
= parse_exp (src
, op
);
1344 /* Now can be rn, gbr or pc. */
1345 len
= parse_reg (src
, &mode
, &op
->reg
);
1348 if (mode
== A_REG_N
)
1350 op
->type
= A_DISP_REG_N
;
1352 else if (mode
== A_GBR
)
1354 op
->type
= A_DISP_GBR
;
1356 else if (mode
== A_TBR
)
1358 op
->type
= A_DISP_TBR
;
1360 else if (mode
== A_PC
)
1362 /* We want @(expr, pc) to uniformly address . + expr,
1363 no matter if expr is a constant, or a more complex
1364 expression, e.g. sym-. or sym1-sym2.
1365 However, we also used to accept @(sym,pc)
1366 as addressing sym, i.e. meaning the same as plain sym.
1367 Some existing code does use the @(sym,pc) syntax, so
1368 we give it the old semantics for now, but warn about
1369 its use, so that users have some time to fix their code.
1371 Note that due to this backward compatibility hack,
1372 we'll get unexpected results when @(offset, pc) is used,
1373 and offset is a symbol that is set later to an an address
1374 difference, or an external symbol that is set to an
1375 address difference in another source file, so we want to
1376 eventually remove it. */
1377 if (op
->immediate
.X_op
== O_symbol
)
1379 op
->type
= A_DISP_PC
;
1380 as_warn (_("Deprecated syntax."));
1384 op
->type
= A_DISP_PC_ABS
;
1385 /* Such operands don't get corrected for PC==.+4, so
1386 make the correction here. */
1387 op
->immediate
.X_add_number
-= 4;
1392 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1397 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1402 as_bad (_("expecting )"));
1408 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1409 if (mode
!= A_REG_N
)
1410 as_bad (_("illegal register after @"));
1417 l0
= TOLOWER (src
[0]);
1418 l1
= TOLOWER (src
[1]);
1420 if ((l0
== 'r' && l1
== '8')
1421 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1424 op
->type
= AX_PMOD_N
;
1426 else if ( (l0
== 'r' && l1
== '9')
1427 || (l0
== 'i' && l1
== 'y'))
1430 op
->type
= AY_PMOD_N
;
1442 get_operand (char **ptr
, sh_operand_info
*op
)
1451 *ptr
= parse_exp (src
, op
);
1456 else if (src
[0] == '@')
1458 *ptr
= parse_at (src
, op
);
1461 len
= parse_reg (src
, &mode
, &(op
->reg
));
1470 /* Not a reg, the only thing left is a displacement. */
1471 *ptr
= parse_exp (src
, op
);
1472 op
->type
= A_DISP_PC
;
1478 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1483 /* The pre-processor will eliminate whitespace in front of '@'
1484 after the first argument; we may be called multiple times
1485 from assemble_ppi, so don't insist on finding whitespace here. */
1489 get_operand (&ptr
, operand
+ 0);
1496 get_operand (&ptr
, operand
+ 1);
1497 /* ??? Hack: psha/pshl have a varying operand number depending on
1498 the type of the first operand. We handle this by having the
1499 three-operand version first and reducing the number of operands
1500 parsed to two if we see that the first operand is an immediate.
1501 This works because no insn with three operands has an immediate
1502 as first operand. */
1503 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1509 get_operand (&ptr
, operand
+ 2);
1513 operand
[2].type
= 0;
1518 operand
[1].type
= 0;
1519 operand
[2].type
= 0;
1524 operand
[0].type
= 0;
1525 operand
[1].type
= 0;
1526 operand
[2].type
= 0;
1531 /* Passed a pointer to a list of opcodes which use different
1532 addressing modes, return the opcode which matches the opcodes
1535 static sh_opcode_info
*
1536 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1538 sh_opcode_info
*this_try
= opcode
;
1539 char *name
= opcode
->name
;
1542 while (opcode
->name
)
1544 this_try
= opcode
++;
1545 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1547 /* We've looked so far down the table that we've run out of
1548 opcodes with the same name. */
1552 /* Look at both operands needed by the opcodes and provided by
1553 the user - since an arg test will often fail on the same arg
1554 again and again, we'll try and test the last failing arg the
1555 first on each opcode try. */
1556 for (n
= 0; this_try
->arg
[n
]; n
++)
1558 sh_operand_info
*user
= operands
+ n
;
1559 sh_arg_type arg
= this_try
->arg
[n
];
1561 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
1562 && ( arg
== A_DISP_REG_M
1563 || arg
== A_DISP_REG_N
))
1565 /* Check a few key IMM* fields for overflow. */
1567 long val
= user
->immediate
.X_add_number
;
1569 for (opf
= 0; opf
< 4; opf
++)
1570 switch (this_try
->nibbles
[opf
])
1574 if (val
< 0 || val
> 15)
1579 if (val
< 0 || val
> 15 * 2)
1584 if (val
< 0 || val
> 15 * 4)
1594 if (user
->type
== A_DISP_PC_ABS
)
1605 if (user
->type
!= arg
)
1609 /* opcode needs r0 */
1610 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1614 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1618 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1626 case A_IND_R0_REG_N
:
1635 /* Opcode needs rn */
1636 if (user
->type
!= arg
)
1641 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1657 if (user
->type
!= arg
)
1662 if (user
->type
!= arg
)
1668 if (user
->type
!= A_INC_N
)
1670 if (user
->reg
!= 15)
1676 if (user
->type
!= A_DEC_N
)
1678 if (user
->reg
!= 15)
1687 case A_IND_R0_REG_M
:
1690 /* Opcode needs rn */
1691 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1697 if (user
->type
!= A_DEC_N
)
1699 if (user
->reg
< 2 || user
->reg
> 5)
1705 if (user
->type
!= A_INC_N
)
1707 if (user
->reg
< 2 || user
->reg
> 5)
1713 if (user
->type
!= A_IND_N
)
1715 if (user
->reg
< 2 || user
->reg
> 5)
1721 if (user
->type
!= AX_PMOD_N
)
1723 if (user
->reg
< 2 || user
->reg
> 5)
1729 if (user
->type
!= A_INC_N
)
1731 if (user
->reg
< 4 || user
->reg
> 5)
1737 if (user
->type
!= A_IND_N
)
1739 if (user
->reg
< 4 || user
->reg
> 5)
1745 if (user
->type
!= AX_PMOD_N
)
1747 if (user
->reg
< 4 || user
->reg
> 5)
1753 if (user
->type
!= A_INC_N
)
1755 if ((user
->reg
< 4 || user
->reg
> 5)
1756 && (user
->reg
< 0 || user
->reg
> 1))
1762 if (user
->type
!= A_IND_N
)
1764 if ((user
->reg
< 4 || user
->reg
> 5)
1765 && (user
->reg
< 0 || user
->reg
> 1))
1771 if (user
->type
!= AX_PMOD_N
)
1773 if ((user
->reg
< 4 || user
->reg
> 5)
1774 && (user
->reg
< 0 || user
->reg
> 1))
1780 if (user
->type
!= A_INC_N
)
1782 if (user
->reg
< 6 || user
->reg
> 7)
1788 if (user
->type
!= A_IND_N
)
1790 if (user
->reg
< 6 || user
->reg
> 7)
1796 if (user
->type
!= AY_PMOD_N
)
1798 if (user
->reg
< 6 || user
->reg
> 7)
1804 if (user
->type
!= A_INC_N
)
1806 if ((user
->reg
< 6 || user
->reg
> 7)
1807 && (user
->reg
< 2 || user
->reg
> 3))
1813 if (user
->type
!= A_IND_N
)
1815 if ((user
->reg
< 6 || user
->reg
> 7)
1816 && (user
->reg
< 2 || user
->reg
> 3))
1822 if (user
->type
!= AY_PMOD_N
)
1824 if ((user
->reg
< 6 || user
->reg
> 7)
1825 && (user
->reg
< 2 || user
->reg
> 3))
1831 if (user
->type
!= DSP_REG_N
)
1833 if (user
->reg
!= A_A0_NUM
1834 && user
->reg
!= A_A1_NUM
)
1840 if (user
->type
!= DSP_REG_N
)
1862 if (user
->type
!= DSP_REG_N
)
1884 if (user
->type
!= DSP_REG_N
)
1906 if (user
->type
!= DSP_REG_N
)
1928 if (user
->type
!= DSP_REG_N
)
1950 if (user
->type
!= DSP_REG_N
)
1972 if (user
->type
!= DSP_REG_N
)
1994 if (user
->type
!= DSP_REG_N
)
2016 if (user
->type
!= DSP_REG_N
)
2038 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
2042 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
2046 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
2050 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
2054 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
2064 /* Opcode needs rn */
2065 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2070 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2075 if (user
->type
!= XMTRX_M4
)
2081 printf (_("unhandled %d\n"), arg
);
2085 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
2087 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
2097 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2099 fix_new_exp (frag_now
,
2100 where
- frag_now
->fr_literal
,
2108 insert4 (char * where
, int how
, int pcrel
, sh_operand_info
* op
)
2110 fix_new_exp (frag_now
,
2111 where
- frag_now
->fr_literal
,
2118 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2120 int high_byte
= target_big_endian
? 0 : 1;
2123 if (opcode
->arg
[0] == A_BDISP8
)
2125 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2126 p
= frag_var (rs_machine_dependent
,
2127 md_relax_table
[C (what
, COND32
)].rlx_length
,
2128 md_relax_table
[C (what
, COND8
)].rlx_length
,
2130 op
->immediate
.X_add_symbol
,
2131 op
->immediate
.X_add_number
,
2133 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2135 else if (opcode
->arg
[0] == A_BDISP12
)
2137 p
= frag_var (rs_machine_dependent
,
2138 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2139 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2141 op
->immediate
.X_add_symbol
,
2142 op
->immediate
.X_add_number
,
2144 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2149 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2152 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2157 /* Since the low byte of the opcode will be overwritten by the reloc, we
2158 can just stash the high byte into both bytes and ignore endianness. */
2161 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2162 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2166 static int count
= 0;
2168 /* If the last loop insn is a two-byte-insn, it is in danger of being
2169 swapped with the insn after it. To prevent this, create a new
2170 symbol - complete with SH_LABEL reloc - after the last loop insn.
2171 If the last loop insn is four bytes long, the symbol will be
2172 right in the middle, but four byte insns are not swapped anyways. */
2173 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2174 Hence a 9 digit number should be enough to count all REPEATs. */
2176 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2177 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2178 /* Make this a local symbol. */
2180 SF_SET_LOCAL (end_sym
);
2181 #endif /* OBJ_COFF */
2182 symbol_table_insert (end_sym
);
2183 end_sym
->sy_value
= operand
[1].immediate
;
2184 end_sym
->sy_value
.X_add_number
+= 2;
2185 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2188 output
= frag_more (2);
2191 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2192 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2194 return frag_more (2);
2197 /* Now we know what sort of opcodes it is, let's build the bytes. */
2200 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2205 unsigned int size
= 2;
2206 int low_byte
= target_big_endian
? 1 : 0;
2218 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2220 output
= frag_more (4);
2225 output
= frag_more (2);
2227 for (index
= 0; index
< max_index
; index
++)
2229 sh_nibble_type i
= opcode
->nibbles
[index
];
2240 nbuf
[index
] = reg_n
;
2243 nbuf
[index
] = reg_m
;
2246 if (reg_n
< 2 || reg_n
> 5)
2247 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2248 nbuf
[index
] = (reg_n
& 3) | 4;
2251 nbuf
[index
] = reg_n
| (reg_m
>> 2);
2254 nbuf
[index
] = reg_b
| 0x08;
2257 nbuf
[index
] = reg_n
| 0x01;
2260 nbuf
[index
] |= 0x08;
2262 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2265 nbuf
[index
] |= 0x80;
2267 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2270 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2273 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2276 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2279 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2282 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2285 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2288 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2291 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2296 insert4 (output
, BFD_RELOC_SH_DISP20
, 0, operand
);
2299 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2302 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2305 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2308 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2311 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2314 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2317 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2320 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2323 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2326 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2329 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2332 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2335 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2338 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2339 operand
->type
!= A_DISP_PC_ABS
, operand
);
2342 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2343 operand
->type
!= A_DISP_PC_ABS
, operand
);
2346 output
= insert_loop_bounds (output
, operand
);
2347 nbuf
[index
] = opcode
->nibbles
[3];
2351 printf (_("failed for %d\n"), i
);
2355 if (!target_big_endian
)
2357 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2358 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2362 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2363 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2365 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2367 if (!target_big_endian
)
2369 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2370 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2374 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2375 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2381 /* Find an opcode at the start of *STR_P in the hash table, and set
2382 *STR_P to the first character after the last one read. */
2384 static sh_opcode_info
*
2385 find_cooked_opcode (char **str_p
)
2388 unsigned char *op_start
;
2389 unsigned char *op_end
;
2393 /* Drop leading whitespace. */
2397 /* Find the op code end.
2398 The pre-processor will eliminate whitespace in front of
2399 any '@' after the first argument; we may be called from
2400 assemble_ppi, so the opcode might be terminated by an '@'. */
2401 for (op_start
= op_end
= (unsigned char *) str
;
2404 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2407 unsigned char c
= op_start
[nlen
];
2409 /* The machine independent code will convert CMP/EQ into cmp/EQ
2410 because it thinks the '/' is the end of the symbol. Moreover,
2411 all but the first sub-insn is a parallel processing insn won't
2412 be capitalized. Instead of hacking up the machine independent
2413 code, we just deal with it here. */
2420 *str_p
= (char *) op_end
;
2423 as_bad (_("can't find opcode "));
2425 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2428 /* Assemble a parallel processing insn. */
2429 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2432 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2444 sh_operand_info operand
[3];
2446 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2447 Make sure we encode a defined insn pattern. */
2452 if (opcode
->arg
[0] != A_END
)
2453 op_end
= get_operands (opcode
, op_end
, operand
);
2455 opcode
= get_specific (opcode
, operand
);
2458 /* Couldn't find an opcode which matched the operands. */
2459 char *where
= frag_more (2);
2464 as_bad (_("invalid operands for opcode"));
2468 if (opcode
->nibbles
[0] != PPI
)
2469 as_bad (_("insn can't be combined with parallel processing insn"));
2471 switch (opcode
->nibbles
[1])
2476 as_bad (_("multiple movx specifications"));
2481 as_bad (_("multiple movy specifications"));
2487 as_bad (_("multiple movx specifications"));
2488 if ((reg_n
< 4 || reg_n
> 5)
2489 && (reg_n
< 0 || reg_n
> 1))
2490 as_bad (_("invalid movx address register"));
2491 if (movy
&& movy
!= DDT_BASE
)
2492 as_bad (_("insn cannot be combined with non-nopy"));
2493 movx
= ((((reg_n
& 1) != 0) << 9)
2494 + (((reg_n
& 4) == 0) << 8)
2496 + (opcode
->nibbles
[2] << 4)
2497 + opcode
->nibbles
[3]
2503 as_bad (_("multiple movy specifications"));
2504 if ((reg_n
< 6 || reg_n
> 7)
2505 && (reg_n
< 2 || reg_n
> 3))
2506 as_bad (_("invalid movy address register"));
2507 if (movx
&& movx
!= DDT_BASE
)
2508 as_bad (_("insn cannot be combined with non-nopx"));
2509 movy
= ((((reg_n
& 1) != 0) << 8)
2510 + (((reg_n
& 4) == 0) << 9)
2512 + (opcode
->nibbles
[2] << 4)
2513 + opcode
->nibbles
[3]
2519 as_bad (_("multiple movx specifications"));
2521 as_bad (_("previous movy requires nopx"));
2522 if (reg_n
< 4 || reg_n
> 5)
2523 as_bad (_("invalid movx address register"));
2524 if (opcode
->nibbles
[2] & 8)
2526 if (reg_m
== A_A1_NUM
)
2528 else if (reg_m
!= A_A0_NUM
)
2529 as_bad (_("invalid movx dsp register"));
2534 as_bad (_("invalid movx dsp register"));
2537 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2542 as_bad (_("multiple movy specifications"));
2544 as_bad (_("previous movx requires nopy"));
2545 if (opcode
->nibbles
[2] & 8)
2547 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2550 if (reg_m
== A_A1_NUM
)
2552 else if (reg_m
!= A_A0_NUM
)
2553 as_bad (_("invalid movy dsp register"));
2558 as_bad (_("invalid movy dsp register"));
2561 if (reg_n
< 6 || reg_n
> 7)
2562 as_bad (_("invalid movy address register"));
2563 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2567 if (operand
[0].immediate
.X_op
!= O_constant
)
2568 as_bad (_("dsp immediate shift value not constant"));
2569 field_b
= ((opcode
->nibbles
[2] << 12)
2570 | (operand
[0].immediate
.X_add_number
& 127) << 4
2577 goto try_another_opcode
;
2582 as_bad (_("multiple parallel processing specifications"));
2583 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2584 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2585 switch (opcode
->nibbles
[4])
2593 field_b
+= opcode
->nibbles
[4] << 4;
2601 as_bad (_("multiple condition specifications"));
2602 cond
= opcode
->nibbles
[2] << 8;
2604 goto skip_cond_check
;
2608 as_bad (_("multiple parallel processing specifications"));
2609 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2610 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2612 switch (opcode
->nibbles
[4])
2620 field_b
+= opcode
->nibbles
[4] << 4;
2629 if ((field_b
& 0xef00) == 0xa100)
2631 /* pclr Dz pmuls Se,Sf,Dg */
2632 else if ((field_b
& 0xff00) == 0x8d00
2633 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2635 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2639 as_bad (_("insn cannot be combined with pmuls"));
2640 switch (field_b
& 0xf)
2643 field_b
+= 0 - A_X0_NUM
;
2646 field_b
+= 1 - A_Y0_NUM
;
2649 field_b
+= 2 - A_A0_NUM
;
2652 field_b
+= 3 - A_A1_NUM
;
2655 as_bad (_("bad combined pmuls output operand"));
2657 /* Generate warning if the destination register for padd / psub
2658 and pmuls is the same ( only for A0 or A1 ).
2659 If the last nibble is 1010 then A0 is used in both
2660 padd / psub and pmuls. If it is 1111 then A1 is used
2661 as destination register in both padd / psub and pmuls. */
2663 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2664 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2665 as_warn (_("destination register is same for parallel insns"));
2667 field_b
+= 0x4000 + reg_efg
;
2674 as_bad (_("condition not followed by conditionalizable insn"));
2680 opcode
= find_cooked_opcode (&op_end
);
2684 (_("unrecognized characters at end of parallel processing insn")));
2689 move_code
= movx
| movy
;
2692 /* Parallel processing insn. */
2693 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2695 output
= frag_more (4);
2697 if (! target_big_endian
)
2699 output
[3] = ppi_code
>> 8;
2700 output
[2] = ppi_code
;
2704 output
[2] = ppi_code
>> 8;
2705 output
[3] = ppi_code
;
2707 move_code
|= 0xf800;
2711 /* Just a double data transfer. */
2712 output
= frag_more (2);
2715 if (! target_big_endian
)
2717 output
[1] = move_code
>> 8;
2718 output
[0] = move_code
;
2722 output
[0] = move_code
>> 8;
2723 output
[1] = move_code
;
2728 /* This is the guts of the machine-dependent assembler. STR points to a
2729 machine dependent instruction. This function is supposed to emit
2730 the frags/bytes it assembles to. */
2733 md_assemble (char *str
)
2736 sh_operand_info operand
[3];
2737 sh_opcode_info
*opcode
;
2738 unsigned int size
= 0;
2739 char *initial_str
= str
;
2742 if (sh64_isa_mode
== sh64_isa_shmedia
)
2744 shmedia_md_assemble (str
);
2749 /* If we've seen pseudo-directives, make sure any emitted data or
2750 frags are marked as data. */
2753 sh64_update_contents_mark (TRUE
);
2754 sh64_set_contents_type (CRT_SH5_ISA16
);
2759 #endif /* HAVE_SH64 */
2761 opcode
= find_cooked_opcode (&str
);
2766 /* The opcode is not in the hash table.
2767 This means we definately have an assembly failure,
2768 but the instruction may be valid in another CPU variant.
2769 In this case emit something better than 'unknown opcode'.
2770 Search the full table in sh-opc.h to check. */
2772 char *name
= initial_str
;
2773 int name_length
= 0;
2774 const sh_opcode_info
*op
;
2777 /* identify opcode in string */
2778 while (ISSPACE (*name
))
2782 while (!ISSPACE (name
[name_length
]))
2787 /* search for opcode in full list */
2788 for (op
= sh_table
; op
->name
; op
++)
2790 if (strncasecmp (op
->name
, name
, name_length
) == 0
2791 && op
->name
[name_length
] == '\0')
2800 as_bad (_("opcode not valid for this cpu variant"));
2804 as_bad (_("unknown opcode"));
2810 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2812 /* Output a CODE reloc to tell the linker that the following
2813 bytes are instructions, not data. */
2814 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2816 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2819 if (opcode
->nibbles
[0] == PPI
)
2821 size
= assemble_ppi (op_end
, opcode
);
2825 if (opcode
->arg
[0] == A_BDISP12
2826 || opcode
->arg
[0] == A_BDISP8
)
2828 /* Since we skip get_specific here, we have to check & update
2830 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2831 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
2833 as_bad (_("Delayed branches not available on SH1"));
2834 parse_exp (op_end
+ 1, &operand
[0]);
2835 build_relax (opcode
, &operand
[0]);
2839 if (opcode
->arg
[0] == A_END
)
2841 /* Ignore trailing whitespace. If there is any, it has already
2842 been compressed to a single space. */
2848 op_end
= get_operands (opcode
, op_end
, operand
);
2850 opcode
= get_specific (opcode
, operand
);
2854 /* Couldn't find an opcode which matched the operands. */
2855 char *where
= frag_more (2);
2860 as_bad (_("invalid operands for opcode"));
2865 as_bad (_("excess operands: '%s'"), op_end
);
2867 size
= build_Mytes (opcode
, operand
);
2872 dwarf2_emit_insn (size
);
2875 /* This routine is called each time a label definition is seen. It
2876 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2879 sh_frob_label (symbolS
*sym
)
2881 static fragS
*last_label_frag
;
2882 static int last_label_offset
;
2885 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2889 offset
= frag_now_fix ();
2890 if (frag_now
!= last_label_frag
2891 || offset
!= last_label_offset
)
2893 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2894 last_label_frag
= frag_now
;
2895 last_label_offset
= offset
;
2899 dwarf2_emit_label (sym
);
2902 /* This routine is called when the assembler is about to output some
2903 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2906 sh_flush_pending_output (void)
2909 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2911 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2913 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2918 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2923 /* Various routines to kill one day. */
2924 /* Equal to MAX_PRECISION in atof-ieee.c. */
2925 #define MAX_LITTLENUMS 6
2927 /* Turn a string in input_line_pointer into a floating point constant
2928 of type TYPE, and store the appropriate bytes in *LITP. The number
2929 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2930 returned, or NULL on OK. */
2933 md_atof (int type
, char *litP
, int *sizeP
)
2936 LITTLENUM_TYPE words
[4];
2952 return _("bad call to md_atof");
2955 t
= atof_ieee (input_line_pointer
, type
, words
);
2957 input_line_pointer
= t
;
2961 if (! target_big_endian
)
2963 for (i
= prec
- 1; i
>= 0; i
--)
2965 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2971 for (i
= 0; i
< prec
; i
++)
2973 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2981 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2982 call instruction. It refers to a label of the instruction which
2983 loads the register which the call uses. We use it to generate a
2984 special reloc for the linker. */
2987 s_uses (int ignore ATTRIBUTE_UNUSED
)
2992 as_warn (_(".uses pseudo-op seen when not relaxing"));
2996 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2998 as_bad (_("bad .uses format"));
2999 ignore_rest_of_line ();
3003 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
3005 demand_empty_rest_of_line ();
3008 const char *md_shortopts
= "";
3009 struct option md_longopts
[] =
3011 #define OPTION_RELAX (OPTION_MD_BASE)
3012 #define OPTION_BIG (OPTION_MD_BASE + 1)
3013 #define OPTION_LITTLE (OPTION_BIG + 1)
3014 #define OPTION_SMALL (OPTION_LITTLE + 1)
3015 #define OPTION_DSP (OPTION_SMALL + 1)
3016 #define OPTION_ISA (OPTION_DSP + 1)
3017 #define OPTION_RENESAS (OPTION_ISA + 1)
3019 {"relax", no_argument
, NULL
, OPTION_RELAX
},
3020 {"big", no_argument
, NULL
, OPTION_BIG
},
3021 {"little", no_argument
, NULL
, OPTION_LITTLE
},
3022 {"small", no_argument
, NULL
, OPTION_SMALL
},
3023 {"dsp", no_argument
, NULL
, OPTION_DSP
},
3024 {"isa", required_argument
, NULL
, OPTION_ISA
},
3025 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
3028 #define OPTION_ABI (OPTION_RENESAS + 1)
3029 #define OPTION_NO_MIX (OPTION_ABI + 1)
3030 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
3031 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
3032 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
3033 {"abi", required_argument
, NULL
, OPTION_ABI
},
3034 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
3035 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
3036 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
3037 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
3038 #endif /* HAVE_SH64 */
3040 {NULL
, no_argument
, NULL
, 0}
3042 size_t md_longopts_size
= sizeof (md_longopts
);
3045 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
3054 target_big_endian
= 1;
3058 target_big_endian
= 0;
3066 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3069 case OPTION_RENESAS
:
3070 dont_adjust_reloc_32
= 1;
3074 if (strcasecmp (arg
, "dsp") == 0)
3075 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
3076 else if (strcasecmp (arg
, "fp") == 0)
3077 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
3078 else if (strcasecmp (arg
, "any") == 0)
3079 preset_target_arch
= arch_sh_up
;
3081 else if (strcasecmp (arg
, "shmedia") == 0)
3083 if (sh64_isa_mode
== sh64_isa_shcompact
)
3084 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
3085 sh64_isa_mode
= sh64_isa_shmedia
;
3087 else if (strcasecmp (arg
, "shcompact") == 0)
3089 if (sh64_isa_mode
== sh64_isa_shmedia
)
3090 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
3091 if (sh64_abi
== sh64_abi_64
)
3092 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
3093 sh64_isa_mode
= sh64_isa_shcompact
;
3095 #endif /* HAVE_SH64 */
3098 extern const bfd_arch_info_type bfd_sh_arch
;
3099 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3100 preset_target_arch
= 0;
3101 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3103 int len
= strlen(bfd_arch
->printable_name
);
3105 if (bfd_arch
->mach
== bfd_mach_sh5
)
3108 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
3111 if (arg
[len
] == '\0')
3112 preset_target_arch
=
3113 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
3114 else if (strcasecmp(&arg
[len
], "-up") == 0)
3115 preset_target_arch
=
3116 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
3122 if (!preset_target_arch
)
3123 as_bad ("Invalid argument to --isa option: %s", arg
);
3129 if (strcmp (arg
, "32") == 0)
3131 if (sh64_abi
== sh64_abi_64
)
3132 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
3133 sh64_abi
= sh64_abi_32
;
3135 else if (strcmp (arg
, "64") == 0)
3137 if (sh64_abi
== sh64_abi_32
)
3138 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
3139 if (sh64_isa_mode
== sh64_isa_shcompact
)
3140 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
3141 sh64_abi
= sh64_abi_64
;
3144 as_bad ("Invalid argument to --abi option: %s", arg
);
3151 case OPTION_SHCOMPACT_CONST_CRANGE
:
3152 sh64_shcompact_const_crange
= TRUE
;
3155 case OPTION_NO_EXPAND
:
3156 sh64_expand
= FALSE
;
3162 #endif /* HAVE_SH64 */
3172 md_show_usage (FILE *stream
)
3174 fprintf (stream
, _("\
3176 -little generate little endian code\n\
3177 -big generate big endian code\n\
3178 -relax alter jump instructions for long displacements\n\
3179 -renesas disable optimization with section symbol for\n\
3180 compatibility with Renesas assembler.\n\
3181 -small align sections to 4 byte boundaries, not 16\n\
3182 -dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3183 -isa=[any use most appropriate isa\n\
3184 | dsp same as '-dsp'\n\
3187 extern const bfd_arch_info_type bfd_sh_arch
;
3188 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
3189 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
3190 if (bfd_arch
->mach
!= bfd_mach_sh5
)
3192 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
3193 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
3196 fprintf (stream
, "]\n");
3198 fprintf (stream
, _("\
3199 -isa=[shmedia set as the default instruction set for SH64\n\
3203 fprintf (stream
, _("\
3204 -abi=[32|64] set size of expanded SHmedia operands and object\n\
3206 -shcompact-const-crange emit code-range descriptors for constants in\n\
3207 SHcompact code sections\n\
3208 -no-mix disallow SHmedia code in the same section as\n\
3209 constants and SHcompact code\n\
3210 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3211 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3212 to 32 bits only\n"));
3213 #endif /* HAVE_SH64 */
3216 /* This struct is used to pass arguments to sh_count_relocs through
3217 bfd_map_over_sections. */
3219 struct sh_count_relocs
3221 /* Symbol we are looking for. */
3223 /* Count of relocs found. */
3227 /* Count the number of fixups in a section which refer to a particular
3228 symbol. This is called via bfd_map_over_sections. */
3231 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3233 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3234 segment_info_type
*seginfo
;
3238 seginfo
= seg_info (sec
);
3239 if (seginfo
== NULL
)
3243 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3245 if (fix
->fx_addsy
== sym
)
3253 /* Handle the count relocs for a particular section.
3254 This is called via bfd_map_over_sections. */
3257 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3258 void *ignore ATTRIBUTE_UNUSED
)
3260 segment_info_type
*seginfo
;
3263 seginfo
= seg_info (sec
);
3264 if (seginfo
== NULL
)
3267 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3272 struct sh_count_relocs info
;
3274 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3277 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3278 symbol in the same section. */
3279 sym
= fix
->fx_addsy
;
3281 || fix
->fx_subsy
!= NULL
3282 || fix
->fx_addnumber
!= 0
3283 || S_GET_SEGMENT (sym
) != sec
3284 || S_IS_EXTERNAL (sym
))
3286 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3287 _(".uses does not refer to a local symbol in the same section"));
3291 /* Look through the fixups again, this time looking for one
3292 at the same location as sym. */
3293 val
= S_GET_VALUE (sym
);
3294 for (fscan
= seginfo
->fix_root
;
3296 fscan
= fscan
->fx_next
)
3297 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3298 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3299 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3300 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3301 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3305 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3306 _("can't find fixup pointed to by .uses"));
3310 if (fscan
->fx_tcbit
)
3312 /* We've already done this one. */
3316 /* The variable fscan should also be a fixup to a local symbol
3317 in the same section. */
3318 sym
= fscan
->fx_addsy
;
3320 || fscan
->fx_subsy
!= NULL
3321 || fscan
->fx_addnumber
!= 0
3322 || S_GET_SEGMENT (sym
) != sec
3323 || S_IS_EXTERNAL (sym
))
3325 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3326 _(".uses target does not refer to a local symbol in the same section"));
3330 /* Now we look through all the fixups of all the sections,
3331 counting the number of times we find a reference to sym. */
3334 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3339 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3340 We have already adjusted the value of sym to include the
3341 fragment address, so we undo that adjustment here. */
3342 subseg_change (sec
, 0);
3343 fix_new (fscan
->fx_frag
,
3344 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3345 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3349 /* This function is called after the symbol table has been completed,
3350 but before the relocs or section contents have been written out.
3351 If we have seen any .uses pseudo-ops, they point to an instruction
3352 which loads a register with the address of a function. We look
3353 through the fixups to find where the function address is being
3354 loaded from. We then generate a COUNT reloc giving the number of
3355 times that function address is referred to. The linker uses this
3356 information when doing relaxing, to decide when it can eliminate
3357 the stored function address entirely. */
3363 shmedia_frob_file_before_adjust ();
3369 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3372 /* Called after relaxing. Set the correct sizes of the fragments, and
3373 create relocs so that md_apply_fix will fill in the correct values. */
3376 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3380 switch (fragP
->fr_subtype
)
3382 case C (COND_JUMP
, COND8
):
3383 case C (COND_JUMP_DELAY
, COND8
):
3384 subseg_change (seg
, 0);
3385 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3386 1, BFD_RELOC_SH_PCDISP8BY2
);
3391 case C (UNCOND_JUMP
, UNCOND12
):
3392 subseg_change (seg
, 0);
3393 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3394 1, BFD_RELOC_SH_PCDISP12BY2
);
3399 case C (UNCOND_JUMP
, UNCOND32
):
3400 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3401 if (fragP
->fr_symbol
== NULL
)
3402 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3403 _("displacement overflows 12-bit field"));
3404 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3405 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3406 _("displacement to defined symbol %s overflows 12-bit field"),
3407 S_GET_NAME (fragP
->fr_symbol
));
3409 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3410 _("displacement to undefined symbol %s overflows 12-bit field"),
3411 S_GET_NAME (fragP
->fr_symbol
));
3412 /* Stabilize this frag, so we don't trip an assert. */
3413 fragP
->fr_fix
+= fragP
->fr_var
;
3417 case C (COND_JUMP
, COND12
):
3418 case C (COND_JUMP_DELAY
, COND12
):
3419 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3420 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3421 was due to gas incorrectly relaxing an out-of-range conditional
3422 branch with delay slot. It turned:
3423 bf.s L6 (slot mov.l r12,@(44,r0))
3426 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3428 32: 10 cb mov.l r12,@(44,r0)
3429 Therefore, branches with delay slots have to be handled
3430 differently from ones without delay slots. */
3432 unsigned char *buffer
=
3433 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3434 int highbyte
= target_big_endian
? 0 : 1;
3435 int lowbyte
= target_big_endian
? 1 : 0;
3436 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3438 /* Toggle the true/false bit of the bcond. */
3439 buffer
[highbyte
] ^= 0x2;
3441 /* If this is a delayed branch, we may not put the bra in the
3442 slot. So we change it to a non-delayed branch, like that:
3443 b! cond slot_label; bra disp; slot_label: slot_insn
3444 ??? We should try if swapping the conditional branch and
3445 its delay-slot insn already makes the branch reach. */
3447 /* Build a relocation to six / four bytes farther on. */
3448 subseg_change (seg
, 0);
3449 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3450 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3451 1, BFD_RELOC_SH_PCDISP8BY2
);
3453 /* Set up a jump instruction. */
3454 buffer
[highbyte
+ 2] = 0xa0;
3455 buffer
[lowbyte
+ 2] = 0;
3456 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3457 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3461 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3466 /* Fill in a NOP instruction. */
3467 buffer
[highbyte
+ 4] = 0x0;
3468 buffer
[lowbyte
+ 4] = 0x9;
3477 case C (COND_JUMP
, COND32
):
3478 case C (COND_JUMP_DELAY
, COND32
):
3479 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3480 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3481 if (fragP
->fr_symbol
== NULL
)
3482 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3483 _("displacement overflows 8-bit field"));
3484 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3485 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3486 _("displacement to defined symbol %s overflows 8-bit field"),
3487 S_GET_NAME (fragP
->fr_symbol
));
3489 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3490 _("displacement to undefined symbol %s overflows 8-bit field "),
3491 S_GET_NAME (fragP
->fr_symbol
));
3492 /* Stabilize this frag, so we don't trip an assert. */
3493 fragP
->fr_fix
+= fragP
->fr_var
;
3499 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3505 if (donerelax
&& !sh_relax
)
3506 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3507 _("overflow in branch to %s; converted into longer instruction sequence"),
3508 (fragP
->fr_symbol
!= NULL
3509 ? S_GET_NAME (fragP
->fr_symbol
)
3514 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3518 #else /* ! OBJ_ELF */
3519 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3520 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3521 #endif /* ! OBJ_ELF */
3524 /* This static variable is set by s_uacons to tell sh_cons_align that
3525 the expression does not need to be aligned. */
3527 static int sh_no_align_cons
= 0;
3529 /* This handles the unaligned space allocation pseudo-ops, such as
3530 .uaword. .uaword is just like .word, but the value does not need
3534 s_uacons (int bytes
)
3536 /* Tell sh_cons_align not to align this value. */
3537 sh_no_align_cons
= 1;
3541 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3542 aligned correctly. Note that this can cause warnings to be issued
3543 when assembling initialized structured which were declared with the
3544 packed attribute. FIXME: Perhaps we should require an option to
3545 enable this warning? */
3548 sh_cons_align (int nbytes
)
3553 if (sh_no_align_cons
)
3555 /* This is an unaligned pseudo-op. */
3556 sh_no_align_cons
= 0;
3561 while ((nbytes
& 1) == 0)
3570 if (now_seg
== absolute_section
)
3572 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3573 as_warn (_("misaligned data"));
3577 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3578 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3580 record_alignment (now_seg
, nalign
);
3583 /* When relaxing, we need to output a reloc for any .align directive
3584 that requests alignment to a four byte boundary or larger. This is
3585 also where we check for misaligned data. */
3588 sh_handle_align (fragS
*frag
)
3590 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3592 if (frag
->fr_type
== rs_align_code
)
3594 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3595 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3597 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3606 if (target_big_endian
)
3608 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3609 frag
->fr_var
= sizeof big_nop_pattern
;
3613 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3614 frag
->fr_var
= sizeof little_nop_pattern
;
3617 else if (frag
->fr_type
== rs_align_test
)
3620 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3624 && (frag
->fr_type
== rs_align
3625 || frag
->fr_type
== rs_align_code
)
3626 && frag
->fr_address
+ frag
->fr_fix
> 0
3627 && frag
->fr_offset
> 1
3628 && now_seg
!= bss_section
)
3629 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3630 BFD_RELOC_SH_ALIGN
);
3633 /* See whether the relocation should be resolved locally. */
3636 sh_local_pcrel (fixS
*fix
)
3639 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3640 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3641 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3642 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3643 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3644 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3645 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3648 /* See whether we need to force a relocation into the output file.
3649 This is used to force out switch and PC relative relocations when
3653 sh_force_relocation (fixS
*fix
)
3655 /* These relocations can't make it into a DSO, so no use forcing
3656 them for global symbols. */
3657 if (sh_local_pcrel (fix
))
3660 /* Make sure some relocations get emitted. */
3661 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3662 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3663 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3664 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3665 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3666 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3667 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3668 || generic_force_reloc (fix
))
3674 return (fix
->fx_pcrel
3675 || SWITCH_TABLE (fix
)
3676 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3677 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3678 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3679 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3681 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3683 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3688 sh_fix_adjustable (fixS
*fixP
)
3690 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3691 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3692 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3693 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3694 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3697 /* We need the symbol name for the VTABLE entries */
3698 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3699 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3706 sh_elf_final_processing (void)
3710 /* Set file-specific flags to indicate if this code needs
3711 a processor with the sh-dsp / sh2e ISA to execute. */
3713 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3714 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3715 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3718 #elif defined TARGET_SYMBIAN
3721 extern int sh_symbian_find_elf_flags (unsigned int);
3723 val
= sh_symbian_find_elf_flags (valid_arch
);
3726 #endif /* HAVE_SH64 */
3727 val
= sh_find_elf_flags (valid_arch
);
3729 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3730 elf_elfheader (stdoutput
)->e_flags
|= val
;
3734 /* Apply a fixup to the object file. */
3737 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3739 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3740 int lowbyte
= target_big_endian
? 1 : 0;
3741 int highbyte
= target_big_endian
? 0 : 1;
3742 long val
= (long) *valP
;
3746 /* A difference between two symbols, the second of which is in the
3747 current section, is transformed in a PC-relative relocation to
3748 the other symbol. We have to adjust the relocation type here. */
3751 switch (fixP
->fx_r_type
)
3757 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3760 /* Currently, we only support 32-bit PCREL relocations.
3761 We'd need a new reloc type to handle 16_PCREL, and
3762 8_PCREL is already taken for R_SH_SWITCH8, which
3763 apparently does something completely different than what
3766 bfd_set_error (bfd_error_bad_value
);
3770 bfd_set_error (bfd_error_bad_value
);
3775 /* The function adjust_reloc_syms won't convert a reloc against a weak
3776 symbol into a reloc against a section, but bfd_install_relocation
3777 will screw up if the symbol is defined, so we have to adjust val here
3778 to avoid the screw up later.
3780 For ordinary relocs, this does not happen for ELF, since for ELF,
3781 bfd_install_relocation uses the "special function" field of the
3782 howto, and does not execute the code that needs to be undone, as long
3783 as the special function does not return bfd_reloc_continue.
3784 It can happen for GOT- and PLT-type relocs the way they are
3785 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3786 doesn't matter here since those relocs don't use VAL; see below. */
3787 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3788 && fixP
->fx_addsy
!= NULL
3789 && S_IS_WEAK (fixP
->fx_addsy
))
3790 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3792 if (SWITCH_TABLE (fixP
))
3793 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3797 switch (fixP
->fx_r_type
)
3799 case BFD_RELOC_SH_IMM3
:
3801 * buf
= (* buf
& 0xf8) | (val
& 0x7);
3803 case BFD_RELOC_SH_IMM3U
:
3805 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
3807 case BFD_RELOC_SH_DISP12
:
3809 buf
[lowbyte
] = val
& 0xff;
3810 buf
[highbyte
] |= (val
>> 8) & 0x0f;
3812 case BFD_RELOC_SH_DISP12BY2
:
3815 buf
[lowbyte
] = (val
>> 1) & 0xff;
3816 buf
[highbyte
] |= (val
>> 9) & 0x0f;
3818 case BFD_RELOC_SH_DISP12BY4
:
3821 buf
[lowbyte
] = (val
>> 2) & 0xff;
3822 buf
[highbyte
] |= (val
>> 10) & 0x0f;
3824 case BFD_RELOC_SH_DISP12BY8
:
3827 buf
[lowbyte
] = (val
>> 3) & 0xff;
3828 buf
[highbyte
] |= (val
>> 11) & 0x0f;
3830 case BFD_RELOC_SH_DISP20
:
3831 if (! target_big_endian
)
3835 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
3836 buf
[2] = (val
>> 8) & 0xff;
3837 buf
[3] = val
& 0xff;
3839 case BFD_RELOC_SH_DISP20BY8
:
3840 if (!target_big_endian
)
3845 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
3846 buf
[2] = (val
>> 16) & 0xff;
3847 buf
[3] = (val
>> 8) & 0xff;
3850 case BFD_RELOC_SH_IMM4
:
3852 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3855 case BFD_RELOC_SH_IMM4BY2
:
3858 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3861 case BFD_RELOC_SH_IMM4BY4
:
3864 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3867 case BFD_RELOC_SH_IMM8BY2
:
3873 case BFD_RELOC_SH_IMM8BY4
:
3880 case BFD_RELOC_SH_IMM8
:
3881 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3882 sometimes it is not (e.g., and). We permit any 8 bit value.
3883 Note that adding further restrictions may invalidate
3884 reasonable looking assembly code, such as ``and -0x1,r0''. */
3890 case BFD_RELOC_SH_PCRELIMM8BY4
:
3891 /* The lower two bits of the PC are cleared before the
3892 displacement is added in. We can assume that the destination
3893 is on a 4 byte boundary. If this instruction is also on a 4
3894 byte boundary, then we want
3896 and target - here is a multiple of 4.
3897 Otherwise, we are on a 2 byte boundary, and we want
3898 (target - (here - 2)) / 4
3899 and target - here is not a multiple of 4. Computing
3900 (target - (here - 2)) / 4 == (target - here + 2) / 4
3901 works for both cases, since in the first case the addition of
3902 2 will be removed by the division. target - here is in the
3904 val
= (val
+ 2) / 4;
3906 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3910 case BFD_RELOC_SH_PCRELIMM8BY2
:
3913 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3917 case BFD_RELOC_SH_PCDISP8BY2
:
3919 if (val
< -0x80 || val
> 0x7f)
3920 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3924 case BFD_RELOC_SH_PCDISP12BY2
:
3926 if (val
< -0x800 || val
> 0x7ff)
3927 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3928 buf
[lowbyte
] = val
& 0xff;
3929 buf
[highbyte
] |= (val
>> 8) & 0xf;
3933 case BFD_RELOC_32_PCREL
:
3934 md_number_to_chars (buf
, val
, 4);
3938 md_number_to_chars (buf
, val
, 2);
3941 case BFD_RELOC_SH_USES
:
3942 /* Pass the value into sh_reloc(). */
3943 fixP
->fx_addnumber
= val
;
3946 case BFD_RELOC_SH_COUNT
:
3947 case BFD_RELOC_SH_ALIGN
:
3948 case BFD_RELOC_SH_CODE
:
3949 case BFD_RELOC_SH_DATA
:
3950 case BFD_RELOC_SH_LABEL
:
3951 /* Nothing to do here. */
3954 case BFD_RELOC_SH_LOOP_START
:
3955 case BFD_RELOC_SH_LOOP_END
:
3957 case BFD_RELOC_VTABLE_INHERIT
:
3958 case BFD_RELOC_VTABLE_ENTRY
:
3963 case BFD_RELOC_32_PLT_PCREL
:
3964 /* Make the jump instruction point to the address of the operand. At
3965 runtime we merely add the offset to the actual PLT entry. */
3966 * valP
= 0xfffffffc;
3967 val
= fixP
->fx_offset
;
3969 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3970 fixP
->fx_addnumber
= val
;
3971 md_number_to_chars (buf
, val
, 4);
3974 case BFD_RELOC_SH_GOTPC
:
3975 /* This is tough to explain. We end up with this one if we have
3976 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3977 The goal here is to obtain the absolute address of the GOT,
3978 and it is strongly preferable from a performance point of
3979 view to avoid using a runtime relocation for this. There are
3980 cases where you have something like:
3982 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3984 and here no correction would be required. Internally in the
3985 assembler we treat operands of this form as not being pcrel
3986 since the '.' is explicitly mentioned, and I wonder whether
3987 it would simplify matters to do it this way. Who knows. In
3988 earlier versions of the PIC patches, the pcrel_adjust field
3989 was used to store the correction, but since the expression is
3990 not pcrel, I felt it would be confusing to do it this way. */
3992 md_number_to_chars (buf
, val
, 4);
3995 case BFD_RELOC_SH_TLS_GD_32
:
3996 case BFD_RELOC_SH_TLS_LD_32
:
3997 case BFD_RELOC_SH_TLS_IE_32
:
3998 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4000 case BFD_RELOC_32_GOT_PCREL
:
4001 case BFD_RELOC_SH_GOTPLT32
:
4002 * valP
= 0; /* Fully resolved at runtime. No addend. */
4003 md_number_to_chars (buf
, 0, 4);
4006 case BFD_RELOC_SH_TLS_LDO_32
:
4007 case BFD_RELOC_SH_TLS_LE_32
:
4008 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
4010 case BFD_RELOC_32_GOTOFF
:
4011 md_number_to_chars (buf
, val
, 4);
4017 shmedia_md_apply_fix (fixP
, valP
);
4026 if ((val
& ((1 << shift
) - 1)) != 0)
4027 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
4031 val
= ((val
>> shift
)
4032 | ((long) -1 & ~ ((long) -1 >> shift
)));
4034 if (max
!= 0 && (val
< min
|| val
> max
))
4035 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
4037 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
4041 /* Called just before address relaxation. Return the length
4042 by which a fragment must grow to reach it's destination. */
4045 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
4049 switch (fragP
->fr_subtype
)
4053 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
4059 case C (UNCOND_JUMP
, UNDEF_DISP
):
4060 /* Used to be a branch to somewhere which was unknown. */
4061 if (!fragP
->fr_symbol
)
4063 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4065 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4067 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
4071 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
4075 case C (COND_JUMP
, UNDEF_DISP
):
4076 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
4077 what
= GET_WHAT (fragP
->fr_subtype
);
4078 /* Used to be a branch to somewhere which was unknown. */
4079 if (fragP
->fr_symbol
4080 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
4082 /* Got a symbol and it's defined in this segment, become byte
4083 sized - maybe it will fix up. */
4084 fragP
->fr_subtype
= C (what
, COND8
);
4086 else if (fragP
->fr_symbol
)
4088 /* Its got a segment, but its not ours, so it will always be long. */
4089 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
4093 /* We know the abs value. */
4094 fragP
->fr_subtype
= C (what
, COND8
);
4098 case C (UNCOND_JUMP
, UNCOND12
):
4099 case C (UNCOND_JUMP
, UNCOND32
):
4100 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
4101 case C (COND_JUMP
, COND8
):
4102 case C (COND_JUMP
, COND12
):
4103 case C (COND_JUMP
, COND32
):
4104 case C (COND_JUMP
, UNDEF_WORD_DISP
):
4105 case C (COND_JUMP_DELAY
, COND8
):
4106 case C (COND_JUMP_DELAY
, COND12
):
4107 case C (COND_JUMP_DELAY
, COND32
):
4108 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
4109 /* When relaxing a section for the second time, we don't need to
4110 do anything besides return the current size. */
4114 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
4115 return fragP
->fr_var
;
4118 /* Put number into target byte order. */
4121 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
4124 /* We might need to set the contents type to data. */
4125 sh64_flag_output ();
4128 if (! target_big_endian
)
4129 number_to_chars_littleendian (ptr
, use
, nbytes
);
4131 number_to_chars_bigendian (ptr
, use
, nbytes
);
4134 /* This version is used in obj-coff.c eg. for the sh-hms target. */
4137 md_pcrel_from (fixS
*fixP
)
4139 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4143 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4145 if (! sh_local_pcrel (fixP
)
4146 && fixP
->fx_addsy
!= (symbolS
*) NULL
4147 && (generic_force_reloc (fixP
)
4148 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4150 /* The symbol is undefined (or is defined but not in this section,
4151 or we're not sure about it being the final definition). Let the
4152 linker figure it out. We need to adjust the subtraction of a
4153 symbol to the position of the relocated data, though. */
4154 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4157 return md_pcrel_from (fixP
);
4160 /* Create a reloc. */
4163 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4166 bfd_reloc_code_real_type r_type
;
4168 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4169 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4170 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4171 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4173 r_type
= fixp
->fx_r_type
;
4175 if (SWITCH_TABLE (fixp
))
4177 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4179 if (r_type
== BFD_RELOC_16
)
4180 r_type
= BFD_RELOC_SH_SWITCH16
;
4181 else if (r_type
== BFD_RELOC_8
)
4182 r_type
= BFD_RELOC_8_PCREL
;
4183 else if (r_type
== BFD_RELOC_32
)
4184 r_type
= BFD_RELOC_SH_SWITCH32
;
4188 else if (r_type
== BFD_RELOC_SH_USES
)
4189 rel
->addend
= fixp
->fx_addnumber
;
4190 else if (r_type
== BFD_RELOC_SH_COUNT
)
4191 rel
->addend
= fixp
->fx_offset
;
4192 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4193 rel
->addend
= fixp
->fx_offset
;
4194 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4195 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4196 rel
->addend
= fixp
->fx_offset
;
4197 else if (r_type
== BFD_RELOC_SH_LOOP_START
4198 || r_type
== BFD_RELOC_SH_LOOP_END
)
4199 rel
->addend
= fixp
->fx_offset
;
4200 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4203 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4206 else if (shmedia_init_reloc (rel
, fixp
))
4209 else if (fixp
->fx_pcrel
)
4210 rel
->addend
= fixp
->fx_addnumber
;
4211 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
4212 rel
->addend
= fixp
->fx_addnumber
;
4216 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4218 if (rel
->howto
== NULL
)
4220 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4221 _("Cannot represent relocation type %s"),
4222 bfd_get_reloc_code_name (r_type
));
4223 /* Set howto to a garbage value so that we can keep going. */
4224 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4225 assert (rel
->howto
!= NULL
);
4228 else if (rel
->howto
->type
== R_SH_IND12W
)
4229 rel
->addend
+= fixp
->fx_offset
- 4;
4236 inline static char *
4237 sh_end_of_match (char *cont
, char *what
)
4239 int len
= strlen (what
);
4241 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4242 && ! is_part_of_name (cont
[len
]))
4249 sh_parse_name (char const *name
, expressionS
*exprP
, char *nextcharP
)
4251 char *next
= input_line_pointer
;
4256 exprP
->X_op_symbol
= NULL
;
4258 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4261 GOT_symbol
= symbol_find_or_make (name
);
4263 exprP
->X_add_symbol
= GOT_symbol
;
4265 /* If we have an absolute symbol or a reg, then we know its
4267 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4268 if (segment
== absolute_section
)
4270 exprP
->X_op
= O_constant
;
4271 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4272 exprP
->X_add_symbol
= NULL
;
4274 else if (segment
== reg_section
)
4276 exprP
->X_op
= O_register
;
4277 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4278 exprP
->X_add_symbol
= NULL
;
4282 exprP
->X_op
= O_symbol
;
4283 exprP
->X_add_number
= 0;
4289 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4291 if (*nextcharP
!= '@')
4293 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4294 reloc_type
= BFD_RELOC_32_GOTOFF
;
4295 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4296 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4297 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4298 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4299 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4300 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4301 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4302 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4303 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4304 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4305 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4306 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4307 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4308 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4309 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4310 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4314 *input_line_pointer
= *nextcharP
;
4315 input_line_pointer
= next_end
;
4316 *nextcharP
= *input_line_pointer
;
4317 *input_line_pointer
= '\0';
4319 exprP
->X_op
= O_PIC_reloc
;
4320 exprP
->X_add_number
= 0;
4321 exprP
->X_md
= reloc_type
;
4327 sh_cfi_frame_initial_instructions (void)
4329 cfi_add_CFA_def_cfa (15, 0);
4333 sh_regname_to_dw2regnum (const char *regname
)
4335 unsigned int regnum
= -1;
4339 static struct { char *name
; int dw2regnum
; } regnames
[] =
4341 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4342 { "macl", 21 }, { "fpul", 23 }
4345 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4346 if (strcmp (regnames
[i
].name
, regname
) == 0)
4347 return regnames
[i
].dw2regnum
;
4349 if (regname
[0] == 'r')
4352 regnum
= strtoul (p
, &q
, 10);
4353 if (p
== q
|| *q
|| regnum
>= 16)
4356 else if (regname
[0] == 'f' && regname
[1] == 'r')
4359 regnum
= strtoul (p
, &q
, 10);
4360 if (p
== q
|| *q
|| regnum
>= 16)
4364 else if (regname
[0] == 'x' && regname
[1] == 'd')
4367 regnum
= strtoul (p
, &q
, 10);
4368 if (p
== q
|| *q
|| regnum
>= 8)
4374 #endif /* OBJ_ELF */