1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright (C) 1993-2018 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
26 #include "opcodes/sh-opc.h"
27 #include "safe-ctype.h"
28 #include "struc-symbol.h"
34 #include "dwarf2dbg.h"
35 #include "dw2gencfi.h"
41 expressionS immediate
;
45 const char comment_chars
[] = "!";
46 const char line_separator_chars
[] = ";";
47 const char line_comment_chars
[] = "!#";
49 static void s_uses (int);
50 static void s_uacons (int);
53 static void sh_elf_cons (int);
55 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
59 big (int ignore ATTRIBUTE_UNUSED
)
61 if (! target_big_endian
)
62 as_bad (_("directive .big encountered when option -big required"));
64 /* Stop further messages. */
65 target_big_endian
= 1;
69 little (int ignore ATTRIBUTE_UNUSED
)
71 if (target_big_endian
)
72 as_bad (_("directive .little encountered when option -little required"));
74 /* Stop further messages. */
75 target_big_endian
= 0;
78 /* This table describes all the machine specific pseudo-ops the assembler
79 has to support. The fields are:
80 pseudo-op name without dot
81 function to call to execute this pseudo-op
82 Integer arg to pass to the function. */
84 const pseudo_typeS md_pseudo_table
[] =
87 {"long", sh_elf_cons
, 4},
88 {"int", sh_elf_cons
, 4},
89 {"word", sh_elf_cons
, 2},
90 {"short", sh_elf_cons
, 2},
96 {"form", listing_psize
, 0},
97 {"little", little
, 0},
98 {"heading", listing_title
, 0},
99 {"import", s_ignore
, 0},
100 {"page", listing_eject
, 0},
101 {"program", s_ignore
, 0},
103 {"uaword", s_uacons
, 2},
104 {"ualong", s_uacons
, 4},
105 {"uaquad", s_uacons
, 8},
106 {"2byte", s_uacons
, 2},
107 {"4byte", s_uacons
, 4},
108 {"8byte", s_uacons
, 8},
112 int sh_relax
; /* set if -relax seen */
114 /* Whether -small was seen. */
118 /* Flag to generate relocations against symbol values for local symbols. */
120 static int dont_adjust_reloc_32
;
122 /* Flag to indicate that '$' is allowed as a register prefix. */
124 static int allow_dollar_register_prefix
;
126 /* Preset architecture set, if given; zero otherwise. */
128 static unsigned int preset_target_arch
;
130 /* The bit mask of architectures that could
131 accommodate the insns seen so far. */
132 static unsigned int valid_arch
;
135 /* Whether --fdpic was given. */
139 const char EXP_CHARS
[] = "eE";
141 /* Chars that mean this number is a floating point constant. */
144 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
146 #define C(a,b) ENCODE_RELAX(a,b)
148 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
149 #define GET_WHAT(x) ((x>>4))
151 /* These are the three types of relaxable instruction. */
152 /* These are the types of relaxable instructions; except for END which is
155 #define COND_JUMP_DELAY 2
156 #define UNCOND_JUMP 3
164 #define UNDEF_WORD_DISP 4
169 /* Branch displacements are from the address of the branch plus
170 four, thus all minimum and maximum values have 4 added to them. */
173 #define COND8_LENGTH 2
175 /* There is one extra instruction before the branch, so we must add
176 two more bytes to account for it. */
177 #define COND12_F 4100
178 #define COND12_M -4090
179 #define COND12_LENGTH 6
181 #define COND12_DELAY_LENGTH 4
183 /* ??? The minimum and maximum values are wrong, but this does not matter
184 since this relocation type is not supported yet. */
185 #define COND32_F (1<<30)
186 #define COND32_M -(1<<30)
187 #define COND32_LENGTH 14
189 #define UNCOND12_F 4098
190 #define UNCOND12_M -4092
191 #define UNCOND12_LENGTH 2
193 /* ??? The minimum and maximum values are wrong, but this does not matter
194 since this relocation type is not supported yet. */
195 #define UNCOND32_F (1<<30)
196 #define UNCOND32_M -(1<<30)
197 #define UNCOND32_LENGTH 14
199 #define EMPTY { 0, 0, 0, 0 }
201 const relax_typeS md_relax_table
[C (END
, 0)] = {
202 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
203 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
206 /* C (COND_JUMP, COND8) */
207 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
208 /* C (COND_JUMP, COND12) */
209 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
210 /* C (COND_JUMP, COND32) */
211 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
212 /* C (COND_JUMP, UNDEF_WORD_DISP) */
213 { 0, 0, COND32_LENGTH
, 0, },
215 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
218 /* C (COND_JUMP_DELAY, COND8) */
219 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
220 /* C (COND_JUMP_DELAY, COND12) */
221 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
222 /* C (COND_JUMP_DELAY, COND32) */
223 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
224 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
225 { 0, 0, COND32_LENGTH
, 0, },
227 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
230 /* C (UNCOND_JUMP, UNCOND12) */
231 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
232 /* C (UNCOND_JUMP, UNCOND32) */
233 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
235 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
236 { 0, 0, UNCOND32_LENGTH
, 0, },
238 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
244 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
248 /* Determine whether the symbol needs any kind of PIC relocation. */
251 sh_PIC_related_p (symbolS
*sym
)
258 if (sym
== GOT_symbol
)
261 exp
= symbol_get_value_expression (sym
);
263 return (exp
->X_op
== O_PIC_reloc
264 || sh_PIC_related_p (exp
->X_add_symbol
)
265 || sh_PIC_related_p (exp
->X_op_symbol
));
268 /* Determine the relocation type to be used to represent the
269 expression, that may be rearranged. */
272 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
274 expressionS
*exp
= main_exp
;
276 /* This is here for backward-compatibility only. GCC used to generated:
278 f@PLT + . - (.LPCS# + 2)
280 but we'd rather be able to handle this as a PIC-related reference
281 plus/minus a symbol. However, gas' parser gives us:
283 O_subtract (O_add (f@PLT, .), .LPCS#+2)
285 so we attempt to transform this into:
287 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
289 which we can handle simply below. */
290 if (exp
->X_op
== O_subtract
)
292 if (sh_PIC_related_p (exp
->X_op_symbol
))
295 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
297 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
300 if (exp
&& exp
->X_op
== O_add
301 && sh_PIC_related_p (exp
->X_add_symbol
))
303 symbolS
*sym
= exp
->X_add_symbol
;
305 exp
->X_op
= O_subtract
;
306 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
308 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
309 main_exp
->X_add_symbol
= sym
;
311 main_exp
->X_add_number
+= exp
->X_add_number
;
312 exp
->X_add_number
= 0;
317 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
320 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
322 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
324 *r_type_p
= BFD_RELOC_SH_GOTPC
;
327 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
332 if (exp
->X_op
== O_PIC_reloc
)
337 case BFD_RELOC_UNUSED
:
338 *r_type_p
= exp
->X_md
;
341 case BFD_RELOC_SH_DISP20
:
344 case BFD_RELOC_32_GOT_PCREL
:
345 *r_type_p
= BFD_RELOC_SH_GOT20
;
348 case BFD_RELOC_32_GOTOFF
:
349 *r_type_p
= BFD_RELOC_SH_GOTOFF20
;
352 case BFD_RELOC_SH_GOTFUNCDESC
:
353 *r_type_p
= BFD_RELOC_SH_GOTFUNCDESC20
;
356 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
357 *r_type_p
= BFD_RELOC_SH_GOTOFFFUNCDESC20
;
369 exp
->X_op
= O_symbol
;
372 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
373 main_exp
->X_add_number
+= exp
->X_add_number
;
377 return (sh_PIC_related_p (exp
->X_add_symbol
)
378 || sh_PIC_related_p (exp
->X_op_symbol
));
383 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
386 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
,
387 bfd_reloc_code_real_type r_type
)
389 r_type
= BFD_RELOC_UNUSED
;
391 if (sh_check_fixup (exp
, &r_type
))
392 as_bad (_("Invalid PIC expression."));
394 if (r_type
== BFD_RELOC_UNUSED
)
398 r_type
= BFD_RELOC_8
;
402 r_type
= BFD_RELOC_16
;
406 r_type
= BFD_RELOC_32
;
410 r_type
= BFD_RELOC_64
;
419 as_bad (_("unsupported BFD relocation size %u"), size
);
420 r_type
= BFD_RELOC_UNUSED
;
423 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
426 /* The regular cons() function, that reads constants, doesn't support
427 suffixes such as @GOT, @GOTOFF and @PLT, that generate
428 machine-specific relocation types. So we must define it here. */
429 /* Clobbers input_line_pointer, checks end-of-line. */
430 /* NBYTES 1=.byte, 2=.word, 4=.long */
432 sh_elf_cons (int nbytes
)
436 if (is_it_end_of_statement ())
438 demand_empty_rest_of_line ();
443 md_cons_align (nbytes
);
449 emit_expr (&exp
, (unsigned int) nbytes
);
451 while (*input_line_pointer
++ == ',');
453 input_line_pointer
--; /* Put terminator back into stream. */
454 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
456 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
459 demand_empty_rest_of_line ();
462 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
466 align_test_frag_offset_fixed_p (const fragS
*frag1
, const fragS
*frag2
,
472 /* Start with offset initialised to difference between the two frags.
473 Prior to assigning frag addresses this will be zero. */
474 off
= frag1
->fr_address
- frag2
->fr_address
;
481 /* Maybe frag2 is after frag1. */
483 while (frag
->fr_type
== rs_fill
484 || frag
->fr_type
== rs_align_test
)
486 if (frag
->fr_type
== rs_fill
)
487 off
+= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
490 frag
= frag
->fr_next
;
500 /* Maybe frag1 is after frag2. */
501 off
= frag1
->fr_address
- frag2
->fr_address
;
503 while (frag
->fr_type
== rs_fill
504 || frag
->fr_type
== rs_align_test
)
506 if (frag
->fr_type
== rs_fill
)
507 off
-= frag
->fr_fix
+ frag
->fr_offset
* frag
->fr_var
;
510 frag
= frag
->fr_next
;
523 /* Optimize a difference of symbols which have rs_align_test frag if
527 sh_optimize_expr (expressionS
*l
, operatorT op
, expressionS
*r
)
532 && l
->X_op
== O_symbol
533 && r
->X_op
== O_symbol
534 && S_GET_SEGMENT (l
->X_add_symbol
) == S_GET_SEGMENT (r
->X_add_symbol
)
535 && (SEG_NORMAL (S_GET_SEGMENT (l
->X_add_symbol
))
536 || r
->X_add_symbol
== l
->X_add_symbol
)
537 && align_test_frag_offset_fixed_p (symbol_get_frag (l
->X_add_symbol
),
538 symbol_get_frag (r
->X_add_symbol
),
541 offsetT symval_diff
= S_GET_VALUE (l
->X_add_symbol
)
542 - S_GET_VALUE (r
->X_add_symbol
);
543 subtract_from_result (l
, r
->X_add_number
, r
->X_extrabit
);
544 subtract_from_result (l
, frag_off
/ OCTETS_PER_BYTE
, 0);
545 add_to_result (l
, symval_diff
, symval_diff
< 0);
546 l
->X_op
= O_constant
;
554 /* This function is called once, at assembler startup time. This should
555 set up all the tables, etc that the MD part of the assembler needs. */
560 const sh_opcode_info
*opcode
;
561 const char *prev_name
= "";
562 unsigned int target_arch
;
565 = preset_target_arch
? preset_target_arch
: arch_sh_up
& ~arch_sh_has_dsp
;
566 valid_arch
= target_arch
;
568 opcode_hash_control
= hash_new ();
570 /* Insert unique names into hash table. */
571 for (opcode
= sh_table
; opcode
->name
; opcode
++)
573 if (strcmp (prev_name
, opcode
->name
) != 0)
575 if (!SH_MERGE_ARCH_SET_VALID (opcode
->arch
, target_arch
))
577 prev_name
= opcode
->name
;
578 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
585 static int reg_x
, reg_y
;
589 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
591 /* Try to parse a reg name. Return the number of chars consumed. */
594 parse_reg_without_prefix (char *src
, sh_arg_type
*mode
, int *reg
)
596 char l0
= TOLOWER (src
[0]);
597 char l1
= l0
? TOLOWER (src
[1]) : 0;
599 /* We use ! IDENT_CHAR for the next character after the register name, to
600 make sure that we won't accidentally recognize a symbol name such as
601 'sram' or sr_ram as being a reference to the register 'sr'. */
607 if (src
[2] >= '0' && src
[2] <= '5'
608 && ! IDENT_CHAR ((unsigned char) src
[3]))
611 *reg
= 10 + src
[2] - '0';
615 if (l1
>= '0' && l1
<= '9'
616 && ! IDENT_CHAR ((unsigned char) src
[2]))
622 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
623 && ! IDENT_CHAR ((unsigned char) src
[7]))
630 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
635 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
646 if (! IDENT_CHAR ((unsigned char) src
[2]))
652 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
661 if (! IDENT_CHAR ((unsigned char) src
[2]))
667 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
675 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
676 && ! IDENT_CHAR ((unsigned char) src
[3]))
679 *reg
= 4 + (l1
- '0');
682 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
683 && ! IDENT_CHAR ((unsigned char) src
[3]))
686 *reg
= 6 + (l1
- '0');
689 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
690 && ! IDENT_CHAR ((unsigned char) src
[3]))
695 *reg
= n
| ((~n
& 2) << 1);
700 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
722 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
723 && ! IDENT_CHAR ((unsigned char) src
[2]))
726 *reg
= A_X0_NUM
+ l1
- '0';
730 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
731 && ! IDENT_CHAR ((unsigned char) src
[2]))
734 *reg
= A_Y0_NUM
+ l1
- '0';
738 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
739 && ! IDENT_CHAR ((unsigned char) src
[2]))
742 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
748 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
754 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
755 && ! IDENT_CHAR ((unsigned char) src
[3]))
761 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
762 && ! IDENT_CHAR ((unsigned char) src
[3]))
768 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
769 && ! IDENT_CHAR ((unsigned char) src
[3]))
775 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
776 && ! IDENT_CHAR ((unsigned char) src
[3]))
782 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
788 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
795 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
800 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
802 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
803 and use an uninitialized immediate. */
807 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
808 && ! IDENT_CHAR ((unsigned char) src
[3]))
813 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
814 && ! IDENT_CHAR ((unsigned char) src
[3]))
820 if (l0
== 't' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
821 && ! IDENT_CHAR ((unsigned char) src
[3]))
826 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
827 && ! IDENT_CHAR ((unsigned char) src
[4]))
829 if (TOLOWER (src
[3]) == 'l')
834 if (TOLOWER (src
[3]) == 'h')
840 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
841 && ! IDENT_CHAR ((unsigned char) src
[3]))
846 if (l0
== 'f' && l1
== 'r')
850 if (src
[3] >= '0' && src
[3] <= '5'
851 && ! IDENT_CHAR ((unsigned char) src
[4]))
854 *reg
= 10 + src
[3] - '0';
858 if (src
[2] >= '0' && src
[2] <= '9'
859 && ! IDENT_CHAR ((unsigned char) src
[3]))
862 *reg
= (src
[2] - '0');
866 if (l0
== 'd' && l1
== 'r')
870 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
871 && ! IDENT_CHAR ((unsigned char) src
[4]))
874 *reg
= 10 + src
[3] - '0';
878 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
879 && ! IDENT_CHAR ((unsigned char) src
[3]))
882 *reg
= (src
[2] - '0');
886 if (l0
== 'x' && l1
== 'd')
890 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
891 && ! IDENT_CHAR ((unsigned char) src
[4]))
894 *reg
= 11 + src
[3] - '0';
898 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
899 && ! IDENT_CHAR ((unsigned char) src
[3]))
902 *reg
= (src
[2] - '0') + 1;
906 if (l0
== 'f' && l1
== 'v')
908 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
914 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
915 && ! IDENT_CHAR ((unsigned char) src
[3]))
918 *reg
= (src
[2] - '0');
922 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
923 && TOLOWER (src
[3]) == 'l'
924 && ! IDENT_CHAR ((unsigned char) src
[4]))
930 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
931 && TOLOWER (src
[3]) == 'c'
932 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
938 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
939 && TOLOWER (src
[3]) == 'r'
940 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
949 /* Like parse_reg_without_prefix, but this version supports
950 $-prefixed register names if enabled by the user. */
953 parse_reg (char *src
, sh_arg_type
*mode
, int *reg
)
956 unsigned int consumed
;
960 if (allow_dollar_register_prefix
)
971 consumed
= parse_reg_without_prefix (src
, mode
, reg
);
976 return consumed
+ prefix
;
980 parse_exp (char *s
, sh_operand_info
*op
)
985 save
= input_line_pointer
;
986 input_line_pointer
= s
;
987 expression (&op
->immediate
);
988 if (op
->immediate
.X_op
== O_absent
)
989 as_bad (_("missing operand"));
990 new_pointer
= input_line_pointer
;
991 input_line_pointer
= save
;
995 /* The many forms of operand:
998 @Rn Register indirect
1011 pr, gbr, vbr, macl, mach
1015 parse_at (char *src
, sh_operand_info
*op
)
1022 src
= parse_at (src
, op
);
1023 if (op
->type
== A_DISP_TBR
)
1024 op
->type
= A_DISP2_TBR
;
1026 as_bad (_("illegal double indirection"));
1028 else if (src
[0] == '-')
1030 /* Must be predecrement. */
1033 len
= parse_reg (src
, &mode
, &(op
->reg
));
1034 if (mode
!= A_REG_N
)
1035 as_bad (_("illegal register after @-"));
1040 else if (src
[0] == '(')
1042 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1045 len
= parse_reg (src
, &mode
, &(op
->reg
));
1046 if (len
&& mode
== A_REG_N
)
1051 as_bad (_("must be @(r0,...)"));
1056 /* Now can be rn or gbr. */
1057 len
= parse_reg (src
, &mode
, &(op
->reg
));
1067 op
->type
= A_R0_GBR
;
1069 else if (mode
== A_REG_N
)
1071 op
->type
= A_IND_R0_REG_N
;
1075 as_bad (_("syntax error in @(r0,...)"));
1080 as_bad (_("syntax error in @(r0...)"));
1085 /* Must be an @(disp,.. thing). */
1086 src
= parse_exp (src
, op
);
1089 /* Now can be rn, gbr or pc. */
1090 len
= parse_reg (src
, &mode
, &op
->reg
);
1093 if (mode
== A_REG_N
)
1095 op
->type
= A_DISP_REG_N
;
1097 else if (mode
== A_GBR
)
1099 op
->type
= A_DISP_GBR
;
1101 else if (mode
== A_TBR
)
1103 op
->type
= A_DISP_TBR
;
1105 else if (mode
== A_PC
)
1107 /* We want @(expr, pc) to uniformly address . + expr,
1108 no matter if expr is a constant, or a more complex
1109 expression, e.g. sym-. or sym1-sym2.
1110 However, we also used to accept @(sym,pc)
1111 as addressing sym, i.e. meaning the same as plain sym.
1112 Some existing code does use the @(sym,pc) syntax, so
1113 we give it the old semantics for now, but warn about
1114 its use, so that users have some time to fix their code.
1116 Note that due to this backward compatibility hack,
1117 we'll get unexpected results when @(offset, pc) is used,
1118 and offset is a symbol that is set later to an an address
1119 difference, or an external symbol that is set to an
1120 address difference in another source file, so we want to
1121 eventually remove it. */
1122 if (op
->immediate
.X_op
== O_symbol
)
1124 op
->type
= A_DISP_PC
;
1125 as_warn (_("Deprecated syntax."));
1129 op
->type
= A_DISP_PC_ABS
;
1130 /* Such operands don't get corrected for PC==.+4, so
1131 make the correction here. */
1132 op
->immediate
.X_add_number
-= 4;
1137 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1142 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1147 as_bad (_("expecting )"));
1153 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1154 if (mode
!= A_REG_N
)
1155 as_bad (_("illegal register after @"));
1162 l0
= TOLOWER (src
[0]);
1163 l1
= TOLOWER (src
[1]);
1165 if ((l0
== 'r' && l1
== '8')
1166 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1169 op
->type
= AX_PMOD_N
;
1171 else if ( (l0
== 'r' && l1
== '9')
1172 || (l0
== 'i' && l1
== 'y'))
1175 op
->type
= AY_PMOD_N
;
1187 get_operand (char **ptr
, sh_operand_info
*op
)
1190 sh_arg_type mode
= (sh_arg_type
) -1;
1196 *ptr
= parse_exp (src
, op
);
1201 else if (src
[0] == '@')
1203 *ptr
= parse_at (src
, op
);
1206 len
= parse_reg (src
, &mode
, &(op
->reg
));
1215 /* Not a reg, the only thing left is a displacement. */
1216 *ptr
= parse_exp (src
, op
);
1217 op
->type
= A_DISP_PC
;
1223 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1228 /* The pre-processor will eliminate whitespace in front of '@'
1229 after the first argument; we may be called multiple times
1230 from assemble_ppi, so don't insist on finding whitespace here. */
1234 get_operand (&ptr
, operand
+ 0);
1241 get_operand (&ptr
, operand
+ 1);
1242 /* ??? Hack: psha/pshl have a varying operand number depending on
1243 the type of the first operand. We handle this by having the
1244 three-operand version first and reducing the number of operands
1245 parsed to two if we see that the first operand is an immediate.
1246 This works because no insn with three operands has an immediate
1247 as first operand. */
1248 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1254 get_operand (&ptr
, operand
+ 2);
1258 operand
[2].type
= 0;
1263 operand
[1].type
= 0;
1264 operand
[2].type
= 0;
1269 operand
[0].type
= 0;
1270 operand
[1].type
= 0;
1271 operand
[2].type
= 0;
1276 /* Passed a pointer to a list of opcodes which use different
1277 addressing modes, return the opcode which matches the opcodes
1280 static sh_opcode_info
*
1281 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1283 sh_opcode_info
*this_try
= opcode
;
1284 const char *name
= opcode
->name
;
1287 while (opcode
->name
)
1289 this_try
= opcode
++;
1290 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1292 /* We've looked so far down the table that we've run out of
1293 opcodes with the same name. */
1297 /* Look at both operands needed by the opcodes and provided by
1298 the user - since an arg test will often fail on the same arg
1299 again and again, we'll try and test the last failing arg the
1300 first on each opcode try. */
1301 for (n
= 0; this_try
->arg
[n
]; n
++)
1303 sh_operand_info
*user
= operands
+ n
;
1304 sh_arg_type arg
= this_try
->arg
[n
];
1309 if (user
->type
== A_DISP_PC_ABS
)
1320 if (user
->type
!= arg
)
1324 /* opcode needs r0 */
1325 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1329 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1333 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1341 case A_IND_R0_REG_N
:
1350 /* Opcode needs rn */
1351 if (user
->type
!= arg
)
1356 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1372 if (user
->type
!= arg
)
1377 if (user
->type
!= arg
)
1383 if (user
->type
!= A_INC_N
)
1385 if (user
->reg
!= 15)
1391 if (user
->type
!= A_DEC_N
)
1393 if (user
->reg
!= 15)
1402 case A_IND_R0_REG_M
:
1405 /* Opcode needs rn */
1406 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1412 if (user
->type
!= A_DEC_N
)
1414 if (user
->reg
< 2 || user
->reg
> 5)
1420 if (user
->type
!= A_INC_N
)
1422 if (user
->reg
< 2 || user
->reg
> 5)
1428 if (user
->type
!= A_IND_N
)
1430 if (user
->reg
< 2 || user
->reg
> 5)
1436 if (user
->type
!= AX_PMOD_N
)
1438 if (user
->reg
< 2 || user
->reg
> 5)
1444 if (user
->type
!= A_INC_N
)
1446 if (user
->reg
< 4 || user
->reg
> 5)
1452 if (user
->type
!= A_IND_N
)
1454 if (user
->reg
< 4 || user
->reg
> 5)
1460 if (user
->type
!= AX_PMOD_N
)
1462 if (user
->reg
< 4 || user
->reg
> 5)
1468 if (user
->type
!= A_INC_N
)
1470 if ((user
->reg
< 4 || user
->reg
> 5)
1471 && (user
->reg
< 0 || user
->reg
> 1))
1477 if (user
->type
!= A_IND_N
)
1479 if ((user
->reg
< 4 || user
->reg
> 5)
1480 && (user
->reg
< 0 || user
->reg
> 1))
1486 if (user
->type
!= AX_PMOD_N
)
1488 if ((user
->reg
< 4 || user
->reg
> 5)
1489 && (user
->reg
< 0 || user
->reg
> 1))
1495 if (user
->type
!= A_INC_N
)
1497 if (user
->reg
< 6 || user
->reg
> 7)
1503 if (user
->type
!= A_IND_N
)
1505 if (user
->reg
< 6 || user
->reg
> 7)
1511 if (user
->type
!= AY_PMOD_N
)
1513 if (user
->reg
< 6 || user
->reg
> 7)
1519 if (user
->type
!= A_INC_N
)
1521 if ((user
->reg
< 6 || user
->reg
> 7)
1522 && (user
->reg
< 2 || user
->reg
> 3))
1528 if (user
->type
!= A_IND_N
)
1530 if ((user
->reg
< 6 || user
->reg
> 7)
1531 && (user
->reg
< 2 || user
->reg
> 3))
1537 if (user
->type
!= AY_PMOD_N
)
1539 if ((user
->reg
< 6 || user
->reg
> 7)
1540 && (user
->reg
< 2 || user
->reg
> 3))
1546 if (user
->type
!= DSP_REG_N
)
1548 if (user
->reg
!= A_A0_NUM
1549 && user
->reg
!= A_A1_NUM
)
1555 if (user
->type
!= DSP_REG_N
)
1577 if (user
->type
!= DSP_REG_N
)
1599 if (user
->type
!= DSP_REG_N
)
1621 if (user
->type
!= DSP_REG_N
)
1643 if (user
->type
!= DSP_REG_N
)
1665 if (user
->type
!= DSP_REG_N
)
1687 if (user
->type
!= DSP_REG_N
)
1709 if (user
->type
!= DSP_REG_N
)
1731 if (user
->type
!= DSP_REG_N
)
1753 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1757 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1761 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1765 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1769 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1779 /* Opcode needs rn */
1780 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1785 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1790 if (user
->type
!= XMTRX_M4
)
1796 printf (_("unhandled %d\n"), arg
);
1799 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh2a_nofpu_up
)
1800 && ( arg
== A_DISP_REG_M
1801 || arg
== A_DISP_REG_N
))
1803 /* Check a few key IMM* fields for overflow. */
1805 long val
= user
->immediate
.X_add_number
;
1807 for (opf
= 0; opf
< 4; opf
++)
1808 switch (this_try
->nibbles
[opf
])
1812 if (val
< 0 || val
> 15)
1817 if (val
< 0 || val
> 15 * 2)
1822 if (val
< 0 || val
> 15 * 4)
1830 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch
, this_try
->arch
))
1832 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, this_try
->arch
);
1842 insert (char *where
, bfd_reloc_code_real_type how
, int pcrel
,
1843 sh_operand_info
*op
)
1845 fix_new_exp (frag_now
,
1846 where
- frag_now
->fr_literal
,
1854 insert4 (char * where
, bfd_reloc_code_real_type how
, int pcrel
,
1855 sh_operand_info
* op
)
1857 fix_new_exp (frag_now
,
1858 where
- frag_now
->fr_literal
,
1865 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
1867 int high_byte
= target_big_endian
? 0 : 1;
1870 if (opcode
->arg
[0] == A_BDISP8
)
1872 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1873 p
= frag_var (rs_machine_dependent
,
1874 md_relax_table
[C (what
, COND32
)].rlx_length
,
1875 md_relax_table
[C (what
, COND8
)].rlx_length
,
1877 op
->immediate
.X_add_symbol
,
1878 op
->immediate
.X_add_number
,
1880 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1882 else if (opcode
->arg
[0] == A_BDISP12
)
1884 p
= frag_var (rs_machine_dependent
,
1885 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1886 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1888 op
->immediate
.X_add_symbol
,
1889 op
->immediate
.X_add_number
,
1891 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1896 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1899 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
1903 /* Since the low byte of the opcode will be overwritten by the reloc, we
1904 can just stash the high byte into both bytes and ignore endianness. */
1907 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1908 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1912 static int count
= 0;
1915 /* If the last loop insn is a two-byte-insn, it is in danger of being
1916 swapped with the insn after it. To prevent this, create a new
1917 symbol - complete with SH_LABEL reloc - after the last loop insn.
1918 If the last loop insn is four bytes long, the symbol will be
1919 right in the middle, but four byte insns are not swapped anyways. */
1920 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1921 Hence a 9 digit number should be enough to count all REPEATs. */
1922 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1923 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1924 /* Make this a local symbol. */
1926 SF_SET_LOCAL (end_sym
);
1927 #endif /* OBJ_COFF */
1928 symbol_table_insert (end_sym
);
1929 end_sym
->sy_value
= operand
[1].immediate
;
1930 end_sym
->sy_value
.X_add_number
+= 2;
1931 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1934 output
= frag_more (2);
1937 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1938 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1940 return frag_more (2);
1943 /* Now we know what sort of opcodes it is, let's build the bytes. */
1946 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
1951 unsigned int size
= 2;
1952 int low_byte
= target_big_endian
? 1 : 0;
1954 bfd_reloc_code_real_type r_type
;
1956 int unhandled_pic
= 0;
1969 for (indx
= 0; indx
< 3; indx
++)
1970 if (opcode
->arg
[indx
] == A_IMM
1971 && operand
[indx
].type
== A_IMM
1972 && (operand
[indx
].immediate
.X_op
== O_PIC_reloc
1973 || sh_PIC_related_p (operand
[indx
].immediate
.X_add_symbol
)
1974 || sh_PIC_related_p (operand
[indx
].immediate
.X_op_symbol
)))
1978 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
1980 output
= frag_more (4);
1985 output
= frag_more (2);
1987 for (indx
= 0; indx
< max_index
; indx
++)
1989 sh_nibble_type i
= opcode
->nibbles
[indx
];
2006 if (reg_n
< 2 || reg_n
> 5)
2007 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2008 nbuf
[indx
] = (reg_n
& 3) | 4;
2011 nbuf
[indx
] = reg_n
| (reg_m
>> 2);
2014 nbuf
[indx
] = reg_b
| 0x08;
2017 nbuf
[indx
] = reg_n
| 0x01;
2023 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3
, 0, operand
);
2029 insert (output
+ low_byte
, BFD_RELOC_SH_IMM3U
, 0, operand
);
2032 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
);
2035 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
);
2038 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
);
2041 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
);
2044 insert (output
+ 2, BFD_RELOC_SH_DISP12
, 0, operand
+1);
2047 insert (output
+ 2, BFD_RELOC_SH_DISP12BY2
, 0, operand
+1);
2050 insert (output
+ 2, BFD_RELOC_SH_DISP12BY4
, 0, operand
+1);
2053 insert (output
+ 2, BFD_RELOC_SH_DISP12BY8
, 0, operand
+1);
2058 r_type
= BFD_RELOC_SH_DISP20
;
2060 if (sh_check_fixup (&operand
->immediate
, &r_type
))
2061 as_bad (_("Invalid PIC expression."));
2064 insert4 (output
, r_type
, 0, operand
);
2067 insert4 (output
, BFD_RELOC_SH_DISP20BY8
, 0, operand
);
2070 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2073 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2076 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2079 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2082 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2085 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2088 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2091 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2094 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2097 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2100 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2103 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2106 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2107 operand
->type
!= A_DISP_PC_ABS
, operand
);
2110 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2111 operand
->type
!= A_DISP_PC_ABS
, operand
);
2114 output
= insert_loop_bounds (output
, operand
);
2115 nbuf
[indx
] = opcode
->nibbles
[3];
2119 printf (_("failed for %d\n"), i
);
2125 as_bad (_("misplaced PIC operand"));
2127 if (!target_big_endian
)
2129 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2130 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2134 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2135 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2137 if (SH_MERGE_ARCH_SET (opcode
->arch
, arch_op32
))
2139 if (!target_big_endian
)
2141 output
[3] = (nbuf
[4] << 4) | (nbuf
[5]);
2142 output
[2] = (nbuf
[6] << 4) | (nbuf
[7]);
2146 output
[2] = (nbuf
[4] << 4) | (nbuf
[5]);
2147 output
[3] = (nbuf
[6] << 4) | (nbuf
[7]);
2153 /* Find an opcode at the start of *STR_P in the hash table, and set
2154 *STR_P to the first character after the last one read. */
2156 static sh_opcode_info
*
2157 find_cooked_opcode (char **str_p
)
2160 unsigned char *op_start
;
2161 unsigned char *op_end
;
2163 unsigned int nlen
= 0;
2165 /* Drop leading whitespace. */
2169 /* Find the op code end.
2170 The pre-processor will eliminate whitespace in front of
2171 any '@' after the first argument; we may be called from
2172 assemble_ppi, so the opcode might be terminated by an '@'. */
2173 for (op_start
= op_end
= (unsigned char *) str
;
2175 && nlen
< sizeof (name
) - 1
2176 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2179 unsigned char c
= op_start
[nlen
];
2181 /* The machine independent code will convert CMP/EQ into cmp/EQ
2182 because it thinks the '/' is the end of the symbol. Moreover,
2183 all but the first sub-insn is a parallel processing insn won't
2184 be capitalized. Instead of hacking up the machine independent
2185 code, we just deal with it here. */
2192 *str_p
= (char *) op_end
;
2195 as_bad (_("can't find opcode "));
2197 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2200 /* Assemble a parallel processing insn. */
2201 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2204 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2216 sh_operand_info operand
[3];
2218 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2219 Make sure we encode a defined insn pattern. */
2224 if (opcode
->arg
[0] != A_END
)
2225 op_end
= get_operands (opcode
, op_end
, operand
);
2227 opcode
= get_specific (opcode
, operand
);
2230 /* Couldn't find an opcode which matched the operands. */
2231 char *where
= frag_more (2);
2236 as_bad (_("invalid operands for opcode"));
2240 if (opcode
->nibbles
[0] != PPI
)
2241 as_bad (_("insn can't be combined with parallel processing insn"));
2243 switch (opcode
->nibbles
[1])
2248 as_bad (_("multiple movx specifications"));
2253 as_bad (_("multiple movy specifications"));
2259 as_bad (_("multiple movx specifications"));
2260 if ((reg_n
< 4 || reg_n
> 5)
2261 && (reg_n
< 0 || reg_n
> 1))
2262 as_bad (_("invalid movx address register"));
2263 if (movy
&& movy
!= DDT_BASE
)
2264 as_bad (_("insn cannot be combined with non-nopy"));
2265 movx
= ((((reg_n
& 1) != 0) << 9)
2266 + (((reg_n
& 4) == 0) << 8)
2268 + (opcode
->nibbles
[2] << 4)
2269 + opcode
->nibbles
[3]
2275 as_bad (_("multiple movy specifications"));
2276 if ((reg_n
< 6 || reg_n
> 7)
2277 && (reg_n
< 2 || reg_n
> 3))
2278 as_bad (_("invalid movy address register"));
2279 if (movx
&& movx
!= DDT_BASE
)
2280 as_bad (_("insn cannot be combined with non-nopx"));
2281 movy
= ((((reg_n
& 1) != 0) << 8)
2282 + (((reg_n
& 4) == 0) << 9)
2284 + (opcode
->nibbles
[2] << 4)
2285 + opcode
->nibbles
[3]
2291 as_bad (_("multiple movx specifications"));
2293 as_bad (_("previous movy requires nopx"));
2294 if (reg_n
< 4 || reg_n
> 5)
2295 as_bad (_("invalid movx address register"));
2296 if (opcode
->nibbles
[2] & 8)
2298 if (reg_m
== A_A1_NUM
)
2300 else if (reg_m
!= A_A0_NUM
)
2301 as_bad (_("invalid movx dsp register"));
2306 as_bad (_("invalid movx dsp register"));
2309 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2314 as_bad (_("multiple movy specifications"));
2316 as_bad (_("previous movx requires nopy"));
2317 if (opcode
->nibbles
[2] & 8)
2319 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2322 if (reg_m
== A_A1_NUM
)
2324 else if (reg_m
!= A_A0_NUM
)
2325 as_bad (_("invalid movy dsp register"));
2330 as_bad (_("invalid movy dsp register"));
2333 if (reg_n
< 6 || reg_n
> 7)
2334 as_bad (_("invalid movy address register"));
2335 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2339 if (operand
[0].immediate
.X_op
!= O_constant
)
2340 as_bad (_("dsp immediate shift value not constant"));
2341 field_b
= ((opcode
->nibbles
[2] << 12)
2342 | (operand
[0].immediate
.X_add_number
& 127) << 4
2349 goto try_another_opcode
;
2354 as_bad (_("multiple parallel processing specifications"));
2355 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2356 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2357 switch (opcode
->nibbles
[4])
2365 field_b
+= opcode
->nibbles
[4] << 4;
2373 as_bad (_("multiple condition specifications"));
2374 cond
= opcode
->nibbles
[2] << 8;
2376 goto skip_cond_check
;
2380 as_bad (_("multiple parallel processing specifications"));
2381 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2382 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2384 switch (opcode
->nibbles
[4])
2392 field_b
+= opcode
->nibbles
[4] << 4;
2401 if ((field_b
& 0xef00) == 0xa100)
2403 /* pclr Dz pmuls Se,Sf,Dg */
2404 else if ((field_b
& 0xff00) == 0x8d00
2405 && (SH_MERGE_ARCH_SET_VALID (valid_arch
, arch_sh4al_dsp_up
)))
2407 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, arch_sh4al_dsp_up
);
2411 as_bad (_("insn cannot be combined with pmuls"));
2412 switch (field_b
& 0xf)
2415 field_b
+= 0 - A_X0_NUM
;
2418 field_b
+= 1 - A_Y0_NUM
;
2421 field_b
+= 2 - A_A0_NUM
;
2424 field_b
+= 3 - A_A1_NUM
;
2427 as_bad (_("bad combined pmuls output operand"));
2429 /* Generate warning if the destination register for padd / psub
2430 and pmuls is the same ( only for A0 or A1 ).
2431 If the last nibble is 1010 then A0 is used in both
2432 padd / psub and pmuls. If it is 1111 then A1 is used
2433 as destination register in both padd / psub and pmuls. */
2435 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2436 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2437 as_warn (_("destination register is same for parallel insns"));
2439 field_b
+= 0x4000 + reg_efg
;
2446 as_bad (_("condition not followed by conditionalizable insn"));
2452 opcode
= find_cooked_opcode (&op_end
);
2456 (_("unrecognized characters at end of parallel processing insn")));
2461 move_code
= movx
| movy
;
2464 /* Parallel processing insn. */
2465 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2467 output
= frag_more (4);
2469 if (! target_big_endian
)
2471 output
[3] = ppi_code
>> 8;
2472 output
[2] = ppi_code
;
2476 output
[2] = ppi_code
>> 8;
2477 output
[3] = ppi_code
;
2479 move_code
|= 0xf800;
2483 /* Just a double data transfer. */
2484 output
= frag_more (2);
2487 if (! target_big_endian
)
2489 output
[1] = move_code
>> 8;
2490 output
[0] = move_code
;
2494 output
[0] = move_code
>> 8;
2495 output
[1] = move_code
;
2500 /* This is the guts of the machine-dependent assembler. STR points to a
2501 machine dependent instruction. This function is supposed to emit
2502 the frags/bytes it assembles to. */
2505 md_assemble (char *str
)
2508 sh_operand_info operand
[3];
2509 sh_opcode_info
*opcode
;
2510 unsigned int size
= 0;
2511 char *initial_str
= str
;
2513 opcode
= find_cooked_opcode (&str
);
2518 /* The opcode is not in the hash table.
2519 This means we definitely have an assembly failure,
2520 but the instruction may be valid in another CPU variant.
2521 In this case emit something better than 'unknown opcode'.
2522 Search the full table in sh-opc.h to check. */
2524 char *name
= initial_str
;
2525 int name_length
= 0;
2526 const sh_opcode_info
*op
;
2529 /* identify opcode in string */
2530 while (ISSPACE (*name
))
2534 while (!ISSPACE (name
[name_length
]))
2539 /* search for opcode in full list */
2540 for (op
= sh_table
; op
->name
; op
++)
2542 if (strncasecmp (op
->name
, name
, name_length
) == 0
2543 && op
->name
[name_length
] == '\0')
2552 as_bad (_("opcode not valid for this cpu variant"));
2556 as_bad (_("unknown opcode"));
2562 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2564 /* Output a CODE reloc to tell the linker that the following
2565 bytes are instructions, not data. */
2566 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2568 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2571 if (opcode
->nibbles
[0] == PPI
)
2573 size
= assemble_ppi (op_end
, opcode
);
2577 if (opcode
->arg
[0] == A_BDISP12
2578 || opcode
->arg
[0] == A_BDISP8
)
2580 /* Since we skip get_specific here, we have to check & update
2582 if (SH_MERGE_ARCH_SET_VALID (valid_arch
, opcode
->arch
))
2583 valid_arch
= SH_MERGE_ARCH_SET (valid_arch
, opcode
->arch
);
2585 as_bad (_("Delayed branches not available on SH1"));
2586 parse_exp (op_end
+ 1, &operand
[0]);
2587 build_relax (opcode
, &operand
[0]);
2589 /* All branches are currently 16 bit. */
2594 if (opcode
->arg
[0] == A_END
)
2596 /* Ignore trailing whitespace. If there is any, it has already
2597 been compressed to a single space. */
2603 op_end
= get_operands (opcode
, op_end
, operand
);
2605 opcode
= get_specific (opcode
, operand
);
2609 /* Couldn't find an opcode which matched the operands. */
2610 char *where
= frag_more (2);
2615 as_bad (_("invalid operands for opcode"));
2620 as_bad (_("excess operands: '%s'"), op_end
);
2622 size
= build_Mytes (opcode
, operand
);
2627 dwarf2_emit_insn (size
);
2630 /* This routine is called each time a label definition is seen. It
2631 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2634 sh_frob_label (symbolS
*sym
)
2636 static fragS
*last_label_frag
;
2637 static int last_label_offset
;
2640 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2644 offset
= frag_now_fix ();
2645 if (frag_now
!= last_label_frag
2646 || offset
!= last_label_offset
)
2648 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2649 last_label_frag
= frag_now
;
2650 last_label_offset
= offset
;
2654 dwarf2_emit_label (sym
);
2657 /* This routine is called when the assembler is about to output some
2658 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2661 sh_flush_pending_output (void)
2664 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2666 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2668 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2673 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2678 /* Various routines to kill one day. */
2681 md_atof (int type
, char *litP
, int *sizeP
)
2683 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
2686 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2687 call instruction. It refers to a label of the instruction which
2688 loads the register which the call uses. We use it to generate a
2689 special reloc for the linker. */
2692 s_uses (int ignore ATTRIBUTE_UNUSED
)
2697 as_warn (_(".uses pseudo-op seen when not relaxing"));
2701 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2703 as_bad (_("bad .uses format"));
2704 ignore_rest_of_line ();
2708 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2710 demand_empty_rest_of_line ();
2715 OPTION_RELAX
= OPTION_MD_BASE
,
2722 OPTION_ALLOW_REG_PREFIX
,
2727 OPTION_DUMMY
/* Not used. This is just here to make it easy to add and subtract options from this enum. */
2730 const char *md_shortopts
= "";
2731 struct option md_longopts
[] =
2733 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2734 {"big", no_argument
, NULL
, OPTION_BIG
},
2735 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2736 /* The next two switches are here because the
2737 generic parts of the linker testsuite uses them. */
2738 {"EB", no_argument
, NULL
, OPTION_BIG
},
2739 {"EL", no_argument
, NULL
, OPTION_LITTLE
},
2740 {"small", no_argument
, NULL
, OPTION_SMALL
},
2741 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2742 {"isa", required_argument
, NULL
, OPTION_ISA
},
2743 {"renesas", no_argument
, NULL
, OPTION_RENESAS
},
2744 {"allow-reg-prefix", no_argument
, NULL
, OPTION_ALLOW_REG_PREFIX
},
2746 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
2749 {"fdpic", no_argument
, NULL
, OPTION_FDPIC
},
2752 {NULL
, no_argument
, NULL
, 0}
2754 size_t md_longopts_size
= sizeof (md_longopts
);
2757 md_parse_option (int c
, const char *arg ATTRIBUTE_UNUSED
)
2766 target_big_endian
= 1;
2770 target_big_endian
= 0;
2778 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
2781 case OPTION_RENESAS
:
2782 dont_adjust_reloc_32
= 1;
2785 case OPTION_ALLOW_REG_PREFIX
:
2786 allow_dollar_register_prefix
= 1;
2790 if (strcasecmp (arg
, "dsp") == 0)
2791 preset_target_arch
= arch_sh_up
& ~(arch_sh_sp_fpu
|arch_sh_dp_fpu
);
2792 else if (strcasecmp (arg
, "fp") == 0)
2793 preset_target_arch
= arch_sh_up
& ~arch_sh_has_dsp
;
2794 else if (strcasecmp (arg
, "any") == 0)
2795 preset_target_arch
= arch_sh_up
;
2798 extern const bfd_arch_info_type bfd_sh_arch
;
2799 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
2801 preset_target_arch
= 0;
2802 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
2804 int len
= strlen(bfd_arch
->printable_name
);
2806 if (strncasecmp (bfd_arch
->printable_name
, arg
, len
) != 0)
2809 if (arg
[len
] == '\0')
2810 preset_target_arch
=
2811 sh_get_arch_from_bfd_mach (bfd_arch
->mach
);
2812 else if (strcasecmp(&arg
[len
], "-up") == 0)
2813 preset_target_arch
=
2814 sh_get_arch_up_from_bfd_mach (bfd_arch
->mach
);
2820 if (!preset_target_arch
)
2821 as_bad (_("Invalid argument to --isa option: %s"), arg
);
2825 case OPTION_H_TICK_HEX
:
2826 enable_h_tick_hex
= 1;
2833 #endif /* OBJ_ELF */
2843 md_show_usage (FILE *stream
)
2845 fprintf (stream
, _("\
2847 --little generate little endian code\n\
2848 --big generate big endian code\n\
2849 --relax alter jump instructions for long displacements\n\
2850 --renesas disable optimization with section symbol for\n\
2851 compatibility with Renesas assembler.\n\
2852 --small align sections to 4 byte boundaries, not 16\n\
2853 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
2854 --allow-reg-prefix allow '$' as a register name prefix.\n\
2855 --isa=[any use most appropriate isa\n\
2856 | dsp same as '-dsp'\n\
2859 extern const bfd_arch_info_type bfd_sh_arch
;
2860 bfd_arch_info_type
const *bfd_arch
= &bfd_sh_arch
;
2862 for (; bfd_arch
; bfd_arch
=bfd_arch
->next
)
2864 fprintf (stream
, "\n | %s", bfd_arch
->printable_name
);
2865 fprintf (stream
, "\n | %s-up", bfd_arch
->printable_name
);
2868 fprintf (stream
, "]\n");
2870 fprintf (stream
, _("\
2871 --fdpic generate an FDPIC object file\n"));
2872 #endif /* OBJ_ELF */
2875 /* This struct is used to pass arguments to sh_count_relocs through
2876 bfd_map_over_sections. */
2878 struct sh_count_relocs
2880 /* Symbol we are looking for. */
2882 /* Count of relocs found. */
2886 /* Count the number of fixups in a section which refer to a particular
2887 symbol. This is called via bfd_map_over_sections. */
2890 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
2892 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2893 segment_info_type
*seginfo
;
2897 seginfo
= seg_info (sec
);
2898 if (seginfo
== NULL
)
2902 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2904 if (fix
->fx_addsy
== sym
)
2912 /* Handle the count relocs for a particular section.
2913 This is called via bfd_map_over_sections. */
2916 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
2917 void *ignore ATTRIBUTE_UNUSED
)
2919 segment_info_type
*seginfo
;
2922 seginfo
= seg_info (sec
);
2923 if (seginfo
== NULL
)
2926 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2930 sym
= fix
->fx_addsy
;
2931 /* Check for a local_symbol. */
2932 if (sym
&& sym
->bsym
== NULL
)
2934 struct local_symbol
*ls
= (struct local_symbol
*)sym
;
2935 /* See if it's been converted. If so, canonicalize. */
2936 if (local_symbol_converted_p (ls
))
2937 fix
->fx_addsy
= local_symbol_get_real_symbol (ls
);
2941 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2946 struct sh_count_relocs info
;
2948 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2951 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2952 symbol in the same section. */
2953 sym
= fix
->fx_addsy
;
2955 || fix
->fx_subsy
!= NULL
2956 || fix
->fx_addnumber
!= 0
2957 || S_GET_SEGMENT (sym
) != sec
2958 || S_IS_EXTERNAL (sym
))
2960 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2961 _(".uses does not refer to a local symbol in the same section"));
2965 /* Look through the fixups again, this time looking for one
2966 at the same location as sym. */
2967 val
= S_GET_VALUE (sym
);
2968 for (fscan
= seginfo
->fix_root
;
2970 fscan
= fscan
->fx_next
)
2971 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2972 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2973 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2974 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2975 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2979 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2980 _("can't find fixup pointed to by .uses"));
2984 if (fscan
->fx_tcbit
)
2986 /* We've already done this one. */
2990 /* The variable fscan should also be a fixup to a local symbol
2991 in the same section. */
2992 sym
= fscan
->fx_addsy
;
2994 || fscan
->fx_subsy
!= NULL
2995 || fscan
->fx_addnumber
!= 0
2996 || S_GET_SEGMENT (sym
) != sec
2997 || S_IS_EXTERNAL (sym
))
2999 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3000 _(".uses target does not refer to a local symbol in the same section"));
3004 /* Now we look through all the fixups of all the sections,
3005 counting the number of times we find a reference to sym. */
3008 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3013 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3014 We have already adjusted the value of sym to include the
3015 fragment address, so we undo that adjustment here. */
3016 subseg_change (sec
, 0);
3017 fix_new (fscan
->fx_frag
,
3018 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3019 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3023 /* This function is called after the symbol table has been completed,
3024 but before the relocs or section contents have been written out.
3025 If we have seen any .uses pseudo-ops, they point to an instruction
3026 which loads a register with the address of a function. We look
3027 through the fixups to find where the function address is being
3028 loaded from. We then generate a COUNT reloc giving the number of
3029 times that function address is referred to. The linker uses this
3030 information when doing relaxing, to decide when it can eliminate
3031 the stored function address entirely. */
3039 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3042 /* Called after relaxing. Set the correct sizes of the fragments, and
3043 create relocs so that md_apply_fix will fill in the correct values. */
3046 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3050 switch (fragP
->fr_subtype
)
3052 case C (COND_JUMP
, COND8
):
3053 case C (COND_JUMP_DELAY
, COND8
):
3054 subseg_change (seg
, 0);
3055 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3056 1, BFD_RELOC_SH_PCDISP8BY2
);
3061 case C (UNCOND_JUMP
, UNCOND12
):
3062 subseg_change (seg
, 0);
3063 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3064 1, BFD_RELOC_SH_PCDISP12BY2
);
3069 case C (UNCOND_JUMP
, UNCOND32
):
3070 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3071 if (fragP
->fr_symbol
== NULL
)
3072 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3073 _("displacement overflows 12-bit field"));
3074 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3075 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3076 _("displacement to defined symbol %s overflows 12-bit field"),
3077 S_GET_NAME (fragP
->fr_symbol
));
3079 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3080 _("displacement to undefined symbol %s overflows 12-bit field"),
3081 S_GET_NAME (fragP
->fr_symbol
));
3082 /* Stabilize this frag, so we don't trip an assert. */
3083 fragP
->fr_fix
+= fragP
->fr_var
;
3087 case C (COND_JUMP
, COND12
):
3088 case C (COND_JUMP_DELAY
, COND12
):
3089 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3090 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3091 was due to gas incorrectly relaxing an out-of-range conditional
3092 branch with delay slot. It turned:
3093 bf.s L6 (slot mov.l r12,@(44,r0))
3096 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3098 32: 10 cb mov.l r12,@(44,r0)
3099 Therefore, branches with delay slots have to be handled
3100 differently from ones without delay slots. */
3102 unsigned char *buffer
=
3103 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3104 int highbyte
= target_big_endian
? 0 : 1;
3105 int lowbyte
= target_big_endian
? 1 : 0;
3106 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3108 /* Toggle the true/false bit of the bcond. */
3109 buffer
[highbyte
] ^= 0x2;
3111 /* If this is a delayed branch, we may not put the bra in the
3112 slot. So we change it to a non-delayed branch, like that:
3113 b! cond slot_label; bra disp; slot_label: slot_insn
3114 ??? We should try if swapping the conditional branch and
3115 its delay-slot insn already makes the branch reach. */
3117 /* Build a relocation to six / four bytes farther on. */
3118 subseg_change (seg
, 0);
3119 fix_new (fragP
, fragP
->fr_fix
, 2, section_symbol (seg
),
3120 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3121 1, BFD_RELOC_SH_PCDISP8BY2
);
3123 /* Set up a jump instruction. */
3124 buffer
[highbyte
+ 2] = 0xa0;
3125 buffer
[lowbyte
+ 2] = 0;
3126 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3127 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3131 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3136 /* Fill in a NOP instruction. */
3137 buffer
[highbyte
+ 4] = 0x0;
3138 buffer
[lowbyte
+ 4] = 0x9;
3147 case C (COND_JUMP
, COND32
):
3148 case C (COND_JUMP_DELAY
, COND32
):
3149 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3150 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3151 if (fragP
->fr_symbol
== NULL
)
3152 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3153 _("displacement overflows 8-bit field"));
3154 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3155 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3156 _("displacement to defined symbol %s overflows 8-bit field"),
3157 S_GET_NAME (fragP
->fr_symbol
));
3159 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3160 _("displacement to undefined symbol %s overflows 8-bit field "),
3161 S_GET_NAME (fragP
->fr_symbol
));
3162 /* Stabilize this frag, so we don't trip an assert. */
3163 fragP
->fr_fix
+= fragP
->fr_var
;
3171 if (donerelax
&& !sh_relax
)
3172 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3173 _("overflow in branch to %s; converted into longer instruction sequence"),
3174 (fragP
->fr_symbol
!= NULL
3175 ? S_GET_NAME (fragP
->fr_symbol
)
3180 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3184 #else /* ! OBJ_ELF */
3185 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3186 & -(1 << bfd_get_section_alignment (stdoutput
, seg
)));
3187 #endif /* ! OBJ_ELF */
3190 /* This static variable is set by s_uacons to tell sh_cons_align that
3191 the expression does not need to be aligned. */
3193 static int sh_no_align_cons
= 0;
3195 /* This handles the unaligned space allocation pseudo-ops, such as
3196 .uaword. .uaword is just like .word, but the value does not need
3200 s_uacons (int bytes
)
3202 /* Tell sh_cons_align not to align this value. */
3203 sh_no_align_cons
= 1;
3207 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3208 aligned correctly. Note that this can cause warnings to be issued
3209 when assembling initialized structured which were declared with the
3210 packed attribute. FIXME: Perhaps we should require an option to
3211 enable this warning? */
3214 sh_cons_align (int nbytes
)
3218 if (sh_no_align_cons
)
3220 /* This is an unaligned pseudo-op. */
3221 sh_no_align_cons
= 0;
3226 while ((nbytes
& 1) == 0)
3235 if (now_seg
== absolute_section
)
3237 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3238 as_warn (_("misaligned data"));
3242 frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3243 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3245 record_alignment (now_seg
, nalign
);
3248 /* When relaxing, we need to output a reloc for any .align directive
3249 that requests alignment to a four byte boundary or larger. This is
3250 also where we check for misaligned data. */
3253 sh_handle_align (fragS
*frag
)
3255 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3257 if (frag
->fr_type
== rs_align_code
)
3259 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3260 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3262 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3271 if (target_big_endian
)
3273 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3274 frag
->fr_var
= sizeof big_nop_pattern
;
3278 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3279 frag
->fr_var
= sizeof little_nop_pattern
;
3282 else if (frag
->fr_type
== rs_align_test
)
3285 as_bad_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3289 && (frag
->fr_type
== rs_align
3290 || frag
->fr_type
== rs_align_code
)
3291 && frag
->fr_address
+ frag
->fr_fix
> 0
3292 && frag
->fr_offset
> 1
3293 && now_seg
!= bss_section
)
3294 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3295 BFD_RELOC_SH_ALIGN
);
3298 /* See whether the relocation should be resolved locally. */
3301 sh_local_pcrel (fixS
*fix
)
3304 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3305 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3306 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3307 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3308 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3309 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3310 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3313 /* See whether we need to force a relocation into the output file.
3314 This is used to force out switch and PC relative relocations when
3318 sh_force_relocation (fixS
*fix
)
3320 /* These relocations can't make it into a DSO, so no use forcing
3321 them for global symbols. */
3322 if (sh_local_pcrel (fix
))
3325 /* Make sure some relocations get emitted. */
3326 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3327 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3328 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3329 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3330 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3331 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3332 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3333 || generic_force_reloc (fix
))
3339 return (fix
->fx_pcrel
3340 || SWITCH_TABLE (fix
)
3341 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3342 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3343 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3344 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3345 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3350 sh_fix_adjustable (fixS
*fixP
)
3352 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3353 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3354 || fixP
->fx_r_type
== BFD_RELOC_SH_GOT20
3355 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3356 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC
3357 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTFUNCDESC20
3358 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC
3359 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTOFFFUNCDESC20
3360 || fixP
->fx_r_type
== BFD_RELOC_SH_FUNCDESC
3361 || ((fixP
->fx_r_type
== BFD_RELOC_32
) && dont_adjust_reloc_32
)
3362 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3365 /* We need the symbol name for the VTABLE entries */
3366 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3367 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3374 sh_elf_final_processing (void)
3378 /* Set file-specific flags to indicate if this code needs
3379 a processor with the sh-dsp / sh2e ISA to execute. */
3380 val
= sh_find_elf_flags (valid_arch
);
3382 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3383 elf_elfheader (stdoutput
)->e_flags
|= val
;
3386 elf_elfheader (stdoutput
)->e_flags
|= EF_SH_FDPIC
;
3391 /* Return the target format for uClinux. */
3394 sh_uclinux_target_format (void)
3397 return (!target_big_endian
? "elf32-sh-fdpic" : "elf32-shbig-fdpic");
3399 return (!target_big_endian
? "elf32-shl" : "elf32-sh");
3403 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3404 assembly-time value. If we're generating a reloc for FIXP,
3405 see whether the addend should be stored in-place or whether
3406 it should be in an ELF r_addend field. */
3409 apply_full_field_fix (fixS
*fixP
, char *buf
, bfd_vma val
, int size
)
3411 reloc_howto_type
*howto
;
3413 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3415 howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
3416 if (howto
&& !howto
->partial_inplace
)
3418 fixP
->fx_addnumber
= val
;
3422 md_number_to_chars (buf
, val
, size
);
3425 /* Apply a fixup to the object file. */
3428 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3430 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3431 int lowbyte
= target_big_endian
? 1 : 0;
3432 int highbyte
= target_big_endian
? 0 : 1;
3433 long val
= (long) *valP
;
3437 /* A difference between two symbols, the second of which is in the
3438 current section, is transformed in a PC-relative relocation to
3439 the other symbol. We have to adjust the relocation type here. */
3442 switch (fixP
->fx_r_type
)
3448 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3451 /* Currently, we only support 32-bit PCREL relocations.
3452 We'd need a new reloc type to handle 16_PCREL, and
3453 8_PCREL is already taken for R_SH_SWITCH8, which
3454 apparently does something completely different than what
3457 bfd_set_error (bfd_error_bad_value
);
3461 bfd_set_error (bfd_error_bad_value
);
3466 /* The function adjust_reloc_syms won't convert a reloc against a weak
3467 symbol into a reloc against a section, but bfd_install_relocation
3468 will screw up if the symbol is defined, so we have to adjust val here
3469 to avoid the screw up later.
3471 For ordinary relocs, this does not happen for ELF, since for ELF,
3472 bfd_install_relocation uses the "special function" field of the
3473 howto, and does not execute the code that needs to be undone, as long
3474 as the special function does not return bfd_reloc_continue.
3475 It can happen for GOT- and PLT-type relocs the way they are
3476 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3477 doesn't matter here since those relocs don't use VAL; see below. */
3478 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3479 && fixP
->fx_addsy
!= NULL
3480 && S_IS_WEAK (fixP
->fx_addsy
))
3481 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3483 if (SWITCH_TABLE (fixP
))
3484 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3488 switch (fixP
->fx_r_type
)
3490 case BFD_RELOC_SH_IMM3
:
3492 * buf
= (* buf
& 0xf8) | (val
& 0x7);
3494 case BFD_RELOC_SH_IMM3U
:
3496 * buf
= (* buf
& 0x8f) | ((val
& 0x7) << 4);
3498 case BFD_RELOC_SH_DISP12
:
3500 buf
[lowbyte
] = val
& 0xff;
3501 buf
[highbyte
] |= (val
>> 8) & 0x0f;
3503 case BFD_RELOC_SH_DISP12BY2
:
3506 buf
[lowbyte
] = (val
>> 1) & 0xff;
3507 buf
[highbyte
] |= (val
>> 9) & 0x0f;
3509 case BFD_RELOC_SH_DISP12BY4
:
3512 buf
[lowbyte
] = (val
>> 2) & 0xff;
3513 buf
[highbyte
] |= (val
>> 10) & 0x0f;
3515 case BFD_RELOC_SH_DISP12BY8
:
3518 buf
[lowbyte
] = (val
>> 3) & 0xff;
3519 buf
[highbyte
] |= (val
>> 11) & 0x0f;
3521 case BFD_RELOC_SH_DISP20
:
3522 if (! target_big_endian
)
3526 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 12) & 0xf0);
3527 buf
[2] = (val
>> 8) & 0xff;
3528 buf
[3] = val
& 0xff;
3530 case BFD_RELOC_SH_DISP20BY8
:
3531 if (!target_big_endian
)
3536 buf
[1] = (buf
[1] & 0x0f) | ((val
>> 20) & 0xf0);
3537 buf
[2] = (val
>> 16) & 0xff;
3538 buf
[3] = (val
>> 8) & 0xff;
3541 case BFD_RELOC_SH_IMM4
:
3543 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3546 case BFD_RELOC_SH_IMM4BY2
:
3549 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3552 case BFD_RELOC_SH_IMM4BY4
:
3555 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3558 case BFD_RELOC_SH_IMM8BY2
:
3564 case BFD_RELOC_SH_IMM8BY4
:
3571 case BFD_RELOC_SH_IMM8
:
3572 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3573 sometimes it is not (e.g., and). We permit any 8 bit value.
3574 Note that adding further restrictions may invalidate
3575 reasonable looking assembly code, such as ``and -0x1,r0''. */
3581 case BFD_RELOC_SH_PCRELIMM8BY4
:
3582 /* If we are dealing with a known destination ... */
3583 if ((fixP
->fx_addsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
))
3584 && (fixP
->fx_subsy
== NULL
|| S_IS_DEFINED (fixP
->fx_addsy
)))
3586 /* Don't silently move the destination due to misalignment.
3587 The absolute address is the fragment base plus the offset into
3588 the fragment plus the pc relative offset to the label. */
3589 if ((fixP
->fx_frag
->fr_address
+ fixP
->fx_where
+ val
) & 3)
3590 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3591 _("offset to unaligned destination"));
3593 /* The displacement cannot be zero or backward even if aligned.
3594 Allow -2 because val has already been adjusted somewhere. */
3596 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("negative offset"));
3599 /* The lower two bits of the PC are cleared before the
3600 displacement is added in. We can assume that the destination
3601 is on a 4 byte boundary. If this instruction is also on a 4
3602 byte boundary, then we want
3604 and target - here is a multiple of 4.
3605 Otherwise, we are on a 2 byte boundary, and we want
3606 (target - (here - 2)) / 4
3607 and target - here is not a multiple of 4. Computing
3608 (target - (here - 2)) / 4 == (target - here + 2) / 4
3609 works for both cases, since in the first case the addition of
3610 2 will be removed by the division. target - here is in the
3612 val
= (val
+ 2) / 4;
3614 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3618 case BFD_RELOC_SH_PCRELIMM8BY2
:
3621 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3625 case BFD_RELOC_SH_PCDISP8BY2
:
3627 if (val
< -0x80 || val
> 0x7f)
3628 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3632 case BFD_RELOC_SH_PCDISP12BY2
:
3634 if (val
< -0x800 || val
> 0x7ff)
3635 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3636 buf
[lowbyte
] = val
& 0xff;
3637 buf
[highbyte
] |= (val
>> 8) & 0xf;
3641 case BFD_RELOC_32_PCREL
:
3642 apply_full_field_fix (fixP
, buf
, val
, 4);
3646 apply_full_field_fix (fixP
, buf
, val
, 2);
3649 case BFD_RELOC_SH_USES
:
3650 /* Pass the value into sh_reloc(). */
3651 fixP
->fx_addnumber
= val
;
3654 case BFD_RELOC_SH_COUNT
:
3655 case BFD_RELOC_SH_ALIGN
:
3656 case BFD_RELOC_SH_CODE
:
3657 case BFD_RELOC_SH_DATA
:
3658 case BFD_RELOC_SH_LABEL
:
3659 /* Nothing to do here. */
3662 case BFD_RELOC_SH_LOOP_START
:
3663 case BFD_RELOC_SH_LOOP_END
:
3665 case BFD_RELOC_VTABLE_INHERIT
:
3666 case BFD_RELOC_VTABLE_ENTRY
:
3671 case BFD_RELOC_32_PLT_PCREL
:
3672 /* Make the jump instruction point to the address of the operand. At
3673 runtime we merely add the offset to the actual PLT entry. */
3674 * valP
= 0xfffffffc;
3675 val
= fixP
->fx_offset
;
3677 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3678 apply_full_field_fix (fixP
, buf
, val
, 4);
3681 case BFD_RELOC_SH_GOTPC
:
3682 /* This is tough to explain. We end up with this one if we have
3683 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3684 The goal here is to obtain the absolute address of the GOT,
3685 and it is strongly preferable from a performance point of
3686 view to avoid using a runtime relocation for this. There are
3687 cases where you have something like:
3689 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3691 and here no correction would be required. Internally in the
3692 assembler we treat operands of this form as not being pcrel
3693 since the '.' is explicitly mentioned, and I wonder whether
3694 it would simplify matters to do it this way. Who knows. In
3695 earlier versions of the PIC patches, the pcrel_adjust field
3696 was used to store the correction, but since the expression is
3697 not pcrel, I felt it would be confusing to do it this way. */
3699 apply_full_field_fix (fixP
, buf
, val
, 4);
3702 case BFD_RELOC_SH_TLS_GD_32
:
3703 case BFD_RELOC_SH_TLS_LD_32
:
3704 case BFD_RELOC_SH_TLS_IE_32
:
3705 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3707 case BFD_RELOC_32_GOT_PCREL
:
3708 case BFD_RELOC_SH_GOT20
:
3709 case BFD_RELOC_SH_GOTPLT32
:
3710 case BFD_RELOC_SH_GOTFUNCDESC
:
3711 case BFD_RELOC_SH_GOTFUNCDESC20
:
3712 case BFD_RELOC_SH_GOTOFFFUNCDESC
:
3713 case BFD_RELOC_SH_GOTOFFFUNCDESC20
:
3714 case BFD_RELOC_SH_FUNCDESC
:
3715 * valP
= 0; /* Fully resolved at runtime. No addend. */
3716 apply_full_field_fix (fixP
, buf
, 0, 4);
3719 case BFD_RELOC_SH_TLS_LDO_32
:
3720 case BFD_RELOC_SH_TLS_LE_32
:
3721 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3723 case BFD_RELOC_32_GOTOFF
:
3724 case BFD_RELOC_SH_GOTOFF20
:
3725 apply_full_field_fix (fixP
, buf
, val
, 4);
3735 if ((val
& ((1 << shift
) - 1)) != 0)
3736 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3740 val
= ((val
>> shift
)
3741 | ((long) -1 & ~ ((long) -1 >> shift
)));
3744 /* Extend sign for 64-bit host. */
3745 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
3746 if (max
!= 0 && (val
< min
|| val
> max
))
3747 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3749 /* Stop the generic code from trying to overflow check the value as well.
3750 It may not have the correct value anyway, as we do not store val back
3752 fixP
->fx_no_overflow
= 1;
3754 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3758 /* Called just before address relaxation. Return the length
3759 by which a fragment must grow to reach it's destination. */
3762 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
3766 switch (fragP
->fr_subtype
)
3771 case C (UNCOND_JUMP
, UNDEF_DISP
):
3772 /* Used to be a branch to somewhere which was unknown. */
3773 if (!fragP
->fr_symbol
)
3775 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3777 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3779 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3783 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3787 case C (COND_JUMP
, UNDEF_DISP
):
3788 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3789 what
= GET_WHAT (fragP
->fr_subtype
);
3790 /* Used to be a branch to somewhere which was unknown. */
3791 if (fragP
->fr_symbol
3792 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3794 /* Got a symbol and it's defined in this segment, become byte
3795 sized - maybe it will fix up. */
3796 fragP
->fr_subtype
= C (what
, COND8
);
3798 else if (fragP
->fr_symbol
)
3800 /* It's got a segment, but it's not ours, so it will always be long. */
3801 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3805 /* We know the abs value. */
3806 fragP
->fr_subtype
= C (what
, COND8
);
3810 case C (UNCOND_JUMP
, UNCOND12
):
3811 case C (UNCOND_JUMP
, UNCOND32
):
3812 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3813 case C (COND_JUMP
, COND8
):
3814 case C (COND_JUMP
, COND12
):
3815 case C (COND_JUMP
, COND32
):
3816 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3817 case C (COND_JUMP_DELAY
, COND8
):
3818 case C (COND_JUMP_DELAY
, COND12
):
3819 case C (COND_JUMP_DELAY
, COND32
):
3820 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3821 /* When relaxing a section for the second time, we don't need to
3822 do anything besides return the current size. */
3826 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3827 return fragP
->fr_var
;
3830 /* Put number into target byte order. */
3833 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
3835 if (! target_big_endian
)
3836 number_to_chars_littleendian (ptr
, use
, nbytes
);
3838 number_to_chars_bigendian (ptr
, use
, nbytes
);
3841 /* This version is used in obj-coff.c eg. for the sh-hms target. */
3844 md_pcrel_from (fixS
*fixP
)
3846 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3850 md_pcrel_from_section (fixS
*fixP
, segT sec
)
3852 if (! sh_local_pcrel (fixP
)
3853 && fixP
->fx_addsy
!= (symbolS
*) NULL
3854 && (generic_force_reloc (fixP
)
3855 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3857 /* The symbol is undefined (or is defined but not in this section,
3858 or we're not sure about it being the final definition). Let the
3859 linker figure it out. We need to adjust the subtraction of a
3860 symbol to the position of the relocated data, though. */
3861 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3864 return md_pcrel_from (fixP
);
3867 /* Create a reloc. */
3870 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
3873 bfd_reloc_code_real_type r_type
;
3875 rel
= XNEW (arelent
);
3876 rel
->sym_ptr_ptr
= XNEW (asymbol
*);
3877 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3878 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3880 r_type
= fixp
->fx_r_type
;
3882 if (SWITCH_TABLE (fixp
))
3884 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
3885 rel
->addend
= rel
->address
- S_GET_VALUE(fixp
->fx_subsy
);
3886 if (r_type
== BFD_RELOC_16
)
3887 r_type
= BFD_RELOC_SH_SWITCH16
;
3888 else if (r_type
== BFD_RELOC_8
)
3889 r_type
= BFD_RELOC_8_PCREL
;
3890 else if (r_type
== BFD_RELOC_32
)
3891 r_type
= BFD_RELOC_SH_SWITCH32
;
3895 else if (r_type
== BFD_RELOC_SH_USES
)
3896 rel
->addend
= fixp
->fx_addnumber
;
3897 else if (r_type
== BFD_RELOC_SH_COUNT
)
3898 rel
->addend
= fixp
->fx_offset
;
3899 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3900 rel
->addend
= fixp
->fx_offset
;
3901 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3902 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3903 rel
->addend
= fixp
->fx_offset
;
3904 else if (r_type
== BFD_RELOC_SH_LOOP_START
3905 || r_type
== BFD_RELOC_SH_LOOP_END
)
3906 rel
->addend
= fixp
->fx_offset
;
3907 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3910 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3913 rel
->addend
= fixp
->fx_addnumber
;
3915 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3917 if (rel
->howto
== NULL
)
3919 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3920 _("Cannot represent relocation type %s"),
3921 bfd_get_reloc_code_name (r_type
));
3922 /* Set howto to a garbage value so that we can keep going. */
3923 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3924 gas_assert (rel
->howto
!= NULL
);
3927 else if (rel
->howto
->type
== R_SH_IND12W
)
3928 rel
->addend
+= fixp
->fx_offset
- 4;
3935 inline static char *
3936 sh_end_of_match (char *cont
, const char *what
)
3938 int len
= strlen (what
);
3940 if (strncasecmp (cont
, what
, strlen (what
)) == 0
3941 && ! is_part_of_name (cont
[len
]))
3948 sh_parse_name (char const *name
,
3950 enum expr_mode mode
,
3953 char *next
= input_line_pointer
;
3958 exprP
->X_op_symbol
= NULL
;
3960 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3963 GOT_symbol
= symbol_find_or_make (name
);
3965 exprP
->X_add_symbol
= GOT_symbol
;
3967 /* If we have an absolute symbol or a reg, then we know its
3969 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
3970 if (mode
!= expr_defer
&& segment
== absolute_section
)
3972 exprP
->X_op
= O_constant
;
3973 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3974 exprP
->X_add_symbol
= NULL
;
3976 else if (mode
!= expr_defer
&& segment
== reg_section
)
3978 exprP
->X_op
= O_register
;
3979 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3980 exprP
->X_add_symbol
= NULL
;
3984 exprP
->X_op
= O_symbol
;
3985 exprP
->X_add_number
= 0;
3991 exprP
->X_add_symbol
= symbol_find_or_make (name
);
3993 if (*nextcharP
!= '@')
3995 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
3996 reloc_type
= BFD_RELOC_32_GOTOFF
;
3997 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
3998 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
3999 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4000 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4001 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4002 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4003 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4004 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4005 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4006 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4007 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4008 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4009 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4010 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4011 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4012 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4013 else if ((next_end
= sh_end_of_match (next
+ 1, "PCREL")))
4014 reloc_type
= BFD_RELOC_32_PCREL
;
4015 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTFUNCDESC")))
4016 reloc_type
= BFD_RELOC_SH_GOTFUNCDESC
;
4017 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFFFUNCDESC")))
4018 reloc_type
= BFD_RELOC_SH_GOTOFFFUNCDESC
;
4019 else if ((next_end
= sh_end_of_match (next
+ 1, "FUNCDESC")))
4020 reloc_type
= BFD_RELOC_SH_FUNCDESC
;
4024 *input_line_pointer
= *nextcharP
;
4025 input_line_pointer
= next_end
;
4026 *nextcharP
= *input_line_pointer
;
4027 *input_line_pointer
= '\0';
4029 exprP
->X_op
= O_PIC_reloc
;
4030 exprP
->X_add_number
= 0;
4031 exprP
->X_md
= reloc_type
;
4037 sh_cfi_frame_initial_instructions (void)
4039 cfi_add_CFA_def_cfa (15, 0);
4043 sh_regname_to_dw2regnum (char *regname
)
4045 unsigned int regnum
= -1;
4049 static struct { const char *name
; int dw2regnum
; } regnames
[] =
4051 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4052 { "macl", 21 }, { "fpul", 23 }
4055 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4056 if (strcmp (regnames
[i
].name
, regname
) == 0)
4057 return regnames
[i
].dw2regnum
;
4059 if (regname
[0] == 'r')
4062 regnum
= strtoul (p
, &q
, 10);
4063 if (p
== q
|| *q
|| regnum
>= 16)
4066 else if (regname
[0] == 'f' && regname
[1] == 'r')
4069 regnum
= strtoul (p
, &q
, 10);
4070 if (p
== q
|| *q
|| regnum
>= 16)
4074 else if (regname
[0] == 'x' && regname
[1] == 'd')
4077 regnum
= strtoul (p
, &q
, 10);
4078 if (p
== q
|| *q
|| regnum
>= 8)
4084 #endif /* OBJ_ELF */