1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate
;
47 const char comment_chars
[] = "!";
48 const char line_separator_chars
[] = ";";
49 const char line_comment_chars
[] = "!#";
51 static void s_uses (int);
52 static void s_uacons (int);
55 static void sh_elf_cons (int);
57 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
61 big (int ignore ATTRIBUTE_UNUSED
)
63 if (! target_big_endian
)
64 as_bad (_("directive .big encountered when option -big required"));
66 /* Stop further messages. */
67 target_big_endian
= 1;
71 little (int ignore ATTRIBUTE_UNUSED
)
73 if (target_big_endian
)
74 as_bad (_("directive .little encountered when option -little required"));
76 /* Stop further messages. */
77 target_big_endian
= 0;
80 /* This table describes all the machine specific pseudo-ops the assembler
81 has to support. The fields are:
82 pseudo-op name without dot
83 function to call to execute this pseudo-op
84 Integer arg to pass to the function. */
86 const pseudo_typeS md_pseudo_table
[] =
89 {"long", sh_elf_cons
, 4},
90 {"int", sh_elf_cons
, 4},
91 {"word", sh_elf_cons
, 2},
92 {"short", sh_elf_cons
, 2},
98 {"form", listing_psize
, 0},
99 {"little", little
, 0},
100 {"heading", listing_title
, 0},
101 {"import", s_ignore
, 0},
102 {"page", listing_eject
, 0},
103 {"program", s_ignore
, 0},
105 {"uaword", s_uacons
, 2},
106 {"ualong", s_uacons
, 4},
107 {"uaquad", s_uacons
, 8},
108 {"2byte", s_uacons
, 2},
109 {"4byte", s_uacons
, 4},
110 {"8byte", s_uacons
, 8},
112 {"mode", s_sh64_mode
, 0 },
114 /* Have the old name too. */
115 {"isa", s_sh64_mode
, 0 },
117 /* Assert that the right ABI is used. */
118 {"abi", s_sh64_abi
, 0 },
120 { "vtable_inherit", sh64_vtable_inherit
, 0 },
121 { "vtable_entry", sh64_vtable_entry
, 0 },
122 #endif /* HAVE_SH64 */
126 /*int md_reloc_size; */
128 int sh_relax
; /* set if -relax seen */
130 /* Whether -small was seen. */
134 /* preset architecture set, if given; zero otherwise. */
136 static int preset_target_arch
;
138 /* The bit mask of architectures that could
139 accommodate the insns seen so far. */
140 static int valid_arch
;
142 const char EXP_CHARS
[] = "eE";
144 /* Chars that mean this number is a floating point constant. */
147 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
149 #define C(a,b) ENCODE_RELAX(a,b)
151 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
152 #define GET_WHAT(x) ((x>>4))
154 /* These are the three types of relaxable instruction. */
155 /* These are the types of relaxable instructions; except for END which is
158 #define COND_JUMP_DELAY 2
159 #define UNCOND_JUMP 3
163 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
164 #define SH64PCREL16_32 4
165 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
166 #define SH64PCREL16_64 5
168 /* Variants of the above for adjusting the insn to PTA or PTB according to
170 #define SH64PCREL16PT_32 6
171 #define SH64PCREL16PT_64 7
173 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
174 #define MOVI_IMM_32 8
175 #define MOVI_IMM_32_PCREL 9
176 #define MOVI_IMM_64 10
177 #define MOVI_IMM_64_PCREL 11
180 #else /* HAVE_SH64 */
184 #endif /* HAVE_SH64 */
190 #define UNDEF_WORD_DISP 4
196 #define UNDEF_SH64PCREL 0
197 #define SH64PCREL16 1
198 #define SH64PCREL32 2
199 #define SH64PCREL48 3
200 #define SH64PCREL64 4
201 #define SH64PCRELPLT 5
209 #define MOVI_GOTOFF 6
211 #endif /* HAVE_SH64 */
213 /* Branch displacements are from the address of the branch plus
214 four, thus all minimum and maximum values have 4 added to them. */
217 #define COND8_LENGTH 2
219 /* There is one extra instruction before the branch, so we must add
220 two more bytes to account for it. */
221 #define COND12_F 4100
222 #define COND12_M -4090
223 #define COND12_LENGTH 6
225 #define COND12_DELAY_LENGTH 4
227 /* ??? The minimum and maximum values are wrong, but this does not matter
228 since this relocation type is not supported yet. */
229 #define COND32_F (1<<30)
230 #define COND32_M -(1<<30)
231 #define COND32_LENGTH 14
233 #define UNCOND12_F 4098
234 #define UNCOND12_M -4092
235 #define UNCOND12_LENGTH 2
237 /* ??? The minimum and maximum values are wrong, but this does not matter
238 since this relocation type is not supported yet. */
239 #define UNCOND32_F (1<<30)
240 #define UNCOND32_M -(1<<30)
241 #define UNCOND32_LENGTH 14
244 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
245 TRd" as is the current insn, so no extra length. Note that the "reach"
246 is calculated from the address *after* that insn, but the offset in the
247 insn is calculated from the beginning of the insn. We also need to
248 take into account the implicit 1 coded as the "A" in PTA when counting
249 forward. If PTB reaches an odd address, we trap that as an error
250 elsewhere, so we don't have to have different relaxation entries. We
251 don't add a one to the negative range, since PTB would then have the
252 farthest backward-reaching value skipped, not generated at relaxation. */
253 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
254 #define SH64PCREL16_M (-32768 * 4 - 4)
255 #define SH64PCREL16_LENGTH 0
257 /* The next step is to change that PT insn into
258 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
259 SHORI (label - datalabel Ln) & 65535, R25
262 which means two extra insns, 8 extra bytes. This is the limit for the
265 The expressions look a bit bad since we have to adjust this to avoid overflow on a
267 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
268 #define SH64PCREL32_LENGTH (2 * 4)
270 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
272 #if BFD_HOST_64BIT_LONG
273 /* The "reach" type is long, so we can only do this for a 64-bit-long
275 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
276 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
277 #define SH64PCREL48_M (((long) -1 << 47) - 4)
278 #define SH64PCREL48_LENGTH (3 * 4)
280 /* If the host does not have 64-bit longs, just make this state identical
281 in reach to the 32-bit state. Note that we have a slightly incorrect
282 reach, but the correct one above will overflow a 32-bit number. */
283 #define SH64PCREL32_M (((long) -1 << 30) * 2)
284 #define SH64PCREL48_F SH64PCREL32_F
285 #define SH64PCREL48_M SH64PCREL32_M
286 #define SH64PCREL48_LENGTH (3 * 4)
287 #endif /* BFD_HOST_64BIT_LONG */
289 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
291 #define SH64PCREL64_LENGTH (4 * 4)
293 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
294 SH64PCREL expansions. The PCREL one is similar, but the other has no
295 pc-relative reach; it must be fully expanded in
296 shmedia_md_estimate_size_before_relax. */
297 #define MOVI_16_LENGTH 0
298 #define MOVI_16_F (32767 - 4)
299 #define MOVI_16_M (-32768 - 4)
300 #define MOVI_32_LENGTH 4
301 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
302 #define MOVI_48_LENGTH 8
304 #if BFD_HOST_64BIT_LONG
305 /* The "reach" type is long, so we can only do this for a 64-bit-long
307 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
308 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
309 #define MOVI_48_M (((long) -1 << 47) - 4)
311 /* If the host does not have 64-bit longs, just make this state identical
312 in reach to the 32-bit state. Note that we have a slightly incorrect
313 reach, but the correct one above will overflow a 32-bit number. */
314 #define MOVI_32_M (((long) -1 << 30) * 2)
315 #define MOVI_48_F MOVI_32_F
316 #define MOVI_48_M MOVI_32_M
317 #endif /* BFD_HOST_64BIT_LONG */
319 #define MOVI_64_LENGTH 12
320 #endif /* HAVE_SH64 */
322 #define EMPTY { 0, 0, 0, 0 }
324 const relax_typeS md_relax_table
[C (END
, 0)] = {
325 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
326 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
329 /* C (COND_JUMP, COND8) */
330 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
331 /* C (COND_JUMP, COND12) */
332 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
333 /* C (COND_JUMP, COND32) */
334 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
335 /* C (COND_JUMP, UNDEF_WORD_DISP) */
336 { 0, 0, COND32_LENGTH
, 0, },
338 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
341 /* C (COND_JUMP_DELAY, COND8) */
342 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
343 /* C (COND_JUMP_DELAY, COND12) */
344 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
345 /* C (COND_JUMP_DELAY, COND32) */
346 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
347 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
348 { 0, 0, COND32_LENGTH
, 0, },
350 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
353 /* C (UNCOND_JUMP, UNCOND12) */
354 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
355 /* C (UNCOND_JUMP, UNCOND32) */
356 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
358 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
359 { 0, 0, UNCOND32_LENGTH
, 0, },
361 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
364 /* C (SH64PCREL16_32, SH64PCREL16) */
366 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
367 /* C (SH64PCREL16_32, SH64PCREL32) */
368 { 0, 0, SH64PCREL32_LENGTH
, 0 },
370 /* C (SH64PCREL16_32, SH64PCRELPLT) */
371 { 0, 0, SH64PCREL32_LENGTH
, 0 },
373 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
375 /* C (SH64PCREL16_64, SH64PCREL16) */
377 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
378 /* C (SH64PCREL16_64, SH64PCREL32) */
379 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
380 /* C (SH64PCREL16_64, SH64PCREL48) */
381 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
382 /* C (SH64PCREL16_64, SH64PCREL64) */
383 { 0, 0, SH64PCREL64_LENGTH
, 0 },
384 /* C (SH64PCREL16_64, SH64PCRELPLT) */
385 { 0, 0, SH64PCREL64_LENGTH
, 0 },
387 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
389 /* C (SH64PCREL16PT_32, SH64PCREL16) */
391 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
392 /* C (SH64PCREL16PT_32, SH64PCREL32) */
393 { 0, 0, SH64PCREL32_LENGTH
, 0 },
395 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
396 { 0, 0, SH64PCREL32_LENGTH
, 0 },
398 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
400 /* C (SH64PCREL16PT_64, SH64PCREL16) */
402 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
403 /* C (SH64PCREL16PT_64, SH64PCREL32) */
407 C (SH64PCREL16PT_64
, SH64PCREL48
) },
408 /* C (SH64PCREL16PT_64, SH64PCREL48) */
409 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
410 /* C (SH64PCREL16PT_64, SH64PCREL64) */
411 { 0, 0, SH64PCREL64_LENGTH
, 0 },
412 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
413 { 0, 0, SH64PCREL64_LENGTH
, 0},
415 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
417 /* C (MOVI_IMM_32, UNDEF_MOVI) */
418 { 0, 0, MOVI_32_LENGTH
, 0 },
419 /* C (MOVI_IMM_32, MOVI_16) */
420 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
421 /* C (MOVI_IMM_32, MOVI_32) */
422 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
424 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
425 { 0, 0, MOVI_32_LENGTH
, 0 },
426 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
428 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
430 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
431 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
432 { 0, 0, MOVI_32_LENGTH
, 0 },
434 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
435 { 0, 0, MOVI_32_LENGTH
, 0 },
437 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
438 { 0, 0, MOVI_32_LENGTH
, 0 },
439 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
441 /* C (MOVI_IMM_64, UNDEF_MOVI) */
442 { 0, 0, MOVI_64_LENGTH
, 0 },
443 /* C (MOVI_IMM_64, MOVI_16) */
444 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
445 /* C (MOVI_IMM_64, MOVI_32) */
446 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
447 /* C (MOVI_IMM_64, MOVI_48) */
448 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
449 /* C (MOVI_IMM_64, MOVI_64) */
450 { 0, 0, MOVI_64_LENGTH
, 0 },
452 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
453 { 0, 0, MOVI_64_LENGTH
, 0 },
454 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
456 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
458 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
459 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
460 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
461 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
462 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
463 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
464 { 0, 0, MOVI_64_LENGTH
, 0 },
465 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
466 { 0, 0, MOVI_64_LENGTH
, 0 },
468 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
469 { 0, 0, MOVI_64_LENGTH
, 0 },
470 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
472 #endif /* HAVE_SH64 */
478 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
482 /* Determinet whether the symbol needs any kind of PIC relocation. */
485 sh_PIC_related_p (symbolS
*sym
)
492 if (sym
== GOT_symbol
)
496 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
500 exp
= symbol_get_value_expression (sym
);
502 return (exp
->X_op
== O_PIC_reloc
503 || sh_PIC_related_p (exp
->X_add_symbol
)
504 || sh_PIC_related_p (exp
->X_op_symbol
));
507 /* Determine the relocation type to be used to represent the
508 expression, that may be rearranged. */
511 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
513 expressionS
*exp
= main_exp
;
515 /* This is here for backward-compatibility only. GCC used to generated:
517 f@PLT + . - (.LPCS# + 2)
519 but we'd rather be able to handle this as a PIC-related reference
520 plus/minus a symbol. However, gas' parser gives us:
522 O_subtract (O_add (f@PLT, .), .LPCS#+2)
524 so we attempt to transform this into:
526 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
528 which we can handle simply below. */
529 if (exp
->X_op
== O_subtract
)
531 if (sh_PIC_related_p (exp
->X_op_symbol
))
534 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
536 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
539 if (exp
&& exp
->X_op
== O_add
540 && sh_PIC_related_p (exp
->X_add_symbol
))
542 symbolS
*sym
= exp
->X_add_symbol
;
544 exp
->X_op
= O_subtract
;
545 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
547 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
548 main_exp
->X_add_symbol
= sym
;
550 main_exp
->X_add_number
+= exp
->X_add_number
;
551 exp
->X_add_number
= 0;
556 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
559 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
562 if (exp
->X_add_symbol
563 && (exp
->X_add_symbol
== GOT_symbol
565 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
569 case BFD_RELOC_SH_IMM_LOW16
:
570 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
573 case BFD_RELOC_SH_IMM_MEDLOW16
:
574 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
577 case BFD_RELOC_SH_IMM_MEDHI16
:
578 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
581 case BFD_RELOC_SH_IMM_HI16
:
582 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
586 case BFD_RELOC_UNUSED
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC
;
596 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
598 *r_type_p
= BFD_RELOC_SH_GOTPC
;
602 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
607 if (exp
->X_op
== O_PIC_reloc
)
613 case BFD_RELOC_UNUSED
:
614 *r_type_p
= exp
->X_md
;
617 case BFD_RELOC_SH_IMM_LOW16
:
620 case BFD_RELOC_32_GOTOFF
:
621 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
624 case BFD_RELOC_SH_GOTPLT32
:
625 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
628 case BFD_RELOC_32_GOT_PCREL
:
629 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
632 case BFD_RELOC_32_PLT_PCREL
:
633 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
641 case BFD_RELOC_SH_IMM_MEDLOW16
:
644 case BFD_RELOC_32_GOTOFF
:
645 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
648 case BFD_RELOC_SH_GOTPLT32
:
649 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
652 case BFD_RELOC_32_GOT_PCREL
:
653 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
656 case BFD_RELOC_32_PLT_PCREL
:
657 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
665 case BFD_RELOC_SH_IMM_MEDHI16
:
668 case BFD_RELOC_32_GOTOFF
:
669 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
672 case BFD_RELOC_SH_GOTPLT32
:
673 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
676 case BFD_RELOC_32_GOT_PCREL
:
677 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
680 case BFD_RELOC_32_PLT_PCREL
:
681 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
689 case BFD_RELOC_SH_IMM_HI16
:
692 case BFD_RELOC_32_GOTOFF
:
693 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
696 case BFD_RELOC_SH_GOTPLT32
:
697 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
700 case BFD_RELOC_32_GOT_PCREL
:
701 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
704 case BFD_RELOC_32_PLT_PCREL
:
705 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
717 *r_type_p
= exp
->X_md
;
720 exp
->X_op
= O_symbol
;
723 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
724 main_exp
->X_add_number
+= exp
->X_add_number
;
728 return (sh_PIC_related_p (exp
->X_add_symbol
)
729 || sh_PIC_related_p (exp
->X_op_symbol
));
734 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
737 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
739 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
741 if (sh_check_fixup (exp
, &r_type
))
742 as_bad (_("Invalid PIC expression."));
744 if (r_type
== BFD_RELOC_UNUSED
)
748 r_type
= BFD_RELOC_8
;
752 r_type
= BFD_RELOC_16
;
756 r_type
= BFD_RELOC_32
;
761 r_type
= BFD_RELOC_64
;
771 as_bad (_("unsupported BFD relocation size %u"), size
);
772 r_type
= BFD_RELOC_UNUSED
;
775 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
778 /* The regular cons() function, that reads constants, doesn't support
779 suffixes such as @GOT, @GOTOFF and @PLT, that generate
780 machine-specific relocation types. So we must define it here. */
781 /* Clobbers input_line_pointer, checks end-of-line. */
782 /* NBYTES 1=.byte, 2=.word, 4=.long */
784 sh_elf_cons (register int nbytes
)
790 /* Update existing range to include a previous insn, if there was one. */
791 sh64_update_contents_mark (TRUE
);
793 /* We need to make sure the contents type is set to data. */
796 #endif /* HAVE_SH64 */
798 if (is_it_end_of_statement ())
800 demand_empty_rest_of_line ();
805 md_cons_align (nbytes
);
811 emit_expr (&exp
, (unsigned int) nbytes
);
813 while (*input_line_pointer
++ == ',');
815 input_line_pointer
--; /* Put terminator back into stream. */
816 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
818 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
821 demand_empty_rest_of_line ();
826 /* This function is called once, at assembler startup time. This should
827 set up all the tables, etc that the MD part of the assembler needs. */
832 const sh_opcode_info
*opcode
;
833 char *prev_name
= "";
837 = preset_target_arch
? preset_target_arch
: arch_sh1_up
& ~arch_sh_dsp_up
;
838 valid_arch
= target_arch
;
844 opcode_hash_control
= hash_new ();
846 /* Insert unique names into hash table. */
847 for (opcode
= sh_table
; opcode
->name
; opcode
++)
849 if (strcmp (prev_name
, opcode
->name
) != 0)
851 if (! (opcode
->arch
& target_arch
))
853 prev_name
= opcode
->name
;
854 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
861 static int reg_x
, reg_y
;
865 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
867 /* Try to parse a reg name. Return the number of chars consumed. */
870 parse_reg (char *src
, int *mode
, int *reg
)
872 char l0
= TOLOWER (src
[0]);
873 char l1
= l0
? TOLOWER (src
[1]) : 0;
875 /* We use ! IDENT_CHAR for the next character after the register name, to
876 make sure that we won't accidentally recognize a symbol name such as
877 'sram' or sr_ram as being a reference to the register 'sr'. */
883 if (src
[2] >= '0' && src
[2] <= '5'
884 && ! IDENT_CHAR ((unsigned char) src
[3]))
887 *reg
= 10 + src
[2] - '0';
891 if (l1
>= '0' && l1
<= '9'
892 && ! IDENT_CHAR ((unsigned char) src
[2]))
898 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
899 && ! IDENT_CHAR ((unsigned char) src
[7]))
906 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
911 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
922 if (! IDENT_CHAR ((unsigned char) src
[2]))
928 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
937 if (! IDENT_CHAR ((unsigned char) src
[2]))
943 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
951 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
952 && ! IDENT_CHAR ((unsigned char) src
[3]))
955 *reg
= 4 + (l1
- '0');
958 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
959 && ! IDENT_CHAR ((unsigned char) src
[3]))
962 *reg
= 6 + (l1
- '0');
965 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
966 && ! IDENT_CHAR ((unsigned char) src
[3]))
971 *reg
= n
| ((~n
& 2) << 1);
976 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
998 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
999 && ! IDENT_CHAR ((unsigned char) src
[2]))
1002 *reg
= A_X0_NUM
+ l1
- '0';
1006 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1007 && ! IDENT_CHAR ((unsigned char) src
[2]))
1010 *reg
= A_Y0_NUM
+ l1
- '0';
1014 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1015 && ! IDENT_CHAR ((unsigned char) src
[2]))
1018 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1024 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1030 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1031 && ! IDENT_CHAR ((unsigned char) src
[3]))
1037 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1038 && ! IDENT_CHAR ((unsigned char) src
[3]))
1044 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1045 && ! IDENT_CHAR ((unsigned char) src
[3]))
1051 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1052 && ! IDENT_CHAR ((unsigned char) src
[3]))
1058 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1064 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1071 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1076 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1078 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1079 and use an uninitialized immediate. */
1083 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1084 && ! IDENT_CHAR ((unsigned char) src
[3]))
1089 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1090 && ! IDENT_CHAR ((unsigned char) src
[3]))
1096 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1097 && ! IDENT_CHAR ((unsigned char) src
[4]))
1099 if (TOLOWER (src
[3]) == 'l')
1104 if (TOLOWER (src
[3]) == 'h')
1110 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1111 && ! IDENT_CHAR ((unsigned char) src
[3]))
1116 if (l0
== 'f' && l1
== 'r')
1120 if (src
[3] >= '0' && src
[3] <= '5'
1121 && ! IDENT_CHAR ((unsigned char) src
[4]))
1124 *reg
= 10 + src
[3] - '0';
1128 if (src
[2] >= '0' && src
[2] <= '9'
1129 && ! IDENT_CHAR ((unsigned char) src
[3]))
1132 *reg
= (src
[2] - '0');
1136 if (l0
== 'd' && l1
== 'r')
1140 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1141 && ! IDENT_CHAR ((unsigned char) src
[4]))
1144 *reg
= 10 + src
[3] - '0';
1148 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1149 && ! IDENT_CHAR ((unsigned char) src
[3]))
1152 *reg
= (src
[2] - '0');
1156 if (l0
== 'x' && l1
== 'd')
1160 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1161 && ! IDENT_CHAR ((unsigned char) src
[4]))
1164 *reg
= 11 + src
[3] - '0';
1168 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1169 && ! IDENT_CHAR ((unsigned char) src
[3]))
1172 *reg
= (src
[2] - '0') + 1;
1176 if (l0
== 'f' && l1
== 'v')
1178 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1184 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1185 && ! IDENT_CHAR ((unsigned char) src
[3]))
1188 *reg
= (src
[2] - '0');
1192 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1193 && TOLOWER (src
[3]) == 'l'
1194 && ! IDENT_CHAR ((unsigned char) src
[4]))
1200 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1201 && TOLOWER (src
[3]) == 'c'
1202 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1208 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1209 && TOLOWER (src
[3]) == 'r'
1210 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1220 parse_exp (char *s
, sh_operand_info
*op
)
1225 save
= input_line_pointer
;
1226 input_line_pointer
= s
;
1227 expression (&op
->immediate
);
1228 if (op
->immediate
.X_op
== O_absent
)
1229 as_bad (_("missing operand"));
1231 else if (op
->immediate
.X_op
== O_PIC_reloc
1232 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1233 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1234 as_bad (_("misplaced PIC operand"));
1236 new = input_line_pointer
;
1237 input_line_pointer
= save
;
1241 /* The many forms of operand:
1244 @Rn Register indirect
1257 pr, gbr, vbr, macl, mach
1261 parse_at (char *src
, sh_operand_info
*op
)
1268 /* Must be predecrement. */
1271 len
= parse_reg (src
, &mode
, &(op
->reg
));
1272 if (mode
!= A_REG_N
)
1273 as_bad (_("illegal register after @-"));
1278 else if (src
[0] == '(')
1280 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1283 len
= parse_reg (src
, &mode
, &(op
->reg
));
1284 if (len
&& mode
== A_REG_N
)
1289 as_bad (_("must be @(r0,...)"));
1294 /* Now can be rn or gbr. */
1295 len
= parse_reg (src
, &mode
, &(op
->reg
));
1305 op
->type
= A_R0_GBR
;
1307 else if (mode
== A_REG_N
)
1309 op
->type
= A_IND_R0_REG_N
;
1313 as_bad (_("syntax error in @(r0,...)"));
1318 as_bad (_("syntax error in @(r0...)"));
1323 /* Must be an @(disp,.. thing). */
1324 src
= parse_exp (src
, op
);
1327 /* Now can be rn, gbr or pc. */
1328 len
= parse_reg (src
, &mode
, &op
->reg
);
1331 if (mode
== A_REG_N
)
1333 op
->type
= A_DISP_REG_N
;
1335 else if (mode
== A_GBR
)
1337 op
->type
= A_DISP_GBR
;
1339 else if (mode
== A_PC
)
1341 /* We want @(expr, pc) to uniformly address . + expr,
1342 no matter if expr is a constant, or a more complex
1343 expression, e.g. sym-. or sym1-sym2.
1344 However, we also used to accept @(sym,pc)
1345 as addressing sym, i.e. meaning the same as plain sym.
1346 Some existing code does use the @(sym,pc) syntax, so
1347 we give it the old semantics for now, but warn about
1348 its use, so that users have some time to fix their code.
1350 Note that due to this backward compatibility hack,
1351 we'll get unexpected results when @(offset, pc) is used,
1352 and offset is a symbol that is set later to an an address
1353 difference, or an external symbol that is set to an
1354 address difference in another source file, so we want to
1355 eventually remove it. */
1356 if (op
->immediate
.X_op
== O_symbol
)
1358 op
->type
= A_DISP_PC
;
1359 as_warn (_("Deprecated syntax."));
1363 op
->type
= A_DISP_PC_ABS
;
1364 /* Such operands don't get corrected for PC==.+4, so
1365 make the correction here. */
1366 op
->immediate
.X_add_number
-= 4;
1371 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1376 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1381 as_bad (_("expecting )"));
1387 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1388 if (mode
!= A_REG_N
)
1389 as_bad (_("illegal register after @"));
1396 l0
= TOLOWER (src
[0]);
1397 l1
= TOLOWER (src
[1]);
1399 if ((l0
== 'r' && l1
== '8')
1400 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1403 op
->type
= A_PMOD_N
;
1405 else if ( (l0
== 'r' && l1
== '9')
1406 || (l0
== 'i' && l1
== 'y'))
1409 op
->type
= A_PMODY_N
;
1421 get_operand (char **ptr
, sh_operand_info
*op
)
1430 *ptr
= parse_exp (src
, op
);
1435 else if (src
[0] == '@')
1437 *ptr
= parse_at (src
, op
);
1440 len
= parse_reg (src
, &mode
, &(op
->reg
));
1449 /* Not a reg, the only thing left is a displacement. */
1450 *ptr
= parse_exp (src
, op
);
1451 op
->type
= A_DISP_PC
;
1457 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1462 /* The pre-processor will eliminate whitespace in front of '@'
1463 after the first argument; we may be called multiple times
1464 from assemble_ppi, so don't insist on finding whitespace here. */
1468 get_operand (&ptr
, operand
+ 0);
1475 get_operand (&ptr
, operand
+ 1);
1476 /* ??? Hack: psha/pshl have a varying operand number depending on
1477 the type of the first operand. We handle this by having the
1478 three-operand version first and reducing the number of operands
1479 parsed to two if we see that the first operand is an immediate.
1480 This works because no insn with three operands has an immediate
1481 as first operand. */
1482 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1488 get_operand (&ptr
, operand
+ 2);
1492 operand
[2].type
= 0;
1497 operand
[1].type
= 0;
1498 operand
[2].type
= 0;
1503 operand
[0].type
= 0;
1504 operand
[1].type
= 0;
1505 operand
[2].type
= 0;
1510 /* Passed a pointer to a list of opcodes which use different
1511 addressing modes, return the opcode which matches the opcodes
1514 static sh_opcode_info
*
1515 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1517 sh_opcode_info
*this_try
= opcode
;
1518 char *name
= opcode
->name
;
1521 while (opcode
->name
)
1523 this_try
= opcode
++;
1524 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1526 /* We've looked so far down the table that we've run out of
1527 opcodes with the same name. */
1531 /* Look at both operands needed by the opcodes and provided by
1532 the user - since an arg test will often fail on the same arg
1533 again and again, we'll try and test the last failing arg the
1534 first on each opcode try. */
1535 for (n
= 0; this_try
->arg
[n
]; n
++)
1537 sh_operand_info
*user
= operands
+ n
;
1538 sh_arg_type arg
= this_try
->arg
[n
];
1543 if (user
->type
== A_DISP_PC_ABS
)
1553 if (user
->type
!= arg
)
1557 /* opcode needs r0 */
1558 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1562 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1566 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1574 case A_IND_R0_REG_N
:
1585 /* Opcode needs rn */
1586 if (user
->type
!= arg
)
1591 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1606 if (user
->type
!= arg
)
1611 if (user
->type
!= arg
)
1620 case A_IND_R0_REG_M
:
1623 /* Opcode needs rn */
1624 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1630 if (user
->type
!= DSP_REG_N
)
1652 if (user
->type
!= DSP_REG_N
)
1674 if (user
->type
!= DSP_REG_N
)
1696 if (user
->type
!= DSP_REG_N
)
1718 if (user
->type
!= DSP_REG_N
)
1740 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1744 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1748 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1752 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1756 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1766 /* Opcode needs rn */
1767 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1772 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1777 if (user
->type
!= XMTRX_M4
)
1783 printf (_("unhandled %d\n"), arg
);
1787 if ( !(valid_arch
& this_try
->arch
))
1789 valid_arch
&= this_try
->arch
;
1799 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
1801 fix_new_exp (frag_now
,
1802 where
- frag_now
->fr_literal
,
1810 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
1812 int high_byte
= target_big_endian
? 0 : 1;
1815 if (opcode
->arg
[0] == A_BDISP8
)
1817 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1818 p
= frag_var (rs_machine_dependent
,
1819 md_relax_table
[C (what
, COND32
)].rlx_length
,
1820 md_relax_table
[C (what
, COND8
)].rlx_length
,
1822 op
->immediate
.X_add_symbol
,
1823 op
->immediate
.X_add_number
,
1825 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1827 else if (opcode
->arg
[0] == A_BDISP12
)
1829 p
= frag_var (rs_machine_dependent
,
1830 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1831 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1833 op
->immediate
.X_add_symbol
,
1834 op
->immediate
.X_add_number
,
1836 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1841 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1844 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
1849 /* Since the low byte of the opcode will be overwritten by the reloc, we
1850 can just stash the high byte into both bytes and ignore endianness. */
1853 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1854 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1858 static int count
= 0;
1860 /* If the last loop insn is a two-byte-insn, it is in danger of being
1861 swapped with the insn after it. To prevent this, create a new
1862 symbol - complete with SH_LABEL reloc - after the last loop insn.
1863 If the last loop insn is four bytes long, the symbol will be
1864 right in the middle, but four byte insns are not swapped anyways. */
1865 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1866 Hence a 9 digit number should be enough to count all REPEATs. */
1868 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1869 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1870 /* Make this a local symbol. */
1872 SF_SET_LOCAL (end_sym
);
1873 #endif /* OBJ_COFF */
1874 symbol_table_insert (end_sym
);
1875 end_sym
->sy_value
= operand
[1].immediate
;
1876 end_sym
->sy_value
.X_add_number
+= 2;
1877 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1880 output
= frag_more (2);
1883 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1884 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1886 return frag_more (2);
1889 /* Now we know what sort of opcodes it is, let's build the bytes. */
1892 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
1896 char *output
= frag_more (2);
1897 unsigned int size
= 2;
1898 int low_byte
= target_big_endian
? 1 : 0;
1904 for (index
= 0; index
< 4; index
++)
1906 sh_nibble_type i
= opcode
->nibbles
[index
];
1916 nbuf
[index
] = reg_n
;
1919 nbuf
[index
] = reg_m
;
1922 if (reg_n
< 2 || reg_n
> 5)
1923 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1924 nbuf
[index
] = (reg_n
& 3) | 4;
1927 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1930 nbuf
[index
] = reg_b
| 0x08;
1933 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1936 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1939 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1942 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1945 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1948 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1951 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1954 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1957 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1960 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1963 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1966 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1969 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
1970 operand
->type
!= A_DISP_PC_ABS
, operand
);
1973 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
1974 operand
->type
!= A_DISP_PC_ABS
, operand
);
1977 output
= insert_loop_bounds (output
, operand
);
1978 nbuf
[index
] = opcode
->nibbles
[3];
1982 printf (_("failed for %d\n"), i
);
1986 if (!target_big_endian
)
1988 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1989 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1993 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1994 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1999 /* Find an opcode at the start of *STR_P in the hash table, and set
2000 *STR_P to the first character after the last one read. */
2002 static sh_opcode_info
*
2003 find_cooked_opcode (char **str_p
)
2006 unsigned char *op_start
;
2007 unsigned char *op_end
;
2011 /* Drop leading whitespace. */
2015 /* Find the op code end.
2016 The pre-processor will eliminate whitespace in front of
2017 any '@' after the first argument; we may be called from
2018 assemble_ppi, so the opcode might be terminated by an '@'. */
2019 for (op_start
= op_end
= (unsigned char *) (str
);
2022 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2025 unsigned char c
= op_start
[nlen
];
2027 /* The machine independent code will convert CMP/EQ into cmp/EQ
2028 because it thinks the '/' is the end of the symbol. Moreover,
2029 all but the first sub-insn is a parallel processing insn won't
2030 be capitalized. Instead of hacking up the machine independent
2031 code, we just deal with it here. */
2041 as_bad (_("can't find opcode "));
2043 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2046 /* Assemble a parallel processing insn. */
2047 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2050 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2062 sh_operand_info operand
[3];
2064 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2065 Make sure we encode a defined insn pattern. */
2070 if (opcode
->arg
[0] != A_END
)
2071 op_end
= get_operands (opcode
, op_end
, operand
);
2072 opcode
= get_specific (opcode
, operand
);
2075 /* Couldn't find an opcode which matched the operands. */
2076 char *where
= frag_more (2);
2081 as_bad (_("invalid operands for opcode"));
2085 if (opcode
->nibbles
[0] != PPI
)
2086 as_bad (_("insn can't be combined with parallel processing insn"));
2088 switch (opcode
->nibbles
[1])
2093 as_bad (_("multiple movx specifications"));
2098 as_bad (_("multiple movy specifications"));
2104 as_bad (_("multiple movx specifications"));
2105 if (reg_n
< 4 || reg_n
> 5)
2106 as_bad (_("invalid movx address register"));
2107 if (opcode
->nibbles
[2] & 8)
2109 if (reg_m
== A_A1_NUM
)
2111 else if (reg_m
!= A_A0_NUM
)
2112 as_bad (_("invalid movx dsp register"));
2117 as_bad (_("invalid movx dsp register"));
2120 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2125 as_bad (_("multiple movy specifications"));
2126 if (opcode
->nibbles
[2] & 8)
2128 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2131 if (reg_m
== A_A1_NUM
)
2133 else if (reg_m
!= A_A0_NUM
)
2134 as_bad (_("invalid movy dsp register"));
2139 as_bad (_("invalid movy dsp register"));
2142 if (reg_n
< 6 || reg_n
> 7)
2143 as_bad (_("invalid movy address register"));
2144 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2148 if (operand
[0].immediate
.X_op
!= O_constant
)
2149 as_bad (_("dsp immediate shift value not constant"));
2150 field_b
= ((opcode
->nibbles
[2] << 12)
2151 | (operand
[0].immediate
.X_add_number
& 127) << 4
2156 as_bad (_("multiple parallel processing specifications"));
2157 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2158 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2162 as_bad (_("multiple condition specifications"));
2163 cond
= opcode
->nibbles
[2] << 8;
2165 goto skip_cond_check
;
2169 as_bad (_("multiple parallel processing specifications"));
2170 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2171 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2177 if ((field_b
& 0xef00) != 0xa100)
2178 as_bad (_("insn cannot be combined with pmuls"));
2180 switch (field_b
& 0xf)
2183 field_b
+= 0 - A_X0_NUM
;
2186 field_b
+= 1 - A_Y0_NUM
;
2189 field_b
+= 2 - A_A0_NUM
;
2192 field_b
+= 3 - A_A1_NUM
;
2195 as_bad (_("bad padd / psub pmuls output operand"));
2197 /* Generate warning if the destination register for padd / psub
2198 and pmuls is the same ( only for A0 or A1 ).
2199 If the last nibble is 1010 then A0 is used in both
2200 padd / psub and pmuls. If it is 1111 then A1 is used
2201 as destination register in both padd / psub and pmuls. */
2203 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2204 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2205 as_warn (_("destination register is same for parallel insns"));
2207 field_b
+= 0x4000 + reg_efg
;
2214 as_bad (_("condition not followed by conditionalizable insn"));
2220 opcode
= find_cooked_opcode (&op_end
);
2224 (_("unrecognized characters at end of parallel processing insn")));
2229 move_code
= movx
| movy
;
2232 /* Parallel processing insn. */
2233 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2235 output
= frag_more (4);
2237 if (! target_big_endian
)
2239 output
[3] = ppi_code
>> 8;
2240 output
[2] = ppi_code
;
2244 output
[2] = ppi_code
>> 8;
2245 output
[3] = ppi_code
;
2247 move_code
|= 0xf800;
2251 /* Just a double data transfer. */
2252 output
= frag_more (2);
2255 if (! target_big_endian
)
2257 output
[1] = move_code
>> 8;
2258 output
[0] = move_code
;
2262 output
[0] = move_code
>> 8;
2263 output
[1] = move_code
;
2268 /* This is the guts of the machine-dependent assembler. STR points to a
2269 machine dependent instruction. This function is supposed to emit
2270 the frags/bytes it assembles to. */
2273 md_assemble (char *str
)
2275 unsigned char *op_end
;
2276 sh_operand_info operand
[3];
2277 sh_opcode_info
*opcode
;
2278 unsigned int size
= 0;
2281 if (sh64_isa_mode
== sh64_isa_shmedia
)
2283 shmedia_md_assemble (str
);
2288 /* If we've seen pseudo-directives, make sure any emitted data or
2289 frags are marked as data. */
2292 sh64_update_contents_mark (TRUE
);
2293 sh64_set_contents_type (CRT_SH5_ISA16
);
2298 #endif /* HAVE_SH64 */
2300 opcode
= find_cooked_opcode (&str
);
2305 as_bad (_("unknown opcode"));
2310 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2312 /* Output a CODE reloc to tell the linker that the following
2313 bytes are instructions, not data. */
2314 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2316 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2319 if (opcode
->nibbles
[0] == PPI
)
2321 size
= assemble_ppi (op_end
, opcode
);
2325 if (opcode
->arg
[0] == A_BDISP12
2326 || opcode
->arg
[0] == A_BDISP8
)
2328 /* Since we skip get_specific here, we have to check & update
2330 if (valid_arch
& opcode
->arch
)
2331 valid_arch
&= opcode
->arch
;
2333 as_bad (_("Delayed branches not available on SH1"));
2334 parse_exp (op_end
+ 1, &operand
[0]);
2335 build_relax (opcode
, &operand
[0]);
2339 if (opcode
->arg
[0] == A_END
)
2341 /* Ignore trailing whitespace. If there is any, it has already
2342 been compressed to a single space. */
2348 op_end
= get_operands (opcode
, op_end
, operand
);
2350 opcode
= get_specific (opcode
, operand
);
2354 /* Couldn't find an opcode which matched the operands. */
2355 char *where
= frag_more (2);
2360 as_bad (_("invalid operands for opcode"));
2365 as_bad (_("excess operands: '%s'"), op_end
);
2367 size
= build_Mytes (opcode
, operand
);
2372 #ifdef BFD_ASSEMBLER
2373 dwarf2_emit_insn (size
);
2377 /* This routine is called each time a label definition is seen. It
2378 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2381 sh_frob_label (void)
2383 static fragS
*last_label_frag
;
2384 static int last_label_offset
;
2387 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2391 offset
= frag_now_fix ();
2392 if (frag_now
!= last_label_frag
2393 || offset
!= last_label_offset
)
2395 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2396 last_label_frag
= frag_now
;
2397 last_label_offset
= offset
;
2402 /* This routine is called when the assembler is about to output some
2403 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2406 sh_flush_pending_output (void)
2409 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2411 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2413 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2418 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2424 #ifndef BFD_ASSEMBLER
2427 tc_crawl_symbol_chain (object_headers
*headers ATTRIBUTE_UNUSED
)
2429 printf (_("call to tc_crawl_symbol_chain \n"));
2433 tc_headers_hook (object_headers
*headers ATTRIBUTE_UNUSED
)
2435 printf (_("call to tc_headers_hook \n"));
2441 /* Various routines to kill one day. */
2442 /* Equal to MAX_PRECISION in atof-ieee.c. */
2443 #define MAX_LITTLENUMS 6
2445 /* Turn a string in input_line_pointer into a floating point constant
2446 of type TYPE, and store the appropriate bytes in *LITP. The number
2447 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2448 returned, or NULL on OK. */
2451 md_atof (int type
, char *litP
, int *sizeP
)
2454 LITTLENUM_TYPE words
[4];
2470 return _("bad call to md_atof");
2473 t
= atof_ieee (input_line_pointer
, type
, words
);
2475 input_line_pointer
= t
;
2479 if (! target_big_endian
)
2481 for (i
= prec
- 1; i
>= 0; i
--)
2483 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2489 for (i
= 0; i
< prec
; i
++)
2491 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2499 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2500 call instruction. It refers to a label of the instruction which
2501 loads the register which the call uses. We use it to generate a
2502 special reloc for the linker. */
2505 s_uses (int ignore ATTRIBUTE_UNUSED
)
2510 as_warn (_(".uses pseudo-op seen when not relaxing"));
2514 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2516 as_bad (_("bad .uses format"));
2517 ignore_rest_of_line ();
2521 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2523 demand_empty_rest_of_line ();
2526 const char *md_shortopts
= "";
2527 struct option md_longopts
[] =
2529 #define OPTION_RELAX (OPTION_MD_BASE)
2530 #define OPTION_BIG (OPTION_MD_BASE + 1)
2531 #define OPTION_LITTLE (OPTION_BIG + 1)
2532 #define OPTION_SMALL (OPTION_LITTLE + 1)
2533 #define OPTION_DSP (OPTION_SMALL + 1)
2534 #define OPTION_ISA (OPTION_DSP + 1)
2536 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2537 {"big", no_argument
, NULL
, OPTION_BIG
},
2538 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2539 {"small", no_argument
, NULL
, OPTION_SMALL
},
2540 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2541 {"isa", required_argument
, NULL
, OPTION_ISA
},
2543 #define OPTION_ABI (OPTION_ISA + 1)
2544 #define OPTION_NO_MIX (OPTION_ABI + 1)
2545 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
2546 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
2547 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
2548 {"abi", required_argument
, NULL
, OPTION_ABI
},
2549 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
2550 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
2551 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
2552 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
2553 #endif /* HAVE_SH64 */
2555 {NULL
, no_argument
, NULL
, 0}
2557 size_t md_longopts_size
= sizeof (md_longopts
);
2560 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
2569 target_big_endian
= 1;
2573 target_big_endian
= 0;
2581 preset_target_arch
= arch_sh1_up
& ~arch_sh3e_up
;
2585 if (strcasecmp (arg
, "sh4") == 0)
2586 preset_target_arch
= arch_sh4
;
2587 else if (strcasecmp (arg
, "any") == 0)
2588 preset_target_arch
= arch_sh1_up
;
2590 else if (strcasecmp (arg
, "shmedia") == 0)
2592 if (sh64_isa_mode
== sh64_isa_shcompact
)
2593 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
2594 sh64_isa_mode
= sh64_isa_shmedia
;
2596 else if (strcasecmp (arg
, "shcompact") == 0)
2598 if (sh64_isa_mode
== sh64_isa_shmedia
)
2599 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
2600 if (sh64_abi
== sh64_abi_64
)
2601 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
2602 sh64_isa_mode
= sh64_isa_shcompact
;
2604 #endif /* HAVE_SH64 */
2606 as_bad ("Invalid argument to --isa option: %s", arg
);
2611 if (strcmp (arg
, "32") == 0)
2613 if (sh64_abi
== sh64_abi_64
)
2614 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
2615 sh64_abi
= sh64_abi_32
;
2617 else if (strcmp (arg
, "64") == 0)
2619 if (sh64_abi
== sh64_abi_32
)
2620 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
2621 if (sh64_isa_mode
== sh64_isa_shcompact
)
2622 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
2623 sh64_abi
= sh64_abi_64
;
2626 as_bad ("Invalid argument to --abi option: %s", arg
);
2633 case OPTION_SHCOMPACT_CONST_CRANGE
:
2634 sh64_shcompact_const_crange
= TRUE
;
2637 case OPTION_NO_EXPAND
:
2638 sh64_expand
= FALSE
;
2644 #endif /* HAVE_SH64 */
2654 md_show_usage (FILE *stream
)
2656 fprintf (stream
, _("\
2658 -little generate little endian code\n\
2659 -big generate big endian code\n\
2660 -relax alter jump instructions for long displacements\n\
2661 -small align sections to 4 byte boundaries, not 16\n\
2662 -dsp enable sh-dsp insns, and disable sh2e/sh3e/sh4 insns.\n"));
2664 fprintf (stream
, _("\
2665 -isa=[shmedia set default instruction set for SH64\n\
2669 -abi=[32|64] set size of expanded SHmedia operands and object\n\
2671 -shcompact-const-crange emit code-range descriptors for constants in\n\
2672 SHcompact code sections\n\
2673 -no-mix disallow SHmedia code in the same section as\n\
2674 constants and SHcompact code\n\
2675 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
2676 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
2678 #endif /* HAVE_SH64 */
2681 /* This struct is used to pass arguments to sh_count_relocs through
2682 bfd_map_over_sections. */
2684 struct sh_count_relocs
2686 /* Symbol we are looking for. */
2688 /* Count of relocs found. */
2692 /* Count the number of fixups in a section which refer to a particular
2693 symbol. When using BFD_ASSEMBLER, this is called via
2694 bfd_map_over_sections. */
2697 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
2699 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2700 segment_info_type
*seginfo
;
2704 seginfo
= seg_info (sec
);
2705 if (seginfo
== NULL
)
2709 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2711 if (fix
->fx_addsy
== sym
)
2719 /* Handle the count relocs for a particular section. When using
2720 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2723 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
2724 void *ignore ATTRIBUTE_UNUSED
)
2726 segment_info_type
*seginfo
;
2729 seginfo
= seg_info (sec
);
2730 if (seginfo
== NULL
)
2733 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2738 struct sh_count_relocs info
;
2740 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2743 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2744 symbol in the same section. */
2745 sym
= fix
->fx_addsy
;
2747 || fix
->fx_subsy
!= NULL
2748 || fix
->fx_addnumber
!= 0
2749 || S_GET_SEGMENT (sym
) != sec
2750 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2751 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2753 || S_IS_EXTERNAL (sym
))
2755 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2756 _(".uses does not refer to a local symbol in the same section"));
2760 /* Look through the fixups again, this time looking for one
2761 at the same location as sym. */
2762 val
= S_GET_VALUE (sym
);
2763 for (fscan
= seginfo
->fix_root
;
2765 fscan
= fscan
->fx_next
)
2766 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2767 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2768 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2769 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2770 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2774 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2775 _("can't find fixup pointed to by .uses"));
2779 if (fscan
->fx_tcbit
)
2781 /* We've already done this one. */
2785 /* The variable fscan should also be a fixup to a local symbol
2786 in the same section. */
2787 sym
= fscan
->fx_addsy
;
2789 || fscan
->fx_subsy
!= NULL
2790 || fscan
->fx_addnumber
!= 0
2791 || S_GET_SEGMENT (sym
) != sec
2792 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2793 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2795 || S_IS_EXTERNAL (sym
))
2797 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2798 _(".uses target does not refer to a local symbol in the same section"));
2802 /* Now we look through all the fixups of all the sections,
2803 counting the number of times we find a reference to sym. */
2806 #ifdef BFD_ASSEMBLER
2807 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
2812 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2813 sh_count_relocs ((bfd
*) NULL
, iscan
, &info
);
2820 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2821 We have already adjusted the value of sym to include the
2822 fragment address, so we undo that adjustment here. */
2823 subseg_change (sec
, 0);
2824 fix_new (fscan
->fx_frag
,
2825 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
2826 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2830 /* This function is called after the symbol table has been completed,
2831 but before the relocs or section contents have been written out.
2832 If we have seen any .uses pseudo-ops, they point to an instruction
2833 which loads a register with the address of a function. We look
2834 through the fixups to find where the function address is being
2835 loaded from. We then generate a COUNT reloc giving the number of
2836 times that function address is referred to. The linker uses this
2837 information when doing relaxing, to decide when it can eliminate
2838 the stored function address entirely. */
2844 shmedia_frob_file_before_adjust ();
2850 #ifdef BFD_ASSEMBLER
2851 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
2856 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2857 sh_frob_section ((bfd
*) NULL
, iseg
, NULL
);
2862 /* Called after relaxing. Set the correct sizes of the fragments, and
2863 create relocs so that md_apply_fix3 will fill in the correct values. */
2866 #ifdef BFD_ASSEMBLER
2867 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
2869 md_convert_frag (object_headers
*headers ATTRIBUTE_UNUSED
, segT seg
,
2875 switch (fragP
->fr_subtype
)
2877 case C (COND_JUMP
, COND8
):
2878 case C (COND_JUMP_DELAY
, COND8
):
2879 subseg_change (seg
, 0);
2880 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2881 1, BFD_RELOC_SH_PCDISP8BY2
);
2886 case C (UNCOND_JUMP
, UNCOND12
):
2887 subseg_change (seg
, 0);
2888 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2889 1, BFD_RELOC_SH_PCDISP12BY2
);
2894 case C (UNCOND_JUMP
, UNCOND32
):
2895 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2896 if (fragP
->fr_symbol
== NULL
)
2897 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2898 _("displacement overflows 12-bit field"));
2899 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2900 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2901 _("displacement to defined symbol %s overflows 12-bit field"),
2902 S_GET_NAME (fragP
->fr_symbol
));
2904 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2905 _("displacement to undefined symbol %s overflows 12-bit field"),
2906 S_GET_NAME (fragP
->fr_symbol
));
2907 /* Stabilize this frag, so we don't trip an assert. */
2908 fragP
->fr_fix
+= fragP
->fr_var
;
2912 case C (COND_JUMP
, COND12
):
2913 case C (COND_JUMP_DELAY
, COND12
):
2914 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2915 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2916 was due to gas incorrectly relaxing an out-of-range conditional
2917 branch with delay slot. It turned:
2918 bf.s L6 (slot mov.l r12,@(44,r0))
2921 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2923 32: 10 cb mov.l r12,@(44,r0)
2924 Therefore, branches with delay slots have to be handled
2925 differently from ones without delay slots. */
2927 unsigned char *buffer
=
2928 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2929 int highbyte
= target_big_endian
? 0 : 1;
2930 int lowbyte
= target_big_endian
? 1 : 0;
2931 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2933 /* Toggle the true/false bit of the bcond. */
2934 buffer
[highbyte
] ^= 0x2;
2936 /* If this is a delayed branch, we may not put the bra in the
2937 slot. So we change it to a non-delayed branch, like that:
2938 b! cond slot_label; bra disp; slot_label: slot_insn
2939 ??? We should try if swapping the conditional branch and
2940 its delay-slot insn already makes the branch reach. */
2942 /* Build a relocation to six / four bytes farther on. */
2943 subseg_change (seg
, 0);
2944 fix_new (fragP
, fragP
->fr_fix
, 2,
2945 #ifdef BFD_ASSEMBLER
2946 section_symbol (seg
),
2948 seg_info (seg
)->dot
,
2950 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2951 1, BFD_RELOC_SH_PCDISP8BY2
);
2953 /* Set up a jump instruction. */
2954 buffer
[highbyte
+ 2] = 0xa0;
2955 buffer
[lowbyte
+ 2] = 0;
2956 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2957 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2961 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2966 /* Fill in a NOP instruction. */
2967 buffer
[highbyte
+ 4] = 0x0;
2968 buffer
[lowbyte
+ 4] = 0x9;
2977 case C (COND_JUMP
, COND32
):
2978 case C (COND_JUMP_DELAY
, COND32
):
2979 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2980 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2981 if (fragP
->fr_symbol
== NULL
)
2982 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2983 _("displacement overflows 8-bit field"));
2984 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2985 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2986 _("displacement to defined symbol %s overflows 8-bit field"),
2987 S_GET_NAME (fragP
->fr_symbol
));
2989 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2990 _("displacement to undefined symbol %s overflows 8-bit field "),
2991 S_GET_NAME (fragP
->fr_symbol
));
2992 /* Stabilize this frag, so we don't trip an assert. */
2993 fragP
->fr_fix
+= fragP
->fr_var
;
2999 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3005 if (donerelax
&& !sh_relax
)
3006 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3007 _("overflow in branch to %s; converted into longer instruction sequence"),
3008 (fragP
->fr_symbol
!= NULL
3009 ? S_GET_NAME (fragP
->fr_symbol
)
3014 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3016 #ifdef BFD_ASSEMBLER
3019 #else /* ! OBJ_ELF */
3020 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3021 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3022 #endif /* ! OBJ_ELF */
3023 #else /* ! BFD_ASSEMBLER */
3024 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
3025 & (-1 << section_alignment
[(int) seg
]));
3026 #endif /* ! BFD_ASSEMBLER */
3029 /* This static variable is set by s_uacons to tell sh_cons_align that
3030 the expression does not need to be aligned. */
3032 static int sh_no_align_cons
= 0;
3034 /* This handles the unaligned space allocation pseudo-ops, such as
3035 .uaword. .uaword is just like .word, but the value does not need
3039 s_uacons (int bytes
)
3041 /* Tell sh_cons_align not to align this value. */
3042 sh_no_align_cons
= 1;
3046 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3047 aligned correctly. Note that this can cause warnings to be issued
3048 when assembling initialized structured which were declared with the
3049 packed attribute. FIXME: Perhaps we should require an option to
3050 enable this warning? */
3053 sh_cons_align (int nbytes
)
3058 if (sh_no_align_cons
)
3060 /* This is an unaligned pseudo-op. */
3061 sh_no_align_cons
= 0;
3066 while ((nbytes
& 1) == 0)
3075 if (now_seg
== absolute_section
)
3077 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3078 as_warn (_("misaligned data"));
3082 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3083 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3085 record_alignment (now_seg
, nalign
);
3088 /* When relaxing, we need to output a reloc for any .align directive
3089 that requests alignment to a four byte boundary or larger. This is
3090 also where we check for misaligned data. */
3093 sh_handle_align (fragS
*frag
)
3095 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3097 if (frag
->fr_type
== rs_align_code
)
3099 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3100 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3102 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3111 if (target_big_endian
)
3113 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3114 frag
->fr_var
= sizeof big_nop_pattern
;
3118 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3119 frag
->fr_var
= sizeof little_nop_pattern
;
3122 else if (frag
->fr_type
== rs_align_test
)
3125 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3129 && (frag
->fr_type
== rs_align
3130 || frag
->fr_type
== rs_align_code
)
3131 && frag
->fr_address
+ frag
->fr_fix
> 0
3132 && frag
->fr_offset
> 1
3133 && now_seg
!= bss_section
)
3134 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3135 BFD_RELOC_SH_ALIGN
);
3138 /* See whether the relocation should be resolved locally. */
3141 sh_local_pcrel (fixS
*fix
)
3144 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3145 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3146 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3147 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3148 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3149 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3150 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3153 /* See whether we need to force a relocation into the output file.
3154 This is used to force out switch and PC relative relocations when
3158 sh_force_relocation (fixS
*fix
)
3160 /* These relocations can't make it into a DSO, so no use forcing
3161 them for global symbols. */
3162 if (sh_local_pcrel (fix
))
3165 /* Make sure some relocations get emitted. */
3166 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3167 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3168 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3169 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3170 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3171 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3172 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3173 || generic_force_reloc (fix
))
3179 return (fix
->fx_pcrel
3180 || SWITCH_TABLE (fix
)
3181 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3182 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3183 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3184 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3186 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3188 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3193 sh_fix_adjustable (fixS
*fixP
)
3195 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3196 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3197 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3198 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3201 /* We need the symbol name for the VTABLE entries */
3202 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3203 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3210 sh_elf_final_processing (void)
3214 /* Set file-specific flags to indicate if this code needs
3215 a processor with the sh-dsp / sh3e ISA to execute. */
3217 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3218 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3219 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3222 #endif /* HAVE_SH64 */
3223 if (valid_arch
& arch_sh1
)
3225 else if (valid_arch
& arch_sh2
)
3227 else if (valid_arch
& arch_sh2e
)
3229 else if (valid_arch
& arch_sh_dsp
)
3231 else if (valid_arch
& arch_sh3
)
3233 else if (valid_arch
& arch_sh3_dsp
)
3235 else if (valid_arch
& arch_sh3e
)
3237 else if (valid_arch
& arch_sh4
)
3242 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3243 elf_elfheader (stdoutput
)->e_flags
|= val
;
3247 /* Apply a fixup to the object file. */
3250 md_apply_fix3 (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3252 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3253 int lowbyte
= target_big_endian
? 1 : 0;
3254 int highbyte
= target_big_endian
? 0 : 1;
3255 long val
= (long) *valP
;
3259 #ifdef BFD_ASSEMBLER
3260 /* A difference between two symbols, the second of which is in the
3261 current section, is transformed in a PC-relative relocation to
3262 the other symbol. We have to adjust the relocation type here. */
3265 switch (fixP
->fx_r_type
)
3271 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3274 /* Currently, we only support 32-bit PCREL relocations.
3275 We'd need a new reloc type to handle 16_PCREL, and
3276 8_PCREL is already taken for R_SH_SWITCH8, which
3277 apparently does something completely different than what
3280 bfd_set_error (bfd_error_bad_value
);
3284 bfd_set_error (bfd_error_bad_value
);
3289 /* The function adjust_reloc_syms won't convert a reloc against a weak
3290 symbol into a reloc against a section, but bfd_install_relocation
3291 will screw up if the symbol is defined, so we have to adjust val here
3292 to avoid the screw up later.
3294 For ordinary relocs, this does not happen for ELF, since for ELF,
3295 bfd_install_relocation uses the "special function" field of the
3296 howto, and does not execute the code that needs to be undone, as long
3297 as the special function does not return bfd_reloc_continue.
3298 It can happen for GOT- and PLT-type relocs the way they are
3299 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3300 doesn't matter here since those relocs don't use VAL; see below. */
3301 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3302 && fixP
->fx_addsy
!= NULL
3303 && S_IS_WEAK (fixP
->fx_addsy
))
3304 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3307 #ifdef BFD_ASSEMBLER
3308 if (SWITCH_TABLE (fixP
))
3309 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3311 if (fixP
->fx_r_type
== 0)
3313 if (fixP
->fx_size
== 2)
3314 fixP
->fx_r_type
= BFD_RELOC_16
;
3315 else if (fixP
->fx_size
== 4)
3316 fixP
->fx_r_type
= BFD_RELOC_32
;
3317 else if (fixP
->fx_size
== 1)
3318 fixP
->fx_r_type
= BFD_RELOC_8
;
3326 switch (fixP
->fx_r_type
)
3328 case BFD_RELOC_SH_IMM4
:
3330 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3333 case BFD_RELOC_SH_IMM4BY2
:
3336 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3339 case BFD_RELOC_SH_IMM4BY4
:
3342 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3345 case BFD_RELOC_SH_IMM8BY2
:
3351 case BFD_RELOC_SH_IMM8BY4
:
3358 case BFD_RELOC_SH_IMM8
:
3359 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3360 sometimes it is not (e.g., and). We permit any 8 bit value.
3361 Note that adding further restrictions may invalidate
3362 reasonable looking assembly code, such as ``and -0x1,r0''. */
3368 case BFD_RELOC_SH_PCRELIMM8BY4
:
3369 /* The lower two bits of the PC are cleared before the
3370 displacement is added in. We can assume that the destination
3371 is on a 4 byte boundary. If this instruction is also on a 4
3372 byte boundary, then we want
3374 and target - here is a multiple of 4.
3375 Otherwise, we are on a 2 byte boundary, and we want
3376 (target - (here - 2)) / 4
3377 and target - here is not a multiple of 4. Computing
3378 (target - (here - 2)) / 4 == (target - here + 2) / 4
3379 works for both cases, since in the first case the addition of
3380 2 will be removed by the division. target - here is in the
3382 val
= (val
+ 2) / 4;
3384 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3388 case BFD_RELOC_SH_PCRELIMM8BY2
:
3391 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3395 case BFD_RELOC_SH_PCDISP8BY2
:
3397 if (val
< -0x80 || val
> 0x7f)
3398 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3402 case BFD_RELOC_SH_PCDISP12BY2
:
3404 if (val
< -0x800 || val
> 0x7ff)
3405 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3406 buf
[lowbyte
] = val
& 0xff;
3407 buf
[highbyte
] |= (val
>> 8) & 0xf;
3411 case BFD_RELOC_32_PCREL
:
3412 md_number_to_chars (buf
, val
, 4);
3416 md_number_to_chars (buf
, val
, 2);
3419 case BFD_RELOC_SH_USES
:
3420 /* Pass the value into sh_coff_reloc_mangle. */
3421 fixP
->fx_addnumber
= val
;
3424 case BFD_RELOC_SH_COUNT
:
3425 case BFD_RELOC_SH_ALIGN
:
3426 case BFD_RELOC_SH_CODE
:
3427 case BFD_RELOC_SH_DATA
:
3428 case BFD_RELOC_SH_LABEL
:
3429 /* Nothing to do here. */
3432 case BFD_RELOC_SH_LOOP_START
:
3433 case BFD_RELOC_SH_LOOP_END
:
3435 case BFD_RELOC_VTABLE_INHERIT
:
3436 case BFD_RELOC_VTABLE_ENTRY
:
3441 case BFD_RELOC_32_PLT_PCREL
:
3442 /* Make the jump instruction point to the address of the operand. At
3443 runtime we merely add the offset to the actual PLT entry. */
3444 * valP
= 0xfffffffc;
3445 val
= fixP
->fx_offset
;
3447 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3448 fixP
->fx_addnumber
= val
;
3449 md_number_to_chars (buf
, val
, 4);
3452 case BFD_RELOC_SH_GOTPC
:
3453 /* This is tough to explain. We end up with this one if we have
3454 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3455 The goal here is to obtain the absolute address of the GOT,
3456 and it is strongly preferable from a performance point of
3457 view to avoid using a runtime relocation for this. There are
3458 cases where you have something like:
3460 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3462 and here no correction would be required. Internally in the
3463 assembler we treat operands of this form as not being pcrel
3464 since the '.' is explicitly mentioned, and I wonder whether
3465 it would simplify matters to do it this way. Who knows. In
3466 earlier versions of the PIC patches, the pcrel_adjust field
3467 was used to store the correction, but since the expression is
3468 not pcrel, I felt it would be confusing to do it this way. */
3470 md_number_to_chars (buf
, val
, 4);
3473 case BFD_RELOC_SH_TLS_GD_32
:
3474 case BFD_RELOC_SH_TLS_LD_32
:
3475 case BFD_RELOC_SH_TLS_IE_32
:
3476 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3478 case BFD_RELOC_32_GOT_PCREL
:
3479 case BFD_RELOC_SH_GOTPLT32
:
3480 * valP
= 0; /* Fully resolved at runtime. No addend. */
3481 md_number_to_chars (buf
, 0, 4);
3484 case BFD_RELOC_SH_TLS_LDO_32
:
3485 case BFD_RELOC_SH_TLS_LE_32
:
3486 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3488 case BFD_RELOC_32_GOTOFF
:
3489 md_number_to_chars (buf
, val
, 4);
3495 shmedia_md_apply_fix3 (fixP
, valP
);
3504 if ((val
& ((1 << shift
) - 1)) != 0)
3505 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3509 val
= ((val
>> shift
)
3510 | ((long) -1 & ~ ((long) -1 >> shift
)));
3512 if (max
!= 0 && (val
< min
|| val
> max
))
3513 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3515 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3519 /* Called just before address relaxation. Return the length
3520 by which a fragment must grow to reach it's destination. */
3523 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
3527 switch (fragP
->fr_subtype
)
3531 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
3537 case C (UNCOND_JUMP
, UNDEF_DISP
):
3538 /* Used to be a branch to somewhere which was unknown. */
3539 if (!fragP
->fr_symbol
)
3541 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3543 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3545 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3549 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3553 case C (COND_JUMP
, UNDEF_DISP
):
3554 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3555 what
= GET_WHAT (fragP
->fr_subtype
);
3556 /* Used to be a branch to somewhere which was unknown. */
3557 if (fragP
->fr_symbol
3558 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3560 /* Got a symbol and it's defined in this segment, become byte
3561 sized - maybe it will fix up. */
3562 fragP
->fr_subtype
= C (what
, COND8
);
3564 else if (fragP
->fr_symbol
)
3566 /* Its got a segment, but its not ours, so it will always be long. */
3567 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3571 /* We know the abs value. */
3572 fragP
->fr_subtype
= C (what
, COND8
);
3576 case C (UNCOND_JUMP
, UNCOND12
):
3577 case C (UNCOND_JUMP
, UNCOND32
):
3578 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3579 case C (COND_JUMP
, COND8
):
3580 case C (COND_JUMP
, COND12
):
3581 case C (COND_JUMP
, COND32
):
3582 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3583 case C (COND_JUMP_DELAY
, COND8
):
3584 case C (COND_JUMP_DELAY
, COND12
):
3585 case C (COND_JUMP_DELAY
, COND32
):
3586 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3587 /* When relaxing a section for the second time, we don't need to
3588 do anything besides return the current size. */
3592 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3593 return fragP
->fr_var
;
3596 /* Put number into target byte order. */
3599 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
3602 /* We might need to set the contents type to data. */
3603 sh64_flag_output ();
3606 if (! target_big_endian
)
3607 number_to_chars_littleendian (ptr
, use
, nbytes
);
3609 number_to_chars_bigendian (ptr
, use
, nbytes
);
3612 /* This version is used in obj-coff.c when not using BFD_ASSEMBLER.
3613 eg for the sh-hms target. */
3616 md_pcrel_from (fixS
*fixP
)
3618 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3622 md_pcrel_from_section (fixS
*fixP
, segT sec
)
3624 if (! sh_local_pcrel (fixP
)
3625 && fixP
->fx_addsy
!= (symbolS
*) NULL
3626 && (generic_force_reloc (fixP
)
3627 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3629 /* The symbol is undefined (or is defined but not in this section,
3630 or we're not sure about it being the final definition). Let the
3631 linker figure it out. We need to adjust the subtraction of a
3632 symbol to the position of the relocated data, though. */
3633 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3636 return md_pcrel_from (fixP
);
3642 tc_coff_sizemachdep (fragS
*frag
)
3644 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
3647 #endif /* OBJ_COFF */
3649 #ifndef BFD_ASSEMBLER
3652 /* Map BFD relocs to SH COFF relocs. */
3656 bfd_reloc_code_real_type bfd_reloc
;
3660 static const struct reloc_map coff_reloc_map
[] =
3662 { BFD_RELOC_32
, R_SH_IMM32
},
3663 { BFD_RELOC_16
, R_SH_IMM16
},
3664 { BFD_RELOC_8
, R_SH_IMM8
},
3665 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
3666 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
3667 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
3668 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
3669 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
3670 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
3671 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
3672 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
3673 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
3674 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
3675 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
3676 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
3677 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
3678 { BFD_RELOC_SH_USES
, R_SH_USES
},
3679 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
3680 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
3681 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
3682 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
3683 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
3684 { BFD_RELOC_UNUSED
, 0 }
3687 /* Adjust a reloc for the SH. This is similar to the generic code,
3688 but does some minor tweaking. */
3691 sh_coff_reloc_mangle (segment_info_type
*seg
, fixS
*fix
,
3692 struct internal_reloc
*intr
, unsigned int paddr
)
3694 symbolS
*symbol_ptr
= fix
->fx_addsy
;
3697 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
3699 if (! SWITCH_TABLE (fix
))
3701 const struct reloc_map
*rm
;
3703 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
3704 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
3706 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
3707 as_bad_where (fix
->fx_file
, fix
->fx_line
,
3708 _("Can not represent %s relocation in this object file format"),
3709 bfd_get_reloc_code_name (fix
->fx_r_type
));
3710 intr
->r_type
= rm
->sh_reloc
;
3717 if (fix
->fx_r_type
== BFD_RELOC_16
)
3718 intr
->r_type
= R_SH_SWITCH16
;
3719 else if (fix
->fx_r_type
== BFD_RELOC_8
)
3720 intr
->r_type
= R_SH_SWITCH8
;
3721 else if (fix
->fx_r_type
== BFD_RELOC_32
)
3722 intr
->r_type
= R_SH_SWITCH32
;
3726 /* For a switch reloc, we set r_offset to the difference between
3727 the reloc address and the subtrahend. When the linker is
3728 doing relaxing, it can use the determine the starting and
3729 ending points of the switch difference expression. */
3730 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
3733 /* PC relative relocs are always against the current section. */
3734 if (symbol_ptr
== NULL
)
3736 switch (fix
->fx_r_type
)
3738 case BFD_RELOC_SH_PCRELIMM8BY2
:
3739 case BFD_RELOC_SH_PCRELIMM8BY4
:
3740 case BFD_RELOC_SH_PCDISP8BY2
:
3741 case BFD_RELOC_SH_PCDISP12BY2
:
3742 case BFD_RELOC_SH_USES
:
3743 symbol_ptr
= seg
->dot
;
3750 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
3752 /* We can't store the offset in the object file, since this
3753 reloc does not take up any space, so we store it in r_offset.
3754 The fx_addnumber field was set in md_apply_fix3. */
3755 intr
->r_offset
= fix
->fx_addnumber
;
3757 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3759 /* We can't store the count in the object file, since this reloc
3760 does not take up any space, so we store it in r_offset. The
3761 fx_offset field was set when the fixup was created in
3762 sh_coff_frob_file. */
3763 intr
->r_offset
= fix
->fx_offset
;
3764 /* This reloc is always absolute. */
3767 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3769 /* Store the alignment in the r_offset field. */
3770 intr
->r_offset
= fix
->fx_offset
;
3771 /* This reloc is always absolute. */
3774 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3775 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3776 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3778 /* These relocs are always absolute. */
3782 /* Turn the segment of the symbol into an offset. */
3783 if (symbol_ptr
!= NULL
)
3785 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3787 intr
->r_symndx
= dot
->sy_number
;
3789 intr
->r_symndx
= symbol_ptr
->sy_number
;
3792 intr
->r_symndx
= -1;
3795 #endif /* OBJ_COFF */
3796 #endif /* ! BFD_ASSEMBLER */
3798 #ifdef BFD_ASSEMBLER
3800 /* Create a reloc. */
3803 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
3806 bfd_reloc_code_real_type r_type
;
3808 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3809 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3810 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3811 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3813 r_type
= fixp
->fx_r_type
;
3815 if (SWITCH_TABLE (fixp
))
3817 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
3819 if (r_type
== BFD_RELOC_16
)
3820 r_type
= BFD_RELOC_SH_SWITCH16
;
3821 else if (r_type
== BFD_RELOC_8
)
3822 r_type
= BFD_RELOC_8_PCREL
;
3823 else if (r_type
== BFD_RELOC_32
)
3824 r_type
= BFD_RELOC_SH_SWITCH32
;
3828 else if (r_type
== BFD_RELOC_SH_USES
)
3829 rel
->addend
= fixp
->fx_addnumber
;
3830 else if (r_type
== BFD_RELOC_SH_COUNT
)
3831 rel
->addend
= fixp
->fx_offset
;
3832 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3833 rel
->addend
= fixp
->fx_offset
;
3834 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3835 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3836 rel
->addend
= fixp
->fx_offset
;
3837 else if (r_type
== BFD_RELOC_SH_LOOP_START
3838 || r_type
== BFD_RELOC_SH_LOOP_END
)
3839 rel
->addend
= fixp
->fx_offset
;
3840 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3843 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3846 else if (shmedia_init_reloc (rel
, fixp
))
3849 else if (fixp
->fx_pcrel
)
3850 rel
->addend
= fixp
->fx_addnumber
;
3851 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
3852 rel
->addend
= fixp
->fx_addnumber
;
3856 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3858 if (rel
->howto
->type
== R_SH_IND12W
)
3859 rel
->addend
+= fixp
->fx_offset
- 4;
3861 if (rel
->howto
== NULL
)
3863 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3864 _("Cannot represent relocation type %s"),
3865 bfd_get_reloc_code_name (r_type
));
3866 /* Set howto to a garbage value so that we can keep going. */
3867 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3868 assert (rel
->howto
!= NULL
);
3875 inline static char *
3876 sh_end_of_match (char *cont
, char *what
)
3878 int len
= strlen (what
);
3880 if (strncasecmp (cont
, what
, strlen (what
)) == 0
3881 && ! is_part_of_name (cont
[len
]))
3888 sh_parse_name (char const *name
, expressionS
*exprP
, char *nextcharP
)
3890 char *next
= input_line_pointer
;
3895 exprP
->X_op_symbol
= NULL
;
3897 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3900 GOT_symbol
= symbol_find_or_make (name
);
3902 exprP
->X_add_symbol
= GOT_symbol
;
3904 /* If we have an absolute symbol or a reg, then we know its
3906 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
3907 if (segment
== absolute_section
)
3909 exprP
->X_op
= O_constant
;
3910 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3911 exprP
->X_add_symbol
= NULL
;
3913 else if (segment
== reg_section
)
3915 exprP
->X_op
= O_register
;
3916 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3917 exprP
->X_add_symbol
= NULL
;
3921 exprP
->X_op
= O_symbol
;
3922 exprP
->X_add_number
= 0;
3928 exprP
->X_add_symbol
= symbol_find_or_make (name
);
3930 if (*nextcharP
!= '@')
3932 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
3933 reloc_type
= BFD_RELOC_32_GOTOFF
;
3934 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
3935 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
3936 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
3937 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
3938 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
3939 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
3940 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
3941 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
3942 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
3943 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
3944 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
3945 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
3946 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
3947 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
3948 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
3949 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
3953 *input_line_pointer
= *nextcharP
;
3954 input_line_pointer
= next_end
;
3955 *nextcharP
= *input_line_pointer
;
3956 *input_line_pointer
= '\0';
3958 exprP
->X_op
= O_PIC_reloc
;
3959 exprP
->X_add_number
= 0;
3960 exprP
->X_md
= reloc_type
;
3965 #endif /* BFD_ASSEMBLER */