1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 1998 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Written By Steve Chamberlain
31 #include "opcodes/sh-opc.h"
33 const char comment_chars
[] = "!";
34 const char line_separator_chars
[] = ";";
35 const char line_comment_chars
[] = "!#";
37 static void s_uses
PARAMS ((int));
39 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
40 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
42 /* This table describes all the machine specific pseudo-ops the assembler
43 has to support. The fields are:
44 pseudo-op name without dot
45 function to call to execute this pseudo-op
46 Integer arg to pass to the function
50 void s_align_bytes ();
51 static void s_uacons
PARAMS ((int));
60 target_big_endian
= 0;
63 const pseudo_typeS md_pseudo_table
[] =
67 {"form", listing_psize
, 0},
68 {"little", little
, 0},
69 {"heading", listing_title
, 0},
70 {"import", s_ignore
, 0},
71 {"page", listing_eject
, 0},
72 {"program", s_ignore
, 0},
74 {"uaword", s_uacons
, 2},
75 {"ualong", s_uacons
, 4},
79 /*int md_reloc_size; */
81 int sh_relax
; /* set if -relax seen */
83 /* Whether -small was seen. */
87 const char EXP_CHARS
[] = "eE";
89 /* Chars that mean this number is a floating point constant */
92 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
94 #define C(a,b) ENCODE_RELAX(a,b)
96 #define JREG 14 /* Register used as a temp when relaxing */
97 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
98 #define GET_WHAT(x) ((x>>4))
100 /* These are the three types of relaxable instrction */
102 #define COND_JUMP_DELAY 2
103 #define UNCOND_JUMP 3
112 #define UNDEF_WORD_DISP 4
117 /* Branch displacements are from the address of the branch plus
118 four, thus all minimum and maximum values have 4 added to them. */
121 #define COND8_LENGTH 2
123 /* There is one extra instruction before the branch, so we must add
124 two more bytes to account for it. */
125 #define COND12_F 4100
126 #define COND12_M -4090
127 #define COND12_LENGTH 6
129 #define COND12_DELAY_LENGTH 4
131 /* ??? The minimum and maximum values are wrong, but this does not matter
132 since this relocation type is not supported yet. */
133 #define COND32_F (1<<30)
134 #define COND32_M -(1<<30)
135 #define COND32_LENGTH 14
137 #define UNCOND12_F 4098
138 #define UNCOND12_M -4092
139 #define UNCOND12_LENGTH 2
141 /* ??? The minimum and maximum values are wrong, but this does not matter
142 since this relocation type is not supported yet. */
143 #define UNCOND32_F (1<<30)
144 #define UNCOND32_M -(1<<30)
145 #define UNCOND32_LENGTH 14
147 const relax_typeS md_relax_table
[C (END
, 0)] = {
148 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
149 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
152 /* C (COND_JUMP, COND8) */
153 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
154 /* C (COND_JUMP, COND12) */
155 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
156 /* C (COND_JUMP, COND32) */
157 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
158 { 0 }, { 0 }, { 0 }, { 0 },
159 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
162 /* C (COND_JUMP_DELAY, COND8) */
163 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
164 /* C (COND_JUMP_DELAY, COND12) */
165 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
166 /* C (COND_JUMP_DELAY, COND32) */
167 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
168 { 0 }, { 0 }, { 0 }, { 0 },
169 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
172 /* C (UNCOND_JUMP, UNCOND12) */
173 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
174 /* C (UNCOND_JUMP, UNCOND32) */
175 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
176 { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
177 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
180 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
183 This function is called once, at assembler startup time. This should
184 set up all the tables, etc that the MD part of the assembler needs
190 sh_opcode_info
*opcode
;
191 char *prev_name
= "";
194 target_big_endian
= 1;
196 opcode_hash_control
= hash_new ();
198 /* Insert unique names into hash table */
199 for (opcode
= sh_table
; opcode
->name
; opcode
++)
201 if (strcmp (prev_name
, opcode
->name
))
203 prev_name
= opcode
->name
;
204 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
208 /* Make all the opcodes with the same name point to the same
210 opcode
->name
= prev_name
;
219 static expressionS immediate
; /* absolute expression */
229 /* try and parse a reg name, returns number of chars consumed */
231 parse_reg (src
, mode
, reg
)
236 /* We use !isalnum for the next character after the register name, to
237 make sure that we won't accidentally recognize a symbol name such as
238 'sram' as being a reference to the register 'sr'. */
242 if (src
[1] >= '0' && src
[1] <= '7' && strncmp(&src
[2], "_bank", 5) == 0
243 && ! isalnum ((unsigned char) src
[7]))
246 *reg
= (src
[1] - '0');
255 if (src
[2] >= '0' && src
[2] <= '5'
256 && ! isalnum ((unsigned char) src
[3]))
259 *reg
= 10 + src
[2] - '0';
263 if (src
[1] >= '0' && src
[1] <= '9'
264 && ! isalnum ((unsigned char) src
[2]))
267 *reg
= (src
[1] - '0');
274 && src
[2] == 'r' && ! isalnum ((unsigned char) src
[3]))
280 if (src
[0] == 's' && src
[1] == 'p' && src
[2] == 'c'
281 && ! isalnum ((unsigned char) src
[3]))
287 if (src
[0] == 's' && src
[1] == 'g' && src
[2] == 'r'
288 && ! isalnum ((unsigned char) src
[3]))
294 if (src
[0] == 'd' && src
[1] == 'b' && src
[2] == 'r'
295 && ! isalnum ((unsigned char) src
[3]))
301 if (src
[0] == 's' && src
[1] == 'r' && ! isalnum ((unsigned char) src
[2]))
307 if (src
[0] == 's' && src
[1] == 'p' && ! isalnum ((unsigned char) src
[2]))
314 if (src
[0] == 'p' && src
[1] == 'r' && ! isalnum ((unsigned char) src
[2]))
319 if (src
[0] == 'p' && src
[1] == 'c' && ! isalnum ((unsigned char) src
[2]))
324 if (src
[0] == 'g' && src
[1] == 'b' && src
[2] == 'r'
325 && ! isalnum ((unsigned char) src
[3]))
330 if (src
[0] == 'v' && src
[1] == 'b' && src
[2] == 'r'
331 && ! isalnum ((unsigned char) src
[3]))
337 if (src
[0] == 'm' && src
[1] == 'a' && src
[2] == 'c'
338 && ! isalnum ((unsigned char) src
[4]))
351 if (src
[0] == 'f' && src
[1] == 'r')
355 if (src
[3] >= '0' && src
[3] <= '5'
356 && ! isalnum ((unsigned char) src
[4]))
359 *reg
= 10 + src
[3] - '0';
363 if (src
[2] >= '0' && src
[2] <= '9'
364 && ! isalnum ((unsigned char) src
[3]))
367 *reg
= (src
[2] - '0');
371 if (src
[0] == 'd' && src
[1] == 'r')
375 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
376 && ! isalnum ((unsigned char) src
[4]))
379 *reg
= 10 + src
[3] - '0';
383 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
384 && ! isalnum ((unsigned char) src
[3]))
387 *reg
= (src
[2] - '0');
391 if (src
[0] == 'x' && src
[1] == 'd')
395 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
396 && ! isalnum ((unsigned char) src
[4]))
399 *reg
= 11 + src
[3] - '0';
403 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
404 && ! isalnum ((unsigned char) src
[3]))
407 *reg
= (src
[2] - '0') + 1;
411 if (src
[0] == 'f' && src
[1] == 'v')
413 if (src
[2] == '1'&& src
[3] == '2' && ! isalnum ((unsigned char) src
[4]))
419 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
420 && ! isalnum ((unsigned char) src
[3]))
423 *reg
= (src
[2] - '0');
427 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 'u' && src
[3] == 'l'
428 && ! isalnum ((unsigned char) src
[4]))
434 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 's' && src
[3] == 'c'
435 && src
[4] == 'r' && ! isalnum ((unsigned char) src
[5]))
441 if (src
[0] == 'x' && src
[1] == 'm' && src
[2] == 't' && src
[3] == 'r'
442 && src
[4] == 'x' && ! isalnum ((unsigned char) src
[5]))
451 static symbolS
*dot()
455 /* JF: '.' is pseudo symbol with value of current location
456 in current segment. */
457 fake
= FAKE_LABEL_NAME
;
458 return symbol_new (fake
,
460 (valueT
) frag_now_fix (),
474 save
= input_line_pointer
;
475 input_line_pointer
= s
;
476 expression (&immediate
);
477 if (immediate
.X_op
== O_absent
)
478 as_bad (_("missing operand"));
479 new = input_line_pointer
;
480 input_line_pointer
= save
;
485 /* The many forms of operand:
488 @Rn Register indirect
501 pr, gbr, vbr, macl, mach
516 /* Must be predecrement */
519 len
= parse_reg (src
, &mode
, &(op
->reg
));
521 as_bad (_("illegal register after @-"));
526 else if (src
[0] == '(')
528 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
531 len
= parse_reg (src
, &mode
, &(op
->reg
));
532 if (len
&& mode
== A_REG_N
)
537 as_bad (_("must be @(r0,...)"));
541 /* Now can be rn or gbr */
542 len
= parse_reg (src
, &mode
, &(op
->reg
));
547 else if (mode
== A_REG_N
)
549 op
->type
= A_IND_R0_REG_N
;
553 as_bad (_("syntax error in @(r0,...)"));
558 /* Must be an @(disp,.. thing) */
559 src
= parse_exp (src
);
562 /* Now can be rn, gbr or pc */
563 len
= parse_reg (src
, &mode
, &op
->reg
);
568 op
->type
= A_DISP_REG_N
;
570 else if (mode
== A_GBR
)
572 op
->type
= A_DISP_GBR
;
574 else if (mode
== A_DISP_PC
)
576 /* Turn a plain @(4,pc) into @(.+4,pc) */
577 if (immediate
.X_op
== O_constant
) {
578 immediate
.X_add_symbol
= dot();
579 immediate
.X_op
= O_symbol
;
581 op
->type
= A_DISP_PC
;
585 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
590 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
595 as_bad (_("expecting )"));
601 src
+= parse_reg (src
, &mode
, &(op
->reg
));
604 as_bad (_("illegal register after @"));
620 get_operand (ptr
, op
)
631 *ptr
= parse_exp (src
);
636 else if (src
[0] == '@')
638 *ptr
= parse_at (src
, op
);
641 len
= parse_reg (src
, &mode
, &(op
->reg
));
650 /* Not a reg, the only thing left is a displacement */
651 *ptr
= parse_exp (src
);
652 op
->type
= A_DISP_PC
;
659 get_operands (info
, args
, operand
)
660 sh_opcode_info
*info
;
662 sh_operand_info
*operand
;
670 get_operand (&ptr
, operand
+ 0);
677 get_operand (&ptr
, operand
+ 1);
684 get_operand (&ptr
, operand
+ 2);
706 /* Passed a pointer to a list of opcodes which use different
707 addressing modes, return the opcode which matches the opcodes
713 get_specific (opcode
, operands
)
714 sh_opcode_info
*opcode
;
715 sh_operand_info
*operands
;
717 sh_opcode_info
*this_try
= opcode
;
718 char *name
= opcode
->name
;
723 if (this_try
->name
!= name
)
725 /* We've looked so far down the table that we've run out of
726 opcodes with the same name */
729 /* look at both operands needed by the opcodes and provided by
730 the user - since an arg test will often fail on the same arg
731 again and again, we'll try and test the last failing arg the
732 first on each opcode try */
734 for (n
= 0; this_try
->arg
[n
]; n
++)
736 sh_operand_info
*user
= operands
+ n
;
737 sh_arg_type arg
= this_try
->arg
[n
];
748 if (user
->type
!= arg
)
752 /* opcode needs r0 */
753 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
757 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
761 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
777 /* Opcode needs rn */
778 if (user
->type
!= arg
)
783 if (user
->type
!= F_REG_N
&& user
->type
!= D_REG_N
)
788 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
799 if (user
->type
!= arg
)
804 if (user
->type
!= arg
)
815 /* Opcode needs rn */
816 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
827 /* Opcode needs rn */
828 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
833 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
838 if (user
->type
!= XMTRX_M4
)
844 printf (_("unhandled %d\n"), arg
);
856 check (operand
, low
, high
)
857 expressionS
*operand
;
861 if (operand
->X_op
!= O_constant
862 || operand
->X_add_number
< low
863 || operand
->X_add_number
> high
)
865 as_bad (_("operand must be absolute in range %d..%d"), low
, high
);
867 return operand
->X_add_number
;
872 insert (where
, how
, pcrel
)
877 fix_new_exp (frag_now
,
878 where
- frag_now
->fr_literal
,
887 sh_opcode_info
*opcode
;
889 int high_byte
= target_big_endian
? 0 : 1;
892 if (opcode
->arg
[0] == A_BDISP8
)
894 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
895 p
= frag_var (rs_machine_dependent
,
896 md_relax_table
[C (what
, COND32
)].rlx_length
,
897 md_relax_table
[C (what
, COND8
)].rlx_length
,
899 immediate
.X_add_symbol
,
900 immediate
.X_add_number
,
902 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
904 else if (opcode
->arg
[0] == A_BDISP12
)
906 p
= frag_var (rs_machine_dependent
,
907 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
908 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
910 immediate
.X_add_symbol
,
911 immediate
.X_add_number
,
913 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
918 /* Now we know what sort of opcodes it is, lets build the bytes -
921 build_Mytes (opcode
, operand
)
922 sh_opcode_info
*opcode
;
923 sh_operand_info
*operand
;
928 char *output
= frag_more (2);
929 int low_byte
= target_big_endian
? 1 : 0;
935 for (index
= 0; index
< 4; index
++)
937 sh_nibble_type i
= opcode
->nibbles
[index
];
953 nbuf
[index
] = reg_n
| (reg_m
>> 2);
956 nbuf
[index
] = reg_b
| 0x08;
959 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0);
962 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0);
965 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0);
968 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0);
971 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0);
974 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0);
977 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0);
980 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1);
983 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1);
986 printf (_("failed for %d\n"), i
);
990 if (! target_big_endian
) {
991 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
992 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
995 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
996 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1000 /* This is the guts of the machine-dependent assembler. STR points to a
1001 machine dependent instruction. This function is supposed to emit
1002 the frags/bytes it assembles to.
1009 unsigned char *op_start
;
1010 unsigned char *op_end
;
1011 sh_operand_info operand
[3];
1012 sh_opcode_info
*opcode
;
1015 /* Drop leading whitespace */
1019 /* find the op code end */
1020 for (op_start
= op_end
= (unsigned char *) (str
);
1023 && !is_end_of_line
[*op_end
] && *op_end
!= ' ';
1026 unsigned char c
= op_start
[nlen
];
1028 /* The machine independent code will convert CMP/EQ into cmp/EQ
1029 because it thinks the '/' is the end of the symbol. Instead of
1030 hacking up the machine independent code, we just deal with it
1032 c
= isupper (c
) ? tolower (c
) : c
;
1040 as_bad (_("can't find opcode "));
1043 opcode
= (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1047 as_bad (_("unknown opcode"));
1052 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1054 /* Output a CODE reloc to tell the linker that the following
1055 bytes are instructions, not data. */
1056 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1058 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1061 if (opcode
->arg
[0] == A_BDISP12
1062 || opcode
->arg
[0] == A_BDISP8
)
1064 parse_exp (op_end
+ 1);
1065 build_relax (opcode
);
1069 if (opcode
->arg
[0] != A_END
)
1071 get_operands (opcode
, op_end
, operand
);
1073 opcode
= get_specific (opcode
, operand
);
1077 /* Couldn't find an opcode which matched the operands */
1078 char *where
= frag_more (2);
1082 as_bad (_("invalid operands for opcode"));
1086 build_Mytes (opcode
, operand
);
1091 /* This routine is called each time a label definition is seen. It
1092 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1097 static fragS
*last_label_frag
;
1098 static int last_label_offset
;
1101 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1105 offset
= frag_now_fix ();
1106 if (frag_now
!= last_label_frag
1107 || offset
!= last_label_offset
)
1109 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1110 last_label_frag
= frag_now
;
1111 last_label_offset
= offset
;
1116 /* This routine is called when the assembler is about to output some
1117 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1120 sh_flush_pending_output ()
1123 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1125 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1127 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
1132 DEFUN (md_undefined_symbol
, (name
),
1141 DEFUN (tc_crawl_symbol_chain
, (headers
),
1142 object_headers
* headers
)
1144 printf (_("call to tc_crawl_symbol_chain \n"));
1148 DEFUN (tc_headers_hook
, (headers
),
1149 object_headers
* headers
)
1151 printf (_("call to tc_headers_hook \n"));
1156 /* Various routines to kill one day */
1157 /* Equal to MAX_PRECISION in atof-ieee.c */
1158 #define MAX_LITTLENUMS 6
1160 /* Turn a string in input_line_pointer into a floating point constant of type
1161 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1162 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1165 md_atof (type
, litP
, sizeP
)
1171 LITTLENUM_TYPE words
[4];
1187 return _("bad call to md_atof");
1190 t
= atof_ieee (input_line_pointer
, type
, words
);
1192 input_line_pointer
= t
;
1196 if (! target_big_endian
)
1198 for (i
= prec
- 1; i
>= 0; i
--)
1200 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1206 for (i
= 0; i
< prec
; i
++)
1208 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1216 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1217 call instruction. It refers to a label of the instruction which
1218 loads the register which the call uses. We use it to generate a
1219 special reloc for the linker. */
1228 as_warn (_(".uses pseudo-op seen when not relaxing"));
1232 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
1234 as_bad (_("bad .uses format"));
1235 ignore_rest_of_line ();
1239 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
1241 demand_empty_rest_of_line ();
1244 CONST
char *md_shortopts
= "";
1245 struct option md_longopts
[] = {
1247 #define OPTION_RELAX (OPTION_MD_BASE)
1248 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1249 #define OPTION_SMALL (OPTION_LITTLE + 1)
1251 {"relax", no_argument
, NULL
, OPTION_RELAX
},
1252 {"little", no_argument
, NULL
, OPTION_LITTLE
},
1253 {"small", no_argument
, NULL
, OPTION_SMALL
},
1254 {NULL
, no_argument
, NULL
, 0}
1256 size_t md_longopts_size
= sizeof(md_longopts
);
1259 md_parse_option (c
, arg
)
1271 target_big_endian
= 0;
1286 md_show_usage (stream
)
1289 fprintf(stream
, _("\
1291 -little generate little endian code\n\
1292 -relax alter jump instructions for long displacements\n\
1293 -small align sections to 4 byte boundaries, not 16\n"));
1297 tc_Nout_fix_to_chars ()
1299 printf (_("call to tc_Nout_fix_to_chars \n"));
1303 /* This struct is used to pass arguments to sh_count_relocs through
1304 bfd_map_over_sections. */
1306 struct sh_count_relocs
1308 /* Symbol we are looking for. */
1310 /* Count of relocs found. */
1314 /* Count the number of fixups in a section which refer to a particular
1315 symbol. When using BFD_ASSEMBLER, this is called via
1316 bfd_map_over_sections. */
1320 sh_count_relocs (abfd
, sec
, data
)
1325 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
1326 segment_info_type
*seginfo
;
1330 seginfo
= seg_info (sec
);
1331 if (seginfo
== NULL
)
1335 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
1337 if (fix
->fx_addsy
== sym
)
1345 /* Handle the count relocs for a particular section. When using
1346 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
1350 sh_frob_section (abfd
, sec
, ignore
)
1355 segment_info_type
*seginfo
;
1358 seginfo
= seg_info (sec
);
1359 if (seginfo
== NULL
)
1362 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
1367 struct sh_count_relocs info
;
1369 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
1372 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
1373 symbol in the same section. */
1374 sym
= fix
->fx_addsy
;
1376 || fix
->fx_subsy
!= NULL
1377 || fix
->fx_addnumber
!= 0
1378 || S_GET_SEGMENT (sym
) != sec
1379 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
1380 || S_GET_STORAGE_CLASS (sym
) == C_EXT
1382 || S_IS_EXTERNAL (sym
))
1384 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1385 _(".uses does not refer to a local symbol in the same section"));
1389 /* Look through the fixups again, this time looking for one
1390 at the same location as sym. */
1391 val
= S_GET_VALUE (sym
);
1392 for (fscan
= seginfo
->fix_root
;
1394 fscan
= fscan
->fx_next
)
1395 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
1396 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
1397 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
1398 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
1399 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
1403 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1404 _("can't find fixup pointed to by .uses"));
1408 if (fscan
->fx_tcbit
)
1410 /* We've already done this one. */
1414 /* fscan should also be a fixup to a local symbol in the same
1416 sym
= fscan
->fx_addsy
;
1418 || fscan
->fx_subsy
!= NULL
1419 || fscan
->fx_addnumber
!= 0
1420 || S_GET_SEGMENT (sym
) != sec
1421 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
1422 || S_GET_STORAGE_CLASS (sym
) == C_EXT
1424 || S_IS_EXTERNAL (sym
))
1426 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1427 _(".uses target does not refer to a local symbol in the same section"));
1431 /* Now we look through all the fixups of all the sections,
1432 counting the number of times we find a reference to sym. */
1435 #ifdef BFD_ASSEMBLER
1436 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
1441 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
1442 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
1449 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
1450 We have already adjusted the value of sym to include the
1451 fragment address, so we undo that adjustment here. */
1452 subseg_change (sec
, 0);
1453 fix_new (sym
->sy_frag
, S_GET_VALUE (sym
) - sym
->sy_frag
->fr_address
,
1454 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
1458 /* This function is called after the symbol table has been completed,
1459 but before the relocs or section contents have been written out.
1460 If we have seen any .uses pseudo-ops, they point to an instruction
1461 which loads a register with the address of a function. We look
1462 through the fixups to find where the function address is being
1463 loaded from. We then generate a COUNT reloc giving the number of
1464 times that function address is referred to. The linker uses this
1465 information when doing relaxing, to decide when it can eliminate
1466 the stored function address entirely. */
1474 #ifdef BFD_ASSEMBLER
1475 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
1480 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
1481 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
1486 /* Called after relaxing. Set the correct sizes of the fragments, and
1487 create relocs so that md_apply_fix will fill in the correct values. */
1490 md_convert_frag (headers
, seg
, fragP
)
1491 #ifdef BFD_ASSEMBLER
1494 object_headers
*headers
;
1501 switch (fragP
->fr_subtype
)
1503 case C (COND_JUMP
, COND8
):
1504 case C (COND_JUMP_DELAY
, COND8
):
1505 subseg_change (seg
, 0);
1506 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
1507 1, BFD_RELOC_SH_PCDISP8BY2
);
1512 case C (UNCOND_JUMP
, UNCOND12
):
1513 subseg_change (seg
, 0);
1514 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
1515 1, BFD_RELOC_SH_PCDISP12BY2
);
1520 case C (UNCOND_JUMP
, UNCOND32
):
1521 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
1522 if (fragP
->fr_symbol
== NULL
)
1523 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
1524 (unsigned long) fragP
->fr_address
);
1525 else if (S_IS_DEFINED (fragP
->fr_symbol
))
1526 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
1527 (unsigned long) fragP
->fr_address
,
1528 S_GET_NAME (fragP
->fr_symbol
));
1530 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
1531 (unsigned long) fragP
->fr_address
,
1532 S_GET_NAME (fragP
->fr_symbol
));
1534 #if 0 /* This code works, but generates poor code and the compiler
1535 should never produce a sequence that requires it to be used. */
1537 /* A jump wont fit in 12 bits, make code which looks like
1543 int t
= buffer
[0] & 0x10;
1545 buffer
[highbyte
] = 0xa0; /* branch over move and disp */
1546 buffer
[lowbyte
] = 3;
1547 buffer
[highbyte
+2] = 0xd0 | JREG
; /* Build mov insn */
1548 buffer
[lowbyte
+2] = 0x00;
1550 buffer
[highbyte
+4] = 0; /* space for 32 bit jump disp */
1551 buffer
[lowbyte
+4] = 0;
1552 buffer
[highbyte
+6] = 0;
1553 buffer
[lowbyte
+6] = 0;
1555 buffer
[highbyte
+8] = 0x40 | JREG
; /* Build jmp @JREG */
1556 buffer
[lowbyte
+8] = t
? 0xb : 0x2b;
1558 buffer
[highbyte
+10] = 0x20; /* build nop */
1559 buffer
[lowbyte
+10] = 0x0b;
1561 /* Make reloc for the long disp */
1569 fragP
->fr_fix
+= UNCOND32_LENGTH
;
1576 case C (COND_JUMP
, COND12
):
1577 case C (COND_JUMP_DELAY
, COND12
):
1578 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */
1579 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
1580 was due to gas incorrectly relaxing an out-of-range conditional
1581 branch with delay slot. It turned:
1582 bf.s L6 (slot mov.l r12,@(44,r0))
1585 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
1587 32: 10 cb mov.l r12,@(44,r0)
1588 Therefore, branches with delay slots have to be handled
1589 differently from ones without delay slots. */
1591 unsigned char *buffer
=
1592 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
1593 int highbyte
= target_big_endian
? 0 : 1;
1594 int lowbyte
= target_big_endian
? 1 : 0;
1595 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
1597 /* Toggle the true/false bit of the bcond. */
1598 buffer
[highbyte
] ^= 0x2;
1600 /* If this is a dalayed branch, we may not put the the bra in the
1601 slot. So we change it to a non-delayed branch, like that:
1602 b! cond slot_label; bra disp; slot_label: slot_insn
1603 ??? We should try if swapping the conditional branch and
1604 its delay-slot insn already makes the branch reach. */
1606 /* Build a relocation to six / four bytes farther on. */
1607 subseg_change (seg
, 0);
1608 fix_new (fragP
, fragP
->fr_fix
, 2,
1609 #ifdef BFD_ASSEMBLER
1610 section_symbol (seg
),
1612 seg_info (seg
)->dot
,
1614 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
1615 1, BFD_RELOC_SH_PCDISP8BY2
);
1617 /* Set up a jump instruction. */
1618 buffer
[highbyte
+ 2] = 0xa0;
1619 buffer
[lowbyte
+ 2] = 0;
1620 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
1621 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
1625 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
1630 /* Fill in a NOP instruction. */
1631 buffer
[highbyte
+ 4] = 0x0;
1632 buffer
[lowbyte
+ 4] = 0x9;
1641 case C (COND_JUMP
, COND32
):
1642 case C (COND_JUMP_DELAY
, COND32
):
1643 case C (COND_JUMP
, UNDEF_WORD_DISP
):
1644 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
1645 if (fragP
->fr_symbol
== NULL
)
1646 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
1647 (unsigned long) fragP
->fr_address
);
1648 else if (S_IS_DEFINED (fragP
->fr_symbol
))
1649 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
1650 (unsigned long) fragP
->fr_address
,
1651 S_GET_NAME (fragP
->fr_symbol
));
1653 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
1654 (unsigned long) fragP
->fr_address
,
1655 S_GET_NAME (fragP
->fr_symbol
));
1657 #if 0 /* This code works, but generates poor code, and the compiler
1658 should never produce a sequence that requires it to be used. */
1660 /* A bcond won't fit and it won't go into a 12 bit
1661 displacement either, the code sequence looks like:
1670 buffer
[0] ^= 0x2; /* Toggle T/F bit */
1672 buffer
[1] = 5; /* branch over mov, jump, nop and ptr */
1673 buffer
[2] = 0xd0 | JREG
; /* Build mov insn */
1675 buffer
[4] = 0x40 | JREG
; /* Build jmp @JREG */
1677 buffer
[6] = 0x20; /* build nop */
1679 buffer
[8] = 0; /* space for 32 bit jump disp */
1685 /* Make reloc for the long disp */
1693 fragP
->fr_fix
+= COND32_LENGTH
;
1704 if (donerelax
&& !sh_relax
)
1705 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
1706 _("overflow in branch to %s; converted into longer instruction sequence"),
1707 (fragP
->fr_symbol
!= NULL
1708 ? S_GET_NAME (fragP
->fr_symbol
)
1713 DEFUN (md_section_align
, (seg
, size
),
1717 #ifdef BFD_ASSEMBLER
1720 #else /* ! OBJ_ELF */
1721 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
1722 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
1723 #endif /* ! OBJ_ELF */
1724 #else /* ! BFD_ASSEMBLER */
1725 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
1726 & (-1 << section_alignment
[(int) seg
]));
1727 #endif /* ! BFD_ASSEMBLER */
1730 /* This static variable is set by s_uacons to tell sh_cons_align that
1731 the expession does not need to be aligned. */
1733 static int sh_no_align_cons
= 0;
1735 /* This handles the unaligned space allocation pseudo-ops, such as
1736 .uaword. .uaword is just like .word, but the value does not need
1743 /* Tell sh_cons_align not to align this value. */
1744 sh_no_align_cons
= 1;
1748 /* If a .word, et. al., pseud-op is seen, warn if the value is not
1749 aligned correctly. Note that this can cause warnings to be issued
1750 when assembling initialized structured which were declared with the
1751 packed attribute. FIXME: Perhaps we should require an option to
1752 enable this warning? */
1755 sh_cons_align (nbytes
)
1761 if (sh_no_align_cons
)
1763 /* This is an unaligned pseudo-op. */
1764 sh_no_align_cons
= 0;
1769 while ((nbytes
& 1) == 0)
1778 if (now_seg
== absolute_section
)
1780 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
1781 as_warn (_("misaligned data"));
1785 p
= frag_var (rs_align_code
, 1, 1, (relax_substateT
) 0,
1786 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
1788 record_alignment (now_seg
, nalign
);
1791 /* When relaxing, we need to output a reloc for any .align directive
1792 that requests alignment to a four byte boundary or larger. This is
1793 also where we check for misaligned data. */
1796 sh_handle_align (frag
)
1800 && frag
->fr_type
== rs_align
1801 && frag
->fr_address
+ frag
->fr_fix
> 0
1802 && frag
->fr_offset
> 1
1803 && now_seg
!= bss_section
)
1804 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
1805 BFD_RELOC_SH_ALIGN
);
1807 if (frag
->fr_type
== rs_align_code
1808 && frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
!= 0)
1809 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
1812 /* This macro decides whether a particular reloc is an entry in a
1813 switch table. It is used when relaxing, because the linker needs
1814 to know about all such entries so that it can adjust them if
1817 #ifdef BFD_ASSEMBLER
1818 #define SWITCH_TABLE_CONS(fix) (0)
1820 #define SWITCH_TABLE_CONS(fix) \
1821 ((fix)->fx_r_type == 0 \
1822 && ((fix)->fx_size == 2 \
1823 || (fix)->fx_size == 1 \
1824 || (fix)->fx_size == 4))
1827 #define SWITCH_TABLE(fix) \
1828 ((fix)->fx_addsy != NULL \
1829 && (fix)->fx_subsy != NULL \
1830 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
1831 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
1832 && ((fix)->fx_r_type == BFD_RELOC_32 \
1833 || (fix)->fx_r_type == BFD_RELOC_16 \
1834 || (fix)->fx_r_type == BFD_RELOC_8 \
1835 || SWITCH_TABLE_CONS (fix)))
1837 /* See whether we need to force a relocation into the output file.
1838 This is used to force out switch and PC relative relocations when
1842 sh_force_relocation (fix
)
1846 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1847 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1853 return (fix
->fx_pcrel
1854 || SWITCH_TABLE (fix
)
1855 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
1856 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
1857 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
1858 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
1859 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
1864 sh_fix_adjustable (fixP
)
1868 if (fixP
->fx_addsy
== NULL
)
1871 /* We need the symbol name for the VTABLE entries */
1872 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1873 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1880 /* Apply a fixup to the object file. */
1882 #ifdef BFD_ASSEMBLER
1884 md_apply_fix (fixP
, valp
)
1889 md_apply_fix (fixP
, val
)
1894 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
1895 int lowbyte
= target_big_endian
? 1 : 0;
1896 int highbyte
= target_big_endian
? 0 : 1;
1897 #ifdef BFD_ASSEMBLER
1903 #ifdef BFD_ASSEMBLER
1904 /* adjust_reloc_syms won't convert a reloc against a weak symbol
1905 into a reloc against a section, but bfd_install_relocation will
1906 screw up if the symbol is defined, so we have to adjust val here
1907 to avoid the screw up later. */
1908 if (fixP
->fx_addsy
!= NULL
1909 && S_IS_WEAK (fixP
->fx_addsy
))
1910 val
-= S_GET_VALUE (fixP
->fx_addsy
);
1913 #ifndef BFD_ASSEMBLER
1914 if (fixP
->fx_r_type
== 0)
1916 if (fixP
->fx_size
== 2)
1917 fixP
->fx_r_type
= BFD_RELOC_16
;
1918 else if (fixP
->fx_size
== 4)
1919 fixP
->fx_r_type
= BFD_RELOC_32
;
1920 else if (fixP
->fx_size
== 1)
1921 fixP
->fx_r_type
= BFD_RELOC_8
;
1929 switch (fixP
->fx_r_type
)
1931 case BFD_RELOC_SH_IMM4
:
1933 *buf
= (*buf
& 0xf0) | (val
& 0xf);
1936 case BFD_RELOC_SH_IMM4BY2
:
1939 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
1942 case BFD_RELOC_SH_IMM4BY4
:
1945 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
1948 case BFD_RELOC_SH_IMM8BY2
:
1954 case BFD_RELOC_SH_IMM8BY4
:
1961 case BFD_RELOC_SH_IMM8
:
1962 /* Sometimes the 8 bit value is sign extended (e.g., add) and
1963 sometimes it is not (e.g., and). We permit any 8 bit value.
1964 Note that adding further restrictions may invalidate
1965 reasonable looking assembly code, such as ``and -0x1,r0''. */
1971 case BFD_RELOC_SH_PCRELIMM8BY4
:
1972 /* The lower two bits of the PC are cleared before the
1973 displacement is added in. We can assume that the destination
1974 is on a 4 byte bounday. If this instruction is also on a 4
1975 byte boundary, then we want
1977 and target - here is a multiple of 4.
1978 Otherwise, we are on a 2 byte boundary, and we want
1979 (target - (here - 2)) / 4
1980 and target - here is not a multiple of 4. Computing
1981 (target - (here - 2)) / 4 == (target - here + 2) / 4
1982 works for both cases, since in the first case the addition of
1983 2 will be removed by the division. target - here is in the
1985 val
= (val
+ 2) / 4;
1987 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
1991 case BFD_RELOC_SH_PCRELIMM8BY2
:
1994 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
1998 case BFD_RELOC_SH_PCDISP8BY2
:
2000 if (val
< -0x80 || val
> 0x7f)
2001 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2005 case BFD_RELOC_SH_PCDISP12BY2
:
2007 if (val
< -0x800 || val
>= 0x7ff)
2008 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2009 buf
[lowbyte
] = val
& 0xff;
2010 buf
[highbyte
] |= (val
>> 8) & 0xf;
2014 if (! target_big_endian
)
2031 if (! target_big_endian
)
2043 case BFD_RELOC_SH_USES
:
2044 /* Pass the value into sh_coff_reloc_mangle. */
2045 fixP
->fx_addnumber
= val
;
2048 case BFD_RELOC_SH_COUNT
:
2049 case BFD_RELOC_SH_ALIGN
:
2050 case BFD_RELOC_SH_CODE
:
2051 case BFD_RELOC_SH_DATA
:
2052 case BFD_RELOC_SH_LABEL
:
2053 /* Nothing to do here. */
2056 case BFD_RELOC_VTABLE_INHERIT
:
2057 case BFD_RELOC_VTABLE_ENTRY
:
2067 if ((val
& ((1 << shift
) - 1)) != 0)
2068 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
2072 val
= ((val
>> shift
)
2073 | ((long) -1 & ~ ((long) -1 >> shift
)));
2075 if (max
!= 0 && (val
< min
|| val
> max
))
2076 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
2078 #ifdef BFD_ASSEMBLER
2083 /* Called just before address relaxation. Return the length
2084 by which a fragment must grow to reach it's destination. */
2087 md_estimate_size_before_relax (fragP
, segment_type
)
2088 register fragS
*fragP
;
2089 register segT segment_type
;
2091 switch (fragP
->fr_subtype
)
2093 case C (UNCOND_JUMP
, UNDEF_DISP
):
2094 /* used to be a branch to somewhere which was unknown */
2095 if (!fragP
->fr_symbol
)
2097 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2098 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2100 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2102 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2103 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2107 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
2108 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2109 return md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2115 case C (COND_JUMP
, UNDEF_DISP
):
2116 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
2117 /* used to be a branch to somewhere which was unknown */
2118 if (fragP
->fr_symbol
2119 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2121 int what
= GET_WHAT (fragP
->fr_subtype
);
2122 /* Got a symbol and it's defined in this segment, become byte
2123 sized - maybe it will fix up */
2124 fragP
->fr_subtype
= C (what
, COND8
);
2125 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2127 else if (fragP
->fr_symbol
)
2129 int what
= GET_WHAT (fragP
->fr_subtype
);
2130 /* Its got a segment, but its not ours, so it will always be long */
2131 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
2132 fragP
->fr_var
= md_relax_table
[C (what
, COND32
)].rlx_length
;
2133 return md_relax_table
[C (what
, COND32
)].rlx_length
;
2137 int what
= GET_WHAT (fragP
->fr_subtype
);
2138 /* We know the abs value */
2139 fragP
->fr_subtype
= C (what
, COND8
);
2140 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2145 return fragP
->fr_var
;
2148 /* Put number into target byte order */
2151 md_number_to_chars (ptr
, use
, nbytes
)
2156 if (! target_big_endian
)
2157 number_to_chars_littleendian (ptr
, use
, nbytes
);
2159 number_to_chars_bigendian (ptr
, use
, nbytes
);
2163 md_pcrel_from (fixP
)
2166 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
2172 tc_coff_sizemachdep (frag
)
2175 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
2178 #endif /* OBJ_COFF */
2180 /* When we align the .text section, insert the correct NOP pattern. */
2183 sh_do_align (n
, fill
, len
, max
)
2190 #ifdef BFD_ASSEMBLER
2191 && (now_seg
->flags
& SEC_CODE
) != 0
2193 && now_seg
!= data_section
2194 && now_seg
!= bss_section
2198 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2199 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2201 /* First align to a 2 byte boundary, in case there is an odd
2203 frag_align (1, 0, 0);
2204 if (target_big_endian
)
2205 frag_align_pattern (n
, big_nop_pattern
, sizeof big_nop_pattern
, max
);
2207 frag_align_pattern (n
, little_nop_pattern
, sizeof little_nop_pattern
,
2215 #ifndef BFD_ASSEMBLER
2218 /* Map BFD relocs to SH COFF relocs. */
2222 bfd_reloc_code_real_type bfd_reloc
;
2226 static const struct reloc_map coff_reloc_map
[] =
2228 { BFD_RELOC_32
, R_SH_IMM32
},
2229 { BFD_RELOC_16
, R_SH_IMM16
},
2230 { BFD_RELOC_8
, R_SH_IMM8
},
2231 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
2232 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
2233 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
2234 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
2235 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
2236 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
2237 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
2238 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
2239 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
2240 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
2241 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
2242 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
2243 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
2244 { BFD_RELOC_SH_USES
, R_SH_USES
},
2245 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
2246 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
2247 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
2248 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
2249 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
2250 { BFD_RELOC_UNUSED
, 0 }
2253 /* Adjust a reloc for the SH. This is similar to the generic code,
2254 but does some minor tweaking. */
2257 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
2258 segment_info_type
*seg
;
2260 struct internal_reloc
*intr
;
2263 symbolS
*symbol_ptr
= fix
->fx_addsy
;
2266 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
2268 if (! SWITCH_TABLE (fix
))
2270 const struct reloc_map
*rm
;
2272 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
2273 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
2275 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
2276 as_bad_where (fix
->fx_file
, fix
->fx_line
,
2277 _("Can not represent %s relocation in this object file format"),
2278 bfd_get_reloc_code_name (fix
->fx_r_type
));
2279 intr
->r_type
= rm
->sh_reloc
;
2286 if (fix
->fx_r_type
== BFD_RELOC_16
)
2287 intr
->r_type
= R_SH_SWITCH16
;
2288 else if (fix
->fx_r_type
== BFD_RELOC_8
)
2289 intr
->r_type
= R_SH_SWITCH8
;
2290 else if (fix
->fx_r_type
== BFD_RELOC_32
)
2291 intr
->r_type
= R_SH_SWITCH32
;
2295 /* For a switch reloc, we set r_offset to the difference between
2296 the reloc address and the subtrahend. When the linker is
2297 doing relaxing, it can use the determine the starting and
2298 ending points of the switch difference expression. */
2299 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
2302 /* PC relative relocs are always against the current section. */
2303 if (symbol_ptr
== NULL
)
2305 switch (fix
->fx_r_type
)
2307 case BFD_RELOC_SH_PCRELIMM8BY2
:
2308 case BFD_RELOC_SH_PCRELIMM8BY4
:
2309 case BFD_RELOC_SH_PCDISP8BY2
:
2310 case BFD_RELOC_SH_PCDISP12BY2
:
2311 case BFD_RELOC_SH_USES
:
2312 symbol_ptr
= seg
->dot
;
2319 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
2321 /* We can't store the offset in the object file, since this
2322 reloc does not take up any space, so we store it in r_offset.
2323 The fx_addnumber field was set in md_apply_fix. */
2324 intr
->r_offset
= fix
->fx_addnumber
;
2326 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
2328 /* We can't store the count in the object file, since this reloc
2329 does not take up any space, so we store it in r_offset. The
2330 fx_offset field was set when the fixup was created in
2331 sh_coff_frob_file. */
2332 intr
->r_offset
= fix
->fx_offset
;
2333 /* This reloc is always absolute. */
2336 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
2338 /* Store the alignment in the r_offset field. */
2339 intr
->r_offset
= fix
->fx_offset
;
2340 /* This reloc is always absolute. */
2343 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
2344 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2345 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
2347 /* These relocs are always absolute. */
2351 /* Turn the segment of the symbol into an offset. */
2352 if (symbol_ptr
!= NULL
)
2354 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
2356 intr
->r_symndx
= dot
->sy_number
;
2358 intr
->r_symndx
= symbol_ptr
->sy_number
;
2361 intr
->r_symndx
= -1;
2364 #endif /* OBJ_COFF */
2365 #endif /* ! BFD_ASSEMBLER */
2367 #ifdef BFD_ASSEMBLER
2369 /* Create a reloc. */
2372 tc_gen_reloc (section
, fixp
)
2377 bfd_reloc_code_real_type r_type
;
2379 rel
= (arelent
*) xmalloc (sizeof (arelent
));
2380 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
2381 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2383 r_type
= fixp
->fx_r_type
;
2385 if (SWITCH_TABLE (fixp
))
2387 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
2388 if (r_type
== BFD_RELOC_16
)
2389 r_type
= BFD_RELOC_SH_SWITCH16
;
2390 else if (r_type
== BFD_RELOC_8
)
2391 r_type
= BFD_RELOC_8_PCREL
;
2392 else if (r_type
== BFD_RELOC_32
)
2393 r_type
= BFD_RELOC_SH_SWITCH32
;
2397 else if (r_type
== BFD_RELOC_SH_USES
)
2398 rel
->addend
= fixp
->fx_addnumber
;
2399 else if (r_type
== BFD_RELOC_SH_COUNT
)
2400 rel
->addend
= fixp
->fx_offset
;
2401 else if (r_type
== BFD_RELOC_SH_ALIGN
)
2402 rel
->addend
= fixp
->fx_offset
;
2403 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
2404 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
2405 rel
->addend
= fixp
->fx_offset
;
2406 else if (fixp
->fx_pcrel
)
2407 rel
->addend
= fixp
->fx_addnumber
;
2411 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
2412 if (rel
->howto
== NULL
)
2414 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2415 _("Cannot represent relocation type %s"),
2416 bfd_get_reloc_code_name (r_type
));
2417 /* Set howto to a garbage value so that we can keep going. */
2418 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
2419 assert (rel
->howto
!= NULL
);
2425 #endif /* BFD_ASSEMBLER */