1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
38 #include "dw2gencfi.h"
44 expressionS immediate
;
48 const char comment_chars
[] = "!";
49 const char line_separator_chars
[] = ";";
50 const char line_comment_chars
[] = "!#";
52 static void s_uses (int);
53 static void s_uacons (int);
56 static void sh_elf_cons (int);
58 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
62 big (int ignore ATTRIBUTE_UNUSED
)
64 if (! target_big_endian
)
65 as_bad (_("directive .big encountered when option -big required"));
67 /* Stop further messages. */
68 target_big_endian
= 1;
72 little (int ignore ATTRIBUTE_UNUSED
)
74 if (target_big_endian
)
75 as_bad (_("directive .little encountered when option -little required"));
77 /* Stop further messages. */
78 target_big_endian
= 0;
81 /* This table describes all the machine specific pseudo-ops the assembler
82 has to support. The fields are:
83 pseudo-op name without dot
84 function to call to execute this pseudo-op
85 Integer arg to pass to the function. */
87 const pseudo_typeS md_pseudo_table
[] =
90 {"long", sh_elf_cons
, 4},
91 {"int", sh_elf_cons
, 4},
92 {"word", sh_elf_cons
, 2},
93 {"short", sh_elf_cons
, 2},
99 {"form", listing_psize
, 0},
100 {"little", little
, 0},
101 {"heading", listing_title
, 0},
102 {"import", s_ignore
, 0},
103 {"page", listing_eject
, 0},
104 {"program", s_ignore
, 0},
106 {"uaword", s_uacons
, 2},
107 {"ualong", s_uacons
, 4},
108 {"uaquad", s_uacons
, 8},
109 {"2byte", s_uacons
, 2},
110 {"4byte", s_uacons
, 4},
111 {"8byte", s_uacons
, 8},
113 {"mode", s_sh64_mode
, 0 },
115 /* Have the old name too. */
116 {"isa", s_sh64_mode
, 0 },
118 /* Assert that the right ABI is used. */
119 {"abi", s_sh64_abi
, 0 },
121 { "vtable_inherit", sh64_vtable_inherit
, 0 },
122 { "vtable_entry", sh64_vtable_entry
, 0 },
123 #endif /* HAVE_SH64 */
127 /*int md_reloc_size; */
129 int sh_relax
; /* set if -relax seen */
131 /* Whether -small was seen. */
135 /* preset architecture set, if given; zero otherwise. */
137 static int preset_target_arch
;
139 /* The bit mask of architectures that could
140 accommodate the insns seen so far. */
141 static int valid_arch
;
143 const char EXP_CHARS
[] = "eE";
145 /* Chars that mean this number is a floating point constant. */
148 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
150 #define C(a,b) ENCODE_RELAX(a,b)
152 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
153 #define GET_WHAT(x) ((x>>4))
155 /* These are the three types of relaxable instruction. */
156 /* These are the types of relaxable instructions; except for END which is
159 #define COND_JUMP_DELAY 2
160 #define UNCOND_JUMP 3
164 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
165 #define SH64PCREL16_32 4
166 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
167 #define SH64PCREL16_64 5
169 /* Variants of the above for adjusting the insn to PTA or PTB according to
171 #define SH64PCREL16PT_32 6
172 #define SH64PCREL16PT_64 7
174 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
175 #define MOVI_IMM_32 8
176 #define MOVI_IMM_32_PCREL 9
177 #define MOVI_IMM_64 10
178 #define MOVI_IMM_64_PCREL 11
181 #else /* HAVE_SH64 */
185 #endif /* HAVE_SH64 */
191 #define UNDEF_WORD_DISP 4
197 #define UNDEF_SH64PCREL 0
198 #define SH64PCREL16 1
199 #define SH64PCREL32 2
200 #define SH64PCREL48 3
201 #define SH64PCREL64 4
202 #define SH64PCRELPLT 5
210 #define MOVI_GOTOFF 6
212 #endif /* HAVE_SH64 */
214 /* Branch displacements are from the address of the branch plus
215 four, thus all minimum and maximum values have 4 added to them. */
218 #define COND8_LENGTH 2
220 /* There is one extra instruction before the branch, so we must add
221 two more bytes to account for it. */
222 #define COND12_F 4100
223 #define COND12_M -4090
224 #define COND12_LENGTH 6
226 #define COND12_DELAY_LENGTH 4
228 /* ??? The minimum and maximum values are wrong, but this does not matter
229 since this relocation type is not supported yet. */
230 #define COND32_F (1<<30)
231 #define COND32_M -(1<<30)
232 #define COND32_LENGTH 14
234 #define UNCOND12_F 4098
235 #define UNCOND12_M -4092
236 #define UNCOND12_LENGTH 2
238 /* ??? The minimum and maximum values are wrong, but this does not matter
239 since this relocation type is not supported yet. */
240 #define UNCOND32_F (1<<30)
241 #define UNCOND32_M -(1<<30)
242 #define UNCOND32_LENGTH 14
245 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
246 TRd" as is the current insn, so no extra length. Note that the "reach"
247 is calculated from the address *after* that insn, but the offset in the
248 insn is calculated from the beginning of the insn. We also need to
249 take into account the implicit 1 coded as the "A" in PTA when counting
250 forward. If PTB reaches an odd address, we trap that as an error
251 elsewhere, so we don't have to have different relaxation entries. We
252 don't add a one to the negative range, since PTB would then have the
253 farthest backward-reaching value skipped, not generated at relaxation. */
254 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
255 #define SH64PCREL16_M (-32768 * 4 - 4)
256 #define SH64PCREL16_LENGTH 0
258 /* The next step is to change that PT insn into
259 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
260 SHORI (label - datalabel Ln) & 65535, R25
263 which means two extra insns, 8 extra bytes. This is the limit for the
266 The expressions look a bit bad since we have to adjust this to avoid overflow on a
268 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
269 #define SH64PCREL32_LENGTH (2 * 4)
271 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
273 #if BFD_HOST_64BIT_LONG
274 /* The "reach" type is long, so we can only do this for a 64-bit-long
276 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
277 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
278 #define SH64PCREL48_M (((long) -1 << 47) - 4)
279 #define SH64PCREL48_LENGTH (3 * 4)
281 /* If the host does not have 64-bit longs, just make this state identical
282 in reach to the 32-bit state. Note that we have a slightly incorrect
283 reach, but the correct one above will overflow a 32-bit number. */
284 #define SH64PCREL32_M (((long) -1 << 30) * 2)
285 #define SH64PCREL48_F SH64PCREL32_F
286 #define SH64PCREL48_M SH64PCREL32_M
287 #define SH64PCREL48_LENGTH (3 * 4)
288 #endif /* BFD_HOST_64BIT_LONG */
290 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
292 #define SH64PCREL64_LENGTH (4 * 4)
294 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
295 SH64PCREL expansions. The PCREL one is similar, but the other has no
296 pc-relative reach; it must be fully expanded in
297 shmedia_md_estimate_size_before_relax. */
298 #define MOVI_16_LENGTH 0
299 #define MOVI_16_F (32767 - 4)
300 #define MOVI_16_M (-32768 - 4)
301 #define MOVI_32_LENGTH 4
302 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
303 #define MOVI_48_LENGTH 8
305 #if BFD_HOST_64BIT_LONG
306 /* The "reach" type is long, so we can only do this for a 64-bit-long
308 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
309 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
310 #define MOVI_48_M (((long) -1 << 47) - 4)
312 /* If the host does not have 64-bit longs, just make this state identical
313 in reach to the 32-bit state. Note that we have a slightly incorrect
314 reach, but the correct one above will overflow a 32-bit number. */
315 #define MOVI_32_M (((long) -1 << 30) * 2)
316 #define MOVI_48_F MOVI_32_F
317 #define MOVI_48_M MOVI_32_M
318 #endif /* BFD_HOST_64BIT_LONG */
320 #define MOVI_64_LENGTH 12
321 #endif /* HAVE_SH64 */
323 #define EMPTY { 0, 0, 0, 0 }
325 const relax_typeS md_relax_table
[C (END
, 0)] = {
326 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
327 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
330 /* C (COND_JUMP, COND8) */
331 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
332 /* C (COND_JUMP, COND12) */
333 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
334 /* C (COND_JUMP, COND32) */
335 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
336 /* C (COND_JUMP, UNDEF_WORD_DISP) */
337 { 0, 0, COND32_LENGTH
, 0, },
339 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
342 /* C (COND_JUMP_DELAY, COND8) */
343 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
344 /* C (COND_JUMP_DELAY, COND12) */
345 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
346 /* C (COND_JUMP_DELAY, COND32) */
347 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
348 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
349 { 0, 0, COND32_LENGTH
, 0, },
351 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
354 /* C (UNCOND_JUMP, UNCOND12) */
355 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
356 /* C (UNCOND_JUMP, UNCOND32) */
357 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
359 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
360 { 0, 0, UNCOND32_LENGTH
, 0, },
362 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
365 /* C (SH64PCREL16_32, SH64PCREL16) */
367 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
368 /* C (SH64PCREL16_32, SH64PCREL32) */
369 { 0, 0, SH64PCREL32_LENGTH
, 0 },
371 /* C (SH64PCREL16_32, SH64PCRELPLT) */
372 { 0, 0, SH64PCREL32_LENGTH
, 0 },
374 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
376 /* C (SH64PCREL16_64, SH64PCREL16) */
378 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
379 /* C (SH64PCREL16_64, SH64PCREL32) */
380 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
381 /* C (SH64PCREL16_64, SH64PCREL48) */
382 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
383 /* C (SH64PCREL16_64, SH64PCREL64) */
384 { 0, 0, SH64PCREL64_LENGTH
, 0 },
385 /* C (SH64PCREL16_64, SH64PCRELPLT) */
386 { 0, 0, SH64PCREL64_LENGTH
, 0 },
388 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
390 /* C (SH64PCREL16PT_32, SH64PCREL16) */
392 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
393 /* C (SH64PCREL16PT_32, SH64PCREL32) */
394 { 0, 0, SH64PCREL32_LENGTH
, 0 },
396 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
397 { 0, 0, SH64PCREL32_LENGTH
, 0 },
399 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
401 /* C (SH64PCREL16PT_64, SH64PCREL16) */
403 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
404 /* C (SH64PCREL16PT_64, SH64PCREL32) */
408 C (SH64PCREL16PT_64
, SH64PCREL48
) },
409 /* C (SH64PCREL16PT_64, SH64PCREL48) */
410 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
411 /* C (SH64PCREL16PT_64, SH64PCREL64) */
412 { 0, 0, SH64PCREL64_LENGTH
, 0 },
413 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
414 { 0, 0, SH64PCREL64_LENGTH
, 0},
416 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
418 /* C (MOVI_IMM_32, UNDEF_MOVI) */
419 { 0, 0, MOVI_32_LENGTH
, 0 },
420 /* C (MOVI_IMM_32, MOVI_16) */
421 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
422 /* C (MOVI_IMM_32, MOVI_32) */
423 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
425 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
426 { 0, 0, MOVI_32_LENGTH
, 0 },
427 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
429 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
431 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
432 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
433 { 0, 0, MOVI_32_LENGTH
, 0 },
435 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
436 { 0, 0, MOVI_32_LENGTH
, 0 },
438 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
439 { 0, 0, MOVI_32_LENGTH
, 0 },
440 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
442 /* C (MOVI_IMM_64, UNDEF_MOVI) */
443 { 0, 0, MOVI_64_LENGTH
, 0 },
444 /* C (MOVI_IMM_64, MOVI_16) */
445 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
446 /* C (MOVI_IMM_64, MOVI_32) */
447 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
448 /* C (MOVI_IMM_64, MOVI_48) */
449 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
450 /* C (MOVI_IMM_64, MOVI_64) */
451 { 0, 0, MOVI_64_LENGTH
, 0 },
453 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
454 { 0, 0, MOVI_64_LENGTH
, 0 },
455 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
457 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
459 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
460 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
461 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
462 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
463 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
464 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
465 { 0, 0, MOVI_64_LENGTH
, 0 },
466 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
467 { 0, 0, MOVI_64_LENGTH
, 0 },
469 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
470 { 0, 0, MOVI_64_LENGTH
, 0 },
471 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
473 #endif /* HAVE_SH64 */
479 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
483 /* Determinet whether the symbol needs any kind of PIC relocation. */
486 sh_PIC_related_p (symbolS
*sym
)
493 if (sym
== GOT_symbol
)
497 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
501 exp
= symbol_get_value_expression (sym
);
503 return (exp
->X_op
== O_PIC_reloc
504 || sh_PIC_related_p (exp
->X_add_symbol
)
505 || sh_PIC_related_p (exp
->X_op_symbol
));
508 /* Determine the relocation type to be used to represent the
509 expression, that may be rearranged. */
512 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
514 expressionS
*exp
= main_exp
;
516 /* This is here for backward-compatibility only. GCC used to generated:
518 f@PLT + . - (.LPCS# + 2)
520 but we'd rather be able to handle this as a PIC-related reference
521 plus/minus a symbol. However, gas' parser gives us:
523 O_subtract (O_add (f@PLT, .), .LPCS#+2)
525 so we attempt to transform this into:
527 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
529 which we can handle simply below. */
530 if (exp
->X_op
== O_subtract
)
532 if (sh_PIC_related_p (exp
->X_op_symbol
))
535 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
537 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
540 if (exp
&& exp
->X_op
== O_add
541 && sh_PIC_related_p (exp
->X_add_symbol
))
543 symbolS
*sym
= exp
->X_add_symbol
;
545 exp
->X_op
= O_subtract
;
546 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
548 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
549 main_exp
->X_add_symbol
= sym
;
551 main_exp
->X_add_number
+= exp
->X_add_number
;
552 exp
->X_add_number
= 0;
557 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
560 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
563 if (exp
->X_add_symbol
564 && (exp
->X_add_symbol
== GOT_symbol
566 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
570 case BFD_RELOC_SH_IMM_LOW16
:
571 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
574 case BFD_RELOC_SH_IMM_MEDLOW16
:
575 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
578 case BFD_RELOC_SH_IMM_MEDHI16
:
579 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
582 case BFD_RELOC_SH_IMM_HI16
:
583 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
587 case BFD_RELOC_UNUSED
:
588 *r_type_p
= BFD_RELOC_SH_GOTPC
;
597 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
599 *r_type_p
= BFD_RELOC_SH_GOTPC
;
603 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
608 if (exp
->X_op
== O_PIC_reloc
)
614 case BFD_RELOC_UNUSED
:
615 *r_type_p
= exp
->X_md
;
618 case BFD_RELOC_SH_IMM_LOW16
:
621 case BFD_RELOC_32_GOTOFF
:
622 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
625 case BFD_RELOC_SH_GOTPLT32
:
626 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
629 case BFD_RELOC_32_GOT_PCREL
:
630 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
633 case BFD_RELOC_32_PLT_PCREL
:
634 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
642 case BFD_RELOC_SH_IMM_MEDLOW16
:
645 case BFD_RELOC_32_GOTOFF
:
646 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
649 case BFD_RELOC_SH_GOTPLT32
:
650 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
653 case BFD_RELOC_32_GOT_PCREL
:
654 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
657 case BFD_RELOC_32_PLT_PCREL
:
658 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
666 case BFD_RELOC_SH_IMM_MEDHI16
:
669 case BFD_RELOC_32_GOTOFF
:
670 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
673 case BFD_RELOC_SH_GOTPLT32
:
674 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
677 case BFD_RELOC_32_GOT_PCREL
:
678 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
681 case BFD_RELOC_32_PLT_PCREL
:
682 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
690 case BFD_RELOC_SH_IMM_HI16
:
693 case BFD_RELOC_32_GOTOFF
:
694 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
697 case BFD_RELOC_SH_GOTPLT32
:
698 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
701 case BFD_RELOC_32_GOT_PCREL
:
702 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
705 case BFD_RELOC_32_PLT_PCREL
:
706 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
718 *r_type_p
= exp
->X_md
;
721 exp
->X_op
= O_symbol
;
724 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
725 main_exp
->X_add_number
+= exp
->X_add_number
;
729 return (sh_PIC_related_p (exp
->X_add_symbol
)
730 || sh_PIC_related_p (exp
->X_op_symbol
));
735 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
738 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
740 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
742 if (sh_check_fixup (exp
, &r_type
))
743 as_bad (_("Invalid PIC expression."));
745 if (r_type
== BFD_RELOC_UNUSED
)
749 r_type
= BFD_RELOC_8
;
753 r_type
= BFD_RELOC_16
;
757 r_type
= BFD_RELOC_32
;
762 r_type
= BFD_RELOC_64
;
772 as_bad (_("unsupported BFD relocation size %u"), size
);
773 r_type
= BFD_RELOC_UNUSED
;
776 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
779 /* The regular cons() function, that reads constants, doesn't support
780 suffixes such as @GOT, @GOTOFF and @PLT, that generate
781 machine-specific relocation types. So we must define it here. */
782 /* Clobbers input_line_pointer, checks end-of-line. */
783 /* NBYTES 1=.byte, 2=.word, 4=.long */
785 sh_elf_cons (register int nbytes
)
791 /* Update existing range to include a previous insn, if there was one. */
792 sh64_update_contents_mark (TRUE
);
794 /* We need to make sure the contents type is set to data. */
797 #endif /* HAVE_SH64 */
799 if (is_it_end_of_statement ())
801 demand_empty_rest_of_line ();
806 md_cons_align (nbytes
);
812 emit_expr (&exp
, (unsigned int) nbytes
);
814 while (*input_line_pointer
++ == ',');
816 input_line_pointer
--; /* Put terminator back into stream. */
817 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
819 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
822 demand_empty_rest_of_line ();
827 /* This function is called once, at assembler startup time. This should
828 set up all the tables, etc that the MD part of the assembler needs. */
833 const sh_opcode_info
*opcode
;
834 char *prev_name
= "";
838 = preset_target_arch
? preset_target_arch
: arch_sh1_up
& ~arch_sh_dsp_up
;
839 valid_arch
= target_arch
;
845 opcode_hash_control
= hash_new ();
847 /* Insert unique names into hash table. */
848 for (opcode
= sh_table
; opcode
->name
; opcode
++)
850 if (strcmp (prev_name
, opcode
->name
) != 0)
852 if (! (opcode
->arch
& target_arch
))
854 prev_name
= opcode
->name
;
855 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
862 static int reg_x
, reg_y
;
866 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
868 /* Try to parse a reg name. Return the number of chars consumed. */
871 parse_reg (char *src
, int *mode
, int *reg
)
873 char l0
= TOLOWER (src
[0]);
874 char l1
= l0
? TOLOWER (src
[1]) : 0;
876 /* We use ! IDENT_CHAR for the next character after the register name, to
877 make sure that we won't accidentally recognize a symbol name such as
878 'sram' or sr_ram as being a reference to the register 'sr'. */
884 if (src
[2] >= '0' && src
[2] <= '5'
885 && ! IDENT_CHAR ((unsigned char) src
[3]))
888 *reg
= 10 + src
[2] - '0';
892 if (l1
>= '0' && l1
<= '9'
893 && ! IDENT_CHAR ((unsigned char) src
[2]))
899 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
900 && ! IDENT_CHAR ((unsigned char) src
[7]))
907 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
912 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
923 if (! IDENT_CHAR ((unsigned char) src
[2]))
929 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
938 if (! IDENT_CHAR ((unsigned char) src
[2]))
944 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
952 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
953 && ! IDENT_CHAR ((unsigned char) src
[3]))
956 *reg
= 4 + (l1
- '0');
959 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
960 && ! IDENT_CHAR ((unsigned char) src
[3]))
963 *reg
= 6 + (l1
- '0');
966 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
967 && ! IDENT_CHAR ((unsigned char) src
[3]))
972 *reg
= n
| ((~n
& 2) << 1);
977 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
999 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
1000 && ! IDENT_CHAR ((unsigned char) src
[2]))
1003 *reg
= A_X0_NUM
+ l1
- '0';
1007 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1008 && ! IDENT_CHAR ((unsigned char) src
[2]))
1011 *reg
= A_Y0_NUM
+ l1
- '0';
1015 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1016 && ! IDENT_CHAR ((unsigned char) src
[2]))
1019 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1025 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1031 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1032 && ! IDENT_CHAR ((unsigned char) src
[3]))
1038 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1039 && ! IDENT_CHAR ((unsigned char) src
[3]))
1045 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1046 && ! IDENT_CHAR ((unsigned char) src
[3]))
1052 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1053 && ! IDENT_CHAR ((unsigned char) src
[3]))
1059 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1065 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1072 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1077 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1079 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1080 and use an uninitialized immediate. */
1084 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1085 && ! IDENT_CHAR ((unsigned char) src
[3]))
1090 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1091 && ! IDENT_CHAR ((unsigned char) src
[3]))
1097 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1098 && ! IDENT_CHAR ((unsigned char) src
[4]))
1100 if (TOLOWER (src
[3]) == 'l')
1105 if (TOLOWER (src
[3]) == 'h')
1111 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1112 && ! IDENT_CHAR ((unsigned char) src
[3]))
1117 if (l0
== 'f' && l1
== 'r')
1121 if (src
[3] >= '0' && src
[3] <= '5'
1122 && ! IDENT_CHAR ((unsigned char) src
[4]))
1125 *reg
= 10 + src
[3] - '0';
1129 if (src
[2] >= '0' && src
[2] <= '9'
1130 && ! IDENT_CHAR ((unsigned char) src
[3]))
1133 *reg
= (src
[2] - '0');
1137 if (l0
== 'd' && l1
== 'r')
1141 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1142 && ! IDENT_CHAR ((unsigned char) src
[4]))
1145 *reg
= 10 + src
[3] - '0';
1149 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1150 && ! IDENT_CHAR ((unsigned char) src
[3]))
1153 *reg
= (src
[2] - '0');
1157 if (l0
== 'x' && l1
== 'd')
1161 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1162 && ! IDENT_CHAR ((unsigned char) src
[4]))
1165 *reg
= 11 + src
[3] - '0';
1169 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1170 && ! IDENT_CHAR ((unsigned char) src
[3]))
1173 *reg
= (src
[2] - '0') + 1;
1177 if (l0
== 'f' && l1
== 'v')
1179 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1185 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1186 && ! IDENT_CHAR ((unsigned char) src
[3]))
1189 *reg
= (src
[2] - '0');
1193 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1194 && TOLOWER (src
[3]) == 'l'
1195 && ! IDENT_CHAR ((unsigned char) src
[4]))
1201 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1202 && TOLOWER (src
[3]) == 'c'
1203 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1209 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1210 && TOLOWER (src
[3]) == 'r'
1211 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1221 parse_exp (char *s
, sh_operand_info
*op
)
1226 save
= input_line_pointer
;
1227 input_line_pointer
= s
;
1228 expression (&op
->immediate
);
1229 if (op
->immediate
.X_op
== O_absent
)
1230 as_bad (_("missing operand"));
1232 else if (op
->immediate
.X_op
== O_PIC_reloc
1233 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1234 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1235 as_bad (_("misplaced PIC operand"));
1237 new = input_line_pointer
;
1238 input_line_pointer
= save
;
1242 /* The many forms of operand:
1245 @Rn Register indirect
1258 pr, gbr, vbr, macl, mach
1262 parse_at (char *src
, sh_operand_info
*op
)
1269 /* Must be predecrement. */
1272 len
= parse_reg (src
, &mode
, &(op
->reg
));
1273 if (mode
!= A_REG_N
)
1274 as_bad (_("illegal register after @-"));
1279 else if (src
[0] == '(')
1281 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1284 len
= parse_reg (src
, &mode
, &(op
->reg
));
1285 if (len
&& mode
== A_REG_N
)
1290 as_bad (_("must be @(r0,...)"));
1295 /* Now can be rn or gbr. */
1296 len
= parse_reg (src
, &mode
, &(op
->reg
));
1306 op
->type
= A_R0_GBR
;
1308 else if (mode
== A_REG_N
)
1310 op
->type
= A_IND_R0_REG_N
;
1314 as_bad (_("syntax error in @(r0,...)"));
1319 as_bad (_("syntax error in @(r0...)"));
1324 /* Must be an @(disp,.. thing). */
1325 src
= parse_exp (src
, op
);
1328 /* Now can be rn, gbr or pc. */
1329 len
= parse_reg (src
, &mode
, &op
->reg
);
1332 if (mode
== A_REG_N
)
1334 op
->type
= A_DISP_REG_N
;
1336 else if (mode
== A_GBR
)
1338 op
->type
= A_DISP_GBR
;
1340 else if (mode
== A_PC
)
1342 /* We want @(expr, pc) to uniformly address . + expr,
1343 no matter if expr is a constant, or a more complex
1344 expression, e.g. sym-. or sym1-sym2.
1345 However, we also used to accept @(sym,pc)
1346 as addressing sym, i.e. meaning the same as plain sym.
1347 Some existing code does use the @(sym,pc) syntax, so
1348 we give it the old semantics for now, but warn about
1349 its use, so that users have some time to fix their code.
1351 Note that due to this backward compatibility hack,
1352 we'll get unexpected results when @(offset, pc) is used,
1353 and offset is a symbol that is set later to an an address
1354 difference, or an external symbol that is set to an
1355 address difference in another source file, so we want to
1356 eventually remove it. */
1357 if (op
->immediate
.X_op
== O_symbol
)
1359 op
->type
= A_DISP_PC
;
1360 as_warn (_("Deprecated syntax."));
1364 op
->type
= A_DISP_PC_ABS
;
1365 /* Such operands don't get corrected for PC==.+4, so
1366 make the correction here. */
1367 op
->immediate
.X_add_number
-= 4;
1372 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1377 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1382 as_bad (_("expecting )"));
1388 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1389 if (mode
!= A_REG_N
)
1390 as_bad (_("illegal register after @"));
1397 l0
= TOLOWER (src
[0]);
1398 l1
= TOLOWER (src
[1]);
1400 if ((l0
== 'r' && l1
== '8')
1401 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1404 op
->type
= AX_PMOD_N
;
1406 else if ( (l0
== 'r' && l1
== '9')
1407 || (l0
== 'i' && l1
== 'y'))
1410 op
->type
= AY_PMOD_N
;
1422 get_operand (char **ptr
, sh_operand_info
*op
)
1431 *ptr
= parse_exp (src
, op
);
1436 else if (src
[0] == '@')
1438 *ptr
= parse_at (src
, op
);
1441 len
= parse_reg (src
, &mode
, &(op
->reg
));
1450 /* Not a reg, the only thing left is a displacement. */
1451 *ptr
= parse_exp (src
, op
);
1452 op
->type
= A_DISP_PC
;
1458 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1463 /* The pre-processor will eliminate whitespace in front of '@'
1464 after the first argument; we may be called multiple times
1465 from assemble_ppi, so don't insist on finding whitespace here. */
1469 get_operand (&ptr
, operand
+ 0);
1476 get_operand (&ptr
, operand
+ 1);
1477 /* ??? Hack: psha/pshl have a varying operand number depending on
1478 the type of the first operand. We handle this by having the
1479 three-operand version first and reducing the number of operands
1480 parsed to two if we see that the first operand is an immediate.
1481 This works because no insn with three operands has an immediate
1482 as first operand. */
1483 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1489 get_operand (&ptr
, operand
+ 2);
1493 operand
[2].type
= 0;
1498 operand
[1].type
= 0;
1499 operand
[2].type
= 0;
1504 operand
[0].type
= 0;
1505 operand
[1].type
= 0;
1506 operand
[2].type
= 0;
1511 /* Passed a pointer to a list of opcodes which use different
1512 addressing modes, return the opcode which matches the opcodes
1515 static sh_opcode_info
*
1516 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1518 sh_opcode_info
*this_try
= opcode
;
1519 char *name
= opcode
->name
;
1522 while (opcode
->name
)
1524 this_try
= opcode
++;
1525 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1527 /* We've looked so far down the table that we've run out of
1528 opcodes with the same name. */
1532 /* Look at both operands needed by the opcodes and provided by
1533 the user - since an arg test will often fail on the same arg
1534 again and again, we'll try and test the last failing arg the
1535 first on each opcode try. */
1536 for (n
= 0; this_try
->arg
[n
]; n
++)
1538 sh_operand_info
*user
= operands
+ n
;
1539 sh_arg_type arg
= this_try
->arg
[n
];
1544 if (user
->type
== A_DISP_PC_ABS
)
1554 if (user
->type
!= arg
)
1558 /* opcode needs r0 */
1559 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1563 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1567 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1575 case A_IND_R0_REG_N
:
1584 /* Opcode needs rn */
1585 if (user
->type
!= arg
)
1590 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1605 if (user
->type
!= arg
)
1610 if (user
->type
!= arg
)
1619 case A_IND_R0_REG_M
:
1622 /* Opcode needs rn */
1623 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1629 if (user
->type
!= A_DEC_N
)
1631 if (user
->reg
< 2 || user
->reg
> 5)
1637 if (user
->type
!= A_INC_N
)
1639 if (user
->reg
< 2 || user
->reg
> 5)
1645 if (user
->type
!= A_IND_N
)
1647 if (user
->reg
< 2 || user
->reg
> 5)
1653 if (user
->type
!= AX_PMOD_N
)
1655 if (user
->reg
< 2 || user
->reg
> 5)
1661 if (user
->type
!= A_INC_N
)
1663 if (user
->reg
< 4 || user
->reg
> 5)
1669 if (user
->type
!= A_IND_N
)
1671 if (user
->reg
< 4 || user
->reg
> 5)
1677 if (user
->type
!= AX_PMOD_N
)
1679 if (user
->reg
< 4 || user
->reg
> 5)
1685 if (user
->type
!= A_INC_N
)
1687 if ((user
->reg
< 4 || user
->reg
> 5)
1688 && (user
->reg
< 0 || user
->reg
> 1))
1694 if (user
->type
!= A_IND_N
)
1696 if ((user
->reg
< 4 || user
->reg
> 5)
1697 && (user
->reg
< 0 || user
->reg
> 1))
1703 if (user
->type
!= AX_PMOD_N
)
1705 if ((user
->reg
< 4 || user
->reg
> 5)
1706 && (user
->reg
< 0 || user
->reg
> 1))
1712 if (user
->type
!= A_INC_N
)
1714 if (user
->reg
< 6 || user
->reg
> 7)
1720 if (user
->type
!= A_IND_N
)
1722 if (user
->reg
< 6 || user
->reg
> 7)
1728 if (user
->type
!= AY_PMOD_N
)
1730 if (user
->reg
< 6 || user
->reg
> 7)
1736 if (user
->type
!= A_INC_N
)
1738 if ((user
->reg
< 6 || user
->reg
> 7)
1739 && (user
->reg
< 2 || user
->reg
> 3))
1745 if (user
->type
!= A_IND_N
)
1747 if ((user
->reg
< 6 || user
->reg
> 7)
1748 && (user
->reg
< 2 || user
->reg
> 3))
1754 if (user
->type
!= AY_PMOD_N
)
1756 if ((user
->reg
< 6 || user
->reg
> 7)
1757 && (user
->reg
< 2 || user
->reg
> 3))
1763 if (user
->type
!= DSP_REG_N
)
1765 if (user
->reg
!= A_A0_NUM
1766 && user
->reg
!= A_A1_NUM
)
1772 if (user
->type
!= DSP_REG_N
)
1794 if (user
->type
!= DSP_REG_N
)
1816 if (user
->type
!= DSP_REG_N
)
1838 if (user
->type
!= DSP_REG_N
)
1860 if (user
->type
!= DSP_REG_N
)
1882 if (user
->type
!= DSP_REG_N
)
1904 if (user
->type
!= DSP_REG_N
)
1926 if (user
->type
!= DSP_REG_N
)
1948 if (user
->type
!= DSP_REG_N
)
1970 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1974 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1978 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1982 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1986 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1996 /* Opcode needs rn */
1997 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
2002 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
2007 if (user
->type
!= XMTRX_M4
)
2013 printf (_("unhandled %d\n"), arg
);
2017 if ( !(valid_arch
& this_try
->arch
))
2019 valid_arch
&= this_try
->arch
;
2029 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
2031 fix_new_exp (frag_now
,
2032 where
- frag_now
->fr_literal
,
2040 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
2042 int high_byte
= target_big_endian
? 0 : 1;
2045 if (opcode
->arg
[0] == A_BDISP8
)
2047 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
2048 p
= frag_var (rs_machine_dependent
,
2049 md_relax_table
[C (what
, COND32
)].rlx_length
,
2050 md_relax_table
[C (what
, COND8
)].rlx_length
,
2052 op
->immediate
.X_add_symbol
,
2053 op
->immediate
.X_add_number
,
2055 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
2057 else if (opcode
->arg
[0] == A_BDISP12
)
2059 p
= frag_var (rs_machine_dependent
,
2060 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
2061 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
2063 op
->immediate
.X_add_symbol
,
2064 op
->immediate
.X_add_number
,
2066 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
2071 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
2074 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
2079 /* Since the low byte of the opcode will be overwritten by the reloc, we
2080 can just stash the high byte into both bytes and ignore endianness. */
2083 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2084 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2088 static int count
= 0;
2090 /* If the last loop insn is a two-byte-insn, it is in danger of being
2091 swapped with the insn after it. To prevent this, create a new
2092 symbol - complete with SH_LABEL reloc - after the last loop insn.
2093 If the last loop insn is four bytes long, the symbol will be
2094 right in the middle, but four byte insns are not swapped anyways. */
2095 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
2096 Hence a 9 digit number should be enough to count all REPEATs. */
2098 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
2099 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
2100 /* Make this a local symbol. */
2102 SF_SET_LOCAL (end_sym
);
2103 #endif /* OBJ_COFF */
2104 symbol_table_insert (end_sym
);
2105 end_sym
->sy_value
= operand
[1].immediate
;
2106 end_sym
->sy_value
.X_add_number
+= 2;
2107 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
2110 output
= frag_more (2);
2113 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
2114 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
2116 return frag_more (2);
2119 /* Now we know what sort of opcodes it is, let's build the bytes. */
2122 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
2126 char *output
= frag_more (2);
2127 unsigned int size
= 2;
2128 int low_byte
= target_big_endian
? 1 : 0;
2134 for (index
= 0; index
< 4; index
++)
2136 sh_nibble_type i
= opcode
->nibbles
[index
];
2147 nbuf
[index
] = reg_n
;
2150 nbuf
[index
] = reg_m
;
2153 if (reg_n
< 2 || reg_n
> 5)
2154 as_bad (_("Invalid register: 'r%d'"), reg_n
);
2155 nbuf
[index
] = (reg_n
& 3) | 4;
2158 nbuf
[index
] = reg_n
| (reg_m
>> 2);
2161 nbuf
[index
] = reg_b
| 0x08;
2164 nbuf
[index
] = reg_n
| 0x01;
2167 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
2170 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
2173 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
2176 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
2179 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
2182 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
2185 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
2188 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
2191 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
2194 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
2197 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
2200 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
2203 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
2204 operand
->type
!= A_DISP_PC_ABS
, operand
);
2207 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
2208 operand
->type
!= A_DISP_PC_ABS
, operand
);
2211 output
= insert_loop_bounds (output
, operand
);
2212 nbuf
[index
] = opcode
->nibbles
[3];
2216 printf (_("failed for %d\n"), i
);
2220 if (!target_big_endian
)
2222 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
2223 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
2227 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
2228 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
2233 /* Find an opcode at the start of *STR_P in the hash table, and set
2234 *STR_P to the first character after the last one read. */
2236 static sh_opcode_info
*
2237 find_cooked_opcode (char **str_p
)
2240 unsigned char *op_start
;
2241 unsigned char *op_end
;
2245 /* Drop leading whitespace. */
2249 /* Find the op code end.
2250 The pre-processor will eliminate whitespace in front of
2251 any '@' after the first argument; we may be called from
2252 assemble_ppi, so the opcode might be terminated by an '@'. */
2253 for (op_start
= op_end
= (unsigned char *) (str
);
2256 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2259 unsigned char c
= op_start
[nlen
];
2261 /* The machine independent code will convert CMP/EQ into cmp/EQ
2262 because it thinks the '/' is the end of the symbol. Moreover,
2263 all but the first sub-insn is a parallel processing insn won't
2264 be capitalized. Instead of hacking up the machine independent
2265 code, we just deal with it here. */
2275 as_bad (_("can't find opcode "));
2277 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2280 /* Assemble a parallel processing insn. */
2281 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2284 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2296 sh_operand_info operand
[3];
2298 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2299 Make sure we encode a defined insn pattern. */
2304 if (opcode
->arg
[0] != A_END
)
2305 op_end
= get_operands (opcode
, op_end
, operand
);
2307 opcode
= get_specific (opcode
, operand
);
2310 /* Couldn't find an opcode which matched the operands. */
2311 char *where
= frag_more (2);
2316 as_bad (_("invalid operands for opcode"));
2320 if (opcode
->nibbles
[0] != PPI
)
2321 as_bad (_("insn can't be combined with parallel processing insn"));
2323 switch (opcode
->nibbles
[1])
2328 as_bad (_("multiple movx specifications"));
2333 as_bad (_("multiple movy specifications"));
2339 as_bad (_("multiple movx specifications"));
2340 if ((reg_n
< 4 || reg_n
> 5)
2341 && (reg_n
< 0 || reg_n
> 1))
2342 as_bad (_("invalid movx address register"));
2343 if (movy
&& movy
!= DDT_BASE
)
2344 as_bad (_("insn cannot be combined with non-nopy"));
2345 movx
= ((((reg_n
& 1) != 0) << 9)
2346 + (((reg_n
& 4) == 0) << 8)
2348 + (opcode
->nibbles
[2] << 4)
2349 + opcode
->nibbles
[3]
2355 as_bad (_("multiple movy specifications"));
2356 if ((reg_n
< 6 || reg_n
> 7)
2357 && (reg_n
< 2 || reg_n
> 3))
2358 as_bad (_("invalid movy address register"));
2359 if (movx
&& movx
!= DDT_BASE
)
2360 as_bad (_("insn cannot be combined with non-nopx"));
2361 movy
= ((((reg_n
& 1) != 0) << 8)
2362 + (((reg_n
& 4) == 0) << 9)
2364 + (opcode
->nibbles
[2] << 4)
2365 + opcode
->nibbles
[3]
2371 as_bad (_("multiple movx specifications"));
2373 as_bad (_("previous movy requires nopx"));
2374 if (reg_n
< 4 || reg_n
> 5)
2375 as_bad (_("invalid movx address register"));
2376 if (opcode
->nibbles
[2] & 8)
2378 if (reg_m
== A_A1_NUM
)
2380 else if (reg_m
!= A_A0_NUM
)
2381 as_bad (_("invalid movx dsp register"));
2386 as_bad (_("invalid movx dsp register"));
2389 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2394 as_bad (_("multiple movy specifications"));
2396 as_bad (_("previous movx requires nopy"));
2397 if (opcode
->nibbles
[2] & 8)
2399 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2402 if (reg_m
== A_A1_NUM
)
2404 else if (reg_m
!= A_A0_NUM
)
2405 as_bad (_("invalid movy dsp register"));
2410 as_bad (_("invalid movy dsp register"));
2413 if (reg_n
< 6 || reg_n
> 7)
2414 as_bad (_("invalid movy address register"));
2415 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2419 if (operand
[0].immediate
.X_op
!= O_constant
)
2420 as_bad (_("dsp immediate shift value not constant"));
2421 field_b
= ((opcode
->nibbles
[2] << 12)
2422 | (operand
[0].immediate
.X_add_number
& 127) << 4
2429 goto try_another_opcode
;
2434 as_bad (_("multiple parallel processing specifications"));
2435 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2436 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2437 switch (opcode
->nibbles
[4])
2445 field_b
+= opcode
->nibbles
[4] << 4;
2453 as_bad (_("multiple condition specifications"));
2454 cond
= opcode
->nibbles
[2] << 8;
2456 goto skip_cond_check
;
2460 as_bad (_("multiple parallel processing specifications"));
2461 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2462 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2464 switch (opcode
->nibbles
[4])
2472 field_b
+= opcode
->nibbles
[4] << 4;
2481 if ((field_b
& 0xef00) == 0xa100)
2483 /* pclr Dz pmuls Se,Sf,Dg */
2484 else if ((field_b
& 0xff00) == 0x8d00
2485 && (valid_arch
& arch_sh4al_dsp_up
))
2487 valid_arch
&= arch_sh4al_dsp_up
;
2491 as_bad (_("insn cannot be combined with pmuls"));
2492 switch (field_b
& 0xf)
2495 field_b
+= 0 - A_X0_NUM
;
2498 field_b
+= 1 - A_Y0_NUM
;
2501 field_b
+= 2 - A_A0_NUM
;
2504 field_b
+= 3 - A_A1_NUM
;
2507 as_bad (_("bad combined pmuls output operand"));
2509 /* Generate warning if the destination register for padd / psub
2510 and pmuls is the same ( only for A0 or A1 ).
2511 If the last nibble is 1010 then A0 is used in both
2512 padd / psub and pmuls. If it is 1111 then A1 is used
2513 as destination register in both padd / psub and pmuls. */
2515 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2516 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2517 as_warn (_("destination register is same for parallel insns"));
2519 field_b
+= 0x4000 + reg_efg
;
2526 as_bad (_("condition not followed by conditionalizable insn"));
2532 opcode
= find_cooked_opcode (&op_end
);
2536 (_("unrecognized characters at end of parallel processing insn")));
2541 move_code
= movx
| movy
;
2544 /* Parallel processing insn. */
2545 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2547 output
= frag_more (4);
2549 if (! target_big_endian
)
2551 output
[3] = ppi_code
>> 8;
2552 output
[2] = ppi_code
;
2556 output
[2] = ppi_code
>> 8;
2557 output
[3] = ppi_code
;
2559 move_code
|= 0xf800;
2563 /* Just a double data transfer. */
2564 output
= frag_more (2);
2567 if (! target_big_endian
)
2569 output
[1] = move_code
>> 8;
2570 output
[0] = move_code
;
2574 output
[0] = move_code
>> 8;
2575 output
[1] = move_code
;
2580 /* This is the guts of the machine-dependent assembler. STR points to a
2581 machine dependent instruction. This function is supposed to emit
2582 the frags/bytes it assembles to. */
2585 md_assemble (char *str
)
2587 unsigned char *op_end
;
2588 sh_operand_info operand
[3];
2589 sh_opcode_info
*opcode
;
2590 unsigned int size
= 0;
2591 char *initial_str
= str
;
2594 if (sh64_isa_mode
== sh64_isa_shmedia
)
2596 shmedia_md_assemble (str
);
2601 /* If we've seen pseudo-directives, make sure any emitted data or
2602 frags are marked as data. */
2605 sh64_update_contents_mark (TRUE
);
2606 sh64_set_contents_type (CRT_SH5_ISA16
);
2611 #endif /* HAVE_SH64 */
2613 opcode
= find_cooked_opcode (&str
);
2618 /* The opcode is not in the hash table.
2619 This means we definately have an assembly failure,
2620 but the instruction may be valid in another CPU variant.
2621 In this case emit something better than 'unknown opcode'.
2622 Search the full table in sh-opc.h to check. */
2624 char *name
= initial_str
;
2625 int name_length
= 0;
2626 const sh_opcode_info
*op
;
2629 /* identify opcode in string */
2630 while (isspace (*name
))
2634 while (!isspace (name
[name_length
]))
2639 /* search for opcode in full list */
2640 for (op
= sh_table
; op
->name
; op
++)
2642 if (strncasecmp (op
->name
, name
, name_length
) == 0)
2651 as_bad (_("opcode not valid for this cpu variant"));
2655 as_bad (_("unknown opcode"));
2661 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2663 /* Output a CODE reloc to tell the linker that the following
2664 bytes are instructions, not data. */
2665 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2667 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2670 if (opcode
->nibbles
[0] == PPI
)
2672 size
= assemble_ppi (op_end
, opcode
);
2676 if (opcode
->arg
[0] == A_BDISP12
2677 || opcode
->arg
[0] == A_BDISP8
)
2679 /* Since we skip get_specific here, we have to check & update
2681 if (valid_arch
& opcode
->arch
)
2682 valid_arch
&= opcode
->arch
;
2684 as_bad (_("Delayed branches not available on SH1"));
2685 parse_exp (op_end
+ 1, &operand
[0]);
2686 build_relax (opcode
, &operand
[0]);
2690 if (opcode
->arg
[0] == A_END
)
2692 /* Ignore trailing whitespace. If there is any, it has already
2693 been compressed to a single space. */
2699 op_end
= get_operands (opcode
, op_end
, operand
);
2701 opcode
= get_specific (opcode
, operand
);
2705 /* Couldn't find an opcode which matched the operands. */
2706 char *where
= frag_more (2);
2711 as_bad (_("invalid operands for opcode"));
2716 as_bad (_("excess operands: '%s'"), op_end
);
2718 size
= build_Mytes (opcode
, operand
);
2723 #ifdef BFD_ASSEMBLER
2724 dwarf2_emit_insn (size
);
2728 /* This routine is called each time a label definition is seen. It
2729 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2732 sh_frob_label (void)
2734 static fragS
*last_label_frag
;
2735 static int last_label_offset
;
2738 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2742 offset
= frag_now_fix ();
2743 if (frag_now
!= last_label_frag
2744 || offset
!= last_label_offset
)
2746 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2747 last_label_frag
= frag_now
;
2748 last_label_offset
= offset
;
2753 /* This routine is called when the assembler is about to output some
2754 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2757 sh_flush_pending_output (void)
2760 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2762 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2764 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2769 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2775 #ifndef BFD_ASSEMBLER
2778 tc_crawl_symbol_chain (object_headers
*headers ATTRIBUTE_UNUSED
)
2780 printf (_("call to tc_crawl_symbol_chain \n"));
2784 tc_headers_hook (object_headers
*headers ATTRIBUTE_UNUSED
)
2786 printf (_("call to tc_headers_hook \n"));
2792 /* Various routines to kill one day. */
2793 /* Equal to MAX_PRECISION in atof-ieee.c. */
2794 #define MAX_LITTLENUMS 6
2796 /* Turn a string in input_line_pointer into a floating point constant
2797 of type TYPE, and store the appropriate bytes in *LITP. The number
2798 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2799 returned, or NULL on OK. */
2802 md_atof (int type
, char *litP
, int *sizeP
)
2805 LITTLENUM_TYPE words
[4];
2821 return _("bad call to md_atof");
2824 t
= atof_ieee (input_line_pointer
, type
, words
);
2826 input_line_pointer
= t
;
2830 if (! target_big_endian
)
2832 for (i
= prec
- 1; i
>= 0; i
--)
2834 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2840 for (i
= 0; i
< prec
; i
++)
2842 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2850 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2851 call instruction. It refers to a label of the instruction which
2852 loads the register which the call uses. We use it to generate a
2853 special reloc for the linker. */
2856 s_uses (int ignore ATTRIBUTE_UNUSED
)
2861 as_warn (_(".uses pseudo-op seen when not relaxing"));
2865 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2867 as_bad (_("bad .uses format"));
2868 ignore_rest_of_line ();
2872 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2874 demand_empty_rest_of_line ();
2877 const char *md_shortopts
= "";
2878 struct option md_longopts
[] =
2880 #define OPTION_RELAX (OPTION_MD_BASE)
2881 #define OPTION_BIG (OPTION_MD_BASE + 1)
2882 #define OPTION_LITTLE (OPTION_BIG + 1)
2883 #define OPTION_SMALL (OPTION_LITTLE + 1)
2884 #define OPTION_DSP (OPTION_SMALL + 1)
2885 #define OPTION_ISA (OPTION_DSP + 1)
2887 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2888 {"big", no_argument
, NULL
, OPTION_BIG
},
2889 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2890 {"small", no_argument
, NULL
, OPTION_SMALL
},
2891 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2892 {"isa", required_argument
, NULL
, OPTION_ISA
},
2894 #define OPTION_ABI (OPTION_ISA + 1)
2895 #define OPTION_NO_MIX (OPTION_ABI + 1)
2896 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
2897 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
2898 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
2899 {"abi", required_argument
, NULL
, OPTION_ABI
},
2900 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
2901 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
2902 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
2903 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
2904 #endif /* HAVE_SH64 */
2906 {NULL
, no_argument
, NULL
, 0}
2908 size_t md_longopts_size
= sizeof (md_longopts
);
2911 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
2920 target_big_endian
= 1;
2924 target_big_endian
= 0;
2932 preset_target_arch
= arch_sh1_up
& ~arch_sh2e_up
;
2936 if (strcasecmp (arg
, "sh4") == 0)
2937 preset_target_arch
= arch_sh4
;
2938 else if (strcasecmp (arg
, "sh4-nofpu") == 0)
2939 preset_target_arch
= arch_sh4_nofpu
;
2940 else if (strcasecmp (arg
, "sh4-nommu-nofpu") == 0)
2941 preset_target_arch
= arch_sh4_nommu_nofpu
;
2942 else if (strcasecmp (arg
, "sh4a") == 0)
2943 preset_target_arch
= arch_sh4a
;
2944 else if (strcasecmp (arg
, "dsp") == 0)
2945 preset_target_arch
= arch_sh1_up
& ~arch_sh2e_up
;
2946 else if (strcasecmp (arg
, "fp") == 0)
2947 preset_target_arch
= arch_sh2e_up
;
2948 else if (strcasecmp (arg
, "any") == 0)
2949 preset_target_arch
= arch_sh1_up
;
2951 else if (strcasecmp (arg
, "shmedia") == 0)
2953 if (sh64_isa_mode
== sh64_isa_shcompact
)
2954 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
2955 sh64_isa_mode
= sh64_isa_shmedia
;
2957 else if (strcasecmp (arg
, "shcompact") == 0)
2959 if (sh64_isa_mode
== sh64_isa_shmedia
)
2960 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
2961 if (sh64_abi
== sh64_abi_64
)
2962 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
2963 sh64_isa_mode
= sh64_isa_shcompact
;
2965 #endif /* HAVE_SH64 */
2967 as_bad ("Invalid argument to --isa option: %s", arg
);
2972 if (strcmp (arg
, "32") == 0)
2974 if (sh64_abi
== sh64_abi_64
)
2975 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
2976 sh64_abi
= sh64_abi_32
;
2978 else if (strcmp (arg
, "64") == 0)
2980 if (sh64_abi
== sh64_abi_32
)
2981 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
2982 if (sh64_isa_mode
== sh64_isa_shcompact
)
2983 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
2984 sh64_abi
= sh64_abi_64
;
2987 as_bad ("Invalid argument to --abi option: %s", arg
);
2994 case OPTION_SHCOMPACT_CONST_CRANGE
:
2995 sh64_shcompact_const_crange
= TRUE
;
2998 case OPTION_NO_EXPAND
:
2999 sh64_expand
= FALSE
;
3005 #endif /* HAVE_SH64 */
3015 md_show_usage (FILE *stream
)
3017 fprintf (stream
, _("\
3019 -little generate little endian code\n\
3020 -big generate big endian code\n\
3021 -relax alter jump instructions for long displacements\n\
3022 -small align sections to 4 byte boundaries, not 16\n\
3023 -dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
3025 | sh4-nofpu sh4 with fpu disabled\n\
3026 | sh4-nommu-nofpu sh4 with no MMU or FPU\n\
3028 | dsp same as '-dsp'\n\
3030 | any] use most appropriate isa\n"));
3032 fprintf (stream
, _("\
3033 -isa=[shmedia set as the default instruction set for SH64\n\
3037 fprintf (stream
, _("\
3038 -abi=[32|64] set size of expanded SHmedia operands and object\n\
3040 -shcompact-const-crange emit code-range descriptors for constants in\n\
3041 SHcompact code sections\n\
3042 -no-mix disallow SHmedia code in the same section as\n\
3043 constants and SHcompact code\n\
3044 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
3045 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
3046 to 32 bits only\n"));
3047 #endif /* HAVE_SH64 */
3050 /* This struct is used to pass arguments to sh_count_relocs through
3051 bfd_map_over_sections. */
3053 struct sh_count_relocs
3055 /* Symbol we are looking for. */
3057 /* Count of relocs found. */
3061 /* Count the number of fixups in a section which refer to a particular
3062 symbol. When using BFD_ASSEMBLER, this is called via
3063 bfd_map_over_sections. */
3066 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
3068 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
3069 segment_info_type
*seginfo
;
3073 seginfo
= seg_info (sec
);
3074 if (seginfo
== NULL
)
3078 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3080 if (fix
->fx_addsy
== sym
)
3088 /* Handle the count relocs for a particular section. When using
3089 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
3092 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
3093 void *ignore ATTRIBUTE_UNUSED
)
3095 segment_info_type
*seginfo
;
3098 seginfo
= seg_info (sec
);
3099 if (seginfo
== NULL
)
3102 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
3107 struct sh_count_relocs info
;
3109 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
3112 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
3113 symbol in the same section. */
3114 sym
= fix
->fx_addsy
;
3116 || fix
->fx_subsy
!= NULL
3117 || fix
->fx_addnumber
!= 0
3118 || S_GET_SEGMENT (sym
) != sec
3119 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
3120 || S_GET_STORAGE_CLASS (sym
) == C_EXT
3122 || S_IS_EXTERNAL (sym
))
3124 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3125 _(".uses does not refer to a local symbol in the same section"));
3129 /* Look through the fixups again, this time looking for one
3130 at the same location as sym. */
3131 val
= S_GET_VALUE (sym
);
3132 for (fscan
= seginfo
->fix_root
;
3134 fscan
= fscan
->fx_next
)
3135 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
3136 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
3137 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
3138 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
3139 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
3143 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3144 _("can't find fixup pointed to by .uses"));
3148 if (fscan
->fx_tcbit
)
3150 /* We've already done this one. */
3154 /* The variable fscan should also be a fixup to a local symbol
3155 in the same section. */
3156 sym
= fscan
->fx_addsy
;
3158 || fscan
->fx_subsy
!= NULL
3159 || fscan
->fx_addnumber
!= 0
3160 || S_GET_SEGMENT (sym
) != sec
3161 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
3162 || S_GET_STORAGE_CLASS (sym
) == C_EXT
3164 || S_IS_EXTERNAL (sym
))
3166 as_warn_where (fix
->fx_file
, fix
->fx_line
,
3167 _(".uses target does not refer to a local symbol in the same section"));
3171 /* Now we look through all the fixups of all the sections,
3172 counting the number of times we find a reference to sym. */
3175 #ifdef BFD_ASSEMBLER
3176 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
3181 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
3182 sh_count_relocs ((bfd
*) NULL
, iscan
, &info
);
3189 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
3190 We have already adjusted the value of sym to include the
3191 fragment address, so we undo that adjustment here. */
3192 subseg_change (sec
, 0);
3193 fix_new (fscan
->fx_frag
,
3194 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
3195 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
3199 /* This function is called after the symbol table has been completed,
3200 but before the relocs or section contents have been written out.
3201 If we have seen any .uses pseudo-ops, they point to an instruction
3202 which loads a register with the address of a function. We look
3203 through the fixups to find where the function address is being
3204 loaded from. We then generate a COUNT reloc giving the number of
3205 times that function address is referred to. The linker uses this
3206 information when doing relaxing, to decide when it can eliminate
3207 the stored function address entirely. */
3213 shmedia_frob_file_before_adjust ();
3219 #ifdef BFD_ASSEMBLER
3220 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
3225 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
3226 sh_frob_section ((bfd
*) NULL
, iseg
, NULL
);
3231 /* Called after relaxing. Set the correct sizes of the fragments, and
3232 create relocs so that md_apply_fix3 will fill in the correct values. */
3235 #ifdef BFD_ASSEMBLER
3236 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
3238 md_convert_frag (object_headers
*headers ATTRIBUTE_UNUSED
, segT seg
,
3244 switch (fragP
->fr_subtype
)
3246 case C (COND_JUMP
, COND8
):
3247 case C (COND_JUMP_DELAY
, COND8
):
3248 subseg_change (seg
, 0);
3249 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3250 1, BFD_RELOC_SH_PCDISP8BY2
);
3255 case C (UNCOND_JUMP
, UNCOND12
):
3256 subseg_change (seg
, 0);
3257 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
3258 1, BFD_RELOC_SH_PCDISP12BY2
);
3263 case C (UNCOND_JUMP
, UNCOND32
):
3264 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3265 if (fragP
->fr_symbol
== NULL
)
3266 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3267 _("displacement overflows 12-bit field"));
3268 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3269 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3270 _("displacement to defined symbol %s overflows 12-bit field"),
3271 S_GET_NAME (fragP
->fr_symbol
));
3273 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3274 _("displacement to undefined symbol %s overflows 12-bit field"),
3275 S_GET_NAME (fragP
->fr_symbol
));
3276 /* Stabilize this frag, so we don't trip an assert. */
3277 fragP
->fr_fix
+= fragP
->fr_var
;
3281 case C (COND_JUMP
, COND12
):
3282 case C (COND_JUMP_DELAY
, COND12
):
3283 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3284 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3285 was due to gas incorrectly relaxing an out-of-range conditional
3286 branch with delay slot. It turned:
3287 bf.s L6 (slot mov.l r12,@(44,r0))
3290 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3292 32: 10 cb mov.l r12,@(44,r0)
3293 Therefore, branches with delay slots have to be handled
3294 differently from ones without delay slots. */
3296 unsigned char *buffer
=
3297 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
3298 int highbyte
= target_big_endian
? 0 : 1;
3299 int lowbyte
= target_big_endian
? 1 : 0;
3300 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
3302 /* Toggle the true/false bit of the bcond. */
3303 buffer
[highbyte
] ^= 0x2;
3305 /* If this is a delayed branch, we may not put the bra in the
3306 slot. So we change it to a non-delayed branch, like that:
3307 b! cond slot_label; bra disp; slot_label: slot_insn
3308 ??? We should try if swapping the conditional branch and
3309 its delay-slot insn already makes the branch reach. */
3311 /* Build a relocation to six / four bytes farther on. */
3312 subseg_change (seg
, 0);
3313 fix_new (fragP
, fragP
->fr_fix
, 2,
3314 #ifdef BFD_ASSEMBLER
3315 section_symbol (seg
),
3317 seg_info (seg
)->dot
,
3319 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
3320 1, BFD_RELOC_SH_PCDISP8BY2
);
3322 /* Set up a jump instruction. */
3323 buffer
[highbyte
+ 2] = 0xa0;
3324 buffer
[lowbyte
+ 2] = 0;
3325 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
3326 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
3330 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
3335 /* Fill in a NOP instruction. */
3336 buffer
[highbyte
+ 4] = 0x0;
3337 buffer
[lowbyte
+ 4] = 0x9;
3346 case C (COND_JUMP
, COND32
):
3347 case C (COND_JUMP_DELAY
, COND32
):
3348 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3349 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3350 if (fragP
->fr_symbol
== NULL
)
3351 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3352 _("displacement overflows 8-bit field"));
3353 else if (S_IS_DEFINED (fragP
->fr_symbol
))
3354 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3355 _("displacement to defined symbol %s overflows 8-bit field"),
3356 S_GET_NAME (fragP
->fr_symbol
));
3358 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3359 _("displacement to undefined symbol %s overflows 8-bit field "),
3360 S_GET_NAME (fragP
->fr_symbol
));
3361 /* Stabilize this frag, so we don't trip an assert. */
3362 fragP
->fr_fix
+= fragP
->fr_var
;
3368 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3374 if (donerelax
&& !sh_relax
)
3375 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3376 _("overflow in branch to %s; converted into longer instruction sequence"),
3377 (fragP
->fr_symbol
!= NULL
3378 ? S_GET_NAME (fragP
->fr_symbol
)
3383 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3385 #ifdef BFD_ASSEMBLER
3388 #else /* ! OBJ_ELF */
3389 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3390 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3391 #endif /* ! OBJ_ELF */
3392 #else /* ! BFD_ASSEMBLER */
3393 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
3394 & (-1 << section_alignment
[(int) seg
]));
3395 #endif /* ! BFD_ASSEMBLER */
3398 /* This static variable is set by s_uacons to tell sh_cons_align that
3399 the expression does not need to be aligned. */
3401 static int sh_no_align_cons
= 0;
3403 /* This handles the unaligned space allocation pseudo-ops, such as
3404 .uaword. .uaword is just like .word, but the value does not need
3408 s_uacons (int bytes
)
3410 /* Tell sh_cons_align not to align this value. */
3411 sh_no_align_cons
= 1;
3415 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3416 aligned correctly. Note that this can cause warnings to be issued
3417 when assembling initialized structured which were declared with the
3418 packed attribute. FIXME: Perhaps we should require an option to
3419 enable this warning? */
3422 sh_cons_align (int nbytes
)
3427 if (sh_no_align_cons
)
3429 /* This is an unaligned pseudo-op. */
3430 sh_no_align_cons
= 0;
3435 while ((nbytes
& 1) == 0)
3444 if (now_seg
== absolute_section
)
3446 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3447 as_warn (_("misaligned data"));
3451 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3452 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3454 record_alignment (now_seg
, nalign
);
3457 /* When relaxing, we need to output a reloc for any .align directive
3458 that requests alignment to a four byte boundary or larger. This is
3459 also where we check for misaligned data. */
3462 sh_handle_align (fragS
*frag
)
3464 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3466 if (frag
->fr_type
== rs_align_code
)
3468 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3469 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3471 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3480 if (target_big_endian
)
3482 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3483 frag
->fr_var
= sizeof big_nop_pattern
;
3487 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3488 frag
->fr_var
= sizeof little_nop_pattern
;
3491 else if (frag
->fr_type
== rs_align_test
)
3494 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3498 && (frag
->fr_type
== rs_align
3499 || frag
->fr_type
== rs_align_code
)
3500 && frag
->fr_address
+ frag
->fr_fix
> 0
3501 && frag
->fr_offset
> 1
3502 && now_seg
!= bss_section
)
3503 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3504 BFD_RELOC_SH_ALIGN
);
3507 /* See whether the relocation should be resolved locally. */
3510 sh_local_pcrel (fixS
*fix
)
3513 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3514 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3515 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3516 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3517 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3518 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3519 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3522 /* See whether we need to force a relocation into the output file.
3523 This is used to force out switch and PC relative relocations when
3527 sh_force_relocation (fixS
*fix
)
3529 /* These relocations can't make it into a DSO, so no use forcing
3530 them for global symbols. */
3531 if (sh_local_pcrel (fix
))
3534 /* Make sure some relocations get emitted. */
3535 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3536 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3537 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3538 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3539 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3540 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3541 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3542 || generic_force_reloc (fix
))
3548 return (fix
->fx_pcrel
3549 || SWITCH_TABLE (fix
)
3550 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3551 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3552 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3553 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3555 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3557 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3562 sh_fix_adjustable (fixS
*fixP
)
3564 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3565 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3566 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3567 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3570 /* We need the symbol name for the VTABLE entries */
3571 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3572 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3579 sh_elf_final_processing (void)
3583 /* Set file-specific flags to indicate if this code needs
3584 a processor with the sh-dsp / sh2e ISA to execute. */
3586 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3587 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3588 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3591 #endif /* HAVE_SH64 */
3592 if (valid_arch
& arch_sh1
)
3594 else if (valid_arch
& arch_sh2
)
3596 else if (valid_arch
& arch_sh2e
)
3598 else if (valid_arch
& arch_sh_dsp
)
3600 else if (valid_arch
& arch_sh3
)
3602 else if (valid_arch
& arch_sh3_dsp
)
3604 else if (valid_arch
& arch_sh3e
)
3606 else if (valid_arch
& arch_sh4_nommu_nofpu
)
3607 val
= EF_SH4_NOMMU_NOFPU
;
3608 else if (valid_arch
& arch_sh4_nofpu
)
3610 else if (valid_arch
& arch_sh4
)
3612 else if (valid_arch
& arch_sh4a_nofpu
)
3613 val
= EF_SH4A_NOFPU
;
3614 else if (valid_arch
& arch_sh4a
)
3616 else if (valid_arch
& arch_sh4al_dsp
)
3621 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3622 elf_elfheader (stdoutput
)->e_flags
|= val
;
3626 /* Apply a fixup to the object file. */
3629 md_apply_fix3 (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3631 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3632 int lowbyte
= target_big_endian
? 1 : 0;
3633 int highbyte
= target_big_endian
? 0 : 1;
3634 long val
= (long) *valP
;
3638 #ifdef BFD_ASSEMBLER
3639 /* A difference between two symbols, the second of which is in the
3640 current section, is transformed in a PC-relative relocation to
3641 the other symbol. We have to adjust the relocation type here. */
3644 switch (fixP
->fx_r_type
)
3650 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3653 /* Currently, we only support 32-bit PCREL relocations.
3654 We'd need a new reloc type to handle 16_PCREL, and
3655 8_PCREL is already taken for R_SH_SWITCH8, which
3656 apparently does something completely different than what
3659 bfd_set_error (bfd_error_bad_value
);
3663 bfd_set_error (bfd_error_bad_value
);
3668 /* The function adjust_reloc_syms won't convert a reloc against a weak
3669 symbol into a reloc against a section, but bfd_install_relocation
3670 will screw up if the symbol is defined, so we have to adjust val here
3671 to avoid the screw up later.
3673 For ordinary relocs, this does not happen for ELF, since for ELF,
3674 bfd_install_relocation uses the "special function" field of the
3675 howto, and does not execute the code that needs to be undone, as long
3676 as the special function does not return bfd_reloc_continue.
3677 It can happen for GOT- and PLT-type relocs the way they are
3678 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3679 doesn't matter here since those relocs don't use VAL; see below. */
3680 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3681 && fixP
->fx_addsy
!= NULL
3682 && S_IS_WEAK (fixP
->fx_addsy
))
3683 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3686 #ifdef BFD_ASSEMBLER
3687 if (SWITCH_TABLE (fixP
))
3688 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3690 if (fixP
->fx_r_type
== 0)
3692 if (fixP
->fx_size
== 2)
3693 fixP
->fx_r_type
= BFD_RELOC_16
;
3694 else if (fixP
->fx_size
== 4)
3695 fixP
->fx_r_type
= BFD_RELOC_32
;
3696 else if (fixP
->fx_size
== 1)
3697 fixP
->fx_r_type
= BFD_RELOC_8
;
3705 switch (fixP
->fx_r_type
)
3707 case BFD_RELOC_SH_IMM4
:
3709 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3712 case BFD_RELOC_SH_IMM4BY2
:
3715 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3718 case BFD_RELOC_SH_IMM4BY4
:
3721 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3724 case BFD_RELOC_SH_IMM8BY2
:
3730 case BFD_RELOC_SH_IMM8BY4
:
3737 case BFD_RELOC_SH_IMM8
:
3738 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3739 sometimes it is not (e.g., and). We permit any 8 bit value.
3740 Note that adding further restrictions may invalidate
3741 reasonable looking assembly code, such as ``and -0x1,r0''. */
3747 case BFD_RELOC_SH_PCRELIMM8BY4
:
3748 /* The lower two bits of the PC are cleared before the
3749 displacement is added in. We can assume that the destination
3750 is on a 4 byte boundary. If this instruction is also on a 4
3751 byte boundary, then we want
3753 and target - here is a multiple of 4.
3754 Otherwise, we are on a 2 byte boundary, and we want
3755 (target - (here - 2)) / 4
3756 and target - here is not a multiple of 4. Computing
3757 (target - (here - 2)) / 4 == (target - here + 2) / 4
3758 works for both cases, since in the first case the addition of
3759 2 will be removed by the division. target - here is in the
3761 val
= (val
+ 2) / 4;
3763 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3767 case BFD_RELOC_SH_PCRELIMM8BY2
:
3770 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3774 case BFD_RELOC_SH_PCDISP8BY2
:
3776 if (val
< -0x80 || val
> 0x7f)
3777 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3781 case BFD_RELOC_SH_PCDISP12BY2
:
3783 if (val
< -0x800 || val
> 0x7ff)
3784 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3785 buf
[lowbyte
] = val
& 0xff;
3786 buf
[highbyte
] |= (val
>> 8) & 0xf;
3790 case BFD_RELOC_32_PCREL
:
3791 md_number_to_chars (buf
, val
, 4);
3795 md_number_to_chars (buf
, val
, 2);
3798 case BFD_RELOC_SH_USES
:
3799 /* Pass the value into sh_coff_reloc_mangle. */
3800 fixP
->fx_addnumber
= val
;
3803 case BFD_RELOC_SH_COUNT
:
3804 case BFD_RELOC_SH_ALIGN
:
3805 case BFD_RELOC_SH_CODE
:
3806 case BFD_RELOC_SH_DATA
:
3807 case BFD_RELOC_SH_LABEL
:
3808 /* Nothing to do here. */
3811 case BFD_RELOC_SH_LOOP_START
:
3812 case BFD_RELOC_SH_LOOP_END
:
3814 case BFD_RELOC_VTABLE_INHERIT
:
3815 case BFD_RELOC_VTABLE_ENTRY
:
3820 case BFD_RELOC_32_PLT_PCREL
:
3821 /* Make the jump instruction point to the address of the operand. At
3822 runtime we merely add the offset to the actual PLT entry. */
3823 * valP
= 0xfffffffc;
3824 val
= fixP
->fx_offset
;
3826 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3827 fixP
->fx_addnumber
= val
;
3828 md_number_to_chars (buf
, val
, 4);
3831 case BFD_RELOC_SH_GOTPC
:
3832 /* This is tough to explain. We end up with this one if we have
3833 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3834 The goal here is to obtain the absolute address of the GOT,
3835 and it is strongly preferable from a performance point of
3836 view to avoid using a runtime relocation for this. There are
3837 cases where you have something like:
3839 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3841 and here no correction would be required. Internally in the
3842 assembler we treat operands of this form as not being pcrel
3843 since the '.' is explicitly mentioned, and I wonder whether
3844 it would simplify matters to do it this way. Who knows. In
3845 earlier versions of the PIC patches, the pcrel_adjust field
3846 was used to store the correction, but since the expression is
3847 not pcrel, I felt it would be confusing to do it this way. */
3849 md_number_to_chars (buf
, val
, 4);
3852 case BFD_RELOC_SH_TLS_GD_32
:
3853 case BFD_RELOC_SH_TLS_LD_32
:
3854 case BFD_RELOC_SH_TLS_IE_32
:
3855 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3857 case BFD_RELOC_32_GOT_PCREL
:
3858 case BFD_RELOC_SH_GOTPLT32
:
3859 * valP
= 0; /* Fully resolved at runtime. No addend. */
3860 md_number_to_chars (buf
, 0, 4);
3863 case BFD_RELOC_SH_TLS_LDO_32
:
3864 case BFD_RELOC_SH_TLS_LE_32
:
3865 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3867 case BFD_RELOC_32_GOTOFF
:
3868 md_number_to_chars (buf
, val
, 4);
3874 shmedia_md_apply_fix3 (fixP
, valP
);
3883 if ((val
& ((1 << shift
) - 1)) != 0)
3884 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3888 val
= ((val
>> shift
)
3889 | ((long) -1 & ~ ((long) -1 >> shift
)));
3891 if (max
!= 0 && (val
< min
|| val
> max
))
3892 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3894 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3898 /* Called just before address relaxation. Return the length
3899 by which a fragment must grow to reach it's destination. */
3902 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
3906 switch (fragP
->fr_subtype
)
3910 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
3916 case C (UNCOND_JUMP
, UNDEF_DISP
):
3917 /* Used to be a branch to somewhere which was unknown. */
3918 if (!fragP
->fr_symbol
)
3920 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3922 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3924 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3928 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3932 case C (COND_JUMP
, UNDEF_DISP
):
3933 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3934 what
= GET_WHAT (fragP
->fr_subtype
);
3935 /* Used to be a branch to somewhere which was unknown. */
3936 if (fragP
->fr_symbol
3937 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3939 /* Got a symbol and it's defined in this segment, become byte
3940 sized - maybe it will fix up. */
3941 fragP
->fr_subtype
= C (what
, COND8
);
3943 else if (fragP
->fr_symbol
)
3945 /* Its got a segment, but its not ours, so it will always be long. */
3946 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3950 /* We know the abs value. */
3951 fragP
->fr_subtype
= C (what
, COND8
);
3955 case C (UNCOND_JUMP
, UNCOND12
):
3956 case C (UNCOND_JUMP
, UNCOND32
):
3957 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3958 case C (COND_JUMP
, COND8
):
3959 case C (COND_JUMP
, COND12
):
3960 case C (COND_JUMP
, COND32
):
3961 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3962 case C (COND_JUMP_DELAY
, COND8
):
3963 case C (COND_JUMP_DELAY
, COND12
):
3964 case C (COND_JUMP_DELAY
, COND32
):
3965 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3966 /* When relaxing a section for the second time, we don't need to
3967 do anything besides return the current size. */
3971 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3972 return fragP
->fr_var
;
3975 /* Put number into target byte order. */
3978 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
3981 /* We might need to set the contents type to data. */
3982 sh64_flag_output ();
3985 if (! target_big_endian
)
3986 number_to_chars_littleendian (ptr
, use
, nbytes
);
3988 number_to_chars_bigendian (ptr
, use
, nbytes
);
3991 /* This version is used in obj-coff.c when not using BFD_ASSEMBLER.
3992 eg for the sh-hms target. */
3995 md_pcrel_from (fixS
*fixP
)
3997 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
4001 md_pcrel_from_section (fixS
*fixP
, segT sec
)
4003 if (! sh_local_pcrel (fixP
)
4004 && fixP
->fx_addsy
!= (symbolS
*) NULL
4005 && (generic_force_reloc (fixP
)
4006 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
4008 /* The symbol is undefined (or is defined but not in this section,
4009 or we're not sure about it being the final definition). Let the
4010 linker figure it out. We need to adjust the subtraction of a
4011 symbol to the position of the relocated data, though. */
4012 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
4015 return md_pcrel_from (fixP
);
4021 tc_coff_sizemachdep (fragS
*frag
)
4023 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
4026 #endif /* OBJ_COFF */
4028 #ifndef BFD_ASSEMBLER
4031 /* Map BFD relocs to SH COFF relocs. */
4035 bfd_reloc_code_real_type bfd_reloc
;
4039 static const struct reloc_map coff_reloc_map
[] =
4041 { BFD_RELOC_32
, R_SH_IMM32
},
4042 { BFD_RELOC_16
, R_SH_IMM16
},
4043 { BFD_RELOC_8
, R_SH_IMM8
},
4044 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
4045 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
4046 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
4047 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
4048 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
4049 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
4050 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
4051 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
4052 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
4053 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
4054 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
4055 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
4056 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
4057 { BFD_RELOC_SH_USES
, R_SH_USES
},
4058 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
4059 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
4060 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
4061 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
4062 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
4063 { BFD_RELOC_UNUSED
, 0 }
4066 /* Adjust a reloc for the SH. This is similar to the generic code,
4067 but does some minor tweaking. */
4070 sh_coff_reloc_mangle (segment_info_type
*seg
, fixS
*fix
,
4071 struct internal_reloc
*intr
, unsigned int paddr
)
4073 symbolS
*symbol_ptr
= fix
->fx_addsy
;
4076 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
4078 if (! SWITCH_TABLE (fix
))
4080 const struct reloc_map
*rm
;
4082 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
4083 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
4085 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
4086 as_bad_where (fix
->fx_file
, fix
->fx_line
,
4087 _("Can not represent %s relocation in this object file format"),
4088 bfd_get_reloc_code_name (fix
->fx_r_type
));
4089 intr
->r_type
= rm
->sh_reloc
;
4096 if (fix
->fx_r_type
== BFD_RELOC_16
)
4097 intr
->r_type
= R_SH_SWITCH16
;
4098 else if (fix
->fx_r_type
== BFD_RELOC_8
)
4099 intr
->r_type
= R_SH_SWITCH8
;
4100 else if (fix
->fx_r_type
== BFD_RELOC_32
)
4101 intr
->r_type
= R_SH_SWITCH32
;
4105 /* For a switch reloc, we set r_offset to the difference between
4106 the reloc address and the subtrahend. When the linker is
4107 doing relaxing, it can use the determine the starting and
4108 ending points of the switch difference expression. */
4109 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
4112 /* PC relative relocs are always against the current section. */
4113 if (symbol_ptr
== NULL
)
4115 switch (fix
->fx_r_type
)
4117 case BFD_RELOC_SH_PCRELIMM8BY2
:
4118 case BFD_RELOC_SH_PCRELIMM8BY4
:
4119 case BFD_RELOC_SH_PCDISP8BY2
:
4120 case BFD_RELOC_SH_PCDISP12BY2
:
4121 case BFD_RELOC_SH_USES
:
4122 symbol_ptr
= seg
->dot
;
4129 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
4131 /* We can't store the offset in the object file, since this
4132 reloc does not take up any space, so we store it in r_offset.
4133 The fx_addnumber field was set in md_apply_fix3. */
4134 intr
->r_offset
= fix
->fx_addnumber
;
4136 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
4138 /* We can't store the count in the object file, since this reloc
4139 does not take up any space, so we store it in r_offset. The
4140 fx_offset field was set when the fixup was created in
4141 sh_coff_frob_file. */
4142 intr
->r_offset
= fix
->fx_offset
;
4143 /* This reloc is always absolute. */
4146 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
4148 /* Store the alignment in the r_offset field. */
4149 intr
->r_offset
= fix
->fx_offset
;
4150 /* This reloc is always absolute. */
4153 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
4154 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
4155 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
4157 /* These relocs are always absolute. */
4161 /* Turn the segment of the symbol into an offset. */
4162 if (symbol_ptr
!= NULL
)
4164 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
4166 intr
->r_symndx
= dot
->sy_number
;
4168 intr
->r_symndx
= symbol_ptr
->sy_number
;
4171 intr
->r_symndx
= -1;
4174 #endif /* OBJ_COFF */
4175 #endif /* ! BFD_ASSEMBLER */
4177 #ifdef BFD_ASSEMBLER
4179 /* Create a reloc. */
4182 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4185 bfd_reloc_code_real_type r_type
;
4187 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4188 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4189 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4190 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4192 r_type
= fixp
->fx_r_type
;
4194 if (SWITCH_TABLE (fixp
))
4196 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
4198 if (r_type
== BFD_RELOC_16
)
4199 r_type
= BFD_RELOC_SH_SWITCH16
;
4200 else if (r_type
== BFD_RELOC_8
)
4201 r_type
= BFD_RELOC_8_PCREL
;
4202 else if (r_type
== BFD_RELOC_32
)
4203 r_type
= BFD_RELOC_SH_SWITCH32
;
4207 else if (r_type
== BFD_RELOC_SH_USES
)
4208 rel
->addend
= fixp
->fx_addnumber
;
4209 else if (r_type
== BFD_RELOC_SH_COUNT
)
4210 rel
->addend
= fixp
->fx_offset
;
4211 else if (r_type
== BFD_RELOC_SH_ALIGN
)
4212 rel
->addend
= fixp
->fx_offset
;
4213 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
4214 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
4215 rel
->addend
= fixp
->fx_offset
;
4216 else if (r_type
== BFD_RELOC_SH_LOOP_START
4217 || r_type
== BFD_RELOC_SH_LOOP_END
)
4218 rel
->addend
= fixp
->fx_offset
;
4219 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
4222 rel
->address
= rel
->addend
= fixp
->fx_offset
;
4225 else if (shmedia_init_reloc (rel
, fixp
))
4228 else if (fixp
->fx_pcrel
)
4229 rel
->addend
= fixp
->fx_addnumber
;
4230 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
4231 rel
->addend
= fixp
->fx_addnumber
;
4235 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4237 if (rel
->howto
== NULL
)
4239 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4240 _("Cannot represent relocation type %s"),
4241 bfd_get_reloc_code_name (r_type
));
4242 /* Set howto to a garbage value so that we can keep going. */
4243 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4244 assert (rel
->howto
!= NULL
);
4247 else if (rel
->howto
->type
== R_SH_IND12W
)
4248 rel
->addend
+= fixp
->fx_offset
- 4;
4255 inline static char *
4256 sh_end_of_match (char *cont
, char *what
)
4258 int len
= strlen (what
);
4260 if (strncasecmp (cont
, what
, strlen (what
)) == 0
4261 && ! is_part_of_name (cont
[len
]))
4268 sh_parse_name (char const *name
, expressionS
*exprP
, char *nextcharP
)
4270 char *next
= input_line_pointer
;
4275 exprP
->X_op_symbol
= NULL
;
4277 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4280 GOT_symbol
= symbol_find_or_make (name
);
4282 exprP
->X_add_symbol
= GOT_symbol
;
4284 /* If we have an absolute symbol or a reg, then we know its
4286 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
4287 if (segment
== absolute_section
)
4289 exprP
->X_op
= O_constant
;
4290 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4291 exprP
->X_add_symbol
= NULL
;
4293 else if (segment
== reg_section
)
4295 exprP
->X_op
= O_register
;
4296 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
4297 exprP
->X_add_symbol
= NULL
;
4301 exprP
->X_op
= O_symbol
;
4302 exprP
->X_add_number
= 0;
4308 exprP
->X_add_symbol
= symbol_find_or_make (name
);
4310 if (*nextcharP
!= '@')
4312 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
4313 reloc_type
= BFD_RELOC_32_GOTOFF
;
4314 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
4315 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
4316 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
4317 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
4318 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
4319 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
4320 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
4321 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
4322 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
4323 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
4324 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
4325 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
4326 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
4327 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
4328 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
4329 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
4333 *input_line_pointer
= *nextcharP
;
4334 input_line_pointer
= next_end
;
4335 *nextcharP
= *input_line_pointer
;
4336 *input_line_pointer
= '\0';
4338 exprP
->X_op
= O_PIC_reloc
;
4339 exprP
->X_add_number
= 0;
4340 exprP
->X_md
= reloc_type
;
4347 sh_cfi_frame_initial_instructions (void)
4349 cfi_add_CFA_def_cfa (15, 0);
4353 sh_regname_to_dw2regnum (const char *regname
)
4355 unsigned int regnum
= -1;
4359 static struct { char *name
; int dw2regnum
; } regnames
[] =
4361 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4362 { "macl", 21 }, { "fpul", 23 }
4365 for (i
= 0; i
< ARRAY_SIZE (regnames
); ++i
)
4366 if (strcmp (regnames
[i
].name
, regname
) == 0)
4367 return regnames
[i
].dw2regnum
;
4369 if (regname
[0] == 'r')
4372 regnum
= strtoul (p
, &q
, 10);
4373 if (p
== q
|| *q
|| regnum
>= 16)
4376 else if (regname
[0] == 'f' && regname
[1] == 'r')
4379 regnum
= strtoul (p
, &q
, 10);
4380 if (p
== q
|| *q
|| regnum
>= 16)
4384 else if (regname
[0] == 'x' && regname
[1] == 'd')
4387 regnum
= strtoul (p
, &q
, 10);
4388 if (p
== q
|| *q
|| regnum
>= 8)
4394 #endif /* BFD_ASSEMBLER */