1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate
;
47 const char comment_chars
[] = "!";
48 const char line_separator_chars
[] = ";";
49 const char line_comment_chars
[] = "!#";
51 static void s_uses
PARAMS ((int));
53 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
54 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
56 static void s_uacons
PARAMS ((int));
57 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
58 static unsigned int assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
59 static void little
PARAMS ((int));
60 static void big
PARAMS ((int));
61 static int parse_reg
PARAMS ((char *, int *, int *));
62 static symbolS
*dot
PARAMS ((void));
63 static char *parse_exp
PARAMS ((char *, sh_operand_info
*));
64 static char *parse_at
PARAMS ((char *, sh_operand_info
*));
65 static void get_operand
PARAMS ((char **, sh_operand_info
*));
66 static char *get_operands
67 PARAMS ((sh_opcode_info
*, char *, sh_operand_info
*));
68 static sh_opcode_info
*get_specific
69 PARAMS ((sh_opcode_info
*, sh_operand_info
*));
70 static void insert
PARAMS ((char *, int, int, sh_operand_info
*));
71 static void build_relax
PARAMS ((sh_opcode_info
*, sh_operand_info
*));
72 static char *insert_loop_bounds
PARAMS ((char *, sh_operand_info
*));
73 static unsigned int build_Mytes
74 PARAMS ((sh_opcode_info
*, sh_operand_info
*));
77 static void sh_elf_cons
PARAMS ((int));
79 inline static int sh_PIC_related_p
PARAMS ((symbolS
*));
80 static int sh_check_fixup
PARAMS ((expressionS
*, bfd_reloc_code_real_type
*));
81 inline static char *sh_end_of_match
PARAMS ((char *, char *));
83 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
88 int ignore ATTRIBUTE_UNUSED
;
90 if (! target_big_endian
)
91 as_bad (_("directive .big encountered when option -big required"));
93 /* Stop further messages. */
94 target_big_endian
= 1;
99 int ignore ATTRIBUTE_UNUSED
;
101 if (target_big_endian
)
102 as_bad (_("directive .little encountered when option -little required"));
104 /* Stop further messages. */
105 target_big_endian
= 0;
108 /* This table describes all the machine specific pseudo-ops the assembler
109 has to support. The fields are:
110 pseudo-op name without dot
111 function to call to execute this pseudo-op
112 Integer arg to pass to the function. */
114 const pseudo_typeS md_pseudo_table
[] =
117 {"long", sh_elf_cons
, 4},
118 {"int", sh_elf_cons
, 4},
119 {"word", sh_elf_cons
, 2},
120 {"short", sh_elf_cons
, 2},
126 {"form", listing_psize
, 0},
127 {"little", little
, 0},
128 {"heading", listing_title
, 0},
129 {"import", s_ignore
, 0},
130 {"page", listing_eject
, 0},
131 {"program", s_ignore
, 0},
133 {"uaword", s_uacons
, 2},
134 {"ualong", s_uacons
, 4},
135 {"uaquad", s_uacons
, 8},
136 {"2byte", s_uacons
, 2},
137 {"4byte", s_uacons
, 4},
138 {"8byte", s_uacons
, 8},
140 {"file", dwarf2_directive_file
, 0 },
141 {"loc", dwarf2_directive_loc
, 0 },
146 /*int md_reloc_size; */
148 int sh_relax
; /* set if -relax seen */
150 /* Whether -small was seen. */
154 /* Whether -dsp was seen. */
158 /* The bit mask of architectures that could
159 accomodate the insns seen so far. */
160 static int valid_arch
;
162 const char EXP_CHARS
[] = "eE";
164 /* Chars that mean this number is a floating point constant. */
167 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
169 #define C(a,b) ENCODE_RELAX(a,b)
171 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
172 #define GET_WHAT(x) ((x>>4))
174 /* These are the three types of relaxable instrction. */
176 #define COND_JUMP_DELAY 2
177 #define UNCOND_JUMP 3
184 #define UNDEF_WORD_DISP 4
189 /* Branch displacements are from the address of the branch plus
190 four, thus all minimum and maximum values have 4 added to them. */
193 #define COND8_LENGTH 2
195 /* There is one extra instruction before the branch, so we must add
196 two more bytes to account for it. */
197 #define COND12_F 4100
198 #define COND12_M -4090
199 #define COND12_LENGTH 6
201 #define COND12_DELAY_LENGTH 4
203 /* ??? The minimum and maximum values are wrong, but this does not matter
204 since this relocation type is not supported yet. */
205 #define COND32_F (1<<30)
206 #define COND32_M -(1<<30)
207 #define COND32_LENGTH 14
209 #define UNCOND12_F 4098
210 #define UNCOND12_M -4092
211 #define UNCOND12_LENGTH 2
213 /* ??? The minimum and maximum values are wrong, but this does not matter
214 since this relocation type is not supported yet. */
215 #define UNCOND32_F (1<<30)
216 #define UNCOND32_M -(1<<30)
217 #define UNCOND32_LENGTH 14
219 #define EMPTY { 0, 0, 0, 0 }
221 const relax_typeS md_relax_table
[C (END
, 0)] = {
222 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
223 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
226 /* C (COND_JUMP, COND8) */
227 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
228 /* C (COND_JUMP, COND12) */
229 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
230 /* C (COND_JUMP, COND32) */
231 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
232 /* C (COND_JUMP, UNDEF_WORD_DISP) */
233 { 0, 0, COND32_LENGTH
, 0, },
235 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
238 /* C (COND_JUMP_DELAY, COND8) */
239 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
240 /* C (COND_JUMP_DELAY, COND12) */
241 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
242 /* C (COND_JUMP_DELAY, COND32) */
243 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
244 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
245 { 0, 0, COND32_LENGTH
, 0, },
247 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
250 /* C (UNCOND_JUMP, UNCOND12) */
251 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
252 /* C (UNCOND_JUMP, UNCOND32) */
253 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
255 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
256 { 0, 0, UNCOND32_LENGTH
, 0, },
258 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
263 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
267 /* Determinet whether the symbol needs any kind of PIC relocation. */
270 sh_PIC_related_p (sym
)
278 if (sym
== GOT_symbol
)
281 exp
= symbol_get_value_expression (sym
);
283 return (exp
->X_op
== O_PIC_reloc
284 || sh_PIC_related_p (exp
->X_add_symbol
)
285 || sh_PIC_related_p (exp
->X_op_symbol
));
288 /* Determine the relocation type to be used to represent the
289 expression, that may be rearranged. */
292 sh_check_fixup (main_exp
, r_type_p
)
293 expressionS
*main_exp
;
294 bfd_reloc_code_real_type
*r_type_p
;
296 expressionS
*exp
= main_exp
;
298 /* This is here for backward-compatibility only. GCC used to generated:
300 f@PLT + . - (.LPCS# + 2)
302 but we'd rather be able to handle this as a PIC-related reference
303 plus/minus a symbol. However, gas' parser gives us:
305 O_subtract (O_add (f@PLT, .), .LPCS#+2)
307 so we attempt to transform this into:
309 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
311 which we can handle simply below. */
312 if (exp
->X_op
== O_subtract
)
314 if (sh_PIC_related_p (exp
->X_op_symbol
))
317 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
319 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
322 if (exp
&& exp
->X_op
== O_add
323 && sh_PIC_related_p (exp
->X_add_symbol
))
325 symbolS
*sym
= exp
->X_add_symbol
;
327 exp
->X_op
= O_subtract
;
328 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
330 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
331 main_exp
->X_add_symbol
= sym
;
333 main_exp
->X_add_number
+= exp
->X_add_number
;
334 exp
->X_add_number
= 0;
339 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
342 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
344 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
346 *r_type_p
= BFD_RELOC_SH_GOTPC
;
349 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
354 if (exp
->X_op
== O_PIC_reloc
)
356 *r_type_p
= exp
->X_md
;
358 exp
->X_op
= O_symbol
;
361 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
362 main_exp
->X_add_number
+= exp
->X_add_number
;
366 return (sh_PIC_related_p (exp
->X_add_symbol
)
367 || sh_PIC_related_p (exp
->X_op_symbol
));
372 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
375 sh_cons_fix_new (frag
, off
, size
, exp
)
380 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
382 if (sh_check_fixup (exp
, &r_type
))
383 as_bad (_("Invalid PIC expression."));
385 if (r_type
== BFD_RELOC_UNUSED
)
389 r_type
= BFD_RELOC_8
;
393 r_type
= BFD_RELOC_16
;
397 r_type
= BFD_RELOC_32
;
406 as_bad (_("unsupported BFD relocation size %u"), size
);
407 r_type
= BFD_RELOC_UNUSED
;
410 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
413 /* The regular cons() function, that reads constants, doesn't support
414 suffixes such as @GOT, @GOTOFF and @PLT, that generate
415 machine-specific relocation types. So we must define it here. */
416 /* Clobbers input_line_pointer, checks end-of-line. */
419 register int nbytes
; /* 1=.byte, 2=.word, 4=.long */
423 if (is_it_end_of_statement ())
425 demand_empty_rest_of_line ();
432 emit_expr (&exp
, (unsigned int) nbytes
);
434 while (*input_line_pointer
++ == ',');
436 input_line_pointer
--; /* Put terminator back into stream. */
437 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
439 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
442 demand_empty_rest_of_line ();
447 /* This function is called once, at assembler startup time. This should
448 set up all the tables, etc that the MD part of the assembler needs. */
453 sh_opcode_info
*opcode
;
454 char *prev_name
= "";
457 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
458 valid_arch
= target_arch
;
460 opcode_hash_control
= hash_new ();
462 /* Insert unique names into hash table. */
463 for (opcode
= sh_table
; opcode
->name
; opcode
++)
465 if (strcmp (prev_name
, opcode
->name
))
467 if (! (opcode
->arch
& target_arch
))
469 prev_name
= opcode
->name
;
470 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
474 /* Make all the opcodes with the same name point to the same
476 opcode
->name
= prev_name
;
483 static int reg_x
, reg_y
;
487 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
489 /* Try to parse a reg name. Return the number of chars consumed. */
492 parse_reg (src
, mode
, reg
)
497 char l0
= TOLOWER (src
[0]);
498 char l1
= l0
? TOLOWER (src
[1]) : 0;
500 /* We use ! IDENT_CHAR for the next character after the register name, to
501 make sure that we won't accidentally recognize a symbol name such as
502 'sram' or sr_ram as being a reference to the register 'sr'. */
508 if (src
[2] >= '0' && src
[2] <= '5'
509 && ! IDENT_CHAR ((unsigned char) src
[3]))
512 *reg
= 10 + src
[2] - '0';
516 if (l1
>= '0' && l1
<= '9'
517 && ! IDENT_CHAR ((unsigned char) src
[2]))
523 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
524 && ! IDENT_CHAR ((unsigned char) src
[7]))
531 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
536 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
547 if (! IDENT_CHAR ((unsigned char) src
[2]))
553 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
562 if (! IDENT_CHAR ((unsigned char) src
[2]))
568 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
576 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
577 && ! IDENT_CHAR ((unsigned char) src
[3]))
580 *reg
= 4 + (l1
- '0');
583 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
584 && ! IDENT_CHAR ((unsigned char) src
[3]))
587 *reg
= 6 + (l1
- '0');
590 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
591 && ! IDENT_CHAR ((unsigned char) src
[3]))
596 *reg
= n
| ((~n
& 2) << 1);
601 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[3]))
623 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
624 && ! IDENT_CHAR ((unsigned char) src
[2]))
627 *reg
= A_X0_NUM
+ l1
- '0';
631 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
632 && ! IDENT_CHAR ((unsigned char) src
[2]))
635 *reg
= A_Y0_NUM
+ l1
- '0';
639 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
640 && ! IDENT_CHAR ((unsigned char) src
[2]))
643 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
649 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
655 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
656 && ! IDENT_CHAR ((unsigned char) src
[3]))
662 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
663 && ! IDENT_CHAR ((unsigned char) src
[3]))
669 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
670 && ! IDENT_CHAR ((unsigned char) src
[3]))
676 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
677 && ! IDENT_CHAR ((unsigned char) src
[3]))
683 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
689 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
696 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
701 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
703 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
704 and use an uninitialized immediate. */
708 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
709 && ! IDENT_CHAR ((unsigned char) src
[3]))
714 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
715 && ! IDENT_CHAR ((unsigned char) src
[3]))
721 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
722 && ! IDENT_CHAR ((unsigned char) src
[4]))
724 if (TOLOWER (src
[3]) == 'l')
729 if (TOLOWER (src
[3]) == 'h')
735 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
736 && ! IDENT_CHAR ((unsigned char) src
[4]))
741 if (l0
== 'f' && l1
== 'r')
745 if (src
[3] >= '0' && src
[3] <= '5'
746 && ! IDENT_CHAR ((unsigned char) src
[4]))
749 *reg
= 10 + src
[3] - '0';
753 if (src
[2] >= '0' && src
[2] <= '9'
754 && ! IDENT_CHAR ((unsigned char) src
[3]))
757 *reg
= (src
[2] - '0');
761 if (l0
== 'd' && l1
== 'r')
765 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
766 && ! IDENT_CHAR ((unsigned char) src
[4]))
769 *reg
= 10 + src
[3] - '0';
773 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
774 && ! IDENT_CHAR ((unsigned char) src
[3]))
777 *reg
= (src
[2] - '0');
781 if (l0
== 'x' && l1
== 'd')
785 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
786 && ! IDENT_CHAR ((unsigned char) src
[4]))
789 *reg
= 11 + src
[3] - '0';
793 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
794 && ! IDENT_CHAR ((unsigned char) src
[3]))
797 *reg
= (src
[2] - '0') + 1;
801 if (l0
== 'f' && l1
== 'v')
803 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
809 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
810 && ! IDENT_CHAR ((unsigned char) src
[3]))
813 *reg
= (src
[2] - '0');
817 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
818 && TOLOWER (src
[3]) == 'l'
819 && ! IDENT_CHAR ((unsigned char) src
[4]))
825 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
826 && TOLOWER (src
[3]) == 'c'
827 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
833 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
834 && TOLOWER (src
[3]) == 'r'
835 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
849 /* JF: '.' is pseudo symbol with value of current location
850 in current segment. */
851 fake
= FAKE_LABEL_NAME
;
852 return symbol_new (fake
,
854 (valueT
) frag_now_fix (),
866 save
= input_line_pointer
;
867 input_line_pointer
= s
;
868 expression (&op
->immediate
);
869 if (op
->immediate
.X_op
== O_absent
)
870 as_bad (_("missing operand"));
872 else if (op
->immediate
.X_op
== O_PIC_reloc
873 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
874 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
875 as_bad (_("misplaced PIC operand"));
877 new = input_line_pointer
;
878 input_line_pointer
= save
;
882 /* The many forms of operand:
885 @Rn Register indirect
898 pr, gbr, vbr, macl, mach
911 /* Must be predecrement. */
914 len
= parse_reg (src
, &mode
, &(op
->reg
));
916 as_bad (_("illegal register after @-"));
921 else if (src
[0] == '(')
923 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
926 len
= parse_reg (src
, &mode
, &(op
->reg
));
927 if (len
&& mode
== A_REG_N
)
932 as_bad (_("must be @(r0,...)"));
937 /* Now can be rn or gbr. */
938 len
= parse_reg (src
, &mode
, &(op
->reg
));
950 else if (mode
== A_REG_N
)
952 op
->type
= A_IND_R0_REG_N
;
956 as_bad (_("syntax error in @(r0,...)"));
961 as_bad (_("syntax error in @(r0...)"));
966 /* Must be an @(disp,.. thing). */
967 src
= parse_exp (src
, op
);
970 /* Now can be rn, gbr or pc. */
971 len
= parse_reg (src
, &mode
, &op
->reg
);
976 op
->type
= A_DISP_REG_N
;
978 else if (mode
== A_GBR
)
980 op
->type
= A_DISP_GBR
;
982 else if (mode
== A_PC
)
984 /* Turn a plain @(4,pc) into @(.+4,pc). */
985 if (op
->immediate
.X_op
== O_constant
)
987 op
->immediate
.X_add_symbol
= dot();
988 op
->immediate
.X_op
= O_symbol
;
990 op
->type
= A_DISP_PC
;
994 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
999 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1004 as_bad (_("expecting )"));
1010 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1011 if (mode
!= A_REG_N
)
1012 as_bad (_("illegal register after @"));
1019 l0
= TOLOWER (src
[0]);
1020 l1
= TOLOWER (src
[1]);
1022 if ((l0
== 'r' && l1
== '8')
1023 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1026 op
->type
= A_PMOD_N
;
1028 else if ( (l0
== 'r' && l1
== '9')
1029 || (l0
== 'i' && l1
== 'y'))
1032 op
->type
= A_PMODY_N
;
1044 get_operand (ptr
, op
)
1046 sh_operand_info
*op
;
1055 *ptr
= parse_exp (src
, op
);
1060 else if (src
[0] == '@')
1062 *ptr
= parse_at (src
, op
);
1065 len
= parse_reg (src
, &mode
, &(op
->reg
));
1074 /* Not a reg, the only thing left is a displacement. */
1075 *ptr
= parse_exp (src
, op
);
1076 op
->type
= A_DISP_PC
;
1082 get_operands (info
, args
, operand
)
1083 sh_opcode_info
*info
;
1085 sh_operand_info
*operand
;
1090 /* The pre-processor will eliminate whitespace in front of '@'
1091 after the first argument; we may be called multiple times
1092 from assemble_ppi, so don't insist on finding whitespace here. */
1096 get_operand (&ptr
, operand
+ 0);
1103 get_operand (&ptr
, operand
+ 1);
1104 /* ??? Hack: psha/pshl have a varying operand number depending on
1105 the type of the first operand. We handle this by having the
1106 three-operand version first and reducing the number of operands
1107 parsed to two if we see that the first operand is an immediate.
1108 This works because no insn with three operands has an immediate
1109 as first operand. */
1110 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1116 get_operand (&ptr
, operand
+ 2);
1120 operand
[2].type
= 0;
1125 operand
[1].type
= 0;
1126 operand
[2].type
= 0;
1131 operand
[0].type
= 0;
1132 operand
[1].type
= 0;
1133 operand
[2].type
= 0;
1138 /* Passed a pointer to a list of opcodes which use different
1139 addressing modes, return the opcode which matches the opcodes
1142 static sh_opcode_info
*
1143 get_specific (opcode
, operands
)
1144 sh_opcode_info
*opcode
;
1145 sh_operand_info
*operands
;
1147 sh_opcode_info
*this_try
= opcode
;
1148 char *name
= opcode
->name
;
1151 while (opcode
->name
)
1153 this_try
= opcode
++;
1154 if (this_try
->name
!= name
)
1156 /* We've looked so far down the table that we've run out of
1157 opcodes with the same name. */
1161 /* Look at both operands needed by the opcodes and provided by
1162 the user - since an arg test will often fail on the same arg
1163 again and again, we'll try and test the last failing arg the
1164 first on each opcode try. */
1165 for (n
= 0; this_try
->arg
[n
]; n
++)
1167 sh_operand_info
*user
= operands
+ n
;
1168 sh_arg_type arg
= this_try
->arg
[n
];
1180 if (user
->type
!= arg
)
1184 /* opcode needs r0 */
1185 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1189 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1193 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1201 case A_IND_R0_REG_N
:
1212 /* Opcode needs rn */
1213 if (user
->type
!= arg
)
1218 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1233 if (user
->type
!= arg
)
1238 if (user
->type
!= arg
)
1247 case A_IND_R0_REG_M
:
1250 /* Opcode needs rn */
1251 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1257 if (user
->type
!= DSP_REG_N
)
1279 if (user
->type
!= DSP_REG_N
)
1301 if (user
->type
!= DSP_REG_N
)
1323 if (user
->type
!= DSP_REG_N
)
1345 if (user
->type
!= DSP_REG_N
)
1367 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1371 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1375 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1379 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1383 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1393 /* Opcode needs rn */
1394 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1399 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1404 if (user
->type
!= XMTRX_M4
)
1410 printf (_("unhandled %d\n"), arg
);
1414 if ( !(valid_arch
& this_try
->arch
))
1416 valid_arch
&= this_try
->arch
;
1426 insert (where
, how
, pcrel
, op
)
1430 sh_operand_info
*op
;
1432 fix_new_exp (frag_now
,
1433 where
- frag_now
->fr_literal
,
1441 build_relax (opcode
, op
)
1442 sh_opcode_info
*opcode
;
1443 sh_operand_info
*op
;
1445 int high_byte
= target_big_endian
? 0 : 1;
1448 if (opcode
->arg
[0] == A_BDISP8
)
1450 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1451 p
= frag_var (rs_machine_dependent
,
1452 md_relax_table
[C (what
, COND32
)].rlx_length
,
1453 md_relax_table
[C (what
, COND8
)].rlx_length
,
1455 op
->immediate
.X_add_symbol
,
1456 op
->immediate
.X_add_number
,
1458 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1460 else if (opcode
->arg
[0] == A_BDISP12
)
1462 p
= frag_var (rs_machine_dependent
,
1463 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1464 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1466 op
->immediate
.X_add_symbol
,
1467 op
->immediate
.X_add_number
,
1469 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1474 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1477 insert_loop_bounds (output
, operand
)
1479 sh_operand_info
*operand
;
1484 /* Since the low byte of the opcode will be overwritten by the reloc, we
1485 can just stash the high byte into both bytes and ignore endianness. */
1488 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1489 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1493 static int count
= 0;
1495 /* If the last loop insn is a two-byte-insn, it is in danger of being
1496 swapped with the insn after it. To prevent this, create a new
1497 symbol - complete with SH_LABEL reloc - after the last loop insn.
1498 If the last loop insn is four bytes long, the symbol will be
1499 right in the middle, but four byte insns are not swapped anyways. */
1500 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1501 Hence a 9 digit number should be enough to count all REPEATs. */
1503 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1504 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1505 /* Make this a local symbol. */
1507 SF_SET_LOCAL (end_sym
);
1508 #endif /* OBJ_COFF */
1509 symbol_table_insert (end_sym
);
1510 end_sym
->sy_value
= operand
[1].immediate
;
1511 end_sym
->sy_value
.X_add_number
+= 2;
1512 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1515 output
= frag_more (2);
1518 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1519 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1521 return frag_more (2);
1524 /* Now we know what sort of opcodes it is, let's build the bytes. */
1527 build_Mytes (opcode
, operand
)
1528 sh_opcode_info
*opcode
;
1529 sh_operand_info
*operand
;
1533 char *output
= frag_more (2);
1534 unsigned int size
= 2;
1535 int low_byte
= target_big_endian
? 1 : 0;
1541 for (index
= 0; index
< 4; index
++)
1543 sh_nibble_type i
= opcode
->nibbles
[index
];
1553 nbuf
[index
] = reg_n
;
1556 nbuf
[index
] = reg_m
;
1559 if (reg_n
< 2 || reg_n
> 5)
1560 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1561 nbuf
[index
] = (reg_n
& 3) | 4;
1564 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1567 nbuf
[index
] = reg_b
| 0x08;
1570 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1573 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1576 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1579 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1582 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1585 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1588 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1591 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1594 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1597 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1600 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1603 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1606 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1, operand
);
1609 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1, operand
);
1612 output
= insert_loop_bounds (output
, operand
);
1613 nbuf
[index
] = opcode
->nibbles
[3];
1617 printf (_("failed for %d\n"), i
);
1621 if (!target_big_endian
)
1623 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1624 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1628 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1629 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1634 /* Find an opcode at the start of *STR_P in the hash table, and set
1635 *STR_P to the first character after the last one read. */
1637 static sh_opcode_info
*
1638 find_cooked_opcode (str_p
)
1642 unsigned char *op_start
;
1643 unsigned char *op_end
;
1647 /* Drop leading whitespace. */
1651 /* Find the op code end.
1652 The pre-processor will eliminate whitespace in front of
1653 any '@' after the first argument; we may be called from
1654 assemble_ppi, so the opcode might be terminated by an '@'. */
1655 for (op_start
= op_end
= (unsigned char *) (str
);
1658 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1661 unsigned char c
= op_start
[nlen
];
1663 /* The machine independent code will convert CMP/EQ into cmp/EQ
1664 because it thinks the '/' is the end of the symbol. Moreover,
1665 all but the first sub-insn is a parallel processing insn won't
1666 be capitalized. Instead of hacking up the machine independent
1667 code, we just deal with it here. */
1677 as_bad (_("can't find opcode "));
1679 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1682 /* Assemble a parallel processing insn. */
1683 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1686 assemble_ppi (op_end
, opcode
)
1688 sh_opcode_info
*opcode
;
1698 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1699 Make sure we encode a defined insn pattern. */
1705 sh_operand_info operand
[3];
1707 if (opcode
->arg
[0] != A_END
)
1708 op_end
= get_operands (opcode
, op_end
, operand
);
1709 opcode
= get_specific (opcode
, operand
);
1712 /* Couldn't find an opcode which matched the operands. */
1713 char *where
= frag_more (2);
1718 as_bad (_("invalid operands for opcode"));
1722 if (opcode
->nibbles
[0] != PPI
)
1723 as_bad (_("insn can't be combined with parallel processing insn"));
1725 switch (opcode
->nibbles
[1])
1730 as_bad (_("multiple movx specifications"));
1735 as_bad (_("multiple movy specifications"));
1741 as_bad (_("multiple movx specifications"));
1742 if (reg_n
< 4 || reg_n
> 5)
1743 as_bad (_("invalid movx address register"));
1744 if (opcode
->nibbles
[2] & 8)
1746 if (reg_m
== A_A1_NUM
)
1748 else if (reg_m
!= A_A0_NUM
)
1749 as_bad (_("invalid movx dsp register"));
1754 as_bad (_("invalid movx dsp register"));
1757 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1762 as_bad (_("multiple movy specifications"));
1763 if (opcode
->nibbles
[2] & 8)
1765 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1768 if (reg_m
== A_A1_NUM
)
1770 else if (reg_m
!= A_A0_NUM
)
1771 as_bad (_("invalid movy dsp register"));
1776 as_bad (_("invalid movy dsp register"));
1779 if (reg_n
< 6 || reg_n
> 7)
1780 as_bad (_("invalid movy address register"));
1781 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1785 if (operand
[0].immediate
.X_op
!= O_constant
)
1786 as_bad (_("dsp immediate shift value not constant"));
1787 field_b
= ((opcode
->nibbles
[2] << 12)
1788 | (operand
[0].immediate
.X_add_number
& 127) << 4
1793 as_bad (_("multiple parallel processing specifications"));
1794 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1795 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1799 as_bad (_("multiple condition specifications"));
1800 cond
= opcode
->nibbles
[2] << 8;
1802 goto skip_cond_check
;
1806 as_bad (_("multiple parallel processing specifications"));
1807 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1808 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1814 if ((field_b
& 0xef00) != 0xa100)
1815 as_bad (_("insn cannot be combined with pmuls"));
1817 switch (field_b
& 0xf)
1820 field_b
+= 0 - A_X0_NUM
;
1823 field_b
+= 1 - A_Y0_NUM
;
1826 field_b
+= 2 - A_A0_NUM
;
1829 field_b
+= 3 - A_A1_NUM
;
1832 as_bad (_("bad padd / psub pmuls output operand"));
1835 field_b
+= 0x4000 + reg_efg
;
1842 as_bad (_("condition not followed by conditionalizable insn"));
1848 opcode
= find_cooked_opcode (&op_end
);
1852 (_("unrecognized characters at end of parallel processing insn")));
1857 move_code
= movx
| movy
;
1860 /* Parallel processing insn. */
1861 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1863 output
= frag_more (4);
1865 if (! target_big_endian
)
1867 output
[3] = ppi_code
>> 8;
1868 output
[2] = ppi_code
;
1872 output
[2] = ppi_code
>> 8;
1873 output
[3] = ppi_code
;
1875 move_code
|= 0xf800;
1879 /* Just a double data transfer. */
1880 output
= frag_more (2);
1883 if (! target_big_endian
)
1885 output
[1] = move_code
>> 8;
1886 output
[0] = move_code
;
1890 output
[0] = move_code
>> 8;
1891 output
[1] = move_code
;
1896 /* This is the guts of the machine-dependent assembler. STR points to a
1897 machine dependent instruction. This function is supposed to emit
1898 the frags/bytes it assembles to. */
1904 unsigned char *op_end
;
1905 sh_operand_info operand
[3];
1906 sh_opcode_info
*opcode
;
1907 unsigned int size
= 0;
1909 opcode
= find_cooked_opcode (&str
);
1914 as_bad (_("unknown opcode"));
1919 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1921 /* Output a CODE reloc to tell the linker that the following
1922 bytes are instructions, not data. */
1923 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1925 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1928 if (opcode
->nibbles
[0] == PPI
)
1930 size
= assemble_ppi (op_end
, opcode
);
1934 if (opcode
->arg
[0] == A_BDISP12
1935 || opcode
->arg
[0] == A_BDISP8
)
1937 parse_exp (op_end
+ 1, &operand
[0]);
1938 build_relax (opcode
, &operand
[0]);
1942 if (opcode
->arg
[0] == A_END
)
1944 /* Ignore trailing whitespace. If there is any, it has already
1945 been compressed to a single space. */
1951 op_end
= get_operands (opcode
, op_end
, operand
);
1953 opcode
= get_specific (opcode
, operand
);
1957 /* Couldn't find an opcode which matched the operands. */
1958 char *where
= frag_more (2);
1963 as_bad (_("invalid operands for opcode"));
1968 as_bad (_("excess operands: '%s'"), op_end
);
1970 size
= build_Mytes (opcode
, operand
);
1975 #ifdef BFD_ASSEMBLER
1976 dwarf2_emit_insn (size
);
1980 /* This routine is called each time a label definition is seen. It
1981 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1986 static fragS
*last_label_frag
;
1987 static int last_label_offset
;
1990 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1994 offset
= frag_now_fix ();
1995 if (frag_now
!= last_label_frag
1996 || offset
!= last_label_offset
)
1998 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1999 last_label_frag
= frag_now
;
2000 last_label_offset
= offset
;
2005 /* This routine is called when the assembler is about to output some
2006 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2009 sh_flush_pending_output ()
2012 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2014 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2016 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2021 md_undefined_symbol (name
)
2022 char *name ATTRIBUTE_UNUSED
;
2028 #ifndef BFD_ASSEMBLER
2031 tc_crawl_symbol_chain (headers
)
2032 object_headers
*headers
;
2034 printf (_("call to tc_crawl_symbol_chain \n"));
2038 tc_headers_hook (headers
)
2039 object_headers
*headers
;
2041 printf (_("call to tc_headers_hook \n"));
2047 /* Various routines to kill one day. */
2048 /* Equal to MAX_PRECISION in atof-ieee.c. */
2049 #define MAX_LITTLENUMS 6
2051 /* Turn a string in input_line_pointer into a floating point constant
2052 of type TYPE, and store the appropriate bytes in *LITP. The number
2053 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2054 returned, or NULL on OK. */
2057 md_atof (type
, litP
, sizeP
)
2063 LITTLENUM_TYPE words
[4];
2079 return _("bad call to md_atof");
2082 t
= atof_ieee (input_line_pointer
, type
, words
);
2084 input_line_pointer
= t
;
2088 if (! target_big_endian
)
2090 for (i
= prec
- 1; i
>= 0; i
--)
2092 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2098 for (i
= 0; i
< prec
; i
++)
2100 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2108 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2109 call instruction. It refers to a label of the instruction which
2110 loads the register which the call uses. We use it to generate a
2111 special reloc for the linker. */
2115 int ignore ATTRIBUTE_UNUSED
;
2120 as_warn (_(".uses pseudo-op seen when not relaxing"));
2124 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2126 as_bad (_("bad .uses format"));
2127 ignore_rest_of_line ();
2131 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2133 demand_empty_rest_of_line ();
2136 CONST
char *md_shortopts
= "";
2137 struct option md_longopts
[] =
2139 #define OPTION_RELAX (OPTION_MD_BASE)
2140 #define OPTION_BIG (OPTION_MD_BASE + 1)
2141 #define OPTION_LITTLE (OPTION_BIG + 1)
2142 #define OPTION_SMALL (OPTION_LITTLE + 1)
2143 #define OPTION_DSP (OPTION_SMALL + 1)
2145 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2146 {"big", no_argument
, NULL
, OPTION_BIG
},
2147 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2148 {"small", no_argument
, NULL
, OPTION_SMALL
},
2149 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2150 {NULL
, no_argument
, NULL
, 0}
2152 size_t md_longopts_size
= sizeof (md_longopts
);
2155 md_parse_option (c
, arg
)
2157 char *arg ATTRIBUTE_UNUSED
;
2166 target_big_endian
= 1;
2170 target_big_endian
= 0;
2189 md_show_usage (stream
)
2192 fprintf (stream
, _("\
2194 -little generate little endian code\n\
2195 -big generate big endian code\n\
2196 -relax alter jump instructions for long displacements\n\
2197 -small align sections to 4 byte boundaries, not 16\n\
2198 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
2201 /* This struct is used to pass arguments to sh_count_relocs through
2202 bfd_map_over_sections. */
2204 struct sh_count_relocs
2206 /* Symbol we are looking for. */
2208 /* Count of relocs found. */
2212 /* Count the number of fixups in a section which refer to a particular
2213 symbol. When using BFD_ASSEMBLER, this is called via
2214 bfd_map_over_sections. */
2217 sh_count_relocs (abfd
, sec
, data
)
2218 bfd
*abfd ATTRIBUTE_UNUSED
;
2222 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2223 segment_info_type
*seginfo
;
2227 seginfo
= seg_info (sec
);
2228 if (seginfo
== NULL
)
2232 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2234 if (fix
->fx_addsy
== sym
)
2242 /* Handle the count relocs for a particular section. When using
2243 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2246 sh_frob_section (abfd
, sec
, ignore
)
2247 bfd
*abfd ATTRIBUTE_UNUSED
;
2249 PTR ignore ATTRIBUTE_UNUSED
;
2251 segment_info_type
*seginfo
;
2254 seginfo
= seg_info (sec
);
2255 if (seginfo
== NULL
)
2258 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2263 struct sh_count_relocs info
;
2265 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2268 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2269 symbol in the same section. */
2270 sym
= fix
->fx_addsy
;
2272 || fix
->fx_subsy
!= NULL
2273 || fix
->fx_addnumber
!= 0
2274 || S_GET_SEGMENT (sym
) != sec
2275 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2276 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2278 || S_IS_EXTERNAL (sym
))
2280 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2281 _(".uses does not refer to a local symbol in the same section"));
2285 /* Look through the fixups again, this time looking for one
2286 at the same location as sym. */
2287 val
= S_GET_VALUE (sym
);
2288 for (fscan
= seginfo
->fix_root
;
2290 fscan
= fscan
->fx_next
)
2291 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2292 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2293 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2294 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2295 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2299 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2300 _("can't find fixup pointed to by .uses"));
2304 if (fscan
->fx_tcbit
)
2306 /* We've already done this one. */
2310 /* The variable fscan should also be a fixup to a local symbol
2311 in the same section. */
2312 sym
= fscan
->fx_addsy
;
2314 || fscan
->fx_subsy
!= NULL
2315 || fscan
->fx_addnumber
!= 0
2316 || S_GET_SEGMENT (sym
) != sec
2317 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2318 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2320 || S_IS_EXTERNAL (sym
))
2322 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2323 _(".uses target does not refer to a local symbol in the same section"));
2327 /* Now we look through all the fixups of all the sections,
2328 counting the number of times we find a reference to sym. */
2331 #ifdef BFD_ASSEMBLER
2332 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2337 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2338 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2345 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2346 We have already adjusted the value of sym to include the
2347 fragment address, so we undo that adjustment here. */
2348 subseg_change (sec
, 0);
2349 fix_new (fscan
->fx_frag
,
2350 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
2351 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2355 /* This function is called after the symbol table has been completed,
2356 but before the relocs or section contents have been written out.
2357 If we have seen any .uses pseudo-ops, they point to an instruction
2358 which loads a register with the address of a function. We look
2359 through the fixups to find where the function address is being
2360 loaded from. We then generate a COUNT reloc giving the number of
2361 times that function address is referred to. The linker uses this
2362 information when doing relaxing, to decide when it can eliminate
2363 the stored function address entirely. */
2371 #ifdef BFD_ASSEMBLER
2372 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2377 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2378 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2383 /* Called after relaxing. Set the correct sizes of the fragments, and
2384 create relocs so that md_apply_fix3 will fill in the correct values. */
2387 md_convert_frag (headers
, seg
, fragP
)
2388 #ifdef BFD_ASSEMBLER
2389 bfd
*headers ATTRIBUTE_UNUSED
;
2391 object_headers
*headers
;
2398 switch (fragP
->fr_subtype
)
2400 case C (COND_JUMP
, COND8
):
2401 case C (COND_JUMP_DELAY
, COND8
):
2402 subseg_change (seg
, 0);
2403 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2404 1, BFD_RELOC_SH_PCDISP8BY2
);
2409 case C (UNCOND_JUMP
, UNCOND12
):
2410 subseg_change (seg
, 0);
2411 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2412 1, BFD_RELOC_SH_PCDISP12BY2
);
2417 case C (UNCOND_JUMP
, UNCOND32
):
2418 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2419 if (fragP
->fr_symbol
== NULL
)
2420 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2421 _("displacement overflows 12-bit field"));
2422 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2423 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2424 _("displacement to defined symbol %s overflows 12-bit field"),
2425 S_GET_NAME (fragP
->fr_symbol
));
2427 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2428 _("displacement to undefined symbol %s overflows 12-bit field"),
2429 S_GET_NAME (fragP
->fr_symbol
));
2430 /* Stabilize this frag, so we don't trip an assert. */
2431 fragP
->fr_fix
+= fragP
->fr_var
;
2435 case C (COND_JUMP
, COND12
):
2436 case C (COND_JUMP_DELAY
, COND12
):
2437 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2438 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2439 was due to gas incorrectly relaxing an out-of-range conditional
2440 branch with delay slot. It turned:
2441 bf.s L6 (slot mov.l r12,@(44,r0))
2444 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2446 32: 10 cb mov.l r12,@(44,r0)
2447 Therefore, branches with delay slots have to be handled
2448 differently from ones without delay slots. */
2450 unsigned char *buffer
=
2451 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2452 int highbyte
= target_big_endian
? 0 : 1;
2453 int lowbyte
= target_big_endian
? 1 : 0;
2454 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2456 /* Toggle the true/false bit of the bcond. */
2457 buffer
[highbyte
] ^= 0x2;
2459 /* If this is a delayed branch, we may not put the bra in the
2460 slot. So we change it to a non-delayed branch, like that:
2461 b! cond slot_label; bra disp; slot_label: slot_insn
2462 ??? We should try if swapping the conditional branch and
2463 its delay-slot insn already makes the branch reach. */
2465 /* Build a relocation to six / four bytes farther on. */
2466 subseg_change (seg
, 0);
2467 fix_new (fragP
, fragP
->fr_fix
, 2,
2468 #ifdef BFD_ASSEMBLER
2469 section_symbol (seg
),
2471 seg_info (seg
)->dot
,
2473 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2474 1, BFD_RELOC_SH_PCDISP8BY2
);
2476 /* Set up a jump instruction. */
2477 buffer
[highbyte
+ 2] = 0xa0;
2478 buffer
[lowbyte
+ 2] = 0;
2479 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2480 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2484 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2489 /* Fill in a NOP instruction. */
2490 buffer
[highbyte
+ 4] = 0x0;
2491 buffer
[lowbyte
+ 4] = 0x9;
2500 case C (COND_JUMP
, COND32
):
2501 case C (COND_JUMP_DELAY
, COND32
):
2502 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2503 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2504 if (fragP
->fr_symbol
== NULL
)
2505 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2506 _("displacement overflows 8-bit field"));
2507 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2508 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2509 _("displacement to defined symbol %s overflows 8-bit field"),
2510 S_GET_NAME (fragP
->fr_symbol
));
2512 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2513 _("displacement to undefined symbol %s overflows 8-bit field "),
2514 S_GET_NAME (fragP
->fr_symbol
));
2515 /* Stabilize this frag, so we don't trip an assert. */
2516 fragP
->fr_fix
+= fragP
->fr_var
;
2524 if (donerelax
&& !sh_relax
)
2525 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2526 _("overflow in branch to %s; converted into longer instruction sequence"),
2527 (fragP
->fr_symbol
!= NULL
2528 ? S_GET_NAME (fragP
->fr_symbol
)
2533 md_section_align (seg
, size
)
2534 segT seg ATTRIBUTE_UNUSED
;
2537 #ifdef BFD_ASSEMBLER
2540 #else /* ! OBJ_ELF */
2541 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2542 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2543 #endif /* ! OBJ_ELF */
2544 #else /* ! BFD_ASSEMBLER */
2545 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2546 & (-1 << section_alignment
[(int) seg
]));
2547 #endif /* ! BFD_ASSEMBLER */
2550 /* This static variable is set by s_uacons to tell sh_cons_align that
2551 the expession does not need to be aligned. */
2553 static int sh_no_align_cons
= 0;
2555 /* This handles the unaligned space allocation pseudo-ops, such as
2556 .uaword. .uaword is just like .word, but the value does not need
2563 /* Tell sh_cons_align not to align this value. */
2564 sh_no_align_cons
= 1;
2568 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2569 aligned correctly. Note that this can cause warnings to be issued
2570 when assembling initialized structured which were declared with the
2571 packed attribute. FIXME: Perhaps we should require an option to
2572 enable this warning? */
2575 sh_cons_align (nbytes
)
2581 if (sh_no_align_cons
)
2583 /* This is an unaligned pseudo-op. */
2584 sh_no_align_cons
= 0;
2589 while ((nbytes
& 1) == 0)
2598 if (now_seg
== absolute_section
)
2600 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2601 as_warn (_("misaligned data"));
2605 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
2606 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2608 record_alignment (now_seg
, nalign
);
2611 /* When relaxing, we need to output a reloc for any .align directive
2612 that requests alignment to a four byte boundary or larger. This is
2613 also where we check for misaligned data. */
2616 sh_handle_align (frag
)
2619 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
2621 if (frag
->fr_type
== rs_align_code
)
2623 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2624 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2626 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
2635 if (target_big_endian
)
2637 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
2638 frag
->fr_var
= sizeof big_nop_pattern
;
2642 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
2643 frag
->fr_var
= sizeof little_nop_pattern
;
2646 else if (frag
->fr_type
== rs_align_test
)
2649 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2653 && (frag
->fr_type
== rs_align
2654 || frag
->fr_type
== rs_align_code
)
2655 && frag
->fr_address
+ frag
->fr_fix
> 0
2656 && frag
->fr_offset
> 1
2657 && now_seg
!= bss_section
)
2658 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2659 BFD_RELOC_SH_ALIGN
);
2662 /* This macro decides whether a particular reloc is an entry in a
2663 switch table. It is used when relaxing, because the linker needs
2664 to know about all such entries so that it can adjust them if
2667 #ifdef BFD_ASSEMBLER
2668 #define SWITCH_TABLE_CONS(fix) (0)
2670 #define SWITCH_TABLE_CONS(fix) \
2671 ((fix)->fx_r_type == 0 \
2672 && ((fix)->fx_size == 2 \
2673 || (fix)->fx_size == 1 \
2674 || (fix)->fx_size == 4))
2677 #define SWITCH_TABLE(fix) \
2678 ((fix)->fx_addsy != NULL \
2679 && (fix)->fx_subsy != NULL \
2680 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2681 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2682 && ((fix)->fx_r_type == BFD_RELOC_32 \
2683 || (fix)->fx_r_type == BFD_RELOC_16 \
2684 || (fix)->fx_r_type == BFD_RELOC_8 \
2685 || SWITCH_TABLE_CONS (fix)))
2687 /* See whether we need to force a relocation into the output file.
2688 This is used to force out switch and PC relative relocations when
2692 sh_force_relocation (fix
)
2696 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2697 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
2698 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
2699 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
)
2705 return (fix
->fx_pcrel
2706 || SWITCH_TABLE (fix
)
2707 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2708 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2709 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2710 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2711 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2716 sh_fix_adjustable (fixP
)
2720 if (fixP
->fx_addsy
== NULL
)
2723 if (fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
2724 || fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
2725 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
2726 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
2727 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
2728 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH16
2729 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH32
)
2732 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP
)
2733 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
2736 /* We need the symbol name for the VTABLE entries */
2737 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2738 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2745 sh_elf_final_processing ()
2749 /* Set file-specific flags to indicate if this code needs
2750 a processor with the sh-dsp / sh3e ISA to execute. */
2751 if (valid_arch
& arch_sh1
)
2753 else if (valid_arch
& arch_sh2
)
2755 else if (valid_arch
& arch_sh_dsp
)
2757 else if (valid_arch
& arch_sh3
)
2759 else if (valid_arch
& arch_sh3_dsp
)
2761 else if (valid_arch
& arch_sh3e
)
2763 else if (valid_arch
& arch_sh4
)
2768 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2769 elf_elfheader (stdoutput
)->e_flags
|= val
;
2773 /* Apply a fixup to the object file. */
2776 md_apply_fix3 (fixP
, valP
, seg
)
2779 segT seg ATTRIBUTE_UNUSED
;
2781 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2782 int lowbyte
= target_big_endian
? 1 : 0;
2783 int highbyte
= target_big_endian
? 0 : 1;
2784 long val
= * (long *) valP
;
2788 #ifdef BFD_ASSEMBLER
2789 /* A difference between two symbols, the second of which is in the
2790 current section, is transformed in a PC-relative relocation to
2791 the other symbol. We have to adjust the relocation type here. */
2794 switch (fixP
->fx_r_type
)
2800 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
2803 /* Currently, we only support 32-bit PCREL relocations.
2804 We'd need a new reloc type to handle 16_PCREL, and
2805 8_PCREL is already taken for R_SH_SWITCH8, which
2806 apparently does something completely different than what
2809 bfd_set_error (bfd_error_bad_value
);
2813 bfd_set_error (bfd_error_bad_value
);
2818 /* The function adjust_reloc_syms won't convert a reloc against a weak
2819 symbol into a reloc against a section, but bfd_install_relocation
2820 will screw up if the symbol is defined, so we have to adjust val here
2821 to avoid the screw up later.
2823 For ordinary relocs, this does not happen for ELF, since for ELF,
2824 bfd_install_relocation uses the "special function" field of the
2825 howto, and does not execute the code that needs to be undone, as long
2826 as the special function does not return bfd_reloc_continue.
2827 It can happen for GOT- and PLT-type relocs the way they are
2828 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
2829 doesn't matter here since those relocs don't use VAL; see below. */
2830 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
2831 && fixP
->fx_addsy
!= NULL
2832 && S_IS_WEAK (fixP
->fx_addsy
))
2833 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2836 #ifndef BFD_ASSEMBLER
2837 if (fixP
->fx_r_type
== 0)
2839 if (fixP
->fx_size
== 2)
2840 fixP
->fx_r_type
= BFD_RELOC_16
;
2841 else if (fixP
->fx_size
== 4)
2842 fixP
->fx_r_type
= BFD_RELOC_32
;
2843 else if (fixP
->fx_size
== 1)
2844 fixP
->fx_r_type
= BFD_RELOC_8
;
2852 switch (fixP
->fx_r_type
)
2854 case BFD_RELOC_SH_IMM4
:
2856 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2859 case BFD_RELOC_SH_IMM4BY2
:
2862 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2865 case BFD_RELOC_SH_IMM4BY4
:
2868 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2871 case BFD_RELOC_SH_IMM8BY2
:
2877 case BFD_RELOC_SH_IMM8BY4
:
2884 case BFD_RELOC_SH_IMM8
:
2885 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2886 sometimes it is not (e.g., and). We permit any 8 bit value.
2887 Note that adding further restrictions may invalidate
2888 reasonable looking assembly code, such as ``and -0x1,r0''. */
2894 case BFD_RELOC_SH_PCRELIMM8BY4
:
2895 /* The lower two bits of the PC are cleared before the
2896 displacement is added in. We can assume that the destination
2897 is on a 4 byte bounday. If this instruction is also on a 4
2898 byte boundary, then we want
2900 and target - here is a multiple of 4.
2901 Otherwise, we are on a 2 byte boundary, and we want
2902 (target - (here - 2)) / 4
2903 and target - here is not a multiple of 4. Computing
2904 (target - (here - 2)) / 4 == (target - here + 2) / 4
2905 works for both cases, since in the first case the addition of
2906 2 will be removed by the division. target - here is in the
2908 val
= (val
+ 2) / 4;
2910 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2914 case BFD_RELOC_SH_PCRELIMM8BY2
:
2917 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2921 case BFD_RELOC_SH_PCDISP8BY2
:
2923 if (val
< -0x80 || val
> 0x7f)
2924 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2928 case BFD_RELOC_SH_PCDISP12BY2
:
2930 if (val
< -0x800 || val
> 0x7ff)
2931 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2932 buf
[lowbyte
] = val
& 0xff;
2933 buf
[highbyte
] |= (val
>> 8) & 0xf;
2937 case BFD_RELOC_32_PCREL
:
2938 md_number_to_chars (buf
, val
, 4);
2942 md_number_to_chars (buf
, val
, 2);
2945 case BFD_RELOC_SH_USES
:
2946 /* Pass the value into sh_coff_reloc_mangle. */
2947 fixP
->fx_addnumber
= val
;
2950 case BFD_RELOC_SH_COUNT
:
2951 case BFD_RELOC_SH_ALIGN
:
2952 case BFD_RELOC_SH_CODE
:
2953 case BFD_RELOC_SH_DATA
:
2954 case BFD_RELOC_SH_LABEL
:
2955 /* Nothing to do here. */
2958 case BFD_RELOC_SH_LOOP_START
:
2959 case BFD_RELOC_SH_LOOP_END
:
2961 case BFD_RELOC_VTABLE_INHERIT
:
2962 case BFD_RELOC_VTABLE_ENTRY
:
2967 case BFD_RELOC_32_PLT_PCREL
:
2968 /* Make the jump instruction point to the address of the operand. At
2969 runtime we merely add the offset to the actual PLT entry. */
2970 * valP
= 0xfffffffc;
2971 val
= fixP
->fx_addnumber
- S_GET_VALUE (fixP
->fx_subsy
);
2972 md_number_to_chars (buf
, val
, 4);
2975 case BFD_RELOC_SH_GOTPC
:
2976 /* This is tough to explain. We end up with this one if we have
2977 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
2978 The goal here is to obtain the absolute address of the GOT,
2979 and it is strongly preferable from a performance point of
2980 view to avoid using a runtime relocation for this. There are
2981 cases where you have something like:
2983 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
2985 and here no correction would be required. Internally in the
2986 assembler we treat operands of this form as not being pcrel
2987 since the '.' is explicitly mentioned, and I wonder whether
2988 it would simplify matters to do it this way. Who knows. In
2989 earlier versions of the PIC patches, the pcrel_adjust field
2990 was used to store the correction, but since the expression is
2991 not pcrel, I felt it would be confusing to do it this way. */
2993 md_number_to_chars (buf
, val
, 4);
2996 case BFD_RELOC_32_GOT_PCREL
:
2997 * valP
= 0; /* Fully resolved at runtime. No addend. */
2998 md_number_to_chars (buf
, 0, 4);
3001 case BFD_RELOC_32_GOTOFF
:
3002 md_number_to_chars (buf
, val
, 4);
3012 if ((val
& ((1 << shift
) - 1)) != 0)
3013 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3017 val
= ((val
>> shift
)
3018 | ((long) -1 & ~ ((long) -1 >> shift
)));
3020 if (max
!= 0 && (val
< min
|| val
> max
))
3021 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3023 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3027 /* Called just before address relaxation. Return the length
3028 by which a fragment must grow to reach it's destination. */
3031 md_estimate_size_before_relax (fragP
, segment_type
)
3032 register fragS
*fragP
;
3033 register segT segment_type
;
3037 switch (fragP
->fr_subtype
)
3042 case C (UNCOND_JUMP
, UNDEF_DISP
):
3043 /* Used to be a branch to somewhere which was unknown. */
3044 if (!fragP
->fr_symbol
)
3046 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3048 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3050 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3054 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3058 case C (COND_JUMP
, UNDEF_DISP
):
3059 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3060 what
= GET_WHAT (fragP
->fr_subtype
);
3061 /* Used to be a branch to somewhere which was unknown. */
3062 if (fragP
->fr_symbol
3063 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3065 /* Got a symbol and it's defined in this segment, become byte
3066 sized - maybe it will fix up. */
3067 fragP
->fr_subtype
= C (what
, COND8
);
3069 else if (fragP
->fr_symbol
)
3071 /* Its got a segment, but its not ours, so it will always be long. */
3072 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3076 /* We know the abs value. */
3077 fragP
->fr_subtype
= C (what
, COND8
);
3081 case C (UNCOND_JUMP
, UNCOND12
):
3082 case C (UNCOND_JUMP
, UNCOND32
):
3083 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3084 case C (COND_JUMP
, COND8
):
3085 case C (COND_JUMP
, COND12
):
3086 case C (COND_JUMP
, COND32
):
3087 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3088 case C (COND_JUMP_DELAY
, COND8
):
3089 case C (COND_JUMP_DELAY
, COND12
):
3090 case C (COND_JUMP_DELAY
, COND32
):
3091 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3092 /* When relaxing a section for the second time, we don't need to
3093 do anything besides return the current size. */
3097 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3098 return fragP
->fr_var
;
3101 /* Put number into target byte order. */
3104 md_number_to_chars (ptr
, use
, nbytes
)
3109 if (! target_big_endian
)
3110 number_to_chars_littleendian (ptr
, use
, nbytes
);
3112 number_to_chars_bigendian (ptr
, use
, nbytes
);
3116 md_pcrel_from_section (fixP
, sec
)
3120 if (fixP
->fx_addsy
!= (symbolS
*) NULL
3121 && (! S_IS_DEFINED (fixP
->fx_addsy
)
3122 || S_IS_EXTERN (fixP
->fx_addsy
)
3123 || S_IS_WEAK (fixP
->fx_addsy
)
3124 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3126 /* The symbol is undefined (or is defined but not in this section,
3127 or we're not sure about it being the final definition). Let the
3128 linker figure it out. We need to adjust the subtraction of a
3129 symbol to the position of the relocated data, though. */
3130 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3133 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3139 tc_coff_sizemachdep (frag
)
3142 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
3145 #endif /* OBJ_COFF */
3147 #ifndef BFD_ASSEMBLER
3150 /* Map BFD relocs to SH COFF relocs. */
3154 bfd_reloc_code_real_type bfd_reloc
;
3158 static const struct reloc_map coff_reloc_map
[] =
3160 { BFD_RELOC_32
, R_SH_IMM32
},
3161 { BFD_RELOC_16
, R_SH_IMM16
},
3162 { BFD_RELOC_8
, R_SH_IMM8
},
3163 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
3164 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
3165 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
3166 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
3167 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
3168 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
3169 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
3170 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
3171 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
3172 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
3173 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
3174 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
3175 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
3176 { BFD_RELOC_SH_USES
, R_SH_USES
},
3177 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
3178 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
3179 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
3180 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
3181 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
3182 { BFD_RELOC_UNUSED
, 0 }
3185 /* Adjust a reloc for the SH. This is similar to the generic code,
3186 but does some minor tweaking. */
3189 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
3190 segment_info_type
*seg
;
3192 struct internal_reloc
*intr
;
3195 symbolS
*symbol_ptr
= fix
->fx_addsy
;
3198 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
3200 if (! SWITCH_TABLE (fix
))
3202 const struct reloc_map
*rm
;
3204 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
3205 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
3207 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
3208 as_bad_where (fix
->fx_file
, fix
->fx_line
,
3209 _("Can not represent %s relocation in this object file format"),
3210 bfd_get_reloc_code_name (fix
->fx_r_type
));
3211 intr
->r_type
= rm
->sh_reloc
;
3218 if (fix
->fx_r_type
== BFD_RELOC_16
)
3219 intr
->r_type
= R_SH_SWITCH16
;
3220 else if (fix
->fx_r_type
== BFD_RELOC_8
)
3221 intr
->r_type
= R_SH_SWITCH8
;
3222 else if (fix
->fx_r_type
== BFD_RELOC_32
)
3223 intr
->r_type
= R_SH_SWITCH32
;
3227 /* For a switch reloc, we set r_offset to the difference between
3228 the reloc address and the subtrahend. When the linker is
3229 doing relaxing, it can use the determine the starting and
3230 ending points of the switch difference expression. */
3231 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
3234 /* PC relative relocs are always against the current section. */
3235 if (symbol_ptr
== NULL
)
3237 switch (fix
->fx_r_type
)
3239 case BFD_RELOC_SH_PCRELIMM8BY2
:
3240 case BFD_RELOC_SH_PCRELIMM8BY4
:
3241 case BFD_RELOC_SH_PCDISP8BY2
:
3242 case BFD_RELOC_SH_PCDISP12BY2
:
3243 case BFD_RELOC_SH_USES
:
3244 symbol_ptr
= seg
->dot
;
3251 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
3253 /* We can't store the offset in the object file, since this
3254 reloc does not take up any space, so we store it in r_offset.
3255 The fx_addnumber field was set in md_apply_fix3. */
3256 intr
->r_offset
= fix
->fx_addnumber
;
3258 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3260 /* We can't store the count in the object file, since this reloc
3261 does not take up any space, so we store it in r_offset. The
3262 fx_offset field was set when the fixup was created in
3263 sh_coff_frob_file. */
3264 intr
->r_offset
= fix
->fx_offset
;
3265 /* This reloc is always absolute. */
3268 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3270 /* Store the alignment in the r_offset field. */
3271 intr
->r_offset
= fix
->fx_offset
;
3272 /* This reloc is always absolute. */
3275 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3276 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3277 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3279 /* These relocs are always absolute. */
3283 /* Turn the segment of the symbol into an offset. */
3284 if (symbol_ptr
!= NULL
)
3286 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3288 intr
->r_symndx
= dot
->sy_number
;
3290 intr
->r_symndx
= symbol_ptr
->sy_number
;
3293 intr
->r_symndx
= -1;
3296 #endif /* OBJ_COFF */
3297 #endif /* ! BFD_ASSEMBLER */
3299 #ifdef BFD_ASSEMBLER
3301 /* Create a reloc. */
3304 tc_gen_reloc (section
, fixp
)
3305 asection
*section ATTRIBUTE_UNUSED
;
3309 bfd_reloc_code_real_type r_type
;
3311 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3312 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3313 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3314 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3317 && S_GET_SEGMENT (fixp
->fx_subsy
) == absolute_section
)
3319 fixp
->fx_addnumber
-= S_GET_VALUE (fixp
->fx_subsy
);
3323 r_type
= fixp
->fx_r_type
;
3325 if (SWITCH_TABLE (fixp
))
3327 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
3328 if (r_type
== BFD_RELOC_16
)
3329 r_type
= BFD_RELOC_SH_SWITCH16
;
3330 else if (r_type
== BFD_RELOC_8
)
3331 r_type
= BFD_RELOC_8_PCREL
;
3332 else if (r_type
== BFD_RELOC_32
)
3333 r_type
= BFD_RELOC_SH_SWITCH32
;
3337 else if (r_type
== BFD_RELOC_SH_USES
)
3338 rel
->addend
= fixp
->fx_addnumber
;
3339 else if (r_type
== BFD_RELOC_SH_COUNT
)
3340 rel
->addend
= fixp
->fx_offset
;
3341 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3342 rel
->addend
= fixp
->fx_offset
;
3343 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3344 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3345 rel
->addend
= fixp
->fx_offset
;
3346 else if (r_type
== BFD_RELOC_SH_LOOP_START
3347 || r_type
== BFD_RELOC_SH_LOOP_END
)
3348 rel
->addend
= fixp
->fx_offset
;
3349 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3352 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3354 else if (fixp
->fx_pcrel
)
3355 rel
->addend
= fixp
->fx_addnumber
;
3356 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
3357 rel
->addend
= fixp
->fx_addnumber
;
3361 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3362 if (rel
->howto
== NULL
|| fixp
->fx_subsy
)
3364 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3365 _("Cannot represent relocation type %s"),
3366 bfd_get_reloc_code_name (r_type
));
3367 /* Set howto to a garbage value so that we can keep going. */
3368 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3369 assert (rel
->howto
!= NULL
);
3376 inline static char *
3377 sh_end_of_match (cont
, what
)
3380 int len
= strlen (what
);
3382 if (strncasecmp (cont
, what
, strlen (what
)) == 0
3383 && ! is_part_of_name (cont
[len
]))
3390 sh_parse_name (name
, exprP
, nextcharP
)
3395 char *next
= input_line_pointer
;
3400 exprP
->X_op_symbol
= NULL
;
3402 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3405 GOT_symbol
= symbol_find_or_make (name
);
3407 exprP
->X_add_symbol
= GOT_symbol
;
3409 /* If we have an absolute symbol or a reg, then we know its
3411 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
3412 if (segment
== absolute_section
)
3414 exprP
->X_op
= O_constant
;
3415 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3416 exprP
->X_add_symbol
= NULL
;
3418 else if (segment
== reg_section
)
3420 exprP
->X_op
= O_register
;
3421 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3422 exprP
->X_add_symbol
= NULL
;
3426 exprP
->X_op
= O_symbol
;
3427 exprP
->X_add_number
= 0;
3433 exprP
->X_add_symbol
= symbol_find_or_make (name
);
3435 if (*nextcharP
!= '@')
3437 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
3438 reloc_type
= BFD_RELOC_32_GOTOFF
;
3439 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
3440 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
3441 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
3442 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
3446 *input_line_pointer
= *nextcharP
;
3447 input_line_pointer
= next_end
;
3448 *nextcharP
= *input_line_pointer
;
3449 *input_line_pointer
= '\0';
3451 exprP
->X_op
= O_PIC_reloc
;
3452 exprP
->X_add_number
= 0;
3453 exprP
->X_md
= reloc_type
;
3458 #endif /* BFD_ASSEMBLER */