1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate
;
47 const char comment_chars
[] = "!";
48 const char line_separator_chars
[] = ";";
49 const char line_comment_chars
[] = "!#";
51 static void s_uses
PARAMS ((int));
53 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
54 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
56 static void s_uacons
PARAMS ((int));
57 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
58 static unsigned int assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
59 static void little
PARAMS ((int));
60 static void big
PARAMS ((int));
61 static bfd_reloc_code_real_type sh_elf_suffix
62 PARAMS ((char **str_p
, expressionS
*, expressionS
*new_exp_p
));
63 static int parse_reg
PARAMS ((char *, int *, int *));
64 static symbolS
*dot
PARAMS ((void));
65 static char *parse_exp
PARAMS ((char *, sh_operand_info
*));
66 static char *parse_at
PARAMS ((char *, sh_operand_info
*));
67 static void get_operand
PARAMS ((char **, sh_operand_info
*));
68 static char *get_operands
69 PARAMS ((sh_opcode_info
*, char *, sh_operand_info
*));
70 static sh_opcode_info
*get_specific
71 PARAMS ((sh_opcode_info
*, sh_operand_info
*));
72 static void insert
PARAMS ((char *, int, int, sh_operand_info
*));
73 static void build_relax
PARAMS ((sh_opcode_info
*, sh_operand_info
*));
74 static char *insert_loop_bounds
PARAMS ((char *, sh_operand_info
*));
75 static unsigned int build_Mytes
76 PARAMS ((sh_opcode_info
*, sh_operand_info
*));
79 static void sh_elf_cons
PARAMS ((int));
81 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
86 int ignore ATTRIBUTE_UNUSED
;
88 if (! target_big_endian
)
89 as_bad (_("directive .big encountered when option -big required"));
91 /* Stop further messages. */
92 target_big_endian
= 1;
97 int ignore ATTRIBUTE_UNUSED
;
99 if (target_big_endian
)
100 as_bad (_("directive .little encountered when option -little required"));
102 /* Stop further messages. */
103 target_big_endian
= 0;
106 /* This table describes all the machine specific pseudo-ops the assembler
107 has to support. The fields are:
108 pseudo-op name without dot
109 function to call to execute this pseudo-op
110 Integer arg to pass to the function. */
112 const pseudo_typeS md_pseudo_table
[] =
115 {"long", sh_elf_cons
, 4},
116 {"int", sh_elf_cons
, 4},
117 {"word", sh_elf_cons
, 2},
118 {"short", sh_elf_cons
, 2},
124 {"form", listing_psize
, 0},
125 {"little", little
, 0},
126 {"heading", listing_title
, 0},
127 {"import", s_ignore
, 0},
128 {"page", listing_eject
, 0},
129 {"program", s_ignore
, 0},
131 {"uaword", s_uacons
, 2},
132 {"ualong", s_uacons
, 4},
133 {"uaquad", s_uacons
, 8},
134 {"2byte", s_uacons
, 2},
135 {"4byte", s_uacons
, 4},
136 {"8byte", s_uacons
, 8},
138 {"file", dwarf2_directive_file
, 0 },
139 {"loc", dwarf2_directive_loc
, 0 },
144 /*int md_reloc_size; */
146 int sh_relax
; /* set if -relax seen */
148 /* Whether -small was seen. */
152 /* Whether -dsp was seen. */
156 /* The bit mask of architectures that could
157 accomodate the insns seen so far. */
158 static int valid_arch
;
160 const char EXP_CHARS
[] = "eE";
162 /* Chars that mean this number is a floating point constant. */
165 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
167 #define C(a,b) ENCODE_RELAX(a,b)
169 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
170 #define GET_WHAT(x) ((x>>4))
172 /* These are the three types of relaxable instrction. */
174 #define COND_JUMP_DELAY 2
175 #define UNCOND_JUMP 3
182 #define UNDEF_WORD_DISP 4
187 /* Branch displacements are from the address of the branch plus
188 four, thus all minimum and maximum values have 4 added to them. */
191 #define COND8_LENGTH 2
193 /* There is one extra instruction before the branch, so we must add
194 two more bytes to account for it. */
195 #define COND12_F 4100
196 #define COND12_M -4090
197 #define COND12_LENGTH 6
199 #define COND12_DELAY_LENGTH 4
201 /* ??? The minimum and maximum values are wrong, but this does not matter
202 since this relocation type is not supported yet. */
203 #define COND32_F (1<<30)
204 #define COND32_M -(1<<30)
205 #define COND32_LENGTH 14
207 #define UNCOND12_F 4098
208 #define UNCOND12_M -4092
209 #define UNCOND12_LENGTH 2
211 /* ??? The minimum and maximum values are wrong, but this does not matter
212 since this relocation type is not supported yet. */
213 #define UNCOND32_F (1<<30)
214 #define UNCOND32_M -(1<<30)
215 #define UNCOND32_LENGTH 14
217 #define EMPTY { 0, 0, 0, 0 }
219 const relax_typeS md_relax_table
[C (END
, 0)] = {
220 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
221 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
224 /* C (COND_JUMP, COND8) */
225 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
226 /* C (COND_JUMP, COND12) */
227 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
228 /* C (COND_JUMP, COND32) */
229 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
230 /* C (COND_JUMP, UNDEF_WORD_DISP) */
231 { 0, 0, COND32_LENGTH
, 0, },
233 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
236 /* C (COND_JUMP_DELAY, COND8) */
237 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
238 /* C (COND_JUMP_DELAY, COND12) */
239 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
240 /* C (COND_JUMP_DELAY, COND32) */
241 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
242 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
243 { 0, 0, COND32_LENGTH
, 0, },
245 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
248 /* C (UNCOND_JUMP, UNCOND12) */
249 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
250 /* C (UNCOND_JUMP, UNCOND32) */
251 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
253 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
254 { 0, 0, UNCOND32_LENGTH
, 0, },
256 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
261 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
265 /* Parse @got, etc. and return the desired relocation.
266 If we have additional arithmetic expression, then we fill in new_exp_p. */
267 static bfd_reloc_code_real_type
268 sh_elf_suffix (str_p
, exp_p
, new_exp_p
)
270 expressionS
*exp_p
, *new_exp_p
;
275 bfd_reloc_code_real_type reloc
;
285 #define MAP(str,reloc) { str, sizeof (str)-1, reloc }
287 static struct map_bfd mapping
[] = {
288 MAP ("got", BFD_RELOC_32_GOT_PCREL
),
289 MAP ("plt", BFD_RELOC_32_PLT_PCREL
),
290 MAP ("gotoff", BFD_RELOC_32_GOTOFF
),
291 { (char *)0, 0, BFD_RELOC_UNUSED
}
295 return BFD_RELOC_UNUSED
;
297 for (ch
= *str
, str2
= ident
;
298 (str2
< ident
+ sizeof (ident
) - 1
299 && (ISALNUM (ch
) || ch
== '@'));
301 *str2
++ = TOLOWER (ch
);
307 for (ptr
= &mapping
[0]; ptr
->length
> 0; ptr
++)
308 if (ch
== ptr
->string
[0]
309 && len
== ptr
->length
310 && memcmp (ident
, ptr
->string
, ptr
->length
) == 0)
312 /* Now check for identifier@suffix+constant */
313 if (*str
== '-' || *str
== '+')
315 char *orig_line
= input_line_pointer
;
317 input_line_pointer
= str
;
318 expression (new_exp_p
);
319 if (new_exp_p
->X_op
== O_constant
)
321 exp_p
->X_add_number
+= new_exp_p
->X_add_number
;
322 str
= input_line_pointer
;
324 if (new_exp_p
->X_op
== O_subtract
)
325 str
= input_line_pointer
;
327 if (&input_line_pointer
!= str_p
)
328 input_line_pointer
= orig_line
;
335 return BFD_RELOC_UNUSED
;
338 /* The regular cons() function, that reads constants, doesn't support
339 suffixes such as @GOT, @GOTOFF and @PLT, that generate
340 machine-specific relocation types. So we must define it here. */
341 /* Clobbers input_line_pointer, checks end-of-line. */
344 register int nbytes
; /* 1=.byte, 2=.word, 4=.long */
346 expressionS exp
, new_exp
;
347 bfd_reloc_code_real_type reloc
;
350 if (is_it_end_of_statement ())
352 demand_empty_rest_of_line ();
359 new_exp
.X_op
= O_absent
;
360 new_exp
.X_add_symbol
= new_exp
.X_op_symbol
= NULL
;
361 /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet,
362 use the name of the symbol to tell whether it's the
363 _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is
365 if (! GOT_symbol
&& exp
.X_add_symbol
)
366 name
= S_GET_NAME (exp
.X_add_symbol
);
369 /* Check whether this expression involves the
370 _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a
371 difference of two other symbols. */
372 if (((GOT_symbol
&& GOT_symbol
== exp
.X_add_symbol
)
373 || (! GOT_symbol
&& name
374 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0))
375 && (exp
.X_op
== O_symbol
376 || (exp
.X_op
== O_add
377 && ((symbol_get_value_expression (exp
.X_op_symbol
)->X_op
)
380 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
382 int size
= bfd_get_reloc_size (reloc_howto
);
384 if (GOT_symbol
== NULL
)
385 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
388 as_bad (_("%s relocations do not fit in %d bytes\n"),
389 reloc_howto
->name
, nbytes
);
392 register char *p
= frag_more ((int) nbytes
);
393 int offset
= nbytes
- size
;
395 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
,
396 size
, &exp
, 0, TC_RELOC_GLOBAL_OFFSET_TABLE
);
399 /* Check if this symbol involves one of the magic suffixes, such
400 as @GOT, @GOTOFF or @PLT, and determine which relocation type
402 else if ((exp
.X_op
== O_symbol
|| (exp
.X_op
== O_add
&& exp
.X_op_symbol
))
403 && *input_line_pointer
== '@'
404 && ((reloc
= sh_elf_suffix (&input_line_pointer
, &exp
, &new_exp
))
405 != BFD_RELOC_UNUSED
))
407 reloc_howto_type
*reloc_howto
= bfd_reloc_type_lookup (stdoutput
,
409 int size
= bfd_get_reloc_size (reloc_howto
);
411 /* Force a GOT to be generated. */
412 if (GOT_symbol
== NULL
)
413 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
416 as_bad (_("%s relocations do not fit in %d bytes\n"),
417 reloc_howto
->name
, nbytes
);
420 register char *p
= frag_more ((int) nbytes
);
421 int offset
= nbytes
- size
;
423 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
, size
,
425 if (new_exp
.X_op
!= O_absent
)
426 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
+ offset
, size
,
427 &new_exp
, 0, BFD_RELOC_32
);
431 emit_expr (&exp
, (unsigned int) nbytes
);
433 while (*input_line_pointer
++ == ',');
435 input_line_pointer
--; /* Put terminator back into stream. */
436 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
438 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
441 demand_empty_rest_of_line ();
446 /* This function is called once, at assembler startup time. This should
447 set up all the tables, etc that the MD part of the assembler needs. */
452 sh_opcode_info
*opcode
;
453 char *prev_name
= "";
456 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
457 valid_arch
= target_arch
;
459 opcode_hash_control
= hash_new ();
461 /* Insert unique names into hash table. */
462 for (opcode
= sh_table
; opcode
->name
; opcode
++)
464 if (strcmp (prev_name
, opcode
->name
))
466 if (! (opcode
->arch
& target_arch
))
468 prev_name
= opcode
->name
;
469 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
473 /* Make all the opcodes with the same name point to the same
475 opcode
->name
= prev_name
;
482 static int reg_x
, reg_y
;
486 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
488 /* Try to parse a reg name. Return the number of chars consumed. */
491 parse_reg (src
, mode
, reg
)
496 char l0
= TOLOWER (src
[0]);
497 char l1
= l0
? TOLOWER (src
[1]) : 0;
499 /* We use ! IDENT_CHAR for the next character after the register name, to
500 make sure that we won't accidentally recognize a symbol name such as
501 'sram' or sr_ram as being a reference to the register 'sr'. */
507 if (src
[2] >= '0' && src
[2] <= '5'
508 && ! IDENT_CHAR ((unsigned char) src
[3]))
511 *reg
= 10 + src
[2] - '0';
515 if (l1
>= '0' && l1
<= '9'
516 && ! IDENT_CHAR ((unsigned char) src
[2]))
522 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
523 && ! IDENT_CHAR ((unsigned char) src
[7]))
530 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
535 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
546 if (! IDENT_CHAR ((unsigned char) src
[2]))
552 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
561 if (! IDENT_CHAR ((unsigned char) src
[2]))
567 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
575 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
576 && ! IDENT_CHAR ((unsigned char) src
[3]))
579 *reg
= 4 + (l1
- '0');
582 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
583 && ! IDENT_CHAR ((unsigned char) src
[3]))
586 *reg
= 6 + (l1
- '0');
589 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
590 && ! IDENT_CHAR ((unsigned char) src
[3]))
595 *reg
= n
| ((~n
& 2) << 1);
600 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[3]))
622 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
623 && ! IDENT_CHAR ((unsigned char) src
[2]))
626 *reg
= A_X0_NUM
+ l1
- '0';
630 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
631 && ! IDENT_CHAR ((unsigned char) src
[2]))
634 *reg
= A_Y0_NUM
+ l1
- '0';
638 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
639 && ! IDENT_CHAR ((unsigned char) src
[2]))
642 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
648 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
654 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
655 && ! IDENT_CHAR ((unsigned char) src
[3]))
661 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
662 && ! IDENT_CHAR ((unsigned char) src
[3]))
668 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
669 && ! IDENT_CHAR ((unsigned char) src
[3]))
675 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
676 && ! IDENT_CHAR ((unsigned char) src
[3]))
682 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
688 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
695 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
700 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
702 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
703 and use an uninitialized immediate. */
707 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
708 && ! IDENT_CHAR ((unsigned char) src
[3]))
713 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
714 && ! IDENT_CHAR ((unsigned char) src
[3]))
720 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
721 && ! IDENT_CHAR ((unsigned char) src
[4]))
723 if (TOLOWER (src
[3]) == 'l')
728 if (TOLOWER (src
[3]) == 'h')
734 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
735 && ! IDENT_CHAR ((unsigned char) src
[4]))
740 if (l0
== 'f' && l1
== 'r')
744 if (src
[3] >= '0' && src
[3] <= '5'
745 && ! IDENT_CHAR ((unsigned char) src
[4]))
748 *reg
= 10 + src
[3] - '0';
752 if (src
[2] >= '0' && src
[2] <= '9'
753 && ! IDENT_CHAR ((unsigned char) src
[3]))
756 *reg
= (src
[2] - '0');
760 if (l0
== 'd' && l1
== 'r')
764 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
765 && ! IDENT_CHAR ((unsigned char) src
[4]))
768 *reg
= 10 + src
[3] - '0';
772 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
773 && ! IDENT_CHAR ((unsigned char) src
[3]))
776 *reg
= (src
[2] - '0');
780 if (l0
== 'x' && l1
== 'd')
784 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
785 && ! IDENT_CHAR ((unsigned char) src
[4]))
788 *reg
= 11 + src
[3] - '0';
792 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
793 && ! IDENT_CHAR ((unsigned char) src
[3]))
796 *reg
= (src
[2] - '0') + 1;
800 if (l0
== 'f' && l1
== 'v')
802 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
808 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
809 && ! IDENT_CHAR ((unsigned char) src
[3]))
812 *reg
= (src
[2] - '0');
816 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
817 && TOLOWER (src
[3]) == 'l'
818 && ! IDENT_CHAR ((unsigned char) src
[4]))
824 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
825 && TOLOWER (src
[3]) == 'c'
826 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
832 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
833 && TOLOWER (src
[3]) == 'r'
834 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
848 /* JF: '.' is pseudo symbol with value of current location
849 in current segment. */
850 fake
= FAKE_LABEL_NAME
;
851 return symbol_new (fake
,
853 (valueT
) frag_now_fix (),
865 save
= input_line_pointer
;
866 input_line_pointer
= s
;
867 expression (&op
->immediate
);
868 if (op
->immediate
.X_op
== O_absent
)
869 as_bad (_("missing operand"));
870 new = input_line_pointer
;
871 input_line_pointer
= save
;
875 /* The many forms of operand:
878 @Rn Register indirect
891 pr, gbr, vbr, macl, mach
904 /* Must be predecrement. */
907 len
= parse_reg (src
, &mode
, &(op
->reg
));
909 as_bad (_("illegal register after @-"));
914 else if (src
[0] == '(')
916 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
919 len
= parse_reg (src
, &mode
, &(op
->reg
));
920 if (len
&& mode
== A_REG_N
)
925 as_bad (_("must be @(r0,...)"));
930 /* Now can be rn or gbr. */
931 len
= parse_reg (src
, &mode
, &(op
->reg
));
943 else if (mode
== A_REG_N
)
945 op
->type
= A_IND_R0_REG_N
;
949 as_bad (_("syntax error in @(r0,...)"));
954 as_bad (_("syntax error in @(r0...)"));
959 /* Must be an @(disp,.. thing). */
960 src
= parse_exp (src
, op
);
963 /* Now can be rn, gbr or pc. */
964 len
= parse_reg (src
, &mode
, &op
->reg
);
969 op
->type
= A_DISP_REG_N
;
971 else if (mode
== A_GBR
)
973 op
->type
= A_DISP_GBR
;
975 else if (mode
== A_PC
)
977 /* Turn a plain @(4,pc) into @(.+4,pc). */
978 if (op
->immediate
.X_op
== O_constant
)
980 op
->immediate
.X_add_symbol
= dot();
981 op
->immediate
.X_op
= O_symbol
;
983 op
->type
= A_DISP_PC
;
987 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
992 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
997 as_bad (_("expecting )"));
1003 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1004 if (mode
!= A_REG_N
)
1005 as_bad (_("illegal register after @"));
1012 l0
= TOLOWER (src
[0]);
1013 l1
= TOLOWER (src
[1]);
1015 if ((l0
== 'r' && l1
== '8')
1016 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1019 op
->type
= A_PMOD_N
;
1021 else if ( (l0
== 'r' && l1
== '9')
1022 || (l0
== 'i' && l1
== 'y'))
1025 op
->type
= A_PMODY_N
;
1037 get_operand (ptr
, op
)
1039 sh_operand_info
*op
;
1048 *ptr
= parse_exp (src
, op
);
1053 else if (src
[0] == '@')
1055 *ptr
= parse_at (src
, op
);
1058 len
= parse_reg (src
, &mode
, &(op
->reg
));
1067 /* Not a reg, the only thing left is a displacement. */
1068 *ptr
= parse_exp (src
, op
);
1069 op
->type
= A_DISP_PC
;
1075 get_operands (info
, args
, operand
)
1076 sh_opcode_info
*info
;
1078 sh_operand_info
*operand
;
1083 /* The pre-processor will eliminate whitespace in front of '@'
1084 after the first argument; we may be called multiple times
1085 from assemble_ppi, so don't insist on finding whitespace here. */
1089 get_operand (&ptr
, operand
+ 0);
1096 get_operand (&ptr
, operand
+ 1);
1097 /* ??? Hack: psha/pshl have a varying operand number depending on
1098 the type of the first operand. We handle this by having the
1099 three-operand version first and reducing the number of operands
1100 parsed to two if we see that the first operand is an immediate.
1101 This works because no insn with three operands has an immediate
1102 as first operand. */
1103 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1109 get_operand (&ptr
, operand
+ 2);
1113 operand
[2].type
= 0;
1118 operand
[1].type
= 0;
1119 operand
[2].type
= 0;
1124 operand
[0].type
= 0;
1125 operand
[1].type
= 0;
1126 operand
[2].type
= 0;
1131 /* Passed a pointer to a list of opcodes which use different
1132 addressing modes, return the opcode which matches the opcodes
1135 static sh_opcode_info
*
1136 get_specific (opcode
, operands
)
1137 sh_opcode_info
*opcode
;
1138 sh_operand_info
*operands
;
1140 sh_opcode_info
*this_try
= opcode
;
1141 char *name
= opcode
->name
;
1144 while (opcode
->name
)
1146 this_try
= opcode
++;
1147 if (this_try
->name
!= name
)
1149 /* We've looked so far down the table that we've run out of
1150 opcodes with the same name. */
1154 /* Look at both operands needed by the opcodes and provided by
1155 the user - since an arg test will often fail on the same arg
1156 again and again, we'll try and test the last failing arg the
1157 first on each opcode try. */
1158 for (n
= 0; this_try
->arg
[n
]; n
++)
1160 sh_operand_info
*user
= operands
+ n
;
1161 sh_arg_type arg
= this_try
->arg
[n
];
1173 if (user
->type
!= arg
)
1177 /* opcode needs r0 */
1178 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1182 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1186 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1194 case A_IND_R0_REG_N
:
1205 /* Opcode needs rn */
1206 if (user
->type
!= arg
)
1211 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1226 if (user
->type
!= arg
)
1231 if (user
->type
!= arg
)
1240 case A_IND_R0_REG_M
:
1243 /* Opcode needs rn */
1244 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1250 if (user
->type
!= DSP_REG_N
)
1272 if (user
->type
!= DSP_REG_N
)
1294 if (user
->type
!= DSP_REG_N
)
1316 if (user
->type
!= DSP_REG_N
)
1338 if (user
->type
!= DSP_REG_N
)
1360 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1364 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1368 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1372 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1376 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1386 /* Opcode needs rn */
1387 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1392 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1397 if (user
->type
!= XMTRX_M4
)
1403 printf (_("unhandled %d\n"), arg
);
1407 if ( !(valid_arch
& this_try
->arch
))
1409 valid_arch
&= this_try
->arch
;
1419 insert (where
, how
, pcrel
, op
)
1423 sh_operand_info
*op
;
1425 fix_new_exp (frag_now
,
1426 where
- frag_now
->fr_literal
,
1434 build_relax (opcode
, op
)
1435 sh_opcode_info
*opcode
;
1436 sh_operand_info
*op
;
1438 int high_byte
= target_big_endian
? 0 : 1;
1441 if (opcode
->arg
[0] == A_BDISP8
)
1443 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1444 p
= frag_var (rs_machine_dependent
,
1445 md_relax_table
[C (what
, COND32
)].rlx_length
,
1446 md_relax_table
[C (what
, COND8
)].rlx_length
,
1448 op
->immediate
.X_add_symbol
,
1449 op
->immediate
.X_add_number
,
1451 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1453 else if (opcode
->arg
[0] == A_BDISP12
)
1455 p
= frag_var (rs_machine_dependent
,
1456 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1457 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1459 op
->immediate
.X_add_symbol
,
1460 op
->immediate
.X_add_number
,
1462 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1467 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1470 insert_loop_bounds (output
, operand
)
1472 sh_operand_info
*operand
;
1477 /* Since the low byte of the opcode will be overwritten by the reloc, we
1478 can just stash the high byte into both bytes and ignore endianness. */
1481 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1482 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1486 static int count
= 0;
1488 /* If the last loop insn is a two-byte-insn, it is in danger of being
1489 swapped with the insn after it. To prevent this, create a new
1490 symbol - complete with SH_LABEL reloc - after the last loop insn.
1491 If the last loop insn is four bytes long, the symbol will be
1492 right in the middle, but four byte insns are not swapped anyways. */
1493 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1494 Hence a 9 digit number should be enough to count all REPEATs. */
1496 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1497 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1498 /* Make this a local symbol. */
1500 SF_SET_LOCAL (end_sym
);
1501 #endif /* OBJ_COFF */
1502 symbol_table_insert (end_sym
);
1503 end_sym
->sy_value
= operand
[1].immediate
;
1504 end_sym
->sy_value
.X_add_number
+= 2;
1505 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1508 output
= frag_more (2);
1511 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1512 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1514 return frag_more (2);
1517 /* Now we know what sort of opcodes it is, let's build the bytes. */
1520 build_Mytes (opcode
, operand
)
1521 sh_opcode_info
*opcode
;
1522 sh_operand_info
*operand
;
1526 char *output
= frag_more (2);
1527 unsigned int size
= 2;
1528 int low_byte
= target_big_endian
? 1 : 0;
1534 for (index
= 0; index
< 4; index
++)
1536 sh_nibble_type i
= opcode
->nibbles
[index
];
1546 nbuf
[index
] = reg_n
;
1549 nbuf
[index
] = reg_m
;
1552 if (reg_n
< 2 || reg_n
> 5)
1553 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1554 nbuf
[index
] = (reg_n
& 3) | 4;
1557 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1560 nbuf
[index
] = reg_b
| 0x08;
1563 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1566 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1569 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1572 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1575 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1578 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1581 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1584 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1587 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1590 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1593 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1596 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1599 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1, operand
);
1602 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1, operand
);
1605 output
= insert_loop_bounds (output
, operand
);
1606 nbuf
[index
] = opcode
->nibbles
[3];
1610 printf (_("failed for %d\n"), i
);
1614 if (!target_big_endian
)
1616 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1617 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1621 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1622 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1627 /* Find an opcode at the start of *STR_P in the hash table, and set
1628 *STR_P to the first character after the last one read. */
1630 static sh_opcode_info
*
1631 find_cooked_opcode (str_p
)
1635 unsigned char *op_start
;
1636 unsigned char *op_end
;
1640 /* Drop leading whitespace. */
1644 /* Find the op code end.
1645 The pre-processor will eliminate whitespace in front of
1646 any '@' after the first argument; we may be called from
1647 assemble_ppi, so the opcode might be terminated by an '@'. */
1648 for (op_start
= op_end
= (unsigned char *) (str
);
1651 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1654 unsigned char c
= op_start
[nlen
];
1656 /* The machine independent code will convert CMP/EQ into cmp/EQ
1657 because it thinks the '/' is the end of the symbol. Moreover,
1658 all but the first sub-insn is a parallel processing insn won't
1659 be capitalized. Instead of hacking up the machine independent
1660 code, we just deal with it here. */
1670 as_bad (_("can't find opcode "));
1672 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1675 /* Assemble a parallel processing insn. */
1676 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1679 assemble_ppi (op_end
, opcode
)
1681 sh_opcode_info
*opcode
;
1691 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1692 Make sure we encode a defined insn pattern. */
1698 sh_operand_info operand
[3];
1700 if (opcode
->arg
[0] != A_END
)
1701 op_end
= get_operands (opcode
, op_end
, operand
);
1702 opcode
= get_specific (opcode
, operand
);
1705 /* Couldn't find an opcode which matched the operands. */
1706 char *where
= frag_more (2);
1711 as_bad (_("invalid operands for opcode"));
1715 if (opcode
->nibbles
[0] != PPI
)
1716 as_bad (_("insn can't be combined with parallel processing insn"));
1718 switch (opcode
->nibbles
[1])
1723 as_bad (_("multiple movx specifications"));
1728 as_bad (_("multiple movy specifications"));
1734 as_bad (_("multiple movx specifications"));
1735 if (reg_n
< 4 || reg_n
> 5)
1736 as_bad (_("invalid movx address register"));
1737 if (opcode
->nibbles
[2] & 8)
1739 if (reg_m
== A_A1_NUM
)
1741 else if (reg_m
!= A_A0_NUM
)
1742 as_bad (_("invalid movx dsp register"));
1747 as_bad (_("invalid movx dsp register"));
1750 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1755 as_bad (_("multiple movy specifications"));
1756 if (opcode
->nibbles
[2] & 8)
1758 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1761 if (reg_m
== A_A1_NUM
)
1763 else if (reg_m
!= A_A0_NUM
)
1764 as_bad (_("invalid movy dsp register"));
1769 as_bad (_("invalid movy dsp register"));
1772 if (reg_n
< 6 || reg_n
> 7)
1773 as_bad (_("invalid movy address register"));
1774 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1778 if (operand
[0].immediate
.X_op
!= O_constant
)
1779 as_bad (_("dsp immediate shift value not constant"));
1780 field_b
= ((opcode
->nibbles
[2] << 12)
1781 | (operand
[0].immediate
.X_add_number
& 127) << 4
1786 as_bad (_("multiple parallel processing specifications"));
1787 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1788 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1792 as_bad (_("multiple condition specifications"));
1793 cond
= opcode
->nibbles
[2] << 8;
1795 goto skip_cond_check
;
1799 as_bad (_("multiple parallel processing specifications"));
1800 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1801 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1807 if ((field_b
& 0xef00) != 0xa100)
1808 as_bad (_("insn cannot be combined with pmuls"));
1810 switch (field_b
& 0xf)
1813 field_b
+= 0 - A_X0_NUM
;
1816 field_b
+= 1 - A_Y0_NUM
;
1819 field_b
+= 2 - A_A0_NUM
;
1822 field_b
+= 3 - A_A1_NUM
;
1825 as_bad (_("bad padd / psub pmuls output operand"));
1828 field_b
+= 0x4000 + reg_efg
;
1835 as_bad (_("condition not followed by conditionalizable insn"));
1841 opcode
= find_cooked_opcode (&op_end
);
1845 (_("unrecognized characters at end of parallel processing insn")));
1850 move_code
= movx
| movy
;
1853 /* Parallel processing insn. */
1854 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1856 output
= frag_more (4);
1858 if (! target_big_endian
)
1860 output
[3] = ppi_code
>> 8;
1861 output
[2] = ppi_code
;
1865 output
[2] = ppi_code
>> 8;
1866 output
[3] = ppi_code
;
1868 move_code
|= 0xf800;
1872 /* Just a double data transfer. */
1873 output
= frag_more (2);
1876 if (! target_big_endian
)
1878 output
[1] = move_code
>> 8;
1879 output
[0] = move_code
;
1883 output
[0] = move_code
>> 8;
1884 output
[1] = move_code
;
1889 /* This is the guts of the machine-dependent assembler. STR points to a
1890 machine dependent instruction. This function is supposed to emit
1891 the frags/bytes it assembles to. */
1897 unsigned char *op_end
;
1898 sh_operand_info operand
[3];
1899 sh_opcode_info
*opcode
;
1900 unsigned int size
= 0;
1902 opcode
= find_cooked_opcode (&str
);
1907 as_bad (_("unknown opcode"));
1912 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1914 /* Output a CODE reloc to tell the linker that the following
1915 bytes are instructions, not data. */
1916 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1918 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1921 if (opcode
->nibbles
[0] == PPI
)
1923 size
= assemble_ppi (op_end
, opcode
);
1927 if (opcode
->arg
[0] == A_BDISP12
1928 || opcode
->arg
[0] == A_BDISP8
)
1930 parse_exp (op_end
+ 1, &operand
[0]);
1931 build_relax (opcode
, &operand
[0]);
1935 if (opcode
->arg
[0] == A_END
)
1937 /* Ignore trailing whitespace. If there is any, it has already
1938 been compressed to a single space. */
1944 op_end
= get_operands (opcode
, op_end
, operand
);
1946 opcode
= get_specific (opcode
, operand
);
1950 /* Couldn't find an opcode which matched the operands. */
1951 char *where
= frag_more (2);
1956 as_bad (_("invalid operands for opcode"));
1961 as_bad (_("excess operands: '%s'"), op_end
);
1963 size
= build_Mytes (opcode
, operand
);
1968 #ifdef BFD_ASSEMBLER
1969 dwarf2_emit_insn (size
);
1973 /* This routine is called each time a label definition is seen. It
1974 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1979 static fragS
*last_label_frag
;
1980 static int last_label_offset
;
1983 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1987 offset
= frag_now_fix ();
1988 if (frag_now
!= last_label_frag
1989 || offset
!= last_label_offset
)
1991 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1992 last_label_frag
= frag_now
;
1993 last_label_offset
= offset
;
1998 /* This routine is called when the assembler is about to output some
1999 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2002 sh_flush_pending_output ()
2005 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2007 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2009 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2014 md_undefined_symbol (name
)
2018 /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we
2019 have no need to default values of symbols. */
2020 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2024 if (symbol_find (name
))
2025 as_bad ("GOT already in the symbol table");
2027 GOT_symbol
= symbol_new (name
, undefined_section
,
2028 (valueT
)0, & zero_address_frag
);
2033 #endif /* OBJ_ELF */
2039 #ifndef BFD_ASSEMBLER
2042 tc_crawl_symbol_chain (headers
)
2043 object_headers
*headers
;
2045 printf (_("call to tc_crawl_symbol_chain \n"));
2049 tc_headers_hook (headers
)
2050 object_headers
*headers
;
2052 printf (_("call to tc_headers_hook \n"));
2058 /* Various routines to kill one day. */
2059 /* Equal to MAX_PRECISION in atof-ieee.c. */
2060 #define MAX_LITTLENUMS 6
2062 /* Turn a string in input_line_pointer into a floating point constant
2063 of type TYPE, and store the appropriate bytes in *LITP. The number
2064 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2065 returned, or NULL on OK. */
2068 md_atof (type
, litP
, sizeP
)
2074 LITTLENUM_TYPE words
[4];
2090 return _("bad call to md_atof");
2093 t
= atof_ieee (input_line_pointer
, type
, words
);
2095 input_line_pointer
= t
;
2099 if (! target_big_endian
)
2101 for (i
= prec
- 1; i
>= 0; i
--)
2103 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2109 for (i
= 0; i
< prec
; i
++)
2111 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2119 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2120 call instruction. It refers to a label of the instruction which
2121 loads the register which the call uses. We use it to generate a
2122 special reloc for the linker. */
2126 int ignore ATTRIBUTE_UNUSED
;
2131 as_warn (_(".uses pseudo-op seen when not relaxing"));
2135 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2137 as_bad (_("bad .uses format"));
2138 ignore_rest_of_line ();
2142 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2144 demand_empty_rest_of_line ();
2147 CONST
char *md_shortopts
= "";
2148 struct option md_longopts
[] =
2150 #define OPTION_RELAX (OPTION_MD_BASE)
2151 #define OPTION_BIG (OPTION_MD_BASE + 1)
2152 #define OPTION_LITTLE (OPTION_BIG + 1)
2153 #define OPTION_SMALL (OPTION_LITTLE + 1)
2154 #define OPTION_DSP (OPTION_SMALL + 1)
2156 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2157 {"big", no_argument
, NULL
, OPTION_BIG
},
2158 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2159 {"small", no_argument
, NULL
, OPTION_SMALL
},
2160 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2161 {NULL
, no_argument
, NULL
, 0}
2163 size_t md_longopts_size
= sizeof (md_longopts
);
2166 md_parse_option (c
, arg
)
2168 char *arg ATTRIBUTE_UNUSED
;
2177 target_big_endian
= 1;
2181 target_big_endian
= 0;
2200 md_show_usage (stream
)
2203 fprintf (stream
, _("\
2205 -little generate little endian code\n\
2206 -big generate big endian code\n\
2207 -relax alter jump instructions for long displacements\n\
2208 -small align sections to 4 byte boundaries, not 16\n\
2209 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
2212 /* This struct is used to pass arguments to sh_count_relocs through
2213 bfd_map_over_sections. */
2215 struct sh_count_relocs
2217 /* Symbol we are looking for. */
2219 /* Count of relocs found. */
2223 /* Count the number of fixups in a section which refer to a particular
2224 symbol. When using BFD_ASSEMBLER, this is called via
2225 bfd_map_over_sections. */
2228 sh_count_relocs (abfd
, sec
, data
)
2229 bfd
*abfd ATTRIBUTE_UNUSED
;
2233 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2234 segment_info_type
*seginfo
;
2238 seginfo
= seg_info (sec
);
2239 if (seginfo
== NULL
)
2243 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2245 if (fix
->fx_addsy
== sym
)
2253 /* Handle the count relocs for a particular section. When using
2254 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2257 sh_frob_section (abfd
, sec
, ignore
)
2258 bfd
*abfd ATTRIBUTE_UNUSED
;
2260 PTR ignore ATTRIBUTE_UNUSED
;
2262 segment_info_type
*seginfo
;
2265 seginfo
= seg_info (sec
);
2266 if (seginfo
== NULL
)
2269 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2274 struct sh_count_relocs info
;
2276 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2279 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2280 symbol in the same section. */
2281 sym
= fix
->fx_addsy
;
2283 || fix
->fx_subsy
!= NULL
2284 || fix
->fx_addnumber
!= 0
2285 || S_GET_SEGMENT (sym
) != sec
2286 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2287 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2289 || S_IS_EXTERNAL (sym
))
2291 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2292 _(".uses does not refer to a local symbol in the same section"));
2296 /* Look through the fixups again, this time looking for one
2297 at the same location as sym. */
2298 val
= S_GET_VALUE (sym
);
2299 for (fscan
= seginfo
->fix_root
;
2301 fscan
= fscan
->fx_next
)
2302 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2303 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2304 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2305 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2306 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2310 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2311 _("can't find fixup pointed to by .uses"));
2315 if (fscan
->fx_tcbit
)
2317 /* We've already done this one. */
2321 /* The variable fscan should also be a fixup to a local symbol
2322 in the same section. */
2323 sym
= fscan
->fx_addsy
;
2325 || fscan
->fx_subsy
!= NULL
2326 || fscan
->fx_addnumber
!= 0
2327 || S_GET_SEGMENT (sym
) != sec
2328 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2329 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2331 || S_IS_EXTERNAL (sym
))
2333 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2334 _(".uses target does not refer to a local symbol in the same section"));
2338 /* Now we look through all the fixups of all the sections,
2339 counting the number of times we find a reference to sym. */
2342 #ifdef BFD_ASSEMBLER
2343 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2348 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2349 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2356 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2357 We have already adjusted the value of sym to include the
2358 fragment address, so we undo that adjustment here. */
2359 subseg_change (sec
, 0);
2360 fix_new (fscan
->fx_frag
,
2361 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
2362 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2366 /* This function is called after the symbol table has been completed,
2367 but before the relocs or section contents have been written out.
2368 If we have seen any .uses pseudo-ops, they point to an instruction
2369 which loads a register with the address of a function. We look
2370 through the fixups to find where the function address is being
2371 loaded from. We then generate a COUNT reloc giving the number of
2372 times that function address is referred to. The linker uses this
2373 information when doing relaxing, to decide when it can eliminate
2374 the stored function address entirely. */
2382 #ifdef BFD_ASSEMBLER
2383 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2388 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2389 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2394 /* Called after relaxing. Set the correct sizes of the fragments, and
2395 create relocs so that md_apply_fix3 will fill in the correct values. */
2398 md_convert_frag (headers
, seg
, fragP
)
2399 #ifdef BFD_ASSEMBLER
2400 bfd
*headers ATTRIBUTE_UNUSED
;
2402 object_headers
*headers
;
2409 switch (fragP
->fr_subtype
)
2411 case C (COND_JUMP
, COND8
):
2412 case C (COND_JUMP_DELAY
, COND8
):
2413 subseg_change (seg
, 0);
2414 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2415 1, BFD_RELOC_SH_PCDISP8BY2
);
2420 case C (UNCOND_JUMP
, UNCOND12
):
2421 subseg_change (seg
, 0);
2422 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2423 1, BFD_RELOC_SH_PCDISP12BY2
);
2428 case C (UNCOND_JUMP
, UNCOND32
):
2429 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2430 if (fragP
->fr_symbol
== NULL
)
2431 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2432 _("displacement overflows 12-bit field"));
2433 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2434 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2435 _("displacement to defined symbol %s overflows 12-bit field"),
2436 S_GET_NAME (fragP
->fr_symbol
));
2438 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2439 _("displacement to undefined symbol %s overflows 12-bit field"),
2440 S_GET_NAME (fragP
->fr_symbol
));
2441 /* Stabilize this frag, so we don't trip an assert. */
2442 fragP
->fr_fix
+= fragP
->fr_var
;
2446 case C (COND_JUMP
, COND12
):
2447 case C (COND_JUMP_DELAY
, COND12
):
2448 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2449 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2450 was due to gas incorrectly relaxing an out-of-range conditional
2451 branch with delay slot. It turned:
2452 bf.s L6 (slot mov.l r12,@(44,r0))
2455 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2457 32: 10 cb mov.l r12,@(44,r0)
2458 Therefore, branches with delay slots have to be handled
2459 differently from ones without delay slots. */
2461 unsigned char *buffer
=
2462 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2463 int highbyte
= target_big_endian
? 0 : 1;
2464 int lowbyte
= target_big_endian
? 1 : 0;
2465 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2467 /* Toggle the true/false bit of the bcond. */
2468 buffer
[highbyte
] ^= 0x2;
2470 /* If this is a delayed branch, we may not put the bra in the
2471 slot. So we change it to a non-delayed branch, like that:
2472 b! cond slot_label; bra disp; slot_label: slot_insn
2473 ??? We should try if swapping the conditional branch and
2474 its delay-slot insn already makes the branch reach. */
2476 /* Build a relocation to six / four bytes farther on. */
2477 subseg_change (seg
, 0);
2478 fix_new (fragP
, fragP
->fr_fix
, 2,
2479 #ifdef BFD_ASSEMBLER
2480 section_symbol (seg
),
2482 seg_info (seg
)->dot
,
2484 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2485 1, BFD_RELOC_SH_PCDISP8BY2
);
2487 /* Set up a jump instruction. */
2488 buffer
[highbyte
+ 2] = 0xa0;
2489 buffer
[lowbyte
+ 2] = 0;
2490 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2491 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2495 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2500 /* Fill in a NOP instruction. */
2501 buffer
[highbyte
+ 4] = 0x0;
2502 buffer
[lowbyte
+ 4] = 0x9;
2511 case C (COND_JUMP
, COND32
):
2512 case C (COND_JUMP_DELAY
, COND32
):
2513 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2514 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2515 if (fragP
->fr_symbol
== NULL
)
2516 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2517 _("displacement overflows 8-bit field"));
2518 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2519 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2520 _("displacement to defined symbol %s overflows 8-bit field"),
2521 S_GET_NAME (fragP
->fr_symbol
));
2523 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2524 _("displacement to undefined symbol %s overflows 8-bit field "),
2525 S_GET_NAME (fragP
->fr_symbol
));
2526 /* Stabilize this frag, so we don't trip an assert. */
2527 fragP
->fr_fix
+= fragP
->fr_var
;
2535 if (donerelax
&& !sh_relax
)
2536 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2537 _("overflow in branch to %s; converted into longer instruction sequence"),
2538 (fragP
->fr_symbol
!= NULL
2539 ? S_GET_NAME (fragP
->fr_symbol
)
2544 md_section_align (seg
, size
)
2545 segT seg ATTRIBUTE_UNUSED
;
2548 #ifdef BFD_ASSEMBLER
2551 #else /* ! OBJ_ELF */
2552 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2553 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2554 #endif /* ! OBJ_ELF */
2555 #else /* ! BFD_ASSEMBLER */
2556 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2557 & (-1 << section_alignment
[(int) seg
]));
2558 #endif /* ! BFD_ASSEMBLER */
2561 /* This static variable is set by s_uacons to tell sh_cons_align that
2562 the expession does not need to be aligned. */
2564 static int sh_no_align_cons
= 0;
2566 /* This handles the unaligned space allocation pseudo-ops, such as
2567 .uaword. .uaword is just like .word, but the value does not need
2574 /* Tell sh_cons_align not to align this value. */
2575 sh_no_align_cons
= 1;
2579 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2580 aligned correctly. Note that this can cause warnings to be issued
2581 when assembling initialized structured which were declared with the
2582 packed attribute. FIXME: Perhaps we should require an option to
2583 enable this warning? */
2586 sh_cons_align (nbytes
)
2592 if (sh_no_align_cons
)
2594 /* This is an unaligned pseudo-op. */
2595 sh_no_align_cons
= 0;
2600 while ((nbytes
& 1) == 0)
2609 if (now_seg
== absolute_section
)
2611 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2612 as_warn (_("misaligned data"));
2616 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
2617 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2619 record_alignment (now_seg
, nalign
);
2622 /* When relaxing, we need to output a reloc for any .align directive
2623 that requests alignment to a four byte boundary or larger. This is
2624 also where we check for misaligned data. */
2627 sh_handle_align (frag
)
2630 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
2632 if (frag
->fr_type
== rs_align_code
)
2634 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2635 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2637 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
2646 if (target_big_endian
)
2648 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
2649 frag
->fr_var
= sizeof big_nop_pattern
;
2653 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
2654 frag
->fr_var
= sizeof little_nop_pattern
;
2657 else if (frag
->fr_type
== rs_align_test
)
2660 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2664 && (frag
->fr_type
== rs_align
2665 || frag
->fr_type
== rs_align_code
)
2666 && frag
->fr_address
+ frag
->fr_fix
> 0
2667 && frag
->fr_offset
> 1
2668 && now_seg
!= bss_section
)
2669 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2670 BFD_RELOC_SH_ALIGN
);
2673 /* This macro decides whether a particular reloc is an entry in a
2674 switch table. It is used when relaxing, because the linker needs
2675 to know about all such entries so that it can adjust them if
2678 #ifdef BFD_ASSEMBLER
2679 #define SWITCH_TABLE_CONS(fix) (0)
2681 #define SWITCH_TABLE_CONS(fix) \
2682 ((fix)->fx_r_type == 0 \
2683 && ((fix)->fx_size == 2 \
2684 || (fix)->fx_size == 1 \
2685 || (fix)->fx_size == 4))
2688 #define SWITCH_TABLE(fix) \
2689 ((fix)->fx_addsy != NULL \
2690 && (fix)->fx_subsy != NULL \
2691 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2692 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2693 && ((fix)->fx_r_type == BFD_RELOC_32 \
2694 || (fix)->fx_r_type == BFD_RELOC_16 \
2695 || (fix)->fx_r_type == BFD_RELOC_8 \
2696 || SWITCH_TABLE_CONS (fix)))
2698 /* See whether we need to force a relocation into the output file.
2699 This is used to force out switch and PC relative relocations when
2703 sh_force_relocation (fix
)
2707 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2708 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
2709 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
2710 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
)
2716 return (fix
->fx_pcrel
2717 || SWITCH_TABLE (fix
)
2718 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2719 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2720 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2721 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2722 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2727 sh_fix_adjustable (fixP
)
2731 if (fixP
->fx_addsy
== NULL
)
2734 if (fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
2735 || fixP
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
2736 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
2737 || fixP
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
2738 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
2739 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH16
2740 || fixP
->fx_r_type
== BFD_RELOC_SH_SWITCH32
)
2743 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP
)
2744 || fixP
->fx_r_type
== BFD_RELOC_32_GOTOFF
2745 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
2748 /* We need the symbol name for the VTABLE entries */
2749 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2750 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2757 sh_elf_final_processing ()
2761 /* Set file-specific flags to indicate if this code needs
2762 a processor with the sh-dsp / sh3e ISA to execute. */
2763 if (valid_arch
& arch_sh1
)
2765 else if (valid_arch
& arch_sh2
)
2767 else if (valid_arch
& arch_sh_dsp
)
2769 else if (valid_arch
& arch_sh3
)
2771 else if (valid_arch
& arch_sh3_dsp
)
2773 else if (valid_arch
& arch_sh3e
)
2775 else if (valid_arch
& arch_sh4
)
2780 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2781 elf_elfheader (stdoutput
)->e_flags
|= val
;
2785 /* Apply a fixup to the object file. */
2788 md_apply_fix3 (fixP
, valP
, seg
)
2791 segT seg ATTRIBUTE_UNUSED
;
2793 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2794 int lowbyte
= target_big_endian
? 1 : 0;
2795 int highbyte
= target_big_endian
? 0 : 1;
2796 long val
= * (long *) valP
;
2800 #ifdef BFD_ASSEMBLER
2801 /* A difference between two symbols, the second of which is in the
2802 current section, is transformed in a PC-relative relocation to
2803 the other symbol. We have to adjust the relocation type here. */
2806 switch (fixP
->fx_r_type
)
2812 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
2815 /* Currently, we only support 32-bit PCREL relocations.
2816 We'd need a new reloc type to handle 16_PCREL, and
2817 8_PCREL is already taken for R_SH_SWITCH8, which
2818 apparently does something completely different than what
2821 bfd_set_error (bfd_error_bad_value
);
2825 bfd_set_error (bfd_error_bad_value
);
2830 /* The function adjust_reloc_syms won't convert a reloc against a weak
2831 symbol into a reloc against a section, but bfd_install_relocation
2832 will screw up if the symbol is defined, so we have to adjust val here
2833 to avoid the screw up later.
2835 For ordinary relocs, this does not happen for ELF, since for ELF,
2836 bfd_install_relocation uses the "special function" field of the
2837 howto, and does not execute the code that needs to be undone, as long
2838 as the special function does not return bfd_reloc_continue.
2839 It can happen for GOT- and PLT-type relocs the way they are
2840 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
2841 doesn't matter here since those relocs don't use VAL; see below. */
2842 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
2843 && fixP
->fx_addsy
!= NULL
2844 && S_IS_WEAK (fixP
->fx_addsy
))
2845 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2848 #ifndef BFD_ASSEMBLER
2849 if (fixP
->fx_r_type
== 0)
2851 if (fixP
->fx_size
== 2)
2852 fixP
->fx_r_type
= BFD_RELOC_16
;
2853 else if (fixP
->fx_size
== 4)
2854 fixP
->fx_r_type
= BFD_RELOC_32
;
2855 else if (fixP
->fx_size
== 1)
2856 fixP
->fx_r_type
= BFD_RELOC_8
;
2864 switch (fixP
->fx_r_type
)
2866 case BFD_RELOC_SH_IMM4
:
2868 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2871 case BFD_RELOC_SH_IMM4BY2
:
2874 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2877 case BFD_RELOC_SH_IMM4BY4
:
2880 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2883 case BFD_RELOC_SH_IMM8BY2
:
2889 case BFD_RELOC_SH_IMM8BY4
:
2896 case BFD_RELOC_SH_IMM8
:
2897 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2898 sometimes it is not (e.g., and). We permit any 8 bit value.
2899 Note that adding further restrictions may invalidate
2900 reasonable looking assembly code, such as ``and -0x1,r0''. */
2906 case BFD_RELOC_SH_PCRELIMM8BY4
:
2907 /* The lower two bits of the PC are cleared before the
2908 displacement is added in. We can assume that the destination
2909 is on a 4 byte bounday. If this instruction is also on a 4
2910 byte boundary, then we want
2912 and target - here is a multiple of 4.
2913 Otherwise, we are on a 2 byte boundary, and we want
2914 (target - (here - 2)) / 4
2915 and target - here is not a multiple of 4. Computing
2916 (target - (here - 2)) / 4 == (target - here + 2) / 4
2917 works for both cases, since in the first case the addition of
2918 2 will be removed by the division. target - here is in the
2920 val
= (val
+ 2) / 4;
2922 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2926 case BFD_RELOC_SH_PCRELIMM8BY2
:
2929 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2933 case BFD_RELOC_SH_PCDISP8BY2
:
2935 if (val
< -0x80 || val
> 0x7f)
2936 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2940 case BFD_RELOC_SH_PCDISP12BY2
:
2942 if (val
< -0x800 || val
> 0x7ff)
2943 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2944 buf
[lowbyte
] = val
& 0xff;
2945 buf
[highbyte
] |= (val
>> 8) & 0xf;
2949 case BFD_RELOC_32_PCREL
:
2950 md_number_to_chars (buf
, val
, 4);
2954 md_number_to_chars (buf
, val
, 2);
2957 case BFD_RELOC_SH_USES
:
2958 /* Pass the value into sh_coff_reloc_mangle. */
2959 fixP
->fx_addnumber
= val
;
2962 case BFD_RELOC_SH_COUNT
:
2963 case BFD_RELOC_SH_ALIGN
:
2964 case BFD_RELOC_SH_CODE
:
2965 case BFD_RELOC_SH_DATA
:
2966 case BFD_RELOC_SH_LABEL
:
2967 /* Nothing to do here. */
2970 case BFD_RELOC_SH_LOOP_START
:
2971 case BFD_RELOC_SH_LOOP_END
:
2973 case BFD_RELOC_VTABLE_INHERIT
:
2974 case BFD_RELOC_VTABLE_ENTRY
:
2979 case BFD_RELOC_32_PLT_PCREL
:
2980 /* Make the jump instruction point to the address of the operand. At
2981 runtime we merely add the offset to the actual PLT entry. */
2982 * valP
= 0xfffffffc;
2985 case BFD_RELOC_SH_GOTPC
:
2986 /* This is tough to explain. We end up with this one if we have
2987 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
2988 The goal here is to obtain the absolute address of the GOT,
2989 and it is strongly preferable from a performance point of
2990 view to avoid using a runtime relocation for this. There are
2991 cases where you have something like:
2993 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
2995 and here no correction would be required. Internally in the
2996 assembler we treat operands of this form as not being pcrel
2997 since the '.' is explicitly mentioned, and I wonder whether
2998 it would simplify matters to do it this way. Who knows. In
2999 earlier versions of the PIC patches, the pcrel_adjust field
3000 was used to store the correction, but since the expression is
3001 not pcrel, I felt it would be confusing to do it this way. */
3003 md_number_to_chars (buf
, val
, 4);
3006 case BFD_RELOC_32_GOT_PCREL
:
3007 * valP
= 0; /* Fully resolved at runtime. No addend. */
3008 md_number_to_chars (buf
, 0, 4);
3011 case BFD_RELOC_32_GOTOFF
:
3021 if ((val
& ((1 << shift
) - 1)) != 0)
3022 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3026 val
= ((val
>> shift
)
3027 | ((long) -1 & ~ ((long) -1 >> shift
)));
3029 if (max
!= 0 && (val
< min
|| val
> max
))
3030 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3032 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3036 /* Called just before address relaxation. Return the length
3037 by which a fragment must grow to reach it's destination. */
3040 md_estimate_size_before_relax (fragP
, segment_type
)
3041 register fragS
*fragP
;
3042 register segT segment_type
;
3046 switch (fragP
->fr_subtype
)
3051 case C (UNCOND_JUMP
, UNDEF_DISP
):
3052 /* Used to be a branch to somewhere which was unknown. */
3053 if (!fragP
->fr_symbol
)
3055 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3057 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3059 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3063 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3067 case C (COND_JUMP
, UNDEF_DISP
):
3068 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3069 what
= GET_WHAT (fragP
->fr_subtype
);
3070 /* Used to be a branch to somewhere which was unknown. */
3071 if (fragP
->fr_symbol
3072 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3074 /* Got a symbol and it's defined in this segment, become byte
3075 sized - maybe it will fix up. */
3076 fragP
->fr_subtype
= C (what
, COND8
);
3078 else if (fragP
->fr_symbol
)
3080 /* Its got a segment, but its not ours, so it will always be long. */
3081 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3085 /* We know the abs value. */
3086 fragP
->fr_subtype
= C (what
, COND8
);
3090 case C (UNCOND_JUMP
, UNCOND12
):
3091 case C (UNCOND_JUMP
, UNCOND32
):
3092 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3093 case C (COND_JUMP
, COND8
):
3094 case C (COND_JUMP
, COND12
):
3095 case C (COND_JUMP
, COND32
):
3096 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3097 case C (COND_JUMP_DELAY
, COND8
):
3098 case C (COND_JUMP_DELAY
, COND12
):
3099 case C (COND_JUMP_DELAY
, COND32
):
3100 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3101 /* When relaxing a section for the second time, we don't need to
3102 do anything besides return the current size. */
3106 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3107 return fragP
->fr_var
;
3110 /* Put number into target byte order. */
3113 md_number_to_chars (ptr
, use
, nbytes
)
3118 if (! target_big_endian
)
3119 number_to_chars_littleendian (ptr
, use
, nbytes
);
3121 number_to_chars_bigendian (ptr
, use
, nbytes
);
3125 md_pcrel_from_section (fixP
, sec
)
3129 if (fixP
->fx_addsy
!= (symbolS
*) NULL
3130 && (! S_IS_DEFINED (fixP
->fx_addsy
)
3131 || S_IS_EXTERN (fixP
->fx_addsy
)
3132 || S_IS_WEAK (fixP
->fx_addsy
)
3133 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3135 /* The symbol is undefined (or is defined but not in this section,
3136 or we're not sure about it being the final definition). Let the
3137 linker figure it out. We need to adjust the subtraction of a
3138 symbol to the position of the relocated data, though. */
3139 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3142 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3148 tc_coff_sizemachdep (frag
)
3151 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
3154 #endif /* OBJ_COFF */
3156 #ifndef BFD_ASSEMBLER
3159 /* Map BFD relocs to SH COFF relocs. */
3163 bfd_reloc_code_real_type bfd_reloc
;
3167 static const struct reloc_map coff_reloc_map
[] =
3169 { BFD_RELOC_32
, R_SH_IMM32
},
3170 { BFD_RELOC_16
, R_SH_IMM16
},
3171 { BFD_RELOC_8
, R_SH_IMM8
},
3172 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
3173 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
3174 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
3175 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
3176 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
3177 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
3178 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
3179 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
3180 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
3181 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
3182 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
3183 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
3184 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
3185 { BFD_RELOC_SH_USES
, R_SH_USES
},
3186 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
3187 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
3188 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
3189 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
3190 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
3191 { BFD_RELOC_UNUSED
, 0 }
3194 /* Adjust a reloc for the SH. This is similar to the generic code,
3195 but does some minor tweaking. */
3198 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
3199 segment_info_type
*seg
;
3201 struct internal_reloc
*intr
;
3204 symbolS
*symbol_ptr
= fix
->fx_addsy
;
3207 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
3209 if (! SWITCH_TABLE (fix
))
3211 const struct reloc_map
*rm
;
3213 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
3214 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
3216 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
3217 as_bad_where (fix
->fx_file
, fix
->fx_line
,
3218 _("Can not represent %s relocation in this object file format"),
3219 bfd_get_reloc_code_name (fix
->fx_r_type
));
3220 intr
->r_type
= rm
->sh_reloc
;
3227 if (fix
->fx_r_type
== BFD_RELOC_16
)
3228 intr
->r_type
= R_SH_SWITCH16
;
3229 else if (fix
->fx_r_type
== BFD_RELOC_8
)
3230 intr
->r_type
= R_SH_SWITCH8
;
3231 else if (fix
->fx_r_type
== BFD_RELOC_32
)
3232 intr
->r_type
= R_SH_SWITCH32
;
3236 /* For a switch reloc, we set r_offset to the difference between
3237 the reloc address and the subtrahend. When the linker is
3238 doing relaxing, it can use the determine the starting and
3239 ending points of the switch difference expression. */
3240 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
3243 /* PC relative relocs are always against the current section. */
3244 if (symbol_ptr
== NULL
)
3246 switch (fix
->fx_r_type
)
3248 case BFD_RELOC_SH_PCRELIMM8BY2
:
3249 case BFD_RELOC_SH_PCRELIMM8BY4
:
3250 case BFD_RELOC_SH_PCDISP8BY2
:
3251 case BFD_RELOC_SH_PCDISP12BY2
:
3252 case BFD_RELOC_SH_USES
:
3253 symbol_ptr
= seg
->dot
;
3260 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
3262 /* We can't store the offset in the object file, since this
3263 reloc does not take up any space, so we store it in r_offset.
3264 The fx_addnumber field was set in md_apply_fix3. */
3265 intr
->r_offset
= fix
->fx_addnumber
;
3267 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3269 /* We can't store the count in the object file, since this reloc
3270 does not take up any space, so we store it in r_offset. The
3271 fx_offset field was set when the fixup was created in
3272 sh_coff_frob_file. */
3273 intr
->r_offset
= fix
->fx_offset
;
3274 /* This reloc is always absolute. */
3277 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3279 /* Store the alignment in the r_offset field. */
3280 intr
->r_offset
= fix
->fx_offset
;
3281 /* This reloc is always absolute. */
3284 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3285 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3286 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3288 /* These relocs are always absolute. */
3292 /* Turn the segment of the symbol into an offset. */
3293 if (symbol_ptr
!= NULL
)
3295 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3297 intr
->r_symndx
= dot
->sy_number
;
3299 intr
->r_symndx
= symbol_ptr
->sy_number
;
3302 intr
->r_symndx
= -1;
3305 #endif /* OBJ_COFF */
3306 #endif /* ! BFD_ASSEMBLER */
3308 #ifdef BFD_ASSEMBLER
3310 /* Create a reloc. */
3313 tc_gen_reloc (section
, fixp
)
3314 asection
*section ATTRIBUTE_UNUSED
;
3318 bfd_reloc_code_real_type r_type
;
3320 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3321 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3322 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3323 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3325 r_type
= fixp
->fx_r_type
;
3327 if (SWITCH_TABLE (fixp
))
3329 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
3330 if (r_type
== BFD_RELOC_16
)
3331 r_type
= BFD_RELOC_SH_SWITCH16
;
3332 else if (r_type
== BFD_RELOC_8
)
3333 r_type
= BFD_RELOC_8_PCREL
;
3334 else if (r_type
== BFD_RELOC_32
)
3335 r_type
= BFD_RELOC_SH_SWITCH32
;
3339 else if (r_type
== BFD_RELOC_SH_USES
)
3340 rel
->addend
= fixp
->fx_addnumber
;
3341 else if (r_type
== BFD_RELOC_SH_COUNT
)
3342 rel
->addend
= fixp
->fx_offset
;
3343 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3344 rel
->addend
= fixp
->fx_offset
;
3345 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3346 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3347 rel
->addend
= fixp
->fx_offset
;
3348 else if (r_type
== BFD_RELOC_SH_LOOP_START
3349 || r_type
== BFD_RELOC_SH_LOOP_END
)
3350 rel
->addend
= fixp
->fx_offset
;
3351 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3354 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3356 else if (fixp
->fx_pcrel
)
3357 rel
->addend
= fixp
->fx_addnumber
;
3358 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
3359 rel
->addend
= fixp
->fx_addnumber
;
3363 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3364 if (rel
->howto
== NULL
)
3366 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3367 _("Cannot represent relocation type %s"),
3368 bfd_get_reloc_code_name (r_type
));
3369 /* Set howto to a garbage value so that we can keep going. */
3370 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3371 assert (rel
->howto
!= NULL
);
3377 #endif /* BFD_ASSEMBLER */