1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Written By Steve Chamberlain <sac@cygnus.com> */
29 #include "opcodes/sh-opc.h"
30 #include "safe-ctype.h"
31 #include "struc-symbol.h"
37 #include "dwarf2dbg.h"
43 expressionS immediate
;
47 const char comment_chars
[] = "!";
48 const char line_separator_chars
[] = ";";
49 const char line_comment_chars
[] = "!#";
51 static void s_uses (int);
52 static void s_uacons (int);
55 static void sh_elf_cons (int);
57 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
61 big (int ignore ATTRIBUTE_UNUSED
)
63 if (! target_big_endian
)
64 as_bad (_("directive .big encountered when option -big required"));
66 /* Stop further messages. */
67 target_big_endian
= 1;
71 little (int ignore ATTRIBUTE_UNUSED
)
73 if (target_big_endian
)
74 as_bad (_("directive .little encountered when option -little required"));
76 /* Stop further messages. */
77 target_big_endian
= 0;
80 /* This table describes all the machine specific pseudo-ops the assembler
81 has to support. The fields are:
82 pseudo-op name without dot
83 function to call to execute this pseudo-op
84 Integer arg to pass to the function. */
86 const pseudo_typeS md_pseudo_table
[] =
89 {"long", sh_elf_cons
, 4},
90 {"int", sh_elf_cons
, 4},
91 {"word", sh_elf_cons
, 2},
92 {"short", sh_elf_cons
, 2},
98 {"form", listing_psize
, 0},
99 {"little", little
, 0},
100 {"heading", listing_title
, 0},
101 {"import", s_ignore
, 0},
102 {"page", listing_eject
, 0},
103 {"program", s_ignore
, 0},
105 {"uaword", s_uacons
, 2},
106 {"ualong", s_uacons
, 4},
107 {"uaquad", s_uacons
, 8},
108 {"2byte", s_uacons
, 2},
109 {"4byte", s_uacons
, 4},
110 {"8byte", s_uacons
, 8},
112 {"mode", s_sh64_mode
, 0 },
114 /* Have the old name too. */
115 {"isa", s_sh64_mode
, 0 },
117 /* Assert that the right ABI is used. */
118 {"abi", s_sh64_abi
, 0 },
120 { "vtable_inherit", sh64_vtable_inherit
, 0 },
121 { "vtable_entry", sh64_vtable_entry
, 0 },
122 #endif /* HAVE_SH64 */
126 /*int md_reloc_size; */
128 int sh_relax
; /* set if -relax seen */
130 /* Whether -small was seen. */
134 /* preset architecture set, if given; zero otherwise. */
136 static int preset_target_arch
;
138 /* The bit mask of architectures that could
139 accomodate the insns seen so far. */
140 static int valid_arch
;
142 const char EXP_CHARS
[] = "eE";
144 /* Chars that mean this number is a floating point constant. */
147 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
149 #define C(a,b) ENCODE_RELAX(a,b)
151 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
152 #define GET_WHAT(x) ((x>>4))
154 /* These are the three types of relaxable instrction. */
155 /* These are the types of relaxable instructions; except for END which is
158 #define COND_JUMP_DELAY 2
159 #define UNCOND_JUMP 3
163 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
164 #define SH64PCREL16_32 4
165 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
166 #define SH64PCREL16_64 5
168 /* Variants of the above for adjusting the insn to PTA or PTB according to
170 #define SH64PCREL16PT_32 6
171 #define SH64PCREL16PT_64 7
173 /* A MOVI expansion, expanding to at most 32 or 64 bits. */
174 #define MOVI_IMM_32 8
175 #define MOVI_IMM_32_PCREL 9
176 #define MOVI_IMM_64 10
177 #define MOVI_IMM_64_PCREL 11
180 #else /* HAVE_SH64 */
184 #endif /* HAVE_SH64 */
190 #define UNDEF_WORD_DISP 4
196 #define UNDEF_SH64PCREL 0
197 #define SH64PCREL16 1
198 #define SH64PCREL32 2
199 #define SH64PCREL48 3
200 #define SH64PCREL64 4
201 #define SH64PCRELPLT 5
209 #define MOVI_GOTOFF 6
211 #endif /* HAVE_SH64 */
213 /* Branch displacements are from the address of the branch plus
214 four, thus all minimum and maximum values have 4 added to them. */
217 #define COND8_LENGTH 2
219 /* There is one extra instruction before the branch, so we must add
220 two more bytes to account for it. */
221 #define COND12_F 4100
222 #define COND12_M -4090
223 #define COND12_LENGTH 6
225 #define COND12_DELAY_LENGTH 4
227 /* ??? The minimum and maximum values are wrong, but this does not matter
228 since this relocation type is not supported yet. */
229 #define COND32_F (1<<30)
230 #define COND32_M -(1<<30)
231 #define COND32_LENGTH 14
233 #define UNCOND12_F 4098
234 #define UNCOND12_M -4092
235 #define UNCOND12_LENGTH 2
237 /* ??? The minimum and maximum values are wrong, but this does not matter
238 since this relocation type is not supported yet. */
239 #define UNCOND32_F (1<<30)
240 #define UNCOND32_M -(1<<30)
241 #define UNCOND32_LENGTH 14
244 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
245 TRd" as is the current insn, so no extra length. Note that the "reach"
246 is calculated from the address *after* that insn, but the offset in the
247 insn is calculated from the beginning of the insn. We also need to
248 take into account the implicit 1 coded as the "A" in PTA when counting
249 forward. If PTB reaches an odd address, we trap that as an error
250 elsewhere, so we don't have to have different relaxation entries. We
251 don't add a one to the negative range, since PTB would then have the
252 farthest backward-reaching value skipped, not generated at relaxation. */
253 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
254 #define SH64PCREL16_M (-32768 * 4 - 4)
255 #define SH64PCREL16_LENGTH 0
257 /* The next step is to change that PT insn into
258 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
259 SHORI (label - datalabel Ln) & 65535, R25
262 which means two extra insns, 8 extra bytes. This is the limit for the
265 The expressions look a bit bad since we have to adjust this to avoid overflow on a
267 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
268 #define SH64PCREL32_LENGTH (2 * 4)
270 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
272 #if BFD_HOST_64BIT_LONG
273 /* The "reach" type is long, so we can only do this for a 64-bit-long
275 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
276 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
277 #define SH64PCREL48_M (((long) -1 << 47) - 4)
278 #define SH64PCREL48_LENGTH (3 * 4)
280 /* If the host does not have 64-bit longs, just make this state identical
281 in reach to the 32-bit state. Note that we have a slightly incorrect
282 reach, but the correct one above will overflow a 32-bit number. */
283 #define SH64PCREL32_M (((long) -1 << 30) * 2)
284 #define SH64PCREL48_F SH64PCREL32_F
285 #define SH64PCREL48_M SH64PCREL32_M
286 #define SH64PCREL48_LENGTH (3 * 4)
287 #endif /* BFD_HOST_64BIT_LONG */
289 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
291 #define SH64PCREL64_LENGTH (4 * 4)
293 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
294 SH64PCREL expansions. The PCREL one is similar, but the other has no
295 pc-relative reach; it must be fully expanded in
296 shmedia_md_estimate_size_before_relax. */
297 #define MOVI_16_LENGTH 0
298 #define MOVI_16_F (32767 - 4)
299 #define MOVI_16_M (-32768 - 4)
300 #define MOVI_32_LENGTH 4
301 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
302 #define MOVI_48_LENGTH 8
304 #if BFD_HOST_64BIT_LONG
305 /* The "reach" type is long, so we can only do this for a 64-bit-long
307 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
308 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
309 #define MOVI_48_M (((long) -1 << 47) - 4)
311 /* If the host does not have 64-bit longs, just make this state identical
312 in reach to the 32-bit state. Note that we have a slightly incorrect
313 reach, but the correct one above will overflow a 32-bit number. */
314 #define MOVI_32_M (((long) -1 << 30) * 2)
315 #define MOVI_48_F MOVI_32_F
316 #define MOVI_48_M MOVI_32_M
317 #endif /* BFD_HOST_64BIT_LONG */
319 #define MOVI_64_LENGTH 12
320 #endif /* HAVE_SH64 */
322 #define EMPTY { 0, 0, 0, 0 }
324 const relax_typeS md_relax_table
[C (END
, 0)] = {
325 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
326 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
329 /* C (COND_JUMP, COND8) */
330 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
331 /* C (COND_JUMP, COND12) */
332 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
333 /* C (COND_JUMP, COND32) */
334 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
335 /* C (COND_JUMP, UNDEF_WORD_DISP) */
336 { 0, 0, COND32_LENGTH
, 0, },
338 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
341 /* C (COND_JUMP_DELAY, COND8) */
342 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
343 /* C (COND_JUMP_DELAY, COND12) */
344 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
345 /* C (COND_JUMP_DELAY, COND32) */
346 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
347 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
348 { 0, 0, COND32_LENGTH
, 0, },
350 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
353 /* C (UNCOND_JUMP, UNCOND12) */
354 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
355 /* C (UNCOND_JUMP, UNCOND32) */
356 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
358 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
359 { 0, 0, UNCOND32_LENGTH
, 0, },
361 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
364 /* C (SH64PCREL16_32, SH64PCREL16) */
366 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_32
, SH64PCREL32
) },
367 /* C (SH64PCREL16_32, SH64PCREL32) */
368 { 0, 0, SH64PCREL32_LENGTH
, 0 },
370 /* C (SH64PCREL16_32, SH64PCRELPLT) */
371 { 0, 0, SH64PCREL32_LENGTH
, 0 },
373 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
375 /* C (SH64PCREL16_64, SH64PCREL16) */
377 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16_64
, SH64PCREL32
) },
378 /* C (SH64PCREL16_64, SH64PCREL32) */
379 { SH64PCREL32_F
, SH64PCREL32_M
, SH64PCREL32_LENGTH
, C (SH64PCREL16_64
, SH64PCREL48
) },
380 /* C (SH64PCREL16_64, SH64PCREL48) */
381 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16_64
, SH64PCREL64
) },
382 /* C (SH64PCREL16_64, SH64PCREL64) */
383 { 0, 0, SH64PCREL64_LENGTH
, 0 },
384 /* C (SH64PCREL16_64, SH64PCRELPLT) */
385 { 0, 0, SH64PCREL64_LENGTH
, 0 },
387 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
389 /* C (SH64PCREL16PT_32, SH64PCREL16) */
391 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_32
, SH64PCREL32
) },
392 /* C (SH64PCREL16PT_32, SH64PCREL32) */
393 { 0, 0, SH64PCREL32_LENGTH
, 0 },
395 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
396 { 0, 0, SH64PCREL32_LENGTH
, 0 },
398 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
400 /* C (SH64PCREL16PT_64, SH64PCREL16) */
402 { SH64PCREL16_F
, SH64PCREL16_M
, SH64PCREL16_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL32
) },
403 /* C (SH64PCREL16PT_64, SH64PCREL32) */
407 C (SH64PCREL16PT_64
, SH64PCREL48
) },
408 /* C (SH64PCREL16PT_64, SH64PCREL48) */
409 { SH64PCREL48_F
, SH64PCREL48_M
, SH64PCREL48_LENGTH
, C (SH64PCREL16PT_64
, SH64PCREL64
) },
410 /* C (SH64PCREL16PT_64, SH64PCREL64) */
411 { 0, 0, SH64PCREL64_LENGTH
, 0 },
412 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
413 { 0, 0, SH64PCREL64_LENGTH
, 0},
415 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
417 /* C (MOVI_IMM_32, UNDEF_MOVI) */
418 { 0, 0, MOVI_32_LENGTH
, 0 },
419 /* C (MOVI_IMM_32, MOVI_16) */
420 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32
, MOVI_32
) },
421 /* C (MOVI_IMM_32, MOVI_32) */
422 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, 0 },
424 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
425 { 0, 0, MOVI_32_LENGTH
, 0 },
426 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
428 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
430 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_32_PCREL
, MOVI_32
) },
431 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
432 { 0, 0, MOVI_32_LENGTH
, 0 },
434 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
435 { 0, 0, MOVI_32_LENGTH
, 0 },
437 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
438 { 0, 0, MOVI_32_LENGTH
, 0 },
439 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
441 /* C (MOVI_IMM_64, UNDEF_MOVI) */
442 { 0, 0, MOVI_64_LENGTH
, 0 },
443 /* C (MOVI_IMM_64, MOVI_16) */
444 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64
, MOVI_32
) },
445 /* C (MOVI_IMM_64, MOVI_32) */
446 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64
, MOVI_48
) },
447 /* C (MOVI_IMM_64, MOVI_48) */
448 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64
, MOVI_64
) },
449 /* C (MOVI_IMM_64, MOVI_64) */
450 { 0, 0, MOVI_64_LENGTH
, 0 },
452 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
453 { 0, 0, MOVI_64_LENGTH
, 0 },
454 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
456 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
458 { MOVI_16_F
, MOVI_16_M
, MOVI_16_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_32
) },
459 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
460 { MOVI_32_F
, MOVI_32_M
, MOVI_32_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_48
) },
461 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
462 { MOVI_48_F
, MOVI_48_M
, MOVI_48_LENGTH
, C (MOVI_IMM_64_PCREL
, MOVI_64
) },
463 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
464 { 0, 0, MOVI_64_LENGTH
, 0 },
465 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
466 { 0, 0, MOVI_64_LENGTH
, 0 },
468 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
469 { 0, 0, MOVI_64_LENGTH
, 0 },
470 EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
, EMPTY
,
472 #endif /* HAVE_SH64 */
478 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
482 /* Determinet whether the symbol needs any kind of PIC relocation. */
485 sh_PIC_related_p (symbolS
*sym
)
492 if (sym
== GOT_symbol
)
496 if (sh_PIC_related_p (*symbol_get_tc (sym
)))
500 exp
= symbol_get_value_expression (sym
);
502 return (exp
->X_op
== O_PIC_reloc
503 || sh_PIC_related_p (exp
->X_add_symbol
)
504 || sh_PIC_related_p (exp
->X_op_symbol
));
507 /* Determine the relocation type to be used to represent the
508 expression, that may be rearranged. */
511 sh_check_fixup (expressionS
*main_exp
, bfd_reloc_code_real_type
*r_type_p
)
513 expressionS
*exp
= main_exp
;
515 /* This is here for backward-compatibility only. GCC used to generated:
517 f@PLT + . - (.LPCS# + 2)
519 but we'd rather be able to handle this as a PIC-related reference
520 plus/minus a symbol. However, gas' parser gives us:
522 O_subtract (O_add (f@PLT, .), .LPCS#+2)
524 so we attempt to transform this into:
526 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
528 which we can handle simply below. */
529 if (exp
->X_op
== O_subtract
)
531 if (sh_PIC_related_p (exp
->X_op_symbol
))
534 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
536 if (exp
&& sh_PIC_related_p (exp
->X_op_symbol
))
539 if (exp
&& exp
->X_op
== O_add
540 && sh_PIC_related_p (exp
->X_add_symbol
))
542 symbolS
*sym
= exp
->X_add_symbol
;
544 exp
->X_op
= O_subtract
;
545 exp
->X_add_symbol
= main_exp
->X_op_symbol
;
547 main_exp
->X_op_symbol
= main_exp
->X_add_symbol
;
548 main_exp
->X_add_symbol
= sym
;
550 main_exp
->X_add_number
+= exp
->X_add_number
;
551 exp
->X_add_number
= 0;
556 else if (exp
->X_op
== O_add
&& sh_PIC_related_p (exp
->X_op_symbol
))
559 if (exp
->X_op
== O_symbol
|| exp
->X_op
== O_add
|| exp
->X_op
== O_subtract
)
562 if (exp
->X_add_symbol
563 && (exp
->X_add_symbol
== GOT_symbol
565 && *symbol_get_tc (exp
->X_add_symbol
) == GOT_symbol
)))
569 case BFD_RELOC_SH_IMM_LOW16
:
570 *r_type_p
= BFD_RELOC_SH_GOTPC_LOW16
;
573 case BFD_RELOC_SH_IMM_MEDLOW16
:
574 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDLOW16
;
577 case BFD_RELOC_SH_IMM_MEDHI16
:
578 *r_type_p
= BFD_RELOC_SH_GOTPC_MEDHI16
;
581 case BFD_RELOC_SH_IMM_HI16
:
582 *r_type_p
= BFD_RELOC_SH_GOTPC_HI16
;
586 case BFD_RELOC_UNUSED
:
587 *r_type_p
= BFD_RELOC_SH_GOTPC
;
596 if (exp
->X_add_symbol
&& exp
->X_add_symbol
== GOT_symbol
)
598 *r_type_p
= BFD_RELOC_SH_GOTPC
;
602 exp
= symbol_get_value_expression (exp
->X_add_symbol
);
607 if (exp
->X_op
== O_PIC_reloc
)
613 case BFD_RELOC_UNUSED
:
614 *r_type_p
= exp
->X_md
;
617 case BFD_RELOC_SH_IMM_LOW16
:
620 case BFD_RELOC_32_GOTOFF
:
621 *r_type_p
= BFD_RELOC_SH_GOTOFF_LOW16
;
624 case BFD_RELOC_SH_GOTPLT32
:
625 *r_type_p
= BFD_RELOC_SH_GOTPLT_LOW16
;
628 case BFD_RELOC_32_GOT_PCREL
:
629 *r_type_p
= BFD_RELOC_SH_GOT_LOW16
;
632 case BFD_RELOC_32_PLT_PCREL
:
633 *r_type_p
= BFD_RELOC_SH_PLT_LOW16
;
641 case BFD_RELOC_SH_IMM_MEDLOW16
:
644 case BFD_RELOC_32_GOTOFF
:
645 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDLOW16
;
648 case BFD_RELOC_SH_GOTPLT32
:
649 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDLOW16
;
652 case BFD_RELOC_32_GOT_PCREL
:
653 *r_type_p
= BFD_RELOC_SH_GOT_MEDLOW16
;
656 case BFD_RELOC_32_PLT_PCREL
:
657 *r_type_p
= BFD_RELOC_SH_PLT_MEDLOW16
;
665 case BFD_RELOC_SH_IMM_MEDHI16
:
668 case BFD_RELOC_32_GOTOFF
:
669 *r_type_p
= BFD_RELOC_SH_GOTOFF_MEDHI16
;
672 case BFD_RELOC_SH_GOTPLT32
:
673 *r_type_p
= BFD_RELOC_SH_GOTPLT_MEDHI16
;
676 case BFD_RELOC_32_GOT_PCREL
:
677 *r_type_p
= BFD_RELOC_SH_GOT_MEDHI16
;
680 case BFD_RELOC_32_PLT_PCREL
:
681 *r_type_p
= BFD_RELOC_SH_PLT_MEDHI16
;
689 case BFD_RELOC_SH_IMM_HI16
:
692 case BFD_RELOC_32_GOTOFF
:
693 *r_type_p
= BFD_RELOC_SH_GOTOFF_HI16
;
696 case BFD_RELOC_SH_GOTPLT32
:
697 *r_type_p
= BFD_RELOC_SH_GOTPLT_HI16
;
700 case BFD_RELOC_32_GOT_PCREL
:
701 *r_type_p
= BFD_RELOC_SH_GOT_HI16
;
704 case BFD_RELOC_32_PLT_PCREL
:
705 *r_type_p
= BFD_RELOC_SH_PLT_HI16
;
717 *r_type_p
= exp
->X_md
;
720 exp
->X_op
= O_symbol
;
723 main_exp
->X_add_symbol
= exp
->X_add_symbol
;
724 main_exp
->X_add_number
+= exp
->X_add_number
;
728 return (sh_PIC_related_p (exp
->X_add_symbol
)
729 || sh_PIC_related_p (exp
->X_op_symbol
));
734 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
737 sh_cons_fix_new (fragS
*frag
, int off
, int size
, expressionS
*exp
)
739 bfd_reloc_code_real_type r_type
= BFD_RELOC_UNUSED
;
741 if (sh_check_fixup (exp
, &r_type
))
742 as_bad (_("Invalid PIC expression."));
744 if (r_type
== BFD_RELOC_UNUSED
)
748 r_type
= BFD_RELOC_8
;
752 r_type
= BFD_RELOC_16
;
756 r_type
= BFD_RELOC_32
;
761 r_type
= BFD_RELOC_64
;
771 as_bad (_("unsupported BFD relocation size %u"), size
);
772 r_type
= BFD_RELOC_UNUSED
;
775 fix_new_exp (frag
, off
, size
, exp
, 0, r_type
);
778 /* The regular cons() function, that reads constants, doesn't support
779 suffixes such as @GOT, @GOTOFF and @PLT, that generate
780 machine-specific relocation types. So we must define it here. */
781 /* Clobbers input_line_pointer, checks end-of-line. */
782 /* NBYTES 1=.byte, 2=.word, 4=.long */
784 sh_elf_cons (register int nbytes
)
790 /* Update existing range to include a previous insn, if there was one. */
791 sh64_update_contents_mark (TRUE
);
793 /* We need to make sure the contents type is set to data. */
796 #endif /* HAVE_SH64 */
798 if (is_it_end_of_statement ())
800 demand_empty_rest_of_line ();
807 emit_expr (&exp
, (unsigned int) nbytes
);
809 while (*input_line_pointer
++ == ',');
811 input_line_pointer
--; /* Put terminator back into stream. */
812 if (*input_line_pointer
== '#' || *input_line_pointer
== '!')
814 while (! is_end_of_line
[(unsigned char) *input_line_pointer
++]);
817 demand_empty_rest_of_line ();
822 /* This function is called once, at assembler startup time. This should
823 set up all the tables, etc that the MD part of the assembler needs. */
828 const sh_opcode_info
*opcode
;
829 char *prev_name
= "";
833 = preset_target_arch
? preset_target_arch
: arch_sh1_up
& ~arch_sh_dsp_up
;
834 valid_arch
= target_arch
;
840 opcode_hash_control
= hash_new ();
842 /* Insert unique names into hash table. */
843 for (opcode
= sh_table
; opcode
->name
; opcode
++)
845 if (strcmp (prev_name
, opcode
->name
) != 0)
847 if (! (opcode
->arch
& target_arch
))
849 prev_name
= opcode
->name
;
850 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
857 static int reg_x
, reg_y
;
861 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
863 /* Try to parse a reg name. Return the number of chars consumed. */
866 parse_reg (char *src
, int *mode
, int *reg
)
868 char l0
= TOLOWER (src
[0]);
869 char l1
= l0
? TOLOWER (src
[1]) : 0;
871 /* We use ! IDENT_CHAR for the next character after the register name, to
872 make sure that we won't accidentally recognize a symbol name such as
873 'sram' or sr_ram as being a reference to the register 'sr'. */
879 if (src
[2] >= '0' && src
[2] <= '5'
880 && ! IDENT_CHAR ((unsigned char) src
[3]))
883 *reg
= 10 + src
[2] - '0';
887 if (l1
>= '0' && l1
<= '9'
888 && ! IDENT_CHAR ((unsigned char) src
[2]))
894 if (l1
>= '0' && l1
<= '7' && strncasecmp (&src
[2], "_bank", 5) == 0
895 && ! IDENT_CHAR ((unsigned char) src
[7]))
902 if (l1
== 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
907 if (l1
== 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
918 if (! IDENT_CHAR ((unsigned char) src
[2]))
924 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
933 if (! IDENT_CHAR ((unsigned char) src
[2]))
939 if (TOLOWER (src
[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
947 if (l1
== 'x' && src
[2] >= '0' && src
[2] <= '1'
948 && ! IDENT_CHAR ((unsigned char) src
[3]))
951 *reg
= 4 + (l1
- '0');
954 if (l1
== 'y' && src
[2] >= '0' && src
[2] <= '1'
955 && ! IDENT_CHAR ((unsigned char) src
[3]))
958 *reg
= 6 + (l1
- '0');
961 if (l1
== 's' && src
[2] >= '0' && src
[2] <= '3'
962 && ! IDENT_CHAR ((unsigned char) src
[3]))
967 *reg
= n
| ((~n
& 2) << 1);
972 if (l0
== 'i' && l1
&& ! IDENT_CHAR ((unsigned char) src
[2]))
994 if (l0
== 'x' && l1
>= '0' && l1
<= '1'
995 && ! IDENT_CHAR ((unsigned char) src
[2]))
998 *reg
= A_X0_NUM
+ l1
- '0';
1002 if (l0
== 'y' && l1
>= '0' && l1
<= '1'
1003 && ! IDENT_CHAR ((unsigned char) src
[2]))
1006 *reg
= A_Y0_NUM
+ l1
- '0';
1010 if (l0
== 'm' && l1
>= '0' && l1
<= '1'
1011 && ! IDENT_CHAR ((unsigned char) src
[2]))
1014 *reg
= l1
== '0' ? A_M0_NUM
: A_M1_NUM
;
1020 && TOLOWER (src
[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
1026 if (l0
== 's' && l1
== 'p' && TOLOWER (src
[2]) == 'c'
1027 && ! IDENT_CHAR ((unsigned char) src
[3]))
1033 if (l0
== 's' && l1
== 'g' && TOLOWER (src
[2]) == 'r'
1034 && ! IDENT_CHAR ((unsigned char) src
[3]))
1040 if (l0
== 'd' && l1
== 's' && TOLOWER (src
[2]) == 'r'
1041 && ! IDENT_CHAR ((unsigned char) src
[3]))
1047 if (l0
== 'd' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1048 && ! IDENT_CHAR ((unsigned char) src
[3]))
1054 if (l0
== 's' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1060 if (l0
== 's' && l1
== 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
1067 if (l0
== 'p' && l1
== 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
1072 if (l0
== 'p' && l1
== 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
1074 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1075 and use an uninitialized immediate. */
1079 if (l0
== 'g' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1080 && ! IDENT_CHAR ((unsigned char) src
[3]))
1085 if (l0
== 'v' && l1
== 'b' && TOLOWER (src
[2]) == 'r'
1086 && ! IDENT_CHAR ((unsigned char) src
[3]))
1092 if (l0
== 'm' && l1
== 'a' && TOLOWER (src
[2]) == 'c'
1093 && ! IDENT_CHAR ((unsigned char) src
[4]))
1095 if (TOLOWER (src
[3]) == 'l')
1100 if (TOLOWER (src
[3]) == 'h')
1106 if (l0
== 'm' && l1
== 'o' && TOLOWER (src
[2]) == 'd'
1107 && ! IDENT_CHAR ((unsigned char) src
[3]))
1112 if (l0
== 'f' && l1
== 'r')
1116 if (src
[3] >= '0' && src
[3] <= '5'
1117 && ! IDENT_CHAR ((unsigned char) src
[4]))
1120 *reg
= 10 + src
[3] - '0';
1124 if (src
[2] >= '0' && src
[2] <= '9'
1125 && ! IDENT_CHAR ((unsigned char) src
[3]))
1128 *reg
= (src
[2] - '0');
1132 if (l0
== 'd' && l1
== 'r')
1136 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1137 && ! IDENT_CHAR ((unsigned char) src
[4]))
1140 *reg
= 10 + src
[3] - '0';
1144 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1145 && ! IDENT_CHAR ((unsigned char) src
[3]))
1148 *reg
= (src
[2] - '0');
1152 if (l0
== 'x' && l1
== 'd')
1156 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
1157 && ! IDENT_CHAR ((unsigned char) src
[4]))
1160 *reg
= 11 + src
[3] - '0';
1164 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
1165 && ! IDENT_CHAR ((unsigned char) src
[3]))
1168 *reg
= (src
[2] - '0') + 1;
1172 if (l0
== 'f' && l1
== 'v')
1174 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
1180 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
1181 && ! IDENT_CHAR ((unsigned char) src
[3]))
1184 *reg
= (src
[2] - '0');
1188 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 'u'
1189 && TOLOWER (src
[3]) == 'l'
1190 && ! IDENT_CHAR ((unsigned char) src
[4]))
1196 if (l0
== 'f' && l1
== 'p' && TOLOWER (src
[2]) == 's'
1197 && TOLOWER (src
[3]) == 'c'
1198 && TOLOWER (src
[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
1204 if (l0
== 'x' && l1
== 'm' && TOLOWER (src
[2]) == 't'
1205 && TOLOWER (src
[3]) == 'r'
1206 && TOLOWER (src
[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
1216 parse_exp (char *s
, sh_operand_info
*op
)
1221 save
= input_line_pointer
;
1222 input_line_pointer
= s
;
1223 expression (&op
->immediate
);
1224 if (op
->immediate
.X_op
== O_absent
)
1225 as_bad (_("missing operand"));
1227 else if (op
->immediate
.X_op
== O_PIC_reloc
1228 || sh_PIC_related_p (op
->immediate
.X_add_symbol
)
1229 || sh_PIC_related_p (op
->immediate
.X_op_symbol
))
1230 as_bad (_("misplaced PIC operand"));
1232 new = input_line_pointer
;
1233 input_line_pointer
= save
;
1237 /* The many forms of operand:
1240 @Rn Register indirect
1253 pr, gbr, vbr, macl, mach
1257 parse_at (char *src
, sh_operand_info
*op
)
1264 /* Must be predecrement. */
1267 len
= parse_reg (src
, &mode
, &(op
->reg
));
1268 if (mode
!= A_REG_N
)
1269 as_bad (_("illegal register after @-"));
1274 else if (src
[0] == '(')
1276 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1279 len
= parse_reg (src
, &mode
, &(op
->reg
));
1280 if (len
&& mode
== A_REG_N
)
1285 as_bad (_("must be @(r0,...)"));
1290 /* Now can be rn or gbr. */
1291 len
= parse_reg (src
, &mode
, &(op
->reg
));
1301 op
->type
= A_R0_GBR
;
1303 else if (mode
== A_REG_N
)
1305 op
->type
= A_IND_R0_REG_N
;
1309 as_bad (_("syntax error in @(r0,...)"));
1314 as_bad (_("syntax error in @(r0...)"));
1319 /* Must be an @(disp,.. thing). */
1320 src
= parse_exp (src
, op
);
1323 /* Now can be rn, gbr or pc. */
1324 len
= parse_reg (src
, &mode
, &op
->reg
);
1327 if (mode
== A_REG_N
)
1329 op
->type
= A_DISP_REG_N
;
1331 else if (mode
== A_GBR
)
1333 op
->type
= A_DISP_GBR
;
1335 else if (mode
== A_PC
)
1337 /* We want @(expr, pc) to uniformly address . + expr,
1338 no matter if expr is a constant, or a more complex
1339 expression, e.g. sym-. or sym1-sym2.
1340 However, we also used to accept @(sym,pc)
1341 as adressing sym, i.e. meaning the same as plain sym.
1342 Some existing code does use the @(sym,pc) syntax, so
1343 we give it the old semantics for now, but warn about
1344 its use, so that users have some time to fix their code.
1346 Note that due to this backward compatibility hack,
1347 we'll get unexpected results when @(offset, pc) is used,
1348 and offset is a symbol that is set later to an an address
1349 difference, or an external symbol that is set to an
1350 address difference in another source file, so we want to
1351 eventually remove it. */
1352 if (op
->immediate
.X_op
== O_symbol
)
1354 op
->type
= A_DISP_PC
;
1355 as_warn (_("Deprecated syntax."));
1359 op
->type
= A_DISP_PC_ABS
;
1360 /* Such operands don't get corrected for PC==.+4, so
1361 make the correction here. */
1362 op
->immediate
.X_add_number
-= 4;
1367 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1372 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1377 as_bad (_("expecting )"));
1383 src
+= parse_reg (src
, &mode
, &(op
->reg
));
1384 if (mode
!= A_REG_N
)
1385 as_bad (_("illegal register after @"));
1392 l0
= TOLOWER (src
[0]);
1393 l1
= TOLOWER (src
[1]);
1395 if ((l0
== 'r' && l1
== '8')
1396 || (l0
== 'i' && (l1
== 'x' || l1
== 's')))
1399 op
->type
= A_PMOD_N
;
1401 else if ( (l0
== 'r' && l1
== '9')
1402 || (l0
== 'i' && l1
== 'y'))
1405 op
->type
= A_PMODY_N
;
1417 get_operand (char **ptr
, sh_operand_info
*op
)
1426 *ptr
= parse_exp (src
, op
);
1431 else if (src
[0] == '@')
1433 *ptr
= parse_at (src
, op
);
1436 len
= parse_reg (src
, &mode
, &(op
->reg
));
1445 /* Not a reg, the only thing left is a displacement. */
1446 *ptr
= parse_exp (src
, op
);
1447 op
->type
= A_DISP_PC
;
1453 get_operands (sh_opcode_info
*info
, char *args
, sh_operand_info
*operand
)
1458 /* The pre-processor will eliminate whitespace in front of '@'
1459 after the first argument; we may be called multiple times
1460 from assemble_ppi, so don't insist on finding whitespace here. */
1464 get_operand (&ptr
, operand
+ 0);
1471 get_operand (&ptr
, operand
+ 1);
1472 /* ??? Hack: psha/pshl have a varying operand number depending on
1473 the type of the first operand. We handle this by having the
1474 three-operand version first and reducing the number of operands
1475 parsed to two if we see that the first operand is an immediate.
1476 This works because no insn with three operands has an immediate
1477 as first operand. */
1478 if (info
->arg
[2] && operand
[0].type
!= A_IMM
)
1484 get_operand (&ptr
, operand
+ 2);
1488 operand
[2].type
= 0;
1493 operand
[1].type
= 0;
1494 operand
[2].type
= 0;
1499 operand
[0].type
= 0;
1500 operand
[1].type
= 0;
1501 operand
[2].type
= 0;
1506 /* Passed a pointer to a list of opcodes which use different
1507 addressing modes, return the opcode which matches the opcodes
1510 static sh_opcode_info
*
1511 get_specific (sh_opcode_info
*opcode
, sh_operand_info
*operands
)
1513 sh_opcode_info
*this_try
= opcode
;
1514 char *name
= opcode
->name
;
1517 while (opcode
->name
)
1519 this_try
= opcode
++;
1520 if ((this_try
->name
!= name
) && (strcmp (this_try
->name
, name
) != 0))
1522 /* We've looked so far down the table that we've run out of
1523 opcodes with the same name. */
1527 /* Look at both operands needed by the opcodes and provided by
1528 the user - since an arg test will often fail on the same arg
1529 again and again, we'll try and test the last failing arg the
1530 first on each opcode try. */
1531 for (n
= 0; this_try
->arg
[n
]; n
++)
1533 sh_operand_info
*user
= operands
+ n
;
1534 sh_arg_type arg
= this_try
->arg
[n
];
1539 if (user
->type
== A_DISP_PC_ABS
)
1549 if (user
->type
!= arg
)
1553 /* opcode needs r0 */
1554 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
1558 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
1562 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
1570 case A_IND_R0_REG_N
:
1581 /* Opcode needs rn */
1582 if (user
->type
!= arg
)
1587 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1602 if (user
->type
!= arg
)
1607 if (user
->type
!= arg
)
1616 case A_IND_R0_REG_M
:
1619 /* Opcode needs rn */
1620 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
1626 if (user
->type
!= DSP_REG_N
)
1648 if (user
->type
!= DSP_REG_N
)
1670 if (user
->type
!= DSP_REG_N
)
1692 if (user
->type
!= DSP_REG_N
)
1714 if (user
->type
!= DSP_REG_N
)
1736 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1740 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1744 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1748 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1752 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1762 /* Opcode needs rn */
1763 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1768 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1773 if (user
->type
!= XMTRX_M4
)
1779 printf (_("unhandled %d\n"), arg
);
1783 if ( !(valid_arch
& this_try
->arch
))
1785 valid_arch
&= this_try
->arch
;
1795 insert (char *where
, int how
, int pcrel
, sh_operand_info
*op
)
1797 fix_new_exp (frag_now
,
1798 where
- frag_now
->fr_literal
,
1806 build_relax (sh_opcode_info
*opcode
, sh_operand_info
*op
)
1808 int high_byte
= target_big_endian
? 0 : 1;
1811 if (opcode
->arg
[0] == A_BDISP8
)
1813 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1814 p
= frag_var (rs_machine_dependent
,
1815 md_relax_table
[C (what
, COND32
)].rlx_length
,
1816 md_relax_table
[C (what
, COND8
)].rlx_length
,
1818 op
->immediate
.X_add_symbol
,
1819 op
->immediate
.X_add_number
,
1821 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1823 else if (opcode
->arg
[0] == A_BDISP12
)
1825 p
= frag_var (rs_machine_dependent
,
1826 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1827 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1829 op
->immediate
.X_add_symbol
,
1830 op
->immediate
.X_add_number
,
1832 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1837 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1840 insert_loop_bounds (char *output
, sh_operand_info
*operand
)
1845 /* Since the low byte of the opcode will be overwritten by the reloc, we
1846 can just stash the high byte into both bytes and ignore endianness. */
1849 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1850 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1854 static int count
= 0;
1856 /* If the last loop insn is a two-byte-insn, it is in danger of being
1857 swapped with the insn after it. To prevent this, create a new
1858 symbol - complete with SH_LABEL reloc - after the last loop insn.
1859 If the last loop insn is four bytes long, the symbol will be
1860 right in the middle, but four byte insns are not swapped anyways. */
1861 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1862 Hence a 9 digit number should be enough to count all REPEATs. */
1864 sprintf (name
, "_R%x", count
++ & 0x3fffffff);
1865 end_sym
= symbol_new (name
, undefined_section
, 0, &zero_address_frag
);
1866 /* Make this a local symbol. */
1868 SF_SET_LOCAL (end_sym
);
1869 #endif /* OBJ_COFF */
1870 symbol_table_insert (end_sym
);
1871 end_sym
->sy_value
= operand
[1].immediate
;
1872 end_sym
->sy_value
.X_add_number
+= 2;
1873 fix_new (frag_now
, frag_now_fix (), 2, end_sym
, 0, 1, BFD_RELOC_SH_LABEL
);
1876 output
= frag_more (2);
1879 insert (output
, BFD_RELOC_SH_LOOP_START
, 1, operand
);
1880 insert (output
, BFD_RELOC_SH_LOOP_END
, 1, operand
+ 1);
1882 return frag_more (2);
1885 /* Now we know what sort of opcodes it is, let's build the bytes. */
1888 build_Mytes (sh_opcode_info
*opcode
, sh_operand_info
*operand
)
1892 char *output
= frag_more (2);
1893 unsigned int size
= 2;
1894 int low_byte
= target_big_endian
? 1 : 0;
1900 for (index
= 0; index
< 4; index
++)
1902 sh_nibble_type i
= opcode
->nibbles
[index
];
1912 nbuf
[index
] = reg_n
;
1915 nbuf
[index
] = reg_m
;
1918 if (reg_n
< 2 || reg_n
> 5)
1919 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1920 nbuf
[index
] = (reg_n
& 3) | 4;
1923 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1926 nbuf
[index
] = reg_b
| 0x08;
1929 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
);
1932 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
);
1935 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
);
1938 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0, operand
+ 1);
1941 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0, operand
+ 1);
1944 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0, operand
+ 1);
1947 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
);
1950 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
);
1953 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
);
1956 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0, operand
+ 1);
1959 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0, operand
+ 1);
1962 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0, operand
+ 1);
1965 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
,
1966 operand
->type
!= A_DISP_PC_ABS
, operand
);
1969 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
,
1970 operand
->type
!= A_DISP_PC_ABS
, operand
);
1973 output
= insert_loop_bounds (output
, operand
);
1974 nbuf
[index
] = opcode
->nibbles
[3];
1978 printf (_("failed for %d\n"), i
);
1982 if (!target_big_endian
)
1984 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1985 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1989 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1990 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1995 /* Find an opcode at the start of *STR_P in the hash table, and set
1996 *STR_P to the first character after the last one read. */
1998 static sh_opcode_info
*
1999 find_cooked_opcode (char **str_p
)
2002 unsigned char *op_start
;
2003 unsigned char *op_end
;
2007 /* Drop leading whitespace. */
2011 /* Find the op code end.
2012 The pre-processor will eliminate whitespace in front of
2013 any '@' after the first argument; we may be called from
2014 assemble_ppi, so the opcode might be terminated by an '@'. */
2015 for (op_start
= op_end
= (unsigned char *) (str
);
2018 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
2021 unsigned char c
= op_start
[nlen
];
2023 /* The machine independent code will convert CMP/EQ into cmp/EQ
2024 because it thinks the '/' is the end of the symbol. Moreover,
2025 all but the first sub-insn is a parallel processing insn won't
2026 be capitalized. Instead of hacking up the machine independent
2027 code, we just deal with it here. */
2037 as_bad (_("can't find opcode "));
2039 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
2042 /* Assemble a parallel processing insn. */
2043 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2046 assemble_ppi (char *op_end
, sh_opcode_info
*opcode
)
2058 sh_operand_info operand
[3];
2060 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2061 Make sure we encode a defined insn pattern. */
2066 if (opcode
->arg
[0] != A_END
)
2067 op_end
= get_operands (opcode
, op_end
, operand
);
2068 opcode
= get_specific (opcode
, operand
);
2071 /* Couldn't find an opcode which matched the operands. */
2072 char *where
= frag_more (2);
2077 as_bad (_("invalid operands for opcode"));
2081 if (opcode
->nibbles
[0] != PPI
)
2082 as_bad (_("insn can't be combined with parallel processing insn"));
2084 switch (opcode
->nibbles
[1])
2089 as_bad (_("multiple movx specifications"));
2094 as_bad (_("multiple movy specifications"));
2100 as_bad (_("multiple movx specifications"));
2101 if (reg_n
< 4 || reg_n
> 5)
2102 as_bad (_("invalid movx address register"));
2103 if (opcode
->nibbles
[2] & 8)
2105 if (reg_m
== A_A1_NUM
)
2107 else if (reg_m
!= A_A0_NUM
)
2108 as_bad (_("invalid movx dsp register"));
2113 as_bad (_("invalid movx dsp register"));
2116 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
2121 as_bad (_("multiple movy specifications"));
2122 if (opcode
->nibbles
[2] & 8)
2124 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2127 if (reg_m
== A_A1_NUM
)
2129 else if (reg_m
!= A_A0_NUM
)
2130 as_bad (_("invalid movy dsp register"));
2135 as_bad (_("invalid movy dsp register"));
2138 if (reg_n
< 6 || reg_n
> 7)
2139 as_bad (_("invalid movy address register"));
2140 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
2144 if (operand
[0].immediate
.X_op
!= O_constant
)
2145 as_bad (_("dsp immediate shift value not constant"));
2146 field_b
= ((opcode
->nibbles
[2] << 12)
2147 | (operand
[0].immediate
.X_add_number
& 127) << 4
2152 as_bad (_("multiple parallel processing specifications"));
2153 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2154 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2158 as_bad (_("multiple condition specifications"));
2159 cond
= opcode
->nibbles
[2] << 8;
2161 goto skip_cond_check
;
2165 as_bad (_("multiple parallel processing specifications"));
2166 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
2167 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
2173 if ((field_b
& 0xef00) != 0xa100)
2174 as_bad (_("insn cannot be combined with pmuls"));
2176 switch (field_b
& 0xf)
2179 field_b
+= 0 - A_X0_NUM
;
2182 field_b
+= 1 - A_Y0_NUM
;
2185 field_b
+= 2 - A_A0_NUM
;
2188 field_b
+= 3 - A_A1_NUM
;
2191 as_bad (_("bad padd / psub pmuls output operand"));
2193 /* Generate warning if the destination register for padd / psub
2194 and pmuls is the same ( only for A0 or A1 ).
2195 If the last nibble is 1010 then A0 is used in both
2196 padd / psub and pmuls. If it is 1111 then A1 is used
2197 as destination register in both padd / psub and pmuls. */
2199 if ((((field_b
| reg_efg
) & 0x000F) == 0x000A)
2200 || (((field_b
| reg_efg
) & 0x000F) == 0x000F))
2201 as_warn (_("destination register is same for parallel insns"));
2203 field_b
+= 0x4000 + reg_efg
;
2210 as_bad (_("condition not followed by conditionalizable insn"));
2216 opcode
= find_cooked_opcode (&op_end
);
2220 (_("unrecognized characters at end of parallel processing insn")));
2225 move_code
= movx
| movy
;
2228 /* Parallel processing insn. */
2229 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
2231 output
= frag_more (4);
2233 if (! target_big_endian
)
2235 output
[3] = ppi_code
>> 8;
2236 output
[2] = ppi_code
;
2240 output
[2] = ppi_code
>> 8;
2241 output
[3] = ppi_code
;
2243 move_code
|= 0xf800;
2247 /* Just a double data transfer. */
2248 output
= frag_more (2);
2251 if (! target_big_endian
)
2253 output
[1] = move_code
>> 8;
2254 output
[0] = move_code
;
2258 output
[0] = move_code
>> 8;
2259 output
[1] = move_code
;
2264 /* This is the guts of the machine-dependent assembler. STR points to a
2265 machine dependent instruction. This function is supposed to emit
2266 the frags/bytes it assembles to. */
2269 md_assemble (char *str
)
2271 unsigned char *op_end
;
2272 sh_operand_info operand
[3];
2273 sh_opcode_info
*opcode
;
2274 unsigned int size
= 0;
2277 if (sh64_isa_mode
== sh64_isa_shmedia
)
2279 shmedia_md_assemble (str
);
2284 /* If we've seen pseudo-directives, make sure any emitted data or
2285 frags are marked as data. */
2288 sh64_update_contents_mark (TRUE
);
2289 sh64_set_contents_type (CRT_SH5_ISA16
);
2294 #endif /* HAVE_SH64 */
2296 opcode
= find_cooked_opcode (&str
);
2301 as_bad (_("unknown opcode"));
2306 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2308 /* Output a CODE reloc to tell the linker that the following
2309 bytes are instructions, not data. */
2310 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2312 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
2315 if (opcode
->nibbles
[0] == PPI
)
2317 size
= assemble_ppi (op_end
, opcode
);
2321 if (opcode
->arg
[0] == A_BDISP12
2322 || opcode
->arg
[0] == A_BDISP8
)
2324 /* Since we skip get_specific here, we have to check & update
2326 if (valid_arch
& opcode
->arch
)
2327 valid_arch
&= opcode
->arch
;
2329 as_bad (_("Delayed branches not available on SH1"));
2330 parse_exp (op_end
+ 1, &operand
[0]);
2331 build_relax (opcode
, &operand
[0]);
2335 if (opcode
->arg
[0] == A_END
)
2337 /* Ignore trailing whitespace. If there is any, it has already
2338 been compressed to a single space. */
2344 op_end
= get_operands (opcode
, op_end
, operand
);
2346 opcode
= get_specific (opcode
, operand
);
2350 /* Couldn't find an opcode which matched the operands. */
2351 char *where
= frag_more (2);
2356 as_bad (_("invalid operands for opcode"));
2361 as_bad (_("excess operands: '%s'"), op_end
);
2363 size
= build_Mytes (opcode
, operand
);
2368 #ifdef BFD_ASSEMBLER
2369 dwarf2_emit_insn (size
);
2373 /* This routine is called each time a label definition is seen. It
2374 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2377 sh_frob_label (void)
2379 static fragS
*last_label_frag
;
2380 static int last_label_offset
;
2383 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2387 offset
= frag_now_fix ();
2388 if (frag_now
!= last_label_frag
2389 || offset
!= last_label_offset
)
2391 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
2392 last_label_frag
= frag_now
;
2393 last_label_offset
= offset
;
2398 /* This routine is called when the assembler is about to output some
2399 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2402 sh_flush_pending_output (void)
2405 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
2407 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
2409 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
2414 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2420 #ifndef BFD_ASSEMBLER
2423 tc_crawl_symbol_chain (object_headers
*headers ATTRIBUTE_UNUSED
)
2425 printf (_("call to tc_crawl_symbol_chain \n"));
2429 tc_headers_hook (object_headers
*headers ATTRIBUTE_UNUSED
)
2431 printf (_("call to tc_headers_hook \n"));
2437 /* Various routines to kill one day. */
2438 /* Equal to MAX_PRECISION in atof-ieee.c. */
2439 #define MAX_LITTLENUMS 6
2441 /* Turn a string in input_line_pointer into a floating point constant
2442 of type TYPE, and store the appropriate bytes in *LITP. The number
2443 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2444 returned, or NULL on OK. */
2447 md_atof (int type
, char *litP
, int *sizeP
)
2450 LITTLENUM_TYPE words
[4];
2466 return _("bad call to md_atof");
2469 t
= atof_ieee (input_line_pointer
, type
, words
);
2471 input_line_pointer
= t
;
2475 if (! target_big_endian
)
2477 for (i
= prec
- 1; i
>= 0; i
--)
2479 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2485 for (i
= 0; i
< prec
; i
++)
2487 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
2495 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2496 call instruction. It refers to a label of the instruction which
2497 loads the register which the call uses. We use it to generate a
2498 special reloc for the linker. */
2501 s_uses (int ignore ATTRIBUTE_UNUSED
)
2506 as_warn (_(".uses pseudo-op seen when not relaxing"));
2510 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
2512 as_bad (_("bad .uses format"));
2513 ignore_rest_of_line ();
2517 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
2519 demand_empty_rest_of_line ();
2522 const char *md_shortopts
= "";
2523 struct option md_longopts
[] =
2525 #define OPTION_RELAX (OPTION_MD_BASE)
2526 #define OPTION_BIG (OPTION_MD_BASE + 1)
2527 #define OPTION_LITTLE (OPTION_BIG + 1)
2528 #define OPTION_SMALL (OPTION_LITTLE + 1)
2529 #define OPTION_DSP (OPTION_SMALL + 1)
2530 #define OPTION_ISA (OPTION_DSP + 1)
2532 {"relax", no_argument
, NULL
, OPTION_RELAX
},
2533 {"big", no_argument
, NULL
, OPTION_BIG
},
2534 {"little", no_argument
, NULL
, OPTION_LITTLE
},
2535 {"small", no_argument
, NULL
, OPTION_SMALL
},
2536 {"dsp", no_argument
, NULL
, OPTION_DSP
},
2537 {"isa", required_argument
, NULL
, OPTION_ISA
},
2539 #define OPTION_ABI (OPTION_ISA + 1)
2540 #define OPTION_NO_MIX (OPTION_ABI + 1)
2541 #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
2542 #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
2543 #define OPTION_PT32 (OPTION_NO_EXPAND + 1)
2544 {"abi", required_argument
, NULL
, OPTION_ABI
},
2545 {"no-mix", no_argument
, NULL
, OPTION_NO_MIX
},
2546 {"shcompact-const-crange", no_argument
, NULL
, OPTION_SHCOMPACT_CONST_CRANGE
},
2547 {"no-expand", no_argument
, NULL
, OPTION_NO_EXPAND
},
2548 {"expand-pt32", no_argument
, NULL
, OPTION_PT32
},
2549 #endif /* HAVE_SH64 */
2551 {NULL
, no_argument
, NULL
, 0}
2553 size_t md_longopts_size
= sizeof (md_longopts
);
2556 md_parse_option (int c
, char *arg ATTRIBUTE_UNUSED
)
2565 target_big_endian
= 1;
2569 target_big_endian
= 0;
2577 preset_target_arch
= arch_sh1_up
& ~arch_sh3e_up
;
2581 if (strcasecmp (arg
, "sh4") == 0)
2582 preset_target_arch
= arch_sh4
;
2583 else if (strcasecmp (arg
, "any") == 0)
2584 preset_target_arch
= arch_sh1_up
;
2586 else if (strcasecmp (arg
, "shmedia") == 0)
2588 if (sh64_isa_mode
== sh64_isa_shcompact
)
2589 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
2590 sh64_isa_mode
= sh64_isa_shmedia
;
2592 else if (strcasecmp (arg
, "shcompact") == 0)
2594 if (sh64_isa_mode
== sh64_isa_shmedia
)
2595 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
2596 if (sh64_abi
== sh64_abi_64
)
2597 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
2598 sh64_isa_mode
= sh64_isa_shcompact
;
2600 #endif /* HAVE_SH64 */
2602 as_bad ("Invalid argument to --isa option: %s", arg
);
2607 if (strcmp (arg
, "32") == 0)
2609 if (sh64_abi
== sh64_abi_64
)
2610 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
2611 sh64_abi
= sh64_abi_32
;
2613 else if (strcmp (arg
, "64") == 0)
2615 if (sh64_abi
== sh64_abi_32
)
2616 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
2617 if (sh64_isa_mode
== sh64_isa_shcompact
)
2618 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
2619 sh64_abi
= sh64_abi_64
;
2622 as_bad ("Invalid argument to --abi option: %s", arg
);
2629 case OPTION_SHCOMPACT_CONST_CRANGE
:
2630 sh64_shcompact_const_crange
= TRUE
;
2633 case OPTION_NO_EXPAND
:
2634 sh64_expand
= FALSE
;
2640 #endif /* HAVE_SH64 */
2650 md_show_usage (FILE *stream
)
2652 fprintf (stream
, _("\
2654 -little generate little endian code\n\
2655 -big generate big endian code\n\
2656 -relax alter jump instructions for long displacements\n\
2657 -small align sections to 4 byte boundaries, not 16\n\
2658 -dsp enable sh-dsp insns, and disable sh2e/sh3e/sh4 insns.\n"));
2660 fprintf (stream
, _("\
2661 -isa=[shmedia set default instruction set for SH64\n\
2665 -abi=[32|64] set size of expanded SHmedia operands and object\n\
2667 -shcompact-const-crange emit code-range descriptors for constants in\n\
2668 SHcompact code sections\n\
2669 -no-mix disallow SHmedia code in the same section as\n\
2670 constants and SHcompact code\n\
2671 -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
2672 -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
2674 #endif /* HAVE_SH64 */
2677 /* This struct is used to pass arguments to sh_count_relocs through
2678 bfd_map_over_sections. */
2680 struct sh_count_relocs
2682 /* Symbol we are looking for. */
2684 /* Count of relocs found. */
2688 /* Count the number of fixups in a section which refer to a particular
2689 symbol. When using BFD_ASSEMBLER, this is called via
2690 bfd_map_over_sections. */
2693 sh_count_relocs (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, void *data
)
2695 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
2696 segment_info_type
*seginfo
;
2700 seginfo
= seg_info (sec
);
2701 if (seginfo
== NULL
)
2705 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2707 if (fix
->fx_addsy
== sym
)
2715 /* Handle the count relocs for a particular section. When using
2716 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2719 sh_frob_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
,
2720 void *ignore ATTRIBUTE_UNUSED
)
2722 segment_info_type
*seginfo
;
2725 seginfo
= seg_info (sec
);
2726 if (seginfo
== NULL
)
2729 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
2734 struct sh_count_relocs info
;
2736 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
2739 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2740 symbol in the same section. */
2741 sym
= fix
->fx_addsy
;
2743 || fix
->fx_subsy
!= NULL
2744 || fix
->fx_addnumber
!= 0
2745 || S_GET_SEGMENT (sym
) != sec
2746 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2747 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2749 || S_IS_EXTERNAL (sym
))
2751 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2752 _(".uses does not refer to a local symbol in the same section"));
2756 /* Look through the fixups again, this time looking for one
2757 at the same location as sym. */
2758 val
= S_GET_VALUE (sym
);
2759 for (fscan
= seginfo
->fix_root
;
2761 fscan
= fscan
->fx_next
)
2762 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
2763 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
2764 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
2765 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
2766 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
2770 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2771 _("can't find fixup pointed to by .uses"));
2775 if (fscan
->fx_tcbit
)
2777 /* We've already done this one. */
2781 /* The variable fscan should also be a fixup to a local symbol
2782 in the same section. */
2783 sym
= fscan
->fx_addsy
;
2785 || fscan
->fx_subsy
!= NULL
2786 || fscan
->fx_addnumber
!= 0
2787 || S_GET_SEGMENT (sym
) != sec
2788 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2789 || S_GET_STORAGE_CLASS (sym
) == C_EXT
2791 || S_IS_EXTERNAL (sym
))
2793 as_warn_where (fix
->fx_file
, fix
->fx_line
,
2794 _(".uses target does not refer to a local symbol in the same section"));
2798 /* Now we look through all the fixups of all the sections,
2799 counting the number of times we find a reference to sym. */
2802 #ifdef BFD_ASSEMBLER
2803 bfd_map_over_sections (stdoutput
, sh_count_relocs
, &info
);
2808 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2809 sh_count_relocs ((bfd
*) NULL
, iscan
, &info
);
2816 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2817 We have already adjusted the value of sym to include the
2818 fragment address, so we undo that adjustment here. */
2819 subseg_change (sec
, 0);
2820 fix_new (fscan
->fx_frag
,
2821 S_GET_VALUE (sym
) - fscan
->fx_frag
->fr_address
,
2822 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2826 /* This function is called after the symbol table has been completed,
2827 but before the relocs or section contents have been written out.
2828 If we have seen any .uses pseudo-ops, they point to an instruction
2829 which loads a register with the address of a function. We look
2830 through the fixups to find where the function address is being
2831 loaded from. We then generate a COUNT reloc giving the number of
2832 times that function address is referred to. The linker uses this
2833 information when doing relaxing, to decide when it can eliminate
2834 the stored function address entirely. */
2840 shmedia_frob_file_before_adjust ();
2846 #ifdef BFD_ASSEMBLER
2847 bfd_map_over_sections (stdoutput
, sh_frob_section
, NULL
);
2852 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2853 sh_frob_section ((bfd
*) NULL
, iseg
, NULL
);
2858 /* Called after relaxing. Set the correct sizes of the fragments, and
2859 create relocs so that md_apply_fix3 will fill in the correct values. */
2862 #ifdef BFD_ASSEMBLER
2863 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
, segT seg
, fragS
*fragP
)
2865 md_convert_frag (object_headers
*headers ATTRIBUTE_UNUSED
, segT seg
,
2871 switch (fragP
->fr_subtype
)
2873 case C (COND_JUMP
, COND8
):
2874 case C (COND_JUMP_DELAY
, COND8
):
2875 subseg_change (seg
, 0);
2876 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2877 1, BFD_RELOC_SH_PCDISP8BY2
);
2882 case C (UNCOND_JUMP
, UNCOND12
):
2883 subseg_change (seg
, 0);
2884 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2885 1, BFD_RELOC_SH_PCDISP12BY2
);
2890 case C (UNCOND_JUMP
, UNCOND32
):
2891 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2892 if (fragP
->fr_symbol
== NULL
)
2893 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2894 _("displacement overflows 12-bit field"));
2895 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2896 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2897 _("displacement to defined symbol %s overflows 12-bit field"),
2898 S_GET_NAME (fragP
->fr_symbol
));
2900 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2901 _("displacement to undefined symbol %s overflows 12-bit field"),
2902 S_GET_NAME (fragP
->fr_symbol
));
2903 /* Stabilize this frag, so we don't trip an assert. */
2904 fragP
->fr_fix
+= fragP
->fr_var
;
2908 case C (COND_JUMP
, COND12
):
2909 case C (COND_JUMP_DELAY
, COND12
):
2910 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
2911 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2912 was due to gas incorrectly relaxing an out-of-range conditional
2913 branch with delay slot. It turned:
2914 bf.s L6 (slot mov.l r12,@(44,r0))
2917 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2919 32: 10 cb mov.l r12,@(44,r0)
2920 Therefore, branches with delay slots have to be handled
2921 differently from ones without delay slots. */
2923 unsigned char *buffer
=
2924 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2925 int highbyte
= target_big_endian
? 0 : 1;
2926 int lowbyte
= target_big_endian
? 1 : 0;
2927 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2929 /* Toggle the true/false bit of the bcond. */
2930 buffer
[highbyte
] ^= 0x2;
2932 /* If this is a delayed branch, we may not put the bra in the
2933 slot. So we change it to a non-delayed branch, like that:
2934 b! cond slot_label; bra disp; slot_label: slot_insn
2935 ??? We should try if swapping the conditional branch and
2936 its delay-slot insn already makes the branch reach. */
2938 /* Build a relocation to six / four bytes farther on. */
2939 subseg_change (seg
, 0);
2940 fix_new (fragP
, fragP
->fr_fix
, 2,
2941 #ifdef BFD_ASSEMBLER
2942 section_symbol (seg
),
2944 seg_info (seg
)->dot
,
2946 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2947 1, BFD_RELOC_SH_PCDISP8BY2
);
2949 /* Set up a jump instruction. */
2950 buffer
[highbyte
+ 2] = 0xa0;
2951 buffer
[lowbyte
+ 2] = 0;
2952 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2953 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2957 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2962 /* Fill in a NOP instruction. */
2963 buffer
[highbyte
+ 4] = 0x0;
2964 buffer
[lowbyte
+ 4] = 0x9;
2973 case C (COND_JUMP
, COND32
):
2974 case C (COND_JUMP_DELAY
, COND32
):
2975 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2976 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2977 if (fragP
->fr_symbol
== NULL
)
2978 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2979 _("displacement overflows 8-bit field"));
2980 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2981 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2982 _("displacement to defined symbol %s overflows 8-bit field"),
2983 S_GET_NAME (fragP
->fr_symbol
));
2985 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
2986 _("displacement to undefined symbol %s overflows 8-bit field "),
2987 S_GET_NAME (fragP
->fr_symbol
));
2988 /* Stabilize this frag, so we don't trip an assert. */
2989 fragP
->fr_fix
+= fragP
->fr_var
;
2995 shmedia_md_convert_frag (headers
, seg
, fragP
, TRUE
);
3001 if (donerelax
&& !sh_relax
)
3002 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3003 _("overflow in branch to %s; converted into longer instruction sequence"),
3004 (fragP
->fr_symbol
!= NULL
3005 ? S_GET_NAME (fragP
->fr_symbol
)
3010 md_section_align (segT seg ATTRIBUTE_UNUSED
, valueT size
)
3012 #ifdef BFD_ASSEMBLER
3015 #else /* ! OBJ_ELF */
3016 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
3017 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
3018 #endif /* ! OBJ_ELF */
3019 #else /* ! BFD_ASSEMBLER */
3020 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
3021 & (-1 << section_alignment
[(int) seg
]));
3022 #endif /* ! BFD_ASSEMBLER */
3025 /* This static variable is set by s_uacons to tell sh_cons_align that
3026 the expession does not need to be aligned. */
3028 static int sh_no_align_cons
= 0;
3030 /* This handles the unaligned space allocation pseudo-ops, such as
3031 .uaword. .uaword is just like .word, but the value does not need
3035 s_uacons (int bytes
)
3037 /* Tell sh_cons_align not to align this value. */
3038 sh_no_align_cons
= 1;
3042 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3043 aligned correctly. Note that this can cause warnings to be issued
3044 when assembling initialized structured which were declared with the
3045 packed attribute. FIXME: Perhaps we should require an option to
3046 enable this warning? */
3049 sh_cons_align (int nbytes
)
3054 if (sh_no_align_cons
)
3056 /* This is an unaligned pseudo-op. */
3057 sh_no_align_cons
= 0;
3062 while ((nbytes
& 1) == 0)
3071 if (now_seg
== absolute_section
)
3073 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
3074 as_warn (_("misaligned data"));
3078 p
= frag_var (rs_align_test
, 1, 1, (relax_substateT
) 0,
3079 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
3081 record_alignment (now_seg
, nalign
);
3084 /* When relaxing, we need to output a reloc for any .align directive
3085 that requests alignment to a four byte boundary or larger. This is
3086 also where we check for misaligned data. */
3089 sh_handle_align (fragS
*frag
)
3091 int bytes
= frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
;
3093 if (frag
->fr_type
== rs_align_code
)
3095 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
3096 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
3098 char *p
= frag
->fr_literal
+ frag
->fr_fix
;
3107 if (target_big_endian
)
3109 memcpy (p
, big_nop_pattern
, sizeof big_nop_pattern
);
3110 frag
->fr_var
= sizeof big_nop_pattern
;
3114 memcpy (p
, little_nop_pattern
, sizeof little_nop_pattern
);
3115 frag
->fr_var
= sizeof little_nop_pattern
;
3118 else if (frag
->fr_type
== rs_align_test
)
3121 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
3125 && (frag
->fr_type
== rs_align
3126 || frag
->fr_type
== rs_align_code
)
3127 && frag
->fr_address
+ frag
->fr_fix
> 0
3128 && frag
->fr_offset
> 1
3129 && now_seg
!= bss_section
)
3130 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
3131 BFD_RELOC_SH_ALIGN
);
3134 /* See whether the relocation should be resolved locally. */
3137 sh_local_pcrel (fixS
*fix
)
3140 && (fix
->fx_r_type
== BFD_RELOC_SH_PCDISP8BY2
3141 || fix
->fx_r_type
== BFD_RELOC_SH_PCDISP12BY2
3142 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY2
3143 || fix
->fx_r_type
== BFD_RELOC_SH_PCRELIMM8BY4
3144 || fix
->fx_r_type
== BFD_RELOC_8_PCREL
3145 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH16
3146 || fix
->fx_r_type
== BFD_RELOC_SH_SWITCH32
));
3149 /* See whether we need to force a relocation into the output file.
3150 This is used to force out switch and PC relative relocations when
3154 sh_force_relocation (fixS
*fix
)
3156 /* These relocations can't make it into a DSO, so no use forcing
3157 them for global symbols. */
3158 if (sh_local_pcrel (fix
))
3161 /* Make sure some relocations get emitted. */
3162 if (fix
->fx_r_type
== BFD_RELOC_SH_LOOP_START
3163 || fix
->fx_r_type
== BFD_RELOC_SH_LOOP_END
3164 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_GD_32
3165 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LD_32
3166 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_IE_32
3167 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LDO_32
3168 || fix
->fx_r_type
== BFD_RELOC_SH_TLS_LE_32
3169 || generic_force_reloc (fix
))
3175 return (fix
->fx_pcrel
3176 || SWITCH_TABLE (fix
)
3177 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
3178 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
3179 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
3180 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3182 || fix
->fx_r_type
== BFD_RELOC_SH_SHMEDIA_CODE
3184 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
3189 sh_fix_adjustable (fixS
*fixP
)
3191 if (fixP
->fx_r_type
== BFD_RELOC_32_PLT_PCREL
3192 || fixP
->fx_r_type
== BFD_RELOC_32_GOT_PCREL
3193 || fixP
->fx_r_type
== BFD_RELOC_SH_GOTPC
3194 || fixP
->fx_r_type
== BFD_RELOC_RVA
)
3197 /* We need the symbol name for the VTABLE entries */
3198 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
3199 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
3206 sh_elf_final_processing (void)
3210 /* Set file-specific flags to indicate if this code needs
3211 a processor with the sh-dsp / sh3e ISA to execute. */
3213 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3214 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3215 if (sh64_isa_mode
!= sh64_isa_unspecified
)
3218 #endif /* HAVE_SH64 */
3219 if (valid_arch
& arch_sh1
)
3221 else if (valid_arch
& arch_sh2
)
3223 else if (valid_arch
& arch_sh2e
)
3225 else if (valid_arch
& arch_sh_dsp
)
3227 else if (valid_arch
& arch_sh3
)
3229 else if (valid_arch
& arch_sh3_dsp
)
3231 else if (valid_arch
& arch_sh3e
)
3233 else if (valid_arch
& arch_sh4
)
3238 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
3239 elf_elfheader (stdoutput
)->e_flags
|= val
;
3243 /* Apply a fixup to the object file. */
3246 md_apply_fix3 (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3248 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3249 int lowbyte
= target_big_endian
? 1 : 0;
3250 int highbyte
= target_big_endian
? 0 : 1;
3251 long val
= (long) *valP
;
3255 #ifdef BFD_ASSEMBLER
3256 /* A difference between two symbols, the second of which is in the
3257 current section, is transformed in a PC-relative relocation to
3258 the other symbol. We have to adjust the relocation type here. */
3261 switch (fixP
->fx_r_type
)
3267 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3270 /* Currently, we only support 32-bit PCREL relocations.
3271 We'd need a new reloc type to handle 16_PCREL, and
3272 8_PCREL is already taken for R_SH_SWITCH8, which
3273 apparently does something completely different than what
3276 bfd_set_error (bfd_error_bad_value
);
3280 bfd_set_error (bfd_error_bad_value
);
3285 /* The function adjust_reloc_syms won't convert a reloc against a weak
3286 symbol into a reloc against a section, but bfd_install_relocation
3287 will screw up if the symbol is defined, so we have to adjust val here
3288 to avoid the screw up later.
3290 For ordinary relocs, this does not happen for ELF, since for ELF,
3291 bfd_install_relocation uses the "special function" field of the
3292 howto, and does not execute the code that needs to be undone, as long
3293 as the special function does not return bfd_reloc_continue.
3294 It can happen for GOT- and PLT-type relocs the way they are
3295 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3296 doesn't matter here since those relocs don't use VAL; see below. */
3297 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
3298 && fixP
->fx_addsy
!= NULL
3299 && S_IS_WEAK (fixP
->fx_addsy
))
3300 val
-= S_GET_VALUE (fixP
->fx_addsy
);
3303 #ifdef BFD_ASSEMBLER
3304 if (SWITCH_TABLE (fixP
))
3305 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3307 if (fixP
->fx_r_type
== 0)
3309 if (fixP
->fx_size
== 2)
3310 fixP
->fx_r_type
= BFD_RELOC_16
;
3311 else if (fixP
->fx_size
== 4)
3312 fixP
->fx_r_type
= BFD_RELOC_32
;
3313 else if (fixP
->fx_size
== 1)
3314 fixP
->fx_r_type
= BFD_RELOC_8
;
3322 switch (fixP
->fx_r_type
)
3324 case BFD_RELOC_SH_IMM4
:
3326 *buf
= (*buf
& 0xf0) | (val
& 0xf);
3329 case BFD_RELOC_SH_IMM4BY2
:
3332 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
3335 case BFD_RELOC_SH_IMM4BY4
:
3338 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
3341 case BFD_RELOC_SH_IMM8BY2
:
3347 case BFD_RELOC_SH_IMM8BY4
:
3354 case BFD_RELOC_SH_IMM8
:
3355 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3356 sometimes it is not (e.g., and). We permit any 8 bit value.
3357 Note that adding further restrictions may invalidate
3358 reasonable looking assembly code, such as ``and -0x1,r0''. */
3364 case BFD_RELOC_SH_PCRELIMM8BY4
:
3365 /* The lower two bits of the PC are cleared before the
3366 displacement is added in. We can assume that the destination
3367 is on a 4 byte bounday. If this instruction is also on a 4
3368 byte boundary, then we want
3370 and target - here is a multiple of 4.
3371 Otherwise, we are on a 2 byte boundary, and we want
3372 (target - (here - 2)) / 4
3373 and target - here is not a multiple of 4. Computing
3374 (target - (here - 2)) / 4 == (target - here + 2) / 4
3375 works for both cases, since in the first case the addition of
3376 2 will be removed by the division. target - here is in the
3378 val
= (val
+ 2) / 4;
3380 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3384 case BFD_RELOC_SH_PCRELIMM8BY2
:
3387 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3391 case BFD_RELOC_SH_PCDISP8BY2
:
3393 if (val
< -0x80 || val
> 0x7f)
3394 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3398 case BFD_RELOC_SH_PCDISP12BY2
:
3400 if (val
< -0x800 || val
> 0x7ff)
3401 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
3402 buf
[lowbyte
] = val
& 0xff;
3403 buf
[highbyte
] |= (val
>> 8) & 0xf;
3407 case BFD_RELOC_32_PCREL
:
3408 md_number_to_chars (buf
, val
, 4);
3412 md_number_to_chars (buf
, val
, 2);
3415 case BFD_RELOC_SH_USES
:
3416 /* Pass the value into sh_coff_reloc_mangle. */
3417 fixP
->fx_addnumber
= val
;
3420 case BFD_RELOC_SH_COUNT
:
3421 case BFD_RELOC_SH_ALIGN
:
3422 case BFD_RELOC_SH_CODE
:
3423 case BFD_RELOC_SH_DATA
:
3424 case BFD_RELOC_SH_LABEL
:
3425 /* Nothing to do here. */
3428 case BFD_RELOC_SH_LOOP_START
:
3429 case BFD_RELOC_SH_LOOP_END
:
3431 case BFD_RELOC_VTABLE_INHERIT
:
3432 case BFD_RELOC_VTABLE_ENTRY
:
3437 case BFD_RELOC_32_PLT_PCREL
:
3438 /* Make the jump instruction point to the address of the operand. At
3439 runtime we merely add the offset to the actual PLT entry. */
3440 * valP
= 0xfffffffc;
3441 val
= fixP
->fx_offset
;
3443 val
-= S_GET_VALUE (fixP
->fx_subsy
);
3444 fixP
->fx_addnumber
= val
;
3445 md_number_to_chars (buf
, val
, 4);
3448 case BFD_RELOC_SH_GOTPC
:
3449 /* This is tough to explain. We end up with this one if we have
3450 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3451 The goal here is to obtain the absolute address of the GOT,
3452 and it is strongly preferable from a performance point of
3453 view to avoid using a runtime relocation for this. There are
3454 cases where you have something like:
3456 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3458 and here no correction would be required. Internally in the
3459 assembler we treat operands of this form as not being pcrel
3460 since the '.' is explicitly mentioned, and I wonder whether
3461 it would simplify matters to do it this way. Who knows. In
3462 earlier versions of the PIC patches, the pcrel_adjust field
3463 was used to store the correction, but since the expression is
3464 not pcrel, I felt it would be confusing to do it this way. */
3466 md_number_to_chars (buf
, val
, 4);
3469 case BFD_RELOC_SH_TLS_GD_32
:
3470 case BFD_RELOC_SH_TLS_LD_32
:
3471 case BFD_RELOC_SH_TLS_IE_32
:
3472 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3474 case BFD_RELOC_32_GOT_PCREL
:
3475 case BFD_RELOC_SH_GOTPLT32
:
3476 * valP
= 0; /* Fully resolved at runtime. No addend. */
3477 md_number_to_chars (buf
, 0, 4);
3480 case BFD_RELOC_SH_TLS_LDO_32
:
3481 case BFD_RELOC_SH_TLS_LE_32
:
3482 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3484 case BFD_RELOC_32_GOTOFF
:
3485 md_number_to_chars (buf
, val
, 4);
3491 shmedia_md_apply_fix3 (fixP
, valP
);
3500 if ((val
& ((1 << shift
) - 1)) != 0)
3501 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
3505 val
= ((val
>> shift
)
3506 | ((long) -1 & ~ ((long) -1 >> shift
)));
3508 if (max
!= 0 && (val
< min
|| val
> max
))
3509 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
3511 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3515 /* Called just before address relaxation. Return the length
3516 by which a fragment must grow to reach it's destination. */
3519 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
3523 switch (fragP
->fr_subtype
)
3527 return shmedia_md_estimate_size_before_relax (fragP
, segment_type
);
3533 case C (UNCOND_JUMP
, UNDEF_DISP
):
3534 /* Used to be a branch to somewhere which was unknown. */
3535 if (!fragP
->fr_symbol
)
3537 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3539 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3541 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
3545 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
3549 case C (COND_JUMP
, UNDEF_DISP
):
3550 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
3551 what
= GET_WHAT (fragP
->fr_subtype
);
3552 /* Used to be a branch to somewhere which was unknown. */
3553 if (fragP
->fr_symbol
3554 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
3556 /* Got a symbol and it's defined in this segment, become byte
3557 sized - maybe it will fix up. */
3558 fragP
->fr_subtype
= C (what
, COND8
);
3560 else if (fragP
->fr_symbol
)
3562 /* Its got a segment, but its not ours, so it will always be long. */
3563 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
3567 /* We know the abs value. */
3568 fragP
->fr_subtype
= C (what
, COND8
);
3572 case C (UNCOND_JUMP
, UNCOND12
):
3573 case C (UNCOND_JUMP
, UNCOND32
):
3574 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
3575 case C (COND_JUMP
, COND8
):
3576 case C (COND_JUMP
, COND12
):
3577 case C (COND_JUMP
, COND32
):
3578 case C (COND_JUMP
, UNDEF_WORD_DISP
):
3579 case C (COND_JUMP_DELAY
, COND8
):
3580 case C (COND_JUMP_DELAY
, COND12
):
3581 case C (COND_JUMP_DELAY
, COND32
):
3582 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
3583 /* When relaxing a section for the second time, we don't need to
3584 do anything besides return the current size. */
3588 fragP
->fr_var
= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
3589 return fragP
->fr_var
;
3592 /* Put number into target byte order. */
3595 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
3598 /* We might need to set the contents type to data. */
3599 sh64_flag_output ();
3602 if (! target_big_endian
)
3603 number_to_chars_littleendian (ptr
, use
, nbytes
);
3605 number_to_chars_bigendian (ptr
, use
, nbytes
);
3608 /* This version is used in obj-coff.c when not using BFD_ASSEMBLER.
3609 eg for the sh-hms target. */
3612 md_pcrel_from (fixS
*fixP
)
3614 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
3618 md_pcrel_from_section (fixS
*fixP
, segT sec
)
3620 if (! sh_local_pcrel (fixP
)
3621 && fixP
->fx_addsy
!= (symbolS
*) NULL
3622 && (generic_force_reloc (fixP
)
3623 || S_GET_SEGMENT (fixP
->fx_addsy
) != sec
))
3625 /* The symbol is undefined (or is defined but not in this section,
3626 or we're not sure about it being the final definition). Let the
3627 linker figure it out. We need to adjust the subtraction of a
3628 symbol to the position of the relocated data, though. */
3629 return fixP
->fx_subsy
? fixP
->fx_where
+ fixP
->fx_frag
->fr_address
: 0;
3632 return md_pcrel_from (fixP
);
3638 tc_coff_sizemachdep (fragS
*frag
)
3640 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
3643 #endif /* OBJ_COFF */
3645 #ifndef BFD_ASSEMBLER
3648 /* Map BFD relocs to SH COFF relocs. */
3652 bfd_reloc_code_real_type bfd_reloc
;
3656 static const struct reloc_map coff_reloc_map
[] =
3658 { BFD_RELOC_32
, R_SH_IMM32
},
3659 { BFD_RELOC_16
, R_SH_IMM16
},
3660 { BFD_RELOC_8
, R_SH_IMM8
},
3661 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
3662 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
3663 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
3664 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
3665 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
3666 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
3667 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
3668 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
3669 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
3670 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
3671 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
3672 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
3673 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
3674 { BFD_RELOC_SH_USES
, R_SH_USES
},
3675 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
3676 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
3677 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
3678 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
3679 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
3680 { BFD_RELOC_UNUSED
, 0 }
3683 /* Adjust a reloc for the SH. This is similar to the generic code,
3684 but does some minor tweaking. */
3687 sh_coff_reloc_mangle (segment_info_type
*seg
, fixS
*fix
,
3688 struct internal_reloc
*intr
, unsigned int paddr
)
3690 symbolS
*symbol_ptr
= fix
->fx_addsy
;
3693 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
3695 if (! SWITCH_TABLE (fix
))
3697 const struct reloc_map
*rm
;
3699 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
3700 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
3702 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
3703 as_bad_where (fix
->fx_file
, fix
->fx_line
,
3704 _("Can not represent %s relocation in this object file format"),
3705 bfd_get_reloc_code_name (fix
->fx_r_type
));
3706 intr
->r_type
= rm
->sh_reloc
;
3713 if (fix
->fx_r_type
== BFD_RELOC_16
)
3714 intr
->r_type
= R_SH_SWITCH16
;
3715 else if (fix
->fx_r_type
== BFD_RELOC_8
)
3716 intr
->r_type
= R_SH_SWITCH8
;
3717 else if (fix
->fx_r_type
== BFD_RELOC_32
)
3718 intr
->r_type
= R_SH_SWITCH32
;
3722 /* For a switch reloc, we set r_offset to the difference between
3723 the reloc address and the subtrahend. When the linker is
3724 doing relaxing, it can use the determine the starting and
3725 ending points of the switch difference expression. */
3726 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
3729 /* PC relative relocs are always against the current section. */
3730 if (symbol_ptr
== NULL
)
3732 switch (fix
->fx_r_type
)
3734 case BFD_RELOC_SH_PCRELIMM8BY2
:
3735 case BFD_RELOC_SH_PCRELIMM8BY4
:
3736 case BFD_RELOC_SH_PCDISP8BY2
:
3737 case BFD_RELOC_SH_PCDISP12BY2
:
3738 case BFD_RELOC_SH_USES
:
3739 symbol_ptr
= seg
->dot
;
3746 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
3748 /* We can't store the offset in the object file, since this
3749 reloc does not take up any space, so we store it in r_offset.
3750 The fx_addnumber field was set in md_apply_fix3. */
3751 intr
->r_offset
= fix
->fx_addnumber
;
3753 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
3755 /* We can't store the count in the object file, since this reloc
3756 does not take up any space, so we store it in r_offset. The
3757 fx_offset field was set when the fixup was created in
3758 sh_coff_frob_file. */
3759 intr
->r_offset
= fix
->fx_offset
;
3760 /* This reloc is always absolute. */
3763 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
3765 /* Store the alignment in the r_offset field. */
3766 intr
->r_offset
= fix
->fx_offset
;
3767 /* This reloc is always absolute. */
3770 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
3771 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
3772 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
3774 /* These relocs are always absolute. */
3778 /* Turn the segment of the symbol into an offset. */
3779 if (symbol_ptr
!= NULL
)
3781 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
3783 intr
->r_symndx
= dot
->sy_number
;
3785 intr
->r_symndx
= symbol_ptr
->sy_number
;
3788 intr
->r_symndx
= -1;
3791 #endif /* OBJ_COFF */
3792 #endif /* ! BFD_ASSEMBLER */
3794 #ifdef BFD_ASSEMBLER
3796 /* Create a reloc. */
3799 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
3802 bfd_reloc_code_real_type r_type
;
3804 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3805 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3806 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
3807 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3809 r_type
= fixp
->fx_r_type
;
3811 if (SWITCH_TABLE (fixp
))
3813 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_subsy
);
3815 if (r_type
== BFD_RELOC_16
)
3816 r_type
= BFD_RELOC_SH_SWITCH16
;
3817 else if (r_type
== BFD_RELOC_8
)
3818 r_type
= BFD_RELOC_8_PCREL
;
3819 else if (r_type
== BFD_RELOC_32
)
3820 r_type
= BFD_RELOC_SH_SWITCH32
;
3824 else if (r_type
== BFD_RELOC_SH_USES
)
3825 rel
->addend
= fixp
->fx_addnumber
;
3826 else if (r_type
== BFD_RELOC_SH_COUNT
)
3827 rel
->addend
= fixp
->fx_offset
;
3828 else if (r_type
== BFD_RELOC_SH_ALIGN
)
3829 rel
->addend
= fixp
->fx_offset
;
3830 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
3831 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
3832 rel
->addend
= fixp
->fx_offset
;
3833 else if (r_type
== BFD_RELOC_SH_LOOP_START
3834 || r_type
== BFD_RELOC_SH_LOOP_END
)
3835 rel
->addend
= fixp
->fx_offset
;
3836 else if (r_type
== BFD_RELOC_SH_LABEL
&& fixp
->fx_pcrel
)
3839 rel
->address
= rel
->addend
= fixp
->fx_offset
;
3842 else if (shmedia_init_reloc (rel
, fixp
))
3845 else if (fixp
->fx_pcrel
)
3846 rel
->addend
= fixp
->fx_addnumber
;
3847 else if (r_type
== BFD_RELOC_32
|| r_type
== BFD_RELOC_32_GOTOFF
)
3848 rel
->addend
= fixp
->fx_addnumber
;
3852 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3854 if (rel
->howto
->type
== R_SH_IND12W
)
3855 rel
->addend
+= fixp
->fx_offset
- 4;
3857 if (rel
->howto
== NULL
)
3859 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3860 _("Cannot represent relocation type %s"),
3861 bfd_get_reloc_code_name (r_type
));
3862 /* Set howto to a garbage value so that we can keep going. */
3863 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3864 assert (rel
->howto
!= NULL
);
3871 inline static char *
3872 sh_end_of_match (char *cont
, char *what
)
3874 int len
= strlen (what
);
3876 if (strncasecmp (cont
, what
, strlen (what
)) == 0
3877 && ! is_part_of_name (cont
[len
]))
3884 sh_parse_name (char const *name
, expressionS
*exprP
, char *nextcharP
)
3886 char *next
= input_line_pointer
;
3891 exprP
->X_op_symbol
= NULL
;
3893 if (strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3896 GOT_symbol
= symbol_find_or_make (name
);
3898 exprP
->X_add_symbol
= GOT_symbol
;
3900 /* If we have an absolute symbol or a reg, then we know its
3902 segment
= S_GET_SEGMENT (exprP
->X_add_symbol
);
3903 if (segment
== absolute_section
)
3905 exprP
->X_op
= O_constant
;
3906 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3907 exprP
->X_add_symbol
= NULL
;
3909 else if (segment
== reg_section
)
3911 exprP
->X_op
= O_register
;
3912 exprP
->X_add_number
= S_GET_VALUE (exprP
->X_add_symbol
);
3913 exprP
->X_add_symbol
= NULL
;
3917 exprP
->X_op
= O_symbol
;
3918 exprP
->X_add_number
= 0;
3924 exprP
->X_add_symbol
= symbol_find_or_make (name
);
3926 if (*nextcharP
!= '@')
3928 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTOFF")))
3929 reloc_type
= BFD_RELOC_32_GOTOFF
;
3930 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTPLT")))
3931 reloc_type
= BFD_RELOC_SH_GOTPLT32
;
3932 else if ((next_end
= sh_end_of_match (next
+ 1, "GOT")))
3933 reloc_type
= BFD_RELOC_32_GOT_PCREL
;
3934 else if ((next_end
= sh_end_of_match (next
+ 1, "PLT")))
3935 reloc_type
= BFD_RELOC_32_PLT_PCREL
;
3936 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSGD")))
3937 reloc_type
= BFD_RELOC_SH_TLS_GD_32
;
3938 else if ((next_end
= sh_end_of_match (next
+ 1, "TLSLDM")))
3939 reloc_type
= BFD_RELOC_SH_TLS_LD_32
;
3940 else if ((next_end
= sh_end_of_match (next
+ 1, "GOTTPOFF")))
3941 reloc_type
= BFD_RELOC_SH_TLS_IE_32
;
3942 else if ((next_end
= sh_end_of_match (next
+ 1, "TPOFF")))
3943 reloc_type
= BFD_RELOC_SH_TLS_LE_32
;
3944 else if ((next_end
= sh_end_of_match (next
+ 1, "DTPOFF")))
3945 reloc_type
= BFD_RELOC_SH_TLS_LDO_32
;
3949 *input_line_pointer
= *nextcharP
;
3950 input_line_pointer
= next_end
;
3951 *nextcharP
= *input_line_pointer
;
3952 *input_line_pointer
= '\0';
3954 exprP
->X_op
= O_PIC_reloc
;
3955 exprP
->X_add_number
= 0;
3956 exprP
->X_md
= reloc_type
;
3961 #endif /* BFD_ASSEMBLER */