3 Free Software Foundation, Inc.
4 Contributed by Joseph Myers <joseph@codesourcery.com>
5 Bernd Schmidt <bernds@codesourcery.com>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "dwarf2dbg.h"
26 #include "safe-ctype.h"
28 #include "opcode/tic6x.h"
29 #include "elf/tic6x.h"
30 #include "elf32-tic6x.h"
32 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
37 /* Stuff for .scomm symbols. */
38 static segT sbss_section
;
39 static asection scom_section
;
40 static asymbol scom_symbol
;
42 const char comment_chars
[] = ";";
43 const char line_comment_chars
[] = "#*;";
44 const char line_separator_chars
[] = "@";
46 const char EXP_CHARS
[] = "eE";
47 const char FLT_CHARS
[] = "dDfF";
49 const char *md_shortopts
= "";
53 OPTION_MARCH
= OPTION_MD_BASE
,
55 OPTION_MLITTLE_ENDIAN
,
64 struct option md_longopts
[] =
66 { "march", required_argument
, NULL
, OPTION_MARCH
},
67 { "mbig-endian", no_argument
, NULL
, OPTION_MBIG_ENDIAN
},
68 { "mlittle-endian", no_argument
, NULL
, OPTION_MLITTLE_ENDIAN
},
69 { "mdsbt", no_argument
, NULL
, OPTION_MDSBT
},
70 { "mno-dsbt", no_argument
, NULL
, OPTION_MNO_DSBT
},
71 { "mpid", required_argument
, NULL
, OPTION_MPID
},
72 { "mpic", no_argument
, NULL
, OPTION_MPIC
},
73 { "mno-pic", no_argument
, NULL
, OPTION_MNO_PIC
},
74 { "mgenerate-rel", no_argument
, NULL
, OPTION_MGENERATE_REL
},
75 { NULL
, no_argument
, NULL
, 0 }
77 size_t md_longopts_size
= sizeof (md_longopts
);
79 /* The instructions enabled based only on the selected architecture
80 (all instructions, if no architecture specified). */
81 static unsigned short tic6x_arch_enable
= (TIC6X_INSN_C62X
88 /* The instructions enabled based on the current set of features
89 (architecture, as modified by other options). */
90 static unsigned short tic6x_features
;
92 /* The architecture attribute value, or C6XABI_Tag_ISA_none if
94 static int tic6x_arch_attribute
= C6XABI_Tag_ISA_none
;
96 /* Whether any instructions at all have been seen. Once any
97 instructions have been seen, architecture attributes merge into the
98 previous attribute value rather than replacing it. */
99 static bfd_boolean tic6x_seen_insns
= FALSE
;
101 /* The number of registers in each register file supported by the
102 current architecture. */
103 static unsigned int tic6x_num_registers
;
105 /* Whether predication on A0 is possible. */
106 static bfd_boolean tic6x_predicate_a0
;
108 /* Whether execute packets can cross fetch packet boundaries. */
109 static bfd_boolean tic6x_can_cross_fp_boundary
;
111 /* Whether there are constraints on simultaneous reads and writes of
113 static bfd_boolean tic6x_long_data_constraints
;
115 /* Whether compact instructions are available. */
116 static bfd_boolean tic6x_compact_insns
;
118 /* Whether to generate RELA relocations. */
119 static bfd_boolean tic6x_generate_rela
= TRUE
;
121 /* Whether the code uses DSBT addressing. */
122 static bfd_boolean tic6x_dsbt
;
124 /* Types of position-independent data (attribute values for
133 /* The type of data addressing used in this code. */
134 static tic6x_pid_type tic6x_pid
;
136 /* Whether the code uses position-independent code. */
137 static bfd_boolean tic6x_pic
;
139 /* Table of supported architecture variants. */
144 unsigned short features
;
146 static const tic6x_arch_table tic6x_arches
[] =
148 { "c62x", C6XABI_Tag_ISA_C62X
, TIC6X_INSN_C62X
},
149 { "c64x", C6XABI_Tag_ISA_C64X
, TIC6X_INSN_C62X
| TIC6X_INSN_C64X
},
150 { "c64x+", C6XABI_Tag_ISA_C64XP
, (TIC6X_INSN_C62X
152 | TIC6X_INSN_C64XP
) },
153 { "c67x", C6XABI_Tag_ISA_C67X
, TIC6X_INSN_C62X
| TIC6X_INSN_C67X
},
154 { "c67x+", C6XABI_Tag_ISA_C67XP
, (TIC6X_INSN_C62X
156 | TIC6X_INSN_C67XP
) },
157 { "c674x", C6XABI_Tag_ISA_C674X
, (TIC6X_INSN_C62X
162 | TIC6X_INSN_C674X
) }
165 /* Update the selected architecture based on ARCH, giving an error if
166 ARCH is an invalid value. Does not call tic6x_update_features; the
167 caller must do that if necessary. */
170 tic6x_use_arch (const char *arch
)
174 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
175 if (strcmp (arch
, tic6x_arches
[i
].arch
) == 0)
177 tic6x_arch_enable
= tic6x_arches
[i
].features
;
178 if (tic6x_seen_insns
)
180 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute
,
181 tic6x_arches
[i
].attr
);
183 tic6x_arch_attribute
= tic6x_arches
[i
].attr
;
187 as_bad (_("unknown architecture '%s'"), arch
);
190 /* Table of supported -mpid arguments. */
195 } tic6x_pid_type_table
;
196 static const tic6x_pid_type_table tic6x_pid_types
[] =
198 { "no", tic6x_pid_no
},
199 { "near", tic6x_pid_near
},
200 { "far", tic6x_pid_far
}
203 /* Handle -mpid=ARG. */
206 tic6x_use_pid (const char *arg
)
210 for (i
= 0; i
< ARRAY_SIZE (tic6x_pid_types
); i
++)
211 if (strcmp (arg
, tic6x_pid_types
[i
].arg
) == 0)
213 tic6x_pid
= tic6x_pid_types
[i
].attr
;
217 as_bad (_("unknown -mpid= argument '%s'"), arg
);
220 /* Parse a target-specific option. */
223 md_parse_option (int c
, char *arg
)
228 tic6x_use_arch (arg
);
231 case OPTION_MBIG_ENDIAN
:
232 target_big_endian
= 1;
235 case OPTION_MLITTLE_ENDIAN
:
236 target_big_endian
= 0;
243 case OPTION_MNO_DSBT
:
259 case OPTION_MGENERATE_REL
:
260 tic6x_generate_rela
= FALSE
;
270 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
274 fputc ('\n', stream
);
275 fprintf (stream
, _("TMS320C6000 options:\n"));
276 fprintf (stream
, _(" -march=ARCH enable instructions from architecture ARCH\n"));
277 fprintf (stream
, _(" -mbig-endian generate big-endian code\n"));
278 fprintf (stream
, _(" -mlittle-endian generate little-endian code\n"));
279 fprintf (stream
, _(" -mdsbt code uses DSBT addressing\n"));
280 fprintf (stream
, _(" -mno-dsbt code does not use DSBT addressing\n"));
281 fprintf (stream
, _(" -mpid=no code uses position-dependent data addressing\n"));
282 fprintf (stream
, _(" -mpid=near code uses position-independent data addressing,\n"
283 " GOT accesses use near DP addressing\n"));
284 fprintf (stream
, _(" -mpid=far code uses position-independent data addressing,\n"
285 " GOT accesses use far DP addressing\n"));
286 fprintf (stream
, _(" -mpic code addressing is position-independent\n"));
287 fprintf (stream
, _(" -mno-pic code addressing is position-dependent\n"));
288 /* -mgenerate-rel is only for testsuite use and is deliberately
291 fputc ('\n', stream
);
292 fprintf (stream
, _("Supported ARCH values are:"));
293 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
294 fprintf (stream
, " %s", tic6x_arches
[i
].arch
);
295 fputc ('\n', stream
);
298 /* Update enabled features based on the current architecture and
301 tic6x_update_features (void)
303 tic6x_features
= tic6x_arch_enable
;
306 = (tic6x_arch_enable
& (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? 32 : 16;
308 tic6x_predicate_a0
= (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? TRUE
: FALSE
;
310 tic6x_can_cross_fp_boundary
312 & (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? TRUE
: FALSE
;
314 tic6x_long_data_constraints
315 = (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? FALSE
: TRUE
;
317 tic6x_compact_insns
= (tic6x_arch_enable
& TIC6X_INSN_C64XP
) ? TRUE
: FALSE
;
320 /* Do configuration after all options have been parsed. */
323 tic6x_after_parse_args (void)
325 tic6x_update_features ();
328 /* Parse a .arch directive. */
331 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED
)
336 arch
= input_line_pointer
;
337 while (*input_line_pointer
&& !ISSPACE (*input_line_pointer
))
338 input_line_pointer
++;
339 c
= *input_line_pointer
;
340 *input_line_pointer
= 0;
342 tic6x_use_arch (arch
);
343 tic6x_update_features ();
344 *input_line_pointer
= c
;
345 demand_empty_rest_of_line ();
348 /* Parse a .ehtype directive. */
351 s_tic6x_ehtype (int ignored ATTRIBUTE_UNUSED
)
356 #ifdef md_flush_pending_output
357 md_flush_pending_output ();
360 if (is_it_end_of_statement ())
362 demand_empty_rest_of_line ();
373 if (exp
.X_op
!= O_symbol
)
375 as_bad (_("expected symbol"));
380 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
381 &exp
, 0, BFD_RELOC_C6000_EHTYPE
);
383 demand_empty_rest_of_line ();
386 /* Parse a .nocmp directive. */
389 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED
)
391 seg_info (now_seg
)->tc_segment_info_data
.nocmp
= TRUE
;
392 demand_empty_rest_of_line ();
395 /* .scomm pseudo-op handler.
397 This is a new pseudo-op to handle putting objects in .scommon.
398 By doing this the linker won't need to do any work,
399 and more importantly it removes the implicit -G arg necessary to
400 correctly link the object file. */
403 s_tic6x_scomm (int ignore ATTRIBUTE_UNUSED
)
413 name
= input_line_pointer
;
414 c
= get_symbol_end ();
416 /* Just after name is now '\0'. */
417 p
= input_line_pointer
;
420 if (*input_line_pointer
!= ',')
422 as_bad (_("expected comma after symbol name"));
423 ignore_rest_of_line ();
428 input_line_pointer
++;
429 if ((size
= get_absolute_expression ()) < 0)
431 /* xgettext:c-format */
432 as_warn (_("invalid length for .scomm directive"));
433 ignore_rest_of_line ();
437 /* The third argument to .scomm is the alignment. */
438 if (*input_line_pointer
!= ',')
442 ++input_line_pointer
;
443 align
= get_absolute_expression ();
446 as_warn (_("alignment is not a positive number"));
451 /* Convert to a power of 2 alignment. */
454 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
)
458 as_bad (_("alignment is not a power of 2"));
459 ignore_rest_of_line ();
467 symbolP
= symbol_find_or_make (name
);
470 if (S_IS_DEFINED (symbolP
))
472 /* xgettext:c-format */
473 as_bad (_("attempt to re-define symbol `%s'"),
474 S_GET_NAME (symbolP
));
475 ignore_rest_of_line ();
479 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
481 /* xgettext:c-format */
482 as_bad (_("attempt to redefine `%s' with a different length"),
483 S_GET_NAME (symbolP
));
485 ignore_rest_of_line ();
489 if (symbol_get_obj (symbolP
)->local
)
491 segT old_sec
= now_seg
;
492 int old_subsec
= now_subseg
;
495 record_alignment (sbss_section
, align2
);
496 subseg_set (sbss_section
, 0);
499 frag_align (align2
, 0, 0);
501 if (S_GET_SEGMENT (symbolP
) == sbss_section
)
502 symbol_get_frag (symbolP
)->fr_symbol
= 0;
504 symbol_set_frag (symbolP
, frag_now
);
506 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
509 S_SET_SIZE (symbolP
, size
);
510 S_SET_SEGMENT (symbolP
, sbss_section
);
511 S_CLEAR_EXTERNAL (symbolP
);
512 subseg_set (old_sec
, old_subsec
);
516 S_SET_VALUE (symbolP
, (valueT
) size
);
517 S_SET_ALIGN (symbolP
, 1 << align2
);
518 S_SET_EXTERNAL (symbolP
);
519 S_SET_SEGMENT (symbolP
, &scom_section
);
522 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
524 demand_empty_rest_of_line ();
527 /* Track for each attribute whether it has been set explicitly (and so
528 should not have a default value set by the assembler). */
529 static bfd_boolean tic6x_attributes_set_explicitly
[NUM_KNOWN_OBJ_ATTRIBUTES
];
531 /* Parse a .c6xabi_attribute directive. */
534 s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED
)
536 int tag
= s_vendor_attribute (OBJ_ATTR_PROC
);
538 if (tag
< NUM_KNOWN_OBJ_ATTRIBUTES
)
539 tic6x_attributes_set_explicitly
[tag
] = TRUE
;
546 } tic6x_attribute_table
;
548 static const tic6x_attribute_table tic6x_attributes
[] =
550 #define TAG(tag, value) { #tag, tag },
551 #include "elf/tic6x-attrs.h"
555 /* Convert an attribute name to a number. */
558 tic6x_convert_symbolic_attribute (const char *name
)
562 for (i
= 0; i
< ARRAY_SIZE (tic6x_attributes
); i
++)
563 if (strcmp (name
, tic6x_attributes
[i
].name
) == 0)
564 return tic6x_attributes
[i
].tag
;
569 const pseudo_typeS md_pseudo_table
[] =
571 { "arch", s_tic6x_arch
, 0 },
572 { "c6xabi_attribute", s_tic6x_c6xabi_attribute
, 0 },
573 { "nocmp", s_tic6x_nocmp
, 0 },
574 { "scomm", s_tic6x_scomm
, 0 },
576 { "ehtype", s_tic6x_ehtype
, 0 },
580 /* Hash table of opcodes. For each opcode name, this stores a pointer
581 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
582 table entries with that name. */
583 static struct hash_control
*opcode_hash
;
585 /* Initialize the assembler (called once at assembler startup). */
595 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, 0);
597 /* Insert opcodes into the hash table. */
598 opcode_hash
= hash_new ();
599 for (id
= 0; id
< tic6x_opcode_max
; id
++)
602 tic6x_opcode_list
*opc
= xmalloc (sizeof (tic6x_opcode_list
));
605 opc
->next
= hash_find (opcode_hash
, tic6x_opcode_table
[id
].name
);
606 if ((errmsg
= hash_jam (opcode_hash
, tic6x_opcode_table
[id
].name
, opc
))
608 as_fatal ("%s", _(errmsg
));
611 /* Save the current subseg so we can restore it [it's the default one and
612 we don't want the initial section to be .sbss]. */
616 /* The sbss section is for local .scomm symbols. */
617 sbss_section
= subseg_new (".bss", 0);
618 seg_info (sbss_section
)->bss
= 1;
620 /* This is copied from perform_an_assembly_pass. */
621 applicable
= bfd_applicable_section_flags (stdoutput
);
622 bfd_set_section_flags (stdoutput
, sbss_section
, applicable
& SEC_ALLOC
);
624 subseg_set (seg
, subseg
);
626 /* We must construct a fake section similar to bfd_com_section
627 but with the name .scommon. */
628 scom_section
= bfd_com_section
;
629 scom_section
.name
= ".scommon";
630 scom_section
.output_section
= & scom_section
;
631 scom_section
.symbol
= & scom_symbol
;
632 scom_section
.symbol_ptr_ptr
= & scom_section
.symbol
;
633 scom_symbol
= * bfd_com_section
.symbol
;
634 scom_symbol
.name
= ".scommon";
635 scom_symbol
.section
= & scom_section
;
638 /* Whether the current line being parsed had the "||" parallel bars. */
639 static bfd_boolean tic6x_line_parallel
;
641 /* Whether the current line being parsed started "||^" to indicate an
642 SPMASKed parallel instruction. */
643 static bfd_boolean tic6x_line_spmask
;
645 /* If the current line being parsed had an instruction predicate, the
646 creg value for that predicate (which must be nonzero); otherwise
648 static unsigned int tic6x_line_creg
;
650 /* If the current line being parsed had an instruction predicate, the
651 z value for that predicate; otherwise 0. */
652 static unsigned int tic6x_line_z
;
654 /* Return 1 (updating input_line_pointer as appropriate) if the line
655 starting with C (immediately before input_line_pointer) starts with
656 pre-opcode text appropriate for this target, 0 otherwise. */
659 tic6x_unrecognized_line (int c
)
664 bfd_boolean bad_predicate
;
669 if (input_line_pointer
[0] == '|')
671 if (input_line_pointer
[1] == '^')
673 tic6x_line_spmask
= TRUE
;
674 input_line_pointer
+= 2;
677 input_line_pointer
+= 1;
678 if (tic6x_line_parallel
)
679 as_bad (_("multiple '||' on same line"));
680 tic6x_line_parallel
= TRUE
;
682 as_bad (_("'||' after predicate"));
688 /* If it doesn't look like a predicate at all, just return 0.
689 If it looks like one but not a valid one, give a better
691 p
= input_line_pointer
;
692 while (*p
!= ']' && !is_end_of_line
[(unsigned char) *p
])
697 p
= input_line_pointer
;
699 bad_predicate
= FALSE
;
705 if (*p
== 'A' || *p
== 'a')
707 else if (*p
== 'B' || *p
== 'b')
711 areg
= TRUE
; /* Avoid uninitialized warning. */
712 bad_predicate
= TRUE
;
717 if (*p
!= '0' && *p
!= '1' && *p
!= '2')
718 bad_predicate
= TRUE
;
719 else if (p
[1] != ']')
720 bad_predicate
= TRUE
;
722 input_line_pointer
= p
+ 2;
726 as_bad (_("multiple predicates on same line"));
732 as_bad (_("bad predicate '%s'"), input_line_pointer
- 1);
734 input_line_pointer
= endp
;
741 tic6x_line_creg
= (areg
? 6 : 1);
742 if (areg
&& !tic6x_predicate_a0
)
743 as_bad (_("predication on A0 not supported on this architecture"));
747 tic6x_line_creg
= (areg
? 4 : 2);
751 tic6x_line_creg
= (areg
? 5 : 3);
766 /* Do any target-specific handling of a label required. */
769 tic6x_frob_label (symbolS
*sym
)
771 segment_info_type
*si
;
772 tic6x_label_list
*list
;
774 if (tic6x_line_parallel
)
776 as_bad (_("label after '||'"));
777 tic6x_line_parallel
= FALSE
;
778 tic6x_line_spmask
= FALSE
;
782 as_bad (_("label after predicate"));
787 si
= seg_info (now_seg
);
788 list
= si
->tc_segment_info_data
.label_list
;
789 si
->tc_segment_info_data
.label_list
= xmalloc (sizeof (tic6x_label_list
));
790 si
->tc_segment_info_data
.label_list
->next
= list
;
791 si
->tc_segment_info_data
.label_list
->label
= sym
;
793 /* Defining tc_frob_label overrides the ELF definition of
794 obj_frob_label, so we need to apply its effects here. */
795 dwarf2_emit_label (sym
);
798 /* At end-of-line, give errors for start-of-line decorations that
799 needed an instruction but were not followed by one. */
802 tic6x_end_of_line (void)
804 if (tic6x_line_parallel
)
806 as_bad (_("'||' not followed by instruction"));
807 tic6x_line_parallel
= FALSE
;
808 tic6x_line_spmask
= FALSE
;
812 as_bad (_("predicate not followed by instruction"));
818 /* Do any target-specific handling of the start of a logical line. */
821 tic6x_start_line_hook (void)
823 tic6x_end_of_line ();
826 /* Do target-specific handling immediately after an input file from
827 the command line, and any other inputs it includes, have been
833 tic6x_end_of_line ();
836 /* Do target-specific initialization after arguments have been
837 processed and the output file created. */
840 tic6x_init_after_args (void)
842 elf32_tic6x_set_use_rela_p (stdoutput
, tic6x_generate_rela
);
845 /* Free LIST of labels (possibly NULL). */
848 tic6x_free_label_list (tic6x_label_list
*list
)
852 tic6x_label_list
*old
= list
;
859 /* Handle a data alignment of N bytes. */
862 tic6x_cons_align (int n ATTRIBUTE_UNUSED
)
864 segment_info_type
*seginfo
= seg_info (now_seg
);
866 /* Data means there is no current execute packet, and that any label
867 applies to that data rather than a subsequent instruction. */
868 tic6x_free_label_list (seginfo
->tc_segment_info_data
.label_list
);
869 seginfo
->tc_segment_info_data
.label_list
= NULL
;
870 seginfo
->tc_segment_info_data
.execute_packet_frag
= NULL
;
871 seginfo
->tc_segment_info_data
.last_insn_lsb
= NULL
;
872 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
873 seginfo
->tc_segment_info_data
.func_units_used
= 0;
876 /* Handle an alignment directive. Return TRUE if the
877 machine-independent frag generation should be skipped. */
880 tic6x_do_align (int n
, char *fill
, int len ATTRIBUTE_UNUSED
, int max
)
882 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
883 them in the md_end pass by inserting NOPs in parallel with
884 previous instructions. We only do this in sections containing
885 nothing but instructions. Code alignments of 1 or 2 bytes have
886 no effect in such sections (but we record them with
887 machine-dependent frags anyway so they can be skipped or
888 converted to machine-independent), while those of more than 64
889 bytes cannot reliably be handled in this way. */
895 && subseg_text_p (now_seg
))
903 /* Machine-independent code would generate a frag here, but we
904 wish to handle it in a machine-dependent way. */
905 if (frag_now_fix () != 0)
907 if (frag_now
->fr_type
!= rs_machine_dependent
)
908 frag_wane (frag_now
);
913 align_frag
= frag_now
;
914 p
= frag_var (rs_machine_dependent
, 32, 32, max
, NULL
, n
, NULL
);
915 /* This must be the same as the frag to which a pointer was just
917 if (p
!= align_frag
->fr_literal
)
919 align_frag
->tc_frag_data
.is_insns
= FALSE
;
926 /* Types of operand for parsing purposes. These are used as bit-masks
927 to tell tic6x_parse_operand what forms of operand are
929 #define TIC6X_OP_EXP 0x0001u
930 #define TIC6X_OP_REG 0x0002u
931 #define TIC6X_OP_REGPAIR 0x0004u
932 #define TIC6X_OP_IRP 0x0008u
933 #define TIC6X_OP_NRP 0x0010u
934 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
935 interpreted as an expression, which may be a symbol with the same
936 name as a register that ends up being implicitly DP-relative. With
937 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
938 a register if they match one, and failing that as an expression,
939 which must be constant. */
940 #define TIC6X_OP_MEM_NOUNREG 0x0020u
941 #define TIC6X_OP_MEM_UNREG 0x0040u
942 #define TIC6X_OP_CTRL 0x0080u
943 #define TIC6X_OP_FUNC_UNIT 0x0100u
945 /* A register or register pair read by the assembler. */
948 /* The side the register is on (1 or 2). */
950 /* The register number (0 to 31). */
954 /* Types of modification of a base address. */
960 tic6x_mem_mod_preinc
,
961 tic6x_mem_mod_predec
,
962 tic6x_mem_mod_postinc
,
963 tic6x_mem_mod_postdec
966 /* Scaled [] or unscaled () nature of an offset. */
971 tic6x_offset_unscaled
974 /* A memory operand read by the assembler. */
977 /* The base register. */
978 tic6x_register base_reg
;
979 /* How the base register is modified. */
981 /* Whether there is an offset (required with plain "+" and "-"), and
982 whether it is scaled or unscaled if so. */
983 tic6x_mem_scaling scaled
;
984 /* Whether the offset is a register (TRUE) or an expression
986 bfd_boolean offset_is_reg
;
995 /* A functional unit in SPMASK operands read by the assembler. */
998 /* The basic unit. */
999 tic6x_func_unit_base base
;
1000 /* The side (1 or 2). */
1002 } tic6x_func_unit_operand
;
1004 /* An operand read by the assembler. */
1007 /* The syntactic form of the operand, as one of the bit-masks
1010 /* The operand value. */
1013 /* An expression: TIC6X_OP_EXP. */
1015 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
1017 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
1018 TIC6X_OP_MEM_UNREG. */
1020 /* A control register: TIC6X_OP_CTRL. */
1022 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
1023 tic6x_func_unit_operand func_unit
;
1027 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
1029 /* Parse a register operand, or part of an operand, starting at *P.
1030 If syntactically OK (including that the number is in the range 0 to
1031 31, but not necessarily in range for this architecture), return
1032 TRUE, putting the register side and number in *REG and update *P to
1033 point immediately after the register number; otherwise return FALSE
1034 without changing *P (but possibly changing *REG). Do not print any
1038 tic6x_parse_register (char **p
, tic6x_register
*reg
)
1059 if (*r
>= '0' && *r
<= '9')
1061 reg
->num
= *r
- '0';
1067 if (reg
->num
> 0 && *r
>= '0' && *r
<= '9')
1069 reg
->num
= reg
->num
* 10 + (*r
- '0');
1073 if (*r
>= '0' && *r
<= '9')
1082 /* Parse the initial two characters of a functional unit name starting
1083 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
1087 tic6x_parse_func_unit_base (char *p
, tic6x_func_unit_base
*base
,
1090 bfd_boolean good_func_unit
= TRUE
;
1091 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
1092 unsigned int maybe_side
= 0;
1098 maybe_base
= tic6x_func_unit_d
;
1103 maybe_base
= tic6x_func_unit_l
;
1108 maybe_base
= tic6x_func_unit_m
;
1113 maybe_base
= tic6x_func_unit_s
;
1117 good_func_unit
= FALSE
;
1133 good_func_unit
= FALSE
;
1143 return good_func_unit
;
1146 /* Parse an operand starting at *P. If the operand parses OK, return
1147 TRUE and store the value in *OP; otherwise return FALSE (possibly
1148 changing *OP). In any case, update *P to point to the following
1149 comma or end of line. The possible operand forms are given by
1150 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
1151 starting at STR, length OPC_LEN. */
1154 tic6x_parse_operand (char **p
, tic6x_operand
*op
, unsigned int op_forms
,
1155 char *str
, int opc_len
, unsigned int opno
)
1157 bfd_boolean operand_parsed
= FALSE
;
1160 if ((op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
1161 == (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
1164 /* Check for functional unit names for SPMASK and SPMASKR. */
1165 if (!operand_parsed
&& (op_forms
& TIC6X_OP_FUNC_UNIT
))
1167 tic6x_func_unit_base base
= tic6x_func_unit_nfu
;
1168 unsigned int side
= 0;
1170 if (tic6x_parse_func_unit_base (q
, &base
, &side
))
1174 skip_whitespace (rq
);
1175 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1177 op
->form
= TIC6X_OP_FUNC_UNIT
;
1178 op
->value
.func_unit
.base
= base
;
1179 op
->value
.func_unit
.side
= side
;
1180 operand_parsed
= TRUE
;
1186 /* Check for literal "irp". */
1187 if (!operand_parsed
&& (op_forms
& TIC6X_OP_IRP
))
1189 if ((q
[0] == 'i' || q
[0] == 'I')
1190 && (q
[1] == 'r' || q
[1] == 'R')
1191 && (q
[2] == 'p' || q
[2] == 'P'))
1195 skip_whitespace (rq
);
1196 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1198 op
->form
= TIC6X_OP_IRP
;
1199 operand_parsed
= TRUE
;
1205 /* Check for literal "nrp". */
1206 if (!operand_parsed
&& (op_forms
& TIC6X_OP_NRP
))
1208 if ((q
[0] == 'n' || q
[0] == 'N')
1209 && (q
[1] == 'r' || q
[1] == 'R')
1210 && (q
[2] == 'p' || q
[2] == 'P'))
1214 skip_whitespace (rq
);
1215 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1217 op
->form
= TIC6X_OP_NRP
;
1218 operand_parsed
= TRUE
;
1224 /* Check for control register names. */
1225 if (!operand_parsed
&& (op_forms
& TIC6X_OP_CTRL
))
1229 for (crid
= 0; crid
< tic6x_ctrl_max
; crid
++)
1231 size_t len
= strlen (tic6x_ctrl_table
[crid
].name
);
1233 if (strncasecmp (tic6x_ctrl_table
[crid
].name
, q
, len
) == 0)
1237 skip_whitespace (rq
);
1238 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1240 op
->form
= TIC6X_OP_CTRL
;
1241 op
->value
.ctrl
= crid
;
1242 operand_parsed
= TRUE
;
1244 if (!(tic6x_ctrl_table
[crid
].isa_variants
& tic6x_features
))
1245 as_bad (_("control register '%s' not supported "
1246 "on this architecture"),
1247 tic6x_ctrl_table
[crid
].name
);
1253 /* See if this looks like a memory reference. */
1255 && (op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
)))
1257 bfd_boolean mem_ok
= TRUE
;
1259 tic6x_mem_mod mem_mod
= tic6x_mem_mod_none
;
1260 tic6x_register base_reg
;
1261 bfd_boolean require_offset
, permit_offset
;
1262 tic6x_mem_scaling scaled
;
1263 bfd_boolean offset_is_reg
;
1264 expressionS offset_exp
;
1265 tic6x_register offset_reg
;
1274 skip_whitespace (mq
);
1280 mem_mod
= tic6x_mem_mod_preinc
;
1285 mem_mod
= tic6x_mem_mod_plus
;
1293 mem_mod
= tic6x_mem_mod_predec
;
1298 mem_mod
= tic6x_mem_mod_minus
;
1310 skip_whitespace (mq
);
1311 mem_ok
= tic6x_parse_register (&mq
, &base_reg
);
1314 if (mem_ok
&& mem_mod
== tic6x_mem_mod_none
)
1316 skip_whitespace (mq
);
1317 if (mq
[0] == '+' && mq
[1] == '+')
1319 mem_mod
= tic6x_mem_mod_postinc
;
1322 else if (mq
[0] == '-' && mq
[1] == '-')
1324 mem_mod
= tic6x_mem_mod_postdec
;
1329 if (mem_mod
== tic6x_mem_mod_none
)
1330 permit_offset
= FALSE
;
1332 permit_offset
= TRUE
;
1333 if (mem_mod
== tic6x_mem_mod_plus
|| mem_mod
== tic6x_mem_mod_minus
)
1334 require_offset
= TRUE
;
1336 require_offset
= FALSE
;
1337 scaled
= tic6x_offset_none
;
1338 offset_is_reg
= FALSE
;
1340 if (mem_ok
&& permit_offset
)
1344 skip_whitespace (mq
);
1348 scaled
= tic6x_offset_scaled
;
1354 scaled
= tic6x_offset_unscaled
;
1362 if (scaled
!= tic6x_offset_none
)
1364 skip_whitespace (mq
);
1365 if (scaled
== tic6x_offset_scaled
1366 || (op_forms
& TIC6X_OP_MEM_UNREG
))
1371 reg_ok
= tic6x_parse_register (&rq
, &offset_reg
);
1374 skip_whitespace (rq
);
1378 offset_is_reg
= TRUE
;
1384 char *save_input_line_pointer
;
1386 save_input_line_pointer
= input_line_pointer
;
1387 input_line_pointer
= mq
;
1388 expression (&offset_exp
);
1389 mq
= input_line_pointer
;
1390 input_line_pointer
= save_input_line_pointer
;
1392 skip_whitespace (mq
);
1400 if (mem_ok
&& require_offset
&& scaled
== tic6x_offset_none
)
1405 skip_whitespace (mq
);
1406 if (!is_end_of_line
[(unsigned char) *mq
] && *mq
!= ',')
1412 op
->form
= op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
);
1413 op
->value
.mem
.base_reg
= base_reg
;
1414 op
->value
.mem
.mod
= mem_mod
;
1415 op
->value
.mem
.scaled
= scaled
;
1416 op
->value
.mem
.offset_is_reg
= offset_is_reg
;
1418 op
->value
.mem
.offset
.reg
= offset_reg
;
1420 op
->value
.mem
.offset
.exp
= offset_exp
;
1421 operand_parsed
= TRUE
;
1423 if (base_reg
.num
>= tic6x_num_registers
)
1424 as_bad (_("register number %u not supported on this architecture"),
1426 if (offset_is_reg
&& offset_reg
.num
>= tic6x_num_registers
)
1427 as_bad (_("register number %u not supported on this architecture"),
1432 /* See if this looks like a register or register pair. */
1433 if (!operand_parsed
&& (op_forms
& (TIC6X_OP_REG
| TIC6X_OP_REGPAIR
)))
1435 tic6x_register first_reg
, second_reg
;
1439 reg_ok
= tic6x_parse_register (&rq
, &first_reg
);
1443 if (*rq
== ':' && (op_forms
& TIC6X_OP_REGPAIR
))
1446 reg_ok
= tic6x_parse_register (&rq
, &second_reg
);
1449 skip_whitespace (rq
);
1450 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1452 if ((second_reg
.num
& 1)
1453 || (first_reg
.num
!= second_reg
.num
+ 1)
1454 || (first_reg
.side
!= second_reg
.side
))
1455 as_bad (_("register pair for operand %u of '%.*s'"
1456 " not a valid even/odd pair"), opno
,
1458 op
->form
= TIC6X_OP_REGPAIR
;
1459 op
->value
.reg
= second_reg
;
1460 operand_parsed
= TRUE
;
1465 else if (op_forms
& TIC6X_OP_REG
)
1467 skip_whitespace (rq
);
1468 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1470 op
->form
= TIC6X_OP_REG
;
1471 op
->value
.reg
= first_reg
;
1472 operand_parsed
= TRUE
;
1479 if (first_reg
.num
>= tic6x_num_registers
)
1480 as_bad (_("register number %u not supported on this architecture"),
1482 if (op
->form
== TIC6X_OP_REGPAIR
1483 && second_reg
.num
>= tic6x_num_registers
)
1484 as_bad (_("register number %u not supported on this architecture"),
1489 /* Otherwise, parse it as an expression. */
1490 if (!operand_parsed
&& (op_forms
& TIC6X_OP_EXP
))
1492 char *save_input_line_pointer
;
1494 save_input_line_pointer
= input_line_pointer
;
1495 input_line_pointer
= q
;
1496 op
->form
= TIC6X_OP_EXP
;
1497 expression (&op
->value
.exp
);
1498 q
= input_line_pointer
;
1499 input_line_pointer
= save_input_line_pointer
;
1500 operand_parsed
= TRUE
;
1505 /* Now the operand has been parsed, there must be nothing more
1506 before the comma or end of line. */
1507 skip_whitespace (q
);
1508 if (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1510 operand_parsed
= FALSE
;
1511 as_bad (_("junk after operand %u of '%.*s'"), opno
,
1513 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1519 /* This could not be parsed as any acceptable form of
1523 case TIC6X_OP_REG
| TIC6X_OP_REGPAIR
:
1524 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1525 opno
, opc_len
, str
);
1528 case TIC6X_OP_REG
| TIC6X_OP_CTRL
:
1530 as_bad (_("bad register for operand %u of '%.*s'"),
1531 opno
, opc_len
, str
);
1534 case TIC6X_OP_REGPAIR
:
1535 as_bad (_("bad register pair for operand %u of '%.*s'"),
1536 opno
, opc_len
, str
);
1539 case TIC6X_OP_FUNC_UNIT
:
1540 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1541 opno
, opc_len
, str
);
1545 as_bad (_("bad operand %u of '%.*s'"),
1546 opno
, opc_len
, str
);
1550 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1554 return operand_parsed
;
1557 /* Table of assembler operators and associated O_* values. */
1562 } tic6x_operator_table
;
1563 static const tic6x_operator_table tic6x_operators
[] = {
1564 #define O_dsbt_index O_md1
1565 { "dsbt_index", O_dsbt_index
},
1568 #define O_dpr_got O_md3
1569 { "dpr_got", O_dpr_got
},
1570 #define O_dpr_byte O_md4
1571 { "dpr_byte", O_dpr_byte
},
1572 #define O_dpr_hword O_md5
1573 { "dpr_hword", O_dpr_hword
},
1574 #define O_dpr_word O_md6
1575 { "dpr_word", O_dpr_word
},
1578 /* Parse a name in some machine-specific way. Used on C6X to handle
1579 assembler operators. */
1582 tic6x_parse_name (const char *name
, expressionS
*exprP
,
1583 enum expr_mode mode ATTRIBUTE_UNUSED
, char *nextchar
)
1585 char *p
= input_line_pointer
;
1586 char c
, *name_start
, *name_end
;
1587 const char *inner_name
;
1589 operatorT op
= O_illegal
;
1595 for (i
= 0; i
< ARRAY_SIZE (tic6x_operators
); i
++)
1596 if (strcasecmp (name
+ 1, tic6x_operators
[i
].name
) == 0)
1598 op
= tic6x_operators
[i
].op
;
1602 if (op
== O_illegal
)
1605 *input_line_pointer
= *nextchar
;
1606 skip_whitespace (p
);
1610 *input_line_pointer
= 0;
1614 skip_whitespace (p
);
1616 if (!is_name_beginner (*p
))
1618 *input_line_pointer
= 0;
1624 while (is_part_of_name (*p
))
1627 skip_whitespace (p
);
1631 *input_line_pointer
= 0;
1635 input_line_pointer
= p
+ 1;
1636 *nextchar
= *input_line_pointer
;
1637 *input_line_pointer
= 0;
1641 inner_name
= name_start
;
1642 if (op
== O_dsbt_index
&& strcmp (inner_name
, "__c6xabi_DSBT_BASE") != 0)
1644 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1645 inner_name
= "__c6xabi_DSBT_BASE";
1647 sym
= symbol_find_or_make (inner_name
);
1651 exprP
->X_add_symbol
= sym
;
1652 exprP
->X_add_number
= 0;
1653 exprP
->X_op_symbol
= NULL
;
1659 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1660 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1661 fixes resolving to constants should have those constants implicitly
1662 shifted) and FALSE otherwise, but look for C6X-specific expression
1663 types and adjust the relocations or give errors accordingly. */
1666 tic6x_fix_new_exp (fragS
*frag
, int where
, int size
, expressionS
*exp
,
1667 int pcrel
, bfd_reloc_code_real_type r_type
,
1668 bfd_boolean fix_adda
)
1670 bfd_reloc_code_real_type new_reloc
= BFD_RELOC_UNUSED
;
1678 case BFD_RELOC_C6000_SBR_U15_W
:
1679 new_reloc
= BFD_RELOC_C6000_DSBT_INDEX
;
1683 as_bad (_("$DSBT_INDEX not supported in this context"));
1691 case BFD_RELOC_C6000_SBR_U15_W
:
1692 new_reloc
= BFD_RELOC_C6000_SBR_GOT_U15_W
;
1696 as_bad (_("$GOT not supported in this context"));
1704 case BFD_RELOC_C6000_ABS_L16
:
1705 new_reloc
= BFD_RELOC_C6000_SBR_GOT_L16_W
;
1708 case BFD_RELOC_C6000_ABS_H16
:
1709 new_reloc
= BFD_RELOC_C6000_SBR_GOT_H16_W
;
1713 as_bad (_("$DPR_GOT not supported in this context"));
1721 case BFD_RELOC_C6000_ABS_S16
:
1722 new_reloc
= BFD_RELOC_C6000_SBR_S16
;
1725 case BFD_RELOC_C6000_ABS_L16
:
1726 new_reloc
= BFD_RELOC_C6000_SBR_L16_B
;
1729 case BFD_RELOC_C6000_ABS_H16
:
1730 new_reloc
= BFD_RELOC_C6000_SBR_H16_B
;
1734 as_bad (_("$DPR_BYTE not supported in this context"));
1742 case BFD_RELOC_C6000_ABS_L16
:
1743 new_reloc
= BFD_RELOC_C6000_SBR_L16_H
;
1746 case BFD_RELOC_C6000_ABS_H16
:
1747 new_reloc
= BFD_RELOC_C6000_SBR_H16_H
;
1751 as_bad (_("$DPR_HWORD not supported in this context"));
1759 case BFD_RELOC_C6000_ABS_L16
:
1760 new_reloc
= BFD_RELOC_C6000_SBR_L16_W
;
1763 case BFD_RELOC_C6000_ABS_H16
:
1764 new_reloc
= BFD_RELOC_C6000_SBR_H16_W
;
1768 as_bad (_("$DPR_WORD not supported in this context"));
1779 as_bad (_("invalid PC-relative operand"));
1785 if (new_reloc
== BFD_RELOC_UNUSED
)
1786 fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
1788 fix
= fix_new (frag
, where
, size
, exp
->X_add_symbol
, exp
->X_add_number
,
1790 fix
->tc_fix_data
.fix_adda
= fix_adda
;
1793 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1794 go through the error checking in tic6x_fix_new_exp. */
1797 tic6x_cons_fix_new (fragS
*frag
, int where
, int size
, expressionS
*exp
)
1799 bfd_reloc_code_real_type r_type
;
1804 r_type
= BFD_RELOC_8
;
1808 r_type
= BFD_RELOC_16
;
1812 r_type
= BFD_RELOC_32
;
1816 as_bad (_("no %d-byte relocations available"), size
);
1820 tic6x_fix_new_exp (frag
, where
, size
, exp
, 0, r_type
, FALSE
);
1823 /* Initialize target-specific fix data. */
1826 tic6x_init_fix_data (fixS
*fixP
)
1828 fixP
->tc_fix_data
.fix_adda
= FALSE
;
1831 /* Return true if the fix can be handled by GAS, false if it must
1832 be passed through to the linker. */
1835 tic6x_fix_adjustable (fixS
*fixP
)
1837 switch (fixP
->fx_r_type
)
1839 /* Adjust_reloc_syms doesn't know about the GOT. */
1840 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
1841 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
1842 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
1843 case BFD_RELOC_C6000_EHTYPE
:
1851 /* Given the fine-grained form of an operand, return the coarse
1855 tic6x_coarse_operand_form (tic6x_operand_form form
)
1859 case tic6x_operand_asm_const
:
1860 case tic6x_operand_link_const
:
1861 return TIC6X_OP_EXP
;
1863 case tic6x_operand_reg
:
1864 case tic6x_operand_xreg
:
1865 case tic6x_operand_dreg
:
1866 case tic6x_operand_areg
:
1867 case tic6x_operand_retreg
:
1868 return TIC6X_OP_REG
;
1870 case tic6x_operand_regpair
:
1871 case tic6x_operand_xregpair
:
1872 case tic6x_operand_dregpair
:
1873 return TIC6X_OP_REGPAIR
;
1875 case tic6x_operand_irp
:
1876 return TIC6X_OP_IRP
;
1878 case tic6x_operand_nrp
:
1879 return TIC6X_OP_NRP
;
1881 case tic6x_operand_ctrl
:
1882 return TIC6X_OP_CTRL
;
1884 case tic6x_operand_mem_short
:
1885 case tic6x_operand_mem_long
:
1886 case tic6x_operand_mem_deref
:
1887 return TIC6X_OP_MEM_NOUNREG
;
1889 case tic6x_operand_mem_ndw
:
1890 return TIC6X_OP_MEM_UNREG
;
1892 case tic6x_operand_func_unit
:
1893 return TIC6X_OP_FUNC_UNIT
;
1900 /* How an operand may match or not match a desired form. If different
1901 instruction alternatives fail in different ways, the first failure
1902 in this list determines the diagnostic. */
1906 tic6x_match_matches
,
1907 /* Bad coarse form. */
1910 tic6x_match_non_const
,
1911 /* Register on wrong side. */
1912 tic6x_match_wrong_side
,
1913 /* Not a valid address register. */
1914 tic6x_match_bad_address
,
1915 /* Not a valid return address register. */
1916 tic6x_match_bad_return
,
1917 /* Control register not readable. */
1918 tic6x_match_ctrl_write_only
,
1919 /* Control register not writable. */
1920 tic6x_match_ctrl_read_only
,
1921 /* Not a valid memory reference for this instruction. */
1923 } tic6x_operand_match
;
1925 /* Return whether an operand matches the given fine-grained form and
1926 read/write usage, and, if it does not match, how it fails to match.
1927 The main functional unit side is SIDE; the cross-path side is CROSS
1928 (the same as SIDE if a cross path not used); the data side is
1930 static tic6x_operand_match
1931 tic6x_operand_matches_form (const tic6x_operand
*op
, tic6x_operand_form form
,
1932 tic6x_rw rw
, unsigned int side
, unsigned int cross
,
1933 unsigned int data_side
)
1935 unsigned int coarse
= tic6x_coarse_operand_form (form
);
1937 if (coarse
!= op
->form
)
1938 return tic6x_match_coarse
;
1942 case tic6x_operand_asm_const
:
1943 if (op
->value
.exp
.X_op
== O_constant
)
1944 return tic6x_match_matches
;
1946 return tic6x_match_non_const
;
1948 case tic6x_operand_link_const
:
1949 case tic6x_operand_irp
:
1950 case tic6x_operand_nrp
:
1951 case tic6x_operand_func_unit
:
1952 /* All expressions are link-time constants, although there may
1953 not be relocations to express them in the output file. "irp"
1954 and "nrp" are unique operand values. All parsed functional
1955 unit names are valid. */
1956 return tic6x_match_matches
;
1958 case tic6x_operand_reg
:
1959 case tic6x_operand_regpair
:
1960 if (op
->value
.reg
.side
== side
)
1961 return tic6x_match_matches
;
1963 return tic6x_match_wrong_side
;
1965 case tic6x_operand_xreg
:
1966 case tic6x_operand_xregpair
:
1967 if (op
->value
.reg
.side
== cross
)
1968 return tic6x_match_matches
;
1970 return tic6x_match_wrong_side
;
1972 case tic6x_operand_dreg
:
1973 case tic6x_operand_dregpair
:
1974 if (op
->value
.reg
.side
== data_side
)
1975 return tic6x_match_matches
;
1977 return tic6x_match_wrong_side
;
1979 case tic6x_operand_areg
:
1980 if (op
->value
.reg
.side
!= cross
)
1981 return tic6x_match_wrong_side
;
1982 else if (op
->value
.reg
.side
== 2
1983 && (op
->value
.reg
.num
== 14 || op
->value
.reg
.num
== 15))
1984 return tic6x_match_matches
;
1986 return tic6x_match_bad_address
;
1988 case tic6x_operand_retreg
:
1989 if (op
->value
.reg
.side
!= side
)
1990 return tic6x_match_wrong_side
;
1991 else if (op
->value
.reg
.num
!= 3)
1992 return tic6x_match_bad_return
;
1994 return tic6x_match_matches
;
1996 case tic6x_operand_ctrl
:
2000 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read
2001 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
2002 return tic6x_match_matches
;
2004 return tic6x_match_ctrl_write_only
;
2006 case tic6x_rw_write
:
2007 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_write
2008 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
2009 return tic6x_match_matches
;
2011 return tic6x_match_ctrl_read_only
;
2017 case tic6x_operand_mem_deref
:
2018 if (op
->value
.mem
.mod
!= tic6x_mem_mod_none
)
2019 return tic6x_match_bad_mem
;
2020 else if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
2022 else if (op
->value
.mem
.base_reg
.side
!= side
)
2023 return tic6x_match_bad_mem
;
2025 return tic6x_match_matches
;
2027 case tic6x_operand_mem_short
:
2028 case tic6x_operand_mem_ndw
:
2029 if (op
->value
.mem
.base_reg
.side
!= side
)
2030 return tic6x_match_bad_mem
;
2031 if (op
->value
.mem
.mod
== tic6x_mem_mod_none
)
2033 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
2035 return tic6x_match_matches
;
2037 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
2039 if (op
->value
.mem
.mod
== tic6x_mem_mod_plus
2040 || op
->value
.mem
.mod
== tic6x_mem_mod_minus
)
2042 return tic6x_match_matches
;
2044 if (op
->value
.mem
.offset_is_reg
)
2046 if (op
->value
.mem
.scaled
== tic6x_offset_unscaled
2047 && form
!= tic6x_operand_mem_ndw
)
2049 if (op
->value
.mem
.offset
.reg
.side
== side
)
2050 return tic6x_match_matches
;
2052 return tic6x_match_bad_mem
;
2056 if (op
->value
.mem
.offset
.exp
.X_op
== O_constant
)
2057 return tic6x_match_matches
;
2059 return tic6x_match_bad_mem
;
2062 case tic6x_operand_mem_long
:
2063 if (op
->value
.mem
.base_reg
.side
== 2
2064 && (op
->value
.mem
.base_reg
.num
== 14
2065 || op
->value
.mem
.base_reg
.num
== 15))
2067 switch (op
->value
.mem
.mod
)
2069 case tic6x_mem_mod_none
:
2070 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
2072 return tic6x_match_matches
;
2074 case tic6x_mem_mod_plus
:
2075 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
2077 if (op
->value
.mem
.offset_is_reg
)
2078 return tic6x_match_bad_mem
;
2079 else if (op
->value
.mem
.scaled
== tic6x_offset_scaled
2080 && op
->value
.mem
.offset
.exp
.X_op
!= O_constant
)
2081 return tic6x_match_bad_mem
;
2083 return tic6x_match_matches
;
2085 case tic6x_mem_mod_minus
:
2086 case tic6x_mem_mod_preinc
:
2087 case tic6x_mem_mod_predec
:
2088 case tic6x_mem_mod_postinc
:
2089 case tic6x_mem_mod_postdec
:
2090 return tic6x_match_bad_mem
;
2098 return tic6x_match_bad_mem
;
2105 /* Return the number of bits shift used with DP-relative coding method
2109 tic6x_dpr_shift (tic6x_coding_method coding
)
2113 case tic6x_coding_ulcst_dpr_byte
:
2116 case tic6x_coding_ulcst_dpr_half
:
2119 case tic6x_coding_ulcst_dpr_word
:
2127 /* Return the relocation used with DP-relative coding method
2130 static bfd_reloc_code_real_type
2131 tic6x_dpr_reloc (tic6x_coding_method coding
)
2135 case tic6x_coding_ulcst_dpr_byte
:
2136 return BFD_RELOC_C6000_SBR_U15_B
;
2138 case tic6x_coding_ulcst_dpr_half
:
2139 return BFD_RELOC_C6000_SBR_U15_H
;
2141 case tic6x_coding_ulcst_dpr_word
:
2142 return BFD_RELOC_C6000_SBR_U15_W
;
2149 /* Given a memory reference *MEM_REF as originally parsed, fill in
2150 defaults for missing offsets. */
2153 tic6x_default_mem_ref (tic6x_mem_ref
*mem_ref
)
2155 switch (mem_ref
->mod
)
2157 case tic6x_mem_mod_none
:
2158 if (mem_ref
->scaled
!= tic6x_offset_none
)
2160 mem_ref
->mod
= tic6x_mem_mod_plus
;
2161 mem_ref
->scaled
= tic6x_offset_unscaled
;
2162 mem_ref
->offset_is_reg
= FALSE
;
2163 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
2164 mem_ref
->offset
.exp
.X_op
= O_constant
;
2165 mem_ref
->offset
.exp
.X_add_number
= 0;
2166 mem_ref
->offset
.exp
.X_unsigned
= 0;
2169 case tic6x_mem_mod_plus
:
2170 case tic6x_mem_mod_minus
:
2171 if (mem_ref
->scaled
== tic6x_offset_none
)
2175 case tic6x_mem_mod_preinc
:
2176 case tic6x_mem_mod_predec
:
2177 case tic6x_mem_mod_postinc
:
2178 case tic6x_mem_mod_postdec
:
2179 if (mem_ref
->scaled
!= tic6x_offset_none
)
2181 mem_ref
->scaled
= tic6x_offset_scaled
;
2182 mem_ref
->offset_is_reg
= FALSE
;
2183 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
2184 mem_ref
->offset
.exp
.X_op
= O_constant
;
2185 mem_ref
->offset
.exp
.X_add_number
= 1;
2186 mem_ref
->offset
.exp
.X_unsigned
= 0;
2194 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
2195 instruction of the specified UNIT, side SIDE. */
2198 tic6x_encode_spmask (tic6x_func_unit_base unit
, unsigned int side
)
2202 case tic6x_func_unit_l
:
2203 return 1 << (side
- 1);
2205 case tic6x_func_unit_s
:
2206 return 1 << (side
+ 1);
2208 case tic6x_func_unit_d
:
2209 return 1 << (side
+ 3);
2211 case tic6x_func_unit_m
:
2212 return 1 << (side
+ 5);
2219 /* Try to encode the instruction with opcode number ID and operands
2220 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
2221 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
2222 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
2223 SPLOOP_II is the ii value from the previous SPLOOP-family
2224 instruction, or 0 if not in such a loop; the only possible problems
2225 are operands being out of range (they already match the
2226 fine-grained form), and inappropriate predication. If this
2227 succeeds, return the encoding and set *OK to TRUE; otherwise return
2228 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
2229 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
2230 Print error messages for failure if PRINT_ERRORS is TRUE; the
2231 opcode starts at STR and has length OPC_LEN. */
2234 tic6x_try_encode (tic6x_opcode_id id
, tic6x_operand
*operands
,
2235 unsigned int num_operands
, unsigned int this_line_creg
,
2236 unsigned int this_line_z
, unsigned int func_unit_side
,
2237 unsigned int func_unit_cross
,
2238 unsigned int func_unit_data_side
, int sploop_ii
,
2239 expressionS
**fix_exp
, int *fix_pcrel
,
2240 bfd_reloc_code_real_type
*fx_r_type
, bfd_boolean
*fix_adda
,
2241 bfd_boolean
*fix_needed
, bfd_boolean
*ok
,
2242 bfd_boolean print_errors
, char *str
, int opc_len
)
2244 const tic6x_opcode
*opct
;
2245 const tic6x_insn_format
*fmt
;
2246 unsigned int opcode_value
;
2249 opct
= &tic6x_opcode_table
[id
];
2250 fmt
= &tic6x_insn_format_table
[opct
->format
];
2251 opcode_value
= fmt
->cst_bits
;
2253 for (fld
= 0; fld
< opct
->num_fixed_fields
; fld
++)
2255 if (opct
->fixed_fields
[fld
].min_val
== opct
->fixed_fields
[fld
].max_val
)
2257 const tic6x_insn_field
*fldd
;
2258 fldd
= tic6x_field_from_fmt (fmt
, opct
->fixed_fields
[fld
].field_id
);
2261 opcode_value
|= opct
->fixed_fields
[fld
].min_val
<< fldd
->low_pos
;
2265 for (fld
= 0; fld
< opct
->num_variable_fields
; fld
++)
2267 const tic6x_insn_field
*fldd
;
2273 unsigned int fcyc_bits
;
2278 fldd
= tic6x_field_from_fmt (fmt
, opct
->variable_fields
[fld
].field_id
);
2281 opno
= opct
->variable_fields
[fld
].operand_num
;
2282 switch (opct
->variable_fields
[fld
].coding_method
)
2284 case tic6x_coding_ucst
:
2285 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2287 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2289 ucexp
= operands
[opno
].value
.exp
;
2291 if (ucexp
.X_add_number
< 0
2292 || ucexp
.X_add_number
>= (1 << fldd
->width
))
2295 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2300 value
= ucexp
.X_add_number
;
2303 case tic6x_coding_scst
:
2304 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2306 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2309 /* Opcode table should not permit non-constants without
2310 a known relocation for them. */
2311 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2314 *fix_exp
= &operands
[opno
].value
.exp
;
2316 *fx_r_type
= BFD_RELOC_C6000_ABS_S16
;
2320 sign_value
= SEXT (operands
[opno
].value
.exp
.X_add_number
);
2322 if (sign_value
< -(1 << (fldd
->width
- 1))
2323 || (sign_value
>= (1 << (fldd
->width
- 1))))
2326 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2331 value
= sign_value
+ (1 << (fldd
->width
- 1));
2332 value
^= (1 << (fldd
->width
- 1));
2335 case tic6x_coding_ucst_minus_one
:
2336 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2338 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2340 if (operands
[opno
].value
.exp
.X_add_number
<= 0
2341 || operands
[opno
].value
.exp
.X_add_number
> (1 << fldd
->width
))
2344 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2349 value
= operands
[opno
].value
.exp
.X_add_number
- 1;
2352 case tic6x_coding_scst_negate
:
2353 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2355 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2357 sign_value
= SEXT (-operands
[opno
].value
.exp
.X_add_number
);
2358 goto signed_constant
;
2360 case tic6x_coding_ulcst_dpr_byte
:
2361 case tic6x_coding_ulcst_dpr_half
:
2362 case tic6x_coding_ulcst_dpr_word
:
2363 bits
= tic6x_dpr_shift (opct
->variable_fields
[fld
].coding_method
);
2364 switch (operands
[opno
].form
)
2367 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2369 ucexp
= operands
[opno
].value
.exp
;
2370 goto unsigned_constant
;
2372 expp
= &operands
[opno
].value
.exp
;
2375 case TIC6X_OP_MEM_NOUNREG
:
2376 mem
= operands
[opno
].value
.mem
;
2377 tic6x_default_mem_ref (&mem
);
2378 if (mem
.offset_is_reg
)
2380 if (mem
.offset
.exp
.X_op
== O_constant
)
2382 ucexp
= mem
.offset
.exp
;
2383 if (mem
.scaled
== tic6x_offset_unscaled
)
2385 if (ucexp
.X_add_number
& ((1 << bits
) - 1))
2388 as_bad (_("offset in operand %u of '%.*s' not "
2389 "divisible by %u"), opno
+ 1, opc_len
,
2394 ucexp
.X_add_number
>>= bits
;
2396 goto unsigned_constant
;
2398 if (mem
.scaled
!= tic6x_offset_unscaled
)
2400 if (operands
[opno
].value
.mem
.mod
== tic6x_mem_mod_none
2401 || operands
[opno
].value
.mem
.scaled
!= tic6x_offset_unscaled
2402 || operands
[opno
].value
.mem
.offset_is_reg
)
2404 expp
= &operands
[opno
].value
.mem
.offset
.exp
;
2411 /* Opcode table should not use this encoding without a known
2413 if (fldd
->low_pos
!= 8 || fldd
->width
!= 15)
2415 /* We do not check for offset divisibility here; such a
2416 check is not needed at this point to encode the value,
2417 and if there is eventually a problem it will be detected
2418 either in md_apply_fix or at link time. */
2423 = tic6x_dpr_reloc (opct
->variable_fields
[fld
].coding_method
);
2424 if (operands
[opno
].form
== TIC6X_OP_EXP
)
2430 case tic6x_coding_lcst_low16
:
2431 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2433 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2434 value
= operands
[opno
].value
.exp
.X_add_number
& 0xffff;
2438 /* Opcode table should not use this encoding without a
2439 known relocation. */
2440 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2443 *fix_exp
= &operands
[opno
].value
.exp
;
2445 *fx_r_type
= BFD_RELOC_C6000_ABS_L16
;
2450 case tic6x_coding_lcst_high16
:
2451 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2453 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2454 value
= (operands
[opno
].value
.exp
.X_add_number
>> 16) & 0xffff;
2458 /* Opcode table should not use this encoding without a
2459 known relocation. */
2460 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2463 *fix_exp
= &operands
[opno
].value
.exp
;
2465 *fx_r_type
= BFD_RELOC_C6000_ABS_H16
;
2470 case tic6x_coding_pcrel
:
2471 case tic6x_coding_pcrel_half
:
2472 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2476 *fix_exp
= &operands
[opno
].value
.exp
;
2478 if (fldd
->low_pos
== 7 && fldd
->width
== 21)
2479 *fx_r_type
= BFD_RELOC_C6000_PCR_S21
;
2480 else if (fldd
->low_pos
== 16 && fldd
->width
== 12)
2481 *fx_r_type
= BFD_RELOC_C6000_PCR_S12
;
2482 else if (fldd
->low_pos
== 13 && fldd
->width
== 10)
2483 *fx_r_type
= BFD_RELOC_C6000_PCR_S10
;
2484 else if (fldd
->low_pos
== 16 && fldd
->width
== 7)
2485 *fx_r_type
= BFD_RELOC_C6000_PCR_S7
;
2487 /* Opcode table should not use this encoding without a
2488 known relocation. */
2493 case tic6x_coding_reg
:
2494 switch (operands
[opno
].form
)
2497 case TIC6X_OP_REGPAIR
:
2498 value
= operands
[opno
].value
.reg
.num
;
2501 case TIC6X_OP_MEM_NOUNREG
:
2502 case TIC6X_OP_MEM_UNREG
:
2503 value
= operands
[opno
].value
.mem
.base_reg
.num
;
2511 case tic6x_coding_areg
:
2512 switch (operands
[opno
].form
)
2515 value
= (operands
[opno
].value
.reg
.num
== 15 ? 1 : 0);
2518 case TIC6X_OP_MEM_NOUNREG
:
2519 value
= (operands
[opno
].value
.mem
.base_reg
.num
== 15 ? 1 : 0);
2527 case tic6x_coding_crlo
:
2528 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2530 value
= tic6x_ctrl_table
[operands
[opno
].value
.ctrl
].crlo
;
2533 case tic6x_coding_crhi
:
2534 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2539 case tic6x_coding_reg_shift
:
2540 if (operands
[opno
].form
!= TIC6X_OP_REGPAIR
)
2542 value
= operands
[opno
].value
.reg
.num
>> 1;
2545 case tic6x_coding_mem_offset
:
2546 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
)
2548 mem
= operands
[opno
].value
.mem
;
2549 tic6x_default_mem_ref (&mem
);
2550 if (mem
.offset_is_reg
)
2552 if (mem
.scaled
!= tic6x_offset_scaled
)
2554 value
= mem
.offset
.reg
.num
;
2560 if (mem
.offset
.exp
.X_op
!= O_constant
)
2564 case tic6x_offset_scaled
:
2568 case tic6x_offset_unscaled
:
2569 scale
= opct
->operand_info
[opno
].size
;
2570 if (scale
!= 1 && scale
!= 2 && scale
!= 4 && scale
!= 8)
2577 if (mem
.offset
.exp
.X_add_number
< 0
2578 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
) * scale
)
2581 as_bad (_("offset in operand %u of '%.*s' out of range"),
2582 opno
+ 1, opc_len
, str
);
2586 if (mem
.offset
.exp
.X_add_number
% scale
)
2589 as_bad (_("offset in operand %u of '%.*s' not "
2591 opno
+ 1, opc_len
, str
, scale
);
2595 value
= mem
.offset
.exp
.X_add_number
/ scale
;
2599 case tic6x_coding_mem_offset_noscale
:
2600 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2602 mem
= operands
[opno
].value
.mem
;
2603 tic6x_default_mem_ref (&mem
);
2604 if (mem
.offset_is_reg
)
2605 value
= mem
.offset
.reg
.num
;
2608 if (mem
.offset
.exp
.X_op
!= O_constant
)
2610 if (mem
.offset
.exp
.X_add_number
< 0
2611 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
))
2614 as_bad (_("offset in operand %u of '%.*s' out of range"),
2615 opno
+ 1, opc_len
, str
);
2619 value
= mem
.offset
.exp
.X_add_number
;
2623 case tic6x_coding_mem_mode
:
2624 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
2625 && operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2627 mem
= operands
[opno
].value
.mem
;
2628 tic6x_default_mem_ref (&mem
);
2631 case tic6x_mem_mod_plus
:
2635 case tic6x_mem_mod_minus
:
2639 case tic6x_mem_mod_preinc
:
2643 case tic6x_mem_mod_predec
:
2647 case tic6x_mem_mod_postinc
:
2651 case tic6x_mem_mod_postdec
:
2658 value
+= (mem
.offset_is_reg
? 4 : 0);
2661 case tic6x_coding_scaled
:
2662 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2664 mem
= operands
[opno
].value
.mem
;
2665 tic6x_default_mem_ref (&mem
);
2668 case tic6x_offset_unscaled
:
2672 case tic6x_offset_scaled
:
2681 case tic6x_coding_spmask
:
2682 /* The position of such a field is hardcoded in the handling
2684 if (fldd
->low_pos
!= 18)
2687 for (opno
= 0; opno
< num_operands
; opno
++)
2691 v
= tic6x_encode_spmask (operands
[opno
].value
.func_unit
.base
,
2692 operands
[opno
].value
.func_unit
.side
);
2696 as_bad (_("functional unit already masked for operand "
2697 "%u of '%.*s'"), opno
+ 1, opc_len
, str
);
2705 case tic6x_coding_reg_unused
:
2706 /* This is a placeholder; correct handling goes along with
2707 resource constraint checks. */
2711 case tic6x_coding_fstg
:
2712 case tic6x_coding_fcyc
:
2713 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2715 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2720 as_bad (_("'%.*s' instruction not in a software "
2729 else if (sploop_ii
<= 2)
2731 else if (sploop_ii
<= 4)
2733 else if (sploop_ii
<= 8)
2735 else if (sploop_ii
<= 14)
2739 if (fcyc_bits
> fldd
->width
)
2742 if (opct
->variable_fields
[fld
].coding_method
== tic6x_coding_fstg
)
2745 if (operands
[opno
].value
.exp
.X_add_number
< 0
2746 || (operands
[opno
].value
.exp
.X_add_number
2747 >= (1 << (fldd
->width
- fcyc_bits
))))
2750 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2755 value
= operands
[opno
].value
.exp
.X_add_number
;
2756 for (t
= 0, i
= fcyc_bits
; i
< fldd
->width
; i
++)
2758 t
= (t
<< 1) | (value
& 1);
2761 value
= t
<< fcyc_bits
;
2765 if (operands
[opno
].value
.exp
.X_add_number
< 0
2766 || (operands
[opno
].value
.exp
.X_add_number
>= sploop_ii
))
2769 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2774 value
= operands
[opno
].value
.exp
.X_add_number
;
2778 case tic6x_coding_fu
:
2779 value
= func_unit_side
== 2 ? 1 : 0;
2782 case tic6x_coding_data_fu
:
2783 value
= func_unit_data_side
== 2 ? 1 : 0;
2786 case tic6x_coding_xpath
:
2787 value
= func_unit_cross
;
2794 for (ffld
= 0; ffld
< opct
->num_fixed_fields
; ffld
++)
2795 if ((opct
->fixed_fields
[ffld
].field_id
2796 == opct
->variable_fields
[fld
].field_id
)
2797 && (value
< opct
->fixed_fields
[ffld
].min_val
2798 || value
> opct
->fixed_fields
[ffld
].max_val
))
2801 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2807 opcode_value
|= value
<< fldd
->low_pos
;
2812 const tic6x_insn_field
*creg
;
2813 const tic6x_insn_field
*z
;
2815 creg
= tic6x_field_from_fmt (fmt
, tic6x_field_creg
);
2819 as_bad (_("instruction '%.*s' cannot be predicated"),
2824 z
= tic6x_field_from_fmt (fmt
, tic6x_field_z
);
2825 /* If there is a creg field, there must be a z field; otherwise
2826 there is an error in the format table. */
2830 opcode_value
|= this_line_creg
<< creg
->low_pos
;
2831 opcode_value
|= this_line_z
<< z
->low_pos
;
2835 return opcode_value
;
2838 /* Convert the target integer stored in N bytes in BUF to a host
2839 integer, returning that value. */
2842 md_chars_to_number (char *buf
, int n
)
2845 unsigned char *p
= (unsigned char *) buf
;
2847 if (target_big_endian
)
2852 result
|= (*p
++ & 0xff);
2860 result
|= (p
[n
] & 0xff);
2867 /* Assemble the instruction starting at STR (an opcode, with the
2868 opcode name all-lowercase). */
2871 md_assemble (char *str
)
2875 bfd_boolean this_line_parallel
;
2876 bfd_boolean this_line_spmask
;
2877 unsigned int this_line_creg
;
2878 unsigned int this_line_z
;
2879 tic6x_label_list
*this_insn_label_list
;
2880 segment_info_type
*seginfo
;
2881 tic6x_opcode_list
*opc_list
, *opc
;
2882 tic6x_func_unit_base func_unit_base
= tic6x_func_unit_nfu
;
2883 unsigned int func_unit_side
= 0;
2884 unsigned int func_unit_cross
= 0;
2885 unsigned int cross_side
= 0;
2886 unsigned int func_unit_data_side
= 0;
2887 unsigned int max_matching_opcodes
, num_matching_opcodes
;
2888 tic6x_opcode_id
*opcm
= NULL
;
2889 unsigned int opc_rank
[TIC6X_NUM_PREFER
];
2890 const tic6x_opcode
*opct
= NULL
;
2891 int min_rank
, try_rank
, max_rank
;
2892 bfd_boolean num_operands_permitted
[TIC6X_MAX_SOURCE_OPERANDS
+ 1]
2894 unsigned int operand_forms
[TIC6X_MAX_SOURCE_OPERANDS
] = { 0 };
2895 tic6x_operand operands
[TIC6X_MAX_SOURCE_OPERANDS
];
2896 unsigned int max_num_operands
;
2897 unsigned int num_operands_read
;
2898 bfd_boolean ok_this_arch
, ok_this_fu
, ok_this_arch_fu
;
2899 bfd_boolean bad_operands
= FALSE
;
2900 unsigned int opcode_value
;
2901 bfd_boolean encoded_ok
;
2902 bfd_boolean fix_needed
= FALSE
;
2903 expressionS
*fix_exp
= NULL
;
2905 bfd_reloc_code_real_type fx_r_type
= BFD_RELOC_UNUSED
;
2906 bfd_boolean fix_adda
= FALSE
;
2911 while (*p
&& !is_end_of_line
[(unsigned char) *p
] && *p
!= ' ')
2914 /* This function should only have been called when there is actually
2915 an instruction to assemble. */
2919 /* Now an instruction has been seen, architecture attributes from
2920 .arch directives merge with rather than overriding the previous
2922 tic6x_seen_insns
= TRUE
;
2923 /* If no .arch directives or -march options have been seen, we are
2924 assessing instruction validity based on the C674X default, so set
2925 the attribute accordingly. */
2926 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
2927 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
2929 /* Reset global settings for parallel bars and predicates now to
2930 avoid extra errors if there are problems with this opcode. */
2931 this_line_parallel
= tic6x_line_parallel
;
2932 this_line_spmask
= tic6x_line_spmask
;
2933 this_line_creg
= tic6x_line_creg
;
2934 this_line_z
= tic6x_line_z
;
2935 tic6x_line_parallel
= FALSE
;
2936 tic6x_line_spmask
= FALSE
;
2937 tic6x_line_creg
= 0;
2939 seginfo
= seg_info (now_seg
);
2940 this_insn_label_list
= seginfo
->tc_segment_info_data
.label_list
;
2941 seginfo
->tc_segment_info_data
.label_list
= NULL
;
2943 opc_list
= hash_find_n (opcode_hash
, str
, p
- str
);
2944 if (opc_list
== NULL
)
2948 as_bad (_("unknown opcode '%s'"), str
);
2954 skip_whitespace (p
);
2956 /* See if there is something that looks like a functional unit
2960 bfd_boolean good_func_unit
;
2961 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
2962 unsigned int maybe_side
= 0;
2963 unsigned int maybe_cross
= 0;
2964 unsigned int maybe_data_side
= 0;
2966 good_func_unit
= tic6x_parse_func_unit_base (p
+ 1, &maybe_base
,
2971 if (p
[3] == ' ' || is_end_of_line
[(unsigned char) p
[3]])
2973 else if ((p
[3] == 'x' || p
[3] == 'X')
2974 && (p
[4] == ' ' || is_end_of_line
[(unsigned char) p
[4]]))
2979 else if (maybe_base
== tic6x_func_unit_d
2980 && (p
[3] == 't' || p
[3] == 'T')
2981 && (p
[4] == '1' || p
[4] == '2')
2982 && (p
[5] == ' ' || is_end_of_line
[(unsigned char) p
[5]]))
2984 maybe_data_side
= p
[4] - '0';
2988 good_func_unit
= FALSE
;
2993 func_unit_base
= maybe_base
;
2994 func_unit_side
= maybe_side
;
2995 func_unit_cross
= maybe_cross
;
2996 cross_side
= (func_unit_cross
? 3 - func_unit_side
: func_unit_side
);
2997 func_unit_data_side
= maybe_data_side
;
3000 skip_whitespace (p
);
3003 /* Determine which entries in the opcode table match, and the
3004 associated permitted forms of operands. */
3005 max_matching_opcodes
= 0;
3006 for (opc
= opc_list
; opc
; opc
= opc
->next
)
3007 max_matching_opcodes
++;
3008 num_matching_opcodes
= 0;
3009 opcm
= xmalloc (max_matching_opcodes
* sizeof (*opcm
));
3010 max_num_operands
= 0;
3011 ok_this_arch
= FALSE
;
3013 ok_this_arch_fu
= FALSE
;
3014 for (opc
= opc_list
; opc
; opc
= opc
->next
)
3016 unsigned int num_operands
;
3018 bfd_boolean this_opc_arch_ok
= TRUE
;
3019 bfd_boolean this_opc_fu_ok
= TRUE
;
3021 if (tic6x_insn_format_table
[tic6x_opcode_table
[opc
->id
].format
].num_bits
3024 if (!(tic6x_opcode_table
[opc
->id
].isa_variants
& tic6x_features
))
3025 this_opc_arch_ok
= FALSE
;
3026 if (tic6x_opcode_table
[opc
->id
].func_unit
!= func_unit_base
)
3027 this_opc_fu_ok
= FALSE
;
3028 if (func_unit_side
== 1
3029 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_B_ONLY
))
3030 this_opc_fu_ok
= FALSE
;
3032 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_NO_CROSS
))
3033 this_opc_fu_ok
= FALSE
;
3034 if (!func_unit_data_side
3035 && (tic6x_opcode_table
[opc
->id
].flags
3036 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
3037 this_opc_fu_ok
= FALSE
;
3038 if (func_unit_data_side
3039 && !(tic6x_opcode_table
[opc
->id
].flags
3040 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
3041 this_opc_fu_ok
= FALSE
;
3042 if (func_unit_data_side
== 1
3043 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_T2_ONLY
))
3044 this_opc_fu_ok
= FALSE
;
3045 if (this_opc_arch_ok
)
3046 ok_this_arch
= TRUE
;
3049 if (!this_opc_arch_ok
|| !this_opc_fu_ok
)
3051 ok_this_arch_fu
= TRUE
;
3052 opcm
[num_matching_opcodes
] = opc
->id
;
3053 num_matching_opcodes
++;
3054 num_operands
= tic6x_opcode_table
[opc
->id
].num_operands
;
3056 if (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SPMASK
)
3058 if (num_operands
!= 1
3059 || (tic6x_opcode_table
[opc
->id
].operand_info
[0].form
3060 != tic6x_operand_func_unit
))
3063 for (i
= 0; i
< num_operands
; i
++)
3066 |= tic6x_coarse_operand_form (tic6x_operand_func_unit
);
3067 num_operands_permitted
[i
] = TRUE
;
3072 for (i
= 0; i
< num_operands
; i
++)
3074 tic6x_operand_form f
3075 = tic6x_opcode_table
[opc
->id
].operand_info
[i
].form
;
3077 operand_forms
[i
] |= tic6x_coarse_operand_form (f
);
3080 num_operands_permitted
[num_operands
] = TRUE
;
3081 if (num_operands
> max_num_operands
)
3082 max_num_operands
= num_operands
;
3087 as_bad (_("'%.*s' instruction not supported on this architecture"),
3095 as_bad (_("'%.*s' instruction not supported on this functional unit"),
3101 if (!ok_this_arch_fu
)
3103 as_bad (_("'%.*s' instruction not supported on this functional unit"
3104 " for this architecture"),
3110 /* If there were no instructions matching the above availability
3111 checks, we should now have given an error and returned. */
3112 if (num_matching_opcodes
== 0)
3115 num_operands_read
= 0;
3118 skip_whitespace (p
);
3119 if (is_end_of_line
[(unsigned char) *p
])
3121 if (num_operands_read
> 0)
3123 as_bad (_("missing operand after comma"));
3124 bad_operands
= TRUE
;
3129 if (max_num_operands
== 0)
3131 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
3132 bad_operands
= TRUE
;
3136 if (!tic6x_parse_operand (&p
, &operands
[num_operands_read
],
3137 operand_forms
[num_operands_read
], str
, opc_len
,
3138 num_operands_read
+ 1))
3139 bad_operands
= TRUE
;
3140 num_operands_read
++;
3142 if (is_end_of_line
[(unsigned char) *p
])
3147 if (num_operands_read
== max_num_operands
)
3149 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
3150 bad_operands
= TRUE
;
3156 /* Operand parsing should consume whole operands. */
3160 if (!bad_operands
&& !num_operands_permitted
[num_operands_read
])
3162 as_bad (_("bad number of operands to '%.*s'"), opc_len
, str
);
3163 bad_operands
= TRUE
;
3168 /* Each operand is of the right syntactic form for some opcode
3169 choice, and the number of operands is valid. Check that each
3170 operand is OK in detail for some opcode choice with the right
3171 number of operands. */
3174 for (i
= 0; i
< num_operands_read
; i
++)
3176 bfd_boolean coarse_ok
= FALSE
;
3177 bfd_boolean fine_ok
= FALSE
;
3178 tic6x_operand_match fine_failure
= tic6x_match_matches
;
3181 for (j
= 0; j
< num_matching_opcodes
; j
++)
3183 tic6x_operand_form f
;
3186 tic6x_operand_match this_fine_failure
;
3188 if (tic6x_opcode_table
[opcm
[j
]].flags
& TIC6X_FLAG_SPMASK
)
3190 f
= tic6x_operand_func_unit
;
3195 if (tic6x_opcode_table
[opcm
[j
]].num_operands
3196 != num_operands_read
)
3199 f
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].form
;
3200 rw
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].rw
;
3202 cf
= tic6x_coarse_operand_form (f
);
3204 if (operands
[i
].form
!= cf
)
3209 = tic6x_operand_matches_form (&operands
[i
], f
, rw
,
3212 func_unit_data_side
);
3213 if (this_fine_failure
== tic6x_match_matches
)
3218 if (fine_failure
== tic6x_match_matches
3219 || fine_failure
> this_fine_failure
)
3220 fine_failure
= this_fine_failure
;
3223 /* No instructions should have operand syntactic forms only
3224 acceptable with certain numbers of operands, so no
3225 diagnostic for this case. */
3231 switch (fine_failure
)
3233 case tic6x_match_non_const
:
3234 as_bad (_("operand %u of '%.*s' not constant"),
3235 i
+ 1, opc_len
, str
);
3238 case tic6x_match_wrong_side
:
3239 as_bad (_("operand %u of '%.*s' on wrong side"),
3240 i
+ 1, opc_len
, str
);
3243 case tic6x_match_bad_return
:
3244 as_bad (_("operand %u of '%.*s' not a valid return "
3245 "address register"),
3246 i
+ 1, opc_len
, str
);
3249 case tic6x_match_ctrl_write_only
:
3250 as_bad (_("operand %u of '%.*s' is write-only"),
3251 i
+ 1, opc_len
, str
);
3254 case tic6x_match_ctrl_read_only
:
3255 as_bad (_("operand %u of '%.*s' is read-only"),
3256 i
+ 1, opc_len
, str
);
3259 case tic6x_match_bad_mem
:
3260 as_bad (_("operand %u of '%.*s' not a valid memory "
3262 i
+ 1, opc_len
, str
);
3265 case tic6x_match_bad_address
:
3266 as_bad (_("operand %u of '%.*s' not a valid base "
3267 "address register"),
3268 i
+ 1, opc_len
, str
);
3274 bad_operands
= TRUE
;
3282 /* Each operand is OK for some opcode choice, and the number of
3283 operands is valid. Check whether there is an opcode choice
3284 for which all operands are simultaneously valid. */
3286 bfd_boolean found_match
= FALSE
;
3288 for (i
= 0; i
< TIC6X_NUM_PREFER
; i
++)
3289 opc_rank
[i
] = (unsigned int) -1;
3291 min_rank
= TIC6X_NUM_PREFER
- 1;
3294 for (i
= 0; i
< num_matching_opcodes
; i
++)
3297 bfd_boolean this_matches
= TRUE
;
3299 if (!(tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3300 && tic6x_opcode_table
[opcm
[i
]].num_operands
!= num_operands_read
)
3303 for (j
= 0; j
< num_operands_read
; j
++)
3305 tic6x_operand_form f
;
3308 if (tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3310 f
= tic6x_operand_func_unit
;
3315 f
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].form
;
3316 rw
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].rw
;
3318 if (tic6x_operand_matches_form (&operands
[j
], f
, rw
,
3321 func_unit_data_side
)
3322 != tic6x_match_matches
)
3324 this_matches
= FALSE
;
3331 int rank
= TIC6X_PREFER_VAL (tic6x_opcode_table
[opcm
[i
]].flags
);
3333 if (rank
< min_rank
)
3335 if (rank
> max_rank
)
3338 if (opc_rank
[rank
] == (unsigned int) -1)
3341 /* The opcode table should provide a total ordering
3342 for all cases where multiple matches may get
3352 as_bad (_("bad operand combination for '%.*s'"), opc_len
, str
);
3353 bad_operands
= TRUE
;
3365 for (try_rank
= max_rank
; try_rank
>= min_rank
; try_rank
--)
3369 if (opc_rank
[try_rank
] == (unsigned int) -1)
3372 opcode_value
= tic6x_try_encode (opcm
[opc_rank
[try_rank
]], operands
,
3373 num_operands_read
, this_line_creg
,
3374 this_line_z
, func_unit_side
,
3375 func_unit_cross
, func_unit_data_side
,
3376 seginfo
->tc_segment_info_data
.sploop_ii
,
3377 &fix_exp
, &fix_pcrel
, &fx_r_type
,
3378 &fix_adda
, &fix_needed
, &encoded_ok
,
3379 (try_rank
== min_rank
? TRUE
: FALSE
),
3383 opct
= &tic6x_opcode_table
[opcm
[opc_rank
[try_rank
]]];
3393 if (this_line_parallel
)
3395 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
;
3396 if (insn_frag
== NULL
)
3398 as_bad (_("parallel instruction not following another instruction"));
3402 if (insn_frag
->fr_fix
>= 32)
3404 as_bad (_("too many instructions in execute packet"));
3408 if (this_insn_label_list
!= NULL
)
3409 as_bad (_("label not at start of execute packet"));
3411 if (opct
->flags
& TIC6X_FLAG_FIRST
)
3412 as_bad (_("'%.*s' instruction not at start of execute packet"),
3415 *seginfo
->tc_segment_info_data
.last_insn_lsb
|= 0x1;
3416 output
= insn_frag
->fr_literal
+ insn_frag
->fr_fix
;
3420 tic6x_label_list
*l
;
3422 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
3423 seginfo
->tc_segment_info_data
.func_units_used
= 0;
3425 /* Start a new frag for this execute packet. */
3426 if (frag_now_fix () != 0)
3428 if (frag_now
->fr_type
!= rs_machine_dependent
)
3429 frag_wane (frag_now
);
3434 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
= frag_now
;
3435 for (l
= this_insn_label_list
; l
; l
= l
->next
)
3437 symbol_set_frag (l
->label
, frag_now
);
3438 S_SET_VALUE (l
->label
, 0);
3439 S_SET_SEGMENT (l
->label
, now_seg
);
3441 tic6x_free_label_list (this_insn_label_list
);
3442 dwarf2_emit_insn (0);
3443 output
= frag_var (rs_machine_dependent
, 32, 32, 0, NULL
, 0, NULL
);
3444 /* This must be the same as the frag to which a pointer was just
3446 if (output
!= insn_frag
->fr_literal
)
3448 insn_frag
->tc_frag_data
.is_insns
= TRUE
;
3449 insn_frag
->tc_frag_data
.can_cross_fp_boundary
3450 = tic6x_can_cross_fp_boundary
;
3453 if (func_unit_base
!= tic6x_func_unit_nfu
)
3455 unsigned int func_unit_enc
;
3457 func_unit_enc
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3459 if (seginfo
->tc_segment_info_data
.func_units_used
& func_unit_enc
)
3460 as_bad (_("functional unit already used in this execute packet"));
3462 seginfo
->tc_segment_info_data
.func_units_used
|= func_unit_enc
;
3465 if (opct
->flags
& TIC6X_FLAG_SPLOOP
)
3467 if (seginfo
->tc_segment_info_data
.sploop_ii
)
3468 as_bad (_("nested software pipelined loop"));
3469 if (num_operands_read
!= 1
3470 || operands
[0].form
!= TIC6X_OP_EXP
3471 || operands
[0].value
.exp
.X_op
!= O_constant
)
3473 seginfo
->tc_segment_info_data
.sploop_ii
3474 = operands
[0].value
.exp
.X_add_number
;
3476 else if (opct
->flags
& TIC6X_FLAG_SPKERNEL
)
3478 if (!seginfo
->tc_segment_info_data
.sploop_ii
)
3479 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3481 seginfo
->tc_segment_info_data
.sploop_ii
= 0;
3484 if (this_line_spmask
)
3486 if (seginfo
->tc_segment_info_data
.spmask_addr
== NULL
)
3487 as_bad (_("'||^' without previous SPMASK"));
3488 else if (func_unit_base
== tic6x_func_unit_nfu
)
3489 as_bad (_("cannot mask instruction using no functional unit"));
3492 unsigned int spmask_opcode
;
3493 unsigned int mask_bit
;
3496 = md_chars_to_number (seginfo
->tc_segment_info_data
.spmask_addr
,
3498 mask_bit
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3500 if (spmask_opcode
& mask_bit
)
3501 as_bad (_("functional unit already masked"));
3502 spmask_opcode
|= mask_bit
;
3503 md_number_to_chars (seginfo
->tc_segment_info_data
.spmask_addr
,
3508 record_alignment (now_seg
, 5);
3509 md_number_to_chars (output
, opcode_value
, 4);
3511 tic6x_fix_new_exp (insn_frag
, output
- insn_frag
->fr_literal
, 4, fix_exp
,
3512 fix_pcrel
, fx_r_type
, fix_adda
);
3513 insn_frag
->fr_fix
+= 4;
3514 insn_frag
->fr_var
-= 4;
3515 seginfo
->tc_segment_info_data
.last_insn_lsb
3516 = (target_big_endian
? output
+ 3 : output
);
3517 if (opct
->flags
& TIC6X_FLAG_SPMASK
)
3518 seginfo
->tc_segment_info_data
.spmask_addr
= output
;
3521 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3522 and the least significant BITS bits taken, at position POS. */
3523 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3525 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3526 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3529 /* Apply a fixup to the object file. */
3532 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3534 offsetT value
= *valP
;
3535 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3537 value
= SEXT (value
);
3540 fixP
->fx_offset
= SEXT (fixP
->fx_offset
);
3542 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3545 /* We do our own overflow checks. */
3546 fixP
->fx_no_overflow
= 1;
3548 switch (fixP
->fx_r_type
)
3550 case BFD_RELOC_NONE
:
3551 case BFD_RELOC_C6000_EHTYPE
:
3552 /* Force output to the object file. */
3557 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3558 md_number_to_chars (buf
, value
, 4);
3562 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3564 if (value
< -0x8000 || value
> 0xffff)
3565 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3566 _("value too large for 2-byte field"));
3567 md_number_to_chars (buf
, value
, 2);
3572 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3574 if (value
< -0x80 || value
> 0xff)
3575 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3576 _("value too large for 1-byte field"));
3577 md_number_to_chars (buf
, value
, 1);
3581 case BFD_RELOC_C6000_ABS_S16
:
3582 case BFD_RELOC_C6000_ABS_L16
:
3583 case BFD_RELOC_C6000_SBR_S16
:
3584 case BFD_RELOC_C6000_SBR_L16_B
:
3585 case BFD_RELOC_C6000_SBR_L16_H
:
3586 case BFD_RELOC_C6000_SBR_L16_W
:
3587 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3588 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3590 offsetT newval
= md_chars_to_number (buf
, 4);
3593 switch (fixP
->fx_r_type
)
3595 case BFD_RELOC_C6000_SBR_L16_H
:
3599 case BFD_RELOC_C6000_SBR_L16_W
:
3600 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3609 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3610 if ((value
< -0x8000 || value
> 0x7fff)
3611 && (fixP
->fx_r_type
== BFD_RELOC_C6000_ABS_S16
3612 || fixP
->fx_r_type
== BFD_RELOC_C6000_SBR_S16
))
3613 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3614 _("immediate offset out of range"));
3616 md_number_to_chars (buf
, newval
, 4);
3619 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_S16
3620 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_L16
)
3624 case BFD_RELOC_C6000_ABS_H16
:
3625 case BFD_RELOC_C6000_SBR_H16_B
:
3626 case BFD_RELOC_C6000_SBR_H16_H
:
3627 case BFD_RELOC_C6000_SBR_H16_W
:
3628 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3629 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3631 offsetT newval
= md_chars_to_number (buf
, 4);
3634 switch (fixP
->fx_r_type
)
3636 case BFD_RELOC_C6000_SBR_H16_H
:
3640 case BFD_RELOC_C6000_SBR_H16_W
:
3641 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3650 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3652 md_number_to_chars (buf
, newval
, 4);
3654 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_H16
)
3658 case BFD_RELOC_C6000_SBR_U15_B
:
3659 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3661 offsetT newval
= md_chars_to_number (buf
, 4);
3663 MODIFY_VALUE (newval
, value
, 0, 8, 15);
3664 if (value
< 0 || value
> 0x7fff)
3665 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3666 _("immediate offset out of range"));
3668 md_number_to_chars (buf
, newval
, 4);
3672 case BFD_RELOC_C6000_SBR_U15_H
:
3673 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3675 offsetT newval
= md_chars_to_number (buf
, 4);
3677 /* Constant ADDA operands, processed as constant when the
3678 instruction is parsed, are encoded as-is rather than
3679 shifted. If the operand of an ADDA instruction is now
3680 constant (for example, the difference between two labels
3681 found after the instruction), ensure it is encoded the
3682 same way it would have been if the constant value had
3683 been known when the instruction was parsed. */
3684 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3687 MODIFY_VALUE (newval
, value
, 1, 8, 15);
3689 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3690 _("immediate offset not 2-byte-aligned"));
3691 if (value
< 0 || value
> 0xfffe)
3692 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3693 _("immediate offset out of range"));
3695 md_number_to_chars (buf
, newval
, 4);
3699 case BFD_RELOC_C6000_SBR_U15_W
:
3700 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
3701 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3703 offsetT newval
= md_chars_to_number (buf
, 4);
3705 /* Constant ADDA operands, processed as constant when the
3706 instruction is parsed, are encoded as-is rather than
3707 shifted. If the operand of an ADDA instruction is now
3708 constant (for example, the difference between two labels
3709 found after the instruction), ensure it is encoded the
3710 same way it would have been if the constant value had
3711 been known when the instruction was parsed. */
3712 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3715 MODIFY_VALUE (newval
, value
, 2, 8, 15);
3717 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3718 _("immediate offset not 4-byte-aligned"));
3719 if (value
< 0 || value
> 0x1fffc)
3720 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3721 _("immediate offset out of range"));
3723 md_number_to_chars (buf
, newval
, 4);
3725 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_SBR_U15_W
)
3729 case BFD_RELOC_C6000_DSBT_INDEX
:
3731 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3732 _("addend used with $DSBT_INDEX"));
3737 case BFD_RELOC_C6000_PCR_S21
:
3738 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3740 offsetT newval
= md_chars_to_number (buf
, 4);
3742 MODIFY_VALUE (newval
, value
, 2, 7, 21);
3745 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3746 _("PC-relative offset not 4-byte-aligned"));
3747 if (value
< -0x400000 || value
> 0x3ffffc)
3748 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3749 _("PC-relative offset out of range"));
3751 md_number_to_chars (buf
, newval
, 4);
3755 case BFD_RELOC_C6000_PCR_S12
:
3756 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3758 offsetT newval
= md_chars_to_number (buf
, 4);
3760 MODIFY_VALUE (newval
, value
, 2, 16, 12);
3763 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3764 _("PC-relative offset not 4-byte-aligned"));
3765 if (value
< -0x2000 || value
> 0x1ffc)
3766 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3767 _("PC-relative offset out of range"));
3769 md_number_to_chars (buf
, newval
, 4);
3773 case BFD_RELOC_C6000_PCR_S10
:
3774 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3776 offsetT newval
= md_chars_to_number (buf
, 4);
3778 MODIFY_VALUE (newval
, value
, 2, 13, 10);
3781 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3782 _("PC-relative offset not 4-byte-aligned"));
3783 if (value
< -0x800 || value
> 0x7fc)
3784 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3785 _("PC-relative offset out of range"));
3787 md_number_to_chars (buf
, newval
, 4);
3791 case BFD_RELOC_C6000_PCR_S7
:
3792 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3794 offsetT newval
= md_chars_to_number (buf
, 4);
3796 MODIFY_VALUE (newval
, value
, 2, 16, 7);
3799 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3800 _("PC-relative offset not 4-byte-aligned"));
3801 if (value
< -0x100 || value
> 0xfc)
3802 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3803 _("PC-relative offset out of range"));
3805 md_number_to_chars (buf
, newval
, 4);
3814 /* Convert a floating-point number to target (IEEE) format. */
3817 md_atof (int type
, char *litP
, int *sizeP
)
3819 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3822 /* Adjust the frags in SECTION (see tic6x_end). */
3825 tic6x_adjust_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT section
,
3826 void *dummy ATTRIBUTE_UNUSED
)
3828 segment_info_type
*info
;
3831 bfd_boolean have_code
= FALSE
;
3832 bfd_boolean have_non_code
= FALSE
;
3834 info
= seg_info (section
);
3838 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3839 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3840 switch (fragp
->fr_type
)
3842 case rs_machine_dependent
:
3843 if (fragp
->tc_frag_data
.is_insns
)
3849 if (fragp
->fr_fix
> 0)
3850 have_non_code
= TRUE
;
3854 have_non_code
= TRUE
;
3858 /* Process alignment requirements in a code-only section. */
3859 if (have_code
&& !have_non_code
)
3861 /* If we need to insert an odd number of instructions to meet an
3862 alignment requirement, there must have been an odd number of
3863 instructions since the last 8-byte-aligned execute packet
3864 boundary. So there must have been an execute packet with an
3865 odd number (and so a number fewer than 8) of instructions
3866 into which we can insert a NOP without breaking any previous
3869 If then we need to insert a number 2 mod 4 of instructions,
3870 the number of instructions since the last 16-byte-aligned
3871 execute packet boundary must be 2 mod 4. So between that
3872 boundary and the following 8-byte-aligned boundary there must
3873 either be at least one execute packet with 2-mod-4
3874 instructions, or at least two with an odd number of
3875 instructions; again, greedily inserting NOPs as soon as
3876 possible suffices to meet the alignment requirement.
3878 If then we need to insert 4 instructions, we look between the
3879 last 32-byte-aligned boundary and the following
3880 16-byte-aligned boundary. The sizes of the execute packets
3881 in this range total 4 instructions mod 8, so again there is
3882 room for greedy insertion of NOPs to meet the alignment
3883 requirement, and before any intermediate point with 8-byte
3884 (2-instruction) alignment requirement the sizes of execute
3885 packets (and so the room for NOPs) will total 2 instructions
3886 mod 4 so greedy insertion will not break such alignments.
3888 So we can always meet these alignment requirements by
3889 inserting NOPs in parallel with existing execute packets, and
3890 by induction the approach described above inserts the minimum
3891 number of such NOPs. */
3893 /* The number of NOPs we are currently looking to insert, if we
3894 have gone back to insert NOPs. */
3895 unsigned int want_insert
= 0;
3897 /* Out of that number, the number inserted so far in the current
3898 stage of the above algorithm. */
3899 unsigned int want_insert_done_so_far
= 0;
3901 /* The position mod 32 at the start of the current frag. */
3902 unsigned int pos
= 0;
3904 /* The locations in the frag chain of the most recent frags at
3905 the start of which there is the given alignment. */
3906 frchainS
*frchp_last32
, *frchp_last16
, *frchp_last8
;
3907 fragS
*fragp_last32
, *fragp_last16
, *fragp_last8
;
3908 unsigned int pos_last32
, pos_last16
, pos_last8
;
3910 frchp_last32
= frchp_last16
= frchp_last8
= info
->frchainP
;
3911 fragp_last32
= fragp_last16
= fragp_last8
= info
->frchainP
->frch_root
;
3912 pos_last32
= pos_last16
= pos_last8
= 0;
3914 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3915 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3918 bfd_boolean go_back
= FALSE
;
3919 frchainS
*frchp_next
;
3922 if (fragp
->fr_type
!= rs_machine_dependent
)
3925 if (fragp
->tc_frag_data
.is_insns
3926 && pos
+ fragp
->fr_fix
> 32
3927 && !fragp
->tc_frag_data
.can_cross_fp_boundary
)
3929 /* As described above, we should always have met an
3930 alignment requirement by the time we come back to
3937 want_insert
= (32 - pos
) >> 2;
3938 if (want_insert
> 7)
3940 want_insert_done_so_far
= 0;
3944 if (!fragp
->tc_frag_data
.is_insns
)
3946 unsigned int would_insert_bytes
;
3948 if (!(pos
& ((1 << fragp
->fr_offset
) - 1)))
3949 /* This alignment requirement is already met. */
3952 /* As described above, we should always have met an
3953 alignment requirement by the time we come back to
3958 /* We may not be able to meet this requirement within
3959 the given number of characters. */
3961 = ((1 << fragp
->fr_offset
)
3962 - (pos
& ((1 << fragp
->fr_offset
) - 1)));
3964 if (fragp
->fr_subtype
!= 0
3965 && would_insert_bytes
> fragp
->fr_subtype
)
3968 /* An unmet alignment must be 8, 16 or 32 bytes;
3969 smaller ones must always be met within code-only
3970 sections and larger ones cause the section not to
3972 if (fragp
->fr_offset
!= 3
3973 && fragp
->fr_offset
!= 4
3974 && fragp
->fr_offset
!= 5)
3977 if (would_insert_bytes
& 3)
3979 want_insert
= would_insert_bytes
>> 2;
3980 if (want_insert
> 7)
3982 want_insert_done_so_far
= 0;
3985 else if (want_insert
&& !go_back
)
3987 unsigned int num_insns
= fragp
->fr_fix
>> 2;
3988 unsigned int max_poss_nops
= 8 - num_insns
;
3992 unsigned int cur_want_nops
, max_want_nops
, do_nops
, i
;
3994 if (want_insert
& 1)
3996 else if (want_insert
& 2)
3998 else if (want_insert
& 4)
4003 max_want_nops
= cur_want_nops
- want_insert_done_so_far
;
4005 do_nops
= (max_poss_nops
< max_want_nops
4008 for (i
= 0; i
< do_nops
; i
++)
4010 md_number_to_chars (fragp
->fr_literal
+ fragp
->fr_fix
,
4012 if (target_big_endian
)
4013 fragp
->fr_literal
[fragp
->fr_fix
- 1] |= 0x1;
4015 fragp
->fr_literal
[fragp
->fr_fix
- 4] |= 0x1;
4019 want_insert_done_so_far
+= do_nops
;
4020 if (want_insert_done_so_far
== cur_want_nops
)
4022 want_insert
-= want_insert_done_so_far
;
4023 want_insert_done_so_far
= 0;
4031 if (want_insert
& 1)
4033 frchp
= frchp_last8
;
4034 fragp
= fragp_last8
;
4037 else if (want_insert
& 2)
4039 frchp
= frchp_last8
= frchp_last16
;
4040 fragp
= fragp_last8
= fragp_last16
;
4041 pos
= pos_last8
= pos_last16
;
4043 else if (want_insert
& 4)
4045 frchp
= frchp_last8
= frchp_last16
= frchp_last32
;
4046 fragp
= fragp_last8
= fragp_last16
= fragp_last32
;
4047 pos
= pos_last8
= pos_last16
= pos_last32
;
4055 /* Update current position for moving past a code
4057 pos
+= fragp
->fr_fix
;
4060 fragp_next
= fragp
->fr_next
;
4061 if (fragp_next
== NULL
)
4063 frchp_next
= frchp
->frch_next
;
4064 if (frchp_next
!= NULL
)
4065 fragp_next
= frchp_next
->frch_root
;
4069 frchp_last8
= frchp_next
;
4070 fragp_last8
= fragp_next
;
4075 frchp_last16
= frchp_next
;
4076 fragp_last16
= fragp_next
;
4081 frchp_last32
= frchp_next
;
4082 fragp_last32
= fragp_next
;
4088 /* Now convert the machine-dependent frags to machine-independent
4090 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
4091 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
4093 if (fragp
->fr_type
== rs_machine_dependent
)
4095 if (fragp
->tc_frag_data
.is_insns
)
4099 fragp
->fr_type
= rs_align_code
;
4101 *fragp
->fr_literal
= 0;
4107 /* Initialize the machine-dependent parts of a frag. */
4110 tic6x_frag_init (fragS
*fragp
)
4112 fragp
->tc_frag_data
.is_insns
= FALSE
;
4113 fragp
->tc_frag_data
.can_cross_fp_boundary
= FALSE
;
4116 /* Set an attribute if it has not already been set by the user. */
4119 tic6x_set_attribute_int (int tag
, int value
)
4122 || tag
>= NUM_KNOWN_OBJ_ATTRIBUTES
)
4124 if (!tic6x_attributes_set_explicitly
[tag
])
4125 bfd_elf_add_proc_attr_int (stdoutput
, tag
, value
);
4128 /* Set object attributes deduced from the input file and command line
4129 rather than given explicitly. */
4131 tic6x_set_attributes (void)
4133 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
4134 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
4136 tic6x_set_attribute_int (Tag_ISA
, tic6x_arch_attribute
);
4137 tic6x_set_attribute_int (Tag_ABI_DSBT
, tic6x_dsbt
);
4138 tic6x_set_attribute_int (Tag_ABI_PID
, tic6x_pid
);
4139 tic6x_set_attribute_int (Tag_ABI_PIC
, tic6x_pic
);
4142 /* Do machine-dependent manipulations of the frag chains after all
4143 input has been read and before the machine-independent sizing and
4149 /* Set object attributes at this point if not explicitly set. */
4150 tic6x_set_attributes ();
4152 /* Meeting alignment requirements may require inserting NOPs in
4153 parallel in execute packets earlier in the segment. Future
4154 16-bit instruction generation involves whole-segment optimization
4155 to determine the best choice and ordering of 32-bit or 16-bit
4156 instructions. This doesn't fit will in the general relaxation
4157 framework, so handle alignment and 16-bit instruction generation
4159 bfd_map_over_sections (stdoutput
, tic6x_adjust_section
, NULL
);
4162 /* No machine-dependent frags at this stage; all converted in
4166 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT asec ATTRIBUTE_UNUSED
,
4167 fragS
*fragp ATTRIBUTE_UNUSED
)
4172 /* No machine-dependent frags at this stage; all converted in
4176 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
4177 segT seg ATTRIBUTE_UNUSED
)
4182 /* Put a number into target byte order. */
4185 md_number_to_chars (char *buf
, valueT val
, int n
)
4187 if (target_big_endian
)
4188 number_to_chars_bigendian (buf
, val
, n
);
4190 number_to_chars_littleendian (buf
, val
, n
);
4193 /* Machine-dependent operand parsing not currently needed. */
4196 md_operand (expressionS
*op ATTRIBUTE_UNUSED
)
4200 /* PC-relative operands are relative to the start of the fetch
4204 tic6x_pcrel_from_section (fixS
*fixp
, segT sec
)
4206 if (fixp
->fx_addsy
!= NULL
4207 && (!S_IS_DEFINED (fixp
->fx_addsy
)
4208 || S_GET_SEGMENT (fixp
->fx_addsy
) != sec
))
4210 return (fixp
->fx_where
+ fixp
->fx_frag
->fr_address
) & ~(long) 0x1f;
4213 /* Round up a section size to the appropriate boundary. */
4216 md_section_align (segT segment ATTRIBUTE_UNUSED
,
4219 /* Round up section sizes to ensure that text sections consist of
4220 whole fetch packets. */
4221 int align
= bfd_get_section_alignment (stdoutput
, segment
);
4222 return ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4225 /* No special undefined symbol handling needed for now. */
4228 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4233 /* Translate internal representation of relocation info to BFD target
4237 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4241 bfd_reloc_code_real_type r_type
;
4243 reloc
= xmalloc (sizeof (arelent
));
4244 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
4245 symbol
= symbol_get_bfdsym (fixp
->fx_addsy
);
4246 *reloc
->sym_ptr_ptr
= symbol
;
4247 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4248 reloc
->addend
= (tic6x_generate_rela
? fixp
->fx_offset
: 0);
4249 r_type
= fixp
->fx_r_type
;
4250 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4252 if (reloc
->howto
== NULL
)
4254 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4255 _("Cannot represent relocation type %s"),
4256 bfd_get_reloc_code_name (r_type
));
4260 /* Correct for adjustments bfd_install_relocation will make. */
4261 if (reloc
->howto
->pcrel_offset
&& reloc
->howto
->partial_inplace
)
4263 reloc
->addend
+= reloc
->address
;
4264 if (!bfd_is_com_section (symbol
))
4265 reloc
->addend
-= symbol
->value
;