3 Free Software Foundation, Inc.
4 Contributed by Joseph Myers <joseph@codesourcery.com>
5 Bernd Schmidt <bernds@codesourcery.com>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "dwarf2dbg.h"
26 #include "safe-ctype.h"
28 #include "opcode/tic6x.h"
29 #include "elf/tic6x.h"
30 #include "elf32-tic6x.h"
32 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
37 /* Stuff for .scomm symbols. */
38 static segT sbss_section
;
39 static asection scom_section
;
40 static asymbol scom_symbol
;
42 const char comment_chars
[] = ";";
43 const char line_comment_chars
[] = "#*;";
44 const char line_separator_chars
[] = "@";
46 const char EXP_CHARS
[] = "eE";
47 const char FLT_CHARS
[] = "dDfF";
49 const char *md_shortopts
= "";
53 OPTION_MARCH
= OPTION_MD_BASE
,
55 OPTION_MLITTLE_ENDIAN
,
64 struct option md_longopts
[] =
66 { "march", required_argument
, NULL
, OPTION_MARCH
},
67 { "mbig-endian", no_argument
, NULL
, OPTION_MBIG_ENDIAN
},
68 { "mlittle-endian", no_argument
, NULL
, OPTION_MLITTLE_ENDIAN
},
69 { "mdsbt", no_argument
, NULL
, OPTION_MDSBT
},
70 { "mno-dsbt", no_argument
, NULL
, OPTION_MNO_DSBT
},
71 { "mpid", required_argument
, NULL
, OPTION_MPID
},
72 { "mpic", no_argument
, NULL
, OPTION_MPIC
},
73 { "mno-pic", no_argument
, NULL
, OPTION_MNO_PIC
},
74 { "mgenerate-rel", no_argument
, NULL
, OPTION_MGENERATE_REL
},
75 { NULL
, no_argument
, NULL
, 0 }
77 size_t md_longopts_size
= sizeof (md_longopts
);
79 /* The instructions enabled based only on the selected architecture
80 (all instructions, if no architecture specified). */
81 static unsigned short tic6x_arch_enable
= (TIC6X_INSN_C62X
88 /* The instructions enabled based on the current set of features
89 (architecture, as modified by other options). */
90 static unsigned short tic6x_features
;
92 /* The architecture attribute value, or C6XABI_Tag_ISA_none if
94 static int tic6x_arch_attribute
= C6XABI_Tag_ISA_none
;
96 /* Whether any instructions at all have been seen. Once any
97 instructions have been seen, architecture attributes merge into the
98 previous attribute value rather than replacing it. */
99 static bfd_boolean tic6x_seen_insns
= FALSE
;
101 /* The number of registers in each register file supported by the
102 current architecture. */
103 static unsigned int tic6x_num_registers
;
105 /* Whether predication on A0 is possible. */
106 static bfd_boolean tic6x_predicate_a0
;
108 /* Whether execute packets can cross fetch packet boundaries. */
109 static bfd_boolean tic6x_can_cross_fp_boundary
;
111 /* Whether there are constraints on simultaneous reads and writes of
113 static bfd_boolean tic6x_long_data_constraints
;
115 /* Whether compact instructions are available. */
116 static bfd_boolean tic6x_compact_insns
;
118 /* Whether to generate RELA relocations. */
119 static bfd_boolean tic6x_generate_rela
= TRUE
;
121 /* Whether the code uses DSBT addressing. */
122 static bfd_boolean tic6x_dsbt
;
124 /* Types of position-independent data (attribute values for
133 /* The type of data addressing used in this code. */
134 static tic6x_pid_type tic6x_pid
;
136 /* Whether the code uses position-independent code. */
137 static bfd_boolean tic6x_pic
;
139 /* Table of supported architecture variants. */
144 unsigned short features
;
146 static const tic6x_arch_table tic6x_arches
[] =
148 { "c62x", C6XABI_Tag_ISA_C62X
, TIC6X_INSN_C62X
},
149 { "c64x", C6XABI_Tag_ISA_C64X
, TIC6X_INSN_C62X
| TIC6X_INSN_C64X
},
150 { "c64x+", C6XABI_Tag_ISA_C64XP
, (TIC6X_INSN_C62X
152 | TIC6X_INSN_C64XP
) },
153 { "c67x", C6XABI_Tag_ISA_C67X
, TIC6X_INSN_C62X
| TIC6X_INSN_C67X
},
154 { "c67x+", C6XABI_Tag_ISA_C67XP
, (TIC6X_INSN_C62X
156 | TIC6X_INSN_C67XP
) },
157 { "c674x", C6XABI_Tag_ISA_C674X
, (TIC6X_INSN_C62X
162 | TIC6X_INSN_C674X
) }
165 /* Update the selected architecture based on ARCH, giving an error if
166 ARCH is an invalid value. Does not call tic6x_update_features; the
167 caller must do that if necessary. */
170 tic6x_use_arch (const char *arch
)
174 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
175 if (strcmp (arch
, tic6x_arches
[i
].arch
) == 0)
177 tic6x_arch_enable
= tic6x_arches
[i
].features
;
178 if (tic6x_seen_insns
)
180 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute
,
181 tic6x_arches
[i
].attr
);
183 tic6x_arch_attribute
= tic6x_arches
[i
].attr
;
187 as_bad (_("unknown architecture '%s'"), arch
);
190 /* Table of supported -mpid arguments. */
195 } tic6x_pid_type_table
;
196 static const tic6x_pid_type_table tic6x_pid_types
[] =
198 { "no", tic6x_pid_no
},
199 { "near", tic6x_pid_near
},
200 { "far", tic6x_pid_far
}
203 /* Handle -mpid=ARG. */
206 tic6x_use_pid (const char *arg
)
210 for (i
= 0; i
< ARRAY_SIZE (tic6x_pid_types
); i
++)
211 if (strcmp (arg
, tic6x_pid_types
[i
].arg
) == 0)
213 tic6x_pid
= tic6x_pid_types
[i
].attr
;
217 as_bad (_("unknown -mpid= argument '%s'"), arg
);
220 /* Parse a target-specific option. */
223 md_parse_option (int c
, char *arg
)
228 tic6x_use_arch (arg
);
231 case OPTION_MBIG_ENDIAN
:
232 target_big_endian
= 1;
235 case OPTION_MLITTLE_ENDIAN
:
236 target_big_endian
= 0;
243 case OPTION_MNO_DSBT
:
259 case OPTION_MGENERATE_REL
:
260 tic6x_generate_rela
= FALSE
;
270 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
274 fputc ('\n', stream
);
275 fprintf (stream
, _("TMS320C6000 options:\n"));
276 fprintf (stream
, _(" -march=ARCH enable instructions from architecture ARCH\n"));
277 fprintf (stream
, _(" -mbig-endian generate big-endian code\n"));
278 fprintf (stream
, _(" -mlittle-endian generate little-endian code\n"));
279 fprintf (stream
, _(" -mdsbt code uses DSBT addressing\n"));
280 fprintf (stream
, _(" -mno-dsbt code does not use DSBT addressing\n"));
281 fprintf (stream
, _(" -mpid=no code uses position-dependent data addressing\n"));
282 fprintf (stream
, _(" -mpid=near code uses position-independent data addressing,\n"
283 " GOT accesses use near DP addressing\n"));
284 fprintf (stream
, _(" -mpid=far code uses position-independent data addressing,\n"
285 " GOT accesses use far DP addressing\n"));
286 fprintf (stream
, _(" -mpic code addressing is position-independent\n"));
287 fprintf (stream
, _(" -mno-pic code addressing is position-dependent\n"));
288 /* -mgenerate-rel is only for testsuite use and is deliberately
291 fputc ('\n', stream
);
292 fprintf (stream
, _("Supported ARCH values are:"));
293 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
294 fprintf (stream
, " %s", tic6x_arches
[i
].arch
);
295 fputc ('\n', stream
);
298 /* Update enabled features based on the current architecture and
301 tic6x_update_features (void)
303 tic6x_features
= tic6x_arch_enable
;
306 = (tic6x_arch_enable
& (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? 32 : 16;
308 tic6x_predicate_a0
= (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? TRUE
: FALSE
;
310 tic6x_can_cross_fp_boundary
312 & (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? TRUE
: FALSE
;
314 tic6x_long_data_constraints
315 = (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? FALSE
: TRUE
;
317 tic6x_compact_insns
= (tic6x_arch_enable
& TIC6X_INSN_C64XP
) ? TRUE
: FALSE
;
320 /* Do configuration after all options have been parsed. */
323 tic6x_after_parse_args (void)
325 tic6x_update_features ();
328 /* Parse a .arch directive. */
331 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED
)
336 arch
= input_line_pointer
;
337 while (*input_line_pointer
&& !ISSPACE (*input_line_pointer
))
338 input_line_pointer
++;
339 c
= *input_line_pointer
;
340 *input_line_pointer
= 0;
342 tic6x_use_arch (arch
);
343 tic6x_update_features ();
344 *input_line_pointer
= c
;
345 demand_empty_rest_of_line ();
348 /* Parse a .nocmp directive. */
351 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED
)
353 seg_info (now_seg
)->tc_segment_info_data
.nocmp
= TRUE
;
354 demand_empty_rest_of_line ();
357 /* .scomm pseudo-op handler.
359 This is a new pseudo-op to handle putting objects in .scommon.
360 By doing this the linker won't need to do any work,
361 and more importantly it removes the implicit -G arg necessary to
362 correctly link the object file. */
365 s_tic6x_scomm (int ignore ATTRIBUTE_UNUSED
)
375 name
= input_line_pointer
;
376 c
= get_symbol_end ();
378 /* Just after name is now '\0'. */
379 p
= input_line_pointer
;
382 if (*input_line_pointer
!= ',')
384 as_bad (_("expected comma after symbol name"));
385 ignore_rest_of_line ();
390 input_line_pointer
++;
391 if ((size
= get_absolute_expression ()) < 0)
393 /* xgettext:c-format */
394 as_warn (_("invalid length for .scomm directive"));
395 ignore_rest_of_line ();
399 /* The third argument to .scomm is the alignment. */
400 if (*input_line_pointer
!= ',')
404 ++input_line_pointer
;
405 align
= get_absolute_expression ();
408 as_warn (_("alignment is not a positive number"));
413 /* Convert to a power of 2 alignment. */
416 for (align2
= 0; (align
& 1) == 0; align
>>= 1, ++align2
)
420 as_bad (_("alignment is not a power of 2"));
421 ignore_rest_of_line ();
429 symbolP
= symbol_find_or_make (name
);
432 if (S_IS_DEFINED (symbolP
))
434 /* xgettext:c-format */
435 as_bad (_("attempt to re-define symbol `%s'"),
436 S_GET_NAME (symbolP
));
437 ignore_rest_of_line ();
441 if (S_GET_VALUE (symbolP
) && S_GET_VALUE (symbolP
) != (valueT
) size
)
443 /* xgettext:c-format */
444 as_bad (_("attempt to redefine `%s' with a different length"),
445 S_GET_NAME (symbolP
));
447 ignore_rest_of_line ();
451 if (symbol_get_obj (symbolP
)->local
)
453 segT old_sec
= now_seg
;
454 int old_subsec
= now_subseg
;
457 record_alignment (sbss_section
, align2
);
458 subseg_set (sbss_section
, 0);
461 frag_align (align2
, 0, 0);
463 if (S_GET_SEGMENT (symbolP
) == sbss_section
)
464 symbol_get_frag (symbolP
)->fr_symbol
= 0;
466 symbol_set_frag (symbolP
, frag_now
);
468 pfrag
= frag_var (rs_org
, 1, 1, (relax_substateT
) 0, symbolP
, size
,
471 S_SET_SIZE (symbolP
, size
);
472 S_SET_SEGMENT (symbolP
, sbss_section
);
473 S_CLEAR_EXTERNAL (symbolP
);
474 subseg_set (old_sec
, old_subsec
);
478 S_SET_VALUE (symbolP
, (valueT
) size
);
479 S_SET_ALIGN (symbolP
, 1 << align2
);
480 S_SET_EXTERNAL (symbolP
);
481 S_SET_SEGMENT (symbolP
, &scom_section
);
484 symbol_get_bfdsym (symbolP
)->flags
|= BSF_OBJECT
;
486 demand_empty_rest_of_line ();
489 /* Track for each attribute whether it has been set explicitly (and so
490 should not have a default value set by the assembler). */
491 static bfd_boolean tic6x_attributes_set_explicitly
[NUM_KNOWN_OBJ_ATTRIBUTES
];
493 /* Parse a .c6xabi_attribute directive. */
496 s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED
)
498 int tag
= s_vendor_attribute (OBJ_ATTR_PROC
);
500 if (tag
< NUM_KNOWN_OBJ_ATTRIBUTES
)
501 tic6x_attributes_set_explicitly
[tag
] = TRUE
;
508 } tic6x_attribute_table
;
510 static const tic6x_attribute_table tic6x_attributes
[] =
512 #define TAG(tag, value) { #tag, tag },
513 #include "elf/tic6x-attrs.h"
517 /* Convert an attribute name to a number. */
520 tic6x_convert_symbolic_attribute (const char *name
)
524 for (i
= 0; i
< ARRAY_SIZE (tic6x_attributes
); i
++)
525 if (strcmp (name
, tic6x_attributes
[i
].name
) == 0)
526 return tic6x_attributes
[i
].tag
;
531 const pseudo_typeS md_pseudo_table
[] =
533 { "arch", s_tic6x_arch
, 0 },
534 { "c6xabi_attribute", s_tic6x_c6xabi_attribute
, 0 },
535 { "nocmp", s_tic6x_nocmp
, 0 },
536 { "scomm", s_tic6x_scomm
, 0 },
541 /* Hash table of opcodes. For each opcode name, this stores a pointer
542 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
543 table entries with that name. */
544 static struct hash_control
*opcode_hash
;
546 /* Initialize the assembler (called once at assembler startup). */
556 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, 0);
558 /* Insert opcodes into the hash table. */
559 opcode_hash
= hash_new ();
560 for (id
= 0; id
< tic6x_opcode_max
; id
++)
563 tic6x_opcode_list
*opc
= xmalloc (sizeof (tic6x_opcode_list
));
566 opc
->next
= hash_find (opcode_hash
, tic6x_opcode_table
[id
].name
);
567 if ((errmsg
= hash_jam (opcode_hash
, tic6x_opcode_table
[id
].name
, opc
))
569 as_fatal ("%s", _(errmsg
));
572 /* Save the current subseg so we can restore it [it's the default one and
573 we don't want the initial section to be .sbss]. */
577 /* The sbss section is for local .scomm symbols. */
578 sbss_section
= subseg_new (".bss", 0);
579 seg_info (sbss_section
)->bss
= 1;
581 /* This is copied from perform_an_assembly_pass. */
582 applicable
= bfd_applicable_section_flags (stdoutput
);
583 bfd_set_section_flags (stdoutput
, sbss_section
, applicable
& SEC_ALLOC
);
585 subseg_set (seg
, subseg
);
587 /* We must construct a fake section similar to bfd_com_section
588 but with the name .scommon. */
589 scom_section
= bfd_com_section
;
590 scom_section
.name
= ".scommon";
591 scom_section
.output_section
= & scom_section
;
592 scom_section
.symbol
= & scom_symbol
;
593 scom_section
.symbol_ptr_ptr
= & scom_section
.symbol
;
594 scom_symbol
= * bfd_com_section
.symbol
;
595 scom_symbol
.name
= ".scommon";
596 scom_symbol
.section
= & scom_section
;
599 /* Whether the current line being parsed had the "||" parallel bars. */
600 static bfd_boolean tic6x_line_parallel
;
602 /* Whether the current line being parsed started "||^" to indicate an
603 SPMASKed parallel instruction. */
604 static bfd_boolean tic6x_line_spmask
;
606 /* If the current line being parsed had an instruction predicate, the
607 creg value for that predicate (which must be nonzero); otherwise
609 static unsigned int tic6x_line_creg
;
611 /* If the current line being parsed had an instruction predicate, the
612 z value for that predicate; otherwise 0. */
613 static unsigned int tic6x_line_z
;
615 /* Return 1 (updating input_line_pointer as appropriate) if the line
616 starting with C (immediately before input_line_pointer) starts with
617 pre-opcode text appropriate for this target, 0 otherwise. */
620 tic6x_unrecognized_line (int c
)
625 bfd_boolean bad_predicate
;
630 if (input_line_pointer
[0] == '|')
632 if (input_line_pointer
[1] == '^')
634 tic6x_line_spmask
= TRUE
;
635 input_line_pointer
+= 2;
638 input_line_pointer
+= 1;
639 if (tic6x_line_parallel
)
640 as_bad (_("multiple '||' on same line"));
641 tic6x_line_parallel
= TRUE
;
643 as_bad (_("'||' after predicate"));
649 /* If it doesn't look like a predicate at all, just return 0.
650 If it looks like one but not a valid one, give a better
652 p
= input_line_pointer
;
653 while (*p
!= ']' && !is_end_of_line
[(unsigned char) *p
])
658 p
= input_line_pointer
;
660 bad_predicate
= FALSE
;
666 if (*p
== 'A' || *p
== 'a')
668 else if (*p
== 'B' || *p
== 'b')
672 areg
= TRUE
; /* Avoid uninitialized warning. */
673 bad_predicate
= TRUE
;
678 if (*p
!= '0' && *p
!= '1' && *p
!= '2')
679 bad_predicate
= TRUE
;
680 else if (p
[1] != ']')
681 bad_predicate
= TRUE
;
683 input_line_pointer
= p
+ 2;
687 as_bad (_("multiple predicates on same line"));
693 as_bad (_("bad predicate '%s'"), input_line_pointer
- 1);
695 input_line_pointer
= endp
;
702 tic6x_line_creg
= (areg
? 6 : 1);
703 if (areg
&& !tic6x_predicate_a0
)
704 as_bad (_("predication on A0 not supported on this architecture"));
708 tic6x_line_creg
= (areg
? 4 : 2);
712 tic6x_line_creg
= (areg
? 5 : 3);
727 /* Do any target-specific handling of a label required. */
730 tic6x_frob_label (symbolS
*sym
)
732 segment_info_type
*si
;
733 tic6x_label_list
*list
;
735 if (tic6x_line_parallel
)
737 as_bad (_("label after '||'"));
738 tic6x_line_parallel
= FALSE
;
739 tic6x_line_spmask
= FALSE
;
743 as_bad (_("label after predicate"));
748 si
= seg_info (now_seg
);
749 list
= si
->tc_segment_info_data
.label_list
;
750 si
->tc_segment_info_data
.label_list
= xmalloc (sizeof (tic6x_label_list
));
751 si
->tc_segment_info_data
.label_list
->next
= list
;
752 si
->tc_segment_info_data
.label_list
->label
= sym
;
754 /* Defining tc_frob_label overrides the ELF definition of
755 obj_frob_label, so we need to apply its effects here. */
756 dwarf2_emit_label (sym
);
759 /* At end-of-line, give errors for start-of-line decorations that
760 needed an instruction but were not followed by one. */
763 tic6x_end_of_line (void)
765 if (tic6x_line_parallel
)
767 as_bad (_("'||' not followed by instruction"));
768 tic6x_line_parallel
= FALSE
;
769 tic6x_line_spmask
= FALSE
;
773 as_bad (_("predicate not followed by instruction"));
779 /* Do any target-specific handling of the start of a logical line. */
782 tic6x_start_line_hook (void)
784 tic6x_end_of_line ();
787 /* Do target-specific handling immediately after an input file from
788 the command line, and any other inputs it includes, have been
794 tic6x_end_of_line ();
797 /* Do target-specific initialization after arguments have been
798 processed and the output file created. */
801 tic6x_init_after_args (void)
803 elf32_tic6x_set_use_rela_p (stdoutput
, tic6x_generate_rela
);
806 /* Free LIST of labels (possibly NULL). */
809 tic6x_free_label_list (tic6x_label_list
*list
)
813 tic6x_label_list
*old
= list
;
820 /* Handle a data alignment of N bytes. */
823 tic6x_cons_align (int n ATTRIBUTE_UNUSED
)
825 segment_info_type
*seginfo
= seg_info (now_seg
);
827 /* Data means there is no current execute packet, and that any label
828 applies to that data rather than a subsequent instruction. */
829 tic6x_free_label_list (seginfo
->tc_segment_info_data
.label_list
);
830 seginfo
->tc_segment_info_data
.label_list
= NULL
;
831 seginfo
->tc_segment_info_data
.execute_packet_frag
= NULL
;
832 seginfo
->tc_segment_info_data
.last_insn_lsb
= NULL
;
833 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
834 seginfo
->tc_segment_info_data
.func_units_used
= 0;
837 /* Handle an alignment directive. Return TRUE if the
838 machine-independent frag generation should be skipped. */
841 tic6x_do_align (int n
, char *fill
, int len ATTRIBUTE_UNUSED
, int max
)
843 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
844 them in the md_end pass by inserting NOPs in parallel with
845 previous instructions. We only do this in sections containing
846 nothing but instructions. Code alignments of 1 or 2 bytes have
847 no effect in such sections (but we record them with
848 machine-dependent frags anyway so they can be skipped or
849 converted to machine-independent), while those of more than 64
850 bytes cannot reliably be handled in this way. */
856 && subseg_text_p (now_seg
))
864 /* Machine-independent code would generate a frag here, but we
865 wish to handle it in a machine-dependent way. */
866 if (frag_now_fix () != 0)
868 if (frag_now
->fr_type
!= rs_machine_dependent
)
869 frag_wane (frag_now
);
874 align_frag
= frag_now
;
875 p
= frag_var (rs_machine_dependent
, 32, 32, max
, NULL
, n
, NULL
);
876 /* This must be the same as the frag to which a pointer was just
878 if (p
!= align_frag
->fr_literal
)
880 align_frag
->tc_frag_data
.is_insns
= FALSE
;
887 /* Types of operand for parsing purposes. These are used as bit-masks
888 to tell tic6x_parse_operand what forms of operand are
890 #define TIC6X_OP_EXP 0x0001u
891 #define TIC6X_OP_REG 0x0002u
892 #define TIC6X_OP_REGPAIR 0x0004u
893 #define TIC6X_OP_IRP 0x0008u
894 #define TIC6X_OP_NRP 0x0010u
895 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
896 interpreted as an expression, which may be a symbol with the same
897 name as a register that ends up being implicitly DP-relative. With
898 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
899 a register if they match one, and failing that as an expression,
900 which must be constant. */
901 #define TIC6X_OP_MEM_NOUNREG 0x0020u
902 #define TIC6X_OP_MEM_UNREG 0x0040u
903 #define TIC6X_OP_CTRL 0x0080u
904 #define TIC6X_OP_FUNC_UNIT 0x0100u
906 /* A register or register pair read by the assembler. */
909 /* The side the register is on (1 or 2). */
911 /* The register number (0 to 31). */
915 /* Types of modification of a base address. */
921 tic6x_mem_mod_preinc
,
922 tic6x_mem_mod_predec
,
923 tic6x_mem_mod_postinc
,
924 tic6x_mem_mod_postdec
927 /* Scaled [] or unscaled () nature of an offset. */
932 tic6x_offset_unscaled
935 /* A memory operand read by the assembler. */
938 /* The base register. */
939 tic6x_register base_reg
;
940 /* How the base register is modified. */
942 /* Whether there is an offset (required with plain "+" and "-"), and
943 whether it is scaled or unscaled if so. */
944 tic6x_mem_scaling scaled
;
945 /* Whether the offset is a register (TRUE) or an expression
947 bfd_boolean offset_is_reg
;
956 /* A functional unit in SPMASK operands read by the assembler. */
959 /* The basic unit. */
960 tic6x_func_unit_base base
;
961 /* The side (1 or 2). */
963 } tic6x_func_unit_operand
;
965 /* An operand read by the assembler. */
968 /* The syntactic form of the operand, as one of the bit-masks
971 /* The operand value. */
974 /* An expression: TIC6X_OP_EXP. */
976 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
978 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
979 TIC6X_OP_MEM_UNREG. */
981 /* A control register: TIC6X_OP_CTRL. */
983 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
984 tic6x_func_unit_operand func_unit
;
988 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
990 /* Parse a register operand, or part of an operand, starting at *P.
991 If syntactically OK (including that the number is in the range 0 to
992 31, but not necessarily in range for this architecture), return
993 TRUE, putting the register side and number in *REG and update *P to
994 point immediately after the register number; otherwise return FALSE
995 without changing *P (but possibly changing *REG). Do not print any
999 tic6x_parse_register (char **p
, tic6x_register
*reg
)
1020 if (*r
>= '0' && *r
<= '9')
1022 reg
->num
= *r
- '0';
1028 if (reg
->num
> 0 && *r
>= '0' && *r
<= '9')
1030 reg
->num
= reg
->num
* 10 + (*r
- '0');
1034 if (*r
>= '0' && *r
<= '9')
1043 /* Parse the initial two characters of a functional unit name starting
1044 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
1048 tic6x_parse_func_unit_base (char *p
, tic6x_func_unit_base
*base
,
1051 bfd_boolean good_func_unit
= TRUE
;
1052 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
1053 unsigned int maybe_side
= 0;
1059 maybe_base
= tic6x_func_unit_d
;
1064 maybe_base
= tic6x_func_unit_l
;
1069 maybe_base
= tic6x_func_unit_m
;
1074 maybe_base
= tic6x_func_unit_s
;
1078 good_func_unit
= FALSE
;
1094 good_func_unit
= FALSE
;
1104 return good_func_unit
;
1107 /* Parse an operand starting at *P. If the operand parses OK, return
1108 TRUE and store the value in *OP; otherwise return FALSE (possibly
1109 changing *OP). In any case, update *P to point to the following
1110 comma or end of line. The possible operand forms are given by
1111 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
1112 starting at STR, length OPC_LEN. */
1115 tic6x_parse_operand (char **p
, tic6x_operand
*op
, unsigned int op_forms
,
1116 char *str
, int opc_len
, unsigned int opno
)
1118 bfd_boolean operand_parsed
= FALSE
;
1121 if ((op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
1122 == (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
1125 /* Check for functional unit names for SPMASK and SPMASKR. */
1126 if (!operand_parsed
&& (op_forms
& TIC6X_OP_FUNC_UNIT
))
1128 tic6x_func_unit_base base
= tic6x_func_unit_nfu
;
1129 unsigned int side
= 0;
1131 if (tic6x_parse_func_unit_base (q
, &base
, &side
))
1135 skip_whitespace (rq
);
1136 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1138 op
->form
= TIC6X_OP_FUNC_UNIT
;
1139 op
->value
.func_unit
.base
= base
;
1140 op
->value
.func_unit
.side
= side
;
1141 operand_parsed
= TRUE
;
1147 /* Check for literal "irp". */
1148 if (!operand_parsed
&& (op_forms
& TIC6X_OP_IRP
))
1150 if ((q
[0] == 'i' || q
[0] == 'I')
1151 && (q
[1] == 'r' || q
[1] == 'R')
1152 && (q
[2] == 'p' || q
[2] == 'P'))
1156 skip_whitespace (rq
);
1157 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1159 op
->form
= TIC6X_OP_IRP
;
1160 operand_parsed
= TRUE
;
1166 /* Check for literal "nrp". */
1167 if (!operand_parsed
&& (op_forms
& TIC6X_OP_NRP
))
1169 if ((q
[0] == 'n' || q
[0] == 'N')
1170 && (q
[1] == 'r' || q
[1] == 'R')
1171 && (q
[2] == 'p' || q
[2] == 'P'))
1175 skip_whitespace (rq
);
1176 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1178 op
->form
= TIC6X_OP_NRP
;
1179 operand_parsed
= TRUE
;
1185 /* Check for control register names. */
1186 if (!operand_parsed
&& (op_forms
& TIC6X_OP_CTRL
))
1190 for (crid
= 0; crid
< tic6x_ctrl_max
; crid
++)
1192 size_t len
= strlen (tic6x_ctrl_table
[crid
].name
);
1194 if (strncasecmp (tic6x_ctrl_table
[crid
].name
, q
, len
) == 0)
1198 skip_whitespace (rq
);
1199 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1201 op
->form
= TIC6X_OP_CTRL
;
1202 op
->value
.ctrl
= crid
;
1203 operand_parsed
= TRUE
;
1205 if (!(tic6x_ctrl_table
[crid
].isa_variants
& tic6x_features
))
1206 as_bad (_("control register '%s' not supported "
1207 "on this architecture"),
1208 tic6x_ctrl_table
[crid
].name
);
1214 /* See if this looks like a memory reference. */
1216 && (op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
)))
1218 bfd_boolean mem_ok
= TRUE
;
1220 tic6x_mem_mod mem_mod
= tic6x_mem_mod_none
;
1221 tic6x_register base_reg
;
1222 bfd_boolean require_offset
, permit_offset
;
1223 tic6x_mem_scaling scaled
;
1224 bfd_boolean offset_is_reg
;
1225 expressionS offset_exp
;
1226 tic6x_register offset_reg
;
1235 skip_whitespace (mq
);
1241 mem_mod
= tic6x_mem_mod_preinc
;
1246 mem_mod
= tic6x_mem_mod_plus
;
1254 mem_mod
= tic6x_mem_mod_predec
;
1259 mem_mod
= tic6x_mem_mod_minus
;
1271 skip_whitespace (mq
);
1272 mem_ok
= tic6x_parse_register (&mq
, &base_reg
);
1275 if (mem_ok
&& mem_mod
== tic6x_mem_mod_none
)
1277 skip_whitespace (mq
);
1278 if (mq
[0] == '+' && mq
[1] == '+')
1280 mem_mod
= tic6x_mem_mod_postinc
;
1283 else if (mq
[0] == '-' && mq
[1] == '-')
1285 mem_mod
= tic6x_mem_mod_postdec
;
1290 if (mem_mod
== tic6x_mem_mod_none
)
1291 permit_offset
= FALSE
;
1293 permit_offset
= TRUE
;
1294 if (mem_mod
== tic6x_mem_mod_plus
|| mem_mod
== tic6x_mem_mod_minus
)
1295 require_offset
= TRUE
;
1297 require_offset
= FALSE
;
1298 scaled
= tic6x_offset_none
;
1299 offset_is_reg
= FALSE
;
1301 if (mem_ok
&& permit_offset
)
1305 skip_whitespace (mq
);
1309 scaled
= tic6x_offset_scaled
;
1315 scaled
= tic6x_offset_unscaled
;
1323 if (scaled
!= tic6x_offset_none
)
1325 skip_whitespace (mq
);
1326 if (scaled
== tic6x_offset_scaled
1327 || (op_forms
& TIC6X_OP_MEM_UNREG
))
1332 reg_ok
= tic6x_parse_register (&rq
, &offset_reg
);
1335 skip_whitespace (rq
);
1339 offset_is_reg
= TRUE
;
1345 char *save_input_line_pointer
;
1347 save_input_line_pointer
= input_line_pointer
;
1348 input_line_pointer
= mq
;
1349 expression (&offset_exp
);
1350 mq
= input_line_pointer
;
1351 input_line_pointer
= save_input_line_pointer
;
1353 skip_whitespace (mq
);
1361 if (mem_ok
&& require_offset
&& scaled
== tic6x_offset_none
)
1366 skip_whitespace (mq
);
1367 if (!is_end_of_line
[(unsigned char) *mq
] && *mq
!= ',')
1373 op
->form
= op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
);
1374 op
->value
.mem
.base_reg
= base_reg
;
1375 op
->value
.mem
.mod
= mem_mod
;
1376 op
->value
.mem
.scaled
= scaled
;
1377 op
->value
.mem
.offset_is_reg
= offset_is_reg
;
1379 op
->value
.mem
.offset
.reg
= offset_reg
;
1381 op
->value
.mem
.offset
.exp
= offset_exp
;
1382 operand_parsed
= TRUE
;
1384 if (base_reg
.num
>= tic6x_num_registers
)
1385 as_bad (_("register number %u not supported on this architecture"),
1387 if (offset_is_reg
&& offset_reg
.num
>= tic6x_num_registers
)
1388 as_bad (_("register number %u not supported on this architecture"),
1393 /* See if this looks like a register or register pair. */
1394 if (!operand_parsed
&& (op_forms
& (TIC6X_OP_REG
| TIC6X_OP_REGPAIR
)))
1396 tic6x_register first_reg
, second_reg
;
1400 reg_ok
= tic6x_parse_register (&rq
, &first_reg
);
1404 if (*rq
== ':' && (op_forms
& TIC6X_OP_REGPAIR
))
1407 reg_ok
= tic6x_parse_register (&rq
, &second_reg
);
1410 skip_whitespace (rq
);
1411 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1413 if ((second_reg
.num
& 1)
1414 || (first_reg
.num
!= second_reg
.num
+ 1)
1415 || (first_reg
.side
!= second_reg
.side
))
1416 as_bad (_("register pair for operand %u of '%.*s'"
1417 " not a valid even/odd pair"), opno
,
1419 op
->form
= TIC6X_OP_REGPAIR
;
1420 op
->value
.reg
= second_reg
;
1421 operand_parsed
= TRUE
;
1426 else if (op_forms
& TIC6X_OP_REG
)
1428 skip_whitespace (rq
);
1429 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1431 op
->form
= TIC6X_OP_REG
;
1432 op
->value
.reg
= first_reg
;
1433 operand_parsed
= TRUE
;
1440 if (first_reg
.num
>= tic6x_num_registers
)
1441 as_bad (_("register number %u not supported on this architecture"),
1443 if (op
->form
== TIC6X_OP_REGPAIR
1444 && second_reg
.num
>= tic6x_num_registers
)
1445 as_bad (_("register number %u not supported on this architecture"),
1450 /* Otherwise, parse it as an expression. */
1451 if (!operand_parsed
&& (op_forms
& TIC6X_OP_EXP
))
1453 char *save_input_line_pointer
;
1455 save_input_line_pointer
= input_line_pointer
;
1456 input_line_pointer
= q
;
1457 op
->form
= TIC6X_OP_EXP
;
1458 expression (&op
->value
.exp
);
1459 q
= input_line_pointer
;
1460 input_line_pointer
= save_input_line_pointer
;
1461 operand_parsed
= TRUE
;
1466 /* Now the operand has been parsed, there must be nothing more
1467 before the comma or end of line. */
1468 skip_whitespace (q
);
1469 if (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1471 operand_parsed
= FALSE
;
1472 as_bad (_("junk after operand %u of '%.*s'"), opno
,
1474 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1480 /* This could not be parsed as any acceptable form of
1484 case TIC6X_OP_REG
| TIC6X_OP_REGPAIR
:
1485 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1486 opno
, opc_len
, str
);
1489 case TIC6X_OP_REG
| TIC6X_OP_CTRL
:
1491 as_bad (_("bad register for operand %u of '%.*s'"),
1492 opno
, opc_len
, str
);
1495 case TIC6X_OP_REGPAIR
:
1496 as_bad (_("bad register pair for operand %u of '%.*s'"),
1497 opno
, opc_len
, str
);
1500 case TIC6X_OP_FUNC_UNIT
:
1501 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1502 opno
, opc_len
, str
);
1506 as_bad (_("bad operand %u of '%.*s'"),
1507 opno
, opc_len
, str
);
1511 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1515 return operand_parsed
;
1518 /* Table of assembler operators and associated O_* values. */
1523 } tic6x_operator_table
;
1524 static const tic6x_operator_table tic6x_operators
[] = {
1525 #define O_dsbt_index O_md1
1526 { "dsbt_index", O_dsbt_index
},
1529 #define O_dpr_got O_md3
1530 { "dpr_got", O_dpr_got
},
1531 #define O_dpr_byte O_md4
1532 { "dpr_byte", O_dpr_byte
},
1533 #define O_dpr_hword O_md5
1534 { "dpr_hword", O_dpr_hword
},
1535 #define O_dpr_word O_md6
1536 { "dpr_word", O_dpr_word
},
1539 /* Parse a name in some machine-specific way. Used on C6X to handle
1540 assembler operators. */
1543 tic6x_parse_name (const char *name
, expressionS
*exprP
,
1544 enum expr_mode mode ATTRIBUTE_UNUSED
, char *nextchar
)
1546 char *p
= input_line_pointer
;
1547 char c
, *name_start
, *name_end
;
1548 const char *inner_name
;
1550 operatorT op
= O_illegal
;
1556 for (i
= 0; i
< ARRAY_SIZE (tic6x_operators
); i
++)
1557 if (strcasecmp (name
+ 1, tic6x_operators
[i
].name
) == 0)
1559 op
= tic6x_operators
[i
].op
;
1563 if (op
== O_illegal
)
1566 *input_line_pointer
= *nextchar
;
1567 skip_whitespace (p
);
1571 *input_line_pointer
= 0;
1575 skip_whitespace (p
);
1577 if (!is_name_beginner (*p
))
1579 *input_line_pointer
= 0;
1585 while (is_part_of_name (*p
))
1588 skip_whitespace (p
);
1592 *input_line_pointer
= 0;
1596 input_line_pointer
= p
+ 1;
1597 *nextchar
= *input_line_pointer
;
1598 *input_line_pointer
= 0;
1602 inner_name
= name_start
;
1603 if (op
== O_dsbt_index
&& strcmp (inner_name
, "__c6xabi_DSBT_BASE") != 0)
1605 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1606 inner_name
= "__c6xabi_DSBT_BASE";
1608 sym
= symbol_find_or_make (inner_name
);
1612 exprP
->X_add_symbol
= sym
;
1613 exprP
->X_add_number
= 0;
1614 exprP
->X_op_symbol
= NULL
;
1620 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1621 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1622 fixes resolving to constants should have those constants implicitly
1623 shifted) and FALSE otherwise, but look for C6X-specific expression
1624 types and adjust the relocations or give errors accordingly. */
1627 tic6x_fix_new_exp (fragS
*frag
, int where
, int size
, expressionS
*exp
,
1628 int pcrel
, bfd_reloc_code_real_type r_type
,
1629 bfd_boolean fix_adda
)
1631 bfd_reloc_code_real_type new_reloc
= BFD_RELOC_UNUSED
;
1639 case BFD_RELOC_C6000_SBR_U15_W
:
1640 new_reloc
= BFD_RELOC_C6000_DSBT_INDEX
;
1644 as_bad (_("$DSBT_INDEX not supported in this context"));
1652 case BFD_RELOC_C6000_SBR_U15_W
:
1653 new_reloc
= BFD_RELOC_C6000_SBR_GOT_U15_W
;
1657 as_bad (_("$GOT not supported in this context"));
1665 case BFD_RELOC_C6000_ABS_L16
:
1666 new_reloc
= BFD_RELOC_C6000_SBR_GOT_L16_W
;
1669 case BFD_RELOC_C6000_ABS_H16
:
1670 new_reloc
= BFD_RELOC_C6000_SBR_GOT_H16_W
;
1674 as_bad (_("$DPR_GOT not supported in this context"));
1682 case BFD_RELOC_C6000_ABS_S16
:
1683 new_reloc
= BFD_RELOC_C6000_SBR_S16
;
1686 case BFD_RELOC_C6000_ABS_L16
:
1687 new_reloc
= BFD_RELOC_C6000_SBR_L16_B
;
1690 case BFD_RELOC_C6000_ABS_H16
:
1691 new_reloc
= BFD_RELOC_C6000_SBR_H16_B
;
1695 as_bad (_("$DPR_BYTE not supported in this context"));
1703 case BFD_RELOC_C6000_ABS_L16
:
1704 new_reloc
= BFD_RELOC_C6000_SBR_L16_H
;
1707 case BFD_RELOC_C6000_ABS_H16
:
1708 new_reloc
= BFD_RELOC_C6000_SBR_H16_H
;
1712 as_bad (_("$DPR_HWORD not supported in this context"));
1720 case BFD_RELOC_C6000_ABS_L16
:
1721 new_reloc
= BFD_RELOC_C6000_SBR_L16_W
;
1724 case BFD_RELOC_C6000_ABS_H16
:
1725 new_reloc
= BFD_RELOC_C6000_SBR_H16_W
;
1729 as_bad (_("$DPR_WORD not supported in this context"));
1740 as_bad (_("invalid PC-relative operand"));
1746 if (new_reloc
== BFD_RELOC_UNUSED
)
1747 fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
1749 fix
= fix_new (frag
, where
, size
, exp
->X_add_symbol
, exp
->X_add_number
,
1751 fix
->tc_fix_data
.fix_adda
= fix_adda
;
1754 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1755 go through the error checking in tic6x_fix_new_exp. */
1758 tic6x_cons_fix_new (fragS
*frag
, int where
, int size
, expressionS
*exp
)
1760 bfd_reloc_code_real_type r_type
;
1765 r_type
= BFD_RELOC_8
;
1769 r_type
= BFD_RELOC_16
;
1773 r_type
= BFD_RELOC_32
;
1777 as_bad (_("no %d-byte relocations available"), size
);
1781 tic6x_fix_new_exp (frag
, where
, size
, exp
, 0, r_type
, FALSE
);
1784 /* Initialize target-specific fix data. */
1787 tic6x_init_fix_data (fixS
*fixP
)
1789 fixP
->tc_fix_data
.fix_adda
= FALSE
;
1792 /* Return true if the fix can be handled by GAS, false if it must
1793 be passed through to the linker. */
1796 tic6x_fix_adjustable (fixS
*fixP
)
1798 switch (fixP
->fx_r_type
)
1800 /* Adjust_reloc_syms doesn't know about the GOT. */
1801 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
1802 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
1803 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
1811 /* Given the fine-grained form of an operand, return the coarse
1815 tic6x_coarse_operand_form (tic6x_operand_form form
)
1819 case tic6x_operand_asm_const
:
1820 case tic6x_operand_link_const
:
1821 return TIC6X_OP_EXP
;
1823 case tic6x_operand_reg
:
1824 case tic6x_operand_xreg
:
1825 case tic6x_operand_dreg
:
1826 case tic6x_operand_areg
:
1827 case tic6x_operand_retreg
:
1828 return TIC6X_OP_REG
;
1830 case tic6x_operand_regpair
:
1831 case tic6x_operand_xregpair
:
1832 case tic6x_operand_dregpair
:
1833 return TIC6X_OP_REGPAIR
;
1835 case tic6x_operand_irp
:
1836 return TIC6X_OP_IRP
;
1838 case tic6x_operand_nrp
:
1839 return TIC6X_OP_NRP
;
1841 case tic6x_operand_ctrl
:
1842 return TIC6X_OP_CTRL
;
1844 case tic6x_operand_mem_short
:
1845 case tic6x_operand_mem_long
:
1846 case tic6x_operand_mem_deref
:
1847 return TIC6X_OP_MEM_NOUNREG
;
1849 case tic6x_operand_mem_ndw
:
1850 return TIC6X_OP_MEM_UNREG
;
1852 case tic6x_operand_func_unit
:
1853 return TIC6X_OP_FUNC_UNIT
;
1860 /* How an operand may match or not match a desired form. If different
1861 instruction alternatives fail in different ways, the first failure
1862 in this list determines the diagnostic. */
1866 tic6x_match_matches
,
1867 /* Bad coarse form. */
1870 tic6x_match_non_const
,
1871 /* Register on wrong side. */
1872 tic6x_match_wrong_side
,
1873 /* Not a valid address register. */
1874 tic6x_match_bad_address
,
1875 /* Not a valid return address register. */
1876 tic6x_match_bad_return
,
1877 /* Control register not readable. */
1878 tic6x_match_ctrl_write_only
,
1879 /* Control register not writable. */
1880 tic6x_match_ctrl_read_only
,
1881 /* Not a valid memory reference for this instruction. */
1883 } tic6x_operand_match
;
1885 /* Return whether an operand matches the given fine-grained form and
1886 read/write usage, and, if it does not match, how it fails to match.
1887 The main functional unit side is SIDE; the cross-path side is CROSS
1888 (the same as SIDE if a cross path not used); the data side is
1890 static tic6x_operand_match
1891 tic6x_operand_matches_form (const tic6x_operand
*op
, tic6x_operand_form form
,
1892 tic6x_rw rw
, unsigned int side
, unsigned int cross
,
1893 unsigned int data_side
)
1895 unsigned int coarse
= tic6x_coarse_operand_form (form
);
1897 if (coarse
!= op
->form
)
1898 return tic6x_match_coarse
;
1902 case tic6x_operand_asm_const
:
1903 if (op
->value
.exp
.X_op
== O_constant
)
1904 return tic6x_match_matches
;
1906 return tic6x_match_non_const
;
1908 case tic6x_operand_link_const
:
1909 case tic6x_operand_irp
:
1910 case tic6x_operand_nrp
:
1911 case tic6x_operand_func_unit
:
1912 /* All expressions are link-time constants, although there may
1913 not be relocations to express them in the output file. "irp"
1914 and "nrp" are unique operand values. All parsed functional
1915 unit names are valid. */
1916 return tic6x_match_matches
;
1918 case tic6x_operand_reg
:
1919 case tic6x_operand_regpair
:
1920 if (op
->value
.reg
.side
== side
)
1921 return tic6x_match_matches
;
1923 return tic6x_match_wrong_side
;
1925 case tic6x_operand_xreg
:
1926 case tic6x_operand_xregpair
:
1927 if (op
->value
.reg
.side
== cross
)
1928 return tic6x_match_matches
;
1930 return tic6x_match_wrong_side
;
1932 case tic6x_operand_dreg
:
1933 case tic6x_operand_dregpair
:
1934 if (op
->value
.reg
.side
== data_side
)
1935 return tic6x_match_matches
;
1937 return tic6x_match_wrong_side
;
1939 case tic6x_operand_areg
:
1940 if (op
->value
.reg
.side
!= cross
)
1941 return tic6x_match_wrong_side
;
1942 else if (op
->value
.reg
.side
== 2
1943 && (op
->value
.reg
.num
== 14 || op
->value
.reg
.num
== 15))
1944 return tic6x_match_matches
;
1946 return tic6x_match_bad_address
;
1948 case tic6x_operand_retreg
:
1949 if (op
->value
.reg
.side
!= side
)
1950 return tic6x_match_wrong_side
;
1951 else if (op
->value
.reg
.num
!= 3)
1952 return tic6x_match_bad_return
;
1954 return tic6x_match_matches
;
1956 case tic6x_operand_ctrl
:
1960 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read
1961 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1962 return tic6x_match_matches
;
1964 return tic6x_match_ctrl_write_only
;
1966 case tic6x_rw_write
:
1967 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_write
1968 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1969 return tic6x_match_matches
;
1971 return tic6x_match_ctrl_read_only
;
1977 case tic6x_operand_mem_deref
:
1978 if (op
->value
.mem
.mod
!= tic6x_mem_mod_none
)
1979 return tic6x_match_bad_mem
;
1980 else if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1982 else if (op
->value
.mem
.base_reg
.side
!= side
)
1983 return tic6x_match_bad_mem
;
1985 return tic6x_match_matches
;
1987 case tic6x_operand_mem_short
:
1988 case tic6x_operand_mem_ndw
:
1989 if (op
->value
.mem
.base_reg
.side
!= side
)
1990 return tic6x_match_bad_mem
;
1991 if (op
->value
.mem
.mod
== tic6x_mem_mod_none
)
1993 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1995 return tic6x_match_matches
;
1997 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1999 if (op
->value
.mem
.mod
== tic6x_mem_mod_plus
2000 || op
->value
.mem
.mod
== tic6x_mem_mod_minus
)
2002 return tic6x_match_matches
;
2004 if (op
->value
.mem
.offset_is_reg
)
2006 if (op
->value
.mem
.scaled
== tic6x_offset_unscaled
2007 && form
!= tic6x_operand_mem_ndw
)
2009 if (op
->value
.mem
.offset
.reg
.side
== side
)
2010 return tic6x_match_matches
;
2012 return tic6x_match_bad_mem
;
2016 if (op
->value
.mem
.offset
.exp
.X_op
== O_constant
)
2017 return tic6x_match_matches
;
2019 return tic6x_match_bad_mem
;
2022 case tic6x_operand_mem_long
:
2023 if (op
->value
.mem
.base_reg
.side
== 2
2024 && (op
->value
.mem
.base_reg
.num
== 14
2025 || op
->value
.mem
.base_reg
.num
== 15))
2027 switch (op
->value
.mem
.mod
)
2029 case tic6x_mem_mod_none
:
2030 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
2032 return tic6x_match_matches
;
2034 case tic6x_mem_mod_plus
:
2035 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
2037 if (op
->value
.mem
.offset_is_reg
)
2038 return tic6x_match_bad_mem
;
2039 else if (op
->value
.mem
.scaled
== tic6x_offset_scaled
2040 && op
->value
.mem
.offset
.exp
.X_op
!= O_constant
)
2041 return tic6x_match_bad_mem
;
2043 return tic6x_match_matches
;
2045 case tic6x_mem_mod_minus
:
2046 case tic6x_mem_mod_preinc
:
2047 case tic6x_mem_mod_predec
:
2048 case tic6x_mem_mod_postinc
:
2049 case tic6x_mem_mod_postdec
:
2050 return tic6x_match_bad_mem
;
2058 return tic6x_match_bad_mem
;
2065 /* Return the number of bits shift used with DP-relative coding method
2069 tic6x_dpr_shift (tic6x_coding_method coding
)
2073 case tic6x_coding_ulcst_dpr_byte
:
2076 case tic6x_coding_ulcst_dpr_half
:
2079 case tic6x_coding_ulcst_dpr_word
:
2087 /* Return the relocation used with DP-relative coding method
2090 static bfd_reloc_code_real_type
2091 tic6x_dpr_reloc (tic6x_coding_method coding
)
2095 case tic6x_coding_ulcst_dpr_byte
:
2096 return BFD_RELOC_C6000_SBR_U15_B
;
2098 case tic6x_coding_ulcst_dpr_half
:
2099 return BFD_RELOC_C6000_SBR_U15_H
;
2101 case tic6x_coding_ulcst_dpr_word
:
2102 return BFD_RELOC_C6000_SBR_U15_W
;
2109 /* Given a memory reference *MEM_REF as originally parsed, fill in
2110 defaults for missing offsets. */
2113 tic6x_default_mem_ref (tic6x_mem_ref
*mem_ref
)
2115 switch (mem_ref
->mod
)
2117 case tic6x_mem_mod_none
:
2118 if (mem_ref
->scaled
!= tic6x_offset_none
)
2120 mem_ref
->mod
= tic6x_mem_mod_plus
;
2121 mem_ref
->scaled
= tic6x_offset_unscaled
;
2122 mem_ref
->offset_is_reg
= FALSE
;
2123 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
2124 mem_ref
->offset
.exp
.X_op
= O_constant
;
2125 mem_ref
->offset
.exp
.X_add_number
= 0;
2126 mem_ref
->offset
.exp
.X_unsigned
= 0;
2129 case tic6x_mem_mod_plus
:
2130 case tic6x_mem_mod_minus
:
2131 if (mem_ref
->scaled
== tic6x_offset_none
)
2135 case tic6x_mem_mod_preinc
:
2136 case tic6x_mem_mod_predec
:
2137 case tic6x_mem_mod_postinc
:
2138 case tic6x_mem_mod_postdec
:
2139 if (mem_ref
->scaled
!= tic6x_offset_none
)
2141 mem_ref
->scaled
= tic6x_offset_scaled
;
2142 mem_ref
->offset_is_reg
= FALSE
;
2143 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
2144 mem_ref
->offset
.exp
.X_op
= O_constant
;
2145 mem_ref
->offset
.exp
.X_add_number
= 1;
2146 mem_ref
->offset
.exp
.X_unsigned
= 0;
2154 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
2155 instruction of the specified UNIT, side SIDE. */
2158 tic6x_encode_spmask (tic6x_func_unit_base unit
, unsigned int side
)
2162 case tic6x_func_unit_l
:
2163 return 1 << (side
- 1);
2165 case tic6x_func_unit_s
:
2166 return 1 << (side
+ 1);
2168 case tic6x_func_unit_d
:
2169 return 1 << (side
+ 3);
2171 case tic6x_func_unit_m
:
2172 return 1 << (side
+ 5);
2179 /* Try to encode the instruction with opcode number ID and operands
2180 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
2181 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
2182 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
2183 SPLOOP_II is the ii value from the previous SPLOOP-family
2184 instruction, or 0 if not in such a loop; the only possible problems
2185 are operands being out of range (they already match the
2186 fine-grained form), and inappropriate predication. If this
2187 succeeds, return the encoding and set *OK to TRUE; otherwise return
2188 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
2189 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
2190 Print error messages for failure if PRINT_ERRORS is TRUE; the
2191 opcode starts at STR and has length OPC_LEN. */
2194 tic6x_try_encode (tic6x_opcode_id id
, tic6x_operand
*operands
,
2195 unsigned int num_operands
, unsigned int this_line_creg
,
2196 unsigned int this_line_z
, unsigned int func_unit_side
,
2197 unsigned int func_unit_cross
,
2198 unsigned int func_unit_data_side
, int sploop_ii
,
2199 expressionS
**fix_exp
, int *fix_pcrel
,
2200 bfd_reloc_code_real_type
*fx_r_type
, bfd_boolean
*fix_adda
,
2201 bfd_boolean
*fix_needed
, bfd_boolean
*ok
,
2202 bfd_boolean print_errors
, char *str
, int opc_len
)
2204 const tic6x_opcode
*opct
;
2205 const tic6x_insn_format
*fmt
;
2206 unsigned int opcode_value
;
2209 opct
= &tic6x_opcode_table
[id
];
2210 fmt
= &tic6x_insn_format_table
[opct
->format
];
2211 opcode_value
= fmt
->cst_bits
;
2213 for (fld
= 0; fld
< opct
->num_fixed_fields
; fld
++)
2215 if (opct
->fixed_fields
[fld
].min_val
== opct
->fixed_fields
[fld
].max_val
)
2217 const tic6x_insn_field
*fldd
;
2218 fldd
= tic6x_field_from_fmt (fmt
, opct
->fixed_fields
[fld
].field_id
);
2221 opcode_value
|= opct
->fixed_fields
[fld
].min_val
<< fldd
->low_pos
;
2225 for (fld
= 0; fld
< opct
->num_variable_fields
; fld
++)
2227 const tic6x_insn_field
*fldd
;
2233 unsigned int fcyc_bits
;
2238 fldd
= tic6x_field_from_fmt (fmt
, opct
->variable_fields
[fld
].field_id
);
2241 opno
= opct
->variable_fields
[fld
].operand_num
;
2242 switch (opct
->variable_fields
[fld
].coding_method
)
2244 case tic6x_coding_ucst
:
2245 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2247 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2249 ucexp
= operands
[opno
].value
.exp
;
2251 if (ucexp
.X_add_number
< 0
2252 || ucexp
.X_add_number
>= (1 << fldd
->width
))
2255 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2260 value
= ucexp
.X_add_number
;
2263 case tic6x_coding_scst
:
2264 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2266 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2269 /* Opcode table should not permit non-constants without
2270 a known relocation for them. */
2271 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2274 *fix_exp
= &operands
[opno
].value
.exp
;
2276 *fx_r_type
= BFD_RELOC_C6000_ABS_S16
;
2280 sign_value
= SEXT (operands
[opno
].value
.exp
.X_add_number
);
2282 if (sign_value
< -(1 << (fldd
->width
- 1))
2283 || (sign_value
>= (1 << (fldd
->width
- 1))))
2286 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2291 value
= sign_value
+ (1 << (fldd
->width
- 1));
2292 value
^= (1 << (fldd
->width
- 1));
2295 case tic6x_coding_ucst_minus_one
:
2296 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2298 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2300 if (operands
[opno
].value
.exp
.X_add_number
<= 0
2301 || operands
[opno
].value
.exp
.X_add_number
> (1 << fldd
->width
))
2304 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2309 value
= operands
[opno
].value
.exp
.X_add_number
- 1;
2312 case tic6x_coding_scst_negate
:
2313 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2315 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2317 sign_value
= SEXT (-operands
[opno
].value
.exp
.X_add_number
);
2318 goto signed_constant
;
2320 case tic6x_coding_ulcst_dpr_byte
:
2321 case tic6x_coding_ulcst_dpr_half
:
2322 case tic6x_coding_ulcst_dpr_word
:
2323 bits
= tic6x_dpr_shift (opct
->variable_fields
[fld
].coding_method
);
2324 switch (operands
[opno
].form
)
2327 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2329 ucexp
= operands
[opno
].value
.exp
;
2330 goto unsigned_constant
;
2332 expp
= &operands
[opno
].value
.exp
;
2335 case TIC6X_OP_MEM_NOUNREG
:
2336 mem
= operands
[opno
].value
.mem
;
2337 tic6x_default_mem_ref (&mem
);
2338 if (mem
.offset_is_reg
)
2340 if (mem
.offset
.exp
.X_op
== O_constant
)
2342 ucexp
= mem
.offset
.exp
;
2343 if (mem
.scaled
== tic6x_offset_unscaled
)
2345 if (ucexp
.X_add_number
& ((1 << bits
) - 1))
2348 as_bad (_("offset in operand %u of '%.*s' not "
2349 "divisible by %u"), opno
+ 1, opc_len
,
2354 ucexp
.X_add_number
>>= bits
;
2356 goto unsigned_constant
;
2358 if (mem
.scaled
!= tic6x_offset_unscaled
)
2360 if (operands
[opno
].value
.mem
.mod
== tic6x_mem_mod_none
2361 || operands
[opno
].value
.mem
.scaled
!= tic6x_offset_unscaled
2362 || operands
[opno
].value
.mem
.offset_is_reg
)
2364 expp
= &operands
[opno
].value
.mem
.offset
.exp
;
2371 /* Opcode table should not use this encoding without a known
2373 if (fldd
->low_pos
!= 8 || fldd
->width
!= 15)
2375 /* We do not check for offset divisibility here; such a
2376 check is not needed at this point to encode the value,
2377 and if there is eventually a problem it will be detected
2378 either in md_apply_fix or at link time. */
2383 = tic6x_dpr_reloc (opct
->variable_fields
[fld
].coding_method
);
2384 if (operands
[opno
].form
== TIC6X_OP_EXP
)
2390 case tic6x_coding_lcst_low16
:
2391 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2393 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2394 value
= operands
[opno
].value
.exp
.X_add_number
& 0xffff;
2398 /* Opcode table should not use this encoding without a
2399 known relocation. */
2400 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2403 *fix_exp
= &operands
[opno
].value
.exp
;
2405 *fx_r_type
= BFD_RELOC_C6000_ABS_L16
;
2410 case tic6x_coding_lcst_high16
:
2411 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2413 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2414 value
= (operands
[opno
].value
.exp
.X_add_number
>> 16) & 0xffff;
2418 /* Opcode table should not use this encoding without a
2419 known relocation. */
2420 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2423 *fix_exp
= &operands
[opno
].value
.exp
;
2425 *fx_r_type
= BFD_RELOC_C6000_ABS_H16
;
2430 case tic6x_coding_pcrel
:
2431 case tic6x_coding_pcrel_half
:
2432 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2436 *fix_exp
= &operands
[opno
].value
.exp
;
2438 if (fldd
->low_pos
== 7 && fldd
->width
== 21)
2439 *fx_r_type
= BFD_RELOC_C6000_PCR_S21
;
2440 else if (fldd
->low_pos
== 16 && fldd
->width
== 12)
2441 *fx_r_type
= BFD_RELOC_C6000_PCR_S12
;
2442 else if (fldd
->low_pos
== 13 && fldd
->width
== 10)
2443 *fx_r_type
= BFD_RELOC_C6000_PCR_S10
;
2444 else if (fldd
->low_pos
== 16 && fldd
->width
== 7)
2445 *fx_r_type
= BFD_RELOC_C6000_PCR_S7
;
2447 /* Opcode table should not use this encoding without a
2448 known relocation. */
2453 case tic6x_coding_reg
:
2454 switch (operands
[opno
].form
)
2457 case TIC6X_OP_REGPAIR
:
2458 value
= operands
[opno
].value
.reg
.num
;
2461 case TIC6X_OP_MEM_NOUNREG
:
2462 case TIC6X_OP_MEM_UNREG
:
2463 value
= operands
[opno
].value
.mem
.base_reg
.num
;
2471 case tic6x_coding_areg
:
2472 switch (operands
[opno
].form
)
2475 value
= (operands
[opno
].value
.reg
.num
== 15 ? 1 : 0);
2478 case TIC6X_OP_MEM_NOUNREG
:
2479 value
= (operands
[opno
].value
.mem
.base_reg
.num
== 15 ? 1 : 0);
2487 case tic6x_coding_crlo
:
2488 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2490 value
= tic6x_ctrl_table
[operands
[opno
].value
.ctrl
].crlo
;
2493 case tic6x_coding_crhi
:
2494 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2499 case tic6x_coding_reg_shift
:
2500 if (operands
[opno
].form
!= TIC6X_OP_REGPAIR
)
2502 value
= operands
[opno
].value
.reg
.num
>> 1;
2505 case tic6x_coding_mem_offset
:
2506 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
)
2508 mem
= operands
[opno
].value
.mem
;
2509 tic6x_default_mem_ref (&mem
);
2510 if (mem
.offset_is_reg
)
2512 if (mem
.scaled
!= tic6x_offset_scaled
)
2514 value
= mem
.offset
.reg
.num
;
2520 if (mem
.offset
.exp
.X_op
!= O_constant
)
2524 case tic6x_offset_scaled
:
2528 case tic6x_offset_unscaled
:
2529 scale
= opct
->operand_info
[opno
].size
;
2530 if (scale
!= 1 && scale
!= 2 && scale
!= 4 && scale
!= 8)
2537 if (mem
.offset
.exp
.X_add_number
< 0
2538 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
) * scale
)
2541 as_bad (_("offset in operand %u of '%.*s' out of range"),
2542 opno
+ 1, opc_len
, str
);
2546 if (mem
.offset
.exp
.X_add_number
% scale
)
2549 as_bad (_("offset in operand %u of '%.*s' not "
2551 opno
+ 1, opc_len
, str
, scale
);
2555 value
= mem
.offset
.exp
.X_add_number
/ scale
;
2559 case tic6x_coding_mem_offset_noscale
:
2560 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2562 mem
= operands
[opno
].value
.mem
;
2563 tic6x_default_mem_ref (&mem
);
2564 if (mem
.offset_is_reg
)
2565 value
= mem
.offset
.reg
.num
;
2568 if (mem
.offset
.exp
.X_op
!= O_constant
)
2570 if (mem
.offset
.exp
.X_add_number
< 0
2571 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
))
2574 as_bad (_("offset in operand %u of '%.*s' out of range"),
2575 opno
+ 1, opc_len
, str
);
2579 value
= mem
.offset
.exp
.X_add_number
;
2583 case tic6x_coding_mem_mode
:
2584 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
2585 && operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2587 mem
= operands
[opno
].value
.mem
;
2588 tic6x_default_mem_ref (&mem
);
2591 case tic6x_mem_mod_plus
:
2595 case tic6x_mem_mod_minus
:
2599 case tic6x_mem_mod_preinc
:
2603 case tic6x_mem_mod_predec
:
2607 case tic6x_mem_mod_postinc
:
2611 case tic6x_mem_mod_postdec
:
2618 value
+= (mem
.offset_is_reg
? 4 : 0);
2621 case tic6x_coding_scaled
:
2622 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2624 mem
= operands
[opno
].value
.mem
;
2625 tic6x_default_mem_ref (&mem
);
2628 case tic6x_offset_unscaled
:
2632 case tic6x_offset_scaled
:
2641 case tic6x_coding_spmask
:
2642 /* The position of such a field is hardcoded in the handling
2644 if (fldd
->low_pos
!= 18)
2647 for (opno
= 0; opno
< num_operands
; opno
++)
2651 v
= tic6x_encode_spmask (operands
[opno
].value
.func_unit
.base
,
2652 operands
[opno
].value
.func_unit
.side
);
2656 as_bad (_("functional unit already masked for operand "
2657 "%u of '%.*s'"), opno
+ 1, opc_len
, str
);
2665 case tic6x_coding_reg_unused
:
2666 /* This is a placeholder; correct handling goes along with
2667 resource constraint checks. */
2671 case tic6x_coding_fstg
:
2672 case tic6x_coding_fcyc
:
2673 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2675 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2680 as_bad (_("'%.*s' instruction not in a software "
2689 else if (sploop_ii
<= 2)
2691 else if (sploop_ii
<= 4)
2693 else if (sploop_ii
<= 8)
2695 else if (sploop_ii
<= 14)
2699 if (fcyc_bits
> fldd
->width
)
2702 if (opct
->variable_fields
[fld
].coding_method
== tic6x_coding_fstg
)
2705 if (operands
[opno
].value
.exp
.X_add_number
< 0
2706 || (operands
[opno
].value
.exp
.X_add_number
2707 >= (1 << (fldd
->width
- fcyc_bits
))))
2710 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2715 value
= operands
[opno
].value
.exp
.X_add_number
;
2716 for (t
= 0, i
= fcyc_bits
; i
< fldd
->width
; i
++)
2718 t
= (t
<< 1) | (value
& 1);
2721 value
= t
<< fcyc_bits
;
2725 if (operands
[opno
].value
.exp
.X_add_number
< 0
2726 || (operands
[opno
].value
.exp
.X_add_number
>= sploop_ii
))
2729 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2734 value
= operands
[opno
].value
.exp
.X_add_number
;
2738 case tic6x_coding_fu
:
2739 value
= func_unit_side
== 2 ? 1 : 0;
2742 case tic6x_coding_data_fu
:
2743 value
= func_unit_data_side
== 2 ? 1 : 0;
2746 case tic6x_coding_xpath
:
2747 value
= func_unit_cross
;
2754 for (ffld
= 0; ffld
< opct
->num_fixed_fields
; ffld
++)
2755 if ((opct
->fixed_fields
[ffld
].field_id
2756 == opct
->variable_fields
[fld
].field_id
)
2757 && (value
< opct
->fixed_fields
[ffld
].min_val
2758 || value
> opct
->fixed_fields
[ffld
].max_val
))
2761 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2767 opcode_value
|= value
<< fldd
->low_pos
;
2772 const tic6x_insn_field
*creg
;
2773 const tic6x_insn_field
*z
;
2775 creg
= tic6x_field_from_fmt (fmt
, tic6x_field_creg
);
2779 as_bad (_("instruction '%.*s' cannot be predicated"),
2784 z
= tic6x_field_from_fmt (fmt
, tic6x_field_z
);
2785 /* If there is a creg field, there must be a z field; otherwise
2786 there is an error in the format table. */
2790 opcode_value
|= this_line_creg
<< creg
->low_pos
;
2791 opcode_value
|= this_line_z
<< z
->low_pos
;
2795 return opcode_value
;
2798 /* Convert the target integer stored in N bytes in BUF to a host
2799 integer, returning that value. */
2802 md_chars_to_number (char *buf
, int n
)
2805 unsigned char *p
= (unsigned char *) buf
;
2807 if (target_big_endian
)
2812 result
|= (*p
++ & 0xff);
2820 result
|= (p
[n
] & 0xff);
2827 /* Assemble the instruction starting at STR (an opcode, with the
2828 opcode name all-lowercase). */
2831 md_assemble (char *str
)
2835 bfd_boolean this_line_parallel
;
2836 bfd_boolean this_line_spmask
;
2837 unsigned int this_line_creg
;
2838 unsigned int this_line_z
;
2839 tic6x_label_list
*this_insn_label_list
;
2840 segment_info_type
*seginfo
;
2841 tic6x_opcode_list
*opc_list
, *opc
;
2842 tic6x_func_unit_base func_unit_base
= tic6x_func_unit_nfu
;
2843 unsigned int func_unit_side
= 0;
2844 unsigned int func_unit_cross
= 0;
2845 unsigned int cross_side
= 0;
2846 unsigned int func_unit_data_side
= 0;
2847 unsigned int max_matching_opcodes
, num_matching_opcodes
;
2848 tic6x_opcode_id
*opcm
= NULL
;
2849 unsigned int opc_rank
[TIC6X_NUM_PREFER
];
2850 const tic6x_opcode
*opct
= NULL
;
2851 int min_rank
, try_rank
, max_rank
;
2852 bfd_boolean num_operands_permitted
[TIC6X_MAX_SOURCE_OPERANDS
+ 1]
2854 unsigned int operand_forms
[TIC6X_MAX_SOURCE_OPERANDS
] = { 0 };
2855 tic6x_operand operands
[TIC6X_MAX_SOURCE_OPERANDS
];
2856 unsigned int max_num_operands
;
2857 unsigned int num_operands_read
;
2858 bfd_boolean ok_this_arch
, ok_this_fu
, ok_this_arch_fu
;
2859 bfd_boolean bad_operands
= FALSE
;
2860 unsigned int opcode_value
;
2861 bfd_boolean encoded_ok
;
2862 bfd_boolean fix_needed
= FALSE
;
2863 expressionS
*fix_exp
= NULL
;
2865 bfd_reloc_code_real_type fx_r_type
= BFD_RELOC_UNUSED
;
2866 bfd_boolean fix_adda
= FALSE
;
2871 while (*p
&& !is_end_of_line
[(unsigned char) *p
] && *p
!= ' ')
2874 /* This function should only have been called when there is actually
2875 an instruction to assemble. */
2879 /* Now an instruction has been seen, architecture attributes from
2880 .arch directives merge with rather than overriding the previous
2882 tic6x_seen_insns
= TRUE
;
2883 /* If no .arch directives or -march options have been seen, we are
2884 assessing instruction validity based on the C674X default, so set
2885 the attribute accordingly. */
2886 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
2887 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
2889 /* Reset global settings for parallel bars and predicates now to
2890 avoid extra errors if there are problems with this opcode. */
2891 this_line_parallel
= tic6x_line_parallel
;
2892 this_line_spmask
= tic6x_line_spmask
;
2893 this_line_creg
= tic6x_line_creg
;
2894 this_line_z
= tic6x_line_z
;
2895 tic6x_line_parallel
= FALSE
;
2896 tic6x_line_spmask
= FALSE
;
2897 tic6x_line_creg
= 0;
2899 seginfo
= seg_info (now_seg
);
2900 this_insn_label_list
= seginfo
->tc_segment_info_data
.label_list
;
2901 seginfo
->tc_segment_info_data
.label_list
= NULL
;
2903 opc_list
= hash_find_n (opcode_hash
, str
, p
- str
);
2904 if (opc_list
== NULL
)
2908 as_bad (_("unknown opcode '%s'"), str
);
2914 skip_whitespace (p
);
2916 /* See if there is something that looks like a functional unit
2920 bfd_boolean good_func_unit
;
2921 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
2922 unsigned int maybe_side
= 0;
2923 unsigned int maybe_cross
= 0;
2924 unsigned int maybe_data_side
= 0;
2926 good_func_unit
= tic6x_parse_func_unit_base (p
+ 1, &maybe_base
,
2931 if (p
[3] == ' ' || is_end_of_line
[(unsigned char) p
[3]])
2933 else if ((p
[3] == 'x' || p
[3] == 'X')
2934 && (p
[4] == ' ' || is_end_of_line
[(unsigned char) p
[4]]))
2939 else if (maybe_base
== tic6x_func_unit_d
2940 && (p
[3] == 't' || p
[3] == 'T')
2941 && (p
[4] == '1' || p
[4] == '2')
2942 && (p
[5] == ' ' || is_end_of_line
[(unsigned char) p
[5]]))
2944 maybe_data_side
= p
[4] - '0';
2948 good_func_unit
= FALSE
;
2953 func_unit_base
= maybe_base
;
2954 func_unit_side
= maybe_side
;
2955 func_unit_cross
= maybe_cross
;
2956 cross_side
= (func_unit_cross
? 3 - func_unit_side
: func_unit_side
);
2957 func_unit_data_side
= maybe_data_side
;
2960 skip_whitespace (p
);
2963 /* Determine which entries in the opcode table match, and the
2964 associated permitted forms of operands. */
2965 max_matching_opcodes
= 0;
2966 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2967 max_matching_opcodes
++;
2968 num_matching_opcodes
= 0;
2969 opcm
= xmalloc (max_matching_opcodes
* sizeof (*opcm
));
2970 max_num_operands
= 0;
2971 ok_this_arch
= FALSE
;
2973 ok_this_arch_fu
= FALSE
;
2974 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2976 unsigned int num_operands
;
2978 bfd_boolean this_opc_arch_ok
= TRUE
;
2979 bfd_boolean this_opc_fu_ok
= TRUE
;
2981 if (tic6x_insn_format_table
[tic6x_opcode_table
[opc
->id
].format
].num_bits
2984 if (!(tic6x_opcode_table
[opc
->id
].isa_variants
& tic6x_features
))
2985 this_opc_arch_ok
= FALSE
;
2986 if (tic6x_opcode_table
[opc
->id
].func_unit
!= func_unit_base
)
2987 this_opc_fu_ok
= FALSE
;
2988 if (func_unit_side
== 1
2989 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_B_ONLY
))
2990 this_opc_fu_ok
= FALSE
;
2992 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_NO_CROSS
))
2993 this_opc_fu_ok
= FALSE
;
2994 if (!func_unit_data_side
2995 && (tic6x_opcode_table
[opc
->id
].flags
2996 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2997 this_opc_fu_ok
= FALSE
;
2998 if (func_unit_data_side
2999 && !(tic6x_opcode_table
[opc
->id
].flags
3000 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
3001 this_opc_fu_ok
= FALSE
;
3002 if (func_unit_data_side
== 1
3003 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_T2_ONLY
))
3004 this_opc_fu_ok
= FALSE
;
3005 if (this_opc_arch_ok
)
3006 ok_this_arch
= TRUE
;
3009 if (!this_opc_arch_ok
|| !this_opc_fu_ok
)
3011 ok_this_arch_fu
= TRUE
;
3012 opcm
[num_matching_opcodes
] = opc
->id
;
3013 num_matching_opcodes
++;
3014 num_operands
= tic6x_opcode_table
[opc
->id
].num_operands
;
3016 if (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SPMASK
)
3018 if (num_operands
!= 1
3019 || (tic6x_opcode_table
[opc
->id
].operand_info
[0].form
3020 != tic6x_operand_func_unit
))
3023 for (i
= 0; i
< num_operands
; i
++)
3026 |= tic6x_coarse_operand_form (tic6x_operand_func_unit
);
3027 num_operands_permitted
[i
] = TRUE
;
3032 for (i
= 0; i
< num_operands
; i
++)
3034 tic6x_operand_form f
3035 = tic6x_opcode_table
[opc
->id
].operand_info
[i
].form
;
3037 operand_forms
[i
] |= tic6x_coarse_operand_form (f
);
3040 num_operands_permitted
[num_operands
] = TRUE
;
3041 if (num_operands
> max_num_operands
)
3042 max_num_operands
= num_operands
;
3047 as_bad (_("'%.*s' instruction not supported on this architecture"),
3055 as_bad (_("'%.*s' instruction not supported on this functional unit"),
3061 if (!ok_this_arch_fu
)
3063 as_bad (_("'%.*s' instruction not supported on this functional unit"
3064 " for this architecture"),
3070 /* If there were no instructions matching the above availability
3071 checks, we should now have given an error and returned. */
3072 if (num_matching_opcodes
== 0)
3075 num_operands_read
= 0;
3078 skip_whitespace (p
);
3079 if (is_end_of_line
[(unsigned char) *p
])
3081 if (num_operands_read
> 0)
3083 as_bad (_("missing operand after comma"));
3084 bad_operands
= TRUE
;
3089 if (max_num_operands
== 0)
3091 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
3092 bad_operands
= TRUE
;
3096 if (!tic6x_parse_operand (&p
, &operands
[num_operands_read
],
3097 operand_forms
[num_operands_read
], str
, opc_len
,
3098 num_operands_read
+ 1))
3099 bad_operands
= TRUE
;
3100 num_operands_read
++;
3102 if (is_end_of_line
[(unsigned char) *p
])
3107 if (num_operands_read
== max_num_operands
)
3109 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
3110 bad_operands
= TRUE
;
3116 /* Operand parsing should consume whole operands. */
3120 if (!bad_operands
&& !num_operands_permitted
[num_operands_read
])
3122 as_bad (_("bad number of operands to '%.*s'"), opc_len
, str
);
3123 bad_operands
= TRUE
;
3128 /* Each operand is of the right syntactic form for some opcode
3129 choice, and the number of operands is valid. Check that each
3130 operand is OK in detail for some opcode choice with the right
3131 number of operands. */
3134 for (i
= 0; i
< num_operands_read
; i
++)
3136 bfd_boolean coarse_ok
= FALSE
;
3137 bfd_boolean fine_ok
= FALSE
;
3138 tic6x_operand_match fine_failure
= tic6x_match_matches
;
3141 for (j
= 0; j
< num_matching_opcodes
; j
++)
3143 tic6x_operand_form f
;
3146 tic6x_operand_match this_fine_failure
;
3148 if (tic6x_opcode_table
[opcm
[j
]].flags
& TIC6X_FLAG_SPMASK
)
3150 f
= tic6x_operand_func_unit
;
3155 if (tic6x_opcode_table
[opcm
[j
]].num_operands
3156 != num_operands_read
)
3159 f
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].form
;
3160 rw
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].rw
;
3162 cf
= tic6x_coarse_operand_form (f
);
3164 if (operands
[i
].form
!= cf
)
3169 = tic6x_operand_matches_form (&operands
[i
], f
, rw
,
3172 func_unit_data_side
);
3173 if (this_fine_failure
== tic6x_match_matches
)
3178 if (fine_failure
== tic6x_match_matches
3179 || fine_failure
> this_fine_failure
)
3180 fine_failure
= this_fine_failure
;
3183 /* No instructions should have operand syntactic forms only
3184 acceptable with certain numbers of operands, so no
3185 diagnostic for this case. */
3191 switch (fine_failure
)
3193 case tic6x_match_non_const
:
3194 as_bad (_("operand %u of '%.*s' not constant"),
3195 i
+ 1, opc_len
, str
);
3198 case tic6x_match_wrong_side
:
3199 as_bad (_("operand %u of '%.*s' on wrong side"),
3200 i
+ 1, opc_len
, str
);
3203 case tic6x_match_bad_return
:
3204 as_bad (_("operand %u of '%.*s' not a valid return "
3205 "address register"),
3206 i
+ 1, opc_len
, str
);
3209 case tic6x_match_ctrl_write_only
:
3210 as_bad (_("operand %u of '%.*s' is write-only"),
3211 i
+ 1, opc_len
, str
);
3214 case tic6x_match_ctrl_read_only
:
3215 as_bad (_("operand %u of '%.*s' is read-only"),
3216 i
+ 1, opc_len
, str
);
3219 case tic6x_match_bad_mem
:
3220 as_bad (_("operand %u of '%.*s' not a valid memory "
3222 i
+ 1, opc_len
, str
);
3225 case tic6x_match_bad_address
:
3226 as_bad (_("operand %u of '%.*s' not a valid base "
3227 "address register"),
3228 i
+ 1, opc_len
, str
);
3234 bad_operands
= TRUE
;
3242 /* Each operand is OK for some opcode choice, and the number of
3243 operands is valid. Check whether there is an opcode choice
3244 for which all operands are simultaneously valid. */
3246 bfd_boolean found_match
= FALSE
;
3248 for (i
= 0; i
< TIC6X_NUM_PREFER
; i
++)
3249 opc_rank
[i
] = (unsigned int) -1;
3251 min_rank
= TIC6X_NUM_PREFER
- 1;
3254 for (i
= 0; i
< num_matching_opcodes
; i
++)
3257 bfd_boolean this_matches
= TRUE
;
3259 if (!(tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3260 && tic6x_opcode_table
[opcm
[i
]].num_operands
!= num_operands_read
)
3263 for (j
= 0; j
< num_operands_read
; j
++)
3265 tic6x_operand_form f
;
3268 if (tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3270 f
= tic6x_operand_func_unit
;
3275 f
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].form
;
3276 rw
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].rw
;
3278 if (tic6x_operand_matches_form (&operands
[j
], f
, rw
,
3281 func_unit_data_side
)
3282 != tic6x_match_matches
)
3284 this_matches
= FALSE
;
3291 int rank
= TIC6X_PREFER_VAL (tic6x_opcode_table
[opcm
[i
]].flags
);
3293 if (rank
< min_rank
)
3295 if (rank
> max_rank
)
3298 if (opc_rank
[rank
] == (unsigned int) -1)
3301 /* The opcode table should provide a total ordering
3302 for all cases where multiple matches may get
3312 as_bad (_("bad operand combination for '%.*s'"), opc_len
, str
);
3313 bad_operands
= TRUE
;
3325 for (try_rank
= max_rank
; try_rank
>= min_rank
; try_rank
--)
3329 if (opc_rank
[try_rank
] == (unsigned int) -1)
3332 opcode_value
= tic6x_try_encode (opcm
[opc_rank
[try_rank
]], operands
,
3333 num_operands_read
, this_line_creg
,
3334 this_line_z
, func_unit_side
,
3335 func_unit_cross
, func_unit_data_side
,
3336 seginfo
->tc_segment_info_data
.sploop_ii
,
3337 &fix_exp
, &fix_pcrel
, &fx_r_type
,
3338 &fix_adda
, &fix_needed
, &encoded_ok
,
3339 (try_rank
== min_rank
? TRUE
: FALSE
),
3343 opct
= &tic6x_opcode_table
[opcm
[opc_rank
[try_rank
]]];
3353 if (this_line_parallel
)
3355 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
;
3356 if (insn_frag
== NULL
)
3358 as_bad (_("parallel instruction not following another instruction"));
3362 if (insn_frag
->fr_fix
>= 32)
3364 as_bad (_("too many instructions in execute packet"));
3368 if (this_insn_label_list
!= NULL
)
3369 as_bad (_("label not at start of execute packet"));
3371 if (opct
->flags
& TIC6X_FLAG_FIRST
)
3372 as_bad (_("'%.*s' instruction not at start of execute packet"),
3375 *seginfo
->tc_segment_info_data
.last_insn_lsb
|= 0x1;
3376 output
= insn_frag
->fr_literal
+ insn_frag
->fr_fix
;
3380 tic6x_label_list
*l
;
3382 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
3383 seginfo
->tc_segment_info_data
.func_units_used
= 0;
3385 /* Start a new frag for this execute packet. */
3386 if (frag_now_fix () != 0)
3388 if (frag_now
->fr_type
!= rs_machine_dependent
)
3389 frag_wane (frag_now
);
3394 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
= frag_now
;
3395 for (l
= this_insn_label_list
; l
; l
= l
->next
)
3397 symbol_set_frag (l
->label
, frag_now
);
3398 S_SET_VALUE (l
->label
, 0);
3399 S_SET_SEGMENT (l
->label
, now_seg
);
3401 tic6x_free_label_list (this_insn_label_list
);
3402 dwarf2_emit_insn (0);
3403 output
= frag_var (rs_machine_dependent
, 32, 32, 0, NULL
, 0, NULL
);
3404 /* This must be the same as the frag to which a pointer was just
3406 if (output
!= insn_frag
->fr_literal
)
3408 insn_frag
->tc_frag_data
.is_insns
= TRUE
;
3409 insn_frag
->tc_frag_data
.can_cross_fp_boundary
3410 = tic6x_can_cross_fp_boundary
;
3413 if (func_unit_base
!= tic6x_func_unit_nfu
)
3415 unsigned int func_unit_enc
;
3417 func_unit_enc
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3419 if (seginfo
->tc_segment_info_data
.func_units_used
& func_unit_enc
)
3420 as_bad (_("functional unit already used in this execute packet"));
3422 seginfo
->tc_segment_info_data
.func_units_used
|= func_unit_enc
;
3425 if (opct
->flags
& TIC6X_FLAG_SPLOOP
)
3427 if (seginfo
->tc_segment_info_data
.sploop_ii
)
3428 as_bad (_("nested software pipelined loop"));
3429 if (num_operands_read
!= 1
3430 || operands
[0].form
!= TIC6X_OP_EXP
3431 || operands
[0].value
.exp
.X_op
!= O_constant
)
3433 seginfo
->tc_segment_info_data
.sploop_ii
3434 = operands
[0].value
.exp
.X_add_number
;
3436 else if (opct
->flags
& TIC6X_FLAG_SPKERNEL
)
3438 if (!seginfo
->tc_segment_info_data
.sploop_ii
)
3439 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3441 seginfo
->tc_segment_info_data
.sploop_ii
= 0;
3444 if (this_line_spmask
)
3446 if (seginfo
->tc_segment_info_data
.spmask_addr
== NULL
)
3447 as_bad (_("'||^' without previous SPMASK"));
3448 else if (func_unit_base
== tic6x_func_unit_nfu
)
3449 as_bad (_("cannot mask instruction using no functional unit"));
3452 unsigned int spmask_opcode
;
3453 unsigned int mask_bit
;
3456 = md_chars_to_number (seginfo
->tc_segment_info_data
.spmask_addr
,
3458 mask_bit
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3460 if (spmask_opcode
& mask_bit
)
3461 as_bad (_("functional unit already masked"));
3462 spmask_opcode
|= mask_bit
;
3463 md_number_to_chars (seginfo
->tc_segment_info_data
.spmask_addr
,
3468 record_alignment (now_seg
, 5);
3469 md_number_to_chars (output
, opcode_value
, 4);
3471 tic6x_fix_new_exp (insn_frag
, output
- insn_frag
->fr_literal
, 4, fix_exp
,
3472 fix_pcrel
, fx_r_type
, fix_adda
);
3473 insn_frag
->fr_fix
+= 4;
3474 insn_frag
->fr_var
-= 4;
3475 seginfo
->tc_segment_info_data
.last_insn_lsb
3476 = (target_big_endian
? output
+ 3 : output
);
3477 if (opct
->flags
& TIC6X_FLAG_SPMASK
)
3478 seginfo
->tc_segment_info_data
.spmask_addr
= output
;
3481 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3482 and the least significant BITS bits taken, at position POS. */
3483 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3485 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3486 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3489 /* Apply a fixup to the object file. */
3492 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3494 offsetT value
= *valP
;
3495 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3497 value
= SEXT (value
);
3500 fixP
->fx_offset
= SEXT (fixP
->fx_offset
);
3502 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3505 /* We do our own overflow checks. */
3506 fixP
->fx_no_overflow
= 1;
3508 switch (fixP
->fx_r_type
)
3510 case BFD_RELOC_NONE
:
3511 /* Force output to the object file. */
3516 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3517 md_number_to_chars (buf
, value
, 4);
3521 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3523 if (value
< -0x8000 || value
> 0xffff)
3524 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3525 _("value too large for 2-byte field"));
3526 md_number_to_chars (buf
, value
, 2);
3531 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3533 if (value
< -0x80 || value
> 0xff)
3534 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3535 _("value too large for 1-byte field"));
3536 md_number_to_chars (buf
, value
, 1);
3540 case BFD_RELOC_C6000_ABS_S16
:
3541 case BFD_RELOC_C6000_ABS_L16
:
3542 case BFD_RELOC_C6000_SBR_S16
:
3543 case BFD_RELOC_C6000_SBR_L16_B
:
3544 case BFD_RELOC_C6000_SBR_L16_H
:
3545 case BFD_RELOC_C6000_SBR_L16_W
:
3546 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3547 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3549 offsetT newval
= md_chars_to_number (buf
, 4);
3552 switch (fixP
->fx_r_type
)
3554 case BFD_RELOC_C6000_SBR_L16_H
:
3558 case BFD_RELOC_C6000_SBR_L16_W
:
3559 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3568 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3569 if ((value
< -0x8000 || value
> 0x7fff)
3570 && (fixP
->fx_r_type
== BFD_RELOC_C6000_ABS_S16
3571 || fixP
->fx_r_type
== BFD_RELOC_C6000_SBR_S16
))
3572 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3573 _("immediate offset out of range"));
3575 md_number_to_chars (buf
, newval
, 4);
3578 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_S16
3579 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_L16
)
3583 case BFD_RELOC_C6000_ABS_H16
:
3584 case BFD_RELOC_C6000_SBR_H16_B
:
3585 case BFD_RELOC_C6000_SBR_H16_H
:
3586 case BFD_RELOC_C6000_SBR_H16_W
:
3587 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3588 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3590 offsetT newval
= md_chars_to_number (buf
, 4);
3593 switch (fixP
->fx_r_type
)
3595 case BFD_RELOC_C6000_SBR_H16_H
:
3599 case BFD_RELOC_C6000_SBR_H16_W
:
3600 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3609 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3611 md_number_to_chars (buf
, newval
, 4);
3613 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_H16
)
3617 case BFD_RELOC_C6000_SBR_U15_B
:
3618 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3620 offsetT newval
= md_chars_to_number (buf
, 4);
3622 MODIFY_VALUE (newval
, value
, 0, 8, 15);
3623 if (value
< 0 || value
> 0x7fff)
3624 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3625 _("immediate offset out of range"));
3627 md_number_to_chars (buf
, newval
, 4);
3631 case BFD_RELOC_C6000_SBR_U15_H
:
3632 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3634 offsetT newval
= md_chars_to_number (buf
, 4);
3636 /* Constant ADDA operands, processed as constant when the
3637 instruction is parsed, are encoded as-is rather than
3638 shifted. If the operand of an ADDA instruction is now
3639 constant (for example, the difference between two labels
3640 found after the instruction), ensure it is encoded the
3641 same way it would have been if the constant value had
3642 been known when the instruction was parsed. */
3643 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3646 MODIFY_VALUE (newval
, value
, 1, 8, 15);
3648 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3649 _("immediate offset not 2-byte-aligned"));
3650 if (value
< 0 || value
> 0xfffe)
3651 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3652 _("immediate offset out of range"));
3654 md_number_to_chars (buf
, newval
, 4);
3658 case BFD_RELOC_C6000_SBR_U15_W
:
3659 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
3660 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3662 offsetT newval
= md_chars_to_number (buf
, 4);
3664 /* Constant ADDA operands, processed as constant when the
3665 instruction is parsed, are encoded as-is rather than
3666 shifted. If the operand of an ADDA instruction is now
3667 constant (for example, the difference between two labels
3668 found after the instruction), ensure it is encoded the
3669 same way it would have been if the constant value had
3670 been known when the instruction was parsed. */
3671 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3674 MODIFY_VALUE (newval
, value
, 2, 8, 15);
3676 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3677 _("immediate offset not 4-byte-aligned"));
3678 if (value
< 0 || value
> 0x1fffc)
3679 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3680 _("immediate offset out of range"));
3682 md_number_to_chars (buf
, newval
, 4);
3684 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_SBR_U15_W
)
3688 case BFD_RELOC_C6000_DSBT_INDEX
:
3690 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3691 _("addend used with $DSBT_INDEX"));
3696 case BFD_RELOC_C6000_PCR_S21
:
3697 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3699 offsetT newval
= md_chars_to_number (buf
, 4);
3701 MODIFY_VALUE (newval
, value
, 2, 7, 21);
3704 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3705 _("PC-relative offset not 4-byte-aligned"));
3706 if (value
< -0x400000 || value
> 0x3ffffc)
3707 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3708 _("PC-relative offset out of range"));
3710 md_number_to_chars (buf
, newval
, 4);
3714 case BFD_RELOC_C6000_PCR_S12
:
3715 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3717 offsetT newval
= md_chars_to_number (buf
, 4);
3719 MODIFY_VALUE (newval
, value
, 2, 16, 12);
3722 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3723 _("PC-relative offset not 4-byte-aligned"));
3724 if (value
< -0x2000 || value
> 0x1ffc)
3725 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3726 _("PC-relative offset out of range"));
3728 md_number_to_chars (buf
, newval
, 4);
3732 case BFD_RELOC_C6000_PCR_S10
:
3733 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3735 offsetT newval
= md_chars_to_number (buf
, 4);
3737 MODIFY_VALUE (newval
, value
, 2, 13, 10);
3740 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3741 _("PC-relative offset not 4-byte-aligned"));
3742 if (value
< -0x800 || value
> 0x7fc)
3743 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3744 _("PC-relative offset out of range"));
3746 md_number_to_chars (buf
, newval
, 4);
3750 case BFD_RELOC_C6000_PCR_S7
:
3751 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3753 offsetT newval
= md_chars_to_number (buf
, 4);
3755 MODIFY_VALUE (newval
, value
, 2, 16, 7);
3758 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3759 _("PC-relative offset not 4-byte-aligned"));
3760 if (value
< -0x100 || value
> 0xfc)
3761 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3762 _("PC-relative offset out of range"));
3764 md_number_to_chars (buf
, newval
, 4);
3773 /* Convert a floating-point number to target (IEEE) format. */
3776 md_atof (int type
, char *litP
, int *sizeP
)
3778 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3781 /* Adjust the frags in SECTION (see tic6x_end). */
3784 tic6x_adjust_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT section
,
3785 void *dummy ATTRIBUTE_UNUSED
)
3787 segment_info_type
*info
;
3790 bfd_boolean have_code
= FALSE
;
3791 bfd_boolean have_non_code
= FALSE
;
3793 info
= seg_info (section
);
3797 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3798 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3799 switch (fragp
->fr_type
)
3801 case rs_machine_dependent
:
3802 if (fragp
->tc_frag_data
.is_insns
)
3808 if (fragp
->fr_fix
> 0)
3809 have_non_code
= TRUE
;
3813 have_non_code
= TRUE
;
3817 /* Process alignment requirements in a code-only section. */
3818 if (have_code
&& !have_non_code
)
3820 /* If we need to insert an odd number of instructions to meet an
3821 alignment requirement, there must have been an odd number of
3822 instructions since the last 8-byte-aligned execute packet
3823 boundary. So there must have been an execute packet with an
3824 odd number (and so a number fewer than 8) of instructions
3825 into which we can insert a NOP without breaking any previous
3828 If then we need to insert a number 2 mod 4 of instructions,
3829 the number of instructions since the last 16-byte-aligned
3830 execute packet boundary must be 2 mod 4. So between that
3831 boundary and the following 8-byte-aligned boundary there must
3832 either be at least one execute packet with 2-mod-4
3833 instructions, or at least two with an odd number of
3834 instructions; again, greedily inserting NOPs as soon as
3835 possible suffices to meet the alignment requirement.
3837 If then we need to insert 4 instructions, we look between the
3838 last 32-byte-aligned boundary and the following
3839 16-byte-aligned boundary. The sizes of the execute packets
3840 in this range total 4 instructions mod 8, so again there is
3841 room for greedy insertion of NOPs to meet the alignment
3842 requirement, and before any intermediate point with 8-byte
3843 (2-instruction) alignment requirement the sizes of execute
3844 packets (and so the room for NOPs) will total 2 instructions
3845 mod 4 so greedy insertion will not break such alignments.
3847 So we can always meet these alignment requirements by
3848 inserting NOPs in parallel with existing execute packets, and
3849 by induction the approach described above inserts the minimum
3850 number of such NOPs. */
3852 /* The number of NOPs we are currently looking to insert, if we
3853 have gone back to insert NOPs. */
3854 unsigned int want_insert
= 0;
3856 /* Out of that number, the number inserted so far in the current
3857 stage of the above algorithm. */
3858 unsigned int want_insert_done_so_far
= 0;
3860 /* The position mod 32 at the start of the current frag. */
3861 unsigned int pos
= 0;
3863 /* The locations in the frag chain of the most recent frags at
3864 the start of which there is the given alignment. */
3865 frchainS
*frchp_last32
, *frchp_last16
, *frchp_last8
;
3866 fragS
*fragp_last32
, *fragp_last16
, *fragp_last8
;
3867 unsigned int pos_last32
, pos_last16
, pos_last8
;
3869 frchp_last32
= frchp_last16
= frchp_last8
= info
->frchainP
;
3870 fragp_last32
= fragp_last16
= fragp_last8
= info
->frchainP
->frch_root
;
3871 pos_last32
= pos_last16
= pos_last8
= 0;
3873 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3874 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3877 bfd_boolean go_back
= FALSE
;
3878 frchainS
*frchp_next
;
3881 if (fragp
->fr_type
!= rs_machine_dependent
)
3884 if (fragp
->tc_frag_data
.is_insns
3885 && pos
+ fragp
->fr_fix
> 32
3886 && !fragp
->tc_frag_data
.can_cross_fp_boundary
)
3888 /* As described above, we should always have met an
3889 alignment requirement by the time we come back to
3896 want_insert
= (32 - pos
) >> 2;
3897 if (want_insert
> 7)
3899 want_insert_done_so_far
= 0;
3903 if (!fragp
->tc_frag_data
.is_insns
)
3905 unsigned int would_insert_bytes
;
3907 if (!(pos
& ((1 << fragp
->fr_offset
) - 1)))
3908 /* This alignment requirement is already met. */
3911 /* As described above, we should always have met an
3912 alignment requirement by the time we come back to
3917 /* We may not be able to meet this requirement within
3918 the given number of characters. */
3920 = ((1 << fragp
->fr_offset
)
3921 - (pos
& ((1 << fragp
->fr_offset
) - 1)));
3923 if (fragp
->fr_subtype
!= 0
3924 && would_insert_bytes
> fragp
->fr_subtype
)
3927 /* An unmet alignment must be 8, 16 or 32 bytes;
3928 smaller ones must always be met within code-only
3929 sections and larger ones cause the section not to
3931 if (fragp
->fr_offset
!= 3
3932 && fragp
->fr_offset
!= 4
3933 && fragp
->fr_offset
!= 5)
3936 if (would_insert_bytes
& 3)
3938 want_insert
= would_insert_bytes
>> 2;
3939 if (want_insert
> 7)
3941 want_insert_done_so_far
= 0;
3944 else if (want_insert
&& !go_back
)
3946 unsigned int num_insns
= fragp
->fr_fix
>> 2;
3947 unsigned int max_poss_nops
= 8 - num_insns
;
3951 unsigned int cur_want_nops
, max_want_nops
, do_nops
, i
;
3953 if (want_insert
& 1)
3955 else if (want_insert
& 2)
3957 else if (want_insert
& 4)
3962 max_want_nops
= cur_want_nops
- want_insert_done_so_far
;
3964 do_nops
= (max_poss_nops
< max_want_nops
3967 for (i
= 0; i
< do_nops
; i
++)
3969 md_number_to_chars (fragp
->fr_literal
+ fragp
->fr_fix
,
3971 if (target_big_endian
)
3972 fragp
->fr_literal
[fragp
->fr_fix
- 1] |= 0x1;
3974 fragp
->fr_literal
[fragp
->fr_fix
- 4] |= 0x1;
3978 want_insert_done_so_far
+= do_nops
;
3979 if (want_insert_done_so_far
== cur_want_nops
)
3981 want_insert
-= want_insert_done_so_far
;
3982 want_insert_done_so_far
= 0;
3990 if (want_insert
& 1)
3992 frchp
= frchp_last8
;
3993 fragp
= fragp_last8
;
3996 else if (want_insert
& 2)
3998 frchp
= frchp_last8
= frchp_last16
;
3999 fragp
= fragp_last8
= fragp_last16
;
4000 pos
= pos_last8
= pos_last16
;
4002 else if (want_insert
& 4)
4004 frchp
= frchp_last8
= frchp_last16
= frchp_last32
;
4005 fragp
= fragp_last8
= fragp_last16
= fragp_last32
;
4006 pos
= pos_last8
= pos_last16
= pos_last32
;
4014 /* Update current position for moving past a code
4016 pos
+= fragp
->fr_fix
;
4019 fragp_next
= fragp
->fr_next
;
4020 if (fragp_next
== NULL
)
4022 frchp_next
= frchp
->frch_next
;
4023 if (frchp_next
!= NULL
)
4024 fragp_next
= frchp_next
->frch_root
;
4028 frchp_last8
= frchp_next
;
4029 fragp_last8
= fragp_next
;
4034 frchp_last16
= frchp_next
;
4035 fragp_last16
= fragp_next
;
4040 frchp_last32
= frchp_next
;
4041 fragp_last32
= fragp_next
;
4047 /* Now convert the machine-dependent frags to machine-independent
4049 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
4050 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
4052 if (fragp
->fr_type
== rs_machine_dependent
)
4054 if (fragp
->tc_frag_data
.is_insns
)
4058 fragp
->fr_type
= rs_align_code
;
4060 *fragp
->fr_literal
= 0;
4066 /* Initialize the machine-dependent parts of a frag. */
4069 tic6x_frag_init (fragS
*fragp
)
4071 fragp
->tc_frag_data
.is_insns
= FALSE
;
4072 fragp
->tc_frag_data
.can_cross_fp_boundary
= FALSE
;
4075 /* Set an attribute if it has not already been set by the user. */
4078 tic6x_set_attribute_int (int tag
, int value
)
4081 || tag
>= NUM_KNOWN_OBJ_ATTRIBUTES
)
4083 if (!tic6x_attributes_set_explicitly
[tag
])
4084 bfd_elf_add_proc_attr_int (stdoutput
, tag
, value
);
4087 /* Set object attributes deduced from the input file and command line
4088 rather than given explicitly. */
4090 tic6x_set_attributes (void)
4092 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
4093 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
4095 tic6x_set_attribute_int (Tag_ISA
, tic6x_arch_attribute
);
4096 tic6x_set_attribute_int (Tag_ABI_DSBT
, tic6x_dsbt
);
4097 tic6x_set_attribute_int (Tag_ABI_PID
, tic6x_pid
);
4098 tic6x_set_attribute_int (Tag_ABI_PIC
, tic6x_pic
);
4101 /* Do machine-dependent manipulations of the frag chains after all
4102 input has been read and before the machine-independent sizing and
4108 /* Set object attributes at this point if not explicitly set. */
4109 tic6x_set_attributes ();
4111 /* Meeting alignment requirements may require inserting NOPs in
4112 parallel in execute packets earlier in the segment. Future
4113 16-bit instruction generation involves whole-segment optimization
4114 to determine the best choice and ordering of 32-bit or 16-bit
4115 instructions. This doesn't fit will in the general relaxation
4116 framework, so handle alignment and 16-bit instruction generation
4118 bfd_map_over_sections (stdoutput
, tic6x_adjust_section
, NULL
);
4121 /* No machine-dependent frags at this stage; all converted in
4125 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT asec ATTRIBUTE_UNUSED
,
4126 fragS
*fragp ATTRIBUTE_UNUSED
)
4131 /* No machine-dependent frags at this stage; all converted in
4135 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
4136 segT seg ATTRIBUTE_UNUSED
)
4141 /* Put a number into target byte order. */
4144 md_number_to_chars (char *buf
, valueT val
, int n
)
4146 if (target_big_endian
)
4147 number_to_chars_bigendian (buf
, val
, n
);
4149 number_to_chars_littleendian (buf
, val
, n
);
4152 /* Machine-dependent operand parsing not currently needed. */
4155 md_operand (expressionS
*op ATTRIBUTE_UNUSED
)
4159 /* PC-relative operands are relative to the start of the fetch
4163 tic6x_pcrel_from_section (fixS
*fixp
, segT sec
)
4165 if (fixp
->fx_addsy
!= NULL
4166 && (!S_IS_DEFINED (fixp
->fx_addsy
)
4167 || S_GET_SEGMENT (fixp
->fx_addsy
) != sec
))
4169 return (fixp
->fx_where
+ fixp
->fx_frag
->fr_address
) & ~(long) 0x1f;
4172 /* Round up a section size to the appropriate boundary. */
4175 md_section_align (segT segment ATTRIBUTE_UNUSED
,
4178 /* Round up section sizes to ensure that text sections consist of
4179 whole fetch packets. */
4180 int align
= bfd_get_section_alignment (stdoutput
, segment
);
4181 return ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4184 /* No special undefined symbol handling needed for now. */
4187 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4192 /* Translate internal representation of relocation info to BFD target
4196 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4200 bfd_reloc_code_real_type r_type
;
4202 reloc
= xmalloc (sizeof (arelent
));
4203 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
4204 symbol
= symbol_get_bfdsym (fixp
->fx_addsy
);
4205 *reloc
->sym_ptr_ptr
= symbol
;
4206 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4207 reloc
->addend
= (tic6x_generate_rela
? fixp
->fx_offset
: 0);
4208 r_type
= fixp
->fx_r_type
;
4209 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4211 if (reloc
->howto
== NULL
)
4213 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4214 _("Cannot represent relocation type %s"),
4215 bfd_get_reloc_code_name (r_type
));
4219 /* Correct for adjustments bfd_install_relocation will make. */
4220 if (reloc
->howto
->pcrel_offset
&& reloc
->howto
->partial_inplace
)
4222 reloc
->addend
+= reloc
->address
;
4223 if (!bfd_is_com_section (symbol
))
4224 reloc
->addend
-= symbol
->value
;