1 /* tc-tic80.c -- Assemble for the TI TMS320C80 (MV)
2 Copyright 1996, 1997, 2000, 2001, 2002 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 #include "safe-ctype.h"
23 #include "opcode/tic80.h"
25 #define internal_error(what) \
26 as_fatal (_("internal error:%s:%d: %s\n"), __FILE__, __LINE__, what)
28 #define internal_error_a(what,arg) \
29 as_fatal (_("internal error:%s:%d: %s %ld\n"), __FILE__, __LINE__, what, arg)
31 /* Generic assembler global variables which must be defined by all
34 /* Characters which always start a comment. */
35 const char comment_chars
[] = ";";
37 /* Characters which start a comment at the beginning of a line. */
38 const char line_comment_chars
[] = ";*#";
40 /* Characters which may be used to separate multiple commands on a single
41 line. The semicolon is such a character by default and should not be
43 const char line_separator_chars
[] = "";
45 /* Characters which are used to indicate an exponent in a floating
47 const char EXP_CHARS
[] = "eE";
49 /* Characters which mean that a number is a floating point constant,
51 const char FLT_CHARS
[] = "fF";
53 /* This table describes all the machine specific pseudo-ops the assembler
54 has to support. The fields are:
56 pseudo-op name without dot
57 function to call to execute this pseudo-op
58 integer arg to pass to the function */
60 const pseudo_typeS md_pseudo_table
[] = {
61 { "align", s_align_bytes
, 4 }, /* Do byte alignment, default is a 4 byte boundary */
62 { "word", cons
, 4 }, /* FIXME: Should this be machine independent? */
63 { "bss", s_lcomm_bytes
, 1 },
64 { "sect", obj_coff_section
, 0}, /* For compatibility with TI tools */
65 { "section", obj_coff_section
, 0}, /* Standard COFF .section pseudo-op */
69 /* Opcode hash table. */
70 static struct hash_control
*tic80_hash
;
72 static struct tic80_opcode
* find_opcode
PARAMS ((struct tic80_opcode
*, expressionS
[]));
73 static void build_insn
PARAMS ((struct tic80_opcode
*, expressionS
*));
74 static int get_operands
PARAMS ((expressionS exp
[]));
75 static int const_overflow
PARAMS ((unsigned long num
, int bits
, int flags
));
77 /* Replace short PC relative instructions with long form when
78 necessary. Currently this is off by default or when given the
79 -no-relax option. Turning it on by using the -relax option forces
80 all PC relative instructions to use the long form, which is why it
81 is currently not the default. */
82 static int tic80_relax
= 0;
85 md_estimate_size_before_relax (fragP
, segment_type
)
86 fragS
*fragP ATTRIBUTE_UNUSED
;
87 segT segment_type ATTRIBUTE_UNUSED
;
89 internal_error (_("Relaxation is a luxury we can't afford"));
93 /* We have no need to default values of symbols. */
96 md_undefined_symbol (name
)
97 char *name ATTRIBUTE_UNUSED
;
102 /* Turn a string in input_line_pointer into a floating point constant
103 of type TYPE, and store the appropriate bytes in *LITP. The number
104 of LITTLENUMS emitted is stored in *SIZEP. An error message is
105 returned, or NULL on OK. */
107 #define MAX_LITTLENUMS 4
110 md_atof (type
, litP
, sizeP
)
116 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
117 LITTLENUM_TYPE
*wordP
;
138 return _("bad call to md_atof ()");
141 t
= atof_ieee (input_line_pointer
, type
, words
);
144 input_line_pointer
= t
;
147 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
149 for (wordP
= words
; prec
--;)
151 md_number_to_chars (litP
, (valueT
) (*wordP
++), sizeof (LITTLENUM_TYPE
));
152 litP
+= sizeof (LITTLENUM_TYPE
);
157 /* Check to see if the constant value in NUM will fit in a field of
158 width BITS if it has flags FLAGS. */
161 const_overflow (num
, bits
, flags
)
169 /* Only need to check fields less than 32 bits wide. */
173 if (flags
& TIC80_OPERAND_SIGNED
)
175 max
= (1 << (bits
- 1)) - 1;
176 min
= - (1 << (bits
- 1));
177 retval
= (long) num
> max
|| (long) num
< min
;
181 max
= (1 << bits
) - 1;
182 retval
= num
> (unsigned long) max
;
187 /* get_operands () parses a string of operands and fills in a passed
188 array of expressions in EXP.
190 Note that we use O_absent expressions to record additional information
191 about the previous non-O_absent expression, such as ":m" or ":s"
192 modifiers or register numbers enclosed in parens like "(r10)".
194 Returns the number of expressions that were placed in EXP. */
200 char *p
= input_line_pointer
;
206 /* Skip leading whitespace. */
207 while (*p
== ' ' || *p
== '\t' || *p
== ',')
210 /* Check to see if we have any operands left to parse. */
211 if (*p
== 0 || *p
== '\n' || *p
== '\r')
214 /* Notice scaling or direct memory operand modifiers and save them in
215 an O_absent expression after the expression that they modify. */
220 exp
[numexp
].X_op
= O_absent
;
224 /* This is a ":m" modifier. */
225 exp
[numexp
].X_add_number
= TIC80_OPERAND_M_SI
| TIC80_OPERAND_M_LI
;
230 /* This is a ":s" modifier. */
231 exp
[numexp
].X_add_number
= TIC80_OPERAND_SCALED
;
235 as_bad (_("':' not followed by 'm' or 's'"));
241 /* Handle leading '(' on operands that use them, by recording that we
242 have entered a paren nesting level and then continuing. We complain
243 about multiple nesting. */
248 as_bad (_("paren nesting"));
254 /* Handle trailing ')' on operands that use them, by reducing the
255 nesting level and then continuing. We complain if there were too
260 /* Record that we have left a paren group and continue. */
262 as_bad (_("mismatched parenthesis"));
268 /* Begin operand parsing at the current scan point. */
270 input_line_pointer
= p
;
271 expression (&exp
[numexp
]);
273 if (exp
[numexp
].X_op
== O_illegal
)
275 as_bad (_("illegal operand"));
277 else if (exp
[numexp
].X_op
== O_absent
)
279 as_bad (_("missing operand"));
283 p
= input_line_pointer
;
288 exp
[numexp
].X_op
= O_absent
;
289 exp
[numexp
++].X_add_number
= TIC80_OPERAND_PARENS
;
292 /* Mark the end of the valid operands with an illegal expression. */
293 exp
[numexp
].X_op
= O_illegal
;
298 /* find_opcode() gets a pointer to the entry in the opcode table that
299 matches the instruction being assembled, or returns NULL if no such match
302 First it parses all the operands and save them as expressions. Note that
303 we use O_absent expressions to record additional information about the
304 previous non-O_absent expression, such as ":m" or ":s" modifiers or
305 register numbers enclosed in parens like "(r10)".
307 It then looks at all opcodes with the same name and uses the operands to
308 choose the correct opcode. */
310 static struct tic80_opcode
*
311 find_opcode (opcode
, myops
)
312 struct tic80_opcode
*opcode
;
315 int numexp
; /* Number of expressions from parsing operands */
316 int expi
; /* Index of current expression to match */
317 int opi
; /* Index of current operand to match */
318 int match
= 0; /* Set to 1 when an operand match is found */
319 struct tic80_opcode
*opc
= opcode
; /* Pointer to current opcode table entry */
320 const struct tic80_opcode
*end
; /* Pointer to end of opcode table */
322 /* First parse all the operands so we only have to do it once. There may
323 be more expressions generated than there are operands. */
325 numexp
= get_operands (myops
);
327 /* For each opcode with the same name, try to match it against the parsed
330 end
= tic80_opcodes
+ tic80_num_opcodes
;
331 while (!match
&& (opc
< end
) && (strcmp (opc
->name
, opcode
->name
) == 0))
333 /* Start off assuming a match. If we find a mismatch, then this is
334 reset and the operand/expr matching loop terminates with match
335 equal to zero, which allows us to try the next opcode. */
339 /* For each expression, try to match it against the current operand
340 for the current opcode. Upon any mismatch, we abandon further
341 matching for the current opcode table entry. */
343 for (expi
= 0, opi
= -1; (expi
< numexp
) && match
; expi
++)
345 int bits
, flags
, X_op
, num
;
347 X_op
= myops
[expi
].X_op
;
348 num
= myops
[expi
].X_add_number
;
350 /* The O_absent expressions apply to the same operand as the most
351 recent non O_absent expression. So only increment the operand
352 index when the current expression is not one of these special
355 if (X_op
!= O_absent
)
360 flags
= tic80_operands
[opc
->operands
[opi
]].flags
;
361 bits
= tic80_operands
[opc
->operands
[opi
]].bits
;
366 /* Also check that registers that are supposed to be
367 even actually are even. */
368 if (((flags
& TIC80_OPERAND_GPR
) != (num
& TIC80_OPERAND_GPR
)) ||
369 ((flags
& TIC80_OPERAND_FPA
) != (num
& TIC80_OPERAND_FPA
)) ||
370 ((flags
& TIC80_OPERAND_CR
) != (num
& TIC80_OPERAND_CR
)) ||
371 ((flags
& TIC80_OPERAND_EVEN
) && (num
& 1)) ||
372 const_overflow (num
& ~TIC80_OPERAND_MASK
, bits
, flags
))
378 if ((flags
& TIC80_OPERAND_ENDMASK
) && (num
== 32))
380 /* Endmask values of 0 and 32 give identical
384 if ((flags
& (TIC80_OPERAND_FPA
| TIC80_OPERAND_GPR
)) ||
385 const_overflow (num
, bits
, flags
))
391 if ((bits
< 32) && (flags
& TIC80_OPERAND_PCREL
)
394 /* The default is to prefer the short form of PC
395 relative relocations. This is the only form that
396 the TI assembler supports. If the -relax option
397 is given, we never use the short forms.
398 FIXME: Should be able to choose "best-fit". */
400 else if ((bits
== 32))
402 /* The default is to prefer the long form of base
403 relative relocations. This is the only form that
404 the TI assembler supports. If the -no-relax
405 option is given, we always use the long form of
406 PC relative relocations.
407 FIXME: Should be able to choose "best-fit". */
411 /* Symbols that don't match one of the above cases are
412 rejected as an operand. */
417 /* If this is an O_absent expression, then it may be an
418 expression that supplies additional information about
419 the operand, such as ":m" or ":s" modifiers. Check to
420 see that the operand matches this requirement. */
421 if (!((num
& flags
& TIC80_OPERAND_M_SI
)
422 || (num
& flags
& TIC80_OPERAND_M_LI
)
423 || (num
& flags
& TIC80_OPERAND_SCALED
)))
429 if ((num
> 0) || !(flags
& TIC80_OPERAND_FLOAT
))
444 case O_bit_inclusive_or
:
446 case O_bit_exclusive_or
:
460 internal_error_a (_("unhandled expression type"), (long) X_op
);
467 return (match
? opc
: NULL
);
471 /* build_insn takes a pointer to the opcode entry in the opcode table
472 and the array of operand expressions and writes out the instruction.
474 Note that the opcode word and extended word may be written to different
475 frags, with the opcode at the end of one frag and the extension at the
476 beginning of the next. */
479 build_insn (opcode
, opers
)
480 struct tic80_opcode
*opcode
;
483 int expi
; /* Index of current expression to match */
484 int opi
; /* Index of current operand to match */
485 unsigned long insn
[2]; /* Instruction and long immediate (if any) */
486 char *f
; /* Pointer to frag location for insn[0] */
487 fragS
*ffrag
; /* Frag containing location f */
488 char *fx
= NULL
; /* Pointer to frag location for insn[1] */
489 fragS
*fxfrag
; /* Frag containing location fx */
491 /* Start with the raw opcode bits from the opcode table. */
492 insn
[0] = opcode
->opcode
;
494 /* We are going to insert at least one 32 bit opcode so get the
500 /* For each operand expression, insert the appropriate bits into the
502 for (expi
= 0, opi
= -1; opers
[expi
].X_op
!= O_illegal
; expi
++)
504 int bits
, shift
, flags
, X_op
, num
;
506 X_op
= opers
[expi
].X_op
;
507 num
= opers
[expi
].X_add_number
;
509 /* The O_absent expressions apply to the same operand as the most
510 recent non O_absent expression. So only increment the operand
511 index when the current expression is not one of these special
514 if (X_op
!= O_absent
)
519 flags
= tic80_operands
[opcode
->operands
[opi
]].flags
;
520 bits
= tic80_operands
[opcode
->operands
[opi
]].bits
;
521 shift
= tic80_operands
[opcode
->operands
[opi
]].shift
;
526 num
&= ~TIC80_OPERAND_MASK
;
527 insn
[0] = insn
[0] | (num
<< shift
);
530 if ((flags
& TIC80_OPERAND_ENDMASK
) && (num
== 32))
532 /* Endmask values of 0 and 32 give identical results. */
535 else if ((flags
& TIC80_OPERAND_BITNUM
))
537 /* BITNUM values are stored in one's complement form. */
540 /* Mask off upper bits, just it case it is signed and is
544 num
&= (1 << bits
) - 1;
545 insn
[0] = insn
[0] | (num
<< shift
);
560 if (flags
& TIC80_OPERAND_PCREL
)
563 fx
- (fxfrag
->fr_literal
),
572 fx
- (fxfrag
->fr_literal
),
579 else if (flags
& TIC80_OPERAND_PCREL
)
582 f
- (ffrag
->fr_literal
),
583 4, /* FIXME! how is this used? */
590 internal_error (_("symbol reloc that is not PC relative or 32 bits"));
594 /* Each O_absent expression can indicate exactly one
595 possible modifier. */
596 if ((num
& TIC80_OPERAND_M_SI
)
597 && (flags
& TIC80_OPERAND_M_SI
))
599 insn
[0] = insn
[0] | (1 << 17);
601 else if ((num
& TIC80_OPERAND_M_LI
)
602 && (flags
& TIC80_OPERAND_M_LI
))
604 insn
[0] = insn
[0] | (1 << 15);
606 else if ((num
& TIC80_OPERAND_SCALED
)
607 && (flags
& TIC80_OPERAND_SCALED
))
609 insn
[0] = insn
[0] | (1 << 11);
611 else if ((num
& TIC80_OPERAND_PARENS
)
612 && (flags
& TIC80_OPERAND_PARENS
))
614 /* No code to generate, just accept and discard this
619 internal_error_a (_("unhandled operand modifier"),
620 (long) opers
[expi
].X_add_number
);
628 long exponent_bits
= 8L;
629 LITTLENUM_TYPE words
[2];
630 /* Value is still in generic_floating_point_number. */
631 gen_to_words (words
, precision
, exponent_bits
);
632 insn
[1] = (words
[0] << 16) | words
[1];
645 case O_bit_inclusive_or
:
647 case O_bit_exclusive_or
:
661 internal_error_a (_("unhandled expression"), (long) X_op
);
666 /* Write out the instruction, either 4 or 8 bytes. */
668 md_number_to_chars (f
, insn
[0], 4);
671 md_number_to_chars (fx
, insn
[1], 4);
675 /* This is the main entry point for the machine-dependent assembler. Gas
676 calls this function for each input line which does not contain a
679 STR points to a NULL terminated machine dependent instruction. This
680 function is supposed to emit the frags/bytes it assembles to. */
687 unsigned char *input_line_save
;
688 struct tic80_opcode
*opcode
;
689 expressionS myops
[16];
691 /* Ensure there is something there to assemble. */
694 /* Drop any leading whitespace. */
695 while (ISSPACE (*str
))
698 /* Isolate the mnemonic from the rest of the string by finding the first
699 whitespace character and zapping it to a null byte. */
700 for (scan
= str
; *scan
!= '\000' && !ISSPACE (*scan
); scan
++)
706 /* Try to find this mnemonic in the hash table. */
707 if ((opcode
= (struct tic80_opcode
*) hash_find (tic80_hash
, str
)) == NULL
)
709 as_bad (_("Invalid mnemonic: '%s'"), str
);
714 while (ISSPACE (*scan
))
717 input_line_save
= input_line_pointer
;
718 input_line_pointer
= str
;
720 opcode
= find_opcode (opcode
, myops
);
722 as_bad (_("Invalid operands: '%s'"), input_line_save
);
724 input_line_pointer
= input_line_save
;
725 build_insn (opcode
, myops
);
728 /* This function is called once at the start of assembly, after the command
729 line arguments have been parsed and all the machine independent
730 initializations have been completed.
732 It should set up all the tables, etc., that the machine dependent part of
733 the assembler will need. */
738 char *prev_name
= "";
739 register const struct tic80_opcode
*op
;
740 register const struct tic80_opcode
*op_end
;
741 const struct predefined_symbol
*pdsp
;
742 extern int coff_flags
; /* Defined in obj-coff.c */
744 /* Set F_AR32WR in coff_flags, which will end up in the file header
747 coff_flags
|= F_AR32WR
; /* TIc80 is 32 bit little endian. */
749 /* Insert unique names into hash table. The TIc80 instruction set
750 has many identical opcode names that have different opcodes based
751 on the operands. This hash table then provides a quick index to
752 the first opcode with a particular name in the opcode table. */
754 tic80_hash
= hash_new ();
755 op_end
= tic80_opcodes
+ tic80_num_opcodes
;
756 for (op
= tic80_opcodes
; op
< op_end
; op
++)
758 if (strcmp (prev_name
, op
->name
) != 0)
760 prev_name
= (char *) op
->name
;
761 hash_insert (tic80_hash
, op
->name
, (char *) op
);
765 /* Insert the predefined symbols into the symbol table. We use
766 symbol_create rather than symbol_new so that these symbols don't
767 end up in the object files' symbol table. Note that the values
768 of the predefined symbols include some upper bits that
769 distinguish the type of the symbol (register, bitnum, condition
770 code, etc) and these bits must be masked away before actually
771 inserting the values into the instruction stream. For registers
772 we put these bits in the symbol table since we use them later and
773 there is no question that they aren't part of the register
774 number. For constants we can't do that since the constant can be
775 any value, so they are masked off before putting them into the
779 while ((pdsp
= tic80_next_predefined_symbol (pdsp
)) != NULL
)
785 symtype
= PDS_VALUE (pdsp
) & TIC80_OPERAND_MASK
;
788 case TIC80_OPERAND_GPR
:
789 case TIC80_OPERAND_FPA
:
790 case TIC80_OPERAND_CR
:
791 segment
= reg_section
;
792 valu
= PDS_VALUE (pdsp
);
794 case TIC80_OPERAND_CC
:
795 case TIC80_OPERAND_BITNUM
:
796 segment
= absolute_section
;
797 valu
= PDS_VALUE (pdsp
) & ~TIC80_OPERAND_MASK
;
800 internal_error_a (_("unhandled predefined symbol bits"),
804 symbol_table_insert (symbol_create (PDS_NAME (pdsp
), segment
, valu
,
805 &zero_address_frag
));
809 /* The assembler adds md_shortopts to the string passed to getopt. */
811 const char *md_shortopts
= "";
813 /* The assembler adds md_longopts to the machine independent long options
814 that are passed to getopt. */
816 struct option md_longopts
[] = {
818 #define OPTION_RELAX (OPTION_MD_BASE)
819 {"relax", no_argument
, NULL
, OPTION_RELAX
},
821 #define OPTION_NO_RELAX (OPTION_RELAX + 1)
822 {"no-relax", no_argument
, NULL
, OPTION_NO_RELAX
},
824 {NULL
, no_argument
, NULL
, 0}
827 size_t md_longopts_size
= sizeof (md_longopts
);
829 /* The md_parse_option function will be called whenever getopt returns an
830 unrecognized code, presumably indicating a special code value which
831 appears in md_longopts for machine specific command line options. */
834 md_parse_option (c
, arg
)
836 char *arg ATTRIBUTE_UNUSED
;
843 case OPTION_NO_RELAX
:
852 /* The md_show_usage function will be called whenever a usage message is
853 printed. It should print a description of the machine specific options
854 found in md_longopts. */
857 md_show_usage (stream
)
862 -relax alter PC relative branch instructions to use long form when needed\n\
863 -no-relax always use short PC relative branch instructions, error on overflow\n");
866 /* Attempt to simplify or even eliminate a fixup. The return value is
867 ignored; perhaps it was once meaningful, but now it is historical.
868 To indicate that a fixup has been eliminated, set fixP->fx_done. */
871 md_apply_fix3 (fixP
, valP
, seg
)
874 segT seg ATTRIBUTE_UNUSED
;
876 long val
= * (long *) valP
;
877 char *dest
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
880 switch (fixP
->fx_r_type
)
883 md_number_to_chars (dest
, (valueT
) val
, 4);
887 val
+= 1; /* Target address computed from inst start */
888 md_number_to_chars (dest
, (valueT
) val
, 4);
891 overflow
= (val
< -65536L) || (val
> 65532L);
894 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
895 _("PC offset 0x%lx outside range 0x%lx-0x%lx"),
896 val
, -65536L, 65532L);
901 *dest
++ = val
& 0xFF;
903 *dest
= (*dest
& 0x80) | (val
& 0x7F);
907 md_number_to_chars (dest
, (valueT
) val
, fixP
->fx_size
);
910 internal_error_a (_("unhandled relocation type in fixup"),
911 (long) fixP
->fx_r_type
);
915 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
919 /* Functions concerning relocs. */
921 /* The location from which a PC relative jump should be calculated,
922 given a PC relative reloc.
924 For the TIc80, this is the address of the 32 bit opcode containing
925 the PC relative field. */
931 return (fixP
->fx_frag
->fr_address
+ fixP
->fx_where
);
934 /* Called after relax() is finished.
935 * In: Address of frag.
936 * fr_type == rs_machine_dependent.
937 * fr_subtype is what the address relaxed to.
939 * Out: Any fixSs and constants are set up.
940 * Caller will turn frag into a ".space 0".
944 md_convert_frag (headers
, seg
, fragP
)
945 object_headers
*headers ATTRIBUTE_UNUSED
;
946 segT seg ATTRIBUTE_UNUSED
;
947 fragS
*fragP ATTRIBUTE_UNUSED
;
949 internal_error (_("md_convert_frag() not implemented yet"));
954 tc_coff_symbol_emit_hook (ignore
)
955 symbolS
*ignore ATTRIBUTE_UNUSED
;
962 tc_coff_fix2rtype (fixP
)
965 return (fixP
->fx_r_type
);
968 #endif /* OBJ_COFF */