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* config/tc-cris.c (md_estimate_size_before_relax) <case
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include <stdio.h>
22 #include <ctype.h>
23 #include "as.h"
24 #include "subsegs.h"
25 #include "opcode/v850.h"
26 #include "dwarf2dbg.h"
27
28 #define AREA_ZDA 0
29 #define AREA_SDA 1
30 #define AREA_TDA 2
31
32 /* Sign-extend a 16-bit number. */
33 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
34
35 /* Temporarily holds the reloc in a cons expression. */
36 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
37
38 /* Set to TRUE if we want to be pedantic about signed overflows. */
39 static boolean warn_signed_overflows = FALSE;
40 static boolean warn_unsigned_overflows = FALSE;
41
42 /* Indicates the target BFD machine number. */
43 static int machine = -1;
44
45 /* Indicates the target processor(s) for the assemble. */
46 static int processor_mask = -1;
47 \f
48 /* Structure to hold information about predefined registers. */
49 struct reg_name {
50 const char *name;
51 int value;
52 };
53
54 /* Generic assembler global variables which must be defined by all
55 targets. */
56
57 /* Characters which always start a comment. */
58 const char comment_chars[] = "#";
59
60 /* Characters which start a comment at the beginning of a line. */
61 const char line_comment_chars[] = ";#";
62
63 /* Characters which may be used to separate multiple commands on a
64 single line. */
65 const char line_separator_chars[] = ";";
66
67 /* Characters which are used to indicate an exponent in a floating
68 point number. */
69 const char EXP_CHARS[] = "eE";
70
71 /* Characters which mean that a number is a floating point constant,
72 as in 0d1.0. */
73 const char FLT_CHARS[] = "dD";
74 \f
75 const relax_typeS md_relax_table[] = {
76 /* Conditional branches. */
77 {0xff, -0x100, 2, 1},
78 {0x1fffff, -0x200000, 6, 0},
79 /* Unconditional branches. */
80 {0xff, -0x100, 2, 3},
81 {0x1fffff, -0x200000, 4, 0},
82 };
83
84 static segT sdata_section = NULL;
85 static segT tdata_section = NULL;
86 static segT zdata_section = NULL;
87 static segT sbss_section = NULL;
88 static segT tbss_section = NULL;
89 static segT zbss_section = NULL;
90 static segT rosdata_section = NULL;
91 static segT rozdata_section = NULL;
92 static segT scommon_section = NULL;
93 static segT tcommon_section = NULL;
94 static segT zcommon_section = NULL;
95 static segT call_table_data_section = NULL;
96 static segT call_table_text_section = NULL;
97
98 /* Fixups. */
99 #define MAX_INSN_FIXUPS (5)
100 struct v850_fixup {
101 expressionS exp;
102 int opindex;
103 bfd_reloc_code_real_type reloc;
104 };
105
106 struct v850_fixup fixups[MAX_INSN_FIXUPS];
107 static int fc;
108 \f
109 void
110 v850_sdata (int ignore ATTRIBUTE_UNUSED)
111 {
112 obj_elf_section_change_hook ();
113
114 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
115
116 demand_empty_rest_of_line ();
117 }
118
119 void
120 v850_tdata (int ignore ATTRIBUTE_UNUSED)
121 {
122 obj_elf_section_change_hook ();
123
124 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
125
126 demand_empty_rest_of_line ();
127 }
128
129 void
130 v850_zdata (int ignore ATTRIBUTE_UNUSED)
131 {
132 obj_elf_section_change_hook ();
133
134 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
135
136 demand_empty_rest_of_line ();
137 }
138
139 void
140 v850_sbss (int ignore ATTRIBUTE_UNUSED)
141 {
142 obj_elf_section_change_hook ();
143
144 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
145
146 demand_empty_rest_of_line ();
147 }
148
149 void
150 v850_tbss (int ignore ATTRIBUTE_UNUSED)
151 {
152 obj_elf_section_change_hook ();
153
154 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
155
156 demand_empty_rest_of_line ();
157 }
158
159 void
160 v850_zbss (int ignore ATTRIBUTE_UNUSED)
161 {
162 obj_elf_section_change_hook ();
163
164 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
165
166 demand_empty_rest_of_line ();
167 }
168
169 void
170 v850_rosdata (int ignore ATTRIBUTE_UNUSED)
171 {
172 obj_elf_section_change_hook ();
173
174 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
175
176 demand_empty_rest_of_line ();
177 }
178
179 void
180 v850_rozdata (int ignore ATTRIBUTE_UNUSED)
181 {
182 obj_elf_section_change_hook ();
183
184 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
185
186 demand_empty_rest_of_line ();
187 }
188
189 void
190 v850_call_table_data (int ignore ATTRIBUTE_UNUSED)
191 {
192 obj_elf_section_change_hook ();
193
194 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
195
196 demand_empty_rest_of_line ();
197 }
198
199 void
200 v850_call_table_text (int ignore ATTRIBUTE_UNUSED)
201 {
202 obj_elf_section_change_hook ();
203
204 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
205
206 demand_empty_rest_of_line ();
207 }
208
209 void
210 v850_bss (int ignore ATTRIBUTE_UNUSED)
211 {
212 register int temp = get_absolute_expression ();
213
214 obj_elf_section_change_hook ();
215
216 subseg_set (bss_section, (subsegT) temp);
217
218 demand_empty_rest_of_line ();
219 }
220
221 void
222 v850_offset (int ignore ATTRIBUTE_UNUSED)
223 {
224 int temp = get_absolute_expression ();
225
226 temp -= frag_now_fix ();
227
228 if (temp > 0)
229 (void) frag_more (temp);
230
231 demand_empty_rest_of_line ();
232 }
233
234 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
235
236 static void
237 v850_comm (area)
238 int area;
239 {
240 char *name;
241 char c;
242 char *p;
243 int temp;
244 unsigned int size;
245 symbolS *symbolP;
246 int have_align;
247
248 name = input_line_pointer;
249 c = get_symbol_end ();
250
251 /* Just after name is now '\0'. */
252 p = input_line_pointer;
253 *p = c;
254
255 SKIP_WHITESPACE ();
256
257 if (*input_line_pointer != ',')
258 {
259 as_bad (_("Expected comma after symbol-name"));
260 ignore_rest_of_line ();
261 return;
262 }
263
264 /* Skip ','. */
265 input_line_pointer++;
266
267 if ((temp = get_absolute_expression ()) < 0)
268 {
269 /* xgettext:c-format */
270 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
271 ignore_rest_of_line ();
272 return;
273 }
274
275 size = temp;
276 *p = 0;
277 symbolP = symbol_find_or_make (name);
278 *p = c;
279
280 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
281 {
282 as_bad (_("Ignoring attempt to re-define symbol"));
283 ignore_rest_of_line ();
284 return;
285 }
286
287 if (S_GET_VALUE (symbolP) != 0)
288 {
289 if (S_GET_VALUE (symbolP) != size)
290 {
291 /* xgettext:c-format */
292 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
293 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
294 }
295 }
296
297 know (symbol_get_frag (symbolP) == &zero_address_frag);
298
299 if (*input_line_pointer != ',')
300 have_align = 0;
301 else
302 {
303 have_align = 1;
304 input_line_pointer++;
305 SKIP_WHITESPACE ();
306 }
307
308 if (! have_align || *input_line_pointer != '"')
309 {
310 if (! have_align)
311 temp = 0;
312 else
313 {
314 temp = get_absolute_expression ();
315
316 if (temp < 0)
317 {
318 temp = 0;
319 as_warn (_("Common alignment negative; 0 assumed"));
320 }
321 }
322
323 if (symbol_get_obj (symbolP)->local)
324 {
325 segT old_sec;
326 int old_subsec;
327 char *pfrag;
328 int align;
329 flagword applicable;
330
331 old_sec = now_seg;
332 old_subsec = now_subseg;
333
334 applicable = bfd_applicable_section_flags (stdoutput);
335
336 applicable &= SEC_ALLOC;
337
338 switch (area)
339 {
340 case AREA_SDA:
341 if (sbss_section == NULL)
342 {
343 sbss_section = subseg_new (".sbss", 0);
344
345 bfd_set_section_flags (stdoutput, sbss_section, applicable);
346
347 seg_info (sbss_section)->bss = 1;
348 }
349 break;
350
351 case AREA_ZDA:
352 if (zbss_section == NULL)
353 {
354 zbss_section = subseg_new (".zbss", 0);
355
356 bfd_set_section_flags (stdoutput, sbss_section, applicable);
357
358 seg_info (zbss_section)->bss = 1;
359 }
360 break;
361
362 case AREA_TDA:
363 if (tbss_section == NULL)
364 {
365 tbss_section = subseg_new (".tbss", 0);
366
367 bfd_set_section_flags (stdoutput, tbss_section, applicable);
368
369 seg_info (tbss_section)->bss = 1;
370 }
371 break;
372 }
373
374 if (temp)
375 {
376 /* Convert to a power of 2 alignment. */
377 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
378 ;
379
380 if (temp != 1)
381 {
382 as_bad (_("Common alignment not a power of 2"));
383 ignore_rest_of_line ();
384 return;
385 }
386 }
387 else
388 align = 0;
389
390 switch (area)
391 {
392 case AREA_SDA:
393 record_alignment (sbss_section, align);
394 obj_elf_section_change_hook ();
395 subseg_set (sbss_section, 0);
396 break;
397
398 case AREA_ZDA:
399 record_alignment (zbss_section, align);
400 obj_elf_section_change_hook ();
401 subseg_set (zbss_section, 0);
402 break;
403
404 case AREA_TDA:
405 record_alignment (tbss_section, align);
406 obj_elf_section_change_hook ();
407 subseg_set (tbss_section, 0);
408 break;
409
410 default:
411 abort ();
412 }
413
414 if (align)
415 frag_align (align, 0, 0);
416
417 switch (area)
418 {
419 case AREA_SDA:
420 if (S_GET_SEGMENT (symbolP) == sbss_section)
421 symbol_get_frag (symbolP)->fr_symbol = 0;
422 break;
423
424 case AREA_ZDA:
425 if (S_GET_SEGMENT (symbolP) == zbss_section)
426 symbol_get_frag (symbolP)->fr_symbol = 0;
427 break;
428
429 case AREA_TDA:
430 if (S_GET_SEGMENT (symbolP) == tbss_section)
431 symbol_get_frag (symbolP)->fr_symbol = 0;
432 break;
433
434 default:
435 abort ();
436 }
437
438 symbol_set_frag (symbolP, frag_now);
439 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
440 (offsetT) size, (char *) 0);
441 *pfrag = 0;
442 S_SET_SIZE (symbolP, size);
443
444 switch (area)
445 {
446 case AREA_SDA:
447 S_SET_SEGMENT (symbolP, sbss_section);
448 break;
449
450 case AREA_ZDA:
451 S_SET_SEGMENT (symbolP, zbss_section);
452 break;
453
454 case AREA_TDA:
455 S_SET_SEGMENT (symbolP, tbss_section);
456 break;
457
458 default:
459 abort ();
460 }
461
462 S_CLEAR_EXTERNAL (symbolP);
463 obj_elf_section_change_hook ();
464 subseg_set (old_sec, old_subsec);
465 }
466 else
467 {
468 allocate_common:
469 S_SET_VALUE (symbolP, (valueT) size);
470 S_SET_ALIGN (symbolP, temp);
471 S_SET_EXTERNAL (symbolP);
472
473 switch (area)
474 {
475 case AREA_SDA:
476 if (scommon_section == NULL)
477 {
478 flagword applicable =
479 bfd_applicable_section_flags (stdoutput);
480
481 scommon_section = subseg_new (".scommon", 0);
482
483 bfd_set_section_flags (stdoutput, scommon_section,
484 (applicable
485 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
486 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
487 }
488 S_SET_SEGMENT (symbolP, scommon_section);
489 break;
490
491 case AREA_ZDA:
492 if (zcommon_section == NULL)
493 {
494 flagword applicable =
495 bfd_applicable_section_flags (stdoutput);
496
497 zcommon_section = subseg_new (".zcommon", 0);
498
499 bfd_set_section_flags (stdoutput, zcommon_section,
500 (applicable
501 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
502 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
503 }
504 S_SET_SEGMENT (symbolP, zcommon_section);
505 break;
506
507 case AREA_TDA:
508 if (tcommon_section == NULL)
509 {
510 flagword applicable =
511 bfd_applicable_section_flags (stdoutput);
512
513 tcommon_section = subseg_new (".tcommon", 0);
514
515 bfd_set_section_flags (stdoutput, tcommon_section,
516 ((applicable
517 & (SEC_ALLOC | SEC_LOAD
518 | SEC_RELOC | SEC_DATA
519 | SEC_HAS_CONTENTS))
520 | SEC_IS_COMMON));
521 }
522 S_SET_SEGMENT (symbolP, tcommon_section);
523 break;
524
525 default:
526 abort ();
527 }
528 }
529 }
530 else
531 {
532 input_line_pointer++;
533
534 /* @@ Some use the dot, some don't. Can we get some consistency?? */
535 if (*input_line_pointer == '.')
536 input_line_pointer++;
537
538 /* @@ Some say data, some say bss. */
539 if (strncmp (input_line_pointer, "bss\"", 4)
540 && strncmp (input_line_pointer, "data\"", 5))
541 {
542 while (*--input_line_pointer != '"')
543 ;
544 input_line_pointer--;
545 goto bad_common_segment;
546 }
547 while (*input_line_pointer++ != '"')
548 ;
549 goto allocate_common;
550 }
551
552 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
553
554 demand_empty_rest_of_line ();
555 return;
556
557 {
558 bad_common_segment:
559 p = input_line_pointer;
560 while (*p && *p != '\n')
561 p++;
562 c = *p;
563 *p = '\0';
564 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
565 *p = c;
566 input_line_pointer = p;
567 ignore_rest_of_line ();
568 return;
569 }
570 }
571
572 void
573 set_machine (int number)
574 {
575 machine = number;
576 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
577
578 switch (machine)
579 {
580 case 0: processor_mask = PROCESSOR_V850; break;
581 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
582 case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
583 }
584 }
585
586 /* The target specific pseudo-ops which we support. */
587 const pseudo_typeS md_pseudo_table[] = {
588 {"sdata", v850_sdata, 0},
589 {"tdata", v850_tdata, 0},
590 {"zdata", v850_zdata, 0},
591 {"sbss", v850_sbss, 0},
592 {"tbss", v850_tbss, 0},
593 {"zbss", v850_zbss, 0},
594 {"rosdata", v850_rosdata, 0},
595 {"rozdata", v850_rozdata, 0},
596 {"bss", v850_bss, 0},
597 {"offset", v850_offset, 0},
598 {"word", cons, 4},
599 {"zcomm", v850_comm, AREA_ZDA},
600 {"scomm", v850_comm, AREA_SDA},
601 {"tcomm", v850_comm, AREA_TDA},
602 {"v850", set_machine, 0},
603 {"call_table_data", v850_call_table_data, 0},
604 {"call_table_text", v850_call_table_text, 0},
605 {"v850e", set_machine, bfd_mach_v850e},
606 {"v850ea", set_machine, bfd_mach_v850ea},
607 {"file", dwarf2_directive_file },
608 {"loc", dwarf2_directive_loc },
609 { NULL, NULL, 0}
610 };
611
612 /* Opcode hash table. */
613 static struct hash_control *v850_hash;
614
615 /* This table is sorted. Suitable for searching by a binary search. */
616 static const struct reg_name pre_defined_registers[] = {
617 { "ep", 30 }, /* ep - element ptr */
618 { "gp", 4 }, /* gp - global ptr */
619 { "hp", 2 }, /* hp - handler stack ptr */
620 { "lp", 31 }, /* lp - link ptr */
621 { "r0", 0 },
622 { "r1", 1 },
623 { "r10", 10 },
624 { "r11", 11 },
625 { "r12", 12 },
626 { "r13", 13 },
627 { "r14", 14 },
628 { "r15", 15 },
629 { "r16", 16 },
630 { "r17", 17 },
631 { "r18", 18 },
632 { "r19", 19 },
633 { "r2", 2 },
634 { "r20", 20 },
635 { "r21", 21 },
636 { "r22", 22 },
637 { "r23", 23 },
638 { "r24", 24 },
639 { "r25", 25 },
640 { "r26", 26 },
641 { "r27", 27 },
642 { "r28", 28 },
643 { "r29", 29 },
644 { "r3", 3 },
645 { "r30", 30 },
646 { "r31", 31 },
647 { "r4", 4 },
648 { "r5", 5 },
649 { "r6", 6 },
650 { "r7", 7 },
651 { "r8", 8 },
652 { "r9", 9 },
653 { "sp", 3 }, /* sp - stack ptr */
654 { "tp", 5 }, /* tp - text ptr */
655 { "zero", 0 },
656 };
657
658 #define REG_NAME_CNT \
659 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
660
661 static const struct reg_name system_registers[] = {
662 { "ctbp", 20 },
663 { "ctpc", 16 },
664 { "ctpsw", 17 },
665 { "dbpc", 18 },
666 { "dbpsw", 19 },
667 { "ecr", 4 },
668 { "eipc", 0 },
669 { "eipsw", 1 },
670 { "fepc", 2 },
671 { "fepsw", 3 },
672 { "psw", 5 },
673 };
674
675 #define SYSREG_NAME_CNT \
676 (sizeof (system_registers) / sizeof (struct reg_name))
677
678 static const struct reg_name system_list_registers[] = {
679 {"PS", 5 },
680 {"SR", 0 + 1}
681 };
682
683 #define SYSREGLIST_NAME_CNT \
684 (sizeof (system_list_registers) / sizeof (struct reg_name))
685
686 static const struct reg_name cc_names[] = {
687 { "c", 0x1 },
688 { "e", 0x2 },
689 { "ge", 0xe },
690 { "gt", 0xf },
691 { "h", 0xb },
692 { "l", 0x1 },
693 { "le", 0x7 },
694 { "lt", 0x6 },
695 { "n", 0x4 },
696 { "nc", 0x9 },
697 { "ne", 0xa },
698 { "nh", 0x3 },
699 { "nl", 0x9 },
700 { "ns", 0xc },
701 { "nv", 0x8 },
702 { "nz", 0xa },
703 { "p", 0xc },
704 { "s", 0x4 },
705 { "sa", 0xd },
706 { "t", 0x5 },
707 { "v", 0x0 },
708 { "z", 0x2 },
709 };
710
711 #define CC_NAME_CNT \
712 (sizeof (cc_names) / sizeof (struct reg_name))
713
714 /* Do a binary search of the given register table to see if NAME is a
715 valid regiter name. Return the register number from the array on
716 success, or -1 on failure. */
717
718 static int
719 reg_name_search (regs, regcount, name, accept_numbers)
720 const struct reg_name *regs;
721 int regcount;
722 const char *name;
723 boolean accept_numbers;
724 {
725 int middle, low, high;
726 int cmp;
727 symbolS *symbolP;
728
729 /* If the register name is a symbol, then evaluate it. */
730 if ((symbolP = symbol_find (name)) != NULL)
731 {
732 /* If the symbol is an alias for another name then use that.
733 If the symbol is an alias for a number, then return the number. */
734 if (symbol_equated_p (symbolP))
735 {
736 name
737 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
738 }
739 else if (accept_numbers)
740 {
741 int reg = S_GET_VALUE (symbolP);
742
743 if (reg >= 0 && reg <= 31)
744 return reg;
745 }
746
747 /* Otherwise drop through and try parsing name normally. */
748 }
749
750 low = 0;
751 high = regcount - 1;
752
753 do
754 {
755 middle = (low + high) / 2;
756 cmp = strcasecmp (name, regs[middle].name);
757 if (cmp < 0)
758 high = middle - 1;
759 else if (cmp > 0)
760 low = middle + 1;
761 else
762 return regs[middle].value;
763 }
764 while (low <= high);
765 return -1;
766 }
767
768 /* Summary of register_name().
769 *
770 * in: Input_line_pointer points to 1st char of operand.
771 *
772 * out: A expressionS.
773 * The operand may have been a register: in this case, X_op == O_register,
774 * X_add_number is set to the register number, and truth is returned.
775 * Input_line_pointer->(next non-blank) char after operand, or is in
776 * its original state. */
777
778 static boolean
779 register_name (expressionP)
780 expressionS *expressionP;
781 {
782 int reg_number;
783 char *name;
784 char *start;
785 char c;
786
787 /* Find the spelling of the operand. */
788 start = name = input_line_pointer;
789
790 c = get_symbol_end ();
791
792 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
793 name, FALSE);
794
795 /* Put back the delimiting char. */
796 *input_line_pointer = c;
797
798 /* Look to see if it's in the register table. */
799 if (reg_number >= 0)
800 {
801 expressionP->X_op = O_register;
802 expressionP->X_add_number = reg_number;
803
804 /* Make the rest nice. */
805 expressionP->X_add_symbol = NULL;
806 expressionP->X_op_symbol = NULL;
807
808 return true;
809 }
810 else
811 {
812 /* Reset the line as if we had not done anything. */
813 input_line_pointer = start;
814
815 return false;
816 }
817 }
818
819 /* Summary of system_register_name().
820 *
821 * in: INPUT_LINE_POINTER points to 1st char of operand.
822 * EXPRESSIONP points to an expression structure to be filled in.
823 * ACCEPT_NUMBERS is true iff numerical register names may be used.
824 * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
825 * accepted.
826 *
827 * out: A expressionS structure in expressionP.
828 * The operand may have been a register: in this case, X_op == O_register,
829 * X_add_number is set to the register number, and truth is returned.
830 * Input_line_pointer->(next non-blank) char after operand, or is in
831 * its original state. */
832
833 static boolean
834 system_register_name (expressionP, accept_numbers, accept_list_names)
835 expressionS *expressionP;
836 boolean accept_numbers;
837 boolean accept_list_names;
838 {
839 int reg_number;
840 char *name;
841 char *start;
842 char c;
843
844 /* Find the spelling of the operand. */
845 start = name = input_line_pointer;
846
847 c = get_symbol_end ();
848 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
849 accept_numbers);
850
851 /* Put back the delimiting char. */
852 *input_line_pointer = c;
853
854 if (reg_number < 0
855 && accept_numbers)
856 {
857 /* Reset input_line pointer. */
858 input_line_pointer = start;
859
860 if (isdigit (*input_line_pointer))
861 {
862 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
863
864 /* Make sure that the register number is allowable. */
865 if (reg_number < 0
866 || (reg_number > 5 && reg_number < 16)
867 || reg_number > 20)
868 {
869 reg_number = -1;
870 }
871 }
872 else if (accept_list_names)
873 {
874 c = get_symbol_end ();
875 reg_number = reg_name_search (system_list_registers,
876 SYSREGLIST_NAME_CNT, name, FALSE);
877
878 /* Put back the delimiting char. */
879 *input_line_pointer = c;
880 }
881 }
882
883 /* Look to see if it's in the register table. */
884 if (reg_number >= 0)
885 {
886 expressionP->X_op = O_register;
887 expressionP->X_add_number = reg_number;
888
889 /* Make the rest nice. */
890 expressionP->X_add_symbol = NULL;
891 expressionP->X_op_symbol = NULL;
892
893 return true;
894 }
895 else
896 {
897 /* Reset the line as if we had not done anything. */
898 input_line_pointer = start;
899
900 return false;
901 }
902 }
903
904 /* Summary of cc_name().
905 *
906 * in: INPUT_LINE_POINTER points to 1st char of operand.
907 *
908 * out: A expressionS.
909 * The operand may have been a register: in this case, X_op == O_register,
910 * X_add_number is set to the register number, and truth is returned.
911 * Input_line_pointer->(next non-blank) char after operand, or is in
912 * its original state. */
913
914 static boolean
915 cc_name (expressionP)
916 expressionS *expressionP;
917 {
918 int reg_number;
919 char *name;
920 char *start;
921 char c;
922
923 /* Find the spelling of the operand. */
924 start = name = input_line_pointer;
925
926 c = get_symbol_end ();
927 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
928
929 /* Put back the delimiting char. */
930 *input_line_pointer = c;
931
932 /* Look to see if it's in the register table. */
933 if (reg_number >= 0)
934 {
935 expressionP->X_op = O_constant;
936 expressionP->X_add_number = reg_number;
937
938 /* Make the rest nice. */
939 expressionP->X_add_symbol = NULL;
940 expressionP->X_op_symbol = NULL;
941
942 return true;
943 }
944 else
945 {
946 /* Reset the line as if we had not done anything. */
947 input_line_pointer = start;
948
949 return false;
950 }
951 }
952
953 static void
954 skip_white_space (void)
955 {
956 while (*input_line_pointer == ' '
957 || *input_line_pointer == '\t')
958 ++input_line_pointer;
959 }
960
961 /* Summary of parse_register_list ().
962 *
963 * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
964 * INSN is the partially constructed instruction.
965 * OPERAND is the operand being inserted.
966 *
967 * out: NULL if the parse completed successfully, otherwise a
968 * pointer to an error message is returned. If the parse
969 * completes the correct bit fields in the instruction
970 * will be filled in.
971 *
972 * Parses register lists with the syntax:
973 *
974 * { rX }
975 * { rX, rY }
976 * { rX - rY }
977 * { rX - rY, rZ }
978 * etc
979 *
980 * and also parses constant epxressions whoes bits indicate the
981 * registers in the lists. The LSB in the expression refers to
982 * the lowest numbered permissable register in the register list,
983 * and so on upwards. System registers are considered to be very
984 * high numbers. */
985
986 static char *
987 parse_register_list (insn, operand)
988 unsigned long *insn;
989 const struct v850_operand *operand;
990 {
991 static int type1_regs[32] = {
992 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
993 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
994 };
995 static int type2_regs[32] = {
996 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
997 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
998 };
999 static int type3_regs[32] = {
1000 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1001 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
1002 };
1003 int *regs;
1004 expressionS exp;
1005
1006 /* Select a register array to parse. */
1007 switch (operand->shift)
1008 {
1009 case 0xffe00001: regs = type1_regs; break;
1010 case 0xfff8000f: regs = type2_regs; break;
1011 case 0xfff8001f: regs = type3_regs; break;
1012 default:
1013 as_bad (_("unknown operand shift: %x\n"), operand->shift);
1014 return _("internal failure in parse_register_list");
1015 }
1016
1017 skip_white_space ();
1018
1019 /* If the expression starts with a curly brace it is a register list.
1020 Otherwise it is a constant expression, whoes bits indicate which
1021 registers are to be included in the list. */
1022
1023 if (*input_line_pointer != '{')
1024 {
1025 int reg;
1026 int i;
1027
1028 expression (&exp);
1029
1030 if (exp.X_op != O_constant)
1031 return _("constant expression or register list expected");
1032
1033 if (regs == type1_regs)
1034 {
1035 if (exp.X_add_number & 0xFFFFF000)
1036 return _("high bits set in register list expression");
1037
1038 for (reg = 20; reg < 32; reg++)
1039 if (exp.X_add_number & (1 << (reg - 20)))
1040 {
1041 for (i = 0; i < 32; i++)
1042 if (regs[i] == reg)
1043 *insn |= (1 << i);
1044 }
1045 }
1046 else if (regs == type2_regs)
1047 {
1048 if (exp.X_add_number & 0xFFFE0000)
1049 return _("high bits set in register list expression");
1050
1051 for (reg = 1; reg < 16; reg++)
1052 if (exp.X_add_number & (1 << (reg - 1)))
1053 {
1054 for (i = 0; i < 32; i++)
1055 if (regs[i] == reg)
1056 *insn |= (1 << i);
1057 }
1058
1059 if (exp.X_add_number & (1 << 15))
1060 *insn |= (1 << 3);
1061
1062 if (exp.X_add_number & (1 << 16))
1063 *insn |= (1 << 19);
1064 }
1065 else /* regs == type3_regs */
1066 {
1067 if (exp.X_add_number & 0xFFFE0000)
1068 return _("high bits set in register list expression");
1069
1070 for (reg = 16; reg < 32; reg++)
1071 if (exp.X_add_number & (1 << (reg - 16)))
1072 {
1073 for (i = 0; i < 32; i++)
1074 if (regs[i] == reg)
1075 *insn |= (1 << i);
1076 }
1077
1078 if (exp.X_add_number & (1 << 16))
1079 *insn |= (1 << 19);
1080 }
1081
1082 return NULL;
1083 }
1084
1085 input_line_pointer++;
1086
1087 /* Parse the register list until a terminator (closing curly brace or
1088 new-line) is found. */
1089 for (;;)
1090 {
1091 if (register_name (&exp))
1092 {
1093 int i;
1094
1095 /* Locate the given register in the list, and if it is there,
1096 insert the corresponding bit into the instruction. */
1097 for (i = 0; i < 32; i++)
1098 {
1099 if (regs[i] == exp.X_add_number)
1100 {
1101 *insn |= (1 << i);
1102 break;
1103 }
1104 }
1105
1106 if (i == 32)
1107 {
1108 return _("illegal register included in list");
1109 }
1110 }
1111 else if (system_register_name (&exp, true, true))
1112 {
1113 if (regs == type1_regs)
1114 {
1115 return _("system registers cannot be included in list");
1116 }
1117 else if (exp.X_add_number == 5)
1118 {
1119 if (regs == type2_regs)
1120 return _("PSW cannot be included in list");
1121 else
1122 *insn |= 0x8;
1123 }
1124 else if (exp.X_add_number < 4)
1125 *insn |= 0x80000;
1126 else
1127 return _("High value system registers cannot be included in list");
1128 }
1129 else if (*input_line_pointer == '}')
1130 {
1131 input_line_pointer++;
1132 break;
1133 }
1134 else if (*input_line_pointer == ',')
1135 {
1136 input_line_pointer++;
1137 continue;
1138 }
1139 else if (*input_line_pointer == '-')
1140 {
1141 /* We have encountered a range of registers: rX - rY. */
1142 int j;
1143 expressionS exp2;
1144
1145 /* Skip the dash. */
1146 ++input_line_pointer;
1147
1148 /* Get the second register in the range. */
1149 if (! register_name (&exp2))
1150 {
1151 return _("second register should follow dash in register list");
1152 exp2.X_add_number = exp.X_add_number;
1153 }
1154
1155 /* Add the rest of the registers in the range. */
1156 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1157 {
1158 int i;
1159
1160 /* Locate the given register in the list, and if it is there,
1161 insert the corresponding bit into the instruction. */
1162 for (i = 0; i < 32; i++)
1163 {
1164 if (regs[i] == j)
1165 {
1166 *insn |= (1 << i);
1167 break;
1168 }
1169 }
1170
1171 if (i == 32)
1172 return _("illegal register included in list");
1173 }
1174 }
1175 else
1176 {
1177 break;
1178 }
1179
1180 skip_white_space ();
1181 }
1182
1183 return NULL;
1184 }
1185
1186 CONST char *md_shortopts = "m:";
1187
1188 struct option md_longopts[] = {
1189 {NULL, no_argument, NULL, 0}
1190 };
1191
1192 size_t md_longopts_size = sizeof (md_longopts);
1193
1194 void
1195 md_show_usage (stream)
1196 FILE *stream;
1197 {
1198 fprintf (stream, _(" V850 options:\n"));
1199 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1200 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1201 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1202 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1203 fprintf (stream, _(" -mv850ea The code is targeted at the v850ea\n"));
1204 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1205 }
1206
1207 int
1208 md_parse_option (c, arg)
1209 int c;
1210 char *arg;
1211 {
1212 if (c != 'm')
1213 {
1214 if (c != 'a')
1215 /* xgettext:c-format */
1216 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1217 return 0;
1218 }
1219
1220 if (strcmp (arg, "warn-signed-overflow") == 0)
1221 {
1222 warn_signed_overflows = TRUE;
1223 }
1224 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1225 {
1226 warn_unsigned_overflows = TRUE;
1227 }
1228 else if (strcmp (arg, "v850") == 0)
1229 {
1230 machine = 0;
1231 processor_mask = PROCESSOR_V850;
1232 }
1233 else if (strcmp (arg, "v850e") == 0)
1234 {
1235 machine = bfd_mach_v850e;
1236 processor_mask = PROCESSOR_V850E;
1237 }
1238 else if (strcmp (arg, "v850ea") == 0)
1239 {
1240 machine = bfd_mach_v850ea;
1241 processor_mask = PROCESSOR_V850EA;
1242 }
1243 else if (strcmp (arg, "v850any") == 0)
1244 {
1245 /* Tell the world that this is for any v850 chip. */
1246 machine = 0;
1247
1248 /* But support instructions for the extended versions. */
1249 processor_mask = PROCESSOR_V850EA;
1250 }
1251 else
1252 {
1253 /* xgettext:c-format */
1254 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1255 return 0;
1256 }
1257
1258 return 1;
1259 }
1260
1261 symbolS *
1262 md_undefined_symbol (name)
1263 char *name ATTRIBUTE_UNUSED;
1264 {
1265 return 0;
1266 }
1267
1268 char *
1269 md_atof (type, litp, sizep)
1270 int type;
1271 char *litp;
1272 int *sizep;
1273 {
1274 int prec;
1275 LITTLENUM_TYPE words[4];
1276 char *t;
1277 int i;
1278
1279 switch (type)
1280 {
1281 case 'f':
1282 prec = 2;
1283 break;
1284
1285 case 'd':
1286 prec = 4;
1287 break;
1288
1289 default:
1290 *sizep = 0;
1291 return _("bad call to md_atof");
1292 }
1293
1294 t = atof_ieee (input_line_pointer, type, words);
1295 if (t)
1296 input_line_pointer = t;
1297
1298 *sizep = prec * 2;
1299
1300 for (i = prec - 1; i >= 0; i--)
1301 {
1302 md_number_to_chars (litp, (valueT) words[i], 2);
1303 litp += 2;
1304 }
1305
1306 return NULL;
1307 }
1308
1309 /* Very gross. */
1310
1311 void
1312 md_convert_frag (abfd, sec, fragP)
1313 bfd *abfd ATTRIBUTE_UNUSED;
1314 asection *sec;
1315 fragS *fragP;
1316 {
1317 subseg_change (sec, 0);
1318
1319 /* In range conditional or unconditional branch. */
1320 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1321 {
1322 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1323 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1324 fragP->fr_var = 0;
1325 fragP->fr_fix += 2;
1326 }
1327 /* Out of range conditional branch. Emit a branch around a jump. */
1328 else if (fragP->fr_subtype == 1)
1329 {
1330 unsigned char *buffer =
1331 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1332
1333 /* Reverse the condition of the first branch. */
1334 buffer[0] ^= 0x08;
1335 /* Mask off all the displacement bits. */
1336 buffer[0] &= 0x8f;
1337 buffer[1] &= 0x07;
1338 /* Now set the displacement bits so that we branch
1339 around the unconditional branch. */
1340 buffer[0] |= 0x30;
1341
1342 /* Now create the unconditional branch + fixup to the final
1343 target. */
1344 md_number_to_chars (buffer + 2, 0x00000780, 4);
1345 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1346 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1347 (int) fragP->fr_opcode + 1);
1348 fragP->fr_var = 0;
1349 fragP->fr_fix += 6;
1350 }
1351 /* Out of range unconditional branch. Emit a jump. */
1352 else if (fragP->fr_subtype == 3)
1353 {
1354 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1355 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1356 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1357 (int) fragP->fr_opcode + 1);
1358 fragP->fr_var = 0;
1359 fragP->fr_fix += 4;
1360 }
1361 else
1362 abort ();
1363 }
1364
1365 valueT
1366 md_section_align (seg, addr)
1367 asection *seg;
1368 valueT addr;
1369 {
1370 int align = bfd_get_section_alignment (stdoutput, seg);
1371 return ((addr + (1 << align) - 1) & (-1 << align));
1372 }
1373
1374 void
1375 md_begin ()
1376 {
1377 char *prev_name = "";
1378 register const struct v850_opcode *op;
1379 flagword applicable;
1380
1381 if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
1382 {
1383 if (machine == -1)
1384 machine = bfd_mach_v850ea;
1385
1386 if (processor_mask == -1)
1387 processor_mask = PROCESSOR_V850EA;
1388 }
1389 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1390 {
1391 if (machine == -1)
1392 machine = bfd_mach_v850e;
1393
1394 if (processor_mask == -1)
1395 processor_mask = PROCESSOR_V850E;
1396 }
1397 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1398 {
1399 if (machine == -1)
1400 machine = 0;
1401
1402 if (processor_mask == -1)
1403 processor_mask = PROCESSOR_V850;
1404 }
1405 else
1406 /* xgettext:c-format */
1407 as_bad (_("Unable to determine default target processor from string: %s"),
1408 TARGET_CPU);
1409
1410 v850_hash = hash_new ();
1411
1412 /* Insert unique names into hash table. The V850 instruction set
1413 has many identical opcode names that have different opcodes based
1414 on the operands. This hash table then provides a quick index to
1415 the first opcode with a particular name in the opcode table. */
1416
1417 op = v850_opcodes;
1418 while (op->name)
1419 {
1420 if (strcmp (prev_name, op->name))
1421 {
1422 prev_name = (char *) op->name;
1423 hash_insert (v850_hash, op->name, (char *) op);
1424 }
1425 op++;
1426 }
1427
1428 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1429
1430 applicable = bfd_applicable_section_flags (stdoutput);
1431
1432 call_table_data_section = subseg_new (".call_table_data", 0);
1433 bfd_set_section_flags (stdoutput, call_table_data_section,
1434 applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC
1435 | SEC_DATA | SEC_HAS_CONTENTS));
1436
1437 call_table_text_section = subseg_new (".call_table_text", 0);
1438 bfd_set_section_flags (stdoutput, call_table_text_section,
1439 applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY
1440 | SEC_CODE));
1441
1442 /* Restore text section as the current default. */
1443 subseg_set (text_section, 0);
1444 }
1445
1446 static bfd_reloc_code_real_type
1447 handle_ctoff (const struct v850_operand *operand)
1448 {
1449 if (operand == NULL)
1450 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1451
1452 if (operand->bits != 6
1453 || operand->shift != 0)
1454 {
1455 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1456 return BFD_RELOC_64; /* Used to indicate an error condition. */
1457 }
1458
1459 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1460 }
1461
1462 static bfd_reloc_code_real_type
1463 handle_sdaoff (const struct v850_operand *operand)
1464 {
1465 if (operand == NULL)
1466 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1467
1468 if (operand->bits == 15 && operand->shift == 17)
1469 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1470
1471 if (operand->bits == -1)
1472 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1473
1474 if (operand->bits != 16
1475 || operand->shift != 16)
1476 {
1477 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1478 return BFD_RELOC_64; /* Used to indicate an error condition. */
1479 }
1480
1481 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1482 }
1483
1484 static bfd_reloc_code_real_type
1485 handle_zdaoff (const struct v850_operand *operand)
1486 {
1487 if (operand == NULL)
1488 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1489
1490 if (operand->bits == 15 && operand->shift == 17)
1491 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1492
1493 if (operand->bits == -1)
1494 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1495
1496 if (operand->bits != 16
1497 || operand->shift != 16)
1498 {
1499 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1500 /* Used to indicate an error condition. */
1501 return BFD_RELOC_64;
1502 }
1503
1504 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1505 }
1506
1507 static bfd_reloc_code_real_type
1508 handle_tdaoff (const struct v850_operand *operand)
1509 {
1510 if (operand == NULL)
1511 /* Data item, not an instruction. */
1512 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1513
1514 if (operand->bits == 6 && operand->shift == 1)
1515 /* sld.w/sst.w, operand: D8_6 */
1516 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1517
1518 if (operand->bits == 4 && operand->insert != NULL)
1519 /* sld.hu, operand: D5-4 */
1520 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1521
1522 if (operand->bits == 4 && operand->insert == NULL)
1523 /* sld.bu, operand: D4 */
1524 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1525
1526 if (operand->bits == 16 && operand->shift == 16)
1527 /* set1 & chums, operands: D16 */
1528 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1529
1530 if (operand->bits != 7)
1531 {
1532 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1533 /* Used to indicate an error condition. */
1534 return BFD_RELOC_64;
1535 }
1536
1537 return operand->insert != NULL
1538 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1539 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1540 }
1541
1542 /* Warning: The code in this function relies upon the definitions
1543 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1544 matching the hard coded values contained herein. */
1545
1546 static bfd_reloc_code_real_type
1547 v850_reloc_prefix (const struct v850_operand *operand)
1548 {
1549 boolean paren_skipped = false;
1550
1551 /* Skip leading opening parenthesis. */
1552 if (*input_line_pointer == '(')
1553 {
1554 ++input_line_pointer;
1555 paren_skipped = true;
1556 }
1557
1558 #define CHECK_(name, reloc) \
1559 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1560 { \
1561 input_line_pointer += strlen (name); \
1562 return reloc; \
1563 }
1564
1565 CHECK_ ("hi0", BFD_RELOC_HI16 );
1566 CHECK_ ("hi", BFD_RELOC_HI16_S );
1567 CHECK_ ("lo", BFD_RELOC_LO16 );
1568 CHECK_ ("sdaoff", handle_sdaoff (operand));
1569 CHECK_ ("zdaoff", handle_zdaoff (operand));
1570 CHECK_ ("tdaoff", handle_tdaoff (operand));
1571 CHECK_ ("hilo", BFD_RELOC_32 );
1572 CHECK_ ("ctoff", handle_ctoff (operand) );
1573
1574 /* Restore skipped parenthesis. */
1575 if (paren_skipped)
1576 --input_line_pointer;
1577
1578 return BFD_RELOC_UNUSED;
1579 }
1580
1581 /* Insert an operand value into an instruction. */
1582
1583 static unsigned long
1584 v850_insert_operand (insn, operand, val, file, line, str)
1585 unsigned long insn;
1586 const struct v850_operand *operand;
1587 offsetT val;
1588 char *file;
1589 unsigned int line;
1590 char *str;
1591 {
1592 if (operand->insert)
1593 {
1594 const char *message = NULL;
1595
1596 insn = operand->insert (insn, val, &message);
1597 if (message != NULL)
1598 {
1599 if ((operand->flags & V850_OPERAND_SIGNED)
1600 && ! warn_signed_overflows
1601 && strstr (message, "out of range") != NULL)
1602 {
1603 /* Skip warning... */
1604 }
1605 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1606 && ! warn_unsigned_overflows
1607 && strstr (message, "out of range") != NULL)
1608 {
1609 /* Skip warning... */
1610 }
1611 else if (str)
1612 {
1613 if (file == (char *) NULL)
1614 as_warn ("%s: %s", str, message);
1615 else
1616 as_warn_where (file, line, "%s: %s", str, message);
1617 }
1618 else
1619 {
1620 if (file == (char *) NULL)
1621 as_warn (message);
1622 else
1623 as_warn_where (file, line, message);
1624 }
1625 }
1626 }
1627 else
1628 {
1629 if (operand->bits != 32)
1630 {
1631 long min, max;
1632
1633 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1634 {
1635 if (! warn_signed_overflows)
1636 max = (1 << operand->bits) - 1;
1637 else
1638 max = (1 << (operand->bits - 1)) - 1;
1639
1640 min = -(1 << (operand->bits - 1));
1641 }
1642 else
1643 {
1644 max = (1 << operand->bits) - 1;
1645
1646 if (! warn_unsigned_overflows)
1647 min = -(1 << (operand->bits - 1));
1648 else
1649 min = 0;
1650 }
1651
1652 if (val < (offsetT) min || val > (offsetT) max)
1653 {
1654 /* xgettext:c-format */
1655 const char *err =
1656 _("operand out of range (%s not between %ld and %ld)");
1657 char buf[100];
1658
1659 /* Restore min and mix to expected values for decimal ranges. */
1660 if ((operand->flags & V850_OPERAND_SIGNED)
1661 && ! warn_signed_overflows)
1662 max = (1 << (operand->bits - 1)) - 1;
1663
1664 if (! (operand->flags & V850_OPERAND_SIGNED)
1665 && ! warn_unsigned_overflows)
1666 min = 0;
1667
1668 if (str)
1669 {
1670 sprintf (buf, "%s: ", str);
1671
1672 sprint_value (buf + strlen (buf), val);
1673 }
1674 else
1675 sprint_value (buf, val);
1676
1677 if (file == (char *) NULL)
1678 as_warn (err, buf, min, max);
1679 else
1680 as_warn_where (file, line, err, buf, min, max);
1681 }
1682 }
1683
1684 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1685 }
1686
1687 return insn;
1688 }
1689 \f
1690 static char copy_of_instruction[128];
1691
1692 void
1693 md_assemble (str)
1694 char *str;
1695 {
1696 char *s;
1697 char *start_of_operands;
1698 struct v850_opcode *opcode;
1699 struct v850_opcode *next_opcode;
1700 const unsigned char *opindex_ptr;
1701 int next_opindex;
1702 int relaxable = 0;
1703 unsigned long insn;
1704 unsigned long insn_size;
1705 unsigned long total_insn_size = 0;
1706 char *f;
1707 int i;
1708 int match;
1709 boolean extra_data_after_insn = false;
1710 unsigned extra_data_len = 0;
1711 unsigned long extra_data = 0;
1712 char *saved_input_line_pointer;
1713
1714 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1715
1716 /* Get the opcode. */
1717 for (s = str; *s != '\0' && ! isspace (*s); s++)
1718 continue;
1719
1720 if (*s != '\0')
1721 *s++ = '\0';
1722
1723 /* Find the first opcode with the proper name. */
1724 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1725 if (opcode == NULL)
1726 {
1727 /* xgettext:c-format */
1728 as_bad (_("Unrecognized opcode: `%s'"), str);
1729 ignore_rest_of_line ();
1730 return;
1731 }
1732
1733 str = s;
1734 while (isspace (*str))
1735 ++str;
1736
1737 start_of_operands = str;
1738
1739 saved_input_line_pointer = input_line_pointer;
1740
1741 for (;;)
1742 {
1743 const char *errmsg = NULL;
1744
1745 match = 0;
1746
1747 if ((opcode->processors & processor_mask) == 0)
1748 {
1749 errmsg = _("Target processor does not support this instruction.");
1750 goto error;
1751 }
1752
1753 relaxable = 0;
1754 fc = 0;
1755 next_opindex = 0;
1756 insn = opcode->opcode;
1757 extra_data_after_insn = false;
1758
1759 input_line_pointer = str = start_of_operands;
1760
1761 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1762 {
1763 const struct v850_operand *operand;
1764 char *hold;
1765 expressionS ex;
1766 bfd_reloc_code_real_type reloc;
1767
1768 if (next_opindex == 0)
1769 {
1770 operand = &v850_operands[*opindex_ptr];
1771 }
1772 else
1773 {
1774 operand = &v850_operands[next_opindex];
1775 next_opindex = 0;
1776 }
1777
1778 errmsg = NULL;
1779
1780 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1781 ++str;
1782
1783 if (operand->flags & V850_OPERAND_RELAX)
1784 relaxable = 1;
1785
1786 /* Gather the operand. */
1787 hold = input_line_pointer;
1788 input_line_pointer = str;
1789
1790 /* lo(), hi(), hi0(), etc... */
1791 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1792 {
1793 /* This is a fake reloc, used to indicate an error condition. */
1794 if (reloc == BFD_RELOC_64)
1795 {
1796 match = 1;
1797 goto error;
1798 }
1799
1800 expression (&ex);
1801
1802 if (ex.X_op == O_constant)
1803 {
1804 switch (reloc)
1805 {
1806 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1807 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1808 and the like. */
1809 /* Fall through. */
1810
1811 case BFD_RELOC_LO16:
1812 {
1813 /* Truncate, then sign extend the value. */
1814 ex.X_add_number = SEXT16 (ex.X_add_number);
1815 break;
1816 }
1817
1818 case BFD_RELOC_HI16:
1819 {
1820 /* Truncate, then sign extend the value. */
1821 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1822 break;
1823 }
1824
1825 case BFD_RELOC_HI16_S:
1826 {
1827 /* Truncate, then sign extend the value. */
1828 int temp = (ex.X_add_number >> 16) & 0xffff;
1829
1830 temp += (ex.X_add_number >> 15) & 1;
1831
1832 ex.X_add_number = SEXT16 (temp);
1833 break;
1834 }
1835
1836 case BFD_RELOC_32:
1837 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1838 {
1839 errmsg = _("immediate operand is too large");
1840 goto error;
1841 }
1842
1843 extra_data_after_insn = true;
1844 extra_data_len = 4;
1845 extra_data = ex.X_add_number;
1846 ex.X_add_number = 0;
1847 break;
1848
1849 default:
1850 fprintf (stderr, "reloc: %d\n", reloc);
1851 as_bad (_("AAARG -> unhandled constant reloc"));
1852 break;
1853 }
1854
1855 if (fc > MAX_INSN_FIXUPS)
1856 as_fatal (_("too many fixups"));
1857
1858 fixups[fc].exp = ex;
1859 fixups[fc].opindex = *opindex_ptr;
1860 fixups[fc].reloc = reloc;
1861 fc++;
1862 }
1863 else
1864 {
1865 if (reloc == BFD_RELOC_32)
1866 {
1867 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1868 {
1869 errmsg = _("immediate operand is too large");
1870 goto error;
1871 }
1872
1873 extra_data_after_insn = true;
1874 extra_data_len = 4;
1875 extra_data = ex.X_add_number;
1876 }
1877
1878 if (fc > MAX_INSN_FIXUPS)
1879 as_fatal (_("too many fixups"));
1880
1881 fixups[fc].exp = ex;
1882 fixups[fc].opindex = *opindex_ptr;
1883 fixups[fc].reloc = reloc;
1884 fc++;
1885 }
1886 }
1887 else
1888 {
1889 errmsg = NULL;
1890
1891 if ((operand->flags & V850_OPERAND_REG) != 0)
1892 {
1893 if (!register_name (&ex))
1894 {
1895 errmsg = _("invalid register name");
1896 }
1897 else if ((operand->flags & V850_NOT_R0)
1898 && ex.X_add_number == 0)
1899 {
1900 errmsg = _("register r0 cannot be used here");
1901
1902 /* Force an error message to be generated by
1903 skipping over any following potential matches
1904 for this opcode. */
1905 opcode += 3;
1906 }
1907 }
1908 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1909 {
1910 if (!system_register_name (&ex, true, false))
1911 {
1912 errmsg = _("invalid system register name");
1913 }
1914 }
1915 else if ((operand->flags & V850_OPERAND_EP) != 0)
1916 {
1917 char *start = input_line_pointer;
1918 char c = get_symbol_end ();
1919
1920 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1921 {
1922 /* Put things back the way we found them. */
1923 *input_line_pointer = c;
1924 input_line_pointer = start;
1925 errmsg = _("expected EP register");
1926 goto error;
1927 }
1928
1929 *input_line_pointer = c;
1930 str = input_line_pointer;
1931 input_line_pointer = hold;
1932
1933 while (*str == ' ' || *str == ','
1934 || *str == '[' || *str == ']')
1935 ++str;
1936 continue;
1937 }
1938 else if ((operand->flags & V850_OPERAND_CC) != 0)
1939 {
1940 if (!cc_name (&ex))
1941 {
1942 errmsg = _("invalid condition code name");
1943 }
1944 }
1945 else if (operand->flags & V850E_PUSH_POP)
1946 {
1947 errmsg = parse_register_list (&insn, operand);
1948
1949 /* The parse_register_list() function has already done
1950 everything, so fake a dummy expression. */
1951 ex.X_op = O_constant;
1952 ex.X_add_number = 0;
1953 }
1954 else if (operand->flags & V850E_IMMEDIATE16)
1955 {
1956 expression (&ex);
1957
1958 if (ex.X_op != O_constant)
1959 errmsg = _("constant expression expected");
1960 else if (ex.X_add_number & 0xffff0000)
1961 {
1962 if (ex.X_add_number & 0xffff)
1963 errmsg = _("constant too big to fit into instruction");
1964 else if ((insn & 0x001fffc0) == 0x00130780)
1965 ex.X_add_number >>= 16;
1966 else
1967 errmsg = _("constant too big to fit into instruction");
1968 }
1969
1970 extra_data_after_insn = true;
1971 extra_data_len = 2;
1972 extra_data = ex.X_add_number;
1973 ex.X_add_number = 0;
1974 }
1975 else if (operand->flags & V850E_IMMEDIATE32)
1976 {
1977 expression (&ex);
1978
1979 if (ex.X_op != O_constant)
1980 errmsg = _("constant expression expected");
1981
1982 extra_data_after_insn = true;
1983 extra_data_len = 4;
1984 extra_data = ex.X_add_number;
1985 ex.X_add_number = 0;
1986 }
1987 else if (register_name (&ex)
1988 && (operand->flags & V850_OPERAND_REG) == 0)
1989 {
1990 char c;
1991 int exists = 0;
1992
1993 /* It is possible that an alias has been defined that
1994 matches a register name. For example the code may
1995 include a ".set ZERO, 0" directive, which matches
1996 the register name "zero". Attempt to reparse the
1997 field as an expression, and only complain if we
1998 cannot generate a constant. */
1999
2000 input_line_pointer = str;
2001
2002 c = get_symbol_end ();
2003
2004 if (symbol_find (str) != NULL)
2005 exists = 1;
2006
2007 *input_line_pointer = c;
2008 input_line_pointer = str;
2009
2010 expression (&ex);
2011
2012 if (ex.X_op != O_constant)
2013 {
2014 /* If this register is actually occuring too early on
2015 the parsing of the instruction, (because another
2016 field is missing) then report this. */
2017 if (opindex_ptr[1] != 0
2018 && (v850_operands[opindex_ptr[1]].flags
2019 & V850_OPERAND_REG))
2020 errmsg = _("syntax error: value is missing before the register name");
2021 else
2022 errmsg = _("syntax error: register not expected");
2023
2024 /* If we created a symbol in the process of this
2025 test then delete it now, so that it will not
2026 be output with the real symbols... */
2027 if (exists == 0
2028 && ex.X_op == O_symbol)
2029 symbol_remove (ex.X_add_symbol,
2030 &symbol_rootP, &symbol_lastP);
2031 }
2032 }
2033 else if (system_register_name (&ex, false, false)
2034 && (operand->flags & V850_OPERAND_SRG) == 0)
2035 {
2036 errmsg = _("syntax error: system register not expected");
2037 }
2038 else if (cc_name (&ex)
2039 && (operand->flags & V850_OPERAND_CC) == 0)
2040 {
2041 errmsg = _("syntax error: condition code not expected");
2042 }
2043 else
2044 {
2045 expression (&ex);
2046 /* Special case:
2047 If we are assembling a MOV instruction (or a CALLT.... :-)
2048 and the immediate value does not fit into the bits
2049 available then create a fake error so that the next MOV
2050 instruction will be selected. This one has a 32 bit
2051 immediate field. */
2052
2053 if (((insn & 0x07e0) == 0x0200)
2054 && ex.X_op == O_constant
2055 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
2056 || ex.X_add_number > ((1 << operand->bits) - 1)))
2057 errmsg = _("immediate operand is too large");
2058 }
2059
2060 if (errmsg)
2061 goto error;
2062
2063 #if 0
2064 fprintf (stderr,
2065 " insn: %x, operand %d, op: %d, add_number: %d\n",
2066 insn, opindex_ptr - opcode->operands,
2067 ex.X_op, ex.X_add_number);
2068 #endif
2069
2070 switch (ex.X_op)
2071 {
2072 case O_illegal:
2073 errmsg = _("illegal operand");
2074 goto error;
2075 case O_absent:
2076 errmsg = _("missing operand");
2077 goto error;
2078 case O_register:
2079 if ((operand->flags
2080 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
2081 {
2082 errmsg = _("invalid operand");
2083 goto error;
2084 }
2085 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2086 (char *) NULL, 0,
2087 copy_of_instruction);
2088 break;
2089
2090 case O_constant:
2091 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2092 (char *) NULL, 0,
2093 copy_of_instruction);
2094 break;
2095
2096 default:
2097 /* We need to generate a fixup for this expression. */
2098 if (fc >= MAX_INSN_FIXUPS)
2099 as_fatal (_("too many fixups"));
2100
2101 fixups[fc].exp = ex;
2102 fixups[fc].opindex = *opindex_ptr;
2103 fixups[fc].reloc = BFD_RELOC_UNUSED;
2104 ++fc;
2105 break;
2106 }
2107 }
2108
2109 str = input_line_pointer;
2110 input_line_pointer = hold;
2111
2112 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2113 || *str == ')')
2114 ++str;
2115 }
2116 match = 1;
2117
2118 error:
2119 if (match == 0)
2120 {
2121 next_opcode = opcode + 1;
2122 if (next_opcode->name != NULL
2123 && strcmp (next_opcode->name, opcode->name) == 0)
2124 {
2125 opcode = next_opcode;
2126
2127 /* Skip versions that are not supported by the target
2128 processor. */
2129 if ((opcode->processors & processor_mask) == 0)
2130 goto error;
2131
2132 continue;
2133 }
2134
2135 as_bad ("%s: %s", copy_of_instruction, errmsg);
2136
2137 if (*input_line_pointer == ']')
2138 ++input_line_pointer;
2139
2140 ignore_rest_of_line ();
2141 input_line_pointer = saved_input_line_pointer;
2142 return;
2143 }
2144 break;
2145 }
2146
2147 while (isspace (*str))
2148 ++str;
2149
2150 if (*str != '\0')
2151 /* xgettext:c-format */
2152 as_bad (_("junk at end of line: `%s'"), str);
2153
2154 input_line_pointer = str;
2155
2156 /* Write out the instruction. */
2157
2158 if (relaxable && fc > 0)
2159 {
2160 insn_size = 2;
2161 fc = 0;
2162
2163 if (!strcmp (opcode->name, "br"))
2164 {
2165 f = frag_var (rs_machine_dependent, 4, 2, 2,
2166 fixups[0].exp.X_add_symbol,
2167 fixups[0].exp.X_add_number,
2168 (char *) fixups[0].opindex);
2169 md_number_to_chars (f, insn, insn_size);
2170 md_number_to_chars (f + 2, 0, 2);
2171 }
2172 else
2173 {
2174 f = frag_var (rs_machine_dependent, 6, 4, 0,
2175 fixups[0].exp.X_add_symbol,
2176 fixups[0].exp.X_add_number,
2177 (char *) fixups[0].opindex);
2178 md_number_to_chars (f, insn, insn_size);
2179 md_number_to_chars (f + 2, 0, 4);
2180 }
2181 total_insn_size = insn_size;
2182 }
2183 else
2184 {
2185 /* Four byte insns have an opcode with the two high bits on. */
2186 if ((insn & 0x0600) == 0x0600)
2187 insn_size = 4;
2188 else
2189 insn_size = 2;
2190
2191 /* Special case: 32 bit MOV. */
2192 if ((insn & 0xffe0) == 0x0620)
2193 insn_size = 2;
2194
2195 f = frag_more (insn_size);
2196 total_insn_size = insn_size;
2197
2198 md_number_to_chars (f, insn, insn_size);
2199
2200 if (extra_data_after_insn)
2201 {
2202 f = frag_more (extra_data_len);
2203 total_insn_size += extra_data_len;
2204
2205 md_number_to_chars (f, extra_data, extra_data_len);
2206
2207 extra_data_after_insn = false;
2208 }
2209 }
2210
2211 /* Create any fixups. At this point we do not use a
2212 bfd_reloc_code_real_type, but instead just use the
2213 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2214 handle fixups for any operand type, although that is admittedly
2215 not a very exciting feature. We pick a BFD reloc type in
2216 md_apply_fix. */
2217 for (i = 0; i < fc; i++)
2218 {
2219 const struct v850_operand *operand;
2220 bfd_reloc_code_real_type reloc;
2221
2222 operand = &v850_operands[fixups[i].opindex];
2223
2224 reloc = fixups[i].reloc;
2225
2226 if (reloc != BFD_RELOC_UNUSED)
2227 {
2228 reloc_howto_type *reloc_howto =
2229 bfd_reloc_type_lookup (stdoutput, reloc);
2230 int size;
2231 int address;
2232 fixS *fixP;
2233
2234 if (!reloc_howto)
2235 abort ();
2236
2237 size = bfd_get_reloc_size (reloc_howto);
2238
2239 /* XXX This will abort on an R_V850_8 reloc -
2240 is this reloc actually used? */
2241 if (size != 2 && size != 4)
2242 abort ();
2243
2244 address = (f - frag_now->fr_literal) + insn_size - size;
2245
2246 if (reloc == BFD_RELOC_32)
2247 address += 2;
2248
2249 fixP = fix_new_exp (frag_now, address, size,
2250 &fixups[i].exp,
2251 reloc_howto->pc_relative,
2252 reloc);
2253
2254 switch (reloc)
2255 {
2256 case BFD_RELOC_LO16:
2257 case BFD_RELOC_HI16:
2258 case BFD_RELOC_HI16_S:
2259 fixP->fx_no_overflow = 1;
2260 break;
2261 default:
2262 break;
2263 }
2264 }
2265 else
2266 {
2267 fix_new_exp (frag_now,
2268 f - frag_now->fr_literal, 4,
2269 & fixups[i].exp,
2270 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
2271 (bfd_reloc_code_real_type) (fixups[i].opindex
2272 + (int) BFD_RELOC_UNUSED));
2273 }
2274 }
2275
2276 input_line_pointer = saved_input_line_pointer;
2277
2278 dwarf2_emit_insn (total_insn_size);
2279 }
2280
2281 /* If while processing a fixup, a reloc really needs to be created
2282 then it is done here. */
2283
2284 arelent *
2285 tc_gen_reloc (seg, fixp)
2286 asection *seg ATTRIBUTE_UNUSED;
2287 fixS *fixp;
2288 {
2289 arelent *reloc;
2290
2291 reloc = (arelent *) xmalloc (sizeof (arelent));
2292 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2293 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2294 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2295 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2296
2297 if (reloc->howto == (reloc_howto_type *) NULL)
2298 {
2299 as_bad_where (fixp->fx_file, fixp->fx_line,
2300 /* xgettext:c-format */
2301 _("reloc %d not supported by object file format"),
2302 (int) fixp->fx_r_type);
2303
2304 xfree (reloc);
2305
2306 return NULL;
2307 }
2308
2309 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2310 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2311 reloc->addend = fixp->fx_offset;
2312 else
2313 reloc->addend = fixp->fx_addnumber;
2314
2315 return reloc;
2316 }
2317
2318 /* Assume everything will fit in two bytes, then expand as necessary. */
2319
2320 int
2321 md_estimate_size_before_relax (fragp, seg)
2322 fragS *fragp;
2323 asection *seg ATTRIBUTE_UNUSED;
2324 {
2325 if (fragp->fr_subtype == 0)
2326 fragp->fr_var = 4;
2327 else if (fragp->fr_subtype == 2)
2328 fragp->fr_var = 2;
2329 else
2330 abort ();
2331 return 2;
2332 }
2333
2334 long
2335 v850_pcrel_from_section (fixp, section)
2336 fixS *fixp;
2337 segT section;
2338 {
2339 /* If the symbol is undefined, or in a section other than our own,
2340 or it is weak (in which case it may well be in another section,
2341 then let the linker figure it out. */
2342 if (fixp->fx_addsy != (symbolS *) NULL
2343 && (! S_IS_DEFINED (fixp->fx_addsy)
2344 || S_IS_WEAK (fixp->fx_addsy)
2345 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2346 return 0;
2347
2348 return fixp->fx_frag->fr_address + fixp->fx_where;
2349 }
2350
2351 int
2352 md_apply_fix3 (fixp, valuep, seg)
2353 fixS *fixp;
2354 valueT *valuep;
2355 segT seg ATTRIBUTE_UNUSED;
2356 {
2357 valueT value;
2358 char *where;
2359
2360 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2361 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2362 {
2363 fixp->fx_done = 0;
2364 return 1;
2365 }
2366
2367 if (fixp->fx_addsy == (symbolS *) NULL)
2368 {
2369 value = *valuep;
2370 fixp->fx_done = 1;
2371 }
2372 else if (fixp->fx_pcrel)
2373 value = *valuep;
2374 else
2375 {
2376 value = fixp->fx_offset;
2377 if (fixp->fx_subsy != (symbolS *) NULL)
2378 {
2379 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2380 value -= S_GET_VALUE (fixp->fx_subsy);
2381 else
2382 {
2383 /* We don't actually support subtracting a symbol. */
2384 as_bad_where (fixp->fx_file, fixp->fx_line,
2385 _("expression too complex"));
2386 }
2387 }
2388 }
2389
2390 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
2391 {
2392 int opindex;
2393 const struct v850_operand *operand;
2394 unsigned long insn;
2395
2396 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
2397 operand = &v850_operands[opindex];
2398
2399 /* Fetch the instruction, insert the fully resolved operand
2400 value, and stuff the instruction back again.
2401
2402 Note the instruction has been stored in little endian
2403 format! */
2404 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2405
2406 insn = bfd_getl32 ((unsigned char *) where);
2407 insn = v850_insert_operand (insn, operand, (offsetT) value,
2408 fixp->fx_file, fixp->fx_line, NULL);
2409 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2410
2411 if (fixp->fx_done)
2412 {
2413 /* Nothing else to do here. */
2414 return 1;
2415 }
2416
2417 /* Determine a BFD reloc value based on the operand information.
2418 We are only prepared to turn a few of the operands into relocs. */
2419
2420 if (operand->bits == 22)
2421 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
2422 else if (operand->bits == 9)
2423 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
2424 else
2425 {
2426 #if 0
2427 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2428 #endif
2429
2430 as_bad_where (fixp->fx_file, fixp->fx_line,
2431 _("unresolved expression that must be resolved"));
2432 fixp->fx_done = 1;
2433 return 1;
2434 }
2435 }
2436 else if (fixp->fx_done)
2437 {
2438 /* We still have to insert the value into memory! */
2439 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2440
2441 if (fixp->fx_size == 1)
2442 *where = value & 0xff;
2443 else if (fixp->fx_size == 2)
2444 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2445 else if (fixp->fx_size == 4)
2446 bfd_putl32 (value, (unsigned char *) where);
2447 }
2448
2449 fixp->fx_addnumber = value;
2450 return 1;
2451 }
2452 \f
2453 /* Parse a cons expression. We have to handle hi(), lo(), etc
2454 on the v850. */
2455
2456 void
2457 parse_cons_expression_v850 (exp)
2458 expressionS *exp;
2459 {
2460 /* See if there's a reloc prefix like hi() we have to handle. */
2461 hold_cons_reloc = v850_reloc_prefix (NULL);
2462
2463 /* Do normal expression parsing. */
2464 expression (exp);
2465 }
2466
2467 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2468 found a reloc prefix, then we use that reloc, else we choose an
2469 appropriate one based on the size of the expression. */
2470
2471 void
2472 cons_fix_new_v850 (frag, where, size, exp)
2473 fragS *frag;
2474 int where;
2475 int size;
2476 expressionS *exp;
2477 {
2478 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2479 {
2480 if (size == 4)
2481 hold_cons_reloc = BFD_RELOC_32;
2482 if (size == 2)
2483 hold_cons_reloc = BFD_RELOC_16;
2484 if (size == 1)
2485 hold_cons_reloc = BFD_RELOC_8;
2486 }
2487
2488 if (exp != NULL)
2489 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2490 else
2491 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2492
2493 hold_cons_reloc = BFD_RELOC_UNUSED;
2494 }
2495
2496 boolean
2497 v850_fix_adjustable (fixP)
2498 fixS *fixP;
2499 {
2500 if (fixP->fx_addsy == NULL)
2501 return 1;
2502
2503 /* Prevent all adjustments to global symbols. */
2504 if (S_IS_EXTERN (fixP->fx_addsy))
2505 return 0;
2506
2507 /* Similarly for weak symbols. */
2508 if (S_IS_WEAK (fixP->fx_addsy))
2509 return 0;
2510
2511 /* Don't adjust function names. */
2512 if (S_IS_FUNCTION (fixP->fx_addsy))
2513 return 0;
2514
2515 /* We need the symbol name for the VTABLE entries. */
2516 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2517 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2518 return 0;
2519
2520 return 1;
2521 }
2522
2523 int
2524 v850_force_relocation (fixP)
2525 struct fix *fixP;
2526 {
2527 if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
2528 return 1;
2529
2530 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2531 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2532 return 1;
2533
2534 return 0;
2535 }
GDB Binutils - Deliverables
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