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* Makefile.in (tmp-ld-decode): Fix dependencies.
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2006 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
21
22 #include <stdio.h>
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "opcode/v850.h"
27 #include "dwarf2dbg.h"
28
29 /* Sign-extend a 16-bit number. */
30 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
31
32 /* Temporarily holds the reloc in a cons expression. */
33 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
34
35 /* Set to TRUE if we want to be pedantic about signed overflows. */
36 static bfd_boolean warn_signed_overflows = FALSE;
37 static bfd_boolean warn_unsigned_overflows = FALSE;
38
39 /* Indicates the target BFD machine number. */
40 static int machine = -1;
41
42 /* Indicates the target processor(s) for the assemble. */
43 static int processor_mask = -1;
44 \f
45 /* Structure to hold information about predefined registers. */
46 struct reg_name
47 {
48 const char *name;
49 int value;
50 };
51
52 /* Generic assembler global variables which must be defined by all
53 targets. */
54
55 /* Characters which always start a comment. */
56 const char comment_chars[] = "#";
57
58 /* Characters which start a comment at the beginning of a line. */
59 const char line_comment_chars[] = ";#";
60
61 /* Characters which may be used to separate multiple commands on a
62 single line. */
63 const char line_separator_chars[] = ";";
64
65 /* Characters which are used to indicate an exponent in a floating
66 point number. */
67 const char EXP_CHARS[] = "eE";
68
69 /* Characters which mean that a number is a floating point constant,
70 as in 0d1.0. */
71 const char FLT_CHARS[] = "dD";
72 \f
73 const relax_typeS md_relax_table[] =
74 {
75 /* Conditional branches. */
76 {0xff, -0x100, 2, 1},
77 {0x1fffff, -0x200000, 6, 0},
78 /* Unconditional branches. */
79 {0xff, -0x100, 2, 3},
80 {0x1fffff, -0x200000, 4, 0},
81 };
82
83 static int v850_relax = 0;
84
85 /* Fixups. */
86 #define MAX_INSN_FIXUPS 5
87
88 struct v850_fixup
89 {
90 expressionS exp;
91 int opindex;
92 bfd_reloc_code_real_type reloc;
93 };
94
95 struct v850_fixup fixups[MAX_INSN_FIXUPS];
96 static int fc;
97
98 struct v850_seg_entry
99 {
100 segT s;
101 const char *name;
102 flagword flags;
103 };
104
105 struct v850_seg_entry v850_seg_table[] =
106 {
107 { NULL, ".sdata",
108 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
109 | SEC_SMALL_DATA },
110 { NULL, ".tdata",
111 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
112 { NULL, ".zdata",
113 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
114 { NULL, ".sbss",
115 SEC_ALLOC | SEC_SMALL_DATA },
116 { NULL, ".tbss",
117 SEC_ALLOC },
118 { NULL, ".zbss",
119 SEC_ALLOC},
120 { NULL, ".rosdata",
121 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
122 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
123 { NULL, ".rozdata",
124 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
125 | SEC_HAS_CONTENTS },
126 { NULL, ".scommon",
127 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
128 | SEC_SMALL_DATA | SEC_IS_COMMON },
129 { NULL, ".tcommon",
130 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
131 | SEC_IS_COMMON },
132 { NULL, ".zcommon",
133 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
134 | SEC_IS_COMMON },
135 { NULL, ".call_table_data",
136 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
137 { NULL, ".call_table_text",
138 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
139 | SEC_HAS_CONTENTS},
140 { NULL, ".bss",
141 SEC_ALLOC }
142 };
143
144 #define SDATA_SECTION 0
145 #define TDATA_SECTION 1
146 #define ZDATA_SECTION 2
147 #define SBSS_SECTION 3
148 #define TBSS_SECTION 4
149 #define ZBSS_SECTION 5
150 #define ROSDATA_SECTION 6
151 #define ROZDATA_SECTION 7
152 #define SCOMMON_SECTION 8
153 #define TCOMMON_SECTION 9
154 #define ZCOMMON_SECTION 10
155 #define CALL_TABLE_DATA_SECTION 11
156 #define CALL_TABLE_TEXT_SECTION 12
157 #define BSS_SECTION 13
158
159 static void
160 do_v850_seg (int i, subsegT sub)
161 {
162 struct v850_seg_entry *seg = v850_seg_table + i;
163
164 obj_elf_section_change_hook ();
165
166 if (seg->s != NULL)
167 subseg_set (seg->s, sub);
168 else
169 {
170 seg->s = subseg_new (seg->name, sub);
171 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
172 if ((seg->flags & SEC_LOAD) == 0)
173 seg_info (seg->s)->bss = 1;
174 }
175 }
176
177 static void
178 v850_seg (int i)
179 {
180 subsegT sub = get_absolute_expression ();
181
182 do_v850_seg (i, sub);
183 demand_empty_rest_of_line ();
184 }
185
186 static void
187 v850_offset (int ignore ATTRIBUTE_UNUSED)
188 {
189 char *pfrag;
190 int temp = get_absolute_expression ();
191
192 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
193 (offsetT) temp, (char *) 0);
194 *pfrag = 0;
195
196 demand_empty_rest_of_line ();
197 }
198
199 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
200
201 static void
202 v850_comm (int area)
203 {
204 char *name;
205 char c;
206 char *p;
207 int temp;
208 unsigned int size;
209 symbolS *symbolP;
210 int have_align;
211
212 name = input_line_pointer;
213 c = get_symbol_end ();
214
215 /* Just after name is now '\0'. */
216 p = input_line_pointer;
217 *p = c;
218
219 SKIP_WHITESPACE ();
220
221 if (*input_line_pointer != ',')
222 {
223 as_bad (_("Expected comma after symbol-name"));
224 ignore_rest_of_line ();
225 return;
226 }
227
228 /* Skip ','. */
229 input_line_pointer++;
230
231 if ((temp = get_absolute_expression ()) < 0)
232 {
233 /* xgettext:c-format */
234 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
235 ignore_rest_of_line ();
236 return;
237 }
238
239 size = temp;
240 *p = 0;
241 symbolP = symbol_find_or_make (name);
242 *p = c;
243
244 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
245 {
246 as_bad (_("Ignoring attempt to re-define symbol"));
247 ignore_rest_of_line ();
248 return;
249 }
250
251 if (S_GET_VALUE (symbolP) != 0)
252 {
253 if (S_GET_VALUE (symbolP) != size)
254 /* xgettext:c-format */
255 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
256 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
257 }
258
259 know (symbol_get_frag (symbolP) == &zero_address_frag);
260
261 if (*input_line_pointer != ',')
262 have_align = 0;
263 else
264 {
265 have_align = 1;
266 input_line_pointer++;
267 SKIP_WHITESPACE ();
268 }
269
270 if (! have_align || *input_line_pointer != '"')
271 {
272 if (! have_align)
273 temp = 0;
274 else
275 {
276 temp = get_absolute_expression ();
277
278 if (temp < 0)
279 {
280 temp = 0;
281 as_warn (_("Common alignment negative; 0 assumed"));
282 }
283 }
284
285 if (symbol_get_obj (symbolP)->local)
286 {
287 segT old_sec;
288 int old_subsec;
289 char *pfrag;
290 int align;
291 flagword applicable;
292
293 old_sec = now_seg;
294 old_subsec = now_subseg;
295
296 applicable = bfd_applicable_section_flags (stdoutput);
297
298 applicable &= SEC_ALLOC;
299
300 switch (area)
301 {
302 case SCOMMON_SECTION:
303 do_v850_seg (SBSS_SECTION, 0);
304 break;
305
306 case ZCOMMON_SECTION:
307 do_v850_seg (ZBSS_SECTION, 0);
308 break;
309
310 case TCOMMON_SECTION:
311 do_v850_seg (TBSS_SECTION, 0);
312 break;
313 }
314
315 if (temp)
316 {
317 /* Convert to a power of 2 alignment. */
318 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
319 ;
320
321 if (temp != 1)
322 {
323 as_bad (_("Common alignment not a power of 2"));
324 ignore_rest_of_line ();
325 return;
326 }
327 }
328 else
329 align = 0;
330
331 record_alignment (now_seg, align);
332
333 if (align)
334 frag_align (align, 0, 0);
335
336 switch (area)
337 {
338 case SCOMMON_SECTION:
339 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
340 symbol_get_frag (symbolP)->fr_symbol = 0;
341 break;
342
343 case ZCOMMON_SECTION:
344 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
345 symbol_get_frag (symbolP)->fr_symbol = 0;
346 break;
347
348 case TCOMMON_SECTION:
349 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
350 symbol_get_frag (symbolP)->fr_symbol = 0;
351 break;
352
353 default:
354 abort ();
355 }
356
357 symbol_set_frag (symbolP, frag_now);
358 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
359 (offsetT) size, (char *) 0);
360 *pfrag = 0;
361 S_SET_SIZE (symbolP, size);
362
363 switch (area)
364 {
365 case SCOMMON_SECTION:
366 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
367 break;
368
369 case ZCOMMON_SECTION:
370 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
371 break;
372
373 case TCOMMON_SECTION:
374 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
375 break;
376
377 default:
378 abort ();
379 }
380
381 S_CLEAR_EXTERNAL (symbolP);
382 obj_elf_section_change_hook ();
383 subseg_set (old_sec, old_subsec);
384 }
385 else
386 {
387 segT old_sec;
388 int old_subsec;
389
390 allocate_common:
391 old_sec = now_seg;
392 old_subsec = now_subseg;
393
394 S_SET_VALUE (symbolP, (valueT) size);
395 S_SET_ALIGN (symbolP, temp);
396 S_SET_EXTERNAL (symbolP);
397
398 switch (area)
399 {
400 case SCOMMON_SECTION:
401 case ZCOMMON_SECTION:
402 case TCOMMON_SECTION:
403 do_v850_seg (area, 0);
404 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
405 break;
406
407 default:
408 abort ();
409 }
410
411 obj_elf_section_change_hook ();
412 subseg_set (old_sec, old_subsec);
413 }
414 }
415 else
416 {
417 input_line_pointer++;
418
419 /* @@ Some use the dot, some don't. Can we get some consistency?? */
420 if (*input_line_pointer == '.')
421 input_line_pointer++;
422
423 /* @@ Some say data, some say bss. */
424 if (strncmp (input_line_pointer, "bss\"", 4)
425 && strncmp (input_line_pointer, "data\"", 5))
426 {
427 while (*--input_line_pointer != '"')
428 ;
429 input_line_pointer--;
430 goto bad_common_segment;
431 }
432
433 while (*input_line_pointer++ != '"')
434 ;
435
436 goto allocate_common;
437 }
438
439 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
440
441 demand_empty_rest_of_line ();
442 return;
443
444 {
445 bad_common_segment:
446 p = input_line_pointer;
447 while (*p && *p != '\n')
448 p++;
449 c = *p;
450 *p = '\0';
451 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
452 *p = c;
453 input_line_pointer = p;
454 ignore_rest_of_line ();
455 return;
456 }
457 }
458
459 static void
460 set_machine (int number)
461 {
462 machine = number;
463 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
464
465 switch (machine)
466 {
467 case 0: processor_mask = PROCESSOR_V850; break;
468 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
469 case bfd_mach_v850e1: processor_mask = PROCESSOR_V850E; break;
470 }
471 }
472
473 static void
474 v850_longcode (int type)
475 {
476 expressionS ex;
477
478 if (! v850_relax)
479 {
480 if (type == 1)
481 as_warn (".longcall pseudo-op seen when not relaxing");
482 else
483 as_warn (".longjump pseudo-op seen when not relaxing");
484 }
485
486 expression (&ex);
487
488 if (ex.X_op != O_symbol || ex.X_add_number != 0)
489 {
490 as_bad ("bad .longcall format");
491 ignore_rest_of_line ();
492
493 return;
494 }
495
496 if (type == 1)
497 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
498 BFD_RELOC_V850_LONGCALL);
499 else
500 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
501 BFD_RELOC_V850_LONGJUMP);
502
503 demand_empty_rest_of_line ();
504 }
505
506 /* The target specific pseudo-ops which we support. */
507 const pseudo_typeS md_pseudo_table[] =
508 {
509 { "sdata", v850_seg, SDATA_SECTION },
510 { "tdata", v850_seg, TDATA_SECTION },
511 { "zdata", v850_seg, ZDATA_SECTION },
512 { "sbss", v850_seg, SBSS_SECTION },
513 { "tbss", v850_seg, TBSS_SECTION },
514 { "zbss", v850_seg, ZBSS_SECTION },
515 { "rosdata", v850_seg, ROSDATA_SECTION },
516 { "rozdata", v850_seg, ROZDATA_SECTION },
517 { "bss", v850_seg, BSS_SECTION },
518 { "offset", v850_offset, 0 },
519 { "word", cons, 4 },
520 { "zcomm", v850_comm, ZCOMMON_SECTION },
521 { "scomm", v850_comm, SCOMMON_SECTION },
522 { "tcomm", v850_comm, TCOMMON_SECTION },
523 { "v850", set_machine, 0 },
524 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
525 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
526 { "v850e", set_machine, bfd_mach_v850e },
527 { "v850e1", set_machine, bfd_mach_v850e1 },
528 { "longcall", v850_longcode, 1 },
529 { "longjump", v850_longcode, 2 },
530 { NULL, NULL, 0 }
531 };
532
533 /* Opcode hash table. */
534 static struct hash_control *v850_hash;
535
536 /* This table is sorted. Suitable for searching by a binary search. */
537 static const struct reg_name pre_defined_registers[] =
538 {
539 { "ep", 30 }, /* ep - element ptr. */
540 { "gp", 4 }, /* gp - global ptr. */
541 { "hp", 2 }, /* hp - handler stack ptr. */
542 { "lp", 31 }, /* lp - link ptr. */
543 { "r0", 0 },
544 { "r1", 1 },
545 { "r10", 10 },
546 { "r11", 11 },
547 { "r12", 12 },
548 { "r13", 13 },
549 { "r14", 14 },
550 { "r15", 15 },
551 { "r16", 16 },
552 { "r17", 17 },
553 { "r18", 18 },
554 { "r19", 19 },
555 { "r2", 2 },
556 { "r20", 20 },
557 { "r21", 21 },
558 { "r22", 22 },
559 { "r23", 23 },
560 { "r24", 24 },
561 { "r25", 25 },
562 { "r26", 26 },
563 { "r27", 27 },
564 { "r28", 28 },
565 { "r29", 29 },
566 { "r3", 3 },
567 { "r30", 30 },
568 { "r31", 31 },
569 { "r4", 4 },
570 { "r5", 5 },
571 { "r6", 6 },
572 { "r7", 7 },
573 { "r8", 8 },
574 { "r9", 9 },
575 { "sp", 3 }, /* sp - stack ptr. */
576 { "tp", 5 }, /* tp - text ptr. */
577 { "zero", 0 },
578 };
579
580 #define REG_NAME_CNT \
581 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
582
583 static const struct reg_name system_registers[] =
584 {
585 { "asid", 23 },
586 { "bpc", 22 },
587 { "bpav", 24 },
588 { "bpam", 25 },
589 { "bpdv", 26 },
590 { "bpdm", 27 },
591 { "ctbp", 20 },
592 { "ctpc", 16 },
593 { "ctpsw", 17 },
594 { "dbpc", 18 },
595 { "dbpsw", 19 },
596 { "dir", 21 },
597 { "ecr", 4 },
598 { "eipc", 0 },
599 { "eipsw", 1 },
600 { "fepc", 2 },
601 { "fepsw", 3 },
602 { "psw", 5 },
603 };
604
605 #define SYSREG_NAME_CNT \
606 (sizeof (system_registers) / sizeof (struct reg_name))
607
608 static const struct reg_name system_list_registers[] =
609 {
610 {"PS", 5 },
611 {"SR", 0 + 1}
612 };
613
614 #define SYSREGLIST_NAME_CNT \
615 (sizeof (system_list_registers) / sizeof (struct reg_name))
616
617 static const struct reg_name cc_names[] =
618 {
619 { "c", 0x1 },
620 { "e", 0x2 },
621 { "ge", 0xe },
622 { "gt", 0xf },
623 { "h", 0xb },
624 { "l", 0x1 },
625 { "le", 0x7 },
626 { "lt", 0x6 },
627 { "n", 0x4 },
628 { "nc", 0x9 },
629 { "ne", 0xa },
630 { "nh", 0x3 },
631 { "nl", 0x9 },
632 { "ns", 0xc },
633 { "nv", 0x8 },
634 { "nz", 0xa },
635 { "p", 0xc },
636 { "s", 0x4 },
637 { "sa", 0xd },
638 { "t", 0x5 },
639 { "v", 0x0 },
640 { "z", 0x2 },
641 };
642
643 #define CC_NAME_CNT \
644 (sizeof (cc_names) / sizeof (struct reg_name))
645
646 /* Do a binary search of the given register table to see if NAME is a
647 valid regiter name. Return the register number from the array on
648 success, or -1 on failure. */
649
650 static int
651 reg_name_search (const struct reg_name *regs,
652 int regcount,
653 const char *name,
654 bfd_boolean accept_numbers)
655 {
656 int middle, low, high;
657 int cmp;
658 symbolS *symbolP;
659
660 /* If the register name is a symbol, then evaluate it. */
661 if ((symbolP = symbol_find (name)) != NULL)
662 {
663 /* If the symbol is an alias for another name then use that.
664 If the symbol is an alias for a number, then return the number. */
665 if (symbol_equated_p (symbolP))
666 name
667 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
668 else if (accept_numbers)
669 {
670 int reg = S_GET_VALUE (symbolP);
671
672 if (reg >= 0 && reg <= 31)
673 return reg;
674 }
675
676 /* Otherwise drop through and try parsing name normally. */
677 }
678
679 low = 0;
680 high = regcount - 1;
681
682 do
683 {
684 middle = (low + high) / 2;
685 cmp = strcasecmp (name, regs[middle].name);
686 if (cmp < 0)
687 high = middle - 1;
688 else if (cmp > 0)
689 low = middle + 1;
690 else
691 return regs[middle].value;
692 }
693 while (low <= high);
694 return -1;
695 }
696
697 /* Summary of register_name().
698
699 in: Input_line_pointer points to 1st char of operand.
700
701 out: An expressionS.
702 The operand may have been a register: in this case, X_op == O_register,
703 X_add_number is set to the register number, and truth is returned.
704 Input_line_pointer->(next non-blank) char after operand, or is in
705 its original state. */
706
707 static bfd_boolean
708 register_name (expressionS *expressionP)
709 {
710 int reg_number;
711 char *name;
712 char *start;
713 char c;
714
715 /* Find the spelling of the operand. */
716 start = name = input_line_pointer;
717
718 c = get_symbol_end ();
719
720 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
721 name, FALSE);
722
723 /* Put back the delimiting char. */
724 *input_line_pointer = c;
725
726 /* Look to see if it's in the register table. */
727 if (reg_number >= 0)
728 {
729 expressionP->X_op = O_register;
730 expressionP->X_add_number = reg_number;
731
732 /* Make the rest nice. */
733 expressionP->X_add_symbol = NULL;
734 expressionP->X_op_symbol = NULL;
735
736 return TRUE;
737 }
738 else
739 {
740 /* Reset the line as if we had not done anything. */
741 input_line_pointer = start;
742
743 return FALSE;
744 }
745 }
746
747 /* Summary of system_register_name().
748
749 in: INPUT_LINE_POINTER points to 1st char of operand.
750 EXPRESSIONP points to an expression structure to be filled in.
751 ACCEPT_NUMBERS is true iff numerical register names may be used.
752 ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
753 accepted.
754
755 out: An expressionS structure in expressionP.
756 The operand may have been a register: in this case, X_op == O_register,
757 X_add_number is set to the register number, and truth is returned.
758 Input_line_pointer->(next non-blank) char after operand, or is in
759 its original state. */
760
761 static bfd_boolean
762 system_register_name (expressionS *expressionP,
763 bfd_boolean accept_numbers,
764 bfd_boolean accept_list_names)
765 {
766 int reg_number;
767 char *name;
768 char *start;
769 char c;
770
771 /* Find the spelling of the operand. */
772 start = name = input_line_pointer;
773
774 c = get_symbol_end ();
775 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
776 accept_numbers);
777
778 /* Put back the delimiting char. */
779 *input_line_pointer = c;
780
781 if (reg_number < 0
782 && accept_numbers)
783 {
784 /* Reset input_line pointer. */
785 input_line_pointer = start;
786
787 if (ISDIGIT (*input_line_pointer))
788 {
789 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
790
791 /* Make sure that the register number is allowable. */
792 if (reg_number < 0
793 || (reg_number > 5 && reg_number < 16)
794 || reg_number > 27)
795 reg_number = -1;
796 }
797 else if (accept_list_names)
798 {
799 c = get_symbol_end ();
800 reg_number = reg_name_search (system_list_registers,
801 SYSREGLIST_NAME_CNT, name, FALSE);
802
803 /* Put back the delimiting char. */
804 *input_line_pointer = c;
805 }
806 }
807
808 /* Look to see if it's in the register table. */
809 if (reg_number >= 0)
810 {
811 expressionP->X_op = O_register;
812 expressionP->X_add_number = reg_number;
813
814 /* Make the rest nice. */
815 expressionP->X_add_symbol = NULL;
816 expressionP->X_op_symbol = NULL;
817
818 return TRUE;
819 }
820 else
821 {
822 /* Reset the line as if we had not done anything. */
823 input_line_pointer = start;
824
825 return FALSE;
826 }
827 }
828
829 /* Summary of cc_name().
830
831 in: INPUT_LINE_POINTER points to 1st char of operand.
832
833 out: An expressionS.
834 The operand may have been a register: in this case, X_op == O_register,
835 X_add_number is set to the register number, and truth is returned.
836 Input_line_pointer->(next non-blank) char after operand, or is in
837 its original state. */
838
839 static bfd_boolean
840 cc_name (expressionS *expressionP)
841 {
842 int reg_number;
843 char *name;
844 char *start;
845 char c;
846
847 /* Find the spelling of the operand. */
848 start = name = input_line_pointer;
849
850 c = get_symbol_end ();
851 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
852
853 /* Put back the delimiting char. */
854 *input_line_pointer = c;
855
856 /* Look to see if it's in the register table. */
857 if (reg_number >= 0)
858 {
859 expressionP->X_op = O_constant;
860 expressionP->X_add_number = reg_number;
861
862 /* Make the rest nice. */
863 expressionP->X_add_symbol = NULL;
864 expressionP->X_op_symbol = NULL;
865
866 return TRUE;
867 }
868 else
869 {
870 /* Reset the line as if we had not done anything. */
871 input_line_pointer = start;
872
873 return FALSE;
874 }
875 }
876
877 static void
878 skip_white_space (void)
879 {
880 while (*input_line_pointer == ' '
881 || *input_line_pointer == '\t')
882 ++input_line_pointer;
883 }
884
885 /* Summary of parse_register_list ().
886
887 in: INPUT_LINE_POINTER points to 1st char of a list of registers.
888 INSN is the partially constructed instruction.
889 OPERAND is the operand being inserted.
890
891 out: NULL if the parse completed successfully, otherwise a
892 pointer to an error message is returned. If the parse
893 completes the correct bit fields in the instruction
894 will be filled in.
895
896 Parses register lists with the syntax:
897
898 { rX }
899 { rX, rY }
900 { rX - rY }
901 { rX - rY, rZ }
902 etc
903
904 and also parses constant expressions whoes bits indicate the
905 registers in the lists. The LSB in the expression refers to
906 the lowest numbered permissible register in the register list,
907 and so on upwards. System registers are considered to be very
908 high numbers. */
909
910 static char *
911 parse_register_list (unsigned long *insn,
912 const struct v850_operand *operand)
913 {
914 static int type1_regs[32] =
915 {
916 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
917 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
918 };
919 static int type2_regs[32] =
920 {
921 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
922 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
923 };
924 static int type3_regs[32] =
925 {
926 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
927 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
928 };
929 int *regs;
930 expressionS exp;
931
932 /* Select a register array to parse. */
933 switch (operand->shift)
934 {
935 case 0xffe00001: regs = type1_regs; break;
936 case 0xfff8000f: regs = type2_regs; break;
937 case 0xfff8001f: regs = type3_regs; break;
938 default:
939 as_bad (_("unknown operand shift: %x\n"), operand->shift);
940 return _("internal failure in parse_register_list");
941 }
942
943 skip_white_space ();
944
945 /* If the expression starts with a curly brace it is a register list.
946 Otherwise it is a constant expression, whoes bits indicate which
947 registers are to be included in the list. */
948 if (*input_line_pointer != '{')
949 {
950 int reg;
951 int i;
952
953 expression (&exp);
954
955 if (exp.X_op != O_constant)
956 return _("constant expression or register list expected");
957
958 if (regs == type1_regs)
959 {
960 if (exp.X_add_number & 0xFFFFF000)
961 return _("high bits set in register list expression");
962
963 for (reg = 20; reg < 32; reg++)
964 if (exp.X_add_number & (1 << (reg - 20)))
965 {
966 for (i = 0; i < 32; i++)
967 if (regs[i] == reg)
968 *insn |= (1 << i);
969 }
970 }
971 else if (regs == type2_regs)
972 {
973 if (exp.X_add_number & 0xFFFE0000)
974 return _("high bits set in register list expression");
975
976 for (reg = 1; reg < 16; reg++)
977 if (exp.X_add_number & (1 << (reg - 1)))
978 {
979 for (i = 0; i < 32; i++)
980 if (regs[i] == reg)
981 *insn |= (1 << i);
982 }
983
984 if (exp.X_add_number & (1 << 15))
985 *insn |= (1 << 3);
986
987 if (exp.X_add_number & (1 << 16))
988 *insn |= (1 << 19);
989 }
990 else /* regs == type3_regs */
991 {
992 if (exp.X_add_number & 0xFFFE0000)
993 return _("high bits set in register list expression");
994
995 for (reg = 16; reg < 32; reg++)
996 if (exp.X_add_number & (1 << (reg - 16)))
997 {
998 for (i = 0; i < 32; i++)
999 if (regs[i] == reg)
1000 *insn |= (1 << i);
1001 }
1002
1003 if (exp.X_add_number & (1 << 16))
1004 *insn |= (1 << 19);
1005 }
1006
1007 return NULL;
1008 }
1009
1010 input_line_pointer++;
1011
1012 /* Parse the register list until a terminator (closing curly brace or
1013 new-line) is found. */
1014 for (;;)
1015 {
1016 if (register_name (&exp))
1017 {
1018 int i;
1019
1020 /* Locate the given register in the list, and if it is there,
1021 insert the corresponding bit into the instruction. */
1022 for (i = 0; i < 32; i++)
1023 {
1024 if (regs[i] == exp.X_add_number)
1025 {
1026 *insn |= (1 << i);
1027 break;
1028 }
1029 }
1030
1031 if (i == 32)
1032 return _("illegal register included in list");
1033 }
1034 else if (system_register_name (&exp, TRUE, TRUE))
1035 {
1036 if (regs == type1_regs)
1037 {
1038 return _("system registers cannot be included in list");
1039 }
1040 else if (exp.X_add_number == 5)
1041 {
1042 if (regs == type2_regs)
1043 return _("PSW cannot be included in list");
1044 else
1045 *insn |= 0x8;
1046 }
1047 else if (exp.X_add_number < 4)
1048 *insn |= 0x80000;
1049 else
1050 return _("High value system registers cannot be included in list");
1051 }
1052 else if (*input_line_pointer == '}')
1053 {
1054 input_line_pointer++;
1055 break;
1056 }
1057 else if (*input_line_pointer == ',')
1058 {
1059 input_line_pointer++;
1060 continue;
1061 }
1062 else if (*input_line_pointer == '-')
1063 {
1064 /* We have encountered a range of registers: rX - rY. */
1065 int j;
1066 expressionS exp2;
1067
1068 /* Skip the dash. */
1069 ++input_line_pointer;
1070
1071 /* Get the second register in the range. */
1072 if (! register_name (&exp2))
1073 {
1074 return _("second register should follow dash in register list");
1075 exp2.X_add_number = exp.X_add_number;
1076 }
1077
1078 /* Add the rest of the registers in the range. */
1079 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1080 {
1081 int i;
1082
1083 /* Locate the given register in the list, and if it is there,
1084 insert the corresponding bit into the instruction. */
1085 for (i = 0; i < 32; i++)
1086 {
1087 if (regs[i] == j)
1088 {
1089 *insn |= (1 << i);
1090 break;
1091 }
1092 }
1093
1094 if (i == 32)
1095 return _("illegal register included in list");
1096 }
1097 }
1098 else
1099 break;
1100
1101 skip_white_space ();
1102 }
1103
1104 return NULL;
1105 }
1106
1107 const char *md_shortopts = "m:";
1108
1109 struct option md_longopts[] =
1110 {
1111 {NULL, no_argument, NULL, 0}
1112 };
1113
1114 size_t md_longopts_size = sizeof (md_longopts);
1115
1116 void
1117 md_show_usage (FILE *stream)
1118 {
1119 fprintf (stream, _(" V850 options:\n"));
1120 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1121 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1122 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1123 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1124 fprintf (stream, _(" -mv850e1 The code is targeted at the v850e1\n"));
1125 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1126 fprintf (stream, _(" -mrelax Enable relaxation\n"));
1127 }
1128
1129 int
1130 md_parse_option (int c, char *arg)
1131 {
1132 if (c != 'm')
1133 return 0;
1134
1135 if (strcmp (arg, "warn-signed-overflow") == 0)
1136 warn_signed_overflows = TRUE;
1137
1138 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1139 warn_unsigned_overflows = TRUE;
1140
1141 else if (strcmp (arg, "v850") == 0)
1142 {
1143 machine = 0;
1144 processor_mask = PROCESSOR_V850;
1145 }
1146 else if (strcmp (arg, "v850e") == 0)
1147 {
1148 machine = bfd_mach_v850e;
1149 processor_mask = PROCESSOR_V850E;
1150 }
1151 else if (strcmp (arg, "v850e1") == 0)
1152 {
1153 machine = bfd_mach_v850e1;
1154 processor_mask = PROCESSOR_V850E1;
1155 }
1156 else if (strcmp (arg, "v850any") == 0)
1157 {
1158 /* Tell the world that this is for any v850 chip. */
1159 machine = 0;
1160
1161 /* But support instructions for the extended versions. */
1162 processor_mask = PROCESSOR_V850E;
1163 processor_mask |= PROCESSOR_V850E1;
1164 }
1165 else if (strcmp (arg, "relax") == 0)
1166 v850_relax = 1;
1167 else
1168 return 0;
1169
1170 return 1;
1171 }
1172
1173 symbolS *
1174 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1175 {
1176 return 0;
1177 }
1178
1179 char *
1180 md_atof (int type, char *litp, int *sizep)
1181 {
1182 int prec;
1183 LITTLENUM_TYPE words[4];
1184 char *t;
1185 int i;
1186
1187 switch (type)
1188 {
1189 case 'f':
1190 prec = 2;
1191 break;
1192
1193 case 'd':
1194 prec = 4;
1195 break;
1196
1197 default:
1198 *sizep = 0;
1199 return _("bad call to md_atof");
1200 }
1201
1202 t = atof_ieee (input_line_pointer, type, words);
1203 if (t)
1204 input_line_pointer = t;
1205
1206 *sizep = prec * 2;
1207
1208 for (i = prec - 1; i >= 0; i--)
1209 {
1210 md_number_to_chars (litp, (valueT) words[i], 2);
1211 litp += 2;
1212 }
1213
1214 return NULL;
1215 }
1216
1217 /* Very gross. */
1218
1219 void
1220 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
1221 asection *sec,
1222 fragS *fragP)
1223 {
1224 /* This code performs some nasty type punning between the
1225 fr_opcode field of the frag structure (a char *) and the
1226 fx_r_type field of the fix structure (a bfd_reloc_code_real_type)
1227 On a 64bit host this causes problems because these two fields
1228 are not the same size, but since we know that we are only
1229 ever storing small integers in the fields, it is safe to use
1230 a union to convert between them. */
1231 union u
1232 {
1233 bfd_reloc_code_real_type fx_r_type;
1234 char * fr_opcode;
1235 }
1236 opcode_converter;
1237 subseg_change (sec, 0);
1238
1239 opcode_converter.fr_opcode = fragP->fr_opcode;
1240
1241 /* In range conditional or unconditional branch. */
1242 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1243 {
1244 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1245 fragP->fr_offset, 1,
1246 BFD_RELOC_UNUSED + opcode_converter.fx_r_type);
1247 fragP->fr_fix += 2;
1248 }
1249 /* Out of range conditional branch. Emit a branch around a jump. */
1250 else if (fragP->fr_subtype == 1)
1251 {
1252 unsigned char *buffer =
1253 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1254
1255 /* Reverse the condition of the first branch. */
1256 buffer[0] ^= 0x08;
1257 /* Mask off all the displacement bits. */
1258 buffer[0] &= 0x8f;
1259 buffer[1] &= 0x07;
1260 /* Now set the displacement bits so that we branch
1261 around the unconditional branch. */
1262 buffer[0] |= 0x30;
1263
1264 /* Now create the unconditional branch + fixup to the final
1265 target. */
1266 md_number_to_chars ((char *) buffer + 2, 0x00000780, 4);
1267 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1268 fragP->fr_offset, 1,
1269 BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1);
1270 fragP->fr_fix += 6;
1271 }
1272 /* Out of range unconditional branch. Emit a jump. */
1273 else if (fragP->fr_subtype == 3)
1274 {
1275 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1276 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1277 fragP->fr_offset, 1,
1278 BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1);
1279 fragP->fr_fix += 4;
1280 }
1281 else
1282 abort ();
1283 }
1284
1285 valueT
1286 md_section_align (asection *seg, valueT addr)
1287 {
1288 int align = bfd_get_section_alignment (stdoutput, seg);
1289 return ((addr + (1 << align) - 1) & (-1 << align));
1290 }
1291
1292 void
1293 md_begin (void)
1294 {
1295 char *prev_name = "";
1296 const struct v850_opcode *op;
1297
1298 if (strncmp (TARGET_CPU, "v850e1", 6) == 0)
1299 {
1300 if (machine == -1)
1301 machine = bfd_mach_v850e1;
1302
1303 if (processor_mask == -1)
1304 processor_mask = PROCESSOR_V850E1;
1305 }
1306 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1307 {
1308 if (machine == -1)
1309 machine = bfd_mach_v850e;
1310
1311 if (processor_mask == -1)
1312 processor_mask = PROCESSOR_V850E;
1313 }
1314 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1315 {
1316 if (machine == -1)
1317 machine = 0;
1318
1319 if (processor_mask == -1)
1320 processor_mask = PROCESSOR_V850;
1321 }
1322 else
1323 /* xgettext:c-format */
1324 as_bad (_("Unable to determine default target processor from string: %s"),
1325 TARGET_CPU);
1326
1327 v850_hash = hash_new ();
1328
1329 /* Insert unique names into hash table. The V850 instruction set
1330 has many identical opcode names that have different opcodes based
1331 on the operands. This hash table then provides a quick index to
1332 the first opcode with a particular name in the opcode table. */
1333 op = v850_opcodes;
1334 while (op->name)
1335 {
1336 if (strcmp (prev_name, op->name))
1337 {
1338 prev_name = (char *) op->name;
1339 hash_insert (v850_hash, op->name, (char *) op);
1340 }
1341 op++;
1342 }
1343
1344 v850_seg_table[BSS_SECTION].s = bss_section;
1345 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1346 }
1347
1348 static bfd_reloc_code_real_type
1349 handle_lo16 (const struct v850_operand *operand)
1350 {
1351 if (operand != NULL)
1352 {
1353 if (operand->bits == -1)
1354 return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
1355
1356 if (!(operand->bits == 16 && operand->shift == 16)
1357 && !(operand->bits == 15 && operand->shift == 17))
1358 {
1359 as_bad (_("lo() relocation used on an instruction which does "
1360 "not support it"));
1361 return BFD_RELOC_64; /* Used to indicate an error condition. */
1362 }
1363 }
1364 return BFD_RELOC_LO16;
1365 }
1366
1367 static bfd_reloc_code_real_type
1368 handle_ctoff (const struct v850_operand *operand)
1369 {
1370 if (operand == NULL)
1371 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1372
1373 if (operand->bits != 6
1374 || operand->shift != 0)
1375 {
1376 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1377 return BFD_RELOC_64; /* Used to indicate an error condition. */
1378 }
1379
1380 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1381 }
1382
1383 static bfd_reloc_code_real_type
1384 handle_sdaoff (const struct v850_operand *operand)
1385 {
1386 if (operand == NULL)
1387 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1388
1389 if (operand->bits == 15 && operand->shift == 17)
1390 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1391
1392 if (operand->bits == -1)
1393 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1394
1395 if (operand->bits != 16
1396 || operand->shift != 16)
1397 {
1398 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1399 return BFD_RELOC_64; /* Used to indicate an error condition. */
1400 }
1401
1402 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1403 }
1404
1405 static bfd_reloc_code_real_type
1406 handle_zdaoff (const struct v850_operand *operand)
1407 {
1408 if (operand == NULL)
1409 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1410
1411 if (operand->bits == 15 && operand->shift == 17)
1412 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1413
1414 if (operand->bits == -1)
1415 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1416
1417 if (operand->bits != 16
1418 || operand->shift != 16)
1419 {
1420 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1421 /* Used to indicate an error condition. */
1422 return BFD_RELOC_64;
1423 }
1424
1425 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1426 }
1427
1428 static bfd_reloc_code_real_type
1429 handle_tdaoff (const struct v850_operand *operand)
1430 {
1431 if (operand == NULL)
1432 /* Data item, not an instruction. */
1433 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1434
1435 if (operand->bits == 6 && operand->shift == 1)
1436 /* sld.w/sst.w, operand: D8_6. */
1437 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1438
1439 if (operand->bits == 4 && operand->insert != NULL)
1440 /* sld.hu, operand: D5-4. */
1441 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1442
1443 if (operand->bits == 4 && operand->insert == NULL)
1444 /* sld.bu, operand: D4. */
1445 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1446
1447 if (operand->bits == 16 && operand->shift == 16)
1448 /* set1 & chums, operands: D16. */
1449 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1450
1451 if (operand->bits != 7)
1452 {
1453 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1454 /* Used to indicate an error condition. */
1455 return BFD_RELOC_64;
1456 }
1457
1458 return operand->insert != NULL
1459 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7. */
1460 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, operand: D7. */
1461 }
1462
1463 /* Warning: The code in this function relies upon the definitions
1464 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1465 matching the hard coded values contained herein. */
1466
1467 static bfd_reloc_code_real_type
1468 v850_reloc_prefix (const struct v850_operand *operand)
1469 {
1470 bfd_boolean paren_skipped = FALSE;
1471
1472 /* Skip leading opening parenthesis. */
1473 if (*input_line_pointer == '(')
1474 {
1475 ++input_line_pointer;
1476 paren_skipped = TRUE;
1477 }
1478
1479 #define CHECK_(name, reloc) \
1480 if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \
1481 { \
1482 input_line_pointer += strlen (name); \
1483 return reloc; \
1484 }
1485
1486 CHECK_ ("hi0", BFD_RELOC_HI16 );
1487 CHECK_ ("hi", BFD_RELOC_HI16_S );
1488 CHECK_ ("lo", handle_lo16 (operand) );
1489 CHECK_ ("sdaoff", handle_sdaoff (operand));
1490 CHECK_ ("zdaoff", handle_zdaoff (operand));
1491 CHECK_ ("tdaoff", handle_tdaoff (operand));
1492 CHECK_ ("hilo", BFD_RELOC_32 );
1493 CHECK_ ("ctoff", handle_ctoff (operand) );
1494
1495 /* Restore skipped parenthesis. */
1496 if (paren_skipped)
1497 --input_line_pointer;
1498
1499 return BFD_RELOC_UNUSED;
1500 }
1501
1502 /* Insert an operand value into an instruction. */
1503
1504 static unsigned long
1505 v850_insert_operand (unsigned long insn,
1506 const struct v850_operand *operand,
1507 offsetT val,
1508 char *file,
1509 unsigned int line,
1510 char *str)
1511 {
1512 if (operand->insert)
1513 {
1514 const char *message = NULL;
1515
1516 insn = operand->insert (insn, val, &message);
1517 if (message != NULL)
1518 {
1519 if ((operand->flags & V850_OPERAND_SIGNED)
1520 && ! warn_signed_overflows
1521 && strstr (message, "out of range") != NULL)
1522 {
1523 /* Skip warning... */
1524 }
1525 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1526 && ! warn_unsigned_overflows
1527 && strstr (message, "out of range") != NULL)
1528 {
1529 /* Skip warning... */
1530 }
1531 else if (str)
1532 {
1533 if (file == (char *) NULL)
1534 as_warn ("%s: %s", str, message);
1535 else
1536 as_warn_where (file, line, "%s: %s", str, message);
1537 }
1538 else
1539 {
1540 if (file == (char *) NULL)
1541 as_warn (message);
1542 else
1543 as_warn_where (file, line, message);
1544 }
1545 }
1546 }
1547 else
1548 {
1549 if (operand->bits != 32)
1550 {
1551 long min, max;
1552
1553 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1554 {
1555 if (! warn_signed_overflows)
1556 max = (1 << operand->bits) - 1;
1557 else
1558 max = (1 << (operand->bits - 1)) - 1;
1559
1560 min = -(1 << (operand->bits - 1));
1561 }
1562 else
1563 {
1564 max = (1 << operand->bits) - 1;
1565
1566 if (! warn_unsigned_overflows)
1567 min = -(1 << (operand->bits - 1));
1568 else
1569 min = 0;
1570 }
1571
1572 if (val < (offsetT) min || val > (offsetT) max)
1573 {
1574 char buf [128];
1575
1576 /* Restore min and mix to expected values for decimal ranges. */
1577 if ((operand->flags & V850_OPERAND_SIGNED)
1578 && ! warn_signed_overflows)
1579 max = (1 << (operand->bits - 1)) - 1;
1580
1581 if (! (operand->flags & V850_OPERAND_SIGNED)
1582 && ! warn_unsigned_overflows)
1583 min = 0;
1584
1585 if (str)
1586 sprintf (buf, "%s: ", str);
1587 else
1588 buf[0] = 0;
1589 strcat (buf, _("operand"));
1590
1591 as_bad_value_out_of_range (buf, val, (offsetT) min, (offsetT) max, file, line);
1592 }
1593 }
1594
1595 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1596 }
1597
1598 return insn;
1599 }
1600 \f
1601 static char copy_of_instruction[128];
1602
1603 void
1604 md_assemble (char *str)
1605 {
1606 char *s;
1607 char *start_of_operands;
1608 struct v850_opcode *opcode;
1609 struct v850_opcode *next_opcode;
1610 const unsigned char *opindex_ptr;
1611 int next_opindex;
1612 int relaxable = 0;
1613 unsigned long insn;
1614 unsigned long insn_size;
1615 char *f;
1616 int i;
1617 int match;
1618 bfd_boolean extra_data_after_insn = FALSE;
1619 unsigned extra_data_len = 0;
1620 unsigned long extra_data = 0;
1621 char *saved_input_line_pointer;
1622
1623 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1624
1625 /* Get the opcode. */
1626 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
1627 continue;
1628
1629 if (*s != '\0')
1630 *s++ = '\0';
1631
1632 /* Find the first opcode with the proper name. */
1633 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1634 if (opcode == NULL)
1635 {
1636 /* xgettext:c-format */
1637 as_bad (_("Unrecognized opcode: `%s'"), str);
1638 ignore_rest_of_line ();
1639 return;
1640 }
1641
1642 str = s;
1643 while (ISSPACE (*str))
1644 ++str;
1645
1646 start_of_operands = str;
1647
1648 saved_input_line_pointer = input_line_pointer;
1649
1650 for (;;)
1651 {
1652 const char *errmsg = NULL;
1653
1654 match = 0;
1655
1656 if ((opcode->processors & processor_mask) == 0)
1657 {
1658 errmsg = _("Target processor does not support this instruction.");
1659 goto error;
1660 }
1661
1662 relaxable = 0;
1663 fc = 0;
1664 next_opindex = 0;
1665 insn = opcode->opcode;
1666 extra_data_after_insn = FALSE;
1667
1668 input_line_pointer = str = start_of_operands;
1669
1670 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1671 {
1672 const struct v850_operand *operand;
1673 char *hold;
1674 expressionS ex;
1675 bfd_reloc_code_real_type reloc;
1676
1677 if (next_opindex == 0)
1678 operand = &v850_operands[*opindex_ptr];
1679 else
1680 {
1681 operand = &v850_operands[next_opindex];
1682 next_opindex = 0;
1683 }
1684
1685 errmsg = NULL;
1686
1687 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1688 ++str;
1689
1690 if (operand->flags & V850_OPERAND_RELAX)
1691 relaxable = 1;
1692
1693 /* Gather the operand. */
1694 hold = input_line_pointer;
1695 input_line_pointer = str;
1696
1697 /* lo(), hi(), hi0(), etc... */
1698 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1699 {
1700 /* This is a fake reloc, used to indicate an error condition. */
1701 if (reloc == BFD_RELOC_64)
1702 {
1703 match = 1;
1704 goto error;
1705 }
1706
1707 expression (&ex);
1708
1709 if (ex.X_op == O_constant)
1710 {
1711 switch (reloc)
1712 {
1713 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1714 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1715 and the like. */
1716 /* Fall through. */
1717
1718 case BFD_RELOC_LO16:
1719 case BFD_RELOC_V850_LO16_SPLIT_OFFSET:
1720 {
1721 /* Truncate, then sign extend the value. */
1722 ex.X_add_number = SEXT16 (ex.X_add_number);
1723 break;
1724 }
1725
1726 case BFD_RELOC_HI16:
1727 {
1728 /* Truncate, then sign extend the value. */
1729 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1730 break;
1731 }
1732
1733 case BFD_RELOC_HI16_S:
1734 {
1735 /* Truncate, then sign extend the value. */
1736 int temp = (ex.X_add_number >> 16) & 0xffff;
1737
1738 temp += (ex.X_add_number >> 15) & 1;
1739
1740 ex.X_add_number = SEXT16 (temp);
1741 break;
1742 }
1743
1744 case BFD_RELOC_32:
1745 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1746 {
1747 errmsg = _("immediate operand is too large");
1748 goto error;
1749 }
1750
1751 extra_data_after_insn = TRUE;
1752 extra_data_len = 4;
1753 extra_data = 0;
1754 break;
1755
1756 default:
1757 fprintf (stderr, "reloc: %d\n", reloc);
1758 as_bad (_("AAARG -> unhandled constant reloc"));
1759 break;
1760 }
1761
1762 if (fc > MAX_INSN_FIXUPS)
1763 as_fatal (_("too many fixups"));
1764
1765 fixups[fc].exp = ex;
1766 fixups[fc].opindex = *opindex_ptr;
1767 fixups[fc].reloc = reloc;
1768 fc++;
1769 }
1770 else
1771 {
1772 if (reloc == BFD_RELOC_32)
1773 {
1774 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1775 {
1776 errmsg = _("immediate operand is too large");
1777 goto error;
1778 }
1779
1780 extra_data_after_insn = TRUE;
1781 extra_data_len = 4;
1782 extra_data = ex.X_add_number;
1783 }
1784
1785 if (fc > MAX_INSN_FIXUPS)
1786 as_fatal (_("too many fixups"));
1787
1788 fixups[fc].exp = ex;
1789 fixups[fc].opindex = *opindex_ptr;
1790 fixups[fc].reloc = reloc;
1791 fc++;
1792 }
1793 }
1794 else
1795 {
1796 errmsg = NULL;
1797
1798 if ((operand->flags & V850_OPERAND_REG) != 0)
1799 {
1800 if (!register_name (&ex))
1801 errmsg = _("invalid register name");
1802 else if ((operand->flags & V850_NOT_R0)
1803 && ex.X_add_number == 0)
1804 {
1805 errmsg = _("register r0 cannot be used here");
1806
1807 /* Force an error message to be generated by
1808 skipping over any following potential matches
1809 for this opcode. */
1810 opcode += 3;
1811 }
1812 }
1813 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1814 {
1815 if (!system_register_name (&ex, TRUE, FALSE))
1816 errmsg = _("invalid system register name");
1817 }
1818 else if ((operand->flags & V850_OPERAND_EP) != 0)
1819 {
1820 char *start = input_line_pointer;
1821 char c = get_symbol_end ();
1822
1823 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1824 {
1825 /* Put things back the way we found them. */
1826 *input_line_pointer = c;
1827 input_line_pointer = start;
1828 errmsg = _("expected EP register");
1829 goto error;
1830 }
1831
1832 *input_line_pointer = c;
1833 str = input_line_pointer;
1834 input_line_pointer = hold;
1835
1836 while (*str == ' ' || *str == ','
1837 || *str == '[' || *str == ']')
1838 ++str;
1839 continue;
1840 }
1841 else if ((operand->flags & V850_OPERAND_CC) != 0)
1842 {
1843 if (!cc_name (&ex))
1844 errmsg = _("invalid condition code name");
1845 }
1846 else if (operand->flags & V850E_PUSH_POP)
1847 {
1848 errmsg = parse_register_list (&insn, operand);
1849
1850 /* The parse_register_list() function has already done
1851 everything, so fake a dummy expression. */
1852 ex.X_op = O_constant;
1853 ex.X_add_number = 0;
1854 }
1855 else if (operand->flags & V850E_IMMEDIATE16)
1856 {
1857 expression (&ex);
1858
1859 if (ex.X_op != O_constant)
1860 errmsg = _("constant expression expected");
1861 else if (ex.X_add_number & 0xffff0000)
1862 {
1863 if (ex.X_add_number & 0xffff)
1864 errmsg = _("constant too big to fit into instruction");
1865 else if ((insn & 0x001fffc0) == 0x00130780)
1866 ex.X_add_number >>= 16;
1867 else
1868 errmsg = _("constant too big to fit into instruction");
1869 }
1870
1871 extra_data_after_insn = TRUE;
1872 extra_data_len = 2;
1873 extra_data = ex.X_add_number;
1874 ex.X_add_number = 0;
1875 }
1876 else if (operand->flags & V850E_IMMEDIATE32)
1877 {
1878 expression (&ex);
1879
1880 if (ex.X_op != O_constant)
1881 errmsg = _("constant expression expected");
1882
1883 extra_data_after_insn = TRUE;
1884 extra_data_len = 4;
1885 extra_data = ex.X_add_number;
1886 ex.X_add_number = 0;
1887 }
1888 else if (register_name (&ex)
1889 && (operand->flags & V850_OPERAND_REG) == 0)
1890 {
1891 char c;
1892 int exists = 0;
1893
1894 /* It is possible that an alias has been defined that
1895 matches a register name. For example the code may
1896 include a ".set ZERO, 0" directive, which matches
1897 the register name "zero". Attempt to reparse the
1898 field as an expression, and only complain if we
1899 cannot generate a constant. */
1900
1901 input_line_pointer = str;
1902
1903 c = get_symbol_end ();
1904
1905 if (symbol_find (str) != NULL)
1906 exists = 1;
1907
1908 *input_line_pointer = c;
1909 input_line_pointer = str;
1910
1911 expression (&ex);
1912
1913 if (ex.X_op != O_constant)
1914 {
1915 /* If this register is actually occurring too early on
1916 the parsing of the instruction, (because another
1917 field is missing) then report this. */
1918 if (opindex_ptr[1] != 0
1919 && (v850_operands[opindex_ptr[1]].flags
1920 & V850_OPERAND_REG))
1921 errmsg = _("syntax error: value is missing before the register name");
1922 else
1923 errmsg = _("syntax error: register not expected");
1924
1925 /* If we created a symbol in the process of this
1926 test then delete it now, so that it will not
1927 be output with the real symbols... */
1928 if (exists == 0
1929 && ex.X_op == O_symbol)
1930 symbol_remove (ex.X_add_symbol,
1931 &symbol_rootP, &symbol_lastP);
1932 }
1933 }
1934 else if (system_register_name (&ex, FALSE, FALSE)
1935 && (operand->flags & V850_OPERAND_SRG) == 0)
1936 errmsg = _("syntax error: system register not expected");
1937
1938 else if (cc_name (&ex)
1939 && (operand->flags & V850_OPERAND_CC) == 0)
1940 errmsg = _("syntax error: condition code not expected");
1941
1942 else
1943 {
1944 expression (&ex);
1945 /* Special case:
1946 If we are assembling a MOV instruction and the immediate
1947 value does not fit into the bits available then create a
1948 fake error so that the next MOV instruction will be
1949 selected. This one has a 32 bit immediate field. */
1950
1951 if (((insn & 0x07e0) == 0x0200)
1952 && operand->bits == 5 /* Do not match the CALLT instruction. */
1953 && ex.X_op == O_constant
1954 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
1955 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
1956 errmsg = _("immediate operand is too large");
1957 }
1958
1959 if (errmsg)
1960 goto error;
1961
1962 switch (ex.X_op)
1963 {
1964 case O_illegal:
1965 errmsg = _("illegal operand");
1966 goto error;
1967 case O_absent:
1968 errmsg = _("missing operand");
1969 goto error;
1970 case O_register:
1971 if ((operand->flags
1972 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
1973 {
1974 errmsg = _("invalid operand");
1975 goto error;
1976 }
1977 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1978 NULL, 0, copy_of_instruction);
1979 break;
1980
1981 case O_constant:
1982 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1983 NULL, 0, copy_of_instruction);
1984 break;
1985
1986 default:
1987 /* We need to generate a fixup for this expression. */
1988 if (fc >= MAX_INSN_FIXUPS)
1989 as_fatal (_("too many fixups"));
1990
1991 fixups[fc].exp = ex;
1992 fixups[fc].opindex = *opindex_ptr;
1993 fixups[fc].reloc = BFD_RELOC_UNUSED;
1994 ++fc;
1995 break;
1996 }
1997 }
1998
1999 str = input_line_pointer;
2000 input_line_pointer = hold;
2001
2002 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2003 || *str == ')')
2004 ++str;
2005 }
2006 match = 1;
2007
2008 error:
2009 if (match == 0)
2010 {
2011 next_opcode = opcode + 1;
2012 if (next_opcode->name != NULL
2013 && strcmp (next_opcode->name, opcode->name) == 0)
2014 {
2015 opcode = next_opcode;
2016
2017 /* Skip versions that are not supported by the target
2018 processor. */
2019 if ((opcode->processors & processor_mask) == 0)
2020 goto error;
2021
2022 continue;
2023 }
2024
2025 as_bad ("%s: %s", copy_of_instruction, errmsg);
2026
2027 if (*input_line_pointer == ']')
2028 ++input_line_pointer;
2029
2030 ignore_rest_of_line ();
2031 input_line_pointer = saved_input_line_pointer;
2032 return;
2033 }
2034 break;
2035 }
2036
2037 while (ISSPACE (*str))
2038 ++str;
2039
2040 if (*str != '\0')
2041 /* xgettext:c-format */
2042 as_bad (_("junk at end of line: `%s'"), str);
2043
2044 input_line_pointer = str;
2045
2046 /* Tie dwarf2 debug info to the address at the start of the insn.
2047 We can't do this after the insn has been output as the current
2048 frag may have been closed off. eg. by frag_var. */
2049 dwarf2_emit_insn (0);
2050
2051 /* Write out the instruction. */
2052
2053 if (relaxable && fc > 0)
2054 {
2055 /* On a 64-bit host the size of an 'int' is not the same
2056 as the size of a pointer, so we need a union to convert
2057 the opindex field of the fr_cgen structure into a char *
2058 so that it can be stored in the frag. We do not have
2059 to worry about loosing accuracy as we are not going to
2060 be even close to the 32bit limit of the int. */
2061 union
2062 {
2063 int opindex;
2064 char * ptr;
2065 }
2066 opindex_converter;
2067
2068 opindex_converter.opindex = fixups[0].opindex;
2069 insn_size = 2;
2070 fc = 0;
2071
2072 if (!strcmp (opcode->name, "br"))
2073 {
2074 f = frag_var (rs_machine_dependent, 4, 2, 2,
2075 fixups[0].exp.X_add_symbol,
2076 fixups[0].exp.X_add_number,
2077 opindex_converter.ptr);
2078 md_number_to_chars (f, insn, insn_size);
2079 md_number_to_chars (f + 2, 0, 2);
2080 }
2081 else
2082 {
2083 f = frag_var (rs_machine_dependent, 6, 4, 0,
2084 fixups[0].exp.X_add_symbol,
2085 fixups[0].exp.X_add_number,
2086 opindex_converter.ptr);
2087 md_number_to_chars (f, insn, insn_size);
2088 md_number_to_chars (f + 2, 0, 4);
2089 }
2090 }
2091 else
2092 {
2093 /* Four byte insns have an opcode with the two high bits on. */
2094 if ((insn & 0x0600) == 0x0600)
2095 insn_size = 4;
2096 else
2097 insn_size = 2;
2098
2099 /* Special case: 32 bit MOV. */
2100 if ((insn & 0xffe0) == 0x0620)
2101 insn_size = 2;
2102
2103 f = frag_more (insn_size);
2104 md_number_to_chars (f, insn, insn_size);
2105
2106 if (extra_data_after_insn)
2107 {
2108 f = frag_more (extra_data_len);
2109 md_number_to_chars (f, extra_data, extra_data_len);
2110
2111 extra_data_after_insn = FALSE;
2112 }
2113 }
2114
2115 /* Create any fixups. At this point we do not use a
2116 bfd_reloc_code_real_type, but instead just use the
2117 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2118 handle fixups for any operand type, although that is admittedly
2119 not a very exciting feature. We pick a BFD reloc type in
2120 md_apply_fix. */
2121 for (i = 0; i < fc; i++)
2122 {
2123 const struct v850_operand *operand;
2124 bfd_reloc_code_real_type reloc;
2125
2126 operand = &v850_operands[fixups[i].opindex];
2127
2128 reloc = fixups[i].reloc;
2129
2130 if (reloc != BFD_RELOC_UNUSED)
2131 {
2132 reloc_howto_type *reloc_howto =
2133 bfd_reloc_type_lookup (stdoutput, reloc);
2134 int size;
2135 int address;
2136 fixS *fixP;
2137
2138 if (!reloc_howto)
2139 abort ();
2140
2141 size = bfd_get_reloc_size (reloc_howto);
2142
2143 /* XXX This will abort on an R_V850_8 reloc -
2144 is this reloc actually used? */
2145 if (size != 2 && size != 4)
2146 abort ();
2147
2148 address = (f - frag_now->fr_literal) + insn_size - size;
2149
2150 if (reloc == BFD_RELOC_32)
2151 address += 2;
2152
2153 fixP = fix_new_exp (frag_now, address, size,
2154 &fixups[i].exp,
2155 reloc_howto->pc_relative,
2156 reloc);
2157
2158 fixP->tc_fix_data = (void *) operand;
2159
2160 switch (reloc)
2161 {
2162 case BFD_RELOC_LO16:
2163 case BFD_RELOC_V850_LO16_SPLIT_OFFSET:
2164 case BFD_RELOC_HI16:
2165 case BFD_RELOC_HI16_S:
2166 fixP->fx_no_overflow = 1;
2167 break;
2168 default:
2169 break;
2170 }
2171 }
2172 else
2173 {
2174 fix_new_exp (frag_now,
2175 f - frag_now->fr_literal, 4,
2176 & fixups[i].exp,
2177 (operand->flags & V850_OPERAND_DISP) != 0,
2178 (bfd_reloc_code_real_type) (fixups[i].opindex
2179 + (int) BFD_RELOC_UNUSED));
2180 }
2181 }
2182
2183 input_line_pointer = saved_input_line_pointer;
2184 }
2185
2186 /* If while processing a fixup, a reloc really needs to be created
2187 then it is done here. */
2188
2189 arelent *
2190 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2191 {
2192 arelent *reloc;
2193
2194 reloc = xmalloc (sizeof (arelent));
2195 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2196 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2197 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2198
2199 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2200 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2201 || fixp->fx_r_type == BFD_RELOC_V850_LONGCALL
2202 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP
2203 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN)
2204 reloc->addend = fixp->fx_offset;
2205 else
2206 {
2207 if (fixp->fx_r_type == BFD_RELOC_32
2208 && fixp->fx_pcrel)
2209 fixp->fx_r_type = BFD_RELOC_32_PCREL;
2210
2211 reloc->addend = fixp->fx_addnumber;
2212 }
2213
2214 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2215
2216 if (reloc->howto == NULL)
2217 {
2218 as_bad_where (fixp->fx_file, fixp->fx_line,
2219 /* xgettext:c-format */
2220 _("reloc %d not supported by object file format"),
2221 (int) fixp->fx_r_type);
2222
2223 xfree (reloc);
2224
2225 return NULL;
2226 }
2227
2228 return reloc;
2229 }
2230
2231 void
2232 v850_handle_align (fragS * frag)
2233 {
2234 if (v850_relax
2235 && frag->fr_type == rs_align
2236 && frag->fr_address + frag->fr_fix > 0
2237 && frag->fr_offset > 1
2238 && now_seg != bss_section
2239 && now_seg != v850_seg_table[SBSS_SECTION].s
2240 && now_seg != v850_seg_table[TBSS_SECTION].s
2241 && now_seg != v850_seg_table[ZBSS_SECTION].s)
2242 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
2243 BFD_RELOC_V850_ALIGN);
2244 }
2245
2246 /* Return current size of variable part of frag. */
2247
2248 int
2249 md_estimate_size_before_relax (fragS *fragp, asection *seg ATTRIBUTE_UNUSED)
2250 {
2251 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2252 abort ();
2253
2254 return md_relax_table[fragp->fr_subtype].rlx_length;
2255 }
2256
2257 long
2258 v850_pcrel_from_section (fixS *fixp, segT section)
2259 {
2260 /* If the symbol is undefined, or in a section other than our own,
2261 or it is weak (in which case it may well be in another section,
2262 then let the linker figure it out. */
2263 if (fixp->fx_addsy != (symbolS *) NULL
2264 && (! S_IS_DEFINED (fixp->fx_addsy)
2265 || S_IS_WEAK (fixp->fx_addsy)
2266 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2267 return 0;
2268
2269 return fixp->fx_frag->fr_address + fixp->fx_where;
2270 }
2271
2272 void
2273 md_apply_fix (fixS *fixP, valueT *valueP, segT seg ATTRIBUTE_UNUSED)
2274 {
2275 valueT value = * valueP;
2276 char *where;
2277
2278 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2279 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2280 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP
2281 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2282 {
2283 fixP->fx_done = 0;
2284 return;
2285 }
2286
2287 if (fixP->fx_addsy == (symbolS *) NULL)
2288 fixP->fx_addnumber = value,
2289 fixP->fx_done = 1;
2290
2291 else if (fixP->fx_pcrel)
2292 fixP->fx_addnumber = fixP->fx_offset;
2293
2294 else
2295 {
2296 value = fixP->fx_offset;
2297 if (fixP->fx_subsy != (symbolS *) NULL)
2298 {
2299 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2300 value -= S_GET_VALUE (fixP->fx_subsy);
2301 else
2302 /* We don't actually support subtracting a symbol. */
2303 as_bad_where (fixP->fx_file, fixP->fx_line,
2304 _("expression too complex"));
2305 }
2306 fixP->fx_addnumber = value;
2307 }
2308
2309 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
2310 {
2311 int opindex;
2312 const struct v850_operand *operand;
2313 unsigned long insn;
2314
2315 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
2316 operand = &v850_operands[opindex];
2317
2318 /* Fetch the instruction, insert the fully resolved operand
2319 value, and stuff the instruction back again.
2320
2321 Note the instruction has been stored in little endian
2322 format! */
2323 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2324
2325 insn = bfd_getl32 ((unsigned char *) where);
2326 insn = v850_insert_operand (insn, operand, (offsetT) value,
2327 fixP->fx_file, fixP->fx_line, NULL);
2328 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2329
2330 if (fixP->fx_done)
2331 /* Nothing else to do here. */
2332 return;
2333
2334 /* Determine a BFD reloc value based on the operand information.
2335 We are only prepared to turn a few of the operands into relocs. */
2336
2337 if (operand->bits == 22)
2338 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
2339 else if (operand->bits == 9)
2340 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
2341 else
2342 {
2343 as_bad_where (fixP->fx_file, fixP->fx_line,
2344 _("unresolved expression that must be resolved"));
2345 fixP->fx_done = 1;
2346 return;
2347 }
2348 }
2349 else if (fixP->fx_done)
2350 {
2351 /* We still have to insert the value into memory! */
2352 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2353
2354 if (fixP->tc_fix_data != NULL
2355 && ((struct v850_operand *) fixP->tc_fix_data)->insert != NULL)
2356 {
2357 const char * message = NULL;
2358 struct v850_operand * operand = (struct v850_operand *) fixP->tc_fix_data;
2359 unsigned long insn;
2360
2361 /* The variable "where" currently points at the exact point inside
2362 the insn where we need to insert the value. But we need to
2363 extract the entire insn so we probably need to move "where"
2364 back a few bytes. */
2365 if (fixP->fx_size == 2)
2366 where -= 2;
2367 else if (fixP->fx_size == 1)
2368 where -= 3;
2369
2370 insn = bfd_getl32 ((unsigned char *) where);
2371
2372 /* Use the operand's insertion procedure, if present, in order to
2373 make sure that the value is correctly stored in the insn. */
2374 insn = operand->insert (insn, (offsetT) value, & message);
2375 /* Ignore message even if it is set. */
2376
2377 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2378 }
2379 else
2380 {
2381 if (fixP->fx_r_type == BFD_RELOC_V850_LO16_SPLIT_OFFSET)
2382 bfd_putl32 (((value << 16) & 0xfffe0000)
2383 | ((value << 5) & 0x20)
2384 | (bfd_getl32 (where) & ~0xfffe0020), where);
2385 else if (fixP->fx_size == 1)
2386 *where = value & 0xff;
2387 else if (fixP->fx_size == 2)
2388 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2389 else if (fixP->fx_size == 4)
2390 bfd_putl32 (value, (unsigned char *) where);
2391 }
2392 }
2393 }
2394 \f
2395 /* Parse a cons expression. We have to handle hi(), lo(), etc
2396 on the v850. */
2397
2398 void
2399 parse_cons_expression_v850 (expressionS *exp)
2400 {
2401 /* See if there's a reloc prefix like hi() we have to handle. */
2402 hold_cons_reloc = v850_reloc_prefix (NULL);
2403
2404 /* Do normal expression parsing. */
2405 expression (exp);
2406 }
2407
2408 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2409 found a reloc prefix, then we use that reloc, else we choose an
2410 appropriate one based on the size of the expression. */
2411
2412 void
2413 cons_fix_new_v850 (fragS *frag,
2414 int where,
2415 int size,
2416 expressionS *exp)
2417 {
2418 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2419 {
2420 if (size == 4)
2421 hold_cons_reloc = BFD_RELOC_32;
2422 if (size == 2)
2423 hold_cons_reloc = BFD_RELOC_16;
2424 if (size == 1)
2425 hold_cons_reloc = BFD_RELOC_8;
2426 }
2427
2428 if (exp != NULL)
2429 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2430 else
2431 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2432
2433 hold_cons_reloc = BFD_RELOC_UNUSED;
2434 }
2435
2436 bfd_boolean
2437 v850_fix_adjustable (fixS *fixP)
2438 {
2439 if (fixP->fx_addsy == NULL)
2440 return 1;
2441
2442 /* Don't adjust function names. */
2443 if (S_IS_FUNCTION (fixP->fx_addsy))
2444 return 0;
2445
2446 /* We need the symbol name for the VTABLE entries. */
2447 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2448 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2449 return 0;
2450
2451 return 1;
2452 }
2453
2454 int
2455 v850_force_relocation (struct fix *fixP)
2456 {
2457 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2458 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP)
2459 return 1;
2460
2461 if (v850_relax
2462 && (fixP->fx_pcrel
2463 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN
2464 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL
2465 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL
2466 || fixP->fx_r_type >= BFD_RELOC_UNUSED))
2467 return 1;
2468
2469 return generic_force_reloc (fixP);
2470 }
GDB Binutils - Deliverables
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