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[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include <stdio.h>
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "opcode/v850.h"
27 #include "dwarf2dbg.h"
28
29 /* Sign-extend a 16-bit number. */
30 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
31
32 /* Temporarily holds the reloc in a cons expression. */
33 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
34
35 /* Set to TRUE if we want to be pedantic about signed overflows. */
36 static boolean warn_signed_overflows = FALSE;
37 static boolean warn_unsigned_overflows = FALSE;
38
39 /* Indicates the target BFD machine number. */
40 static int machine = -1;
41
42 /* Indicates the target processor(s) for the assemble. */
43 static int processor_mask = -1;
44 \f
45 /* Structure to hold information about predefined registers. */
46 struct reg_name {
47 const char *name;
48 int value;
49 };
50
51 /* Generic assembler global variables which must be defined by all
52 targets. */
53
54 /* Characters which always start a comment. */
55 const char comment_chars[] = "#";
56
57 /* Characters which start a comment at the beginning of a line. */
58 const char line_comment_chars[] = ";#";
59
60 /* Characters which may be used to separate multiple commands on a
61 single line. */
62 const char line_separator_chars[] = ";";
63
64 /* Characters which are used to indicate an exponent in a floating
65 point number. */
66 const char EXP_CHARS[] = "eE";
67
68 /* Characters which mean that a number is a floating point constant,
69 as in 0d1.0. */
70 const char FLT_CHARS[] = "dD";
71 \f
72 const relax_typeS md_relax_table[] = {
73 /* Conditional branches. */
74 {0xff, -0x100, 2, 1},
75 {0x1fffff, -0x200000, 6, 0},
76 /* Unconditional branches. */
77 {0xff, -0x100, 2, 3},
78 {0x1fffff, -0x200000, 4, 0},
79 };
80
81 /* Fixups. */
82 #define MAX_INSN_FIXUPS (5)
83 struct v850_fixup {
84 expressionS exp;
85 int opindex;
86 bfd_reloc_code_real_type reloc;
87 };
88
89 struct v850_fixup fixups[MAX_INSN_FIXUPS];
90 static int fc;
91
92 struct v850_seg_entry
93 {
94 segT s;
95 const char *name;
96 flagword flags;
97 };
98
99 struct v850_seg_entry v850_seg_table[] =
100 {
101 { NULL, ".sdata",
102 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
103 | SEC_SMALL_DATA },
104 { NULL, ".tdata",
105 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
106 { NULL, ".zdata",
107 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
108 { NULL, ".sbss",
109 SEC_ALLOC | SEC_SMALL_DATA },
110 { NULL, ".tbss",
111 SEC_ALLOC },
112 { NULL, ".zbss",
113 SEC_ALLOC},
114 { NULL, ".rosdata",
115 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
116 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
117 { NULL, ".rozdata",
118 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
119 | SEC_HAS_CONTENTS },
120 { NULL, ".scommon",
121 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
122 | SEC_SMALL_DATA | SEC_IS_COMMON },
123 { NULL, ".tcommon",
124 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
125 | SEC_IS_COMMON },
126 { NULL, ".zcommon",
127 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
128 | SEC_IS_COMMON },
129 { NULL, ".call_table_data",
130 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
131 { NULL, ".call_table_text",
132 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
133 | SEC_HAS_CONTENTS},
134 { NULL, ".bss",
135 SEC_ALLOC }
136 };
137
138 #define SDATA_SECTION 0
139 #define TDATA_SECTION 1
140 #define ZDATA_SECTION 2
141 #define SBSS_SECTION 3
142 #define TBSS_SECTION 4
143 #define ZBSS_SECTION 5
144 #define ROSDATA_SECTION 6
145 #define ROZDATA_SECTION 7
146 #define SCOMMON_SECTION 8
147 #define TCOMMON_SECTION 9
148 #define ZCOMMON_SECTION 10
149 #define CALL_TABLE_DATA_SECTION 11
150 #define CALL_TABLE_TEXT_SECTION 12
151 #define BSS_SECTION 13
152
153 static void do_v850_seg PARAMS ((int, subsegT));
154
155 static void
156 do_v850_seg (i, sub)
157 int i;
158 subsegT sub;
159 {
160 struct v850_seg_entry *seg = v850_seg_table + i;
161
162 obj_elf_section_change_hook ();
163 if (seg->s != NULL)
164 {
165 subseg_set (seg->s, sub);
166 }
167 else
168 {
169 seg->s = subseg_new (seg->name, sub);
170 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
171 if ((seg->flags & SEC_LOAD) == 0)
172 seg_info (seg->s)->bss = 1;
173 }
174 }
175
176 static void v850_seg PARAMS ((int i));
177
178 static void
179 v850_seg (i)
180 int i;
181 {
182 subsegT sub = get_absolute_expression ();
183
184 do_v850_seg (i, sub);
185 demand_empty_rest_of_line ();
186 }
187
188 static void v850_offset PARAMS ((int));
189
190 static void
191 v850_offset (ignore)
192 int ignore ATTRIBUTE_UNUSED;
193 {
194 int temp = get_absolute_expression ();
195
196 temp -= frag_now_fix ();
197
198 if (temp > 0)
199 (void) frag_more (temp);
200
201 demand_empty_rest_of_line ();
202 }
203
204 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
205
206 static void v850_comm PARAMS ((int));
207
208 static void
209 v850_comm (area)
210 int area;
211 {
212 char *name;
213 char c;
214 char *p;
215 int temp;
216 unsigned int size;
217 symbolS *symbolP;
218 int have_align;
219
220 name = input_line_pointer;
221 c = get_symbol_end ();
222
223 /* Just after name is now '\0'. */
224 p = input_line_pointer;
225 *p = c;
226
227 SKIP_WHITESPACE ();
228
229 if (*input_line_pointer != ',')
230 {
231 as_bad (_("Expected comma after symbol-name"));
232 ignore_rest_of_line ();
233 return;
234 }
235
236 /* Skip ','. */
237 input_line_pointer++;
238
239 if ((temp = get_absolute_expression ()) < 0)
240 {
241 /* xgettext:c-format */
242 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
243 ignore_rest_of_line ();
244 return;
245 }
246
247 size = temp;
248 *p = 0;
249 symbolP = symbol_find_or_make (name);
250 *p = c;
251
252 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
253 {
254 as_bad (_("Ignoring attempt to re-define symbol"));
255 ignore_rest_of_line ();
256 return;
257 }
258
259 if (S_GET_VALUE (symbolP) != 0)
260 {
261 if (S_GET_VALUE (symbolP) != size)
262 {
263 /* xgettext:c-format */
264 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
265 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
266 }
267 }
268
269 know (symbol_get_frag (symbolP) == &zero_address_frag);
270
271 if (*input_line_pointer != ',')
272 have_align = 0;
273 else
274 {
275 have_align = 1;
276 input_line_pointer++;
277 SKIP_WHITESPACE ();
278 }
279
280 if (! have_align || *input_line_pointer != '"')
281 {
282 if (! have_align)
283 temp = 0;
284 else
285 {
286 temp = get_absolute_expression ();
287
288 if (temp < 0)
289 {
290 temp = 0;
291 as_warn (_("Common alignment negative; 0 assumed"));
292 }
293 }
294
295 if (symbol_get_obj (symbolP)->local)
296 {
297 segT old_sec;
298 int old_subsec;
299 char *pfrag;
300 int align;
301 flagword applicable;
302
303 old_sec = now_seg;
304 old_subsec = now_subseg;
305
306 applicable = bfd_applicable_section_flags (stdoutput);
307
308 applicable &= SEC_ALLOC;
309
310 switch (area)
311 {
312 case SCOMMON_SECTION:
313 do_v850_seg (SBSS_SECTION, 0);
314 break;
315
316 case ZCOMMON_SECTION:
317 do_v850_seg (ZBSS_SECTION, 0);
318 break;
319
320 case TCOMMON_SECTION:
321 do_v850_seg (TBSS_SECTION, 0);
322 break;
323 }
324
325 if (temp)
326 {
327 /* Convert to a power of 2 alignment. */
328 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
329 ;
330
331 if (temp != 1)
332 {
333 as_bad (_("Common alignment not a power of 2"));
334 ignore_rest_of_line ();
335 return;
336 }
337 }
338 else
339 align = 0;
340
341 record_alignment (now_seg, align);
342
343 if (align)
344 frag_align (align, 0, 0);
345
346 switch (area)
347 {
348 case SCOMMON_SECTION:
349 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
350 symbol_get_frag (symbolP)->fr_symbol = 0;
351 break;
352
353 case ZCOMMON_SECTION:
354 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
355 symbol_get_frag (symbolP)->fr_symbol = 0;
356 break;
357
358 case TCOMMON_SECTION:
359 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
360 symbol_get_frag (symbolP)->fr_symbol = 0;
361 break;
362
363 default:
364 abort ();
365 }
366
367 symbol_set_frag (symbolP, frag_now);
368 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
369 (offsetT) size, (char *) 0);
370 *pfrag = 0;
371 S_SET_SIZE (symbolP, size);
372
373 switch (area)
374 {
375 case SCOMMON_SECTION:
376 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
377 break;
378
379 case ZCOMMON_SECTION:
380 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
381 break;
382
383 case TCOMMON_SECTION:
384 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
385 break;
386
387 default:
388 abort ();
389 }
390
391 S_CLEAR_EXTERNAL (symbolP);
392 obj_elf_section_change_hook ();
393 subseg_set (old_sec, old_subsec);
394 }
395 else
396 {
397 allocate_common:
398 S_SET_VALUE (symbolP, (valueT) size);
399 S_SET_ALIGN (symbolP, temp);
400 S_SET_EXTERNAL (symbolP);
401
402 switch (area)
403 {
404 case SCOMMON_SECTION:
405 case ZCOMMON_SECTION:
406 case TCOMMON_SECTION:
407 do_v850_seg (area, 0);
408 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
409 break;
410
411 default:
412 abort ();
413 }
414 }
415 }
416 else
417 {
418 input_line_pointer++;
419
420 /* @@ Some use the dot, some don't. Can we get some consistency?? */
421 if (*input_line_pointer == '.')
422 input_line_pointer++;
423
424 /* @@ Some say data, some say bss. */
425 if (strncmp (input_line_pointer, "bss\"", 4)
426 && strncmp (input_line_pointer, "data\"", 5))
427 {
428 while (*--input_line_pointer != '"')
429 ;
430 input_line_pointer--;
431 goto bad_common_segment;
432 }
433 while (*input_line_pointer++ != '"')
434 ;
435 goto allocate_common;
436 }
437
438 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
439
440 demand_empty_rest_of_line ();
441 return;
442
443 {
444 bad_common_segment:
445 p = input_line_pointer;
446 while (*p && *p != '\n')
447 p++;
448 c = *p;
449 *p = '\0';
450 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
451 *p = c;
452 input_line_pointer = p;
453 ignore_rest_of_line ();
454 return;
455 }
456 }
457
458 static void set_machine PARAMS ((int));
459
460 static void
461 set_machine (number)
462 int number;
463 {
464 machine = number;
465 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
466
467 switch (machine)
468 {
469 case 0: processor_mask = PROCESSOR_V850; break;
470 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
471 case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
472 }
473 }
474
475 /* The target specific pseudo-ops which we support. */
476 const pseudo_typeS md_pseudo_table[] = {
477 { "sdata", v850_seg, SDATA_SECTION },
478 { "tdata", v850_seg, TDATA_SECTION },
479 { "zdata", v850_seg, ZDATA_SECTION },
480 { "sbss", v850_seg, SBSS_SECTION },
481 { "tbss", v850_seg, TBSS_SECTION },
482 { "zbss", v850_seg, ZBSS_SECTION },
483 { "rosdata", v850_seg, ROSDATA_SECTION },
484 { "rozdata", v850_seg, ROZDATA_SECTION },
485 { "bss", v850_seg, BSS_SECTION },
486 { "offset", v850_offset, 0 },
487 { "word", cons, 4 },
488 { "zcomm", v850_comm, ZCOMMON_SECTION },
489 { "scomm", v850_comm, SCOMMON_SECTION },
490 { "tcomm", v850_comm, TCOMMON_SECTION },
491 { "v850", set_machine, 0 },
492 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
493 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
494 { "v850e", set_machine, bfd_mach_v850e },
495 { "v850ea", set_machine, bfd_mach_v850ea },
496 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
497 { "loc", dwarf2_directive_loc, 0 },
498 { NULL, NULL, 0 }
499 };
500
501 /* Opcode hash table. */
502 static struct hash_control *v850_hash;
503
504 /* This table is sorted. Suitable for searching by a binary search. */
505 static const struct reg_name pre_defined_registers[] = {
506 { "ep", 30 }, /* ep - element ptr */
507 { "gp", 4 }, /* gp - global ptr */
508 { "hp", 2 }, /* hp - handler stack ptr */
509 { "lp", 31 }, /* lp - link ptr */
510 { "r0", 0 },
511 { "r1", 1 },
512 { "r10", 10 },
513 { "r11", 11 },
514 { "r12", 12 },
515 { "r13", 13 },
516 { "r14", 14 },
517 { "r15", 15 },
518 { "r16", 16 },
519 { "r17", 17 },
520 { "r18", 18 },
521 { "r19", 19 },
522 { "r2", 2 },
523 { "r20", 20 },
524 { "r21", 21 },
525 { "r22", 22 },
526 { "r23", 23 },
527 { "r24", 24 },
528 { "r25", 25 },
529 { "r26", 26 },
530 { "r27", 27 },
531 { "r28", 28 },
532 { "r29", 29 },
533 { "r3", 3 },
534 { "r30", 30 },
535 { "r31", 31 },
536 { "r4", 4 },
537 { "r5", 5 },
538 { "r6", 6 },
539 { "r7", 7 },
540 { "r8", 8 },
541 { "r9", 9 },
542 { "sp", 3 }, /* sp - stack ptr */
543 { "tp", 5 }, /* tp - text ptr */
544 { "zero", 0 },
545 };
546
547 #define REG_NAME_CNT \
548 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
549
550 static const struct reg_name system_registers[] = {
551 { "ctbp", 20 },
552 { "ctpc", 16 },
553 { "ctpsw", 17 },
554 { "dbpc", 18 },
555 { "dbpsw", 19 },
556 { "ecr", 4 },
557 { "eipc", 0 },
558 { "eipsw", 1 },
559 { "fepc", 2 },
560 { "fepsw", 3 },
561 { "psw", 5 },
562 };
563
564 #define SYSREG_NAME_CNT \
565 (sizeof (system_registers) / sizeof (struct reg_name))
566
567 static const struct reg_name system_list_registers[] = {
568 {"PS", 5 },
569 {"SR", 0 + 1}
570 };
571
572 #define SYSREGLIST_NAME_CNT \
573 (sizeof (system_list_registers) / sizeof (struct reg_name))
574
575 static const struct reg_name cc_names[] = {
576 { "c", 0x1 },
577 { "e", 0x2 },
578 { "ge", 0xe },
579 { "gt", 0xf },
580 { "h", 0xb },
581 { "l", 0x1 },
582 { "le", 0x7 },
583 { "lt", 0x6 },
584 { "n", 0x4 },
585 { "nc", 0x9 },
586 { "ne", 0xa },
587 { "nh", 0x3 },
588 { "nl", 0x9 },
589 { "ns", 0xc },
590 { "nv", 0x8 },
591 { "nz", 0xa },
592 { "p", 0xc },
593 { "s", 0x4 },
594 { "sa", 0xd },
595 { "t", 0x5 },
596 { "v", 0x0 },
597 { "z", 0x2 },
598 };
599
600 #define CC_NAME_CNT \
601 (sizeof (cc_names) / sizeof (struct reg_name))
602
603 /* Do a binary search of the given register table to see if NAME is a
604 valid regiter name. Return the register number from the array on
605 success, or -1 on failure. */
606
607 static int reg_name_search
608 PARAMS ((const struct reg_name *, int, const char *, boolean));
609
610 static int
611 reg_name_search (regs, regcount, name, accept_numbers)
612 const struct reg_name *regs;
613 int regcount;
614 const char *name;
615 boolean accept_numbers;
616 {
617 int middle, low, high;
618 int cmp;
619 symbolS *symbolP;
620
621 /* If the register name is a symbol, then evaluate it. */
622 if ((symbolP = symbol_find (name)) != NULL)
623 {
624 /* If the symbol is an alias for another name then use that.
625 If the symbol is an alias for a number, then return the number. */
626 if (symbol_equated_p (symbolP))
627 {
628 name
629 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
630 }
631 else if (accept_numbers)
632 {
633 int reg = S_GET_VALUE (symbolP);
634
635 if (reg >= 0 && reg <= 31)
636 return reg;
637 }
638
639 /* Otherwise drop through and try parsing name normally. */
640 }
641
642 low = 0;
643 high = regcount - 1;
644
645 do
646 {
647 middle = (low + high) / 2;
648 cmp = strcasecmp (name, regs[middle].name);
649 if (cmp < 0)
650 high = middle - 1;
651 else if (cmp > 0)
652 low = middle + 1;
653 else
654 return regs[middle].value;
655 }
656 while (low <= high);
657 return -1;
658 }
659
660 /* Summary of register_name().
661 *
662 * in: Input_line_pointer points to 1st char of operand.
663 *
664 * out: An expressionS.
665 * The operand may have been a register: in this case, X_op == O_register,
666 * X_add_number is set to the register number, and truth is returned.
667 * Input_line_pointer->(next non-blank) char after operand, or is in
668 * its original state. */
669
670 static boolean register_name PARAMS ((expressionS *));
671
672 static boolean
673 register_name (expressionP)
674 expressionS *expressionP;
675 {
676 int reg_number;
677 char *name;
678 char *start;
679 char c;
680
681 /* Find the spelling of the operand. */
682 start = name = input_line_pointer;
683
684 c = get_symbol_end ();
685
686 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
687 name, FALSE);
688
689 /* Put back the delimiting char. */
690 *input_line_pointer = c;
691
692 /* Look to see if it's in the register table. */
693 if (reg_number >= 0)
694 {
695 expressionP->X_op = O_register;
696 expressionP->X_add_number = reg_number;
697
698 /* Make the rest nice. */
699 expressionP->X_add_symbol = NULL;
700 expressionP->X_op_symbol = NULL;
701
702 return true;
703 }
704 else
705 {
706 /* Reset the line as if we had not done anything. */
707 input_line_pointer = start;
708
709 return false;
710 }
711 }
712
713 /* Summary of system_register_name().
714 *
715 * in: INPUT_LINE_POINTER points to 1st char of operand.
716 * EXPRESSIONP points to an expression structure to be filled in.
717 * ACCEPT_NUMBERS is true iff numerical register names may be used.
718 * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
719 * accepted.
720 *
721 * out: An expressionS structure in expressionP.
722 * The operand may have been a register: in this case, X_op == O_register,
723 * X_add_number is set to the register number, and truth is returned.
724 * Input_line_pointer->(next non-blank) char after operand, or is in
725 * its original state. */
726
727 static boolean system_register_name PARAMS ((expressionS *, boolean, boolean));
728
729 static boolean
730 system_register_name (expressionP, accept_numbers, accept_list_names)
731 expressionS *expressionP;
732 boolean accept_numbers;
733 boolean accept_list_names;
734 {
735 int reg_number;
736 char *name;
737 char *start;
738 char c;
739
740 /* Find the spelling of the operand. */
741 start = name = input_line_pointer;
742
743 c = get_symbol_end ();
744 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
745 accept_numbers);
746
747 /* Put back the delimiting char. */
748 *input_line_pointer = c;
749
750 if (reg_number < 0
751 && accept_numbers)
752 {
753 /* Reset input_line pointer. */
754 input_line_pointer = start;
755
756 if (ISDIGIT (*input_line_pointer))
757 {
758 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
759
760 /* Make sure that the register number is allowable. */
761 if (reg_number < 0
762 || (reg_number > 5 && reg_number < 16)
763 || reg_number > 20)
764 {
765 reg_number = -1;
766 }
767 }
768 else if (accept_list_names)
769 {
770 c = get_symbol_end ();
771 reg_number = reg_name_search (system_list_registers,
772 SYSREGLIST_NAME_CNT, name, FALSE);
773
774 /* Put back the delimiting char. */
775 *input_line_pointer = c;
776 }
777 }
778
779 /* Look to see if it's in the register table. */
780 if (reg_number >= 0)
781 {
782 expressionP->X_op = O_register;
783 expressionP->X_add_number = reg_number;
784
785 /* Make the rest nice. */
786 expressionP->X_add_symbol = NULL;
787 expressionP->X_op_symbol = NULL;
788
789 return true;
790 }
791 else
792 {
793 /* Reset the line as if we had not done anything. */
794 input_line_pointer = start;
795
796 return false;
797 }
798 }
799
800 /* Summary of cc_name().
801 *
802 * in: INPUT_LINE_POINTER points to 1st char of operand.
803 *
804 * out: An expressionS.
805 * The operand may have been a register: in this case, X_op == O_register,
806 * X_add_number is set to the register number, and truth is returned.
807 * Input_line_pointer->(next non-blank) char after operand, or is in
808 * its original state. */
809
810 static boolean cc_name PARAMS ((expressionS *));
811
812 static boolean
813 cc_name (expressionP)
814 expressionS *expressionP;
815 {
816 int reg_number;
817 char *name;
818 char *start;
819 char c;
820
821 /* Find the spelling of the operand. */
822 start = name = input_line_pointer;
823
824 c = get_symbol_end ();
825 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
826
827 /* Put back the delimiting char. */
828 *input_line_pointer = c;
829
830 /* Look to see if it's in the register table. */
831 if (reg_number >= 0)
832 {
833 expressionP->X_op = O_constant;
834 expressionP->X_add_number = reg_number;
835
836 /* Make the rest nice. */
837 expressionP->X_add_symbol = NULL;
838 expressionP->X_op_symbol = NULL;
839
840 return true;
841 }
842 else
843 {
844 /* Reset the line as if we had not done anything. */
845 input_line_pointer = start;
846
847 return false;
848 }
849 }
850
851 static void skip_white_space PARAMS ((void));
852
853 static void
854 skip_white_space ()
855 {
856 while (*input_line_pointer == ' '
857 || *input_line_pointer == '\t')
858 ++input_line_pointer;
859 }
860
861 /* Summary of parse_register_list ().
862 *
863 * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
864 * INSN is the partially constructed instruction.
865 * OPERAND is the operand being inserted.
866 *
867 * out: NULL if the parse completed successfully, otherwise a
868 * pointer to an error message is returned. If the parse
869 * completes the correct bit fields in the instruction
870 * will be filled in.
871 *
872 * Parses register lists with the syntax:
873 *
874 * { rX }
875 * { rX, rY }
876 * { rX - rY }
877 * { rX - rY, rZ }
878 * etc
879 *
880 * and also parses constant epxressions whoes bits indicate the
881 * registers in the lists. The LSB in the expression refers to
882 * the lowest numbered permissable register in the register list,
883 * and so on upwards. System registers are considered to be very
884 * high numbers. */
885
886 static char *parse_register_list
887 PARAMS ((unsigned long *, const struct v850_operand *));
888
889 static char *
890 parse_register_list (insn, operand)
891 unsigned long *insn;
892 const struct v850_operand *operand;
893 {
894 static int type1_regs[32] = {
895 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
896 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
897 };
898 static int type2_regs[32] = {
899 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
900 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
901 };
902 static int type3_regs[32] = {
903 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
904 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
905 };
906 int *regs;
907 expressionS exp;
908
909 /* Select a register array to parse. */
910 switch (operand->shift)
911 {
912 case 0xffe00001: regs = type1_regs; break;
913 case 0xfff8000f: regs = type2_regs; break;
914 case 0xfff8001f: regs = type3_regs; break;
915 default:
916 as_bad (_("unknown operand shift: %x\n"), operand->shift);
917 return _("internal failure in parse_register_list");
918 }
919
920 skip_white_space ();
921
922 /* If the expression starts with a curly brace it is a register list.
923 Otherwise it is a constant expression, whoes bits indicate which
924 registers are to be included in the list. */
925
926 if (*input_line_pointer != '{')
927 {
928 int reg;
929 int i;
930
931 expression (&exp);
932
933 if (exp.X_op != O_constant)
934 return _("constant expression or register list expected");
935
936 if (regs == type1_regs)
937 {
938 if (exp.X_add_number & 0xFFFFF000)
939 return _("high bits set in register list expression");
940
941 for (reg = 20; reg < 32; reg++)
942 if (exp.X_add_number & (1 << (reg - 20)))
943 {
944 for (i = 0; i < 32; i++)
945 if (regs[i] == reg)
946 *insn |= (1 << i);
947 }
948 }
949 else if (regs == type2_regs)
950 {
951 if (exp.X_add_number & 0xFFFE0000)
952 return _("high bits set in register list expression");
953
954 for (reg = 1; reg < 16; reg++)
955 if (exp.X_add_number & (1 << (reg - 1)))
956 {
957 for (i = 0; i < 32; i++)
958 if (regs[i] == reg)
959 *insn |= (1 << i);
960 }
961
962 if (exp.X_add_number & (1 << 15))
963 *insn |= (1 << 3);
964
965 if (exp.X_add_number & (1 << 16))
966 *insn |= (1 << 19);
967 }
968 else /* regs == type3_regs */
969 {
970 if (exp.X_add_number & 0xFFFE0000)
971 return _("high bits set in register list expression");
972
973 for (reg = 16; reg < 32; reg++)
974 if (exp.X_add_number & (1 << (reg - 16)))
975 {
976 for (i = 0; i < 32; i++)
977 if (regs[i] == reg)
978 *insn |= (1 << i);
979 }
980
981 if (exp.X_add_number & (1 << 16))
982 *insn |= (1 << 19);
983 }
984
985 return NULL;
986 }
987
988 input_line_pointer++;
989
990 /* Parse the register list until a terminator (closing curly brace or
991 new-line) is found. */
992 for (;;)
993 {
994 if (register_name (&exp))
995 {
996 int i;
997
998 /* Locate the given register in the list, and if it is there,
999 insert the corresponding bit into the instruction. */
1000 for (i = 0; i < 32; i++)
1001 {
1002 if (regs[i] == exp.X_add_number)
1003 {
1004 *insn |= (1 << i);
1005 break;
1006 }
1007 }
1008
1009 if (i == 32)
1010 {
1011 return _("illegal register included in list");
1012 }
1013 }
1014 else if (system_register_name (&exp, true, true))
1015 {
1016 if (regs == type1_regs)
1017 {
1018 return _("system registers cannot be included in list");
1019 }
1020 else if (exp.X_add_number == 5)
1021 {
1022 if (regs == type2_regs)
1023 return _("PSW cannot be included in list");
1024 else
1025 *insn |= 0x8;
1026 }
1027 else if (exp.X_add_number < 4)
1028 *insn |= 0x80000;
1029 else
1030 return _("High value system registers cannot be included in list");
1031 }
1032 else if (*input_line_pointer == '}')
1033 {
1034 input_line_pointer++;
1035 break;
1036 }
1037 else if (*input_line_pointer == ',')
1038 {
1039 input_line_pointer++;
1040 continue;
1041 }
1042 else if (*input_line_pointer == '-')
1043 {
1044 /* We have encountered a range of registers: rX - rY. */
1045 int j;
1046 expressionS exp2;
1047
1048 /* Skip the dash. */
1049 ++input_line_pointer;
1050
1051 /* Get the second register in the range. */
1052 if (! register_name (&exp2))
1053 {
1054 return _("second register should follow dash in register list");
1055 exp2.X_add_number = exp.X_add_number;
1056 }
1057
1058 /* Add the rest of the registers in the range. */
1059 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1060 {
1061 int i;
1062
1063 /* Locate the given register in the list, and if it is there,
1064 insert the corresponding bit into the instruction. */
1065 for (i = 0; i < 32; i++)
1066 {
1067 if (regs[i] == j)
1068 {
1069 *insn |= (1 << i);
1070 break;
1071 }
1072 }
1073
1074 if (i == 32)
1075 return _("illegal register included in list");
1076 }
1077 }
1078 else
1079 {
1080 break;
1081 }
1082
1083 skip_white_space ();
1084 }
1085
1086 return NULL;
1087 }
1088
1089 const char *md_shortopts = "m:";
1090
1091 struct option md_longopts[] = {
1092 {NULL, no_argument, NULL, 0}
1093 };
1094
1095 size_t md_longopts_size = sizeof (md_longopts);
1096
1097 void
1098 md_show_usage (stream)
1099 FILE *stream;
1100 {
1101 fprintf (stream, _(" V850 options:\n"));
1102 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1103 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1104 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1105 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1106 fprintf (stream, _(" -mv850ea The code is targeted at the v850ea\n"));
1107 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1108 }
1109
1110 int
1111 md_parse_option (c, arg)
1112 int c;
1113 char *arg;
1114 {
1115 if (c != 'm')
1116 {
1117 if (c != 'a')
1118 /* xgettext:c-format */
1119 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1120 return 0;
1121 }
1122
1123 if (strcmp (arg, "warn-signed-overflow") == 0)
1124 {
1125 warn_signed_overflows = TRUE;
1126 }
1127 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1128 {
1129 warn_unsigned_overflows = TRUE;
1130 }
1131 else if (strcmp (arg, "v850") == 0)
1132 {
1133 machine = 0;
1134 processor_mask = PROCESSOR_V850;
1135 }
1136 else if (strcmp (arg, "v850e") == 0)
1137 {
1138 machine = bfd_mach_v850e;
1139 processor_mask = PROCESSOR_V850E;
1140 }
1141 else if (strcmp (arg, "v850ea") == 0)
1142 {
1143 machine = bfd_mach_v850ea;
1144 processor_mask = PROCESSOR_V850EA;
1145 }
1146 else if (strcmp (arg, "v850any") == 0)
1147 {
1148 /* Tell the world that this is for any v850 chip. */
1149 machine = 0;
1150
1151 /* But support instructions for the extended versions. */
1152 processor_mask = PROCESSOR_V850EA;
1153 }
1154 else
1155 {
1156 /* xgettext:c-format */
1157 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1158 return 0;
1159 }
1160
1161 return 1;
1162 }
1163
1164 symbolS *
1165 md_undefined_symbol (name)
1166 char *name ATTRIBUTE_UNUSED;
1167 {
1168 return 0;
1169 }
1170
1171 char *
1172 md_atof (type, litp, sizep)
1173 int type;
1174 char *litp;
1175 int *sizep;
1176 {
1177 int prec;
1178 LITTLENUM_TYPE words[4];
1179 char *t;
1180 int i;
1181
1182 switch (type)
1183 {
1184 case 'f':
1185 prec = 2;
1186 break;
1187
1188 case 'd':
1189 prec = 4;
1190 break;
1191
1192 default:
1193 *sizep = 0;
1194 return _("bad call to md_atof");
1195 }
1196
1197 t = atof_ieee (input_line_pointer, type, words);
1198 if (t)
1199 input_line_pointer = t;
1200
1201 *sizep = prec * 2;
1202
1203 for (i = prec - 1; i >= 0; i--)
1204 {
1205 md_number_to_chars (litp, (valueT) words[i], 2);
1206 litp += 2;
1207 }
1208
1209 return NULL;
1210 }
1211
1212 /* Very gross. */
1213
1214 void
1215 md_convert_frag (abfd, sec, fragP)
1216 bfd *abfd ATTRIBUTE_UNUSED;
1217 asection *sec;
1218 fragS *fragP;
1219 {
1220 subseg_change (sec, 0);
1221
1222 /* In range conditional or unconditional branch. */
1223 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1224 {
1225 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1226 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1227 fragP->fr_fix += 2;
1228 }
1229 /* Out of range conditional branch. Emit a branch around a jump. */
1230 else if (fragP->fr_subtype == 1)
1231 {
1232 unsigned char *buffer =
1233 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1234
1235 /* Reverse the condition of the first branch. */
1236 buffer[0] ^= 0x08;
1237 /* Mask off all the displacement bits. */
1238 buffer[0] &= 0x8f;
1239 buffer[1] &= 0x07;
1240 /* Now set the displacement bits so that we branch
1241 around the unconditional branch. */
1242 buffer[0] |= 0x30;
1243
1244 /* Now create the unconditional branch + fixup to the final
1245 target. */
1246 md_number_to_chars (buffer + 2, 0x00000780, 4);
1247 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1248 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1249 (int) fragP->fr_opcode + 1);
1250 fragP->fr_fix += 6;
1251 }
1252 /* Out of range unconditional branch. Emit a jump. */
1253 else if (fragP->fr_subtype == 3)
1254 {
1255 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1256 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1257 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1258 (int) fragP->fr_opcode + 1);
1259 fragP->fr_fix += 4;
1260 }
1261 else
1262 abort ();
1263 }
1264
1265 valueT
1266 md_section_align (seg, addr)
1267 asection *seg;
1268 valueT addr;
1269 {
1270 int align = bfd_get_section_alignment (stdoutput, seg);
1271 return ((addr + (1 << align) - 1) & (-1 << align));
1272 }
1273
1274 void
1275 md_begin ()
1276 {
1277 char *prev_name = "";
1278 register const struct v850_opcode *op;
1279
1280 if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
1281 {
1282 if (machine == -1)
1283 machine = bfd_mach_v850ea;
1284
1285 if (processor_mask == -1)
1286 processor_mask = PROCESSOR_V850EA;
1287 }
1288 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1289 {
1290 if (machine == -1)
1291 machine = bfd_mach_v850e;
1292
1293 if (processor_mask == -1)
1294 processor_mask = PROCESSOR_V850E;
1295 }
1296 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1297 {
1298 if (machine == -1)
1299 machine = 0;
1300
1301 if (processor_mask == -1)
1302 processor_mask = PROCESSOR_V850;
1303 }
1304 else
1305 /* xgettext:c-format */
1306 as_bad (_("Unable to determine default target processor from string: %s"),
1307 TARGET_CPU);
1308
1309 v850_hash = hash_new ();
1310
1311 /* Insert unique names into hash table. The V850 instruction set
1312 has many identical opcode names that have different opcodes based
1313 on the operands. This hash table then provides a quick index to
1314 the first opcode with a particular name in the opcode table. */
1315
1316 op = v850_opcodes;
1317 while (op->name)
1318 {
1319 if (strcmp (prev_name, op->name))
1320 {
1321 prev_name = (char *) op->name;
1322 hash_insert (v850_hash, op->name, (char *) op);
1323 }
1324 op++;
1325 }
1326
1327 v850_seg_table[BSS_SECTION].s = bss_section;
1328 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1329 }
1330
1331 static bfd_reloc_code_real_type handle_ctoff
1332 PARAMS ((const struct v850_operand *));
1333
1334 static bfd_reloc_code_real_type
1335 handle_ctoff (operand)
1336 const struct v850_operand *operand;
1337 {
1338 if (operand == NULL)
1339 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1340
1341 if (operand->bits != 6
1342 || operand->shift != 0)
1343 {
1344 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1345 return BFD_RELOC_64; /* Used to indicate an error condition. */
1346 }
1347
1348 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1349 }
1350
1351 static bfd_reloc_code_real_type handle_sdaoff
1352 PARAMS ((const struct v850_operand *));
1353
1354 static bfd_reloc_code_real_type
1355 handle_sdaoff (operand)
1356 const struct v850_operand *operand;
1357 {
1358 if (operand == NULL)
1359 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1360
1361 if (operand->bits == 15 && operand->shift == 17)
1362 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1363
1364 if (operand->bits == -1)
1365 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1366
1367 if (operand->bits != 16
1368 || operand->shift != 16)
1369 {
1370 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1371 return BFD_RELOC_64; /* Used to indicate an error condition. */
1372 }
1373
1374 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1375 }
1376
1377 static bfd_reloc_code_real_type handle_zdaoff
1378 PARAMS ((const struct v850_operand *));
1379
1380 static bfd_reloc_code_real_type
1381 handle_zdaoff (operand)
1382 const struct v850_operand *operand;
1383 {
1384 if (operand == NULL)
1385 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1386
1387 if (operand->bits == 15 && operand->shift == 17)
1388 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1389
1390 if (operand->bits == -1)
1391 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1392
1393 if (operand->bits != 16
1394 || operand->shift != 16)
1395 {
1396 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1397 /* Used to indicate an error condition. */
1398 return BFD_RELOC_64;
1399 }
1400
1401 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1402 }
1403
1404 static bfd_reloc_code_real_type handle_tdaoff
1405 PARAMS ((const struct v850_operand *));
1406
1407 static bfd_reloc_code_real_type
1408 handle_tdaoff (operand)
1409 const struct v850_operand *operand;
1410 {
1411 if (operand == NULL)
1412 /* Data item, not an instruction. */
1413 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1414
1415 if (operand->bits == 6 && operand->shift == 1)
1416 /* sld.w/sst.w, operand: D8_6 */
1417 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1418
1419 if (operand->bits == 4 && operand->insert != NULL)
1420 /* sld.hu, operand: D5-4 */
1421 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1422
1423 if (operand->bits == 4 && operand->insert == NULL)
1424 /* sld.bu, operand: D4 */
1425 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1426
1427 if (operand->bits == 16 && operand->shift == 16)
1428 /* set1 & chums, operands: D16 */
1429 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1430
1431 if (operand->bits != 7)
1432 {
1433 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1434 /* Used to indicate an error condition. */
1435 return BFD_RELOC_64;
1436 }
1437
1438 return operand->insert != NULL
1439 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1440 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1441 }
1442
1443 /* Warning: The code in this function relies upon the definitions
1444 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1445 matching the hard coded values contained herein. */
1446
1447 static bfd_reloc_code_real_type v850_reloc_prefix
1448 PARAMS ((const struct v850_operand *));
1449
1450 static bfd_reloc_code_real_type
1451 v850_reloc_prefix (operand)
1452 const struct v850_operand *operand;
1453 {
1454 boolean paren_skipped = false;
1455
1456 /* Skip leading opening parenthesis. */
1457 if (*input_line_pointer == '(')
1458 {
1459 ++input_line_pointer;
1460 paren_skipped = true;
1461 }
1462
1463 #define CHECK_(name, reloc) \
1464 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1465 { \
1466 input_line_pointer += strlen (name); \
1467 return reloc; \
1468 }
1469
1470 CHECK_ ("hi0", BFD_RELOC_HI16 );
1471 CHECK_ ("hi", BFD_RELOC_HI16_S );
1472 CHECK_ ("lo", BFD_RELOC_LO16 );
1473 CHECK_ ("sdaoff", handle_sdaoff (operand));
1474 CHECK_ ("zdaoff", handle_zdaoff (operand));
1475 CHECK_ ("tdaoff", handle_tdaoff (operand));
1476 CHECK_ ("hilo", BFD_RELOC_32 );
1477 CHECK_ ("ctoff", handle_ctoff (operand) );
1478
1479 /* Restore skipped parenthesis. */
1480 if (paren_skipped)
1481 --input_line_pointer;
1482
1483 return BFD_RELOC_UNUSED;
1484 }
1485
1486 /* Insert an operand value into an instruction. */
1487
1488 static unsigned long v850_insert_operand
1489 PARAMS ((unsigned long, const struct v850_operand *, offsetT, char *,
1490 unsigned int, char *));
1491
1492 static unsigned long
1493 v850_insert_operand (insn, operand, val, file, line, str)
1494 unsigned long insn;
1495 const struct v850_operand *operand;
1496 offsetT val;
1497 char *file;
1498 unsigned int line;
1499 char *str;
1500 {
1501 if (operand->insert)
1502 {
1503 const char *message = NULL;
1504
1505 insn = operand->insert (insn, val, &message);
1506 if (message != NULL)
1507 {
1508 if ((operand->flags & V850_OPERAND_SIGNED)
1509 && ! warn_signed_overflows
1510 && strstr (message, "out of range") != NULL)
1511 {
1512 /* Skip warning... */
1513 }
1514 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1515 && ! warn_unsigned_overflows
1516 && strstr (message, "out of range") != NULL)
1517 {
1518 /* Skip warning... */
1519 }
1520 else if (str)
1521 {
1522 if (file == (char *) NULL)
1523 as_warn ("%s: %s", str, message);
1524 else
1525 as_warn_where (file, line, "%s: %s", str, message);
1526 }
1527 else
1528 {
1529 if (file == (char *) NULL)
1530 as_warn (message);
1531 else
1532 as_warn_where (file, line, message);
1533 }
1534 }
1535 }
1536 else
1537 {
1538 if (operand->bits != 32)
1539 {
1540 long min, max;
1541
1542 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1543 {
1544 if (! warn_signed_overflows)
1545 max = (1 << operand->bits) - 1;
1546 else
1547 max = (1 << (operand->bits - 1)) - 1;
1548
1549 min = -(1 << (operand->bits - 1));
1550 }
1551 else
1552 {
1553 max = (1 << operand->bits) - 1;
1554
1555 if (! warn_unsigned_overflows)
1556 min = -(1 << (operand->bits - 1));
1557 else
1558 min = 0;
1559 }
1560
1561 if (val < (offsetT) min || val > (offsetT) max)
1562 {
1563 /* xgettext:c-format */
1564 const char *err =
1565 _("operand out of range (%s not between %ld and %ld)");
1566 char buf[100];
1567
1568 /* Restore min and mix to expected values for decimal ranges. */
1569 if ((operand->flags & V850_OPERAND_SIGNED)
1570 && ! warn_signed_overflows)
1571 max = (1 << (operand->bits - 1)) - 1;
1572
1573 if (! (operand->flags & V850_OPERAND_SIGNED)
1574 && ! warn_unsigned_overflows)
1575 min = 0;
1576
1577 if (str)
1578 {
1579 sprintf (buf, "%s: ", str);
1580
1581 sprint_value (buf + strlen (buf), val);
1582 }
1583 else
1584 sprint_value (buf, val);
1585
1586 if (file == (char *) NULL)
1587 as_warn (err, buf, min, max);
1588 else
1589 as_warn_where (file, line, err, buf, min, max);
1590 }
1591 }
1592
1593 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1594 }
1595
1596 return insn;
1597 }
1598 \f
1599 static char copy_of_instruction[128];
1600
1601 void
1602 md_assemble (str)
1603 char *str;
1604 {
1605 char *s;
1606 char *start_of_operands;
1607 struct v850_opcode *opcode;
1608 struct v850_opcode *next_opcode;
1609 const unsigned char *opindex_ptr;
1610 int next_opindex;
1611 int relaxable = 0;
1612 unsigned long insn;
1613 unsigned long insn_size;
1614 char *f;
1615 int i;
1616 int match;
1617 boolean extra_data_after_insn = false;
1618 unsigned extra_data_len = 0;
1619 unsigned long extra_data = 0;
1620 char *saved_input_line_pointer;
1621
1622 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1623
1624 /* Get the opcode. */
1625 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
1626 continue;
1627
1628 if (*s != '\0')
1629 *s++ = '\0';
1630
1631 /* Find the first opcode with the proper name. */
1632 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1633 if (opcode == NULL)
1634 {
1635 /* xgettext:c-format */
1636 as_bad (_("Unrecognized opcode: `%s'"), str);
1637 ignore_rest_of_line ();
1638 return;
1639 }
1640
1641 str = s;
1642 while (ISSPACE (*str))
1643 ++str;
1644
1645 start_of_operands = str;
1646
1647 saved_input_line_pointer = input_line_pointer;
1648
1649 for (;;)
1650 {
1651 const char *errmsg = NULL;
1652
1653 match = 0;
1654
1655 if ((opcode->processors & processor_mask) == 0)
1656 {
1657 errmsg = _("Target processor does not support this instruction.");
1658 goto error;
1659 }
1660
1661 relaxable = 0;
1662 fc = 0;
1663 next_opindex = 0;
1664 insn = opcode->opcode;
1665 extra_data_after_insn = false;
1666
1667 input_line_pointer = str = start_of_operands;
1668
1669 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1670 {
1671 const struct v850_operand *operand;
1672 char *hold;
1673 expressionS ex;
1674 bfd_reloc_code_real_type reloc;
1675
1676 if (next_opindex == 0)
1677 {
1678 operand = &v850_operands[*opindex_ptr];
1679 }
1680 else
1681 {
1682 operand = &v850_operands[next_opindex];
1683 next_opindex = 0;
1684 }
1685
1686 errmsg = NULL;
1687
1688 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1689 ++str;
1690
1691 if (operand->flags & V850_OPERAND_RELAX)
1692 relaxable = 1;
1693
1694 /* Gather the operand. */
1695 hold = input_line_pointer;
1696 input_line_pointer = str;
1697
1698 /* lo(), hi(), hi0(), etc... */
1699 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1700 {
1701 /* This is a fake reloc, used to indicate an error condition. */
1702 if (reloc == BFD_RELOC_64)
1703 {
1704 match = 1;
1705 goto error;
1706 }
1707
1708 expression (&ex);
1709
1710 if (ex.X_op == O_constant)
1711 {
1712 switch (reloc)
1713 {
1714 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1715 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1716 and the like. */
1717 /* Fall through. */
1718
1719 case BFD_RELOC_LO16:
1720 {
1721 /* Truncate, then sign extend the value. */
1722 ex.X_add_number = SEXT16 (ex.X_add_number);
1723 break;
1724 }
1725
1726 case BFD_RELOC_HI16:
1727 {
1728 /* Truncate, then sign extend the value. */
1729 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1730 break;
1731 }
1732
1733 case BFD_RELOC_HI16_S:
1734 {
1735 /* Truncate, then sign extend the value. */
1736 int temp = (ex.X_add_number >> 16) & 0xffff;
1737
1738 temp += (ex.X_add_number >> 15) & 1;
1739
1740 ex.X_add_number = SEXT16 (temp);
1741 break;
1742 }
1743
1744 case BFD_RELOC_32:
1745 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1746 {
1747 errmsg = _("immediate operand is too large");
1748 goto error;
1749 }
1750
1751 extra_data_after_insn = true;
1752 extra_data_len = 4;
1753 extra_data = ex.X_add_number;
1754 ex.X_add_number = 0;
1755 break;
1756
1757 default:
1758 fprintf (stderr, "reloc: %d\n", reloc);
1759 as_bad (_("AAARG -> unhandled constant reloc"));
1760 break;
1761 }
1762
1763 if (fc > MAX_INSN_FIXUPS)
1764 as_fatal (_("too many fixups"));
1765
1766 fixups[fc].exp = ex;
1767 fixups[fc].opindex = *opindex_ptr;
1768 fixups[fc].reloc = reloc;
1769 fc++;
1770 }
1771 else
1772 {
1773 if (reloc == BFD_RELOC_32)
1774 {
1775 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1776 {
1777 errmsg = _("immediate operand is too large");
1778 goto error;
1779 }
1780
1781 extra_data_after_insn = true;
1782 extra_data_len = 4;
1783 extra_data = ex.X_add_number;
1784 }
1785
1786 if (fc > MAX_INSN_FIXUPS)
1787 as_fatal (_("too many fixups"));
1788
1789 fixups[fc].exp = ex;
1790 fixups[fc].opindex = *opindex_ptr;
1791 fixups[fc].reloc = reloc;
1792 fc++;
1793 }
1794 }
1795 else
1796 {
1797 errmsg = NULL;
1798
1799 if ((operand->flags & V850_OPERAND_REG) != 0)
1800 {
1801 if (!register_name (&ex))
1802 {
1803 errmsg = _("invalid register name");
1804 }
1805 else if ((operand->flags & V850_NOT_R0)
1806 && ex.X_add_number == 0)
1807 {
1808 errmsg = _("register r0 cannot be used here");
1809
1810 /* Force an error message to be generated by
1811 skipping over any following potential matches
1812 for this opcode. */
1813 opcode += 3;
1814 }
1815 }
1816 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1817 {
1818 if (!system_register_name (&ex, true, false))
1819 {
1820 errmsg = _("invalid system register name");
1821 }
1822 }
1823 else if ((operand->flags & V850_OPERAND_EP) != 0)
1824 {
1825 char *start = input_line_pointer;
1826 char c = get_symbol_end ();
1827
1828 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1829 {
1830 /* Put things back the way we found them. */
1831 *input_line_pointer = c;
1832 input_line_pointer = start;
1833 errmsg = _("expected EP register");
1834 goto error;
1835 }
1836
1837 *input_line_pointer = c;
1838 str = input_line_pointer;
1839 input_line_pointer = hold;
1840
1841 while (*str == ' ' || *str == ','
1842 || *str == '[' || *str == ']')
1843 ++str;
1844 continue;
1845 }
1846 else if ((operand->flags & V850_OPERAND_CC) != 0)
1847 {
1848 if (!cc_name (&ex))
1849 {
1850 errmsg = _("invalid condition code name");
1851 }
1852 }
1853 else if (operand->flags & V850E_PUSH_POP)
1854 {
1855 errmsg = parse_register_list (&insn, operand);
1856
1857 /* The parse_register_list() function has already done
1858 everything, so fake a dummy expression. */
1859 ex.X_op = O_constant;
1860 ex.X_add_number = 0;
1861 }
1862 else if (operand->flags & V850E_IMMEDIATE16)
1863 {
1864 expression (&ex);
1865
1866 if (ex.X_op != O_constant)
1867 errmsg = _("constant expression expected");
1868 else if (ex.X_add_number & 0xffff0000)
1869 {
1870 if (ex.X_add_number & 0xffff)
1871 errmsg = _("constant too big to fit into instruction");
1872 else if ((insn & 0x001fffc0) == 0x00130780)
1873 ex.X_add_number >>= 16;
1874 else
1875 errmsg = _("constant too big to fit into instruction");
1876 }
1877
1878 extra_data_after_insn = true;
1879 extra_data_len = 2;
1880 extra_data = ex.X_add_number;
1881 ex.X_add_number = 0;
1882 }
1883 else if (operand->flags & V850E_IMMEDIATE32)
1884 {
1885 expression (&ex);
1886
1887 if (ex.X_op != O_constant)
1888 errmsg = _("constant expression expected");
1889
1890 extra_data_after_insn = true;
1891 extra_data_len = 4;
1892 extra_data = ex.X_add_number;
1893 ex.X_add_number = 0;
1894 }
1895 else if (register_name (&ex)
1896 && (operand->flags & V850_OPERAND_REG) == 0)
1897 {
1898 char c;
1899 int exists = 0;
1900
1901 /* It is possible that an alias has been defined that
1902 matches a register name. For example the code may
1903 include a ".set ZERO, 0" directive, which matches
1904 the register name "zero". Attempt to reparse the
1905 field as an expression, and only complain if we
1906 cannot generate a constant. */
1907
1908 input_line_pointer = str;
1909
1910 c = get_symbol_end ();
1911
1912 if (symbol_find (str) != NULL)
1913 exists = 1;
1914
1915 *input_line_pointer = c;
1916 input_line_pointer = str;
1917
1918 expression (&ex);
1919
1920 if (ex.X_op != O_constant)
1921 {
1922 /* If this register is actually occuring too early on
1923 the parsing of the instruction, (because another
1924 field is missing) then report this. */
1925 if (opindex_ptr[1] != 0
1926 && (v850_operands[opindex_ptr[1]].flags
1927 & V850_OPERAND_REG))
1928 errmsg = _("syntax error: value is missing before the register name");
1929 else
1930 errmsg = _("syntax error: register not expected");
1931
1932 /* If we created a symbol in the process of this
1933 test then delete it now, so that it will not
1934 be output with the real symbols... */
1935 if (exists == 0
1936 && ex.X_op == O_symbol)
1937 symbol_remove (ex.X_add_symbol,
1938 &symbol_rootP, &symbol_lastP);
1939 }
1940 }
1941 else if (system_register_name (&ex, false, false)
1942 && (operand->flags & V850_OPERAND_SRG) == 0)
1943 {
1944 errmsg = _("syntax error: system register not expected");
1945 }
1946 else if (cc_name (&ex)
1947 && (operand->flags & V850_OPERAND_CC) == 0)
1948 {
1949 errmsg = _("syntax error: condition code not expected");
1950 }
1951 else
1952 {
1953 expression (&ex);
1954 /* Special case:
1955 If we are assembling a MOV instruction and the immediate
1956 value does not fit into the bits available then create a
1957 fake error so that the next MOV instruction will be
1958 selected. This one has a 32 bit immediate field. */
1959
1960 if (((insn & 0x07e0) == 0x0200)
1961 && operand->bits == 5 /* Do not match the CALLT instruction. */
1962 && ex.X_op == O_constant
1963 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
1964 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
1965 errmsg = _("immediate operand is too large");
1966 }
1967
1968 if (errmsg)
1969 goto error;
1970
1971 #if 0
1972 fprintf (stderr,
1973 " insn: %x, operand %d, op: %d, add_number: %d\n",
1974 insn, opindex_ptr - opcode->operands,
1975 ex.X_op, ex.X_add_number);
1976 #endif
1977
1978 switch (ex.X_op)
1979 {
1980 case O_illegal:
1981 errmsg = _("illegal operand");
1982 goto error;
1983 case O_absent:
1984 errmsg = _("missing operand");
1985 goto error;
1986 case O_register:
1987 if ((operand->flags
1988 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
1989 {
1990 errmsg = _("invalid operand");
1991 goto error;
1992 }
1993 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1994 (char *) NULL, 0,
1995 copy_of_instruction);
1996 break;
1997
1998 case O_constant:
1999 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2000 (char *) NULL, 0,
2001 copy_of_instruction);
2002 break;
2003
2004 default:
2005 /* We need to generate a fixup for this expression. */
2006 if (fc >= MAX_INSN_FIXUPS)
2007 as_fatal (_("too many fixups"));
2008
2009 fixups[fc].exp = ex;
2010 fixups[fc].opindex = *opindex_ptr;
2011 fixups[fc].reloc = BFD_RELOC_UNUSED;
2012 ++fc;
2013 break;
2014 }
2015 }
2016
2017 str = input_line_pointer;
2018 input_line_pointer = hold;
2019
2020 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2021 || *str == ')')
2022 ++str;
2023 }
2024 match = 1;
2025
2026 error:
2027 if (match == 0)
2028 {
2029 next_opcode = opcode + 1;
2030 if (next_opcode->name != NULL
2031 && strcmp (next_opcode->name, opcode->name) == 0)
2032 {
2033 opcode = next_opcode;
2034
2035 /* Skip versions that are not supported by the target
2036 processor. */
2037 if ((opcode->processors & processor_mask) == 0)
2038 goto error;
2039
2040 continue;
2041 }
2042
2043 as_bad ("%s: %s", copy_of_instruction, errmsg);
2044
2045 if (*input_line_pointer == ']')
2046 ++input_line_pointer;
2047
2048 ignore_rest_of_line ();
2049 input_line_pointer = saved_input_line_pointer;
2050 return;
2051 }
2052 break;
2053 }
2054
2055 while (ISSPACE (*str))
2056 ++str;
2057
2058 if (*str != '\0')
2059 /* xgettext:c-format */
2060 as_bad (_("junk at end of line: `%s'"), str);
2061
2062 input_line_pointer = str;
2063
2064 /* Tie dwarf2 debug info to the address at the start of the insn.
2065 We can't do this after the insn has been output as the current
2066 frag may have been closed off. eg. by frag_var. */
2067 dwarf2_emit_insn (0);
2068
2069 /* Write out the instruction. */
2070
2071 if (relaxable && fc > 0)
2072 {
2073 insn_size = 2;
2074 fc = 0;
2075
2076 if (!strcmp (opcode->name, "br"))
2077 {
2078 f = frag_var (rs_machine_dependent, 4, 2, 2,
2079 fixups[0].exp.X_add_symbol,
2080 fixups[0].exp.X_add_number,
2081 (char *) fixups[0].opindex);
2082 md_number_to_chars (f, insn, insn_size);
2083 md_number_to_chars (f + 2, 0, 2);
2084 }
2085 else
2086 {
2087 f = frag_var (rs_machine_dependent, 6, 4, 0,
2088 fixups[0].exp.X_add_symbol,
2089 fixups[0].exp.X_add_number,
2090 (char *) fixups[0].opindex);
2091 md_number_to_chars (f, insn, insn_size);
2092 md_number_to_chars (f + 2, 0, 4);
2093 }
2094 }
2095 else
2096 {
2097 /* Four byte insns have an opcode with the two high bits on. */
2098 if ((insn & 0x0600) == 0x0600)
2099 insn_size = 4;
2100 else
2101 insn_size = 2;
2102
2103 /* Special case: 32 bit MOV. */
2104 if ((insn & 0xffe0) == 0x0620)
2105 insn_size = 2;
2106
2107 f = frag_more (insn_size);
2108 md_number_to_chars (f, insn, insn_size);
2109
2110 if (extra_data_after_insn)
2111 {
2112 f = frag_more (extra_data_len);
2113 md_number_to_chars (f, extra_data, extra_data_len);
2114
2115 extra_data_after_insn = false;
2116 }
2117 }
2118
2119 /* Create any fixups. At this point we do not use a
2120 bfd_reloc_code_real_type, but instead just use the
2121 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2122 handle fixups for any operand type, although that is admittedly
2123 not a very exciting feature. We pick a BFD reloc type in
2124 md_apply_fix3. */
2125 for (i = 0; i < fc; i++)
2126 {
2127 const struct v850_operand *operand;
2128 bfd_reloc_code_real_type reloc;
2129
2130 operand = &v850_operands[fixups[i].opindex];
2131
2132 reloc = fixups[i].reloc;
2133
2134 if (reloc != BFD_RELOC_UNUSED)
2135 {
2136 reloc_howto_type *reloc_howto =
2137 bfd_reloc_type_lookup (stdoutput, reloc);
2138 int size;
2139 int address;
2140 fixS *fixP;
2141
2142 if (!reloc_howto)
2143 abort ();
2144
2145 size = bfd_get_reloc_size (reloc_howto);
2146
2147 /* XXX This will abort on an R_V850_8 reloc -
2148 is this reloc actually used? */
2149 if (size != 2 && size != 4)
2150 abort ();
2151
2152 address = (f - frag_now->fr_literal) + insn_size - size;
2153
2154 if (reloc == BFD_RELOC_32)
2155 address += 2;
2156
2157 fixP = fix_new_exp (frag_now, address, size,
2158 &fixups[i].exp,
2159 reloc_howto->pc_relative,
2160 reloc);
2161
2162 switch (reloc)
2163 {
2164 case BFD_RELOC_LO16:
2165 case BFD_RELOC_HI16:
2166 case BFD_RELOC_HI16_S:
2167 fixP->fx_no_overflow = 1;
2168 break;
2169 default:
2170 break;
2171 }
2172 }
2173 else
2174 {
2175 fix_new_exp (frag_now,
2176 f - frag_now->fr_literal, 4,
2177 & fixups[i].exp,
2178 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
2179 (bfd_reloc_code_real_type) (fixups[i].opindex
2180 + (int) BFD_RELOC_UNUSED));
2181 }
2182 }
2183
2184 input_line_pointer = saved_input_line_pointer;
2185 }
2186
2187 /* If while processing a fixup, a reloc really needs to be created
2188 then it is done here. */
2189
2190 arelent *
2191 tc_gen_reloc (seg, fixp)
2192 asection *seg ATTRIBUTE_UNUSED;
2193 fixS *fixp;
2194 {
2195 arelent *reloc;
2196
2197 reloc = (arelent *) xmalloc (sizeof (arelent));
2198 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2199 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2200 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2201 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2202
2203 if (reloc->howto == (reloc_howto_type *) NULL)
2204 {
2205 as_bad_where (fixp->fx_file, fixp->fx_line,
2206 /* xgettext:c-format */
2207 _("reloc %d not supported by object file format"),
2208 (int) fixp->fx_r_type);
2209
2210 xfree (reloc);
2211
2212 return NULL;
2213 }
2214
2215 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2216 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2217 reloc->addend = fixp->fx_offset;
2218 else
2219 reloc->addend = fixp->fx_addnumber;
2220
2221 return reloc;
2222 }
2223
2224 /* Return current size of variable part of frag. */
2225
2226 int
2227 md_estimate_size_before_relax (fragp, seg)
2228 fragS *fragp;
2229 asection *seg ATTRIBUTE_UNUSED;
2230 {
2231 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2232 abort ();
2233
2234 return md_relax_table[fragp->fr_subtype].rlx_length;
2235 }
2236
2237 long
2238 v850_pcrel_from_section (fixp, section)
2239 fixS *fixp;
2240 segT section;
2241 {
2242 /* If the symbol is undefined, or in a section other than our own,
2243 or it is weak (in which case it may well be in another section,
2244 then let the linker figure it out. */
2245 if (fixp->fx_addsy != (symbolS *) NULL
2246 && (! S_IS_DEFINED (fixp->fx_addsy)
2247 || S_IS_WEAK (fixp->fx_addsy)
2248 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2249 return 0;
2250
2251 return fixp->fx_frag->fr_address + fixp->fx_where;
2252 }
2253
2254 void
2255 md_apply_fix3 (fixP, valueP, seg)
2256 fixS *fixP;
2257 valueT *valueP;
2258 segT seg ATTRIBUTE_UNUSED;
2259 {
2260 valueT value = * valueP;
2261 char *where;
2262
2263 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2264 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2265 {
2266 fixP->fx_done = 0;
2267 return;
2268 }
2269
2270 if (fixP->fx_addsy == (symbolS *) NULL)
2271 fixP->fx_done = 1;
2272
2273 else if (fixP->fx_pcrel)
2274 ;
2275
2276 else
2277 {
2278 value = fixP->fx_offset;
2279 if (fixP->fx_subsy != (symbolS *) NULL)
2280 {
2281 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2282 value -= S_GET_VALUE (fixP->fx_subsy);
2283 else
2284 {
2285 /* We don't actually support subtracting a symbol. */
2286 as_bad_where (fixP->fx_file, fixP->fx_line,
2287 _("expression too complex"));
2288 }
2289 }
2290 }
2291
2292 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
2293 {
2294 int opindex;
2295 const struct v850_operand *operand;
2296 unsigned long insn;
2297
2298 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
2299 operand = &v850_operands[opindex];
2300
2301 /* Fetch the instruction, insert the fully resolved operand
2302 value, and stuff the instruction back again.
2303
2304 Note the instruction has been stored in little endian
2305 format! */
2306 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2307
2308 insn = bfd_getl32 ((unsigned char *) where);
2309 insn = v850_insert_operand (insn, operand, (offsetT) value,
2310 fixP->fx_file, fixP->fx_line, NULL);
2311 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2312
2313 if (fixP->fx_done)
2314 /* Nothing else to do here. */
2315 return;
2316
2317 /* Determine a BFD reloc value based on the operand information.
2318 We are only prepared to turn a few of the operands into relocs. */
2319
2320 if (operand->bits == 22)
2321 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
2322 else if (operand->bits == 9)
2323 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
2324 else
2325 {
2326 #if 0
2327 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2328 #endif
2329
2330 as_bad_where (fixP->fx_file, fixP->fx_line,
2331 _("unresolved expression that must be resolved"));
2332 fixP->fx_done = 1;
2333 return;
2334 }
2335 }
2336 else if (fixP->fx_done)
2337 {
2338 /* We still have to insert the value into memory! */
2339 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2340
2341 if (fixP->fx_size == 1)
2342 *where = value & 0xff;
2343 else if (fixP->fx_size == 2)
2344 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2345 else if (fixP->fx_size == 4)
2346 bfd_putl32 (value, (unsigned char *) where);
2347 }
2348
2349 fixP->fx_addnumber = value;
2350 }
2351 \f
2352 /* Parse a cons expression. We have to handle hi(), lo(), etc
2353 on the v850. */
2354
2355 void
2356 parse_cons_expression_v850 (exp)
2357 expressionS *exp;
2358 {
2359 /* See if there's a reloc prefix like hi() we have to handle. */
2360 hold_cons_reloc = v850_reloc_prefix (NULL);
2361
2362 /* Do normal expression parsing. */
2363 expression (exp);
2364 }
2365
2366 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2367 found a reloc prefix, then we use that reloc, else we choose an
2368 appropriate one based on the size of the expression. */
2369
2370 void
2371 cons_fix_new_v850 (frag, where, size, exp)
2372 fragS *frag;
2373 int where;
2374 int size;
2375 expressionS *exp;
2376 {
2377 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2378 {
2379 if (size == 4)
2380 hold_cons_reloc = BFD_RELOC_32;
2381 if (size == 2)
2382 hold_cons_reloc = BFD_RELOC_16;
2383 if (size == 1)
2384 hold_cons_reloc = BFD_RELOC_8;
2385 }
2386
2387 if (exp != NULL)
2388 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2389 else
2390 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2391
2392 hold_cons_reloc = BFD_RELOC_UNUSED;
2393 }
2394
2395 boolean
2396 v850_fix_adjustable (fixP)
2397 fixS *fixP;
2398 {
2399 if (fixP->fx_addsy == NULL)
2400 return 1;
2401
2402 /* Prevent all adjustments to global symbols. */
2403 if (S_IS_EXTERN (fixP->fx_addsy))
2404 return 0;
2405
2406 /* Similarly for weak symbols. */
2407 if (S_IS_WEAK (fixP->fx_addsy))
2408 return 0;
2409
2410 /* Don't adjust function names. */
2411 if (S_IS_FUNCTION (fixP->fx_addsy))
2412 return 0;
2413
2414 /* We need the symbol name for the VTABLE entries. */
2415 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2416 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2417 return 0;
2418
2419 return 1;
2420 }
2421
2422 int
2423 v850_force_relocation (fixP)
2424 struct fix *fixP;
2425 {
2426 if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
2427 return 1;
2428
2429 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2430 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2431 return 1;
2432
2433 return 0;
2434 }
GDB Binutils - Deliverables
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