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Add support for a -g switch to GAS
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include <stdio.h>
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "opcode/v850.h"
27 #include "dwarf2dbg.h"
28
29 /* Sign-extend a 16-bit number. */
30 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
31
32 /* Temporarily holds the reloc in a cons expression. */
33 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
34
35 /* Set to TRUE if we want to be pedantic about signed overflows. */
36 static bfd_boolean warn_signed_overflows = FALSE;
37 static bfd_boolean warn_unsigned_overflows = FALSE;
38
39 /* Indicates the target BFD machine number. */
40 static int machine = -1;
41
42 /* Indicates the target processor(s) for the assemble. */
43 static int processor_mask = -1;
44 \f
45 /* Structure to hold information about predefined registers. */
46 struct reg_name {
47 const char *name;
48 int value;
49 };
50
51 /* Generic assembler global variables which must be defined by all
52 targets. */
53
54 /* Characters which always start a comment. */
55 const char comment_chars[] = "#";
56
57 /* Characters which start a comment at the beginning of a line. */
58 const char line_comment_chars[] = ";#";
59
60 /* Characters which may be used to separate multiple commands on a
61 single line. */
62 const char line_separator_chars[] = ";";
63
64 /* Characters which are used to indicate an exponent in a floating
65 point number. */
66 const char EXP_CHARS[] = "eE";
67
68 /* Characters which mean that a number is a floating point constant,
69 as in 0d1.0. */
70 const char FLT_CHARS[] = "dD";
71 \f
72 const relax_typeS md_relax_table[] = {
73 /* Conditional branches. */
74 {0xff, -0x100, 2, 1},
75 {0x1fffff, -0x200000, 6, 0},
76 /* Unconditional branches. */
77 {0xff, -0x100, 2, 3},
78 {0x1fffff, -0x200000, 4, 0},
79 };
80
81 static int v850_relax = 0;
82
83 /* Fixups. */
84 #define MAX_INSN_FIXUPS (5)
85 struct v850_fixup {
86 expressionS exp;
87 int opindex;
88 bfd_reloc_code_real_type reloc;
89 };
90
91 struct v850_fixup fixups[MAX_INSN_FIXUPS];
92 static int fc;
93
94 struct v850_seg_entry
95 {
96 segT s;
97 const char *name;
98 flagword flags;
99 };
100
101 struct v850_seg_entry v850_seg_table[] =
102 {
103 { NULL, ".sdata",
104 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
105 | SEC_SMALL_DATA },
106 { NULL, ".tdata",
107 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
108 { NULL, ".zdata",
109 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
110 { NULL, ".sbss",
111 SEC_ALLOC | SEC_SMALL_DATA },
112 { NULL, ".tbss",
113 SEC_ALLOC },
114 { NULL, ".zbss",
115 SEC_ALLOC},
116 { NULL, ".rosdata",
117 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
118 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
119 { NULL, ".rozdata",
120 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
121 | SEC_HAS_CONTENTS },
122 { NULL, ".scommon",
123 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
124 | SEC_SMALL_DATA | SEC_IS_COMMON },
125 { NULL, ".tcommon",
126 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
127 | SEC_IS_COMMON },
128 { NULL, ".zcommon",
129 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
130 | SEC_IS_COMMON },
131 { NULL, ".call_table_data",
132 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
133 { NULL, ".call_table_text",
134 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
135 | SEC_HAS_CONTENTS},
136 { NULL, ".bss",
137 SEC_ALLOC }
138 };
139
140 #define SDATA_SECTION 0
141 #define TDATA_SECTION 1
142 #define ZDATA_SECTION 2
143 #define SBSS_SECTION 3
144 #define TBSS_SECTION 4
145 #define ZBSS_SECTION 5
146 #define ROSDATA_SECTION 6
147 #define ROZDATA_SECTION 7
148 #define SCOMMON_SECTION 8
149 #define TCOMMON_SECTION 9
150 #define ZCOMMON_SECTION 10
151 #define CALL_TABLE_DATA_SECTION 11
152 #define CALL_TABLE_TEXT_SECTION 12
153 #define BSS_SECTION 13
154
155 static void do_v850_seg PARAMS ((int, subsegT));
156
157 static void
158 do_v850_seg (i, sub)
159 int i;
160 subsegT sub;
161 {
162 struct v850_seg_entry *seg = v850_seg_table + i;
163
164 obj_elf_section_change_hook ();
165 if (seg->s != NULL)
166 {
167 subseg_set (seg->s, sub);
168 }
169 else
170 {
171 seg->s = subseg_new (seg->name, sub);
172 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
173 if ((seg->flags & SEC_LOAD) == 0)
174 seg_info (seg->s)->bss = 1;
175 }
176 }
177
178 static void v850_seg PARAMS ((int i));
179
180 static void
181 v850_seg (i)
182 int i;
183 {
184 subsegT sub = get_absolute_expression ();
185
186 do_v850_seg (i, sub);
187 demand_empty_rest_of_line ();
188 }
189
190 static void v850_offset PARAMS ((int));
191
192 static void
193 v850_offset (ignore)
194 int ignore ATTRIBUTE_UNUSED;
195 {
196 char *pfrag;
197 int temp = get_absolute_expression ();
198
199 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
200 (offsetT) temp, (char *) 0);
201 *pfrag = 0;
202
203 demand_empty_rest_of_line ();
204 }
205
206 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
207
208 static void v850_comm PARAMS ((int));
209
210 static void
211 v850_comm (area)
212 int area;
213 {
214 char *name;
215 char c;
216 char *p;
217 int temp;
218 unsigned int size;
219 symbolS *symbolP;
220 int have_align;
221
222 name = input_line_pointer;
223 c = get_symbol_end ();
224
225 /* Just after name is now '\0'. */
226 p = input_line_pointer;
227 *p = c;
228
229 SKIP_WHITESPACE ();
230
231 if (*input_line_pointer != ',')
232 {
233 as_bad (_("Expected comma after symbol-name"));
234 ignore_rest_of_line ();
235 return;
236 }
237
238 /* Skip ','. */
239 input_line_pointer++;
240
241 if ((temp = get_absolute_expression ()) < 0)
242 {
243 /* xgettext:c-format */
244 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
245 ignore_rest_of_line ();
246 return;
247 }
248
249 size = temp;
250 *p = 0;
251 symbolP = symbol_find_or_make (name);
252 *p = c;
253
254 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
255 {
256 as_bad (_("Ignoring attempt to re-define symbol"));
257 ignore_rest_of_line ();
258 return;
259 }
260
261 if (S_GET_VALUE (symbolP) != 0)
262 {
263 if (S_GET_VALUE (symbolP) != size)
264 {
265 /* xgettext:c-format */
266 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
267 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
268 }
269 }
270
271 know (symbol_get_frag (symbolP) == &zero_address_frag);
272
273 if (*input_line_pointer != ',')
274 have_align = 0;
275 else
276 {
277 have_align = 1;
278 input_line_pointer++;
279 SKIP_WHITESPACE ();
280 }
281
282 if (! have_align || *input_line_pointer != '"')
283 {
284 if (! have_align)
285 temp = 0;
286 else
287 {
288 temp = get_absolute_expression ();
289
290 if (temp < 0)
291 {
292 temp = 0;
293 as_warn (_("Common alignment negative; 0 assumed"));
294 }
295 }
296
297 if (symbol_get_obj (symbolP)->local)
298 {
299 segT old_sec;
300 int old_subsec;
301 char *pfrag;
302 int align;
303 flagword applicable;
304
305 old_sec = now_seg;
306 old_subsec = now_subseg;
307
308 applicable = bfd_applicable_section_flags (stdoutput);
309
310 applicable &= SEC_ALLOC;
311
312 switch (area)
313 {
314 case SCOMMON_SECTION:
315 do_v850_seg (SBSS_SECTION, 0);
316 break;
317
318 case ZCOMMON_SECTION:
319 do_v850_seg (ZBSS_SECTION, 0);
320 break;
321
322 case TCOMMON_SECTION:
323 do_v850_seg (TBSS_SECTION, 0);
324 break;
325 }
326
327 if (temp)
328 {
329 /* Convert to a power of 2 alignment. */
330 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
331 ;
332
333 if (temp != 1)
334 {
335 as_bad (_("Common alignment not a power of 2"));
336 ignore_rest_of_line ();
337 return;
338 }
339 }
340 else
341 align = 0;
342
343 record_alignment (now_seg, align);
344
345 if (align)
346 frag_align (align, 0, 0);
347
348 switch (area)
349 {
350 case SCOMMON_SECTION:
351 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
352 symbol_get_frag (symbolP)->fr_symbol = 0;
353 break;
354
355 case ZCOMMON_SECTION:
356 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
357 symbol_get_frag (symbolP)->fr_symbol = 0;
358 break;
359
360 case TCOMMON_SECTION:
361 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
362 symbol_get_frag (symbolP)->fr_symbol = 0;
363 break;
364
365 default:
366 abort ();
367 }
368
369 symbol_set_frag (symbolP, frag_now);
370 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
371 (offsetT) size, (char *) 0);
372 *pfrag = 0;
373 S_SET_SIZE (symbolP, size);
374
375 switch (area)
376 {
377 case SCOMMON_SECTION:
378 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
379 break;
380
381 case ZCOMMON_SECTION:
382 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
383 break;
384
385 case TCOMMON_SECTION:
386 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
387 break;
388
389 default:
390 abort ();
391 }
392
393 S_CLEAR_EXTERNAL (symbolP);
394 obj_elf_section_change_hook ();
395 subseg_set (old_sec, old_subsec);
396 }
397 else
398 {
399 segT old_sec;
400 int old_subsec;
401
402 allocate_common:
403 old_sec = now_seg;
404 old_subsec = now_subseg;
405
406 S_SET_VALUE (symbolP, (valueT) size);
407 S_SET_ALIGN (symbolP, temp);
408 S_SET_EXTERNAL (symbolP);
409
410 switch (area)
411 {
412 case SCOMMON_SECTION:
413 case ZCOMMON_SECTION:
414 case TCOMMON_SECTION:
415 do_v850_seg (area, 0);
416 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
417 break;
418
419 default:
420 abort ();
421 }
422
423 obj_elf_section_change_hook ();
424 subseg_set (old_sec, old_subsec);
425 }
426 }
427 else
428 {
429 input_line_pointer++;
430
431 /* @@ Some use the dot, some don't. Can we get some consistency?? */
432 if (*input_line_pointer == '.')
433 input_line_pointer++;
434
435 /* @@ Some say data, some say bss. */
436 if (strncmp (input_line_pointer, "bss\"", 4)
437 && strncmp (input_line_pointer, "data\"", 5))
438 {
439 while (*--input_line_pointer != '"')
440 ;
441 input_line_pointer--;
442 goto bad_common_segment;
443 }
444 while (*input_line_pointer++ != '"')
445 ;
446 goto allocate_common;
447 }
448
449 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
450
451 demand_empty_rest_of_line ();
452 return;
453
454 {
455 bad_common_segment:
456 p = input_line_pointer;
457 while (*p && *p != '\n')
458 p++;
459 c = *p;
460 *p = '\0';
461 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
462 *p = c;
463 input_line_pointer = p;
464 ignore_rest_of_line ();
465 return;
466 }
467 }
468
469 static void set_machine PARAMS ((int));
470
471 static void
472 set_machine (number)
473 int number;
474 {
475 machine = number;
476 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
477
478 switch (machine)
479 {
480 case 0: processor_mask = PROCESSOR_V850; break;
481 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
482 case bfd_mach_v850e1: processor_mask = PROCESSOR_V850E; break;
483 }
484 }
485
486 static void v850_longcode PARAMS ((int));
487
488 static void
489 v850_longcode (type)
490 int type;
491 {
492 expressionS ex;
493
494 if (! v850_relax)
495 {
496 if (type == 1)
497 as_warn (".longcall pseudo-op seen when not relaxing");
498 else
499 as_warn (".longjump pseudo-op seen when not relaxing");
500 }
501
502 expression (&ex);
503
504 if (ex.X_op != O_symbol || ex.X_add_number != 0)
505 {
506 as_bad ("bad .longcall format");
507 ignore_rest_of_line ();
508
509 return;
510 }
511
512 if (type == 1)
513 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
514 BFD_RELOC_V850_LONGCALL);
515 else
516 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
517 BFD_RELOC_V850_LONGJUMP);
518
519 demand_empty_rest_of_line ();
520 }
521
522 /* The target specific pseudo-ops which we support. */
523 const pseudo_typeS md_pseudo_table[] =
524 {
525 { "sdata", v850_seg, SDATA_SECTION },
526 { "tdata", v850_seg, TDATA_SECTION },
527 { "zdata", v850_seg, ZDATA_SECTION },
528 { "sbss", v850_seg, SBSS_SECTION },
529 { "tbss", v850_seg, TBSS_SECTION },
530 { "zbss", v850_seg, ZBSS_SECTION },
531 { "rosdata", v850_seg, ROSDATA_SECTION },
532 { "rozdata", v850_seg, ROZDATA_SECTION },
533 { "bss", v850_seg, BSS_SECTION },
534 { "offset", v850_offset, 0 },
535 { "word", cons, 4 },
536 { "zcomm", v850_comm, ZCOMMON_SECTION },
537 { "scomm", v850_comm, SCOMMON_SECTION },
538 { "tcomm", v850_comm, TCOMMON_SECTION },
539 { "v850", set_machine, 0 },
540 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
541 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
542 { "v850e", set_machine, bfd_mach_v850e },
543 { "v850e1", set_machine, bfd_mach_v850e1 },
544 { "longcall", v850_longcode, 1 },
545 { "longjump", v850_longcode, 2 },
546 { NULL, NULL, 0 }
547 };
548
549 /* Opcode hash table. */
550 static struct hash_control *v850_hash;
551
552 /* This table is sorted. Suitable for searching by a binary search. */
553 static const struct reg_name pre_defined_registers[] =
554 {
555 { "ep", 30 }, /* ep - element ptr */
556 { "gp", 4 }, /* gp - global ptr */
557 { "hp", 2 }, /* hp - handler stack ptr */
558 { "lp", 31 }, /* lp - link ptr */
559 { "r0", 0 },
560 { "r1", 1 },
561 { "r10", 10 },
562 { "r11", 11 },
563 { "r12", 12 },
564 { "r13", 13 },
565 { "r14", 14 },
566 { "r15", 15 },
567 { "r16", 16 },
568 { "r17", 17 },
569 { "r18", 18 },
570 { "r19", 19 },
571 { "r2", 2 },
572 { "r20", 20 },
573 { "r21", 21 },
574 { "r22", 22 },
575 { "r23", 23 },
576 { "r24", 24 },
577 { "r25", 25 },
578 { "r26", 26 },
579 { "r27", 27 },
580 { "r28", 28 },
581 { "r29", 29 },
582 { "r3", 3 },
583 { "r30", 30 },
584 { "r31", 31 },
585 { "r4", 4 },
586 { "r5", 5 },
587 { "r6", 6 },
588 { "r7", 7 },
589 { "r8", 8 },
590 { "r9", 9 },
591 { "sp", 3 }, /* sp - stack ptr */
592 { "tp", 5 }, /* tp - text ptr */
593 { "zero", 0 },
594 };
595
596 #define REG_NAME_CNT \
597 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
598
599 static const struct reg_name system_registers[] =
600 {
601 { "asid", 23 },
602 { "bpc", 22 },
603 { "bpav", 24 },
604 { "bpam", 25 },
605 { "bpdv", 26 },
606 { "bpdm", 27 },
607 { "ctbp", 20 },
608 { "ctpc", 16 },
609 { "ctpsw", 17 },
610 { "dbpc", 18 },
611 { "dbpsw", 19 },
612 { "dir", 21 },
613 { "ecr", 4 },
614 { "eipc", 0 },
615 { "eipsw", 1 },
616 { "fepc", 2 },
617 { "fepsw", 3 },
618 { "psw", 5 },
619 };
620
621 #define SYSREG_NAME_CNT \
622 (sizeof (system_registers) / sizeof (struct reg_name))
623
624 static const struct reg_name system_list_registers[] =
625 {
626 {"PS", 5 },
627 {"SR", 0 + 1}
628 };
629
630 #define SYSREGLIST_NAME_CNT \
631 (sizeof (system_list_registers) / sizeof (struct reg_name))
632
633 static const struct reg_name cc_names[] =
634 {
635 { "c", 0x1 },
636 { "e", 0x2 },
637 { "ge", 0xe },
638 { "gt", 0xf },
639 { "h", 0xb },
640 { "l", 0x1 },
641 { "le", 0x7 },
642 { "lt", 0x6 },
643 { "n", 0x4 },
644 { "nc", 0x9 },
645 { "ne", 0xa },
646 { "nh", 0x3 },
647 { "nl", 0x9 },
648 { "ns", 0xc },
649 { "nv", 0x8 },
650 { "nz", 0xa },
651 { "p", 0xc },
652 { "s", 0x4 },
653 { "sa", 0xd },
654 { "t", 0x5 },
655 { "v", 0x0 },
656 { "z", 0x2 },
657 };
658
659 #define CC_NAME_CNT \
660 (sizeof (cc_names) / sizeof (struct reg_name))
661
662 /* Do a binary search of the given register table to see if NAME is a
663 valid regiter name. Return the register number from the array on
664 success, or -1 on failure. */
665
666 static int reg_name_search
667 PARAMS ((const struct reg_name *, int, const char *, bfd_boolean));
668
669 static int
670 reg_name_search (regs, regcount, name, accept_numbers)
671 const struct reg_name *regs;
672 int regcount;
673 const char *name;
674 bfd_boolean accept_numbers;
675 {
676 int middle, low, high;
677 int cmp;
678 symbolS *symbolP;
679
680 /* If the register name is a symbol, then evaluate it. */
681 if ((symbolP = symbol_find (name)) != NULL)
682 {
683 /* If the symbol is an alias for another name then use that.
684 If the symbol is an alias for a number, then return the number. */
685 if (symbol_equated_p (symbolP))
686 {
687 name
688 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
689 }
690 else if (accept_numbers)
691 {
692 int reg = S_GET_VALUE (symbolP);
693
694 if (reg >= 0 && reg <= 31)
695 return reg;
696 }
697
698 /* Otherwise drop through and try parsing name normally. */
699 }
700
701 low = 0;
702 high = regcount - 1;
703
704 do
705 {
706 middle = (low + high) / 2;
707 cmp = strcasecmp (name, regs[middle].name);
708 if (cmp < 0)
709 high = middle - 1;
710 else if (cmp > 0)
711 low = middle + 1;
712 else
713 return regs[middle].value;
714 }
715 while (low <= high);
716 return -1;
717 }
718
719 /* Summary of register_name().
720
721 in: Input_line_pointer points to 1st char of operand.
722
723 out: An expressionS.
724 The operand may have been a register: in this case, X_op == O_register,
725 X_add_number is set to the register number, and truth is returned.
726 Input_line_pointer->(next non-blank) char after operand, or is in
727 its original state. */
728
729 static bfd_boolean register_name PARAMS ((expressionS *));
730
731 static bfd_boolean
732 register_name (expressionP)
733 expressionS *expressionP;
734 {
735 int reg_number;
736 char *name;
737 char *start;
738 char c;
739
740 /* Find the spelling of the operand. */
741 start = name = input_line_pointer;
742
743 c = get_symbol_end ();
744
745 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
746 name, FALSE);
747
748 /* Put back the delimiting char. */
749 *input_line_pointer = c;
750
751 /* Look to see if it's in the register table. */
752 if (reg_number >= 0)
753 {
754 expressionP->X_op = O_register;
755 expressionP->X_add_number = reg_number;
756
757 /* Make the rest nice. */
758 expressionP->X_add_symbol = NULL;
759 expressionP->X_op_symbol = NULL;
760
761 return TRUE;
762 }
763 else
764 {
765 /* Reset the line as if we had not done anything. */
766 input_line_pointer = start;
767
768 return FALSE;
769 }
770 }
771
772 /* Summary of system_register_name().
773
774 in: INPUT_LINE_POINTER points to 1st char of operand.
775 EXPRESSIONP points to an expression structure to be filled in.
776 ACCEPT_NUMBERS is true iff numerical register names may be used.
777 ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
778 accepted.
779
780 out: An expressionS structure in expressionP.
781 The operand may have been a register: in this case, X_op == O_register,
782 X_add_number is set to the register number, and truth is returned.
783 Input_line_pointer->(next non-blank) char after operand, or is in
784 its original state. */
785
786 static bfd_boolean system_register_name
787 PARAMS ((expressionS *, bfd_boolean, bfd_boolean));
788
789 static bfd_boolean
790 system_register_name (expressionP, accept_numbers, accept_list_names)
791 expressionS *expressionP;
792 bfd_boolean accept_numbers;
793 bfd_boolean accept_list_names;
794 {
795 int reg_number;
796 char *name;
797 char *start;
798 char c;
799
800 /* Find the spelling of the operand. */
801 start = name = input_line_pointer;
802
803 c = get_symbol_end ();
804 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
805 accept_numbers);
806
807 /* Put back the delimiting char. */
808 *input_line_pointer = c;
809
810 if (reg_number < 0
811 && accept_numbers)
812 {
813 /* Reset input_line pointer. */
814 input_line_pointer = start;
815
816 if (ISDIGIT (*input_line_pointer))
817 {
818 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
819
820 /* Make sure that the register number is allowable. */
821 if (reg_number < 0
822 || (reg_number > 5 && reg_number < 16)
823 || reg_number > 27)
824 {
825 reg_number = -1;
826 }
827 }
828 else if (accept_list_names)
829 {
830 c = get_symbol_end ();
831 reg_number = reg_name_search (system_list_registers,
832 SYSREGLIST_NAME_CNT, name, FALSE);
833
834 /* Put back the delimiting char. */
835 *input_line_pointer = c;
836 }
837 }
838
839 /* Look to see if it's in the register table. */
840 if (reg_number >= 0)
841 {
842 expressionP->X_op = O_register;
843 expressionP->X_add_number = reg_number;
844
845 /* Make the rest nice. */
846 expressionP->X_add_symbol = NULL;
847 expressionP->X_op_symbol = NULL;
848
849 return TRUE;
850 }
851 else
852 {
853 /* Reset the line as if we had not done anything. */
854 input_line_pointer = start;
855
856 return FALSE;
857 }
858 }
859
860 /* Summary of cc_name().
861
862 in: INPUT_LINE_POINTER points to 1st char of operand.
863
864 out: An expressionS.
865 The operand may have been a register: in this case, X_op == O_register,
866 X_add_number is set to the register number, and truth is returned.
867 Input_line_pointer->(next non-blank) char after operand, or is in
868 its original state. */
869
870 static bfd_boolean cc_name PARAMS ((expressionS *));
871
872 static bfd_boolean
873 cc_name (expressionP)
874 expressionS *expressionP;
875 {
876 int reg_number;
877 char *name;
878 char *start;
879 char c;
880
881 /* Find the spelling of the operand. */
882 start = name = input_line_pointer;
883
884 c = get_symbol_end ();
885 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
886
887 /* Put back the delimiting char. */
888 *input_line_pointer = c;
889
890 /* Look to see if it's in the register table. */
891 if (reg_number >= 0)
892 {
893 expressionP->X_op = O_constant;
894 expressionP->X_add_number = reg_number;
895
896 /* Make the rest nice. */
897 expressionP->X_add_symbol = NULL;
898 expressionP->X_op_symbol = NULL;
899
900 return TRUE;
901 }
902 else
903 {
904 /* Reset the line as if we had not done anything. */
905 input_line_pointer = start;
906
907 return FALSE;
908 }
909 }
910
911 static void skip_white_space PARAMS ((void));
912
913 static void
914 skip_white_space ()
915 {
916 while (*input_line_pointer == ' '
917 || *input_line_pointer == '\t')
918 ++input_line_pointer;
919 }
920
921 /* Summary of parse_register_list ().
922
923 in: INPUT_LINE_POINTER points to 1st char of a list of registers.
924 INSN is the partially constructed instruction.
925 OPERAND is the operand being inserted.
926
927 out: NULL if the parse completed successfully, otherwise a
928 pointer to an error message is returned. If the parse
929 completes the correct bit fields in the instruction
930 will be filled in.
931
932 Parses register lists with the syntax:
933
934 { rX }
935 { rX, rY }
936 { rX - rY }
937 { rX - rY, rZ }
938 etc
939
940 and also parses constant expressions whoes bits indicate the
941 registers in the lists. The LSB in the expression refers to
942 the lowest numbered permissible register in the register list,
943 and so on upwards. System registers are considered to be very
944 high numbers. */
945
946 static char *parse_register_list
947 PARAMS ((unsigned long *, const struct v850_operand *));
948
949 static char *
950 parse_register_list (insn, operand)
951 unsigned long *insn;
952 const struct v850_operand *operand;
953 {
954 static int type1_regs[32] = {
955 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
956 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
957 };
958 static int type2_regs[32] = {
959 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
960 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
961 };
962 static int type3_regs[32] = {
963 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
964 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
965 };
966 int *regs;
967 expressionS exp;
968
969 /* Select a register array to parse. */
970 switch (operand->shift)
971 {
972 case 0xffe00001: regs = type1_regs; break;
973 case 0xfff8000f: regs = type2_regs; break;
974 case 0xfff8001f: regs = type3_regs; break;
975 default:
976 as_bad (_("unknown operand shift: %x\n"), operand->shift);
977 return _("internal failure in parse_register_list");
978 }
979
980 skip_white_space ();
981
982 /* If the expression starts with a curly brace it is a register list.
983 Otherwise it is a constant expression, whoes bits indicate which
984 registers are to be included in the list. */
985 if (*input_line_pointer != '{')
986 {
987 int reg;
988 int i;
989
990 expression (&exp);
991
992 if (exp.X_op != O_constant)
993 return _("constant expression or register list expected");
994
995 if (regs == type1_regs)
996 {
997 if (exp.X_add_number & 0xFFFFF000)
998 return _("high bits set in register list expression");
999
1000 for (reg = 20; reg < 32; reg++)
1001 if (exp.X_add_number & (1 << (reg - 20)))
1002 {
1003 for (i = 0; i < 32; i++)
1004 if (regs[i] == reg)
1005 *insn |= (1 << i);
1006 }
1007 }
1008 else if (regs == type2_regs)
1009 {
1010 if (exp.X_add_number & 0xFFFE0000)
1011 return _("high bits set in register list expression");
1012
1013 for (reg = 1; reg < 16; reg++)
1014 if (exp.X_add_number & (1 << (reg - 1)))
1015 {
1016 for (i = 0; i < 32; i++)
1017 if (regs[i] == reg)
1018 *insn |= (1 << i);
1019 }
1020
1021 if (exp.X_add_number & (1 << 15))
1022 *insn |= (1 << 3);
1023
1024 if (exp.X_add_number & (1 << 16))
1025 *insn |= (1 << 19);
1026 }
1027 else /* regs == type3_regs */
1028 {
1029 if (exp.X_add_number & 0xFFFE0000)
1030 return _("high bits set in register list expression");
1031
1032 for (reg = 16; reg < 32; reg++)
1033 if (exp.X_add_number & (1 << (reg - 16)))
1034 {
1035 for (i = 0; i < 32; i++)
1036 if (regs[i] == reg)
1037 *insn |= (1 << i);
1038 }
1039
1040 if (exp.X_add_number & (1 << 16))
1041 *insn |= (1 << 19);
1042 }
1043
1044 return NULL;
1045 }
1046
1047 input_line_pointer++;
1048
1049 /* Parse the register list until a terminator (closing curly brace or
1050 new-line) is found. */
1051 for (;;)
1052 {
1053 if (register_name (&exp))
1054 {
1055 int i;
1056
1057 /* Locate the given register in the list, and if it is there,
1058 insert the corresponding bit into the instruction. */
1059 for (i = 0; i < 32; i++)
1060 {
1061 if (regs[i] == exp.X_add_number)
1062 {
1063 *insn |= (1 << i);
1064 break;
1065 }
1066 }
1067
1068 if (i == 32)
1069 return _("illegal register included in list");
1070 }
1071 else if (system_register_name (&exp, TRUE, TRUE))
1072 {
1073 if (regs == type1_regs)
1074 {
1075 return _("system registers cannot be included in list");
1076 }
1077 else if (exp.X_add_number == 5)
1078 {
1079 if (regs == type2_regs)
1080 return _("PSW cannot be included in list");
1081 else
1082 *insn |= 0x8;
1083 }
1084 else if (exp.X_add_number < 4)
1085 *insn |= 0x80000;
1086 else
1087 return _("High value system registers cannot be included in list");
1088 }
1089 else if (*input_line_pointer == '}')
1090 {
1091 input_line_pointer++;
1092 break;
1093 }
1094 else if (*input_line_pointer == ',')
1095 {
1096 input_line_pointer++;
1097 continue;
1098 }
1099 else if (*input_line_pointer == '-')
1100 {
1101 /* We have encountered a range of registers: rX - rY. */
1102 int j;
1103 expressionS exp2;
1104
1105 /* Skip the dash. */
1106 ++input_line_pointer;
1107
1108 /* Get the second register in the range. */
1109 if (! register_name (&exp2))
1110 {
1111 return _("second register should follow dash in register list");
1112 exp2.X_add_number = exp.X_add_number;
1113 }
1114
1115 /* Add the rest of the registers in the range. */
1116 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1117 {
1118 int i;
1119
1120 /* Locate the given register in the list, and if it is there,
1121 insert the corresponding bit into the instruction. */
1122 for (i = 0; i < 32; i++)
1123 {
1124 if (regs[i] == j)
1125 {
1126 *insn |= (1 << i);
1127 break;
1128 }
1129 }
1130
1131 if (i == 32)
1132 return _("illegal register included in list");
1133 }
1134 }
1135 else
1136 break;
1137
1138 skip_white_space ();
1139 }
1140
1141 return NULL;
1142 }
1143
1144 const char *md_shortopts = "m:";
1145
1146 struct option md_longopts[] = {
1147 {NULL, no_argument, NULL, 0}
1148 };
1149
1150 size_t md_longopts_size = sizeof (md_longopts);
1151
1152 void
1153 md_show_usage (stream)
1154 FILE *stream;
1155 {
1156 fprintf (stream, _(" V850 options:\n"));
1157 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1158 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1159 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1160 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1161 fprintf (stream, _(" -mv850e1 The code is targeted at the v850e1\n"));
1162 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1163 fprintf (stream, _(" -mrelax Enable relaxation\n"));
1164 }
1165
1166 int
1167 md_parse_option (c, arg)
1168 int c;
1169 char *arg;
1170 {
1171 if (c != 'm')
1172 return 0;
1173
1174 if (strcmp (arg, "warn-signed-overflow") == 0)
1175 warn_signed_overflows = TRUE;
1176
1177 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1178 warn_unsigned_overflows = TRUE;
1179
1180 else if (strcmp (arg, "v850") == 0)
1181 {
1182 machine = 0;
1183 processor_mask = PROCESSOR_V850;
1184 }
1185 else if (strcmp (arg, "v850e") == 0)
1186 {
1187 machine = bfd_mach_v850e;
1188 processor_mask = PROCESSOR_V850E;
1189 }
1190 else if (strcmp (arg, "v850e1") == 0)
1191 {
1192 machine = bfd_mach_v850e1;
1193 processor_mask = PROCESSOR_V850E1;
1194 }
1195 else if (strcmp (arg, "v850any") == 0)
1196 {
1197 /* Tell the world that this is for any v850 chip. */
1198 machine = 0;
1199
1200 /* But support instructions for the extended versions. */
1201 processor_mask = PROCESSOR_V850E;
1202 processor_mask |= PROCESSOR_V850E1;
1203 }
1204 else if (strcmp (arg, "relax") == 0)
1205 v850_relax = 1;
1206 else
1207 return 0;
1208
1209 return 1;
1210 }
1211
1212 symbolS *
1213 md_undefined_symbol (name)
1214 char *name ATTRIBUTE_UNUSED;
1215 {
1216 return 0;
1217 }
1218
1219 char *
1220 md_atof (type, litp, sizep)
1221 int type;
1222 char *litp;
1223 int *sizep;
1224 {
1225 int prec;
1226 LITTLENUM_TYPE words[4];
1227 char *t;
1228 int i;
1229
1230 switch (type)
1231 {
1232 case 'f':
1233 prec = 2;
1234 break;
1235
1236 case 'd':
1237 prec = 4;
1238 break;
1239
1240 default:
1241 *sizep = 0;
1242 return _("bad call to md_atof");
1243 }
1244
1245 t = atof_ieee (input_line_pointer, type, words);
1246 if (t)
1247 input_line_pointer = t;
1248
1249 *sizep = prec * 2;
1250
1251 for (i = prec - 1; i >= 0; i--)
1252 {
1253 md_number_to_chars (litp, (valueT) words[i], 2);
1254 litp += 2;
1255 }
1256
1257 return NULL;
1258 }
1259
1260 /* Very gross. */
1261
1262 void
1263 md_convert_frag (abfd, sec, fragP)
1264 bfd *abfd ATTRIBUTE_UNUSED;
1265 asection *sec;
1266 fragS *fragP;
1267 {
1268 subseg_change (sec, 0);
1269
1270 /* In range conditional or unconditional branch. */
1271 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1272 {
1273 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1274 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1275 fragP->fr_fix += 2;
1276 }
1277 /* Out of range conditional branch. Emit a branch around a jump. */
1278 else if (fragP->fr_subtype == 1)
1279 {
1280 unsigned char *buffer =
1281 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1282
1283 /* Reverse the condition of the first branch. */
1284 buffer[0] ^= 0x08;
1285 /* Mask off all the displacement bits. */
1286 buffer[0] &= 0x8f;
1287 buffer[1] &= 0x07;
1288 /* Now set the displacement bits so that we branch
1289 around the unconditional branch. */
1290 buffer[0] |= 0x30;
1291
1292 /* Now create the unconditional branch + fixup to the final
1293 target. */
1294 md_number_to_chars (buffer + 2, 0x00000780, 4);
1295 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1296 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1297 (int) fragP->fr_opcode + 1);
1298 fragP->fr_fix += 6;
1299 }
1300 /* Out of range unconditional branch. Emit a jump. */
1301 else if (fragP->fr_subtype == 3)
1302 {
1303 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1304 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1305 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1306 (int) fragP->fr_opcode + 1);
1307 fragP->fr_fix += 4;
1308 }
1309 else
1310 abort ();
1311 }
1312
1313 valueT
1314 md_section_align (seg, addr)
1315 asection *seg;
1316 valueT addr;
1317 {
1318 int align = bfd_get_section_alignment (stdoutput, seg);
1319 return ((addr + (1 << align) - 1) & (-1 << align));
1320 }
1321
1322 void
1323 md_begin ()
1324 {
1325 char *prev_name = "";
1326 const struct v850_opcode *op;
1327
1328 if (strncmp (TARGET_CPU, "v850e1", 6) == 0)
1329 {
1330 if (machine == -1)
1331 machine = bfd_mach_v850e1;
1332
1333 if (processor_mask == -1)
1334 processor_mask = PROCESSOR_V850E1;
1335 }
1336 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1337 {
1338 if (machine == -1)
1339 machine = bfd_mach_v850e;
1340
1341 if (processor_mask == -1)
1342 processor_mask = PROCESSOR_V850E;
1343 }
1344 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1345 {
1346 if (machine == -1)
1347 machine = 0;
1348
1349 if (processor_mask == -1)
1350 processor_mask = PROCESSOR_V850;
1351 }
1352 else
1353 /* xgettext:c-format */
1354 as_bad (_("Unable to determine default target processor from string: %s"),
1355 TARGET_CPU);
1356
1357 v850_hash = hash_new ();
1358
1359 /* Insert unique names into hash table. The V850 instruction set
1360 has many identical opcode names that have different opcodes based
1361 on the operands. This hash table then provides a quick index to
1362 the first opcode with a particular name in the opcode table. */
1363 op = v850_opcodes;
1364 while (op->name)
1365 {
1366 if (strcmp (prev_name, op->name))
1367 {
1368 prev_name = (char *) op->name;
1369 hash_insert (v850_hash, op->name, (char *) op);
1370 }
1371 op++;
1372 }
1373
1374 v850_seg_table[BSS_SECTION].s = bss_section;
1375 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1376 }
1377
1378 static bfd_reloc_code_real_type handle_ctoff
1379 PARAMS ((const struct v850_operand *));
1380
1381 static bfd_reloc_code_real_type
1382 handle_ctoff (operand)
1383 const struct v850_operand *operand;
1384 {
1385 if (operand == NULL)
1386 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1387
1388 if (operand->bits != 6
1389 || operand->shift != 0)
1390 {
1391 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1392 return BFD_RELOC_64; /* Used to indicate an error condition. */
1393 }
1394
1395 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1396 }
1397
1398 static bfd_reloc_code_real_type handle_sdaoff
1399 PARAMS ((const struct v850_operand *));
1400
1401 static bfd_reloc_code_real_type
1402 handle_sdaoff (operand)
1403 const struct v850_operand *operand;
1404 {
1405 if (operand == NULL)
1406 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1407
1408 if (operand->bits == 15 && operand->shift == 17)
1409 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1410
1411 if (operand->bits == -1)
1412 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1413
1414 if (operand->bits != 16
1415 || operand->shift != 16)
1416 {
1417 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1418 return BFD_RELOC_64; /* Used to indicate an error condition. */
1419 }
1420
1421 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1422 }
1423
1424 static bfd_reloc_code_real_type handle_zdaoff
1425 PARAMS ((const struct v850_operand *));
1426
1427 static bfd_reloc_code_real_type
1428 handle_zdaoff (operand)
1429 const struct v850_operand *operand;
1430 {
1431 if (operand == NULL)
1432 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1433
1434 if (operand->bits == 15 && operand->shift == 17)
1435 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1436
1437 if (operand->bits == -1)
1438 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1439
1440 if (operand->bits != 16
1441 || operand->shift != 16)
1442 {
1443 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1444 /* Used to indicate an error condition. */
1445 return BFD_RELOC_64;
1446 }
1447
1448 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1449 }
1450
1451 static bfd_reloc_code_real_type handle_tdaoff
1452 PARAMS ((const struct v850_operand *));
1453
1454 static bfd_reloc_code_real_type
1455 handle_tdaoff (operand)
1456 const struct v850_operand *operand;
1457 {
1458 if (operand == NULL)
1459 /* Data item, not an instruction. */
1460 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1461
1462 if (operand->bits == 6 && operand->shift == 1)
1463 /* sld.w/sst.w, operand: D8_6 */
1464 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1465
1466 if (operand->bits == 4 && operand->insert != NULL)
1467 /* sld.hu, operand: D5-4 */
1468 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1469
1470 if (operand->bits == 4 && operand->insert == NULL)
1471 /* sld.bu, operand: D4 */
1472 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1473
1474 if (operand->bits == 16 && operand->shift == 16)
1475 /* set1 & chums, operands: D16 */
1476 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1477
1478 if (operand->bits != 7)
1479 {
1480 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1481 /* Used to indicate an error condition. */
1482 return BFD_RELOC_64;
1483 }
1484
1485 return operand->insert != NULL
1486 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1487 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, operand: D7 */
1488 }
1489
1490 /* Warning: The code in this function relies upon the definitions
1491 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1492 matching the hard coded values contained herein. */
1493
1494 static bfd_reloc_code_real_type v850_reloc_prefix
1495 PARAMS ((const struct v850_operand *));
1496
1497 static bfd_reloc_code_real_type
1498 v850_reloc_prefix (operand)
1499 const struct v850_operand *operand;
1500 {
1501 bfd_boolean paren_skipped = FALSE;
1502
1503 /* Skip leading opening parenthesis. */
1504 if (*input_line_pointer == '(')
1505 {
1506 ++input_line_pointer;
1507 paren_skipped = TRUE;
1508 }
1509
1510 #define CHECK_(name, reloc) \
1511 if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \
1512 { \
1513 input_line_pointer += strlen (name); \
1514 return reloc; \
1515 }
1516
1517 CHECK_ ("hi0", BFD_RELOC_HI16 );
1518 CHECK_ ("hi", BFD_RELOC_HI16_S );
1519 CHECK_ ("lo", BFD_RELOC_LO16 );
1520 CHECK_ ("sdaoff", handle_sdaoff (operand));
1521 CHECK_ ("zdaoff", handle_zdaoff (operand));
1522 CHECK_ ("tdaoff", handle_tdaoff (operand));
1523 CHECK_ ("hilo", BFD_RELOC_32 );
1524 CHECK_ ("ctoff", handle_ctoff (operand) );
1525
1526 /* Restore skipped parenthesis. */
1527 if (paren_skipped)
1528 --input_line_pointer;
1529
1530 return BFD_RELOC_UNUSED;
1531 }
1532
1533 /* Insert an operand value into an instruction. */
1534
1535 static unsigned long v850_insert_operand
1536 PARAMS ((unsigned long, const struct v850_operand *, offsetT, char *,
1537 unsigned int, char *));
1538
1539 static unsigned long
1540 v850_insert_operand (insn, operand, val, file, line, str)
1541 unsigned long insn;
1542 const struct v850_operand *operand;
1543 offsetT val;
1544 char *file;
1545 unsigned int line;
1546 char *str;
1547 {
1548 if (operand->insert)
1549 {
1550 const char *message = NULL;
1551
1552 insn = operand->insert (insn, val, &message);
1553 if (message != NULL)
1554 {
1555 if ((operand->flags & V850_OPERAND_SIGNED)
1556 && ! warn_signed_overflows
1557 && strstr (message, "out of range") != NULL)
1558 {
1559 /* Skip warning... */
1560 }
1561 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1562 && ! warn_unsigned_overflows
1563 && strstr (message, "out of range") != NULL)
1564 {
1565 /* Skip warning... */
1566 }
1567 else if (str)
1568 {
1569 if (file == (char *) NULL)
1570 as_warn ("%s: %s", str, message);
1571 else
1572 as_warn_where (file, line, "%s: %s", str, message);
1573 }
1574 else
1575 {
1576 if (file == (char *) NULL)
1577 as_warn (message);
1578 else
1579 as_warn_where (file, line, message);
1580 }
1581 }
1582 }
1583 else
1584 {
1585 if (operand->bits != 32)
1586 {
1587 long min, max;
1588
1589 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1590 {
1591 if (! warn_signed_overflows)
1592 max = (1 << operand->bits) - 1;
1593 else
1594 max = (1 << (operand->bits - 1)) - 1;
1595
1596 min = -(1 << (operand->bits - 1));
1597 }
1598 else
1599 {
1600 max = (1 << operand->bits) - 1;
1601
1602 if (! warn_unsigned_overflows)
1603 min = -(1 << (operand->bits - 1));
1604 else
1605 min = 0;
1606 }
1607
1608 if (val < (offsetT) min || val > (offsetT) max)
1609 {
1610 char buf [128];
1611
1612 /* Restore min and mix to expected values for decimal ranges. */
1613 if ((operand->flags & V850_OPERAND_SIGNED)
1614 && ! warn_signed_overflows)
1615 max = (1 << (operand->bits - 1)) - 1;
1616
1617 if (! (operand->flags & V850_OPERAND_SIGNED)
1618 && ! warn_unsigned_overflows)
1619 min = 0;
1620
1621 if (str)
1622 sprintf (buf, "%s: ", str);
1623 else
1624 buf[0] = 0;
1625 strcat (buf, _("operand"));
1626
1627 as_bad_value_out_of_range (buf, val, (offsetT) min, (offsetT) max, file, line);
1628 }
1629 }
1630
1631 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1632 }
1633
1634 return insn;
1635 }
1636 \f
1637 static char copy_of_instruction[128];
1638
1639 void
1640 md_assemble (str)
1641 char *str;
1642 {
1643 char *s;
1644 char *start_of_operands;
1645 struct v850_opcode *opcode;
1646 struct v850_opcode *next_opcode;
1647 const unsigned char *opindex_ptr;
1648 int next_opindex;
1649 int relaxable = 0;
1650 unsigned long insn;
1651 unsigned long insn_size;
1652 char *f;
1653 int i;
1654 int match;
1655 bfd_boolean extra_data_after_insn = FALSE;
1656 unsigned extra_data_len = 0;
1657 unsigned long extra_data = 0;
1658 char *saved_input_line_pointer;
1659
1660 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1661
1662 /* Get the opcode. */
1663 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
1664 continue;
1665
1666 if (*s != '\0')
1667 *s++ = '\0';
1668
1669 /* Find the first opcode with the proper name. */
1670 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1671 if (opcode == NULL)
1672 {
1673 /* xgettext:c-format */
1674 as_bad (_("Unrecognized opcode: `%s'"), str);
1675 ignore_rest_of_line ();
1676 return;
1677 }
1678
1679 str = s;
1680 while (ISSPACE (*str))
1681 ++str;
1682
1683 start_of_operands = str;
1684
1685 saved_input_line_pointer = input_line_pointer;
1686
1687 for (;;)
1688 {
1689 const char *errmsg = NULL;
1690
1691 match = 0;
1692
1693 if ((opcode->processors & processor_mask) == 0)
1694 {
1695 errmsg = _("Target processor does not support this instruction.");
1696 goto error;
1697 }
1698
1699 relaxable = 0;
1700 fc = 0;
1701 next_opindex = 0;
1702 insn = opcode->opcode;
1703 extra_data_after_insn = FALSE;
1704
1705 input_line_pointer = str = start_of_operands;
1706
1707 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1708 {
1709 const struct v850_operand *operand;
1710 char *hold;
1711 expressionS ex;
1712 bfd_reloc_code_real_type reloc;
1713
1714 if (next_opindex == 0)
1715 {
1716 operand = &v850_operands[*opindex_ptr];
1717 }
1718 else
1719 {
1720 operand = &v850_operands[next_opindex];
1721 next_opindex = 0;
1722 }
1723
1724 errmsg = NULL;
1725
1726 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1727 ++str;
1728
1729 if (operand->flags & V850_OPERAND_RELAX)
1730 relaxable = 1;
1731
1732 /* Gather the operand. */
1733 hold = input_line_pointer;
1734 input_line_pointer = str;
1735
1736 /* lo(), hi(), hi0(), etc... */
1737 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1738 {
1739 /* This is a fake reloc, used to indicate an error condition. */
1740 if (reloc == BFD_RELOC_64)
1741 {
1742 match = 1;
1743 goto error;
1744 }
1745
1746 expression (&ex);
1747
1748 if (ex.X_op == O_constant)
1749 {
1750 switch (reloc)
1751 {
1752 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1753 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1754 and the like. */
1755 /* Fall through. */
1756
1757 case BFD_RELOC_LO16:
1758 {
1759 /* Truncate, then sign extend the value. */
1760 ex.X_add_number = SEXT16 (ex.X_add_number);
1761 break;
1762 }
1763
1764 case BFD_RELOC_HI16:
1765 {
1766 /* Truncate, then sign extend the value. */
1767 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1768 break;
1769 }
1770
1771 case BFD_RELOC_HI16_S:
1772 {
1773 /* Truncate, then sign extend the value. */
1774 int temp = (ex.X_add_number >> 16) & 0xffff;
1775
1776 temp += (ex.X_add_number >> 15) & 1;
1777
1778 ex.X_add_number = SEXT16 (temp);
1779 break;
1780 }
1781
1782 case BFD_RELOC_32:
1783 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1784 {
1785 errmsg = _("immediate operand is too large");
1786 goto error;
1787 }
1788
1789 extra_data_after_insn = TRUE;
1790 extra_data_len = 4;
1791 extra_data = 0;
1792 break;
1793
1794 default:
1795 fprintf (stderr, "reloc: %d\n", reloc);
1796 as_bad (_("AAARG -> unhandled constant reloc"));
1797 break;
1798 }
1799
1800 if (fc > MAX_INSN_FIXUPS)
1801 as_fatal (_("too many fixups"));
1802
1803 fixups[fc].exp = ex;
1804 fixups[fc].opindex = *opindex_ptr;
1805 fixups[fc].reloc = reloc;
1806 fc++;
1807 }
1808 else
1809 {
1810 if (reloc == BFD_RELOC_32)
1811 {
1812 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1813 {
1814 errmsg = _("immediate operand is too large");
1815 goto error;
1816 }
1817
1818 extra_data_after_insn = TRUE;
1819 extra_data_len = 4;
1820 extra_data = ex.X_add_number;
1821 }
1822
1823 if (fc > MAX_INSN_FIXUPS)
1824 as_fatal (_("too many fixups"));
1825
1826 fixups[fc].exp = ex;
1827 fixups[fc].opindex = *opindex_ptr;
1828 fixups[fc].reloc = reloc;
1829 fc++;
1830 }
1831 }
1832 else
1833 {
1834 errmsg = NULL;
1835
1836 if ((operand->flags & V850_OPERAND_REG) != 0)
1837 {
1838 if (!register_name (&ex))
1839 {
1840 errmsg = _("invalid register name");
1841 }
1842 else if ((operand->flags & V850_NOT_R0)
1843 && ex.X_add_number == 0)
1844 {
1845 errmsg = _("register r0 cannot be used here");
1846
1847 /* Force an error message to be generated by
1848 skipping over any following potential matches
1849 for this opcode. */
1850 opcode += 3;
1851 }
1852 }
1853 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1854 {
1855 if (!system_register_name (&ex, TRUE, FALSE))
1856 {
1857 errmsg = _("invalid system register name");
1858 }
1859 }
1860 else if ((operand->flags & V850_OPERAND_EP) != 0)
1861 {
1862 char *start = input_line_pointer;
1863 char c = get_symbol_end ();
1864
1865 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1866 {
1867 /* Put things back the way we found them. */
1868 *input_line_pointer = c;
1869 input_line_pointer = start;
1870 errmsg = _("expected EP register");
1871 goto error;
1872 }
1873
1874 *input_line_pointer = c;
1875 str = input_line_pointer;
1876 input_line_pointer = hold;
1877
1878 while (*str == ' ' || *str == ','
1879 || *str == '[' || *str == ']')
1880 ++str;
1881 continue;
1882 }
1883 else if ((operand->flags & V850_OPERAND_CC) != 0)
1884 {
1885 if (!cc_name (&ex))
1886 {
1887 errmsg = _("invalid condition code name");
1888 }
1889 }
1890 else if (operand->flags & V850E_PUSH_POP)
1891 {
1892 errmsg = parse_register_list (&insn, operand);
1893
1894 /* The parse_register_list() function has already done
1895 everything, so fake a dummy expression. */
1896 ex.X_op = O_constant;
1897 ex.X_add_number = 0;
1898 }
1899 else if (operand->flags & V850E_IMMEDIATE16)
1900 {
1901 expression (&ex);
1902
1903 if (ex.X_op != O_constant)
1904 errmsg = _("constant expression expected");
1905 else if (ex.X_add_number & 0xffff0000)
1906 {
1907 if (ex.X_add_number & 0xffff)
1908 errmsg = _("constant too big to fit into instruction");
1909 else if ((insn & 0x001fffc0) == 0x00130780)
1910 ex.X_add_number >>= 16;
1911 else
1912 errmsg = _("constant too big to fit into instruction");
1913 }
1914
1915 extra_data_after_insn = TRUE;
1916 extra_data_len = 2;
1917 extra_data = ex.X_add_number;
1918 ex.X_add_number = 0;
1919 }
1920 else if (operand->flags & V850E_IMMEDIATE32)
1921 {
1922 expression (&ex);
1923
1924 if (ex.X_op != O_constant)
1925 errmsg = _("constant expression expected");
1926
1927 extra_data_after_insn = TRUE;
1928 extra_data_len = 4;
1929 extra_data = ex.X_add_number;
1930 ex.X_add_number = 0;
1931 }
1932 else if (register_name (&ex)
1933 && (operand->flags & V850_OPERAND_REG) == 0)
1934 {
1935 char c;
1936 int exists = 0;
1937
1938 /* It is possible that an alias has been defined that
1939 matches a register name. For example the code may
1940 include a ".set ZERO, 0" directive, which matches
1941 the register name "zero". Attempt to reparse the
1942 field as an expression, and only complain if we
1943 cannot generate a constant. */
1944
1945 input_line_pointer = str;
1946
1947 c = get_symbol_end ();
1948
1949 if (symbol_find (str) != NULL)
1950 exists = 1;
1951
1952 *input_line_pointer = c;
1953 input_line_pointer = str;
1954
1955 expression (&ex);
1956
1957 if (ex.X_op != O_constant)
1958 {
1959 /* If this register is actually occurring too early on
1960 the parsing of the instruction, (because another
1961 field is missing) then report this. */
1962 if (opindex_ptr[1] != 0
1963 && (v850_operands[opindex_ptr[1]].flags
1964 & V850_OPERAND_REG))
1965 errmsg = _("syntax error: value is missing before the register name");
1966 else
1967 errmsg = _("syntax error: register not expected");
1968
1969 /* If we created a symbol in the process of this
1970 test then delete it now, so that it will not
1971 be output with the real symbols... */
1972 if (exists == 0
1973 && ex.X_op == O_symbol)
1974 symbol_remove (ex.X_add_symbol,
1975 &symbol_rootP, &symbol_lastP);
1976 }
1977 }
1978 else if (system_register_name (&ex, FALSE, FALSE)
1979 && (operand->flags & V850_OPERAND_SRG) == 0)
1980 {
1981 errmsg = _("syntax error: system register not expected");
1982 }
1983 else if (cc_name (&ex)
1984 && (operand->flags & V850_OPERAND_CC) == 0)
1985 {
1986 errmsg = _("syntax error: condition code not expected");
1987 }
1988 else
1989 {
1990 expression (&ex);
1991 /* Special case:
1992 If we are assembling a MOV instruction and the immediate
1993 value does not fit into the bits available then create a
1994 fake error so that the next MOV instruction will be
1995 selected. This one has a 32 bit immediate field. */
1996
1997 if (((insn & 0x07e0) == 0x0200)
1998 && operand->bits == 5 /* Do not match the CALLT instruction. */
1999 && ex.X_op == O_constant
2000 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
2001 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
2002 errmsg = _("immediate operand is too large");
2003 }
2004
2005 if (errmsg)
2006 goto error;
2007
2008 #if 0
2009 fprintf (stderr,
2010 " insn: %x, operand %d, op: %d, add_number: %d\n",
2011 insn, opindex_ptr - opcode->operands,
2012 ex.X_op, ex.X_add_number);
2013 #endif
2014
2015 switch (ex.X_op)
2016 {
2017 case O_illegal:
2018 errmsg = _("illegal operand");
2019 goto error;
2020 case O_absent:
2021 errmsg = _("missing operand");
2022 goto error;
2023 case O_register:
2024 if ((operand->flags
2025 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
2026 {
2027 errmsg = _("invalid operand");
2028 goto error;
2029 }
2030 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2031 (char *) NULL, 0,
2032 copy_of_instruction);
2033 break;
2034
2035 case O_constant:
2036 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2037 (char *) NULL, 0,
2038 copy_of_instruction);
2039 break;
2040
2041 default:
2042 /* We need to generate a fixup for this expression. */
2043 if (fc >= MAX_INSN_FIXUPS)
2044 as_fatal (_("too many fixups"));
2045
2046 fixups[fc].exp = ex;
2047 fixups[fc].opindex = *opindex_ptr;
2048 fixups[fc].reloc = BFD_RELOC_UNUSED;
2049 ++fc;
2050 break;
2051 }
2052 }
2053
2054 str = input_line_pointer;
2055 input_line_pointer = hold;
2056
2057 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2058 || *str == ')')
2059 ++str;
2060 }
2061 match = 1;
2062
2063 error:
2064 if (match == 0)
2065 {
2066 next_opcode = opcode + 1;
2067 if (next_opcode->name != NULL
2068 && strcmp (next_opcode->name, opcode->name) == 0)
2069 {
2070 opcode = next_opcode;
2071
2072 /* Skip versions that are not supported by the target
2073 processor. */
2074 if ((opcode->processors & processor_mask) == 0)
2075 goto error;
2076
2077 continue;
2078 }
2079
2080 as_bad ("%s: %s", copy_of_instruction, errmsg);
2081
2082 if (*input_line_pointer == ']')
2083 ++input_line_pointer;
2084
2085 ignore_rest_of_line ();
2086 input_line_pointer = saved_input_line_pointer;
2087 return;
2088 }
2089 break;
2090 }
2091
2092 while (ISSPACE (*str))
2093 ++str;
2094
2095 if (*str != '\0')
2096 /* xgettext:c-format */
2097 as_bad (_("junk at end of line: `%s'"), str);
2098
2099 input_line_pointer = str;
2100
2101 /* Tie dwarf2 debug info to the address at the start of the insn.
2102 We can't do this after the insn has been output as the current
2103 frag may have been closed off. eg. by frag_var. */
2104 dwarf2_emit_insn (0);
2105
2106 /* Write out the instruction. */
2107
2108 if (relaxable && fc > 0)
2109 {
2110 insn_size = 2;
2111 fc = 0;
2112
2113 if (!strcmp (opcode->name, "br"))
2114 {
2115 f = frag_var (rs_machine_dependent, 4, 2, 2,
2116 fixups[0].exp.X_add_symbol,
2117 fixups[0].exp.X_add_number,
2118 (char *) fixups[0].opindex);
2119 md_number_to_chars (f, insn, insn_size);
2120 md_number_to_chars (f + 2, 0, 2);
2121 }
2122 else
2123 {
2124 f = frag_var (rs_machine_dependent, 6, 4, 0,
2125 fixups[0].exp.X_add_symbol,
2126 fixups[0].exp.X_add_number,
2127 (char *) fixups[0].opindex);
2128 md_number_to_chars (f, insn, insn_size);
2129 md_number_to_chars (f + 2, 0, 4);
2130 }
2131 }
2132 else
2133 {
2134 /* Four byte insns have an opcode with the two high bits on. */
2135 if ((insn & 0x0600) == 0x0600)
2136 insn_size = 4;
2137 else
2138 insn_size = 2;
2139
2140 /* Special case: 32 bit MOV. */
2141 if ((insn & 0xffe0) == 0x0620)
2142 insn_size = 2;
2143
2144 f = frag_more (insn_size);
2145 md_number_to_chars (f, insn, insn_size);
2146
2147 if (extra_data_after_insn)
2148 {
2149 f = frag_more (extra_data_len);
2150 md_number_to_chars (f, extra_data, extra_data_len);
2151
2152 extra_data_after_insn = FALSE;
2153 }
2154 }
2155
2156 /* Create any fixups. At this point we do not use a
2157 bfd_reloc_code_real_type, but instead just use the
2158 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2159 handle fixups for any operand type, although that is admittedly
2160 not a very exciting feature. We pick a BFD reloc type in
2161 md_apply_fix3. */
2162 for (i = 0; i < fc; i++)
2163 {
2164 const struct v850_operand *operand;
2165 bfd_reloc_code_real_type reloc;
2166
2167 operand = &v850_operands[fixups[i].opindex];
2168
2169 reloc = fixups[i].reloc;
2170
2171 if (reloc != BFD_RELOC_UNUSED)
2172 {
2173 reloc_howto_type *reloc_howto =
2174 bfd_reloc_type_lookup (stdoutput, reloc);
2175 int size;
2176 int address;
2177 fixS *fixP;
2178
2179 if (!reloc_howto)
2180 abort ();
2181
2182 size = bfd_get_reloc_size (reloc_howto);
2183
2184 /* XXX This will abort on an R_V850_8 reloc -
2185 is this reloc actually used? */
2186 if (size != 2 && size != 4)
2187 abort ();
2188
2189 address = (f - frag_now->fr_literal) + insn_size - size;
2190
2191 if (reloc == BFD_RELOC_32)
2192 address += 2;
2193
2194 fixP = fix_new_exp (frag_now, address, size,
2195 &fixups[i].exp,
2196 reloc_howto->pc_relative,
2197 reloc);
2198
2199 switch (reloc)
2200 {
2201 case BFD_RELOC_LO16:
2202 case BFD_RELOC_HI16:
2203 case BFD_RELOC_HI16_S:
2204 fixP->fx_no_overflow = 1;
2205 break;
2206 default:
2207 break;
2208 }
2209 }
2210 else
2211 {
2212 fix_new_exp (frag_now,
2213 f - frag_now->fr_literal, 4,
2214 & fixups[i].exp,
2215 (operand->flags & V850_OPERAND_DISP) != 0,
2216 (bfd_reloc_code_real_type) (fixups[i].opindex
2217 + (int) BFD_RELOC_UNUSED));
2218 }
2219 }
2220
2221 input_line_pointer = saved_input_line_pointer;
2222 }
2223
2224 /* If while processing a fixup, a reloc really needs to be created
2225 then it is done here. */
2226
2227 arelent *
2228 tc_gen_reloc (seg, fixp)
2229 asection *seg ATTRIBUTE_UNUSED;
2230 fixS *fixp;
2231 {
2232 arelent *reloc;
2233
2234 reloc = (arelent *) xmalloc (sizeof (arelent));
2235 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2236 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2237 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2238
2239 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2240 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2241 || fixp->fx_r_type == BFD_RELOC_V850_LONGCALL
2242 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP
2243 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN)
2244 reloc->addend = fixp->fx_offset;
2245 else
2246 {
2247 if (fixp->fx_r_type == BFD_RELOC_32
2248 && fixp->fx_pcrel)
2249 fixp->fx_r_type = BFD_RELOC_32_PCREL;
2250
2251 reloc->addend = fixp->fx_addnumber;
2252 }
2253
2254 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2255
2256 if (reloc->howto == (reloc_howto_type *) NULL)
2257 {
2258 as_bad_where (fixp->fx_file, fixp->fx_line,
2259 /* xgettext:c-format */
2260 _("reloc %d not supported by object file format"),
2261 (int) fixp->fx_r_type);
2262
2263 xfree (reloc);
2264
2265 return NULL;
2266 }
2267
2268 return reloc;
2269 }
2270
2271 void
2272 v850_handle_align (frag)
2273 fragS * frag;
2274 {
2275 if (v850_relax
2276 && frag->fr_type == rs_align
2277 && frag->fr_address + frag->fr_fix > 0
2278 && frag->fr_offset > 1
2279 && now_seg != bss_section
2280 && now_seg != v850_seg_table[SBSS_SECTION].s
2281 && now_seg != v850_seg_table[TBSS_SECTION].s
2282 && now_seg != v850_seg_table[ZBSS_SECTION].s)
2283 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
2284 BFD_RELOC_V850_ALIGN);
2285 }
2286
2287 /* Return current size of variable part of frag. */
2288
2289 int
2290 md_estimate_size_before_relax (fragp, seg)
2291 fragS *fragp;
2292 asection *seg ATTRIBUTE_UNUSED;
2293 {
2294 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2295 abort ();
2296
2297 return md_relax_table[fragp->fr_subtype].rlx_length;
2298 }
2299
2300 long
2301 v850_pcrel_from_section (fixp, section)
2302 fixS *fixp;
2303 segT section;
2304 {
2305 /* If the symbol is undefined, or in a section other than our own,
2306 or it is weak (in which case it may well be in another section,
2307 then let the linker figure it out. */
2308 if (fixp->fx_addsy != (symbolS *) NULL
2309 && (! S_IS_DEFINED (fixp->fx_addsy)
2310 || S_IS_WEAK (fixp->fx_addsy)
2311 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2312 return 0;
2313
2314 return fixp->fx_frag->fr_address + fixp->fx_where;
2315 }
2316
2317 void
2318 md_apply_fix3 (fixP, valueP, seg)
2319 fixS *fixP;
2320 valueT *valueP;
2321 segT seg ATTRIBUTE_UNUSED;
2322 {
2323 valueT value = * valueP;
2324 char *where;
2325
2326 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2327 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2328 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP
2329 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2330 {
2331 fixP->fx_done = 0;
2332 return;
2333 }
2334
2335 if (fixP->fx_addsy == (symbolS *) NULL)
2336 fixP->fx_addnumber = value,
2337 fixP->fx_done = 1;
2338
2339 else if (fixP->fx_pcrel)
2340 fixP->fx_addnumber = fixP->fx_offset;
2341
2342 else
2343 {
2344 value = fixP->fx_offset;
2345 if (fixP->fx_subsy != (symbolS *) NULL)
2346 {
2347 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2348 value -= S_GET_VALUE (fixP->fx_subsy);
2349 else
2350 {
2351 /* We don't actually support subtracting a symbol. */
2352 as_bad_where (fixP->fx_file, fixP->fx_line,
2353 _("expression too complex"));
2354 }
2355 }
2356 fixP->fx_addnumber = value;
2357 }
2358
2359 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
2360 {
2361 int opindex;
2362 const struct v850_operand *operand;
2363 unsigned long insn;
2364
2365 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
2366 operand = &v850_operands[opindex];
2367
2368 /* Fetch the instruction, insert the fully resolved operand
2369 value, and stuff the instruction back again.
2370
2371 Note the instruction has been stored in little endian
2372 format! */
2373 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2374
2375 insn = bfd_getl32 ((unsigned char *) where);
2376 insn = v850_insert_operand (insn, operand, (offsetT) value,
2377 fixP->fx_file, fixP->fx_line, NULL);
2378 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2379
2380 if (fixP->fx_done)
2381 /* Nothing else to do here. */
2382 return;
2383
2384 /* Determine a BFD reloc value based on the operand information.
2385 We are only prepared to turn a few of the operands into relocs. */
2386
2387 if (operand->bits == 22)
2388 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
2389 else if (operand->bits == 9)
2390 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
2391 else
2392 {
2393 #if 0
2394 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2395 #endif
2396
2397 as_bad_where (fixP->fx_file, fixP->fx_line,
2398 _("unresolved expression that must be resolved"));
2399 fixP->fx_done = 1;
2400 return;
2401 }
2402 }
2403 else if (fixP->fx_done)
2404 {
2405 /* We still have to insert the value into memory! */
2406 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2407
2408 if (fixP->fx_size == 1)
2409 *where = value & 0xff;
2410 else if (fixP->fx_size == 2)
2411 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2412 else if (fixP->fx_size == 4)
2413 bfd_putl32 (value, (unsigned char *) where);
2414 }
2415 }
2416 \f
2417 /* Parse a cons expression. We have to handle hi(), lo(), etc
2418 on the v850. */
2419
2420 void
2421 parse_cons_expression_v850 (exp)
2422 expressionS *exp;
2423 {
2424 /* See if there's a reloc prefix like hi() we have to handle. */
2425 hold_cons_reloc = v850_reloc_prefix (NULL);
2426
2427 /* Do normal expression parsing. */
2428 expression (exp);
2429 }
2430
2431 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2432 found a reloc prefix, then we use that reloc, else we choose an
2433 appropriate one based on the size of the expression. */
2434
2435 void
2436 cons_fix_new_v850 (frag, where, size, exp)
2437 fragS *frag;
2438 int where;
2439 int size;
2440 expressionS *exp;
2441 {
2442 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2443 {
2444 if (size == 4)
2445 hold_cons_reloc = BFD_RELOC_32;
2446 if (size == 2)
2447 hold_cons_reloc = BFD_RELOC_16;
2448 if (size == 1)
2449 hold_cons_reloc = BFD_RELOC_8;
2450 }
2451
2452 if (exp != NULL)
2453 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2454 else
2455 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2456
2457 hold_cons_reloc = BFD_RELOC_UNUSED;
2458 }
2459
2460 bfd_boolean
2461 v850_fix_adjustable (fixP)
2462 fixS *fixP;
2463 {
2464 if (fixP->fx_addsy == NULL)
2465 return 1;
2466
2467 /* Don't adjust function names. */
2468 if (S_IS_FUNCTION (fixP->fx_addsy))
2469 return 0;
2470
2471 /* We need the symbol name for the VTABLE entries. */
2472 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2473 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2474 return 0;
2475
2476 return 1;
2477 }
2478
2479 int
2480 v850_force_relocation (fixP)
2481 struct fix *fixP;
2482 {
2483 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2484 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP)
2485 return 1;
2486
2487 if (v850_relax
2488 && (fixP->fx_pcrel
2489 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN
2490 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL
2491 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL
2492 || fixP->fx_r_type >= BFD_RELOC_UNUSED))
2493 return 1;
2494
2495 return generic_force_reloc (fixP);
2496 }
GDB Binutils - Deliverables
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