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* symbols.c (S_FORCE_RELOC): Add "strict" param.
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include <stdio.h>
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "opcode/v850.h"
27 #include "dwarf2dbg.h"
28
29 /* Sign-extend a 16-bit number. */
30 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
31
32 /* Temporarily holds the reloc in a cons expression. */
33 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
34
35 /* Set to TRUE if we want to be pedantic about signed overflows. */
36 static bfd_boolean warn_signed_overflows = FALSE;
37 static bfd_boolean warn_unsigned_overflows = FALSE;
38
39 /* Indicates the target BFD machine number. */
40 static int machine = -1;
41
42 /* Indicates the target processor(s) for the assemble. */
43 static int processor_mask = -1;
44 \f
45 /* Structure to hold information about predefined registers. */
46 struct reg_name {
47 const char *name;
48 int value;
49 };
50
51 /* Generic assembler global variables which must be defined by all
52 targets. */
53
54 /* Characters which always start a comment. */
55 const char comment_chars[] = "#";
56
57 /* Characters which start a comment at the beginning of a line. */
58 const char line_comment_chars[] = ";#";
59
60 /* Characters which may be used to separate multiple commands on a
61 single line. */
62 const char line_separator_chars[] = ";";
63
64 /* Characters which are used to indicate an exponent in a floating
65 point number. */
66 const char EXP_CHARS[] = "eE";
67
68 /* Characters which mean that a number is a floating point constant,
69 as in 0d1.0. */
70 const char FLT_CHARS[] = "dD";
71 \f
72 const relax_typeS md_relax_table[] = {
73 /* Conditional branches. */
74 {0xff, -0x100, 2, 1},
75 {0x1fffff, -0x200000, 6, 0},
76 /* Unconditional branches. */
77 {0xff, -0x100, 2, 3},
78 {0x1fffff, -0x200000, 4, 0},
79 };
80
81 static int v850_relax = 0;
82
83 /* Fixups. */
84 #define MAX_INSN_FIXUPS (5)
85 struct v850_fixup {
86 expressionS exp;
87 int opindex;
88 bfd_reloc_code_real_type reloc;
89 };
90
91 struct v850_fixup fixups[MAX_INSN_FIXUPS];
92 static int fc;
93
94 struct v850_seg_entry
95 {
96 segT s;
97 const char *name;
98 flagword flags;
99 };
100
101 struct v850_seg_entry v850_seg_table[] =
102 {
103 { NULL, ".sdata",
104 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
105 | SEC_SMALL_DATA },
106 { NULL, ".tdata",
107 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
108 { NULL, ".zdata",
109 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
110 { NULL, ".sbss",
111 SEC_ALLOC | SEC_SMALL_DATA },
112 { NULL, ".tbss",
113 SEC_ALLOC },
114 { NULL, ".zbss",
115 SEC_ALLOC},
116 { NULL, ".rosdata",
117 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
118 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
119 { NULL, ".rozdata",
120 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
121 | SEC_HAS_CONTENTS },
122 { NULL, ".scommon",
123 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
124 | SEC_SMALL_DATA | SEC_IS_COMMON },
125 { NULL, ".tcommon",
126 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
127 | SEC_IS_COMMON },
128 { NULL, ".zcommon",
129 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
130 | SEC_IS_COMMON },
131 { NULL, ".call_table_data",
132 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
133 { NULL, ".call_table_text",
134 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
135 | SEC_HAS_CONTENTS},
136 { NULL, ".bss",
137 SEC_ALLOC }
138 };
139
140 #define SDATA_SECTION 0
141 #define TDATA_SECTION 1
142 #define ZDATA_SECTION 2
143 #define SBSS_SECTION 3
144 #define TBSS_SECTION 4
145 #define ZBSS_SECTION 5
146 #define ROSDATA_SECTION 6
147 #define ROZDATA_SECTION 7
148 #define SCOMMON_SECTION 8
149 #define TCOMMON_SECTION 9
150 #define ZCOMMON_SECTION 10
151 #define CALL_TABLE_DATA_SECTION 11
152 #define CALL_TABLE_TEXT_SECTION 12
153 #define BSS_SECTION 13
154
155 static void do_v850_seg PARAMS ((int, subsegT));
156
157 static void
158 do_v850_seg (i, sub)
159 int i;
160 subsegT sub;
161 {
162 struct v850_seg_entry *seg = v850_seg_table + i;
163
164 obj_elf_section_change_hook ();
165 if (seg->s != NULL)
166 {
167 subseg_set (seg->s, sub);
168 }
169 else
170 {
171 seg->s = subseg_new (seg->name, sub);
172 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
173 if ((seg->flags & SEC_LOAD) == 0)
174 seg_info (seg->s)->bss = 1;
175 }
176 }
177
178 static void v850_seg PARAMS ((int i));
179
180 static void
181 v850_seg (i)
182 int i;
183 {
184 subsegT sub = get_absolute_expression ();
185
186 do_v850_seg (i, sub);
187 demand_empty_rest_of_line ();
188 }
189
190 static void v850_offset PARAMS ((int));
191
192 static void
193 v850_offset (ignore)
194 int ignore ATTRIBUTE_UNUSED;
195 {
196 char *pfrag;
197 int temp = get_absolute_expression ();
198
199 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
200 (offsetT) temp, (char *) 0);
201 *pfrag = 0;
202
203 demand_empty_rest_of_line ();
204 }
205
206 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
207
208 static void v850_comm PARAMS ((int));
209
210 static void
211 v850_comm (area)
212 int area;
213 {
214 char *name;
215 char c;
216 char *p;
217 int temp;
218 unsigned int size;
219 symbolS *symbolP;
220 int have_align;
221
222 name = input_line_pointer;
223 c = get_symbol_end ();
224
225 /* Just after name is now '\0'. */
226 p = input_line_pointer;
227 *p = c;
228
229 SKIP_WHITESPACE ();
230
231 if (*input_line_pointer != ',')
232 {
233 as_bad (_("Expected comma after symbol-name"));
234 ignore_rest_of_line ();
235 return;
236 }
237
238 /* Skip ','. */
239 input_line_pointer++;
240
241 if ((temp = get_absolute_expression ()) < 0)
242 {
243 /* xgettext:c-format */
244 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
245 ignore_rest_of_line ();
246 return;
247 }
248
249 size = temp;
250 *p = 0;
251 symbolP = symbol_find_or_make (name);
252 *p = c;
253
254 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
255 {
256 as_bad (_("Ignoring attempt to re-define symbol"));
257 ignore_rest_of_line ();
258 return;
259 }
260
261 if (S_GET_VALUE (symbolP) != 0)
262 {
263 if (S_GET_VALUE (symbolP) != size)
264 {
265 /* xgettext:c-format */
266 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
267 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
268 }
269 }
270
271 know (symbol_get_frag (symbolP) == &zero_address_frag);
272
273 if (*input_line_pointer != ',')
274 have_align = 0;
275 else
276 {
277 have_align = 1;
278 input_line_pointer++;
279 SKIP_WHITESPACE ();
280 }
281
282 if (! have_align || *input_line_pointer != '"')
283 {
284 if (! have_align)
285 temp = 0;
286 else
287 {
288 temp = get_absolute_expression ();
289
290 if (temp < 0)
291 {
292 temp = 0;
293 as_warn (_("Common alignment negative; 0 assumed"));
294 }
295 }
296
297 if (symbol_get_obj (symbolP)->local)
298 {
299 segT old_sec;
300 int old_subsec;
301 char *pfrag;
302 int align;
303 flagword applicable;
304
305 old_sec = now_seg;
306 old_subsec = now_subseg;
307
308 applicable = bfd_applicable_section_flags (stdoutput);
309
310 applicable &= SEC_ALLOC;
311
312 switch (area)
313 {
314 case SCOMMON_SECTION:
315 do_v850_seg (SBSS_SECTION, 0);
316 break;
317
318 case ZCOMMON_SECTION:
319 do_v850_seg (ZBSS_SECTION, 0);
320 break;
321
322 case TCOMMON_SECTION:
323 do_v850_seg (TBSS_SECTION, 0);
324 break;
325 }
326
327 if (temp)
328 {
329 /* Convert to a power of 2 alignment. */
330 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
331 ;
332
333 if (temp != 1)
334 {
335 as_bad (_("Common alignment not a power of 2"));
336 ignore_rest_of_line ();
337 return;
338 }
339 }
340 else
341 align = 0;
342
343 record_alignment (now_seg, align);
344
345 if (align)
346 frag_align (align, 0, 0);
347
348 switch (area)
349 {
350 case SCOMMON_SECTION:
351 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
352 symbol_get_frag (symbolP)->fr_symbol = 0;
353 break;
354
355 case ZCOMMON_SECTION:
356 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
357 symbol_get_frag (symbolP)->fr_symbol = 0;
358 break;
359
360 case TCOMMON_SECTION:
361 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
362 symbol_get_frag (symbolP)->fr_symbol = 0;
363 break;
364
365 default:
366 abort ();
367 }
368
369 symbol_set_frag (symbolP, frag_now);
370 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
371 (offsetT) size, (char *) 0);
372 *pfrag = 0;
373 S_SET_SIZE (symbolP, size);
374
375 switch (area)
376 {
377 case SCOMMON_SECTION:
378 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
379 break;
380
381 case ZCOMMON_SECTION:
382 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
383 break;
384
385 case TCOMMON_SECTION:
386 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
387 break;
388
389 default:
390 abort ();
391 }
392
393 S_CLEAR_EXTERNAL (symbolP);
394 obj_elf_section_change_hook ();
395 subseg_set (old_sec, old_subsec);
396 }
397 else
398 {
399 segT old_sec;
400 int old_subsec;
401
402 allocate_common:
403 old_sec = now_seg;
404 old_subsec = now_subseg;
405
406 S_SET_VALUE (symbolP, (valueT) size);
407 S_SET_ALIGN (symbolP, temp);
408 S_SET_EXTERNAL (symbolP);
409
410 switch (area)
411 {
412 case SCOMMON_SECTION:
413 case ZCOMMON_SECTION:
414 case TCOMMON_SECTION:
415 do_v850_seg (area, 0);
416 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
417 break;
418
419 default:
420 abort ();
421 }
422
423 obj_elf_section_change_hook ();
424 subseg_set (old_sec, old_subsec);
425 }
426 }
427 else
428 {
429 input_line_pointer++;
430
431 /* @@ Some use the dot, some don't. Can we get some consistency?? */
432 if (*input_line_pointer == '.')
433 input_line_pointer++;
434
435 /* @@ Some say data, some say bss. */
436 if (strncmp (input_line_pointer, "bss\"", 4)
437 && strncmp (input_line_pointer, "data\"", 5))
438 {
439 while (*--input_line_pointer != '"')
440 ;
441 input_line_pointer--;
442 goto bad_common_segment;
443 }
444 while (*input_line_pointer++ != '"')
445 ;
446 goto allocate_common;
447 }
448
449 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
450
451 demand_empty_rest_of_line ();
452 return;
453
454 {
455 bad_common_segment:
456 p = input_line_pointer;
457 while (*p && *p != '\n')
458 p++;
459 c = *p;
460 *p = '\0';
461 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
462 *p = c;
463 input_line_pointer = p;
464 ignore_rest_of_line ();
465 return;
466 }
467 }
468
469 static void set_machine PARAMS ((int));
470
471 static void
472 set_machine (number)
473 int number;
474 {
475 machine = number;
476 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
477
478 switch (machine)
479 {
480 case 0: processor_mask = PROCESSOR_V850; break;
481 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
482 }
483 }
484
485 static void v850_longcode PARAMS ((int));
486
487 static void
488 v850_longcode (type)
489 int type;
490 {
491 expressionS ex;
492
493 if (! v850_relax)
494 {
495 if (type == 1)
496 as_warn (".longcall pseudo-op seen when not relaxing");
497 else
498 as_warn (".longjump pseudo-op seen when not relaxing");
499 }
500
501 expression (&ex);
502
503 if (ex.X_op != O_symbol || ex.X_add_number != 0)
504 {
505 as_bad ("bad .longcall format");
506 ignore_rest_of_line ();
507
508 return;
509 }
510
511 if (type == 1)
512 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
513 BFD_RELOC_V850_LONGCALL);
514 else
515 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
516 BFD_RELOC_V850_LONGJUMP);
517
518 demand_empty_rest_of_line ();
519 }
520
521 /* The target specific pseudo-ops which we support. */
522 const pseudo_typeS md_pseudo_table[] = {
523 { "sdata", v850_seg, SDATA_SECTION },
524 { "tdata", v850_seg, TDATA_SECTION },
525 { "zdata", v850_seg, ZDATA_SECTION },
526 { "sbss", v850_seg, SBSS_SECTION },
527 { "tbss", v850_seg, TBSS_SECTION },
528 { "zbss", v850_seg, ZBSS_SECTION },
529 { "rosdata", v850_seg, ROSDATA_SECTION },
530 { "rozdata", v850_seg, ROZDATA_SECTION },
531 { "bss", v850_seg, BSS_SECTION },
532 { "offset", v850_offset, 0 },
533 { "word", cons, 4 },
534 { "zcomm", v850_comm, ZCOMMON_SECTION },
535 { "scomm", v850_comm, SCOMMON_SECTION },
536 { "tcomm", v850_comm, TCOMMON_SECTION },
537 { "v850", set_machine, 0 },
538 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
539 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
540 { "v850e", set_machine, bfd_mach_v850e },
541 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
542 { "loc", dwarf2_directive_loc, 0 },
543 { "longcall", v850_longcode, 1 },
544 { "longjump", v850_longcode, 2 },
545 { NULL, NULL, 0 }
546 };
547
548 /* Opcode hash table. */
549 static struct hash_control *v850_hash;
550
551 /* This table is sorted. Suitable for searching by a binary search. */
552 static const struct reg_name pre_defined_registers[] = {
553 { "ep", 30 }, /* ep - element ptr */
554 { "gp", 4 }, /* gp - global ptr */
555 { "hp", 2 }, /* hp - handler stack ptr */
556 { "lp", 31 }, /* lp - link ptr */
557 { "r0", 0 },
558 { "r1", 1 },
559 { "r10", 10 },
560 { "r11", 11 },
561 { "r12", 12 },
562 { "r13", 13 },
563 { "r14", 14 },
564 { "r15", 15 },
565 { "r16", 16 },
566 { "r17", 17 },
567 { "r18", 18 },
568 { "r19", 19 },
569 { "r2", 2 },
570 { "r20", 20 },
571 { "r21", 21 },
572 { "r22", 22 },
573 { "r23", 23 },
574 { "r24", 24 },
575 { "r25", 25 },
576 { "r26", 26 },
577 { "r27", 27 },
578 { "r28", 28 },
579 { "r29", 29 },
580 { "r3", 3 },
581 { "r30", 30 },
582 { "r31", 31 },
583 { "r4", 4 },
584 { "r5", 5 },
585 { "r6", 6 },
586 { "r7", 7 },
587 { "r8", 8 },
588 { "r9", 9 },
589 { "sp", 3 }, /* sp - stack ptr */
590 { "tp", 5 }, /* tp - text ptr */
591 { "zero", 0 },
592 };
593
594 #define REG_NAME_CNT \
595 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
596
597 static const struct reg_name system_registers[] = {
598 { "ctbp", 20 },
599 { "ctpc", 16 },
600 { "ctpsw", 17 },
601 { "dbpc", 18 },
602 { "dbpsw", 19 },
603 { "ecr", 4 },
604 { "eipc", 0 },
605 { "eipsw", 1 },
606 { "fepc", 2 },
607 { "fepsw", 3 },
608 { "psw", 5 },
609 };
610
611 #define SYSREG_NAME_CNT \
612 (sizeof (system_registers) / sizeof (struct reg_name))
613
614 static const struct reg_name system_list_registers[] = {
615 {"PS", 5 },
616 {"SR", 0 + 1}
617 };
618
619 #define SYSREGLIST_NAME_CNT \
620 (sizeof (system_list_registers) / sizeof (struct reg_name))
621
622 static const struct reg_name cc_names[] = {
623 { "c", 0x1 },
624 { "e", 0x2 },
625 { "ge", 0xe },
626 { "gt", 0xf },
627 { "h", 0xb },
628 { "l", 0x1 },
629 { "le", 0x7 },
630 { "lt", 0x6 },
631 { "n", 0x4 },
632 { "nc", 0x9 },
633 { "ne", 0xa },
634 { "nh", 0x3 },
635 { "nl", 0x9 },
636 { "ns", 0xc },
637 { "nv", 0x8 },
638 { "nz", 0xa },
639 { "p", 0xc },
640 { "s", 0x4 },
641 { "sa", 0xd },
642 { "t", 0x5 },
643 { "v", 0x0 },
644 { "z", 0x2 },
645 };
646
647 #define CC_NAME_CNT \
648 (sizeof (cc_names) / sizeof (struct reg_name))
649
650 /* Do a binary search of the given register table to see if NAME is a
651 valid regiter name. Return the register number from the array on
652 success, or -1 on failure. */
653
654 static int reg_name_search
655 PARAMS ((const struct reg_name *, int, const char *, bfd_boolean));
656
657 static int
658 reg_name_search (regs, regcount, name, accept_numbers)
659 const struct reg_name *regs;
660 int regcount;
661 const char *name;
662 bfd_boolean accept_numbers;
663 {
664 int middle, low, high;
665 int cmp;
666 symbolS *symbolP;
667
668 /* If the register name is a symbol, then evaluate it. */
669 if ((symbolP = symbol_find (name)) != NULL)
670 {
671 /* If the symbol is an alias for another name then use that.
672 If the symbol is an alias for a number, then return the number. */
673 if (symbol_equated_p (symbolP))
674 {
675 name
676 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
677 }
678 else if (accept_numbers)
679 {
680 int reg = S_GET_VALUE (symbolP);
681
682 if (reg >= 0 && reg <= 31)
683 return reg;
684 }
685
686 /* Otherwise drop through and try parsing name normally. */
687 }
688
689 low = 0;
690 high = regcount - 1;
691
692 do
693 {
694 middle = (low + high) / 2;
695 cmp = strcasecmp (name, regs[middle].name);
696 if (cmp < 0)
697 high = middle - 1;
698 else if (cmp > 0)
699 low = middle + 1;
700 else
701 return regs[middle].value;
702 }
703 while (low <= high);
704 return -1;
705 }
706
707 /* Summary of register_name().
708 *
709 * in: Input_line_pointer points to 1st char of operand.
710 *
711 * out: An expressionS.
712 * The operand may have been a register: in this case, X_op == O_register,
713 * X_add_number is set to the register number, and truth is returned.
714 * Input_line_pointer->(next non-blank) char after operand, or is in
715 * its original state. */
716
717 static bfd_boolean register_name PARAMS ((expressionS *));
718
719 static bfd_boolean
720 register_name (expressionP)
721 expressionS *expressionP;
722 {
723 int reg_number;
724 char *name;
725 char *start;
726 char c;
727
728 /* Find the spelling of the operand. */
729 start = name = input_line_pointer;
730
731 c = get_symbol_end ();
732
733 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
734 name, FALSE);
735
736 /* Put back the delimiting char. */
737 *input_line_pointer = c;
738
739 /* Look to see if it's in the register table. */
740 if (reg_number >= 0)
741 {
742 expressionP->X_op = O_register;
743 expressionP->X_add_number = reg_number;
744
745 /* Make the rest nice. */
746 expressionP->X_add_symbol = NULL;
747 expressionP->X_op_symbol = NULL;
748
749 return TRUE;
750 }
751 else
752 {
753 /* Reset the line as if we had not done anything. */
754 input_line_pointer = start;
755
756 return FALSE;
757 }
758 }
759
760 /* Summary of system_register_name().
761 *
762 * in: INPUT_LINE_POINTER points to 1st char of operand.
763 * EXPRESSIONP points to an expression structure to be filled in.
764 * ACCEPT_NUMBERS is true iff numerical register names may be used.
765 * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
766 * accepted.
767 *
768 * out: An expressionS structure in expressionP.
769 * The operand may have been a register: in this case, X_op == O_register,
770 * X_add_number is set to the register number, and truth is returned.
771 * Input_line_pointer->(next non-blank) char after operand, or is in
772 * its original state. */
773
774 static bfd_boolean system_register_name
775 PARAMS ((expressionS *, bfd_boolean, bfd_boolean));
776
777 static bfd_boolean
778 system_register_name (expressionP, accept_numbers, accept_list_names)
779 expressionS *expressionP;
780 bfd_boolean accept_numbers;
781 bfd_boolean accept_list_names;
782 {
783 int reg_number;
784 char *name;
785 char *start;
786 char c;
787
788 /* Find the spelling of the operand. */
789 start = name = input_line_pointer;
790
791 c = get_symbol_end ();
792 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
793 accept_numbers);
794
795 /* Put back the delimiting char. */
796 *input_line_pointer = c;
797
798 if (reg_number < 0
799 && accept_numbers)
800 {
801 /* Reset input_line pointer. */
802 input_line_pointer = start;
803
804 if (ISDIGIT (*input_line_pointer))
805 {
806 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
807
808 /* Make sure that the register number is allowable. */
809 if (reg_number < 0
810 || (reg_number > 5 && reg_number < 16)
811 || reg_number > 20)
812 {
813 reg_number = -1;
814 }
815 }
816 else if (accept_list_names)
817 {
818 c = get_symbol_end ();
819 reg_number = reg_name_search (system_list_registers,
820 SYSREGLIST_NAME_CNT, name, FALSE);
821
822 /* Put back the delimiting char. */
823 *input_line_pointer = c;
824 }
825 }
826
827 /* Look to see if it's in the register table. */
828 if (reg_number >= 0)
829 {
830 expressionP->X_op = O_register;
831 expressionP->X_add_number = reg_number;
832
833 /* Make the rest nice. */
834 expressionP->X_add_symbol = NULL;
835 expressionP->X_op_symbol = NULL;
836
837 return TRUE;
838 }
839 else
840 {
841 /* Reset the line as if we had not done anything. */
842 input_line_pointer = start;
843
844 return FALSE;
845 }
846 }
847
848 /* Summary of cc_name().
849 *
850 * in: INPUT_LINE_POINTER points to 1st char of operand.
851 *
852 * out: An expressionS.
853 * The operand may have been a register: in this case, X_op == O_register,
854 * X_add_number is set to the register number, and truth is returned.
855 * Input_line_pointer->(next non-blank) char after operand, or is in
856 * its original state. */
857
858 static bfd_boolean cc_name PARAMS ((expressionS *));
859
860 static bfd_boolean
861 cc_name (expressionP)
862 expressionS *expressionP;
863 {
864 int reg_number;
865 char *name;
866 char *start;
867 char c;
868
869 /* Find the spelling of the operand. */
870 start = name = input_line_pointer;
871
872 c = get_symbol_end ();
873 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
874
875 /* Put back the delimiting char. */
876 *input_line_pointer = c;
877
878 /* Look to see if it's in the register table. */
879 if (reg_number >= 0)
880 {
881 expressionP->X_op = O_constant;
882 expressionP->X_add_number = reg_number;
883
884 /* Make the rest nice. */
885 expressionP->X_add_symbol = NULL;
886 expressionP->X_op_symbol = NULL;
887
888 return TRUE;
889 }
890 else
891 {
892 /* Reset the line as if we had not done anything. */
893 input_line_pointer = start;
894
895 return FALSE;
896 }
897 }
898
899 static void skip_white_space PARAMS ((void));
900
901 static void
902 skip_white_space ()
903 {
904 while (*input_line_pointer == ' '
905 || *input_line_pointer == '\t')
906 ++input_line_pointer;
907 }
908
909 /* Summary of parse_register_list ().
910 *
911 * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
912 * INSN is the partially constructed instruction.
913 * OPERAND is the operand being inserted.
914 *
915 * out: NULL if the parse completed successfully, otherwise a
916 * pointer to an error message is returned. If the parse
917 * completes the correct bit fields in the instruction
918 * will be filled in.
919 *
920 * Parses register lists with the syntax:
921 *
922 * { rX }
923 * { rX, rY }
924 * { rX - rY }
925 * { rX - rY, rZ }
926 * etc
927 *
928 * and also parses constant epxressions whoes bits indicate the
929 * registers in the lists. The LSB in the expression refers to
930 * the lowest numbered permissable register in the register list,
931 * and so on upwards. System registers are considered to be very
932 * high numbers. */
933
934 static char *parse_register_list
935 PARAMS ((unsigned long *, const struct v850_operand *));
936
937 static char *
938 parse_register_list (insn, operand)
939 unsigned long *insn;
940 const struct v850_operand *operand;
941 {
942 static int type1_regs[32] = {
943 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
944 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
945 };
946 static int type2_regs[32] = {
947 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
948 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
949 };
950 static int type3_regs[32] = {
951 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
952 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
953 };
954 int *regs;
955 expressionS exp;
956
957 /* Select a register array to parse. */
958 switch (operand->shift)
959 {
960 case 0xffe00001: regs = type1_regs; break;
961 case 0xfff8000f: regs = type2_regs; break;
962 case 0xfff8001f: regs = type3_regs; break;
963 default:
964 as_bad (_("unknown operand shift: %x\n"), operand->shift);
965 return _("internal failure in parse_register_list");
966 }
967
968 skip_white_space ();
969
970 /* If the expression starts with a curly brace it is a register list.
971 Otherwise it is a constant expression, whoes bits indicate which
972 registers are to be included in the list. */
973
974 if (*input_line_pointer != '{')
975 {
976 int reg;
977 int i;
978
979 expression (&exp);
980
981 if (exp.X_op != O_constant)
982 return _("constant expression or register list expected");
983
984 if (regs == type1_regs)
985 {
986 if (exp.X_add_number & 0xFFFFF000)
987 return _("high bits set in register list expression");
988
989 for (reg = 20; reg < 32; reg++)
990 if (exp.X_add_number & (1 << (reg - 20)))
991 {
992 for (i = 0; i < 32; i++)
993 if (regs[i] == reg)
994 *insn |= (1 << i);
995 }
996 }
997 else if (regs == type2_regs)
998 {
999 if (exp.X_add_number & 0xFFFE0000)
1000 return _("high bits set in register list expression");
1001
1002 for (reg = 1; reg < 16; reg++)
1003 if (exp.X_add_number & (1 << (reg - 1)))
1004 {
1005 for (i = 0; i < 32; i++)
1006 if (regs[i] == reg)
1007 *insn |= (1 << i);
1008 }
1009
1010 if (exp.X_add_number & (1 << 15))
1011 *insn |= (1 << 3);
1012
1013 if (exp.X_add_number & (1 << 16))
1014 *insn |= (1 << 19);
1015 }
1016 else /* regs == type3_regs */
1017 {
1018 if (exp.X_add_number & 0xFFFE0000)
1019 return _("high bits set in register list expression");
1020
1021 for (reg = 16; reg < 32; reg++)
1022 if (exp.X_add_number & (1 << (reg - 16)))
1023 {
1024 for (i = 0; i < 32; i++)
1025 if (regs[i] == reg)
1026 *insn |= (1 << i);
1027 }
1028
1029 if (exp.X_add_number & (1 << 16))
1030 *insn |= (1 << 19);
1031 }
1032
1033 return NULL;
1034 }
1035
1036 input_line_pointer++;
1037
1038 /* Parse the register list until a terminator (closing curly brace or
1039 new-line) is found. */
1040 for (;;)
1041 {
1042 if (register_name (&exp))
1043 {
1044 int i;
1045
1046 /* Locate the given register in the list, and if it is there,
1047 insert the corresponding bit into the instruction. */
1048 for (i = 0; i < 32; i++)
1049 {
1050 if (regs[i] == exp.X_add_number)
1051 {
1052 *insn |= (1 << i);
1053 break;
1054 }
1055 }
1056
1057 if (i == 32)
1058 {
1059 return _("illegal register included in list");
1060 }
1061 }
1062 else if (system_register_name (&exp, TRUE, TRUE))
1063 {
1064 if (regs == type1_regs)
1065 {
1066 return _("system registers cannot be included in list");
1067 }
1068 else if (exp.X_add_number == 5)
1069 {
1070 if (regs == type2_regs)
1071 return _("PSW cannot be included in list");
1072 else
1073 *insn |= 0x8;
1074 }
1075 else if (exp.X_add_number < 4)
1076 *insn |= 0x80000;
1077 else
1078 return _("High value system registers cannot be included in list");
1079 }
1080 else if (*input_line_pointer == '}')
1081 {
1082 input_line_pointer++;
1083 break;
1084 }
1085 else if (*input_line_pointer == ',')
1086 {
1087 input_line_pointer++;
1088 continue;
1089 }
1090 else if (*input_line_pointer == '-')
1091 {
1092 /* We have encountered a range of registers: rX - rY. */
1093 int j;
1094 expressionS exp2;
1095
1096 /* Skip the dash. */
1097 ++input_line_pointer;
1098
1099 /* Get the second register in the range. */
1100 if (! register_name (&exp2))
1101 {
1102 return _("second register should follow dash in register list");
1103 exp2.X_add_number = exp.X_add_number;
1104 }
1105
1106 /* Add the rest of the registers in the range. */
1107 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1108 {
1109 int i;
1110
1111 /* Locate the given register in the list, and if it is there,
1112 insert the corresponding bit into the instruction. */
1113 for (i = 0; i < 32; i++)
1114 {
1115 if (regs[i] == j)
1116 {
1117 *insn |= (1 << i);
1118 break;
1119 }
1120 }
1121
1122 if (i == 32)
1123 return _("illegal register included in list");
1124 }
1125 }
1126 else
1127 {
1128 break;
1129 }
1130
1131 skip_white_space ();
1132 }
1133
1134 return NULL;
1135 }
1136
1137 const char *md_shortopts = "m:";
1138
1139 struct option md_longopts[] = {
1140 {NULL, no_argument, NULL, 0}
1141 };
1142
1143 size_t md_longopts_size = sizeof (md_longopts);
1144
1145 void
1146 md_show_usage (stream)
1147 FILE *stream;
1148 {
1149 fprintf (stream, _(" V850 options:\n"));
1150 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1151 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1152 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1153 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1154 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1155 fprintf (stream, _(" -mrelax Enable relaxation\n"));
1156
1157 }
1158
1159 int
1160 md_parse_option (c, arg)
1161 int c;
1162 char *arg;
1163 {
1164 if (c != 'm')
1165 {
1166 if (c != 'a')
1167 /* xgettext:c-format */
1168 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1169 return 0;
1170 }
1171
1172 if (strcmp (arg, "warn-signed-overflow") == 0)
1173 {
1174 warn_signed_overflows = TRUE;
1175 }
1176 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1177 {
1178 warn_unsigned_overflows = TRUE;
1179 }
1180 else if (strcmp (arg, "v850") == 0)
1181 {
1182 machine = 0;
1183 processor_mask = PROCESSOR_V850;
1184 }
1185 else if (strcmp (arg, "v850e") == 0)
1186 {
1187 machine = bfd_mach_v850e;
1188 processor_mask = PROCESSOR_V850E;
1189 }
1190 else if (strcmp (arg, "v850any") == 0)
1191 {
1192 /* Tell the world that this is for any v850 chip. */
1193 machine = 0;
1194
1195 /* But support instructions for the extended versions. */
1196 processor_mask = PROCESSOR_V850E;
1197 }
1198 else if (strcmp (arg, "relax") == 0)
1199 v850_relax = 1;
1200 else
1201 {
1202 /* xgettext:c-format */
1203 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1204 return 0;
1205 }
1206
1207 return 1;
1208 }
1209
1210 symbolS *
1211 md_undefined_symbol (name)
1212 char *name ATTRIBUTE_UNUSED;
1213 {
1214 return 0;
1215 }
1216
1217 char *
1218 md_atof (type, litp, sizep)
1219 int type;
1220 char *litp;
1221 int *sizep;
1222 {
1223 int prec;
1224 LITTLENUM_TYPE words[4];
1225 char *t;
1226 int i;
1227
1228 switch (type)
1229 {
1230 case 'f':
1231 prec = 2;
1232 break;
1233
1234 case 'd':
1235 prec = 4;
1236 break;
1237
1238 default:
1239 *sizep = 0;
1240 return _("bad call to md_atof");
1241 }
1242
1243 t = atof_ieee (input_line_pointer, type, words);
1244 if (t)
1245 input_line_pointer = t;
1246
1247 *sizep = prec * 2;
1248
1249 for (i = prec - 1; i >= 0; i--)
1250 {
1251 md_number_to_chars (litp, (valueT) words[i], 2);
1252 litp += 2;
1253 }
1254
1255 return NULL;
1256 }
1257
1258 /* Very gross. */
1259
1260 void
1261 md_convert_frag (abfd, sec, fragP)
1262 bfd *abfd ATTRIBUTE_UNUSED;
1263 asection *sec;
1264 fragS *fragP;
1265 {
1266 subseg_change (sec, 0);
1267
1268 /* In range conditional or unconditional branch. */
1269 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1270 {
1271 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1272 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1273 fragP->fr_fix += 2;
1274 }
1275 /* Out of range conditional branch. Emit a branch around a jump. */
1276 else if (fragP->fr_subtype == 1)
1277 {
1278 unsigned char *buffer =
1279 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1280
1281 /* Reverse the condition of the first branch. */
1282 buffer[0] ^= 0x08;
1283 /* Mask off all the displacement bits. */
1284 buffer[0] &= 0x8f;
1285 buffer[1] &= 0x07;
1286 /* Now set the displacement bits so that we branch
1287 around the unconditional branch. */
1288 buffer[0] |= 0x30;
1289
1290 /* Now create the unconditional branch + fixup to the final
1291 target. */
1292 md_number_to_chars (buffer + 2, 0x00000780, 4);
1293 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1294 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1295 (int) fragP->fr_opcode + 1);
1296 fragP->fr_fix += 6;
1297 }
1298 /* Out of range unconditional branch. Emit a jump. */
1299 else if (fragP->fr_subtype == 3)
1300 {
1301 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1302 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1303 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1304 (int) fragP->fr_opcode + 1);
1305 fragP->fr_fix += 4;
1306 }
1307 else
1308 abort ();
1309 }
1310
1311 valueT
1312 md_section_align (seg, addr)
1313 asection *seg;
1314 valueT addr;
1315 {
1316 int align = bfd_get_section_alignment (stdoutput, seg);
1317 return ((addr + (1 << align) - 1) & (-1 << align));
1318 }
1319
1320 void
1321 md_begin ()
1322 {
1323 char *prev_name = "";
1324 const struct v850_opcode *op;
1325
1326 if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1327 {
1328 if (machine == -1)
1329 machine = bfd_mach_v850e;
1330
1331 if (processor_mask == -1)
1332 processor_mask = PROCESSOR_V850E;
1333 }
1334 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1335 {
1336 if (machine == -1)
1337 machine = 0;
1338
1339 if (processor_mask == -1)
1340 processor_mask = PROCESSOR_V850;
1341 }
1342 else
1343 /* xgettext:c-format */
1344 as_bad (_("Unable to determine default target processor from string: %s"),
1345 TARGET_CPU);
1346
1347 v850_hash = hash_new ();
1348
1349 /* Insert unique names into hash table. The V850 instruction set
1350 has many identical opcode names that have different opcodes based
1351 on the operands. This hash table then provides a quick index to
1352 the first opcode with a particular name in the opcode table. */
1353
1354 op = v850_opcodes;
1355 while (op->name)
1356 {
1357 if (strcmp (prev_name, op->name))
1358 {
1359 prev_name = (char *) op->name;
1360 hash_insert (v850_hash, op->name, (char *) op);
1361 }
1362 op++;
1363 }
1364
1365 v850_seg_table[BSS_SECTION].s = bss_section;
1366 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1367 }
1368
1369 static bfd_reloc_code_real_type handle_ctoff
1370 PARAMS ((const struct v850_operand *));
1371
1372 static bfd_reloc_code_real_type
1373 handle_ctoff (operand)
1374 const struct v850_operand *operand;
1375 {
1376 if (operand == NULL)
1377 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1378
1379 if (operand->bits != 6
1380 || operand->shift != 0)
1381 {
1382 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1383 return BFD_RELOC_64; /* Used to indicate an error condition. */
1384 }
1385
1386 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1387 }
1388
1389 static bfd_reloc_code_real_type handle_sdaoff
1390 PARAMS ((const struct v850_operand *));
1391
1392 static bfd_reloc_code_real_type
1393 handle_sdaoff (operand)
1394 const struct v850_operand *operand;
1395 {
1396 if (operand == NULL)
1397 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1398
1399 if (operand->bits == 15 && operand->shift == 17)
1400 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1401
1402 if (operand->bits == -1)
1403 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1404
1405 if (operand->bits != 16
1406 || operand->shift != 16)
1407 {
1408 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1409 return BFD_RELOC_64; /* Used to indicate an error condition. */
1410 }
1411
1412 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1413 }
1414
1415 static bfd_reloc_code_real_type handle_zdaoff
1416 PARAMS ((const struct v850_operand *));
1417
1418 static bfd_reloc_code_real_type
1419 handle_zdaoff (operand)
1420 const struct v850_operand *operand;
1421 {
1422 if (operand == NULL)
1423 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1424
1425 if (operand->bits == 15 && operand->shift == 17)
1426 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1427
1428 if (operand->bits == -1)
1429 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1430
1431 if (operand->bits != 16
1432 || operand->shift != 16)
1433 {
1434 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1435 /* Used to indicate an error condition. */
1436 return BFD_RELOC_64;
1437 }
1438
1439 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1440 }
1441
1442 static bfd_reloc_code_real_type handle_tdaoff
1443 PARAMS ((const struct v850_operand *));
1444
1445 static bfd_reloc_code_real_type
1446 handle_tdaoff (operand)
1447 const struct v850_operand *operand;
1448 {
1449 if (operand == NULL)
1450 /* Data item, not an instruction. */
1451 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1452
1453 if (operand->bits == 6 && operand->shift == 1)
1454 /* sld.w/sst.w, operand: D8_6 */
1455 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1456
1457 if (operand->bits == 4 && operand->insert != NULL)
1458 /* sld.hu, operand: D5-4 */
1459 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1460
1461 if (operand->bits == 4 && operand->insert == NULL)
1462 /* sld.bu, operand: D4 */
1463 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1464
1465 if (operand->bits == 16 && operand->shift == 16)
1466 /* set1 & chums, operands: D16 */
1467 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1468
1469 if (operand->bits != 7)
1470 {
1471 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1472 /* Used to indicate an error condition. */
1473 return BFD_RELOC_64;
1474 }
1475
1476 return operand->insert != NULL
1477 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1478 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1479 }
1480
1481 /* Warning: The code in this function relies upon the definitions
1482 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1483 matching the hard coded values contained herein. */
1484
1485 static bfd_reloc_code_real_type v850_reloc_prefix
1486 PARAMS ((const struct v850_operand *));
1487
1488 static bfd_reloc_code_real_type
1489 v850_reloc_prefix (operand)
1490 const struct v850_operand *operand;
1491 {
1492 bfd_boolean paren_skipped = FALSE;
1493
1494 /* Skip leading opening parenthesis. */
1495 if (*input_line_pointer == '(')
1496 {
1497 ++input_line_pointer;
1498 paren_skipped = TRUE;
1499 }
1500
1501 #define CHECK_(name, reloc) \
1502 if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \
1503 { \
1504 input_line_pointer += strlen (name); \
1505 return reloc; \
1506 }
1507
1508 CHECK_ ("hi0", BFD_RELOC_HI16 );
1509 CHECK_ ("hi", BFD_RELOC_HI16_S );
1510 CHECK_ ("lo", BFD_RELOC_LO16 );
1511 CHECK_ ("sdaoff", handle_sdaoff (operand));
1512 CHECK_ ("zdaoff", handle_zdaoff (operand));
1513 CHECK_ ("tdaoff", handle_tdaoff (operand));
1514 CHECK_ ("hilo", BFD_RELOC_32 );
1515 CHECK_ ("ctoff", handle_ctoff (operand) );
1516
1517 /* Restore skipped parenthesis. */
1518 if (paren_skipped)
1519 --input_line_pointer;
1520
1521 return BFD_RELOC_UNUSED;
1522 }
1523
1524 /* Insert an operand value into an instruction. */
1525
1526 static unsigned long v850_insert_operand
1527 PARAMS ((unsigned long, const struct v850_operand *, offsetT, char *,
1528 unsigned int, char *));
1529
1530 static unsigned long
1531 v850_insert_operand (insn, operand, val, file, line, str)
1532 unsigned long insn;
1533 const struct v850_operand *operand;
1534 offsetT val;
1535 char *file;
1536 unsigned int line;
1537 char *str;
1538 {
1539 if (operand->insert)
1540 {
1541 const char *message = NULL;
1542
1543 insn = operand->insert (insn, val, &message);
1544 if (message != NULL)
1545 {
1546 if ((operand->flags & V850_OPERAND_SIGNED)
1547 && ! warn_signed_overflows
1548 && strstr (message, "out of range") != NULL)
1549 {
1550 /* Skip warning... */
1551 }
1552 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1553 && ! warn_unsigned_overflows
1554 && strstr (message, "out of range") != NULL)
1555 {
1556 /* Skip warning... */
1557 }
1558 else if (str)
1559 {
1560 if (file == (char *) NULL)
1561 as_warn ("%s: %s", str, message);
1562 else
1563 as_warn_where (file, line, "%s: %s", str, message);
1564 }
1565 else
1566 {
1567 if (file == (char *) NULL)
1568 as_warn (message);
1569 else
1570 as_warn_where (file, line, message);
1571 }
1572 }
1573 }
1574 else
1575 {
1576 if (operand->bits != 32)
1577 {
1578 long min, max;
1579
1580 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1581 {
1582 if (! warn_signed_overflows)
1583 max = (1 << operand->bits) - 1;
1584 else
1585 max = (1 << (operand->bits - 1)) - 1;
1586
1587 min = -(1 << (operand->bits - 1));
1588 }
1589 else
1590 {
1591 max = (1 << operand->bits) - 1;
1592
1593 if (! warn_unsigned_overflows)
1594 min = -(1 << (operand->bits - 1));
1595 else
1596 min = 0;
1597 }
1598
1599 if (val < (offsetT) min || val > (offsetT) max)
1600 {
1601 /* xgettext:c-format */
1602 const char *err =
1603 _("operand out of range (%s not between %ld and %ld)");
1604 char buf[100];
1605
1606 /* Restore min and mix to expected values for decimal ranges. */
1607 if ((operand->flags & V850_OPERAND_SIGNED)
1608 && ! warn_signed_overflows)
1609 max = (1 << (operand->bits - 1)) - 1;
1610
1611 if (! (operand->flags & V850_OPERAND_SIGNED)
1612 && ! warn_unsigned_overflows)
1613 min = 0;
1614
1615 if (str)
1616 {
1617 sprintf (buf, "%s: ", str);
1618
1619 sprint_value (buf + strlen (buf), val);
1620 }
1621 else
1622 sprint_value (buf, val);
1623
1624 if (file == (char *) NULL)
1625 as_warn (err, buf, min, max);
1626 else
1627 as_warn_where (file, line, err, buf, min, max);
1628 }
1629 }
1630
1631 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1632 }
1633
1634 return insn;
1635 }
1636 \f
1637 static char copy_of_instruction[128];
1638
1639 void
1640 md_assemble (str)
1641 char *str;
1642 {
1643 char *s;
1644 char *start_of_operands;
1645 struct v850_opcode *opcode;
1646 struct v850_opcode *next_opcode;
1647 const unsigned char *opindex_ptr;
1648 int next_opindex;
1649 int relaxable = 0;
1650 unsigned long insn;
1651 unsigned long insn_size;
1652 char *f;
1653 int i;
1654 int match;
1655 bfd_boolean extra_data_after_insn = FALSE;
1656 unsigned extra_data_len = 0;
1657 unsigned long extra_data = 0;
1658 char *saved_input_line_pointer;
1659
1660 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1661
1662 /* Get the opcode. */
1663 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
1664 continue;
1665
1666 if (*s != '\0')
1667 *s++ = '\0';
1668
1669 /* Find the first opcode with the proper name. */
1670 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1671 if (opcode == NULL)
1672 {
1673 /* xgettext:c-format */
1674 as_bad (_("Unrecognized opcode: `%s'"), str);
1675 ignore_rest_of_line ();
1676 return;
1677 }
1678
1679 str = s;
1680 while (ISSPACE (*str))
1681 ++str;
1682
1683 start_of_operands = str;
1684
1685 saved_input_line_pointer = input_line_pointer;
1686
1687 for (;;)
1688 {
1689 const char *errmsg = NULL;
1690
1691 match = 0;
1692
1693 if ((opcode->processors & processor_mask) == 0)
1694 {
1695 errmsg = _("Target processor does not support this instruction.");
1696 goto error;
1697 }
1698
1699 relaxable = 0;
1700 fc = 0;
1701 next_opindex = 0;
1702 insn = opcode->opcode;
1703 extra_data_after_insn = FALSE;
1704
1705 input_line_pointer = str = start_of_operands;
1706
1707 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1708 {
1709 const struct v850_operand *operand;
1710 char *hold;
1711 expressionS ex;
1712 bfd_reloc_code_real_type reloc;
1713
1714 if (next_opindex == 0)
1715 {
1716 operand = &v850_operands[*opindex_ptr];
1717 }
1718 else
1719 {
1720 operand = &v850_operands[next_opindex];
1721 next_opindex = 0;
1722 }
1723
1724 errmsg = NULL;
1725
1726 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1727 ++str;
1728
1729 if (operand->flags & V850_OPERAND_RELAX)
1730 relaxable = 1;
1731
1732 /* Gather the operand. */
1733 hold = input_line_pointer;
1734 input_line_pointer = str;
1735
1736 /* lo(), hi(), hi0(), etc... */
1737 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1738 {
1739 /* This is a fake reloc, used to indicate an error condition. */
1740 if (reloc == BFD_RELOC_64)
1741 {
1742 match = 1;
1743 goto error;
1744 }
1745
1746 expression (&ex);
1747
1748 if (ex.X_op == O_constant)
1749 {
1750 switch (reloc)
1751 {
1752 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1753 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1754 and the like. */
1755 /* Fall through. */
1756
1757 case BFD_RELOC_LO16:
1758 {
1759 /* Truncate, then sign extend the value. */
1760 ex.X_add_number = SEXT16 (ex.X_add_number);
1761 break;
1762 }
1763
1764 case BFD_RELOC_HI16:
1765 {
1766 /* Truncate, then sign extend the value. */
1767 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1768 break;
1769 }
1770
1771 case BFD_RELOC_HI16_S:
1772 {
1773 /* Truncate, then sign extend the value. */
1774 int temp = (ex.X_add_number >> 16) & 0xffff;
1775
1776 temp += (ex.X_add_number >> 15) & 1;
1777
1778 ex.X_add_number = SEXT16 (temp);
1779 break;
1780 }
1781
1782 case BFD_RELOC_32:
1783 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1784 {
1785 errmsg = _("immediate operand is too large");
1786 goto error;
1787 }
1788
1789 extra_data_after_insn = TRUE;
1790 extra_data_len = 4;
1791 extra_data = 0;
1792 break;
1793
1794 default:
1795 fprintf (stderr, "reloc: %d\n", reloc);
1796 as_bad (_("AAARG -> unhandled constant reloc"));
1797 break;
1798 }
1799
1800 if (fc > MAX_INSN_FIXUPS)
1801 as_fatal (_("too many fixups"));
1802
1803 fixups[fc].exp = ex;
1804 fixups[fc].opindex = *opindex_ptr;
1805 fixups[fc].reloc = reloc;
1806 fc++;
1807 }
1808 else
1809 {
1810 if (reloc == BFD_RELOC_32)
1811 {
1812 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1813 {
1814 errmsg = _("immediate operand is too large");
1815 goto error;
1816 }
1817
1818 extra_data_after_insn = TRUE;
1819 extra_data_len = 4;
1820 extra_data = ex.X_add_number;
1821 }
1822
1823 if (fc > MAX_INSN_FIXUPS)
1824 as_fatal (_("too many fixups"));
1825
1826 fixups[fc].exp = ex;
1827 fixups[fc].opindex = *opindex_ptr;
1828 fixups[fc].reloc = reloc;
1829 fc++;
1830 }
1831 }
1832 else
1833 {
1834 errmsg = NULL;
1835
1836 if ((operand->flags & V850_OPERAND_REG) != 0)
1837 {
1838 if (!register_name (&ex))
1839 {
1840 errmsg = _("invalid register name");
1841 }
1842 else if ((operand->flags & V850_NOT_R0)
1843 && ex.X_add_number == 0)
1844 {
1845 errmsg = _("register r0 cannot be used here");
1846
1847 /* Force an error message to be generated by
1848 skipping over any following potential matches
1849 for this opcode. */
1850 opcode += 3;
1851 }
1852 }
1853 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1854 {
1855 if (!system_register_name (&ex, TRUE, FALSE))
1856 {
1857 errmsg = _("invalid system register name");
1858 }
1859 }
1860 else if ((operand->flags & V850_OPERAND_EP) != 0)
1861 {
1862 char *start = input_line_pointer;
1863 char c = get_symbol_end ();
1864
1865 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1866 {
1867 /* Put things back the way we found them. */
1868 *input_line_pointer = c;
1869 input_line_pointer = start;
1870 errmsg = _("expected EP register");
1871 goto error;
1872 }
1873
1874 *input_line_pointer = c;
1875 str = input_line_pointer;
1876 input_line_pointer = hold;
1877
1878 while (*str == ' ' || *str == ','
1879 || *str == '[' || *str == ']')
1880 ++str;
1881 continue;
1882 }
1883 else if ((operand->flags & V850_OPERAND_CC) != 0)
1884 {
1885 if (!cc_name (&ex))
1886 {
1887 errmsg = _("invalid condition code name");
1888 }
1889 }
1890 else if (operand->flags & V850E_PUSH_POP)
1891 {
1892 errmsg = parse_register_list (&insn, operand);
1893
1894 /* The parse_register_list() function has already done
1895 everything, so fake a dummy expression. */
1896 ex.X_op = O_constant;
1897 ex.X_add_number = 0;
1898 }
1899 else if (operand->flags & V850E_IMMEDIATE16)
1900 {
1901 expression (&ex);
1902
1903 if (ex.X_op != O_constant)
1904 errmsg = _("constant expression expected");
1905 else if (ex.X_add_number & 0xffff0000)
1906 {
1907 if (ex.X_add_number & 0xffff)
1908 errmsg = _("constant too big to fit into instruction");
1909 else if ((insn & 0x001fffc0) == 0x00130780)
1910 ex.X_add_number >>= 16;
1911 else
1912 errmsg = _("constant too big to fit into instruction");
1913 }
1914
1915 extra_data_after_insn = TRUE;
1916 extra_data_len = 2;
1917 extra_data = ex.X_add_number;
1918 ex.X_add_number = 0;
1919 }
1920 else if (operand->flags & V850E_IMMEDIATE32)
1921 {
1922 expression (&ex);
1923
1924 if (ex.X_op != O_constant)
1925 errmsg = _("constant expression expected");
1926
1927 extra_data_after_insn = TRUE;
1928 extra_data_len = 4;
1929 extra_data = ex.X_add_number;
1930 ex.X_add_number = 0;
1931 }
1932 else if (register_name (&ex)
1933 && (operand->flags & V850_OPERAND_REG) == 0)
1934 {
1935 char c;
1936 int exists = 0;
1937
1938 /* It is possible that an alias has been defined that
1939 matches a register name. For example the code may
1940 include a ".set ZERO, 0" directive, which matches
1941 the register name "zero". Attempt to reparse the
1942 field as an expression, and only complain if we
1943 cannot generate a constant. */
1944
1945 input_line_pointer = str;
1946
1947 c = get_symbol_end ();
1948
1949 if (symbol_find (str) != NULL)
1950 exists = 1;
1951
1952 *input_line_pointer = c;
1953 input_line_pointer = str;
1954
1955 expression (&ex);
1956
1957 if (ex.X_op != O_constant)
1958 {
1959 /* If this register is actually occuring too early on
1960 the parsing of the instruction, (because another
1961 field is missing) then report this. */
1962 if (opindex_ptr[1] != 0
1963 && (v850_operands[opindex_ptr[1]].flags
1964 & V850_OPERAND_REG))
1965 errmsg = _("syntax error: value is missing before the register name");
1966 else
1967 errmsg = _("syntax error: register not expected");
1968
1969 /* If we created a symbol in the process of this
1970 test then delete it now, so that it will not
1971 be output with the real symbols... */
1972 if (exists == 0
1973 && ex.X_op == O_symbol)
1974 symbol_remove (ex.X_add_symbol,
1975 &symbol_rootP, &symbol_lastP);
1976 }
1977 }
1978 else if (system_register_name (&ex, FALSE, FALSE)
1979 && (operand->flags & V850_OPERAND_SRG) == 0)
1980 {
1981 errmsg = _("syntax error: system register not expected");
1982 }
1983 else if (cc_name (&ex)
1984 && (operand->flags & V850_OPERAND_CC) == 0)
1985 {
1986 errmsg = _("syntax error: condition code not expected");
1987 }
1988 else
1989 {
1990 expression (&ex);
1991 /* Special case:
1992 If we are assembling a MOV instruction and the immediate
1993 value does not fit into the bits available then create a
1994 fake error so that the next MOV instruction will be
1995 selected. This one has a 32 bit immediate field. */
1996
1997 if (((insn & 0x07e0) == 0x0200)
1998 && operand->bits == 5 /* Do not match the CALLT instruction. */
1999 && ex.X_op == O_constant
2000 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
2001 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
2002 errmsg = _("immediate operand is too large");
2003 }
2004
2005 if (errmsg)
2006 goto error;
2007
2008 #if 0
2009 fprintf (stderr,
2010 " insn: %x, operand %d, op: %d, add_number: %d\n",
2011 insn, opindex_ptr - opcode->operands,
2012 ex.X_op, ex.X_add_number);
2013 #endif
2014
2015 switch (ex.X_op)
2016 {
2017 case O_illegal:
2018 errmsg = _("illegal operand");
2019 goto error;
2020 case O_absent:
2021 errmsg = _("missing operand");
2022 goto error;
2023 case O_register:
2024 if ((operand->flags
2025 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
2026 {
2027 errmsg = _("invalid operand");
2028 goto error;
2029 }
2030 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2031 (char *) NULL, 0,
2032 copy_of_instruction);
2033 break;
2034
2035 case O_constant:
2036 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2037 (char *) NULL, 0,
2038 copy_of_instruction);
2039 break;
2040
2041 default:
2042 /* We need to generate a fixup for this expression. */
2043 if (fc >= MAX_INSN_FIXUPS)
2044 as_fatal (_("too many fixups"));
2045
2046 fixups[fc].exp = ex;
2047 fixups[fc].opindex = *opindex_ptr;
2048 fixups[fc].reloc = BFD_RELOC_UNUSED;
2049 ++fc;
2050 break;
2051 }
2052 }
2053
2054 str = input_line_pointer;
2055 input_line_pointer = hold;
2056
2057 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2058 || *str == ')')
2059 ++str;
2060 }
2061 match = 1;
2062
2063 error:
2064 if (match == 0)
2065 {
2066 next_opcode = opcode + 1;
2067 if (next_opcode->name != NULL
2068 && strcmp (next_opcode->name, opcode->name) == 0)
2069 {
2070 opcode = next_opcode;
2071
2072 /* Skip versions that are not supported by the target
2073 processor. */
2074 if ((opcode->processors & processor_mask) == 0)
2075 goto error;
2076
2077 continue;
2078 }
2079
2080 as_bad ("%s: %s", copy_of_instruction, errmsg);
2081
2082 if (*input_line_pointer == ']')
2083 ++input_line_pointer;
2084
2085 ignore_rest_of_line ();
2086 input_line_pointer = saved_input_line_pointer;
2087 return;
2088 }
2089 break;
2090 }
2091
2092 while (ISSPACE (*str))
2093 ++str;
2094
2095 if (*str != '\0')
2096 /* xgettext:c-format */
2097 as_bad (_("junk at end of line: `%s'"), str);
2098
2099 input_line_pointer = str;
2100
2101 /* Tie dwarf2 debug info to the address at the start of the insn.
2102 We can't do this after the insn has been output as the current
2103 frag may have been closed off. eg. by frag_var. */
2104 dwarf2_emit_insn (0);
2105
2106 /* Write out the instruction. */
2107
2108 if (relaxable && fc > 0)
2109 {
2110 insn_size = 2;
2111 fc = 0;
2112
2113 if (!strcmp (opcode->name, "br"))
2114 {
2115 f = frag_var (rs_machine_dependent, 4, 2, 2,
2116 fixups[0].exp.X_add_symbol,
2117 fixups[0].exp.X_add_number,
2118 (char *) fixups[0].opindex);
2119 md_number_to_chars (f, insn, insn_size);
2120 md_number_to_chars (f + 2, 0, 2);
2121 }
2122 else
2123 {
2124 f = frag_var (rs_machine_dependent, 6, 4, 0,
2125 fixups[0].exp.X_add_symbol,
2126 fixups[0].exp.X_add_number,
2127 (char *) fixups[0].opindex);
2128 md_number_to_chars (f, insn, insn_size);
2129 md_number_to_chars (f + 2, 0, 4);
2130 }
2131 }
2132 else
2133 {
2134 /* Four byte insns have an opcode with the two high bits on. */
2135 if ((insn & 0x0600) == 0x0600)
2136 insn_size = 4;
2137 else
2138 insn_size = 2;
2139
2140 /* Special case: 32 bit MOV. */
2141 if ((insn & 0xffe0) == 0x0620)
2142 insn_size = 2;
2143
2144 f = frag_more (insn_size);
2145 md_number_to_chars (f, insn, insn_size);
2146
2147 if (extra_data_after_insn)
2148 {
2149 f = frag_more (extra_data_len);
2150 md_number_to_chars (f, extra_data, extra_data_len);
2151
2152 extra_data_after_insn = FALSE;
2153 }
2154 }
2155
2156 /* Create any fixups. At this point we do not use a
2157 bfd_reloc_code_real_type, but instead just use the
2158 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2159 handle fixups for any operand type, although that is admittedly
2160 not a very exciting feature. We pick a BFD reloc type in
2161 md_apply_fix3. */
2162 for (i = 0; i < fc; i++)
2163 {
2164 const struct v850_operand *operand;
2165 bfd_reloc_code_real_type reloc;
2166
2167 operand = &v850_operands[fixups[i].opindex];
2168
2169 reloc = fixups[i].reloc;
2170
2171 if (reloc != BFD_RELOC_UNUSED)
2172 {
2173 reloc_howto_type *reloc_howto =
2174 bfd_reloc_type_lookup (stdoutput, reloc);
2175 int size;
2176 int address;
2177 fixS *fixP;
2178
2179 if (!reloc_howto)
2180 abort ();
2181
2182 size = bfd_get_reloc_size (reloc_howto);
2183
2184 /* XXX This will abort on an R_V850_8 reloc -
2185 is this reloc actually used? */
2186 if (size != 2 && size != 4)
2187 abort ();
2188
2189 address = (f - frag_now->fr_literal) + insn_size - size;
2190
2191 if (reloc == BFD_RELOC_32)
2192 address += 2;
2193
2194 fixP = fix_new_exp (frag_now, address, size,
2195 &fixups[i].exp,
2196 reloc_howto->pc_relative,
2197 reloc);
2198
2199 switch (reloc)
2200 {
2201 case BFD_RELOC_LO16:
2202 case BFD_RELOC_HI16:
2203 case BFD_RELOC_HI16_S:
2204 fixP->fx_no_overflow = 1;
2205 break;
2206 default:
2207 break;
2208 }
2209 }
2210 else
2211 {
2212 fix_new_exp (frag_now,
2213 f - frag_now->fr_literal, 4,
2214 & fixups[i].exp,
2215 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
2216 (bfd_reloc_code_real_type) (fixups[i].opindex
2217 + (int) BFD_RELOC_UNUSED));
2218 }
2219 }
2220
2221 input_line_pointer = saved_input_line_pointer;
2222 }
2223
2224 /* If while processing a fixup, a reloc really needs to be created
2225 then it is done here. */
2226
2227 arelent *
2228 tc_gen_reloc (seg, fixp)
2229 asection *seg ATTRIBUTE_UNUSED;
2230 fixS *fixp;
2231 {
2232 arelent *reloc;
2233
2234 reloc = (arelent *) xmalloc (sizeof (arelent));
2235 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2236 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2237 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2238 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2239
2240 if (reloc->howto == (reloc_howto_type *) NULL)
2241 {
2242 as_bad_where (fixp->fx_file, fixp->fx_line,
2243 /* xgettext:c-format */
2244 _("reloc %d not supported by object file format"),
2245 (int) fixp->fx_r_type);
2246
2247 xfree (reloc);
2248
2249 return NULL;
2250 }
2251
2252 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2253 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2254 reloc->addend = fixp->fx_offset;
2255 else if ( fixp->fx_r_type == BFD_RELOC_V850_LONGCALL
2256 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP
2257 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN)
2258 reloc->addend = fixp->fx_offset;
2259 else
2260 reloc->addend = fixp->fx_addnumber;
2261
2262 return reloc;
2263 }
2264
2265 void
2266 v850_handle_align (frag)
2267 fragS * frag;
2268 {
2269 if (v850_relax
2270 && frag->fr_type == rs_align
2271 && frag->fr_address + frag->fr_fix > 0
2272 && frag->fr_offset > 1
2273 && now_seg != bss_section
2274 && now_seg != v850_seg_table[SBSS_SECTION].s
2275 && now_seg != v850_seg_table[TBSS_SECTION].s
2276 && now_seg != v850_seg_table[ZBSS_SECTION].s)
2277 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
2278 BFD_RELOC_V850_ALIGN);
2279 }
2280
2281 /* Return current size of variable part of frag. */
2282
2283 int
2284 md_estimate_size_before_relax (fragp, seg)
2285 fragS *fragp;
2286 asection *seg ATTRIBUTE_UNUSED;
2287 {
2288 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2289 abort ();
2290
2291 return md_relax_table[fragp->fr_subtype].rlx_length;
2292 }
2293
2294 long
2295 v850_pcrel_from_section (fixp, section)
2296 fixS *fixp;
2297 segT section;
2298 {
2299 /* If the symbol is undefined, or in a section other than our own,
2300 or it is weak (in which case it may well be in another section,
2301 then let the linker figure it out. */
2302 if (fixp->fx_addsy != (symbolS *) NULL
2303 && (! S_IS_DEFINED (fixp->fx_addsy)
2304 || S_IS_WEAK (fixp->fx_addsy)
2305 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2306 return 0;
2307
2308 return fixp->fx_frag->fr_address + fixp->fx_where;
2309 }
2310
2311 void
2312 md_apply_fix3 (fixP, valueP, seg)
2313 fixS *fixP;
2314 valueT *valueP;
2315 segT seg ATTRIBUTE_UNUSED;
2316 {
2317 valueT value = * valueP;
2318 char *where;
2319
2320 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2321 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2322 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP
2323 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2324 {
2325 fixP->fx_done = 0;
2326 return;
2327 }
2328
2329 if (fixP->fx_addsy == (symbolS *) NULL)
2330 fixP->fx_addnumber = value,
2331 fixP->fx_done = 1;
2332
2333 else if (fixP->fx_pcrel)
2334 fixP->fx_addnumber = fixP->fx_offset;
2335
2336 else
2337 {
2338 value = fixP->fx_offset;
2339 if (fixP->fx_subsy != (symbolS *) NULL)
2340 {
2341 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2342 value -= S_GET_VALUE (fixP->fx_subsy);
2343 else
2344 {
2345 /* We don't actually support subtracting a symbol. */
2346 as_bad_where (fixP->fx_file, fixP->fx_line,
2347 _("expression too complex"));
2348 }
2349 }
2350 fixP->fx_addnumber = value;
2351 }
2352
2353 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
2354 {
2355 int opindex;
2356 const struct v850_operand *operand;
2357 unsigned long insn;
2358
2359 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
2360 operand = &v850_operands[opindex];
2361
2362 /* Fetch the instruction, insert the fully resolved operand
2363 value, and stuff the instruction back again.
2364
2365 Note the instruction has been stored in little endian
2366 format! */
2367 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2368
2369 insn = bfd_getl32 ((unsigned char *) where);
2370 insn = v850_insert_operand (insn, operand, (offsetT) value,
2371 fixP->fx_file, fixP->fx_line, NULL);
2372 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2373
2374 if (fixP->fx_done)
2375 /* Nothing else to do here. */
2376 return;
2377
2378 /* Determine a BFD reloc value based on the operand information.
2379 We are only prepared to turn a few of the operands into relocs. */
2380
2381 if (operand->bits == 22)
2382 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
2383 else if (operand->bits == 9)
2384 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
2385 else
2386 {
2387 #if 0
2388 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2389 #endif
2390
2391 as_bad_where (fixP->fx_file, fixP->fx_line,
2392 _("unresolved expression that must be resolved"));
2393 fixP->fx_done = 1;
2394 return;
2395 }
2396 }
2397 else if (fixP->fx_done)
2398 {
2399 /* We still have to insert the value into memory! */
2400 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2401
2402 if (fixP->fx_size == 1)
2403 *where = value & 0xff;
2404 else if (fixP->fx_size == 2)
2405 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2406 else if (fixP->fx_size == 4)
2407 bfd_putl32 (value, (unsigned char *) where);
2408 }
2409 }
2410 \f
2411 /* Parse a cons expression. We have to handle hi(), lo(), etc
2412 on the v850. */
2413
2414 void
2415 parse_cons_expression_v850 (exp)
2416 expressionS *exp;
2417 {
2418 /* See if there's a reloc prefix like hi() we have to handle. */
2419 hold_cons_reloc = v850_reloc_prefix (NULL);
2420
2421 /* Do normal expression parsing. */
2422 expression (exp);
2423 }
2424
2425 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2426 found a reloc prefix, then we use that reloc, else we choose an
2427 appropriate one based on the size of the expression. */
2428
2429 void
2430 cons_fix_new_v850 (frag, where, size, exp)
2431 fragS *frag;
2432 int where;
2433 int size;
2434 expressionS *exp;
2435 {
2436 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2437 {
2438 if (size == 4)
2439 hold_cons_reloc = BFD_RELOC_32;
2440 if (size == 2)
2441 hold_cons_reloc = BFD_RELOC_16;
2442 if (size == 1)
2443 hold_cons_reloc = BFD_RELOC_8;
2444 }
2445
2446 if (exp != NULL)
2447 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2448 else
2449 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2450
2451 hold_cons_reloc = BFD_RELOC_UNUSED;
2452 }
2453
2454 bfd_boolean
2455 v850_fix_adjustable (fixP)
2456 fixS *fixP;
2457 {
2458 if (fixP->fx_addsy == NULL)
2459 return 1;
2460
2461 /* Don't adjust function names. */
2462 if (S_IS_FUNCTION (fixP->fx_addsy))
2463 return 0;
2464
2465 /* We need the symbol name for the VTABLE entries. */
2466 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2467 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2468 return 0;
2469
2470 return 1;
2471 }
2472
2473 int
2474 v850_force_relocation (fixP)
2475 struct fix *fixP;
2476 {
2477 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2478 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP)
2479 return 1;
2480
2481 if (v850_relax
2482 && (fixP->fx_pcrel
2483 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN
2484 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL
2485 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL
2486 || fixP->fx_r_type >= BFD_RELOC_UNUSED))
2487 return 1;
2488
2489 return generic_force_reloc (fixP);
2490 }
GDB Binutils - Deliverables
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