projects / deliverable / binutils-gdb.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Switch to GPLv3
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
1 /* tc-v850.c -- Assembler code for the NEC V850
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2006, 2007 Free Software Foundation, Inc.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
21
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "subsegs.h"
25 #include "opcode/v850.h"
26 #include "dwarf2dbg.h"
27
28 /* Sign-extend a 16-bit number. */
29 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
30
31 /* Temporarily holds the reloc in a cons expression. */
32 static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
33
34 /* Set to TRUE if we want to be pedantic about signed overflows. */
35 static bfd_boolean warn_signed_overflows = FALSE;
36 static bfd_boolean warn_unsigned_overflows = FALSE;
37
38 /* Indicates the target BFD machine number. */
39 static int machine = -1;
40
41 /* Indicates the target processor(s) for the assemble. */
42 static int processor_mask = -1;
43 \f
44 /* Structure to hold information about predefined registers. */
45 struct reg_name
46 {
47 const char *name;
48 int value;
49 };
50
51 /* Generic assembler global variables which must be defined by all
52 targets. */
53
54 /* Characters which always start a comment. */
55 const char comment_chars[] = "#";
56
57 /* Characters which start a comment at the beginning of a line. */
58 const char line_comment_chars[] = ";#";
59
60 /* Characters which may be used to separate multiple commands on a
61 single line. */
62 const char line_separator_chars[] = ";";
63
64 /* Characters which are used to indicate an exponent in a floating
65 point number. */
66 const char EXP_CHARS[] = "eE";
67
68 /* Characters which mean that a number is a floating point constant,
69 as in 0d1.0. */
70 const char FLT_CHARS[] = "dD";
71 \f
72 const relax_typeS md_relax_table[] =
73 {
74 /* Conditional branches. */
75 {0xff, -0x100, 2, 1},
76 {0x1fffff, -0x200000, 6, 0},
77 /* Unconditional branches. */
78 {0xff, -0x100, 2, 3},
79 {0x1fffff, -0x200000, 4, 0},
80 };
81
82 static int v850_relax = 0;
83
84 /* Fixups. */
85 #define MAX_INSN_FIXUPS 5
86
87 struct v850_fixup
88 {
89 expressionS exp;
90 int opindex;
91 bfd_reloc_code_real_type reloc;
92 };
93
94 struct v850_fixup fixups[MAX_INSN_FIXUPS];
95 static int fc;
96
97 struct v850_seg_entry
98 {
99 segT s;
100 const char *name;
101 flagword flags;
102 };
103
104 struct v850_seg_entry v850_seg_table[] =
105 {
106 { NULL, ".sdata",
107 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
108 | SEC_SMALL_DATA },
109 { NULL, ".tdata",
110 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
111 { NULL, ".zdata",
112 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
113 { NULL, ".sbss",
114 SEC_ALLOC | SEC_SMALL_DATA },
115 { NULL, ".tbss",
116 SEC_ALLOC },
117 { NULL, ".zbss",
118 SEC_ALLOC},
119 { NULL, ".rosdata",
120 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
121 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
122 { NULL, ".rozdata",
123 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
124 | SEC_HAS_CONTENTS },
125 { NULL, ".scommon",
126 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
127 | SEC_SMALL_DATA | SEC_IS_COMMON },
128 { NULL, ".tcommon",
129 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
130 | SEC_IS_COMMON },
131 { NULL, ".zcommon",
132 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
133 | SEC_IS_COMMON },
134 { NULL, ".call_table_data",
135 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
136 { NULL, ".call_table_text",
137 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
138 | SEC_HAS_CONTENTS},
139 { NULL, ".bss",
140 SEC_ALLOC }
141 };
142
143 #define SDATA_SECTION 0
144 #define TDATA_SECTION 1
145 #define ZDATA_SECTION 2
146 #define SBSS_SECTION 3
147 #define TBSS_SECTION 4
148 #define ZBSS_SECTION 5
149 #define ROSDATA_SECTION 6
150 #define ROZDATA_SECTION 7
151 #define SCOMMON_SECTION 8
152 #define TCOMMON_SECTION 9
153 #define ZCOMMON_SECTION 10
154 #define CALL_TABLE_DATA_SECTION 11
155 #define CALL_TABLE_TEXT_SECTION 12
156 #define BSS_SECTION 13
157
158 static void
159 do_v850_seg (int i, subsegT sub)
160 {
161 struct v850_seg_entry *seg = v850_seg_table + i;
162
163 obj_elf_section_change_hook ();
164
165 if (seg->s != NULL)
166 subseg_set (seg->s, sub);
167 else
168 {
169 seg->s = subseg_new (seg->name, sub);
170 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
171 if ((seg->flags & SEC_LOAD) == 0)
172 seg_info (seg->s)->bss = 1;
173 }
174 }
175
176 static void
177 v850_seg (int i)
178 {
179 subsegT sub = get_absolute_expression ();
180
181 do_v850_seg (i, sub);
182 demand_empty_rest_of_line ();
183 }
184
185 static void
186 v850_offset (int ignore ATTRIBUTE_UNUSED)
187 {
188 char *pfrag;
189 int temp = get_absolute_expression ();
190
191 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
192 (offsetT) temp, (char *) 0);
193 *pfrag = 0;
194
195 demand_empty_rest_of_line ();
196 }
197
198 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */
199
200 static void
201 v850_comm (int area)
202 {
203 char *name;
204 char c;
205 char *p;
206 int temp;
207 unsigned int size;
208 symbolS *symbolP;
209 int have_align;
210
211 name = input_line_pointer;
212 c = get_symbol_end ();
213
214 /* Just after name is now '\0'. */
215 p = input_line_pointer;
216 *p = c;
217
218 SKIP_WHITESPACE ();
219
220 if (*input_line_pointer != ',')
221 {
222 as_bad (_("Expected comma after symbol-name"));
223 ignore_rest_of_line ();
224 return;
225 }
226
227 /* Skip ','. */
228 input_line_pointer++;
229
230 if ((temp = get_absolute_expression ()) < 0)
231 {
232 /* xgettext:c-format */
233 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
234 ignore_rest_of_line ();
235 return;
236 }
237
238 size = temp;
239 *p = 0;
240 symbolP = symbol_find_or_make (name);
241 *p = c;
242
243 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
244 {
245 as_bad (_("Ignoring attempt to re-define symbol"));
246 ignore_rest_of_line ();
247 return;
248 }
249
250 if (S_GET_VALUE (symbolP) != 0)
251 {
252 if (S_GET_VALUE (symbolP) != size)
253 /* xgettext:c-format */
254 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
255 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
256 }
257
258 know (symbol_get_frag (symbolP) == &zero_address_frag);
259
260 if (*input_line_pointer != ',')
261 have_align = 0;
262 else
263 {
264 have_align = 1;
265 input_line_pointer++;
266 SKIP_WHITESPACE ();
267 }
268
269 if (! have_align || *input_line_pointer != '"')
270 {
271 if (! have_align)
272 temp = 0;
273 else
274 {
275 temp = get_absolute_expression ();
276
277 if (temp < 0)
278 {
279 temp = 0;
280 as_warn (_("Common alignment negative; 0 assumed"));
281 }
282 }
283
284 if (symbol_get_obj (symbolP)->local)
285 {
286 segT old_sec;
287 int old_subsec;
288 char *pfrag;
289 int align;
290 flagword applicable;
291
292 old_sec = now_seg;
293 old_subsec = now_subseg;
294
295 applicable = bfd_applicable_section_flags (stdoutput);
296
297 applicable &= SEC_ALLOC;
298
299 switch (area)
300 {
301 case SCOMMON_SECTION:
302 do_v850_seg (SBSS_SECTION, 0);
303 break;
304
305 case ZCOMMON_SECTION:
306 do_v850_seg (ZBSS_SECTION, 0);
307 break;
308
309 case TCOMMON_SECTION:
310 do_v850_seg (TBSS_SECTION, 0);
311 break;
312 }
313
314 if (temp)
315 {
316 /* Convert to a power of 2 alignment. */
317 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
318 ;
319
320 if (temp != 1)
321 {
322 as_bad (_("Common alignment not a power of 2"));
323 ignore_rest_of_line ();
324 return;
325 }
326 }
327 else
328 align = 0;
329
330 record_alignment (now_seg, align);
331
332 if (align)
333 frag_align (align, 0, 0);
334
335 switch (area)
336 {
337 case SCOMMON_SECTION:
338 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
339 symbol_get_frag (symbolP)->fr_symbol = 0;
340 break;
341
342 case ZCOMMON_SECTION:
343 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
344 symbol_get_frag (symbolP)->fr_symbol = 0;
345 break;
346
347 case TCOMMON_SECTION:
348 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
349 symbol_get_frag (symbolP)->fr_symbol = 0;
350 break;
351
352 default:
353 abort ();
354 }
355
356 symbol_set_frag (symbolP, frag_now);
357 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
358 (offsetT) size, (char *) 0);
359 *pfrag = 0;
360 S_SET_SIZE (symbolP, size);
361
362 switch (area)
363 {
364 case SCOMMON_SECTION:
365 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
366 break;
367
368 case ZCOMMON_SECTION:
369 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
370 break;
371
372 case TCOMMON_SECTION:
373 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
374 break;
375
376 default:
377 abort ();
378 }
379
380 S_CLEAR_EXTERNAL (symbolP);
381 obj_elf_section_change_hook ();
382 subseg_set (old_sec, old_subsec);
383 }
384 else
385 {
386 segT old_sec;
387 int old_subsec;
388
389 allocate_common:
390 old_sec = now_seg;
391 old_subsec = now_subseg;
392
393 S_SET_VALUE (symbolP, (valueT) size);
394 S_SET_ALIGN (symbolP, temp);
395 S_SET_EXTERNAL (symbolP);
396
397 switch (area)
398 {
399 case SCOMMON_SECTION:
400 case ZCOMMON_SECTION:
401 case TCOMMON_SECTION:
402 do_v850_seg (area, 0);
403 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
404 break;
405
406 default:
407 abort ();
408 }
409
410 obj_elf_section_change_hook ();
411 subseg_set (old_sec, old_subsec);
412 }
413 }
414 else
415 {
416 input_line_pointer++;
417
418 /* @@ Some use the dot, some don't. Can we get some consistency?? */
419 if (*input_line_pointer == '.')
420 input_line_pointer++;
421
422 /* @@ Some say data, some say bss. */
423 if (strncmp (input_line_pointer, "bss\"", 4)
424 && strncmp (input_line_pointer, "data\"", 5))
425 {
426 while (*--input_line_pointer != '"')
427 ;
428 input_line_pointer--;
429 goto bad_common_segment;
430 }
431
432 while (*input_line_pointer++ != '"')
433 ;
434
435 goto allocate_common;
436 }
437
438 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
439
440 demand_empty_rest_of_line ();
441 return;
442
443 {
444 bad_common_segment:
445 p = input_line_pointer;
446 while (*p && *p != '\n')
447 p++;
448 c = *p;
449 *p = '\0';
450 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
451 *p = c;
452 input_line_pointer = p;
453 ignore_rest_of_line ();
454 return;
455 }
456 }
457
458 static void
459 set_machine (int number)
460 {
461 machine = number;
462 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
463
464 switch (machine)
465 {
466 case 0: processor_mask = PROCESSOR_V850; break;
467 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
468 case bfd_mach_v850e1: processor_mask = PROCESSOR_V850E; break;
469 }
470 }
471
472 static void
473 v850_longcode (int type)
474 {
475 expressionS ex;
476
477 if (! v850_relax)
478 {
479 if (type == 1)
480 as_warn (".longcall pseudo-op seen when not relaxing");
481 else
482 as_warn (".longjump pseudo-op seen when not relaxing");
483 }
484
485 expression (&ex);
486
487 if (ex.X_op != O_symbol || ex.X_add_number != 0)
488 {
489 as_bad ("bad .longcall format");
490 ignore_rest_of_line ();
491
492 return;
493 }
494
495 if (type == 1)
496 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
497 BFD_RELOC_V850_LONGCALL);
498 else
499 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
500 BFD_RELOC_V850_LONGJUMP);
501
502 demand_empty_rest_of_line ();
503 }
504
505 /* The target specific pseudo-ops which we support. */
506 const pseudo_typeS md_pseudo_table[] =
507 {
508 { "sdata", v850_seg, SDATA_SECTION },
509 { "tdata", v850_seg, TDATA_SECTION },
510 { "zdata", v850_seg, ZDATA_SECTION },
511 { "sbss", v850_seg, SBSS_SECTION },
512 { "tbss", v850_seg, TBSS_SECTION },
513 { "zbss", v850_seg, ZBSS_SECTION },
514 { "rosdata", v850_seg, ROSDATA_SECTION },
515 { "rozdata", v850_seg, ROZDATA_SECTION },
516 { "bss", v850_seg, BSS_SECTION },
517 { "offset", v850_offset, 0 },
518 { "word", cons, 4 },
519 { "zcomm", v850_comm, ZCOMMON_SECTION },
520 { "scomm", v850_comm, SCOMMON_SECTION },
521 { "tcomm", v850_comm, TCOMMON_SECTION },
522 { "v850", set_machine, 0 },
523 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
524 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
525 { "v850e", set_machine, bfd_mach_v850e },
526 { "v850e1", set_machine, bfd_mach_v850e1 },
527 { "longcall", v850_longcode, 1 },
528 { "longjump", v850_longcode, 2 },
529 { NULL, NULL, 0 }
530 };
531
532 /* Opcode hash table. */
533 static struct hash_control *v850_hash;
534
535 /* This table is sorted. Suitable for searching by a binary search. */
536 static const struct reg_name pre_defined_registers[] =
537 {
538 { "ep", 30 }, /* ep - element ptr. */
539 { "gp", 4 }, /* gp - global ptr. */
540 { "hp", 2 }, /* hp - handler stack ptr. */
541 { "lp", 31 }, /* lp - link ptr. */
542 { "r0", 0 },
543 { "r1", 1 },
544 { "r10", 10 },
545 { "r11", 11 },
546 { "r12", 12 },
547 { "r13", 13 },
548 { "r14", 14 },
549 { "r15", 15 },
550 { "r16", 16 },
551 { "r17", 17 },
552 { "r18", 18 },
553 { "r19", 19 },
554 { "r2", 2 },
555 { "r20", 20 },
556 { "r21", 21 },
557 { "r22", 22 },
558 { "r23", 23 },
559 { "r24", 24 },
560 { "r25", 25 },
561 { "r26", 26 },
562 { "r27", 27 },
563 { "r28", 28 },
564 { "r29", 29 },
565 { "r3", 3 },
566 { "r30", 30 },
567 { "r31", 31 },
568 { "r4", 4 },
569 { "r5", 5 },
570 { "r6", 6 },
571 { "r7", 7 },
572 { "r8", 8 },
573 { "r9", 9 },
574 { "sp", 3 }, /* sp - stack ptr. */
575 { "tp", 5 }, /* tp - text ptr. */
576 { "zero", 0 },
577 };
578
579 #define REG_NAME_CNT \
580 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
581
582 static const struct reg_name system_registers[] =
583 {
584 { "asid", 23 },
585 { "bpc", 22 },
586 { "bpav", 24 },
587 { "bpam", 25 },
588 { "bpdv", 26 },
589 { "bpdm", 27 },
590 { "ctbp", 20 },
591 { "ctpc", 16 },
592 { "ctpsw", 17 },
593 { "dbpc", 18 },
594 { "dbpsw", 19 },
595 { "dir", 21 },
596 { "ecr", 4 },
597 { "eipc", 0 },
598 { "eipsw", 1 },
599 { "fepc", 2 },
600 { "fepsw", 3 },
601 { "psw", 5 },
602 };
603
604 #define SYSREG_NAME_CNT \
605 (sizeof (system_registers) / sizeof (struct reg_name))
606
607 static const struct reg_name system_list_registers[] =
608 {
609 {"PS", 5 },
610 {"SR", 0 + 1}
611 };
612
613 #define SYSREGLIST_NAME_CNT \
614 (sizeof (system_list_registers) / sizeof (struct reg_name))
615
616 static const struct reg_name cc_names[] =
617 {
618 { "c", 0x1 },
619 { "e", 0x2 },
620 { "ge", 0xe },
621 { "gt", 0xf },
622 { "h", 0xb },
623 { "l", 0x1 },
624 { "le", 0x7 },
625 { "lt", 0x6 },
626 { "n", 0x4 },
627 { "nc", 0x9 },
628 { "ne", 0xa },
629 { "nh", 0x3 },
630 { "nl", 0x9 },
631 { "ns", 0xc },
632 { "nv", 0x8 },
633 { "nz", 0xa },
634 { "p", 0xc },
635 { "s", 0x4 },
636 { "sa", 0xd },
637 { "t", 0x5 },
638 { "v", 0x0 },
639 { "z", 0x2 },
640 };
641
642 #define CC_NAME_CNT \
643 (sizeof (cc_names) / sizeof (struct reg_name))
644
645 /* Do a binary search of the given register table to see if NAME is a
646 valid regiter name. Return the register number from the array on
647 success, or -1 on failure. */
648
649 static int
650 reg_name_search (const struct reg_name *regs,
651 int regcount,
652 const char *name,
653 bfd_boolean accept_numbers)
654 {
655 int middle, low, high;
656 int cmp;
657 symbolS *symbolP;
658
659 /* If the register name is a symbol, then evaluate it. */
660 if ((symbolP = symbol_find (name)) != NULL)
661 {
662 /* If the symbol is an alias for another name then use that.
663 If the symbol is an alias for a number, then return the number. */
664 if (symbol_equated_p (symbolP))
665 name
666 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
667 else if (accept_numbers)
668 {
669 int reg = S_GET_VALUE (symbolP);
670
671 if (reg >= 0 && reg <= 31)
672 return reg;
673 }
674
675 /* Otherwise drop through and try parsing name normally. */
676 }
677
678 low = 0;
679 high = regcount - 1;
680
681 do
682 {
683 middle = (low + high) / 2;
684 cmp = strcasecmp (name, regs[middle].name);
685 if (cmp < 0)
686 high = middle - 1;
687 else if (cmp > 0)
688 low = middle + 1;
689 else
690 return regs[middle].value;
691 }
692 while (low <= high);
693 return -1;
694 }
695
696 /* Summary of register_name().
697
698 in: Input_line_pointer points to 1st char of operand.
699
700 out: An expressionS.
701 The operand may have been a register: in this case, X_op == O_register,
702 X_add_number is set to the register number, and truth is returned.
703 Input_line_pointer->(next non-blank) char after operand, or is in
704 its original state. */
705
706 static bfd_boolean
707 register_name (expressionS *expressionP)
708 {
709 int reg_number;
710 char *name;
711 char *start;
712 char c;
713
714 /* Find the spelling of the operand. */
715 start = name = input_line_pointer;
716
717 c = get_symbol_end ();
718
719 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
720 name, FALSE);
721
722 /* Put back the delimiting char. */
723 *input_line_pointer = c;
724
725 /* Look to see if it's in the register table. */
726 if (reg_number >= 0)
727 {
728 expressionP->X_op = O_register;
729 expressionP->X_add_number = reg_number;
730
731 /* Make the rest nice. */
732 expressionP->X_add_symbol = NULL;
733 expressionP->X_op_symbol = NULL;
734
735 return TRUE;
736 }
737 else
738 {
739 /* Reset the line as if we had not done anything. */
740 input_line_pointer = start;
741
742 return FALSE;
743 }
744 }
745
746 /* Summary of system_register_name().
747
748 in: INPUT_LINE_POINTER points to 1st char of operand.
749 EXPRESSIONP points to an expression structure to be filled in.
750 ACCEPT_NUMBERS is true iff numerical register names may be used.
751 ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
752 accepted.
753
754 out: An expressionS structure in expressionP.
755 The operand may have been a register: in this case, X_op == O_register,
756 X_add_number is set to the register number, and truth is returned.
757 Input_line_pointer->(next non-blank) char after operand, or is in
758 its original state. */
759
760 static bfd_boolean
761 system_register_name (expressionS *expressionP,
762 bfd_boolean accept_numbers,
763 bfd_boolean accept_list_names)
764 {
765 int reg_number;
766 char *name;
767 char *start;
768 char c;
769
770 /* Find the spelling of the operand. */
771 start = name = input_line_pointer;
772
773 c = get_symbol_end ();
774 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
775 accept_numbers);
776
777 /* Put back the delimiting char. */
778 *input_line_pointer = c;
779
780 if (reg_number < 0
781 && accept_numbers)
782 {
783 /* Reset input_line pointer. */
784 input_line_pointer = start;
785
786 if (ISDIGIT (*input_line_pointer))
787 {
788 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
789
790 /* Make sure that the register number is allowable. */
791 if (reg_number < 0
792 || (reg_number > 5 && reg_number < 16)
793 || reg_number > 27)
794 reg_number = -1;
795 }
796 else if (accept_list_names)
797 {
798 c = get_symbol_end ();
799 reg_number = reg_name_search (system_list_registers,
800 SYSREGLIST_NAME_CNT, name, FALSE);
801
802 /* Put back the delimiting char. */
803 *input_line_pointer = c;
804 }
805 }
806
807 /* Look to see if it's in the register table. */
808 if (reg_number >= 0)
809 {
810 expressionP->X_op = O_register;
811 expressionP->X_add_number = reg_number;
812
813 /* Make the rest nice. */
814 expressionP->X_add_symbol = NULL;
815 expressionP->X_op_symbol = NULL;
816
817 return TRUE;
818 }
819 else
820 {
821 /* Reset the line as if we had not done anything. */
822 input_line_pointer = start;
823
824 return FALSE;
825 }
826 }
827
828 /* Summary of cc_name().
829
830 in: INPUT_LINE_POINTER points to 1st char of operand.
831
832 out: An expressionS.
833 The operand may have been a register: in this case, X_op == O_register,
834 X_add_number is set to the register number, and truth is returned.
835 Input_line_pointer->(next non-blank) char after operand, or is in
836 its original state. */
837
838 static bfd_boolean
839 cc_name (expressionS *expressionP)
840 {
841 int reg_number;
842 char *name;
843 char *start;
844 char c;
845
846 /* Find the spelling of the operand. */
847 start = name = input_line_pointer;
848
849 c = get_symbol_end ();
850 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
851
852 /* Put back the delimiting char. */
853 *input_line_pointer = c;
854
855 /* Look to see if it's in the register table. */
856 if (reg_number >= 0)
857 {
858 expressionP->X_op = O_constant;
859 expressionP->X_add_number = reg_number;
860
861 /* Make the rest nice. */
862 expressionP->X_add_symbol = NULL;
863 expressionP->X_op_symbol = NULL;
864
865 return TRUE;
866 }
867 else
868 {
869 /* Reset the line as if we had not done anything. */
870 input_line_pointer = start;
871
872 return FALSE;
873 }
874 }
875
876 static void
877 skip_white_space (void)
878 {
879 while (*input_line_pointer == ' '
880 || *input_line_pointer == '\t')
881 ++input_line_pointer;
882 }
883
884 /* Summary of parse_register_list ().
885
886 in: INPUT_LINE_POINTER points to 1st char of a list of registers.
887 INSN is the partially constructed instruction.
888 OPERAND is the operand being inserted.
889
890 out: NULL if the parse completed successfully, otherwise a
891 pointer to an error message is returned. If the parse
892 completes the correct bit fields in the instruction
893 will be filled in.
894
895 Parses register lists with the syntax:
896
897 { rX }
898 { rX, rY }
899 { rX - rY }
900 { rX - rY, rZ }
901 etc
902
903 and also parses constant expressions whoes bits indicate the
904 registers in the lists. The LSB in the expression refers to
905 the lowest numbered permissible register in the register list,
906 and so on upwards. System registers are considered to be very
907 high numbers. */
908
909 static char *
910 parse_register_list (unsigned long *insn,
911 const struct v850_operand *operand)
912 {
913 static int type1_regs[32] =
914 {
915 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
916 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
917 };
918 static int type2_regs[32] =
919 {
920 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
921 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
922 };
923 static int type3_regs[32] =
924 {
925 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
926 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
927 };
928 int *regs;
929 expressionS exp;
930
931 /* Select a register array to parse. */
932 switch (operand->shift)
933 {
934 case 0xffe00001: regs = type1_regs; break;
935 case 0xfff8000f: regs = type2_regs; break;
936 case 0xfff8001f: regs = type3_regs; break;
937 default:
938 as_bad (_("unknown operand shift: %x\n"), operand->shift);
939 return _("internal failure in parse_register_list");
940 }
941
942 skip_white_space ();
943
944 /* If the expression starts with a curly brace it is a register list.
945 Otherwise it is a constant expression, whoes bits indicate which
946 registers are to be included in the list. */
947 if (*input_line_pointer != '{')
948 {
949 int reg;
950 int i;
951
952 expression (&exp);
953
954 if (exp.X_op != O_constant)
955 return _("constant expression or register list expected");
956
957 if (regs == type1_regs)
958 {
959 if (exp.X_add_number & 0xFFFFF000)
960 return _("high bits set in register list expression");
961
962 for (reg = 20; reg < 32; reg++)
963 if (exp.X_add_number & (1 << (reg - 20)))
964 {
965 for (i = 0; i < 32; i++)
966 if (regs[i] == reg)
967 *insn |= (1 << i);
968 }
969 }
970 else if (regs == type2_regs)
971 {
972 if (exp.X_add_number & 0xFFFE0000)
973 return _("high bits set in register list expression");
974
975 for (reg = 1; reg < 16; reg++)
976 if (exp.X_add_number & (1 << (reg - 1)))
977 {
978 for (i = 0; i < 32; i++)
979 if (regs[i] == reg)
980 *insn |= (1 << i);
981 }
982
983 if (exp.X_add_number & (1 << 15))
984 *insn |= (1 << 3);
985
986 if (exp.X_add_number & (1 << 16))
987 *insn |= (1 << 19);
988 }
989 else /* regs == type3_regs */
990 {
991 if (exp.X_add_number & 0xFFFE0000)
992 return _("high bits set in register list expression");
993
994 for (reg = 16; reg < 32; reg++)
995 if (exp.X_add_number & (1 << (reg - 16)))
996 {
997 for (i = 0; i < 32; i++)
998 if (regs[i] == reg)
999 *insn |= (1 << i);
1000 }
1001
1002 if (exp.X_add_number & (1 << 16))
1003 *insn |= (1 << 19);
1004 }
1005
1006 return NULL;
1007 }
1008
1009 input_line_pointer++;
1010
1011 /* Parse the register list until a terminator (closing curly brace or
1012 new-line) is found. */
1013 for (;;)
1014 {
1015 if (register_name (&exp))
1016 {
1017 int i;
1018
1019 /* Locate the given register in the list, and if it is there,
1020 insert the corresponding bit into the instruction. */
1021 for (i = 0; i < 32; i++)
1022 {
1023 if (regs[i] == exp.X_add_number)
1024 {
1025 *insn |= (1 << i);
1026 break;
1027 }
1028 }
1029
1030 if (i == 32)
1031 return _("illegal register included in list");
1032 }
1033 else if (system_register_name (&exp, TRUE, TRUE))
1034 {
1035 if (regs == type1_regs)
1036 {
1037 return _("system registers cannot be included in list");
1038 }
1039 else if (exp.X_add_number == 5)
1040 {
1041 if (regs == type2_regs)
1042 return _("PSW cannot be included in list");
1043 else
1044 *insn |= 0x8;
1045 }
1046 else if (exp.X_add_number < 4)
1047 *insn |= 0x80000;
1048 else
1049 return _("High value system registers cannot be included in list");
1050 }
1051 else if (*input_line_pointer == '}')
1052 {
1053 input_line_pointer++;
1054 break;
1055 }
1056 else if (*input_line_pointer == ',')
1057 {
1058 input_line_pointer++;
1059 continue;
1060 }
1061 else if (*input_line_pointer == '-')
1062 {
1063 /* We have encountered a range of registers: rX - rY. */
1064 int j;
1065 expressionS exp2;
1066
1067 /* Skip the dash. */
1068 ++input_line_pointer;
1069
1070 /* Get the second register in the range. */
1071 if (! register_name (&exp2))
1072 {
1073 return _("second register should follow dash in register list");
1074 exp2.X_add_number = exp.X_add_number;
1075 }
1076
1077 /* Add the rest of the registers in the range. */
1078 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1079 {
1080 int i;
1081
1082 /* Locate the given register in the list, and if it is there,
1083 insert the corresponding bit into the instruction. */
1084 for (i = 0; i < 32; i++)
1085 {
1086 if (regs[i] == j)
1087 {
1088 *insn |= (1 << i);
1089 break;
1090 }
1091 }
1092
1093 if (i == 32)
1094 return _("illegal register included in list");
1095 }
1096 }
1097 else
1098 break;
1099
1100 skip_white_space ();
1101 }
1102
1103 return NULL;
1104 }
1105
1106 const char *md_shortopts = "m:";
1107
1108 struct option md_longopts[] =
1109 {
1110 {NULL, no_argument, NULL, 0}
1111 };
1112
1113 size_t md_longopts_size = sizeof (md_longopts);
1114
1115 void
1116 md_show_usage (FILE *stream)
1117 {
1118 fprintf (stream, _(" V850 options:\n"));
1119 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1120 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1121 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1122 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1123 fprintf (stream, _(" -mv850e1 The code is targeted at the v850e1\n"));
1124 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1125 fprintf (stream, _(" -mrelax Enable relaxation\n"));
1126 }
1127
1128 int
1129 md_parse_option (int c, char *arg)
1130 {
1131 if (c != 'm')
1132 return 0;
1133
1134 if (strcmp (arg, "warn-signed-overflow") == 0)
1135 warn_signed_overflows = TRUE;
1136
1137 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1138 warn_unsigned_overflows = TRUE;
1139
1140 else if (strcmp (arg, "v850") == 0)
1141 {
1142 machine = 0;
1143 processor_mask = PROCESSOR_V850;
1144 }
1145 else if (strcmp (arg, "v850e") == 0)
1146 {
1147 machine = bfd_mach_v850e;
1148 processor_mask = PROCESSOR_V850E;
1149 }
1150 else if (strcmp (arg, "v850e1") == 0)
1151 {
1152 machine = bfd_mach_v850e1;
1153 processor_mask = PROCESSOR_V850E1;
1154 }
1155 else if (strcmp (arg, "v850any") == 0)
1156 {
1157 /* Tell the world that this is for any v850 chip. */
1158 machine = 0;
1159
1160 /* But support instructions for the extended versions. */
1161 processor_mask = PROCESSOR_V850E;
1162 processor_mask |= PROCESSOR_V850E1;
1163 }
1164 else if (strcmp (arg, "relax") == 0)
1165 v850_relax = 1;
1166 else
1167 return 0;
1168
1169 return 1;
1170 }
1171
1172 symbolS *
1173 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1174 {
1175 return 0;
1176 }
1177
1178 char *
1179 md_atof (int type, char *litp, int *sizep)
1180 {
1181 int prec;
1182 LITTLENUM_TYPE words[4];
1183 char *t;
1184 int i;
1185
1186 switch (type)
1187 {
1188 case 'f':
1189 prec = 2;
1190 break;
1191
1192 case 'd':
1193 prec = 4;
1194 break;
1195
1196 default:
1197 *sizep = 0;
1198 return _("bad call to md_atof");
1199 }
1200
1201 t = atof_ieee (input_line_pointer, type, words);
1202 if (t)
1203 input_line_pointer = t;
1204
1205 *sizep = prec * 2;
1206
1207 for (i = prec - 1; i >= 0; i--)
1208 {
1209 md_number_to_chars (litp, (valueT) words[i], 2);
1210 litp += 2;
1211 }
1212
1213 return NULL;
1214 }
1215
1216 /* Very gross. */
1217
1218 void
1219 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
1220 asection *sec,
1221 fragS *fragP)
1222 {
1223 /* This code performs some nasty type punning between the
1224 fr_opcode field of the frag structure (a char *) and the
1225 fx_r_type field of the fix structure (a bfd_reloc_code_real_type)
1226 On a 64bit host this causes problems because these two fields
1227 are not the same size, but since we know that we are only
1228 ever storing small integers in the fields, it is safe to use
1229 a union to convert between them. */
1230 union u
1231 {
1232 bfd_reloc_code_real_type fx_r_type;
1233 char * fr_opcode;
1234 }
1235 opcode_converter;
1236 subseg_change (sec, 0);
1237
1238 opcode_converter.fr_opcode = fragP->fr_opcode;
1239
1240 /* In range conditional or unconditional branch. */
1241 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1242 {
1243 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1244 fragP->fr_offset, 1,
1245 BFD_RELOC_UNUSED + opcode_converter.fx_r_type);
1246 fragP->fr_fix += 2;
1247 }
1248 /* Out of range conditional branch. Emit a branch around a jump. */
1249 else if (fragP->fr_subtype == 1)
1250 {
1251 unsigned char *buffer =
1252 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1253
1254 /* Reverse the condition of the first branch. */
1255 buffer[0] ^= 0x08;
1256 /* Mask off all the displacement bits. */
1257 buffer[0] &= 0x8f;
1258 buffer[1] &= 0x07;
1259 /* Now set the displacement bits so that we branch
1260 around the unconditional branch. */
1261 buffer[0] |= 0x30;
1262
1263 /* Now create the unconditional branch + fixup to the final
1264 target. */
1265 md_number_to_chars ((char *) buffer + 2, 0x00000780, 4);
1266 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1267 fragP->fr_offset, 1,
1268 BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1);
1269 fragP->fr_fix += 6;
1270 }
1271 /* Out of range unconditional branch. Emit a jump. */
1272 else if (fragP->fr_subtype == 3)
1273 {
1274 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1275 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1276 fragP->fr_offset, 1,
1277 BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1);
1278 fragP->fr_fix += 4;
1279 }
1280 else
1281 abort ();
1282 }
1283
1284 valueT
1285 md_section_align (asection *seg, valueT addr)
1286 {
1287 int align = bfd_get_section_alignment (stdoutput, seg);
1288 return ((addr + (1 << align) - 1) & (-1 << align));
1289 }
1290
1291 void
1292 md_begin (void)
1293 {
1294 char *prev_name = "";
1295 const struct v850_opcode *op;
1296
1297 if (strncmp (TARGET_CPU, "v850e1", 6) == 0)
1298 {
1299 if (machine == -1)
1300 machine = bfd_mach_v850e1;
1301
1302 if (processor_mask == -1)
1303 processor_mask = PROCESSOR_V850E1;
1304 }
1305 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1306 {
1307 if (machine == -1)
1308 machine = bfd_mach_v850e;
1309
1310 if (processor_mask == -1)
1311 processor_mask = PROCESSOR_V850E;
1312 }
1313 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
1314 {
1315 if (machine == -1)
1316 machine = 0;
1317
1318 if (processor_mask == -1)
1319 processor_mask = PROCESSOR_V850;
1320 }
1321 else
1322 /* xgettext:c-format */
1323 as_bad (_("Unable to determine default target processor from string: %s"),
1324 TARGET_CPU);
1325
1326 v850_hash = hash_new ();
1327
1328 /* Insert unique names into hash table. The V850 instruction set
1329 has many identical opcode names that have different opcodes based
1330 on the operands. This hash table then provides a quick index to
1331 the first opcode with a particular name in the opcode table. */
1332 op = v850_opcodes;
1333 while (op->name)
1334 {
1335 if (strcmp (prev_name, op->name))
1336 {
1337 prev_name = (char *) op->name;
1338 hash_insert (v850_hash, op->name, (char *) op);
1339 }
1340 op++;
1341 }
1342
1343 v850_seg_table[BSS_SECTION].s = bss_section;
1344 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1345 }
1346
1347 static bfd_reloc_code_real_type
1348 handle_lo16 (const struct v850_operand *operand)
1349 {
1350 if (operand != NULL)
1351 {
1352 if (operand->bits == -1)
1353 return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
1354
1355 if (!(operand->bits == 16 && operand->shift == 16)
1356 && !(operand->bits == 15 && operand->shift == 17))
1357 {
1358 as_bad (_("lo() relocation used on an instruction which does "
1359 "not support it"));
1360 return BFD_RELOC_64; /* Used to indicate an error condition. */
1361 }
1362 }
1363 return BFD_RELOC_LO16;
1364 }
1365
1366 static bfd_reloc_code_real_type
1367 handle_ctoff (const struct v850_operand *operand)
1368 {
1369 if (operand == NULL)
1370 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1371
1372 if (operand->bits != 6
1373 || operand->shift != 0)
1374 {
1375 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1376 return BFD_RELOC_64; /* Used to indicate an error condition. */
1377 }
1378
1379 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1380 }
1381
1382 static bfd_reloc_code_real_type
1383 handle_sdaoff (const struct v850_operand *operand)
1384 {
1385 if (operand == NULL)
1386 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1387
1388 if (operand->bits == 15 && operand->shift == 17)
1389 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1390
1391 if (operand->bits == -1)
1392 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1393
1394 if (operand->bits != 16
1395 || operand->shift != 16)
1396 {
1397 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1398 return BFD_RELOC_64; /* Used to indicate an error condition. */
1399 }
1400
1401 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1402 }
1403
1404 static bfd_reloc_code_real_type
1405 handle_zdaoff (const struct v850_operand *operand)
1406 {
1407 if (operand == NULL)
1408 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1409
1410 if (operand->bits == 15 && operand->shift == 17)
1411 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1412
1413 if (operand->bits == -1)
1414 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1415
1416 if (operand->bits != 16
1417 || operand->shift != 16)
1418 {
1419 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1420 /* Used to indicate an error condition. */
1421 return BFD_RELOC_64;
1422 }
1423
1424 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1425 }
1426
1427 static bfd_reloc_code_real_type
1428 handle_tdaoff (const struct v850_operand *operand)
1429 {
1430 if (operand == NULL)
1431 /* Data item, not an instruction. */
1432 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1433
1434 if (operand->bits == 6 && operand->shift == 1)
1435 /* sld.w/sst.w, operand: D8_6. */
1436 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1437
1438 if (operand->bits == 4 && operand->insert != NULL)
1439 /* sld.hu, operand: D5-4. */
1440 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1441
1442 if (operand->bits == 4 && operand->insert == NULL)
1443 /* sld.bu, operand: D4. */
1444 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1445
1446 if (operand->bits == 16 && operand->shift == 16)
1447 /* set1 & chums, operands: D16. */
1448 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1449
1450 if (operand->bits != 7)
1451 {
1452 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1453 /* Used to indicate an error condition. */
1454 return BFD_RELOC_64;
1455 }
1456
1457 return operand->insert != NULL
1458 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7. */
1459 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, operand: D7. */
1460 }
1461
1462 /* Warning: The code in this function relies upon the definitions
1463 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1464 matching the hard coded values contained herein. */
1465
1466 static bfd_reloc_code_real_type
1467 v850_reloc_prefix (const struct v850_operand *operand)
1468 {
1469 bfd_boolean paren_skipped = FALSE;
1470
1471 /* Skip leading opening parenthesis. */
1472 if (*input_line_pointer == '(')
1473 {
1474 ++input_line_pointer;
1475 paren_skipped = TRUE;
1476 }
1477
1478 #define CHECK_(name, reloc) \
1479 if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \
1480 { \
1481 input_line_pointer += strlen (name); \
1482 return reloc; \
1483 }
1484
1485 CHECK_ ("hi0", BFD_RELOC_HI16 );
1486 CHECK_ ("hi", BFD_RELOC_HI16_S );
1487 CHECK_ ("lo", handle_lo16 (operand) );
1488 CHECK_ ("sdaoff", handle_sdaoff (operand));
1489 CHECK_ ("zdaoff", handle_zdaoff (operand));
1490 CHECK_ ("tdaoff", handle_tdaoff (operand));
1491 CHECK_ ("hilo", BFD_RELOC_32 );
1492 CHECK_ ("ctoff", handle_ctoff (operand) );
1493
1494 /* Restore skipped parenthesis. */
1495 if (paren_skipped)
1496 --input_line_pointer;
1497
1498 return BFD_RELOC_UNUSED;
1499 }
1500
1501 /* Insert an operand value into an instruction. */
1502
1503 static unsigned long
1504 v850_insert_operand (unsigned long insn,
1505 const struct v850_operand *operand,
1506 offsetT val,
1507 char *file,
1508 unsigned int line,
1509 char *str)
1510 {
1511 if (operand->insert)
1512 {
1513 const char *message = NULL;
1514
1515 insn = operand->insert (insn, val, &message);
1516 if (message != NULL)
1517 {
1518 if ((operand->flags & V850_OPERAND_SIGNED)
1519 && ! warn_signed_overflows
1520 && strstr (message, "out of range") != NULL)
1521 {
1522 /* Skip warning... */
1523 }
1524 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1525 && ! warn_unsigned_overflows
1526 && strstr (message, "out of range") != NULL)
1527 {
1528 /* Skip warning... */
1529 }
1530 else if (str)
1531 {
1532 if (file == (char *) NULL)
1533 as_warn ("%s: %s", str, message);
1534 else
1535 as_warn_where (file, line, "%s: %s", str, message);
1536 }
1537 else
1538 {
1539 if (file == (char *) NULL)
1540 as_warn (message);
1541 else
1542 as_warn_where (file, line, message);
1543 }
1544 }
1545 }
1546 else
1547 {
1548 if (operand->bits != 32)
1549 {
1550 long min, max;
1551
1552 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1553 {
1554 if (! warn_signed_overflows)
1555 max = (1 << operand->bits) - 1;
1556 else
1557 max = (1 << (operand->bits - 1)) - 1;
1558
1559 min = -(1 << (operand->bits - 1));
1560 }
1561 else
1562 {
1563 max = (1 << operand->bits) - 1;
1564
1565 if (! warn_unsigned_overflows)
1566 min = -(1 << (operand->bits - 1));
1567 else
1568 min = 0;
1569 }
1570
1571 if (val < (offsetT) min || val > (offsetT) max)
1572 {
1573 char buf [128];
1574
1575 /* Restore min and mix to expected values for decimal ranges. */
1576 if ((operand->flags & V850_OPERAND_SIGNED)
1577 && ! warn_signed_overflows)
1578 max = (1 << (operand->bits - 1)) - 1;
1579
1580 if (! (operand->flags & V850_OPERAND_SIGNED)
1581 && ! warn_unsigned_overflows)
1582 min = 0;
1583
1584 if (str)
1585 sprintf (buf, "%s: ", str);
1586 else
1587 buf[0] = 0;
1588 strcat (buf, _("operand"));
1589
1590 as_bad_value_out_of_range (buf, val, (offsetT) min, (offsetT) max, file, line);
1591 }
1592 }
1593
1594 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1595 }
1596
1597 return insn;
1598 }
1599 \f
1600 static char copy_of_instruction[128];
1601
1602 void
1603 md_assemble (char *str)
1604 {
1605 char *s;
1606 char *start_of_operands;
1607 struct v850_opcode *opcode;
1608 struct v850_opcode *next_opcode;
1609 const unsigned char *opindex_ptr;
1610 int next_opindex;
1611 int relaxable = 0;
1612 unsigned long insn;
1613 unsigned long insn_size;
1614 char *f;
1615 int i;
1616 int match;
1617 bfd_boolean extra_data_after_insn = FALSE;
1618 unsigned extra_data_len = 0;
1619 unsigned long extra_data = 0;
1620 char *saved_input_line_pointer;
1621
1622 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1623
1624 /* Get the opcode. */
1625 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
1626 continue;
1627
1628 if (*s != '\0')
1629 *s++ = '\0';
1630
1631 /* Find the first opcode with the proper name. */
1632 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1633 if (opcode == NULL)
1634 {
1635 /* xgettext:c-format */
1636 as_bad (_("Unrecognized opcode: `%s'"), str);
1637 ignore_rest_of_line ();
1638 return;
1639 }
1640
1641 str = s;
1642 while (ISSPACE (*str))
1643 ++str;
1644
1645 start_of_operands = str;
1646
1647 saved_input_line_pointer = input_line_pointer;
1648
1649 for (;;)
1650 {
1651 const char *errmsg = NULL;
1652
1653 match = 0;
1654
1655 if ((opcode->processors & processor_mask) == 0)
1656 {
1657 errmsg = _("Target processor does not support this instruction.");
1658 goto error;
1659 }
1660
1661 relaxable = 0;
1662 fc = 0;
1663 next_opindex = 0;
1664 insn = opcode->opcode;
1665 extra_data_after_insn = FALSE;
1666
1667 input_line_pointer = str = start_of_operands;
1668
1669 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
1670 {
1671 const struct v850_operand *operand;
1672 char *hold;
1673 expressionS ex;
1674 bfd_reloc_code_real_type reloc;
1675
1676 if (next_opindex == 0)
1677 operand = &v850_operands[*opindex_ptr];
1678 else
1679 {
1680 operand = &v850_operands[next_opindex];
1681 next_opindex = 0;
1682 }
1683
1684 errmsg = NULL;
1685
1686 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1687 ++str;
1688
1689 if (operand->flags & V850_OPERAND_RELAX)
1690 relaxable = 1;
1691
1692 /* Gather the operand. */
1693 hold = input_line_pointer;
1694 input_line_pointer = str;
1695
1696 /* lo(), hi(), hi0(), etc... */
1697 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1698 {
1699 /* This is a fake reloc, used to indicate an error condition. */
1700 if (reloc == BFD_RELOC_64)
1701 {
1702 match = 1;
1703 goto error;
1704 }
1705
1706 expression (&ex);
1707
1708 if (ex.X_op == O_constant)
1709 {
1710 switch (reloc)
1711 {
1712 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1713 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1714 and the like. */
1715 /* Fall through. */
1716
1717 case BFD_RELOC_LO16:
1718 case BFD_RELOC_V850_LO16_SPLIT_OFFSET:
1719 {
1720 /* Truncate, then sign extend the value. */
1721 ex.X_add_number = SEXT16 (ex.X_add_number);
1722 break;
1723 }
1724
1725 case BFD_RELOC_HI16:
1726 {
1727 /* Truncate, then sign extend the value. */
1728 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1729 break;
1730 }
1731
1732 case BFD_RELOC_HI16_S:
1733 {
1734 /* Truncate, then sign extend the value. */
1735 int temp = (ex.X_add_number >> 16) & 0xffff;
1736
1737 temp += (ex.X_add_number >> 15) & 1;
1738
1739 ex.X_add_number = SEXT16 (temp);
1740 break;
1741 }
1742
1743 case BFD_RELOC_32:
1744 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1745 {
1746 errmsg = _("immediate operand is too large");
1747 goto error;
1748 }
1749
1750 extra_data_after_insn = TRUE;
1751 extra_data_len = 4;
1752 extra_data = 0;
1753 break;
1754
1755 default:
1756 fprintf (stderr, "reloc: %d\n", reloc);
1757 as_bad (_("AAARG -> unhandled constant reloc"));
1758 break;
1759 }
1760
1761 if (fc > MAX_INSN_FIXUPS)
1762 as_fatal (_("too many fixups"));
1763
1764 fixups[fc].exp = ex;
1765 fixups[fc].opindex = *opindex_ptr;
1766 fixups[fc].reloc = reloc;
1767 fc++;
1768 }
1769 else
1770 {
1771 if (reloc == BFD_RELOC_32)
1772 {
1773 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1774 {
1775 errmsg = _("immediate operand is too large");
1776 goto error;
1777 }
1778
1779 extra_data_after_insn = TRUE;
1780 extra_data_len = 4;
1781 extra_data = ex.X_add_number;
1782 }
1783
1784 if (fc > MAX_INSN_FIXUPS)
1785 as_fatal (_("too many fixups"));
1786
1787 fixups[fc].exp = ex;
1788 fixups[fc].opindex = *opindex_ptr;
1789 fixups[fc].reloc = reloc;
1790 fc++;
1791 }
1792 }
1793 else
1794 {
1795 errmsg = NULL;
1796
1797 if ((operand->flags & V850_OPERAND_REG) != 0)
1798 {
1799 if (!register_name (&ex))
1800 errmsg = _("invalid register name");
1801 else if ((operand->flags & V850_NOT_R0)
1802 && ex.X_add_number == 0)
1803 {
1804 errmsg = _("register r0 cannot be used here");
1805
1806 /* Force an error message to be generated by
1807 skipping over any following potential matches
1808 for this opcode. */
1809 opcode += 3;
1810 }
1811 }
1812 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1813 {
1814 if (!system_register_name (&ex, TRUE, FALSE))
1815 errmsg = _("invalid system register name");
1816 }
1817 else if ((operand->flags & V850_OPERAND_EP) != 0)
1818 {
1819 char *start = input_line_pointer;
1820 char c = get_symbol_end ();
1821
1822 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1823 {
1824 /* Put things back the way we found them. */
1825 *input_line_pointer = c;
1826 input_line_pointer = start;
1827 errmsg = _("expected EP register");
1828 goto error;
1829 }
1830
1831 *input_line_pointer = c;
1832 str = input_line_pointer;
1833 input_line_pointer = hold;
1834
1835 while (*str == ' ' || *str == ','
1836 || *str == '[' || *str == ']')
1837 ++str;
1838 continue;
1839 }
1840 else if ((operand->flags & V850_OPERAND_CC) != 0)
1841 {
1842 if (!cc_name (&ex))
1843 errmsg = _("invalid condition code name");
1844 }
1845 else if (operand->flags & V850E_PUSH_POP)
1846 {
1847 errmsg = parse_register_list (&insn, operand);
1848
1849 /* The parse_register_list() function has already done
1850 everything, so fake a dummy expression. */
1851 ex.X_op = O_constant;
1852 ex.X_add_number = 0;
1853 }
1854 else if (operand->flags & V850E_IMMEDIATE16)
1855 {
1856 expression (&ex);
1857
1858 if (ex.X_op != O_constant)
1859 errmsg = _("constant expression expected");
1860 else if (ex.X_add_number & 0xffff0000)
1861 {
1862 if (ex.X_add_number & 0xffff)
1863 errmsg = _("constant too big to fit into instruction");
1864 else if ((insn & 0x001fffc0) == 0x00130780)
1865 ex.X_add_number >>= 16;
1866 else
1867 errmsg = _("constant too big to fit into instruction");
1868 }
1869
1870 extra_data_after_insn = TRUE;
1871 extra_data_len = 2;
1872 extra_data = ex.X_add_number;
1873 ex.X_add_number = 0;
1874 }
1875 else if (operand->flags & V850E_IMMEDIATE32)
1876 {
1877 expression (&ex);
1878
1879 if (ex.X_op != O_constant)
1880 errmsg = _("constant expression expected");
1881
1882 extra_data_after_insn = TRUE;
1883 extra_data_len = 4;
1884 extra_data = ex.X_add_number;
1885 ex.X_add_number = 0;
1886 }
1887 else if (register_name (&ex)
1888 && (operand->flags & V850_OPERAND_REG) == 0)
1889 {
1890 char c;
1891 int exists = 0;
1892
1893 /* It is possible that an alias has been defined that
1894 matches a register name. For example the code may
1895 include a ".set ZERO, 0" directive, which matches
1896 the register name "zero". Attempt to reparse the
1897 field as an expression, and only complain if we
1898 cannot generate a constant. */
1899
1900 input_line_pointer = str;
1901
1902 c = get_symbol_end ();
1903
1904 if (symbol_find (str) != NULL)
1905 exists = 1;
1906
1907 *input_line_pointer = c;
1908 input_line_pointer = str;
1909
1910 expression (&ex);
1911
1912 if (ex.X_op != O_constant)
1913 {
1914 /* If this register is actually occurring too early on
1915 the parsing of the instruction, (because another
1916 field is missing) then report this. */
1917 if (opindex_ptr[1] != 0
1918 && (v850_operands[opindex_ptr[1]].flags
1919 & V850_OPERAND_REG))
1920 errmsg = _("syntax error: value is missing before the register name");
1921 else
1922 errmsg = _("syntax error: register not expected");
1923
1924 /* If we created a symbol in the process of this
1925 test then delete it now, so that it will not
1926 be output with the real symbols... */
1927 if (exists == 0
1928 && ex.X_op == O_symbol)
1929 symbol_remove (ex.X_add_symbol,
1930 &symbol_rootP, &symbol_lastP);
1931 }
1932 }
1933 else if (system_register_name (&ex, FALSE, FALSE)
1934 && (operand->flags & V850_OPERAND_SRG) == 0)
1935 errmsg = _("syntax error: system register not expected");
1936
1937 else if (cc_name (&ex)
1938 && (operand->flags & V850_OPERAND_CC) == 0)
1939 errmsg = _("syntax error: condition code not expected");
1940
1941 else
1942 {
1943 expression (&ex);
1944 /* Special case:
1945 If we are assembling a MOV instruction and the immediate
1946 value does not fit into the bits available then create a
1947 fake error so that the next MOV instruction will be
1948 selected. This one has a 32 bit immediate field. */
1949
1950 if (((insn & 0x07e0) == 0x0200)
1951 && operand->bits == 5 /* Do not match the CALLT instruction. */
1952 && ex.X_op == O_constant
1953 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
1954 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
1955 errmsg = _("immediate operand is too large");
1956 }
1957
1958 if (errmsg)
1959 goto error;
1960
1961 switch (ex.X_op)
1962 {
1963 case O_illegal:
1964 errmsg = _("illegal operand");
1965 goto error;
1966 case O_absent:
1967 errmsg = _("missing operand");
1968 goto error;
1969 case O_register:
1970 if ((operand->flags
1971 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
1972 {
1973 errmsg = _("invalid operand");
1974 goto error;
1975 }
1976 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1977 NULL, 0, copy_of_instruction);
1978 break;
1979
1980 case O_constant:
1981 insn = v850_insert_operand (insn, operand, ex.X_add_number,
1982 NULL, 0, copy_of_instruction);
1983 break;
1984
1985 default:
1986 /* We need to generate a fixup for this expression. */
1987 if (fc >= MAX_INSN_FIXUPS)
1988 as_fatal (_("too many fixups"));
1989
1990 fixups[fc].exp = ex;
1991 fixups[fc].opindex = *opindex_ptr;
1992 fixups[fc].reloc = BFD_RELOC_UNUSED;
1993 ++fc;
1994 break;
1995 }
1996 }
1997
1998 str = input_line_pointer;
1999 input_line_pointer = hold;
2000
2001 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2002 || *str == ')')
2003 ++str;
2004 }
2005 match = 1;
2006
2007 error:
2008 if (match == 0)
2009 {
2010 next_opcode = opcode + 1;
2011 if (next_opcode->name != NULL
2012 && strcmp (next_opcode->name, opcode->name) == 0)
2013 {
2014 opcode = next_opcode;
2015
2016 /* Skip versions that are not supported by the target
2017 processor. */
2018 if ((opcode->processors & processor_mask) == 0)
2019 goto error;
2020
2021 continue;
2022 }
2023
2024 as_bad ("%s: %s", copy_of_instruction, errmsg);
2025
2026 if (*input_line_pointer == ']')
2027 ++input_line_pointer;
2028
2029 ignore_rest_of_line ();
2030 input_line_pointer = saved_input_line_pointer;
2031 return;
2032 }
2033 break;
2034 }
2035
2036 while (ISSPACE (*str))
2037 ++str;
2038
2039 if (*str != '\0')
2040 /* xgettext:c-format */
2041 as_bad (_("junk at end of line: `%s'"), str);
2042
2043 input_line_pointer = str;
2044
2045 /* Tie dwarf2 debug info to the address at the start of the insn.
2046 We can't do this after the insn has been output as the current
2047 frag may have been closed off. eg. by frag_var. */
2048 dwarf2_emit_insn (0);
2049
2050 /* Write out the instruction. */
2051
2052 if (relaxable && fc > 0)
2053 {
2054 /* On a 64-bit host the size of an 'int' is not the same
2055 as the size of a pointer, so we need a union to convert
2056 the opindex field of the fr_cgen structure into a char *
2057 so that it can be stored in the frag. We do not have
2058 to worry about loosing accuracy as we are not going to
2059 be even close to the 32bit limit of the int. */
2060 union
2061 {
2062 int opindex;
2063 char * ptr;
2064 }
2065 opindex_converter;
2066
2067 opindex_converter.opindex = fixups[0].opindex;
2068 insn_size = 2;
2069 fc = 0;
2070
2071 if (!strcmp (opcode->name, "br"))
2072 {
2073 f = frag_var (rs_machine_dependent, 4, 2, 2,
2074 fixups[0].exp.X_add_symbol,
2075 fixups[0].exp.X_add_number,
2076 opindex_converter.ptr);
2077 md_number_to_chars (f, insn, insn_size);
2078 md_number_to_chars (f + 2, 0, 2);
2079 }
2080 else
2081 {
2082 f = frag_var (rs_machine_dependent, 6, 4, 0,
2083 fixups[0].exp.X_add_symbol,
2084 fixups[0].exp.X_add_number,
2085 opindex_converter.ptr);
2086 md_number_to_chars (f, insn, insn_size);
2087 md_number_to_chars (f + 2, 0, 4);
2088 }
2089 }
2090 else
2091 {
2092 /* Four byte insns have an opcode with the two high bits on. */
2093 if ((insn & 0x0600) == 0x0600)
2094 insn_size = 4;
2095 else
2096 insn_size = 2;
2097
2098 /* Special case: 32 bit MOV. */
2099 if ((insn & 0xffe0) == 0x0620)
2100 insn_size = 2;
2101
2102 f = frag_more (insn_size);
2103 md_number_to_chars (f, insn, insn_size);
2104
2105 if (extra_data_after_insn)
2106 {
2107 f = frag_more (extra_data_len);
2108 md_number_to_chars (f, extra_data, extra_data_len);
2109
2110 extra_data_after_insn = FALSE;
2111 }
2112 }
2113
2114 /* Create any fixups. At this point we do not use a
2115 bfd_reloc_code_real_type, but instead just use the
2116 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2117 handle fixups for any operand type, although that is admittedly
2118 not a very exciting feature. We pick a BFD reloc type in
2119 md_apply_fix. */
2120 for (i = 0; i < fc; i++)
2121 {
2122 const struct v850_operand *operand;
2123 bfd_reloc_code_real_type reloc;
2124
2125 operand = &v850_operands[fixups[i].opindex];
2126
2127 reloc = fixups[i].reloc;
2128
2129 if (reloc != BFD_RELOC_UNUSED)
2130 {
2131 reloc_howto_type *reloc_howto =
2132 bfd_reloc_type_lookup (stdoutput, reloc);
2133 int size;
2134 int address;
2135 fixS *fixP;
2136
2137 if (!reloc_howto)
2138 abort ();
2139
2140 size = bfd_get_reloc_size (reloc_howto);
2141
2142 /* XXX This will abort on an R_V850_8 reloc -
2143 is this reloc actually used? */
2144 if (size != 2 && size != 4)
2145 abort ();
2146
2147 address = (f - frag_now->fr_literal) + insn_size - size;
2148
2149 if (reloc == BFD_RELOC_32)
2150 address += 2;
2151
2152 fixP = fix_new_exp (frag_now, address, size,
2153 &fixups[i].exp,
2154 reloc_howto->pc_relative,
2155 reloc);
2156
2157 fixP->tc_fix_data = (void *) operand;
2158
2159 switch (reloc)
2160 {
2161 case BFD_RELOC_LO16:
2162 case BFD_RELOC_V850_LO16_SPLIT_OFFSET:
2163 case BFD_RELOC_HI16:
2164 case BFD_RELOC_HI16_S:
2165 fixP->fx_no_overflow = 1;
2166 break;
2167 default:
2168 break;
2169 }
2170 }
2171 else
2172 {
2173 fix_new_exp (frag_now,
2174 f - frag_now->fr_literal, 4,
2175 & fixups[i].exp,
2176 (operand->flags & V850_OPERAND_DISP) != 0,
2177 (bfd_reloc_code_real_type) (fixups[i].opindex
2178 + (int) BFD_RELOC_UNUSED));
2179 }
2180 }
2181
2182 input_line_pointer = saved_input_line_pointer;
2183 }
2184
2185 /* If while processing a fixup, a reloc really needs to be created
2186 then it is done here. */
2187
2188 arelent *
2189 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2190 {
2191 arelent *reloc;
2192
2193 reloc = xmalloc (sizeof (arelent));
2194 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2195 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2196 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2197
2198 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2199 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2200 || fixp->fx_r_type == BFD_RELOC_V850_LONGCALL
2201 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP
2202 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN)
2203 reloc->addend = fixp->fx_offset;
2204 else
2205 {
2206 if (fixp->fx_r_type == BFD_RELOC_32
2207 && fixp->fx_pcrel)
2208 fixp->fx_r_type = BFD_RELOC_32_PCREL;
2209
2210 reloc->addend = fixp->fx_addnumber;
2211 }
2212
2213 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2214
2215 if (reloc->howto == NULL)
2216 {
2217 as_bad_where (fixp->fx_file, fixp->fx_line,
2218 /* xgettext:c-format */
2219 _("reloc %d not supported by object file format"),
2220 (int) fixp->fx_r_type);
2221
2222 xfree (reloc);
2223
2224 return NULL;
2225 }
2226
2227 return reloc;
2228 }
2229
2230 void
2231 v850_handle_align (fragS * frag)
2232 {
2233 if (v850_relax
2234 && frag->fr_type == rs_align
2235 && frag->fr_address + frag->fr_fix > 0
2236 && frag->fr_offset > 1
2237 && now_seg != bss_section
2238 && now_seg != v850_seg_table[SBSS_SECTION].s
2239 && now_seg != v850_seg_table[TBSS_SECTION].s
2240 && now_seg != v850_seg_table[ZBSS_SECTION].s)
2241 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
2242 BFD_RELOC_V850_ALIGN);
2243 }
2244
2245 /* Return current size of variable part of frag. */
2246
2247 int
2248 md_estimate_size_before_relax (fragS *fragp, asection *seg ATTRIBUTE_UNUSED)
2249 {
2250 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2251 abort ();
2252
2253 return md_relax_table[fragp->fr_subtype].rlx_length;
2254 }
2255
2256 long
2257 v850_pcrel_from_section (fixS *fixp, segT section)
2258 {
2259 /* If the symbol is undefined, or in a section other than our own,
2260 or it is weak (in which case it may well be in another section,
2261 then let the linker figure it out. */
2262 if (fixp->fx_addsy != (symbolS *) NULL
2263 && (! S_IS_DEFINED (fixp->fx_addsy)
2264 || S_IS_WEAK (fixp->fx_addsy)
2265 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
2266 return 0;
2267
2268 return fixp->fx_frag->fr_address + fixp->fx_where;
2269 }
2270
2271 void
2272 md_apply_fix (fixS *fixP, valueT *valueP, segT seg ATTRIBUTE_UNUSED)
2273 {
2274 valueT value = * valueP;
2275 char *where;
2276
2277 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2278 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2279 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP
2280 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2281 {
2282 fixP->fx_done = 0;
2283 return;
2284 }
2285
2286 if (fixP->fx_addsy == (symbolS *) NULL)
2287 fixP->fx_addnumber = value,
2288 fixP->fx_done = 1;
2289
2290 else if (fixP->fx_pcrel)
2291 fixP->fx_addnumber = fixP->fx_offset;
2292
2293 else
2294 {
2295 value = fixP->fx_offset;
2296 if (fixP->fx_subsy != (symbolS *) NULL)
2297 {
2298 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2299 value -= S_GET_VALUE (fixP->fx_subsy);
2300 else
2301 /* We don't actually support subtracting a symbol. */
2302 as_bad_where (fixP->fx_file, fixP->fx_line,
2303 _("expression too complex"));
2304 }
2305 fixP->fx_addnumber = value;
2306 }
2307
2308 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
2309 {
2310 int opindex;
2311 const struct v850_operand *operand;
2312 unsigned long insn;
2313
2314 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
2315 operand = &v850_operands[opindex];
2316
2317 /* Fetch the instruction, insert the fully resolved operand
2318 value, and stuff the instruction back again.
2319
2320 Note the instruction has been stored in little endian
2321 format! */
2322 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2323
2324 insn = bfd_getl32 ((unsigned char *) where);
2325 insn = v850_insert_operand (insn, operand, (offsetT) value,
2326 fixP->fx_file, fixP->fx_line, NULL);
2327 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2328
2329 if (fixP->fx_done)
2330 /* Nothing else to do here. */
2331 return;
2332
2333 /* Determine a BFD reloc value based on the operand information.
2334 We are only prepared to turn a few of the operands into relocs. */
2335
2336 if (operand->bits == 22)
2337 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
2338 else if (operand->bits == 9)
2339 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
2340 else
2341 {
2342 as_bad_where (fixP->fx_file, fixP->fx_line,
2343 _("unresolved expression that must be resolved"));
2344 fixP->fx_done = 1;
2345 return;
2346 }
2347 }
2348 else if (fixP->fx_done)
2349 {
2350 /* We still have to insert the value into memory! */
2351 where = fixP->fx_frag->fr_literal + fixP->fx_where;
2352
2353 if (fixP->tc_fix_data != NULL
2354 && ((struct v850_operand *) fixP->tc_fix_data)->insert != NULL)
2355 {
2356 const char * message = NULL;
2357 struct v850_operand * operand = (struct v850_operand *) fixP->tc_fix_data;
2358 unsigned long insn;
2359
2360 /* The variable "where" currently points at the exact point inside
2361 the insn where we need to insert the value. But we need to
2362 extract the entire insn so we probably need to move "where"
2363 back a few bytes. */
2364 if (fixP->fx_size == 2)
2365 where -= 2;
2366 else if (fixP->fx_size == 1)
2367 where -= 3;
2368
2369 insn = bfd_getl32 ((unsigned char *) where);
2370
2371 /* Use the operand's insertion procedure, if present, in order to
2372 make sure that the value is correctly stored in the insn. */
2373 insn = operand->insert (insn, (offsetT) value, & message);
2374 /* Ignore message even if it is set. */
2375
2376 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2377 }
2378 else
2379 {
2380 if (fixP->fx_r_type == BFD_RELOC_V850_LO16_SPLIT_OFFSET)
2381 bfd_putl32 (((value << 16) & 0xfffe0000)
2382 | ((value << 5) & 0x20)
2383 | (bfd_getl32 (where) & ~0xfffe0020), where);
2384 else if (fixP->fx_size == 1)
2385 *where = value & 0xff;
2386 else if (fixP->fx_size == 2)
2387 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2388 else if (fixP->fx_size == 4)
2389 bfd_putl32 (value, (unsigned char *) where);
2390 }
2391 }
2392 }
2393 \f
2394 /* Parse a cons expression. We have to handle hi(), lo(), etc
2395 on the v850. */
2396
2397 void
2398 parse_cons_expression_v850 (expressionS *exp)
2399 {
2400 /* See if there's a reloc prefix like hi() we have to handle. */
2401 hold_cons_reloc = v850_reloc_prefix (NULL);
2402
2403 /* Do normal expression parsing. */
2404 expression (exp);
2405 }
2406
2407 /* Create a fixup for a cons expression. If parse_cons_expression_v850
2408 found a reloc prefix, then we use that reloc, else we choose an
2409 appropriate one based on the size of the expression. */
2410
2411 void
2412 cons_fix_new_v850 (fragS *frag,
2413 int where,
2414 int size,
2415 expressionS *exp)
2416 {
2417 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2418 {
2419 if (size == 4)
2420 hold_cons_reloc = BFD_RELOC_32;
2421 if (size == 2)
2422 hold_cons_reloc = BFD_RELOC_16;
2423 if (size == 1)
2424 hold_cons_reloc = BFD_RELOC_8;
2425 }
2426
2427 if (exp != NULL)
2428 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2429 else
2430 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2431
2432 hold_cons_reloc = BFD_RELOC_UNUSED;
2433 }
2434
2435 bfd_boolean
2436 v850_fix_adjustable (fixS *fixP)
2437 {
2438 if (fixP->fx_addsy == NULL)
2439 return 1;
2440
2441 /* Don't adjust function names. */
2442 if (S_IS_FUNCTION (fixP->fx_addsy))
2443 return 0;
2444
2445 /* We need the symbol name for the VTABLE entries. */
2446 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2447 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2448 return 0;
2449
2450 return 1;
2451 }
2452
2453 int
2454 v850_force_relocation (struct fix *fixP)
2455 {
2456 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2457 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP)
2458 return 1;
2459
2460 if (v850_relax
2461 && (fixP->fx_pcrel
2462 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN
2463 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL
2464 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL
2465 || fixP->fx_r_type >= BFD_RELOC_UNUSED))
2466 return 1;
2467
2468 return generic_force_reloc (fixP);
2469 }
GDB Binutils - Deliverables
This page took 0.080555 seconds and 5 git commands to generate.