1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2019 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "xtensa-config.h"
31 #include "elf/xtensa.h"
33 /* Provide default values for new configuration settings. */
39 #define uint32 unsigned int
42 #define int32 signed int
47 Naming conventions (used somewhat inconsistently):
48 The xtensa_ functions are exported
49 The xg_ functions are internal
51 We also have a couple of different extensibility mechanisms.
52 1) The idiom replacement:
53 This is used when a line is first parsed to
54 replace an instruction pattern with another instruction
55 It is currently limited to replacements of instructions
56 with constant operands.
57 2) The xtensa-relax.c mechanism that has stronger instruction
58 replacement patterns. When an instruction's immediate field
59 does not fit the next instruction sequence is attempted.
60 In addition, "narrow" opcodes are supported this way. */
63 /* Define characters with special meanings to GAS. */
64 const char comment_chars
[] = "#";
65 const char line_comment_chars
[] = "#";
66 const char line_separator_chars
[] = ";";
67 const char EXP_CHARS
[] = "eE";
68 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
71 /* Flags to indicate whether the hardware supports the density and
72 absolute literals options. */
74 bfd_boolean density_supported
;
75 bfd_boolean absolute_literals_supported
;
77 static vliw_insn cur_vinsn
;
79 unsigned xtensa_num_pipe_stages
;
80 unsigned xtensa_fetch_width
;
82 static enum debug_info_type xt_saved_debug_type
= DEBUG_NONE
;
84 /* Some functions are only valid in the front end. This variable
85 allows us to assert that we haven't crossed over into the
87 static bfd_boolean past_xtensa_end
= FALSE
;
89 /* Flags for properties of the last instruction in a segment. */
90 #define FLAG_IS_A0_WRITER 0x1
91 #define FLAG_IS_BAD_LOOPEND 0x2
94 /* We define a special segment names ".literal" to place literals
95 into. The .fini and .init sections are special because they
96 contain code that is moved together by the linker. We give them
97 their own special .fini.literal and .init.literal sections. */
99 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
100 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
101 #define INIT_SECTION_NAME xtensa_section_rename (".init")
102 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
105 /* This type is used for the directive_stack to keep track of the
106 state of the literal collection pools. If lit_prefix is set, it is
107 used to determine the literal section names; otherwise, the literal
108 sections are determined based on the current text section. The
109 lit_seg and lit4_seg fields cache these literal sections, with the
110 current_text_seg field used a tag to indicate whether the cached
113 typedef struct lit_state_struct
116 segT current_text_seg
;
121 static lit_state default_lit_sections
;
124 /* We keep a list of literal segments. The seg_list type is the node
125 for this list. The literal_head pointer is the head of the list,
126 with the literal_head_h dummy node at the start. */
128 typedef struct seg_list_struct
130 struct seg_list_struct
*next
;
134 static seg_list literal_head_h
;
135 static seg_list
*literal_head
= &literal_head_h
;
138 /* Lists of symbols. We keep a list of symbols that label the current
139 instruction, so that we can adjust the symbols when inserting alignment
140 for various instructions. We also keep a list of all the symbols on
141 literals, so that we can fix up those symbols when the literals are
142 later moved into the text sections. */
144 typedef struct sym_list_struct
146 struct sym_list_struct
*next
;
150 static sym_list
*insn_labels
= NULL
;
151 static sym_list
*free_insn_labels
= NULL
;
152 static sym_list
*saved_insn_labels
= NULL
;
154 static sym_list
*literal_syms
;
157 /* Flags to determine whether to prefer const16 or l32r
158 if both options are available. */
159 int prefer_const16
= 0;
162 /* Global flag to indicate when we are emitting literals. */
163 int generating_literals
= 0;
165 /* The following PROPERTY table definitions are copied from
166 <elf/xtensa.h> and must be kept in sync with the code there. */
168 /* Flags in the property tables to specify whether blocks of memory
169 are literals, instructions, data, or unreachable. For
170 instructions, blocks that begin loop targets and branch targets are
171 designated. Blocks that do not allow density, instruction
172 reordering or transformation are also specified. Finally, for
173 branch targets, branch target alignment priority is included.
174 Alignment of the next block is specified in the current block
175 and the size of the current block does not include any fill required
176 to align to the next block. */
178 #define XTENSA_PROP_LITERAL 0x00000001
179 #define XTENSA_PROP_INSN 0x00000002
180 #define XTENSA_PROP_DATA 0x00000004
181 #define XTENSA_PROP_UNREACHABLE 0x00000008
182 /* Instruction only properties at beginning of code. */
183 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
184 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
185 /* Instruction only properties about code. */
186 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
187 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
188 /* Historically, NO_TRANSFORM was a property of instructions,
189 but it should apply to literals under certain circumstances. */
190 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
192 /* Branch target alignment information. This transmits information
193 to the linker optimization about the priority of aligning a
194 particular block for branch target alignment: None, low priority,
195 high priority, or required. These only need to be checked in
196 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
199 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
200 case XTENSA_PROP_BT_ALIGN_NONE:
201 case XTENSA_PROP_BT_ALIGN_LOW:
202 case XTENSA_PROP_BT_ALIGN_HIGH:
203 case XTENSA_PROP_BT_ALIGN_REQUIRE:
205 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
207 /* No branch target alignment. */
208 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
209 /* Low priority branch target alignment. */
210 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
211 /* High priority branch target alignment. */
212 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
213 /* Required branch target alignment. */
214 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
216 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
217 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
218 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
221 /* Alignment is specified in the block BEFORE the one that needs
222 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
223 get the required alignment specified as a power of 2. Use
224 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
225 alignment. Be careful of side effects since the SET will evaluate
226 flags twice. Also, note that the SIZE of a block in the property
227 table does not include the alignment size, so the alignment fill
228 must be calculated to determine if two blocks are contiguous.
229 TEXT_ALIGN is not currently implemented but is a placeholder for a
230 possible future implementation. */
232 #define XTENSA_PROP_ALIGN 0x00000800
234 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
236 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
237 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
238 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
240 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
243 /* Structure for saving instruction and alignment per-fragment data
244 that will be written to the object file. This structure is
245 equivalent to the actual data that will be written out to the file
246 but is easier to use. We provide a conversion to file flags
247 in frag_flags_to_number. */
249 typedef struct frag_flags_struct frag_flags
;
251 struct frag_flags_struct
253 /* is_literal should only be used after xtensa_move_literals.
254 If you need to check if you are generating a literal fragment,
255 then use the generating_literals global. */
257 unsigned is_literal
: 1;
258 unsigned is_insn
: 1;
259 unsigned is_data
: 1;
260 unsigned is_unreachable
: 1;
262 /* is_specific_opcode implies no_transform. */
263 unsigned is_no_transform
: 1;
267 unsigned is_loop_target
: 1;
268 unsigned is_branch_target
: 1; /* Branch targets have a priority. */
269 unsigned bt_align_priority
: 2;
271 unsigned is_no_density
: 1;
272 /* no_longcalls flag does not need to be placed in the object file. */
274 unsigned is_no_reorder
: 1;
276 /* Uses absolute literal addressing for l32r. */
277 unsigned is_abslit
: 1;
279 unsigned is_align
: 1;
280 unsigned alignment
: 5;
284 /* Structure for saving information about a block of property data
285 for frags that have the same flags. */
286 struct xtensa_block_info_struct
292 struct xtensa_block_info_struct
*next
;
296 /* Structure for saving the current state before emitting literals. */
297 typedef struct emit_state_struct
302 int generating_literals
;
306 /* Opcode placement information */
308 typedef unsigned long long bitfield
;
309 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
310 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
311 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
313 #define MAX_FORMATS 32
315 typedef struct op_placement_info_struct
318 /* A number describing how restrictive the issue is for this
319 opcode. For example, an opcode that fits lots of different
320 formats has a high freedom, as does an opcode that fits
321 only one format but many slots in that format. The most
322 restrictive is the opcode that fits only one slot in one
325 xtensa_format narrowest
;
329 /* formats is a bitfield with the Nth bit set
330 if the opcode fits in the Nth xtensa_format. */
333 /* slots[N]'s Mth bit is set if the op fits in the
334 Mth slot of the Nth xtensa_format. */
335 bitfield slots
[MAX_FORMATS
];
337 /* A count of the number of slots in a given format
338 an op can fit (i.e., the bitcount of the slot field above). */
339 char slots_in_format
[MAX_FORMATS
];
341 } op_placement_info
, *op_placement_info_table
;
343 op_placement_info_table op_placement_table
;
346 /* Extra expression types. */
348 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
349 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
350 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
351 #define O_pcrel O_md4 /* value is a PC-relative offset */
352 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
353 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
354 #define O_tlscall O_md7 /* TLS_CALL relocation */
355 #define O_tpoff O_md8 /* TPOFF relocation */
356 #define O_dtpoff O_md9 /* DTPOFF relocation */
358 struct suffix_reloc_map
362 bfd_reloc_code_real_type reloc
;
366 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
368 static struct suffix_reloc_map suffix_relocs
[] =
370 SUFFIX_MAP ("l", BFD_RELOC_LO16
, O_lo16
),
371 SUFFIX_MAP ("h", BFD_RELOC_HI16
, O_hi16
),
372 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT
, O_pltrel
),
373 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL
, O_pcrel
),
374 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC
, O_tlsfunc
),
375 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG
, O_tlsarg
),
376 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL
, O_tlscall
),
377 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF
, O_tpoff
),
378 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF
, O_dtpoff
),
392 directive_literal_prefix
,
394 directive_absolute_literals
,
395 directive_last_directive
401 bfd_boolean can_be_negated
;
404 const directive_infoS directive_info
[] =
407 { "literal", FALSE
},
409 { "transform", TRUE
},
410 { "freeregs", FALSE
},
411 { "longcalls", TRUE
},
412 { "literal_prefix", FALSE
},
413 { "schedule", TRUE
},
414 { "absolute-literals", TRUE
}
417 bfd_boolean directive_state
[] =
422 TRUE
, /* transform */
423 FALSE
, /* freeregs */
424 FALSE
, /* longcalls */
425 FALSE
, /* literal_prefix */
426 FALSE
, /* schedule */
427 FALSE
/* absolute_literals */
430 /* A circular list of all potential and actual literal pool locations
434 struct litpool_frag
*next
;
435 struct litpool_frag
*prev
;
438 short priority
; /* 1, 2, or 3 -- 1 is highest */
439 short original_priority
;
443 /* Map a segment to its litpool_frag list. */
446 struct litpool_seg
*next
;
448 struct litpool_frag frag_list
;
449 int frag_count
; /* since last litpool location */
452 static struct litpool_seg litpool_seg_list
;
454 /* Limit maximal size of auto litpool by half of the j range. */
455 #define MAX_AUTO_POOL_LITERALS 16384
457 /* Limit maximal size of explicit literal pool by l32r range. */
458 #define MAX_EXPLICIT_POOL_LITERALS 65536
460 #define MAX_POOL_LITERALS \
461 (auto_litpools ? MAX_AUTO_POOL_LITERALS : MAX_EXPLICIT_POOL_LITERALS)
463 /* Directive functions. */
465 static void xtensa_begin_directive (int);
466 static void xtensa_end_directive (int);
467 static void xtensa_literal_prefix (void);
468 static void xtensa_literal_position (int);
469 static void xtensa_literal_pseudo (int);
470 static void xtensa_frequency_pseudo (int);
471 static void xtensa_elf_cons (int);
472 static void xtensa_leb128 (int);
474 /* Parsing and Idiom Translation. */
476 static bfd_reloc_code_real_type
xtensa_elf_suffix (char **, expressionS
*);
478 /* Various Other Internal Functions. */
480 extern bfd_boolean
xg_is_single_relaxable_insn (TInsn
*, TInsn
*, bfd_boolean
);
481 static bfd_boolean
xg_build_to_insn (TInsn
*, TInsn
*, BuildInstr
*);
482 static void xtensa_mark_literal_pool_location (void);
483 static addressT
get_expanded_loop_offset (xtensa_opcode
);
484 static fragS
*get_literal_pool_location (segT
);
485 static void set_literal_pool_location (segT
, fragS
*);
486 static void xtensa_set_frag_assembly_state (fragS
*);
487 static void finish_vinsn (vliw_insn
*);
488 static bfd_boolean
emit_single_op (TInsn
*);
489 static int total_frag_text_expansion (fragS
*);
490 static bfd_boolean use_trampolines
= TRUE
;
491 static void xtensa_check_frag_count (void);
492 static void xtensa_create_trampoline_frag (bfd_boolean
);
493 static void xtensa_maybe_create_trampoline_frag (void);
494 struct trampoline_frag
;
495 static int init_trampoline_frag (fragS
*);
496 static fixS
*xg_append_jump (fragS
*fragP
, symbolS
*sym
, offsetT offset
);
497 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean
, bfd_boolean
);
498 static bfd_boolean auto_litpools
= FALSE
;
499 static int auto_litpool_limit
= 0;
500 static bfd_boolean
xtensa_is_init_fini (segT seg
);
502 /* Alignment Functions. */
504 static int get_text_align_power (unsigned);
505 static int get_text_align_max_fill_size (int, bfd_boolean
, bfd_boolean
);
506 static int branch_align_power (segT
);
508 /* Helpers for xtensa_relax_frag(). */
510 static long relax_frag_add_nop (fragS
*);
512 /* Accessors for additional per-subsegment information. */
514 static unsigned get_last_insn_flags (segT
, subsegT
);
515 static void set_last_insn_flags (segT
, subsegT
, unsigned, bfd_boolean
);
516 static float get_subseg_total_freq (segT
, subsegT
);
517 static float get_subseg_target_freq (segT
, subsegT
);
518 static void set_subseg_freq (segT
, subsegT
, float, float);
520 /* Segment list functions. */
522 static void xtensa_move_literals (void);
523 static void xtensa_reorder_segments (void);
524 static void xtensa_switch_to_literal_fragment (emit_state
*);
525 static void xtensa_switch_to_non_abs_literal_fragment (emit_state
*);
526 static void xtensa_switch_section_emit_state (emit_state
*, segT
, subsegT
);
527 static void xtensa_restore_emit_state (emit_state
*);
528 static segT
cache_literal_section (bfd_boolean
);
530 /* op_placement_info functions. */
532 static void init_op_placement_info_table (void);
533 extern bfd_boolean
opcode_fits_format_slot (xtensa_opcode
, xtensa_format
, int);
534 static int xg_get_single_size (xtensa_opcode
);
535 static xtensa_format
xg_get_single_format (xtensa_opcode
);
536 static int xg_get_single_slot (xtensa_opcode
);
538 /* TInsn and IStack functions. */
540 static bfd_boolean
tinsn_has_symbolic_operands (const TInsn
*);
541 static bfd_boolean
tinsn_has_invalid_symbolic_operands (const TInsn
*);
542 static bfd_boolean
tinsn_has_complex_operands (const TInsn
*);
543 static bfd_boolean
tinsn_to_insnbuf (TInsn
*, xtensa_insnbuf
);
544 static bfd_boolean
tinsn_check_arguments (const TInsn
*);
545 static void tinsn_from_chars (TInsn
*, char *, int);
546 static void tinsn_immed_from_frag (TInsn
*, fragS
*, int);
547 static int get_num_stack_text_bytes (IStack
*);
548 static int get_num_stack_literal_bytes (IStack
*);
549 static bfd_boolean
tinsn_to_slotbuf (xtensa_format
, int, TInsn
*, xtensa_insnbuf
);
551 /* vliw_insn functions. */
553 static void xg_init_vinsn (vliw_insn
*);
554 static void xg_copy_vinsn (vliw_insn
*, vliw_insn
*);
555 static void xg_clear_vinsn (vliw_insn
*);
556 static bfd_boolean
vinsn_has_specific_opcodes (vliw_insn
*);
557 static void xg_free_vinsn (vliw_insn
*);
558 static bfd_boolean vinsn_to_insnbuf
559 (vliw_insn
*, char *, fragS
*, bfd_boolean
);
560 static void vinsn_from_chars (vliw_insn
*, char *);
562 /* Expression Utilities. */
564 bfd_boolean
expr_is_const (const expressionS
*);
565 offsetT
get_expr_const (const expressionS
*);
566 void set_expr_const (expressionS
*, offsetT
);
567 bfd_boolean
expr_is_register (const expressionS
*);
568 offsetT
get_expr_register (const expressionS
*);
569 void set_expr_symbol_offset (expressionS
*, symbolS
*, offsetT
);
570 bfd_boolean
expr_is_equal (expressionS
*, expressionS
*);
571 static void copy_expr (expressionS
*, const expressionS
*);
573 /* Section renaming. */
575 static void build_section_rename (const char *);
578 /* ISA imported from bfd. */
579 extern xtensa_isa xtensa_default_isa
;
581 extern int target_big_endian
;
583 static xtensa_opcode xtensa_addi_opcode
;
584 static xtensa_opcode xtensa_addmi_opcode
;
585 static xtensa_opcode xtensa_call0_opcode
;
586 static xtensa_opcode xtensa_call4_opcode
;
587 static xtensa_opcode xtensa_call8_opcode
;
588 static xtensa_opcode xtensa_call12_opcode
;
589 static xtensa_opcode xtensa_callx0_opcode
;
590 static xtensa_opcode xtensa_callx4_opcode
;
591 static xtensa_opcode xtensa_callx8_opcode
;
592 static xtensa_opcode xtensa_callx12_opcode
;
593 static xtensa_opcode xtensa_const16_opcode
;
594 static xtensa_opcode xtensa_entry_opcode
;
595 static xtensa_opcode xtensa_extui_opcode
;
596 static xtensa_opcode xtensa_movi_opcode
;
597 static xtensa_opcode xtensa_movi_n_opcode
;
598 static xtensa_opcode xtensa_isync_opcode
;
599 static xtensa_opcode xtensa_j_opcode
;
600 static xtensa_opcode xtensa_jx_opcode
;
601 static xtensa_opcode xtensa_l32r_opcode
;
602 static xtensa_opcode xtensa_loop_opcode
;
603 static xtensa_opcode xtensa_loopnez_opcode
;
604 static xtensa_opcode xtensa_loopgtz_opcode
;
605 static xtensa_opcode xtensa_nop_opcode
;
606 static xtensa_opcode xtensa_nop_n_opcode
;
607 static xtensa_opcode xtensa_or_opcode
;
608 static xtensa_opcode xtensa_ret_opcode
;
609 static xtensa_opcode xtensa_ret_n_opcode
;
610 static xtensa_opcode xtensa_retw_opcode
;
611 static xtensa_opcode xtensa_retw_n_opcode
;
612 static xtensa_opcode xtensa_rsr_lcount_opcode
;
613 static xtensa_opcode xtensa_waiti_opcode
;
614 static int config_max_slots
= 0;
617 /* Command-line Options. */
619 bfd_boolean use_literal_section
= TRUE
;
620 enum flix_level produce_flix
= FLIX_ALL
;
621 static bfd_boolean align_targets
= TRUE
;
622 static bfd_boolean warn_unaligned_branch_targets
= FALSE
;
623 static bfd_boolean has_a0_b_retw
= FALSE
;
624 static bfd_boolean workaround_a0_b_retw
= FALSE
;
625 static bfd_boolean workaround_b_j_loop_end
= FALSE
;
626 static bfd_boolean workaround_short_loop
= FALSE
;
627 static bfd_boolean maybe_has_short_loop
= FALSE
;
628 static bfd_boolean workaround_close_loop_end
= FALSE
;
629 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
630 static bfd_boolean enforce_three_byte_loop_align
= FALSE
;
632 /* When workaround_short_loops is TRUE, all loops with early exits must
633 have at least 3 instructions. workaround_all_short_loops is a modifier
634 to the workaround_short_loop flag. In addition to the
635 workaround_short_loop actions, all straightline loopgtz and loopnez
636 must have at least 3 instructions. */
638 static bfd_boolean workaround_all_short_loops
= FALSE
;
640 /* Generate individual property section for every section.
641 This option is defined in BDF library. */
642 extern bfd_boolean elf32xtensa_separate_props
;
645 xtensa_setup_hw_workarounds (int earliest
, int latest
)
647 if (earliest
> latest
)
648 as_fatal (_("illegal range of target hardware versions"));
650 /* Enable all workarounds for pre-T1050.0 hardware. */
651 if (earliest
< 105000 || latest
< 105000)
653 workaround_a0_b_retw
|= TRUE
;
654 workaround_b_j_loop_end
|= TRUE
;
655 workaround_short_loop
|= TRUE
;
656 workaround_close_loop_end
|= TRUE
;
657 workaround_all_short_loops
|= TRUE
;
658 enforce_three_byte_loop_align
= TRUE
;
665 option_density
= OPTION_MD_BASE
,
669 option_no_generate_flix
,
676 option_no_link_relax
,
684 option_text_section_literals
,
685 option_no_text_section_literals
,
687 option_absolute_literals
,
688 option_no_absolute_literals
,
690 option_align_targets
,
691 option_no_align_targets
,
693 option_warn_unaligned_targets
,
698 option_workaround_a0_b_retw
,
699 option_no_workaround_a0_b_retw
,
701 option_workaround_b_j_loop_end
,
702 option_no_workaround_b_j_loop_end
,
704 option_workaround_short_loop
,
705 option_no_workaround_short_loop
,
707 option_workaround_all_short_loops
,
708 option_no_workaround_all_short_loops
,
710 option_workaround_close_loop_end
,
711 option_no_workaround_close_loop_end
,
713 option_no_workarounds
,
715 option_rename_section_name
,
718 option_prefer_const16
,
720 option_target_hardware
,
723 option_no_trampolines
,
725 option_auto_litpools
,
726 option_no_auto_litpools
,
727 option_auto_litpool_limit
,
729 option_separate_props
,
730 option_no_separate_props
,
733 const char *md_shortopts
= "";
735 struct option md_longopts
[] =
737 { "density", no_argument
, NULL
, option_density
},
738 { "no-density", no_argument
, NULL
, option_no_density
},
740 { "flix", no_argument
, NULL
, option_flix
},
741 { "no-generate-flix", no_argument
, NULL
, option_no_generate_flix
},
742 { "no-allow-flix", no_argument
, NULL
, option_no_flix
},
744 /* Both "relax" and "generics" are deprecated and treated as equivalent
745 to the "transform" option. */
746 { "relax", no_argument
, NULL
, option_relax
},
747 { "no-relax", no_argument
, NULL
, option_no_relax
},
748 { "generics", no_argument
, NULL
, option_generics
},
749 { "no-generics", no_argument
, NULL
, option_no_generics
},
751 { "transform", no_argument
, NULL
, option_transform
},
752 { "no-transform", no_argument
, NULL
, option_no_transform
},
753 { "text-section-literals", no_argument
, NULL
, option_text_section_literals
},
754 { "no-text-section-literals", no_argument
, NULL
,
755 option_no_text_section_literals
},
756 { "absolute-literals", no_argument
, NULL
, option_absolute_literals
},
757 { "no-absolute-literals", no_argument
, NULL
, option_no_absolute_literals
},
758 /* This option was changed from -align-target to -target-align
759 because it conflicted with the "-al" option. */
760 { "target-align", no_argument
, NULL
, option_align_targets
},
761 { "no-target-align", no_argument
, NULL
, option_no_align_targets
},
762 { "warn-unaligned-targets", no_argument
, NULL
,
763 option_warn_unaligned_targets
},
764 { "longcalls", no_argument
, NULL
, option_longcalls
},
765 { "no-longcalls", no_argument
, NULL
, option_no_longcalls
},
767 { "no-workaround-a0-b-retw", no_argument
, NULL
,
768 option_no_workaround_a0_b_retw
},
769 { "workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
771 { "no-workaround-b-j-loop-end", no_argument
, NULL
,
772 option_no_workaround_b_j_loop_end
},
773 { "workaround-b-j-loop-end", no_argument
, NULL
,
774 option_workaround_b_j_loop_end
},
776 { "no-workaround-short-loops", no_argument
, NULL
,
777 option_no_workaround_short_loop
},
778 { "workaround-short-loops", no_argument
, NULL
,
779 option_workaround_short_loop
},
781 { "no-workaround-all-short-loops", no_argument
, NULL
,
782 option_no_workaround_all_short_loops
},
783 { "workaround-all-short-loop", no_argument
, NULL
,
784 option_workaround_all_short_loops
},
786 { "prefer-l32r", no_argument
, NULL
, option_prefer_l32r
},
787 { "prefer-const16", no_argument
, NULL
, option_prefer_const16
},
789 { "no-workarounds", no_argument
, NULL
, option_no_workarounds
},
791 { "no-workaround-close-loop-end", no_argument
, NULL
,
792 option_no_workaround_close_loop_end
},
793 { "workaround-close-loop-end", no_argument
, NULL
,
794 option_workaround_close_loop_end
},
796 { "rename-section", required_argument
, NULL
, option_rename_section_name
},
798 { "link-relax", no_argument
, NULL
, option_link_relax
},
799 { "no-link-relax", no_argument
, NULL
, option_no_link_relax
},
801 { "target-hardware", required_argument
, NULL
, option_target_hardware
},
803 { "trampolines", no_argument
, NULL
, option_trampolines
},
804 { "no-trampolines", no_argument
, NULL
, option_no_trampolines
},
806 { "auto-litpools", no_argument
, NULL
, option_auto_litpools
},
807 { "no-auto-litpools", no_argument
, NULL
, option_no_auto_litpools
},
808 { "auto-litpool-limit", required_argument
, NULL
, option_auto_litpool_limit
},
810 { "separate-prop-tables", no_argument
, NULL
, option_separate_props
},
812 { NULL
, no_argument
, NULL
, 0 }
815 size_t md_longopts_size
= sizeof md_longopts
;
819 md_parse_option (int c
, const char *arg
)
824 as_warn (_("--density option is ignored"));
826 case option_no_density
:
827 as_warn (_("--no-density option is ignored"));
829 case option_link_relax
:
832 case option_no_link_relax
:
836 produce_flix
= FLIX_ALL
;
838 case option_no_generate_flix
:
839 produce_flix
= FLIX_NO_GENERATE
;
842 produce_flix
= FLIX_NONE
;
844 case option_generics
:
845 as_warn (_("--generics is deprecated; use --transform instead"));
846 return md_parse_option (option_transform
, arg
);
847 case option_no_generics
:
848 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
849 return md_parse_option (option_no_transform
, arg
);
851 as_warn (_("--relax is deprecated; use --transform instead"));
852 return md_parse_option (option_transform
, arg
);
853 case option_no_relax
:
854 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
855 return md_parse_option (option_no_transform
, arg
);
856 case option_longcalls
:
857 directive_state
[directive_longcalls
] = TRUE
;
859 case option_no_longcalls
:
860 directive_state
[directive_longcalls
] = FALSE
;
862 case option_text_section_literals
:
863 use_literal_section
= FALSE
;
865 case option_no_text_section_literals
:
866 use_literal_section
= TRUE
;
868 case option_absolute_literals
:
869 if (!absolute_literals_supported
)
871 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
874 directive_state
[directive_absolute_literals
] = TRUE
;
876 case option_no_absolute_literals
:
877 directive_state
[directive_absolute_literals
] = FALSE
;
880 case option_workaround_a0_b_retw
:
881 workaround_a0_b_retw
= TRUE
;
883 case option_no_workaround_a0_b_retw
:
884 workaround_a0_b_retw
= FALSE
;
886 case option_workaround_b_j_loop_end
:
887 workaround_b_j_loop_end
= TRUE
;
889 case option_no_workaround_b_j_loop_end
:
890 workaround_b_j_loop_end
= FALSE
;
893 case option_workaround_short_loop
:
894 workaround_short_loop
= TRUE
;
896 case option_no_workaround_short_loop
:
897 workaround_short_loop
= FALSE
;
900 case option_workaround_all_short_loops
:
901 workaround_all_short_loops
= TRUE
;
903 case option_no_workaround_all_short_loops
:
904 workaround_all_short_loops
= FALSE
;
907 case option_workaround_close_loop_end
:
908 workaround_close_loop_end
= TRUE
;
910 case option_no_workaround_close_loop_end
:
911 workaround_close_loop_end
= FALSE
;
914 case option_no_workarounds
:
915 workaround_a0_b_retw
= FALSE
;
916 workaround_b_j_loop_end
= FALSE
;
917 workaround_short_loop
= FALSE
;
918 workaround_all_short_loops
= FALSE
;
919 workaround_close_loop_end
= FALSE
;
922 case option_align_targets
:
923 align_targets
= TRUE
;
925 case option_no_align_targets
:
926 align_targets
= FALSE
;
929 case option_warn_unaligned_targets
:
930 warn_unaligned_branch_targets
= TRUE
;
933 case option_rename_section_name
:
934 build_section_rename (arg
);
938 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
939 should be emitted or not. FIXME: Not implemented. */
942 case option_prefer_l32r
:
944 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
948 case option_prefer_const16
:
950 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
954 case option_target_hardware
:
956 int earliest
, latest
= 0;
958 if (*arg
== 0 || *arg
== '-')
959 as_fatal (_("invalid target hardware version"));
961 earliest
= strtol (arg
, &end
, 0);
965 else if (*end
== '-')
968 as_fatal (_("invalid target hardware version"));
969 latest
= strtol (end
, &end
, 0);
972 as_fatal (_("invalid target hardware version"));
974 xtensa_setup_hw_workarounds (earliest
, latest
);
978 case option_transform
:
979 /* This option has no affect other than to use the defaults,
980 which are already set. */
983 case option_no_transform
:
984 /* This option turns off all transformations of any kind.
985 However, because we want to preserve the state of other
986 directives, we only change its own field. Thus, before
987 you perform any transformation, always check if transform
988 is available. If you use the functions we provide for this
989 purpose, you will be ok. */
990 directive_state
[directive_transform
] = FALSE
;
993 case option_trampolines
:
994 use_trampolines
= TRUE
;
997 case option_no_trampolines
:
998 use_trampolines
= FALSE
;
1001 case option_auto_litpools
:
1002 auto_litpools
= TRUE
;
1003 use_literal_section
= FALSE
;
1004 if (auto_litpool_limit
<= 0)
1005 auto_litpool_limit
= MAX_AUTO_POOL_LITERALS
/ 2;
1008 case option_no_auto_litpools
:
1009 auto_litpools
= FALSE
;
1010 auto_litpool_limit
= -1;
1013 case option_auto_litpool_limit
:
1017 if (auto_litpool_limit
< 0)
1018 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
1019 if (*arg
== 0 || *arg
== '-')
1020 as_fatal (_("invalid auto-litpool-limit argument"));
1021 value
= strtol (arg
, &end
, 10);
1023 as_fatal (_("invalid auto-litpool-limit argument"));
1024 if (value
< 100 || value
> 10000)
1025 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1026 auto_litpool_limit
= value
;
1027 auto_litpools
= TRUE
;
1028 use_literal_section
= FALSE
;
1032 case option_separate_props
:
1033 elf32xtensa_separate_props
= TRUE
;
1036 case option_no_separate_props
:
1037 elf32xtensa_separate_props
= FALSE
;
1047 md_show_usage (FILE *stream
)
1051 --[no-]text-section-literals\n\
1052 [Do not] put literals in the text section\n\
1053 --[no-]absolute-literals\n\
1054 [Do not] default to use non-PC-relative literals\n\
1055 --[no-]target-align [Do not] try to align branch targets\n\
1056 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1057 --[no-]transform [Do not] transform instructions\n\
1058 --flix both allow hand-written and generate flix bundles\n\
1059 --no-generate-flix allow hand-written but do not generate\n\
1061 --no-allow-flix neither allow hand-written nor generate\n\
1063 --rename-section old=new Rename section 'old' to 'new'\n\
1064 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1065 when jumps do not reach their targets\n\
1066 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1067 --auto-litpool-limit=<value>\n\
1068 (range 100-10000) Maximum number of blocks of\n\
1069 instructions to emit between literal pool\n\
1070 locations; implies --auto-litpools flag\n\
1071 --[no-]separate-prop-tables\n\
1072 [Do not] place Xtensa property records into\n\
1073 individual property sections for each section.\n\
1074 Default is to generate single property section.\n", stream
);
1078 /* Functions related to the list of current label symbols. */
1081 xtensa_add_insn_label (symbolS
*sym
)
1085 if (!free_insn_labels
)
1086 l
= XNEW (sym_list
);
1089 l
= free_insn_labels
;
1090 free_insn_labels
= l
->next
;
1094 l
->next
= insn_labels
;
1100 xtensa_clear_insn_labels (void)
1104 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
1112 xtensa_move_labels (fragS
*new_frag
, valueT new_offset
)
1116 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
1118 symbolS
*lit_sym
= lit
->sym
;
1119 S_SET_VALUE (lit_sym
, new_offset
);
1120 symbol_set_frag (lit_sym
, new_frag
);
1125 /* Directive data and functions. */
1127 typedef struct state_stackS_struct
1129 directiveE directive
;
1130 bfd_boolean negated
;
1131 bfd_boolean old_state
;
1135 struct state_stackS_struct
*prev
;
1138 state_stackS
*directive_state_stack
;
1140 const pseudo_typeS md_pseudo_table
[] =
1142 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1143 { "literal_position", xtensa_literal_position
, 0 },
1144 { "frame", s_ignore
, 0 }, /* Formerly used for STABS debugging. */
1145 { "long", xtensa_elf_cons
, 4 },
1146 { "word", xtensa_elf_cons
, 4 },
1147 { "4byte", xtensa_elf_cons
, 4 },
1148 { "short", xtensa_elf_cons
, 2 },
1149 { "2byte", xtensa_elf_cons
, 2 },
1150 { "sleb128", xtensa_leb128
, 1},
1151 { "uleb128", xtensa_leb128
, 0},
1152 { "begin", xtensa_begin_directive
, 0 },
1153 { "end", xtensa_end_directive
, 0 },
1154 { "literal", xtensa_literal_pseudo
, 0 },
1155 { "frequency", xtensa_frequency_pseudo
, 0 },
1161 use_transform (void)
1163 /* After md_end, you should be checking frag by frag, rather
1164 than state directives. */
1165 gas_assert (!past_xtensa_end
);
1166 return directive_state
[directive_transform
];
1171 do_align_targets (void)
1173 /* Do not use this function after md_end; just look at align_targets
1174 instead. There is no target-align directive, so alignment is either
1175 enabled for all frags or not done at all. */
1176 gas_assert (!past_xtensa_end
);
1177 return align_targets
&& use_transform ();
1182 directive_push (directiveE directive
, bfd_boolean negated
, const void *datum
)
1186 state_stackS
*stack
= XNEW (state_stackS
);
1188 file
= as_where (&line
);
1190 stack
->directive
= directive
;
1191 stack
->negated
= negated
;
1192 stack
->old_state
= directive_state
[directive
];
1195 stack
->datum
= datum
;
1196 stack
->prev
= directive_state_stack
;
1197 directive_state_stack
= stack
;
1199 directive_state
[directive
] = !negated
;
1204 directive_pop (directiveE
*directive
,
1205 bfd_boolean
*negated
,
1210 state_stackS
*top
= directive_state_stack
;
1212 if (!directive_state_stack
)
1214 as_bad (_("unmatched .end directive"));
1215 *directive
= directive_none
;
1219 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1220 *directive
= top
->directive
;
1221 *negated
= top
->negated
;
1224 *datum
= top
->datum
;
1225 directive_state_stack
= top
->prev
;
1231 directive_balance (void)
1233 while (directive_state_stack
)
1235 directiveE directive
;
1236 bfd_boolean negated
;
1241 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1242 as_warn_where ((char *) file
, line
,
1243 _(".begin directive with no matching .end directive"));
1249 inside_directive (directiveE dir
)
1251 state_stackS
*top
= directive_state_stack
;
1253 while (top
&& top
->directive
!= dir
)
1256 return (top
!= NULL
);
1261 get_directive (directiveE
*directive
, bfd_boolean
*negated
)
1265 const char *directive_string
;
1267 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1272 input_line_pointer
+= 3;
1275 len
= strspn (input_line_pointer
,
1276 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1278 /* This code is a hack to make .begin [no-][generics|relax] exactly
1279 equivalent to .begin [no-]transform. We should remove it when
1280 we stop accepting those options. */
1282 if (strncmp (input_line_pointer
, "generics", strlen ("generics")) == 0)
1284 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1285 directive_string
= "transform";
1287 else if (strncmp (input_line_pointer
, "relax", strlen ("relax")) == 0)
1289 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1290 directive_string
= "transform";
1293 directive_string
= input_line_pointer
;
1295 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1297 if (strncmp (directive_string
, directive_info
[i
].name
, len
) == 0)
1299 input_line_pointer
+= len
;
1300 *directive
= (directiveE
) i
;
1301 if (*negated
&& !directive_info
[i
].can_be_negated
)
1302 as_bad (_("directive %s cannot be negated"),
1303 directive_info
[i
].name
);
1308 as_bad (_("unknown directive"));
1309 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1314 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED
)
1316 directiveE directive
;
1317 bfd_boolean negated
;
1321 get_directive (&directive
, &negated
);
1322 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1324 discard_rest_of_line ();
1328 if (cur_vinsn
.inside_bundle
)
1329 as_bad (_("directives are not valid inside bundles"));
1333 case directive_literal
:
1334 if (!inside_directive (directive_literal
))
1336 /* Previous labels go with whatever follows this directive, not with
1337 the literal, so save them now. */
1338 saved_insn_labels
= insn_labels
;
1341 as_warn (_(".begin literal is deprecated; use .literal instead"));
1342 state
= XNEW (emit_state
);
1343 xtensa_switch_to_literal_fragment (state
);
1344 directive_push (directive_literal
, negated
, state
);
1347 case directive_literal_prefix
:
1348 /* Have to flush pending output because a movi relaxed to an l32r
1349 might produce a literal. */
1350 md_flush_pending_output ();
1351 /* Check to see if the current fragment is a literal
1352 fragment. If it is, then this operation is not allowed. */
1353 if (generating_literals
)
1355 as_bad (_("cannot set literal_prefix inside literal fragment"));
1359 /* Allocate the literal state for this section and push
1360 onto the directive stack. */
1361 ls
= XNEW (lit_state
);
1364 *ls
= default_lit_sections
;
1365 directive_push (directive_literal_prefix
, negated
, ls
);
1367 /* Process the new prefix. */
1368 xtensa_literal_prefix ();
1371 case directive_freeregs
:
1372 /* This information is currently unused, but we'll accept the statement
1373 and just discard the rest of the line. This won't check the syntax,
1374 but it will accept every correct freeregs directive. */
1375 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1376 directive_push (directive_freeregs
, negated
, 0);
1379 case directive_schedule
:
1380 md_flush_pending_output ();
1381 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
1382 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
1383 directive_push (directive_schedule
, negated
, 0);
1384 xtensa_set_frag_assembly_state (frag_now
);
1387 case directive_density
:
1388 as_warn (_(".begin [no-]density is ignored"));
1391 case directive_absolute_literals
:
1392 md_flush_pending_output ();
1393 if (!absolute_literals_supported
&& !negated
)
1395 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1398 xtensa_set_frag_assembly_state (frag_now
);
1399 directive_push (directive
, negated
, 0);
1403 md_flush_pending_output ();
1404 xtensa_set_frag_assembly_state (frag_now
);
1405 directive_push (directive
, negated
, 0);
1409 demand_empty_rest_of_line ();
1414 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED
)
1416 directiveE begin_directive
, end_directive
;
1417 bfd_boolean begin_negated
, end_negated
;
1421 emit_state
**state_ptr
;
1424 if (cur_vinsn
.inside_bundle
)
1425 as_bad (_("directives are not valid inside bundles"));
1427 get_directive (&end_directive
, &end_negated
);
1429 md_flush_pending_output ();
1431 switch ((int) end_directive
)
1433 case XTENSA_UNDEFINED
:
1434 discard_rest_of_line ();
1437 case (int) directive_density
:
1438 as_warn (_(".end [no-]density is ignored"));
1439 demand_empty_rest_of_line ();
1442 case (int) directive_absolute_literals
:
1443 if (!absolute_literals_supported
&& !end_negated
)
1445 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1446 demand_empty_rest_of_line ();
1455 state_ptr
= &state
; /* use state_ptr to avoid type-punning warning */
1456 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1457 (const void **) state_ptr
);
1459 if (begin_directive
!= directive_none
)
1461 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1463 as_bad (_("does not match begin %s%s at %s:%d"),
1464 begin_negated
? "no-" : "",
1465 directive_info
[begin_directive
].name
, file
, line
);
1469 switch (end_directive
)
1471 case directive_literal
:
1472 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1473 xtensa_restore_emit_state (state
);
1474 xtensa_set_frag_assembly_state (frag_now
);
1476 if (!inside_directive (directive_literal
))
1478 /* Restore the list of current labels. */
1479 xtensa_clear_insn_labels ();
1480 insn_labels
= saved_insn_labels
;
1484 case directive_literal_prefix
:
1485 /* Restore the default collection sections from saved state. */
1486 s
= (lit_state
*) state
;
1488 default_lit_sections
= *s
;
1490 /* Free the state storage. */
1491 free (s
->lit_prefix
);
1495 case directive_schedule
:
1496 case directive_freeregs
:
1500 xtensa_set_frag_assembly_state (frag_now
);
1506 demand_empty_rest_of_line ();
1510 /* Place an aligned literal fragment at the current location. */
1513 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED
)
1515 md_flush_pending_output ();
1517 if (inside_directive (directive_literal
))
1518 as_warn (_(".literal_position inside literal directive; ignoring"));
1519 xtensa_mark_literal_pool_location ();
1521 demand_empty_rest_of_line ();
1522 xtensa_clear_insn_labels ();
1526 /* Support .literal label, expr, ... */
1529 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED
)
1532 char *p
, *base_name
;
1535 if (inside_directive (directive_literal
))
1537 as_bad (_(".literal not allowed inside .begin literal region"));
1538 ignore_rest_of_line ();
1542 md_flush_pending_output ();
1544 /* Previous labels go with whatever follows this directive, not with
1545 the literal, so save them now. */
1546 saved_insn_labels
= insn_labels
;
1549 base_name
= input_line_pointer
;
1551 xtensa_switch_to_literal_fragment (&state
);
1553 /* All literals are aligned to four-byte boundaries. */
1554 frag_align (2, 0, 0);
1555 record_alignment (now_seg
, 2);
1557 c
= get_symbol_name (&base_name
);
1558 /* Just after name is now '\0'. */
1559 p
= input_line_pointer
;
1561 SKIP_WHITESPACE_AFTER_NAME ();
1563 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1565 as_bad (_("expected comma or colon after symbol name; "
1566 "rest of line ignored"));
1567 ignore_rest_of_line ();
1568 xtensa_restore_emit_state (&state
);
1576 input_line_pointer
++; /* skip ',' or ':' */
1578 xtensa_elf_cons (4);
1580 xtensa_restore_emit_state (&state
);
1582 /* Restore the list of current labels. */
1583 xtensa_clear_insn_labels ();
1584 insn_labels
= saved_insn_labels
;
1589 xtensa_literal_prefix (void)
1594 /* Parse the new prefix from the input_line_pointer. */
1596 len
= strspn (input_line_pointer
,
1597 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1598 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1600 /* Get a null-terminated copy of the name. */
1601 name
= xmemdup0 (input_line_pointer
, len
);
1603 /* Skip the name in the input line. */
1604 input_line_pointer
+= len
;
1606 default_lit_sections
.lit_prefix
= name
;
1608 /* Clear cached literal sections, since the prefix has changed. */
1609 default_lit_sections
.lit_seg
= NULL
;
1610 default_lit_sections
.lit4_seg
= NULL
;
1614 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1617 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED
)
1619 float fall_through_f
, target_f
;
1621 fall_through_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1622 if (fall_through_f
< 0)
1624 as_bad (_("fall through frequency must be greater than 0"));
1625 ignore_rest_of_line ();
1629 target_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1632 as_bad (_("branch target frequency must be greater than 0"));
1633 ignore_rest_of_line ();
1637 set_subseg_freq (now_seg
, now_subseg
, target_f
+ fall_through_f
, target_f
);
1639 demand_empty_rest_of_line ();
1643 /* Like normal .long/.short/.word, except support @plt, etc.
1644 Clobbers input_line_pointer, checks end-of-line. */
1647 xtensa_elf_cons (int nbytes
)
1650 bfd_reloc_code_real_type reloc
;
1652 md_flush_pending_output ();
1654 if (cur_vinsn
.inside_bundle
)
1655 as_bad (_("directives are not valid inside bundles"));
1657 if (is_it_end_of_statement ())
1659 demand_empty_rest_of_line ();
1666 if (exp
.X_op
== O_symbol
1667 && *input_line_pointer
== '@'
1668 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, &exp
))
1671 reloc_howto_type
*reloc_howto
=
1672 bfd_reloc_type_lookup (stdoutput
, reloc
);
1674 if (reloc
== BFD_RELOC_UNUSED
|| !reloc_howto
)
1675 as_bad (_("unsupported relocation"));
1676 else if ((reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
1677 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
1678 || (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
1679 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
))
1680 as_bad (_("opcode-specific %s relocation used outside "
1681 "an instruction"), reloc_howto
->name
);
1682 else if (nbytes
!= (int) bfd_get_reloc_size (reloc_howto
))
1683 as_bad (ngettext ("%s relocations do not fit in %d byte",
1684 "%s relocations do not fit in %d bytes",
1686 reloc_howto
->name
, nbytes
);
1687 else if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
1688 || reloc
== BFD_RELOC_XTENSA_TLS_ARG
1689 || reloc
== BFD_RELOC_XTENSA_TLS_CALL
)
1690 as_bad (_("invalid use of %s relocation"), reloc_howto
->name
);
1693 char *p
= frag_more ((int) nbytes
);
1694 xtensa_set_frag_assembly_state (frag_now
);
1695 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
1696 nbytes
, &exp
, reloc_howto
->pc_relative
, reloc
);
1701 xtensa_set_frag_assembly_state (frag_now
);
1702 emit_expr (&exp
, (unsigned int) nbytes
);
1705 while (*input_line_pointer
++ == ',');
1707 input_line_pointer
--; /* Put terminator back into stream. */
1708 demand_empty_rest_of_line ();
1711 static bfd_boolean is_leb128_expr
;
1714 xtensa_leb128 (int sign
)
1716 is_leb128_expr
= TRUE
;
1718 is_leb128_expr
= FALSE
;
1722 /* Parsing and Idiom Translation. */
1724 /* Parse @plt, etc. and return the desired relocation. */
1725 static bfd_reloc_code_real_type
1726 xtensa_elf_suffix (char **str_p
, expressionS
*exp_p
)
1736 return BFD_RELOC_NONE
;
1738 for (ch
= *str
, str2
= ident
;
1739 (str2
< ident
+ sizeof (ident
) - 1
1740 && (ISALNUM (ch
) || ch
== '@'));
1743 *str2
++ = (ISLOWER (ch
)) ? ch
: TOLOWER (ch
);
1750 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1751 if (ch
== suffix_relocs
[i
].suffix
[0]
1752 && len
== suffix_relocs
[i
].length
1753 && memcmp (ident
, suffix_relocs
[i
].suffix
, suffix_relocs
[i
].length
) == 0)
1755 /* Now check for "identifier@suffix+constant". */
1756 if (*str
== '-' || *str
== '+')
1758 char *orig_line
= input_line_pointer
;
1759 expressionS new_exp
;
1761 input_line_pointer
= str
;
1762 expression (&new_exp
);
1763 if (new_exp
.X_op
== O_constant
)
1765 exp_p
->X_add_number
+= new_exp
.X_add_number
;
1766 str
= input_line_pointer
;
1769 if (&input_line_pointer
!= str_p
)
1770 input_line_pointer
= orig_line
;
1774 return suffix_relocs
[i
].reloc
;
1777 return BFD_RELOC_UNUSED
;
1781 /* Find the matching operator type. */
1783 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc
)
1785 operatorT
operator = O_illegal
;
1788 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1790 if (suffix_relocs
[i
].reloc
== reloc
)
1792 operator = suffix_relocs
[i
].operator;
1796 gas_assert (operator != O_illegal
);
1801 /* Find the matching reloc type. */
1802 static bfd_reloc_code_real_type
1803 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal
)
1806 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
1808 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1810 if (suffix_relocs
[i
].operator == operator)
1812 reloc
= suffix_relocs
[i
].reloc
;
1819 if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
)
1820 return BFD_RELOC_XTENSA_TLSDESC_FN
;
1821 else if (reloc
== BFD_RELOC_XTENSA_TLS_ARG
)
1822 return BFD_RELOC_XTENSA_TLSDESC_ARG
;
1825 if (reloc
== BFD_RELOC_UNUSED
)
1826 return BFD_RELOC_32
;
1833 expression_end (const char *name
)
1856 #define ERROR_REG_NUM ((unsigned) -1)
1859 tc_get_register (const char *prefix
)
1862 const char *next_expr
;
1863 const char *old_line_pointer
;
1866 old_line_pointer
= input_line_pointer
;
1868 if (*input_line_pointer
== '$')
1869 ++input_line_pointer
;
1871 /* Accept "sp" as a synonym for "a1". */
1872 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1873 && expression_end (input_line_pointer
+ 2))
1875 input_line_pointer
+= 2;
1876 return 1; /* AR[1] */
1879 while (*input_line_pointer
++ == *prefix
++)
1881 --input_line_pointer
;
1886 as_bad (_("bad register name: %s"), old_line_pointer
);
1887 return ERROR_REG_NUM
;
1890 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1892 as_bad (_("bad register number: %s"), input_line_pointer
);
1893 return ERROR_REG_NUM
;
1898 while (ISDIGIT ((int) *input_line_pointer
))
1899 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1901 if (!(next_expr
= expression_end (input_line_pointer
)))
1903 as_bad (_("bad register name: %s"), old_line_pointer
);
1904 return ERROR_REG_NUM
;
1907 input_line_pointer
= (char *) next_expr
;
1914 expression_maybe_register (xtensa_opcode opc
, int opnd
, expressionS
*tok
)
1916 xtensa_isa isa
= xtensa_default_isa
;
1918 /* Check if this is an immediate operand. */
1919 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 0)
1921 bfd_reloc_code_real_type reloc
;
1922 segT t
= expression (tok
);
1924 if (t
== absolute_section
1925 && xtensa_operand_is_PCrelative (isa
, opc
, opnd
) == 1)
1927 gas_assert (tok
->X_op
== O_constant
);
1928 tok
->X_op
= O_symbol
;
1929 tok
->X_add_symbol
= &abs_symbol
;
1932 if ((tok
->X_op
== O_constant
|| tok
->X_op
== O_symbol
)
1933 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
1938 case BFD_RELOC_LO16
:
1939 if (tok
->X_op
== O_constant
)
1941 tok
->X_add_number
&= 0xffff;
1945 case BFD_RELOC_HI16
:
1946 if (tok
->X_op
== O_constant
)
1948 tok
->X_add_number
= ((unsigned) tok
->X_add_number
) >> 16;
1952 case BFD_RELOC_UNUSED
:
1953 as_bad (_("unsupported relocation"));
1955 case BFD_RELOC_32_PCREL
:
1956 as_bad (_("pcrel relocation not allowed in an instruction"));
1961 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
1966 xtensa_regfile opnd_rf
= xtensa_operand_regfile (isa
, opc
, opnd
);
1967 unsigned reg
= tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
));
1969 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1972 if (xtensa_operand_encode (isa
, opc
, opnd
, &buf
))
1973 as_bad (_("register number out of range"));
1976 tok
->X_op
= O_register
;
1977 tok
->X_add_symbol
= 0;
1978 tok
->X_add_number
= reg
;
1983 /* Split up the arguments for an opcode or pseudo-op. */
1986 tokenize_arguments (char **args
, char *str
)
1988 char *old_input_line_pointer
;
1989 bfd_boolean saw_comma
= FALSE
;
1990 bfd_boolean saw_arg
= FALSE
;
1991 bfd_boolean saw_colon
= FALSE
;
1993 char *arg_end
, *arg
;
1996 /* Save and restore input_line_pointer around this function. */
1997 old_input_line_pointer
= input_line_pointer
;
1998 input_line_pointer
= str
;
2000 while (*input_line_pointer
)
2003 switch (*input_line_pointer
)
2010 input_line_pointer
++;
2011 if (saw_comma
|| saw_colon
|| !saw_arg
)
2017 input_line_pointer
++;
2018 if (saw_comma
|| saw_colon
|| !saw_arg
)
2024 if (!saw_comma
&& !saw_colon
&& saw_arg
)
2027 arg_end
= input_line_pointer
+ 1;
2028 while (!expression_end (arg_end
))
2031 arg_len
= arg_end
- input_line_pointer
;
2032 arg
= XNEWVEC (char, (saw_colon
? 1 : 0) + arg_len
+ 1);
2033 args
[num_args
] = arg
;
2037 strncpy (arg
, input_line_pointer
, arg_len
);
2038 arg
[arg_len
] = '\0';
2040 input_line_pointer
= arg_end
;
2050 if (saw_comma
|| saw_colon
)
2052 input_line_pointer
= old_input_line_pointer
;
2057 as_bad (_("extra comma"));
2059 as_bad (_("extra colon"));
2061 as_bad (_("missing argument"));
2063 as_bad (_("missing comma or colon"));
2064 input_line_pointer
= old_input_line_pointer
;
2069 /* Parse the arguments to an opcode. Return TRUE on error. */
2072 parse_arguments (TInsn
*insn
, int num_args
, char **arg_strings
)
2074 expressionS
*tok
, *last_tok
;
2075 xtensa_opcode opcode
= insn
->opcode
;
2076 bfd_boolean had_error
= TRUE
;
2077 xtensa_isa isa
= xtensa_default_isa
;
2078 int n
, num_regs
= 0;
2079 int opcode_operand_count
;
2080 int opnd_cnt
, last_opnd_cnt
;
2081 unsigned int next_reg
= 0;
2082 char *old_input_line_pointer
;
2084 if (insn
->insn_type
== ITYPE_LITERAL
)
2085 opcode_operand_count
= 1;
2087 opcode_operand_count
= xtensa_opcode_num_operands (isa
, opcode
);
2090 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
2092 /* Save and restore input_line_pointer around this function. */
2093 old_input_line_pointer
= input_line_pointer
;
2099 /* Skip invisible operands. */
2100 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0)
2106 for (n
= 0; n
< num_args
; n
++)
2108 input_line_pointer
= arg_strings
[n
];
2109 if (*input_line_pointer
== ':')
2111 xtensa_regfile opnd_rf
;
2112 input_line_pointer
++;
2115 gas_assert (opnd_cnt
> 0);
2117 opnd_rf
= xtensa_operand_regfile (isa
, opcode
, last_opnd_cnt
);
2119 != tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
)))
2120 as_warn (_("incorrect register number, ignoring"));
2125 if (opnd_cnt
>= opcode_operand_count
)
2127 as_warn (_("too many arguments"));
2130 gas_assert (opnd_cnt
< MAX_INSN_ARGS
);
2132 expression_maybe_register (opcode
, opnd_cnt
, tok
);
2133 next_reg
= tok
->X_add_number
+ 1;
2135 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2137 if (xtensa_operand_is_register (isa
, opcode
, opnd_cnt
) == 1)
2139 num_regs
= xtensa_operand_num_regs (isa
, opcode
, opnd_cnt
) - 1;
2140 /* minus 1 because we are seeing one right now */
2146 last_opnd_cnt
= opnd_cnt
;
2147 demand_empty_rest_of_line ();
2154 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0);
2158 if (num_regs
> 0 && ((int) next_reg
!= last_tok
->X_add_number
+ 1))
2161 insn
->ntok
= tok
- insn
->tok
;
2165 input_line_pointer
= old_input_line_pointer
;
2171 get_invisible_operands (TInsn
*insn
)
2173 xtensa_isa isa
= xtensa_default_isa
;
2174 static xtensa_insnbuf slotbuf
= NULL
;
2176 xtensa_opcode opc
= insn
->opcode
;
2177 int slot
, opnd
, fmt_found
;
2181 slotbuf
= xtensa_insnbuf_alloc (isa
);
2183 /* Find format/slot where this can be encoded. */
2186 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
2188 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
2190 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opc
) == 0)
2196 if (fmt_found
) break;
2201 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa
, opc
));
2205 /* First encode all the visible operands
2206 (to deal with shared field operands). */
2207 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2209 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 1
2210 && (insn
->tok
[opnd
].X_op
== O_register
2211 || insn
->tok
[opnd
].X_op
== O_constant
))
2213 val
= insn
->tok
[opnd
].X_add_number
;
2214 xtensa_operand_encode (isa
, opc
, opnd
, &val
);
2215 xtensa_operand_set_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, val
);
2219 /* Then pull out the values for the invisible ones. */
2220 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2222 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 0)
2224 xtensa_operand_get_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, &val
);
2225 xtensa_operand_decode (isa
, opc
, opnd
, &val
);
2226 insn
->tok
[opnd
].X_add_number
= val
;
2227 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 1)
2228 insn
->tok
[opnd
].X_op
= O_register
;
2230 insn
->tok
[opnd
].X_op
= O_constant
;
2239 xg_reverse_shift_count (char **cnt_argp
)
2241 char *cnt_arg
, *new_arg
;
2242 cnt_arg
= *cnt_argp
;
2244 /* replace the argument with "31-(argument)" */
2245 new_arg
= concat ("31-(", cnt_arg
, ")", (char *) NULL
);
2248 *cnt_argp
= new_arg
;
2252 /* If "arg" is a constant expression, return non-zero with the value
2256 xg_arg_is_constant (char *arg
, offsetT
*valp
)
2259 char *save_ptr
= input_line_pointer
;
2261 input_line_pointer
= arg
;
2263 input_line_pointer
= save_ptr
;
2265 if (exp
.X_op
== O_constant
)
2267 *valp
= exp
.X_add_number
;
2276 xg_replace_opname (char **popname
, const char *newop
)
2279 *popname
= xstrdup (newop
);
2284 xg_check_num_args (int *pnum_args
,
2289 int num_args
= *pnum_args
;
2291 if (num_args
< expected_num
)
2293 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2294 num_args
, opname
, expected_num
);
2298 if (num_args
> expected_num
)
2300 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2301 num_args
, opname
, expected_num
);
2302 while (num_args
-- > expected_num
)
2304 free (arg_strings
[num_args
]);
2305 arg_strings
[num_args
] = 0;
2307 *pnum_args
= expected_num
;
2315 /* If the register is not specified as part of the opcode,
2316 then get it from the operand and move it to the opcode. */
2319 xg_translate_sysreg_op (char **popname
, int *pnum_args
, char **arg_strings
)
2321 xtensa_isa isa
= xtensa_default_isa
;
2323 char *opname
, *new_opname
;
2324 const char *sr_name
;
2325 int is_user
, is_write
;
2330 is_user
= (opname
[1] == 'u');
2331 is_write
= (opname
[0] == 'w');
2333 /* Opname == [rw]ur or [rwx]sr... */
2335 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2338 /* Check if the argument is a symbolic register name. */
2339 sr
= xtensa_sysreg_lookup_name (isa
, arg_strings
[1]);
2340 /* Handle WSR to "INTSET" as a special case. */
2341 if (sr
== XTENSA_UNDEFINED
&& is_write
&& !is_user
2342 && !strcasecmp (arg_strings
[1], "intset"))
2343 sr
= xtensa_sysreg_lookup_name (isa
, "interrupt");
2344 if (sr
== XTENSA_UNDEFINED
2345 || (xtensa_sysreg_is_user (isa
, sr
) == 1) != is_user
)
2347 /* Maybe it's a register number.... */
2349 if (!xg_arg_is_constant (arg_strings
[1], &val
))
2351 as_bad (_("invalid register '%s' for '%s' instruction"),
2352 arg_strings
[1], opname
);
2355 sr
= xtensa_sysreg_lookup (isa
, val
, is_user
);
2356 if (sr
== XTENSA_UNDEFINED
)
2358 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2359 (long) val
, opname
);
2364 /* Remove the last argument, which is now part of the opcode. */
2365 free (arg_strings
[1]);
2369 /* Translate the opcode. */
2370 sr_name
= xtensa_sysreg_name (isa
, sr
);
2371 /* Another special case for "WSR.INTSET".... */
2372 if (is_write
&& !is_user
&& !strcasecmp ("interrupt", sr_name
))
2374 new_opname
= concat (*popname
, ".", sr_name
, (char *) NULL
);
2376 *popname
= new_opname
;
2383 xtensa_translate_old_userreg_ops (char **popname
)
2385 xtensa_isa isa
= xtensa_default_isa
;
2387 char *opname
, *new_opname
;
2388 const char *sr_name
;
2389 bfd_boolean has_underbar
= FALSE
;
2392 if (opname
[0] == '_')
2394 has_underbar
= TRUE
;
2398 sr
= xtensa_sysreg_lookup_name (isa
, opname
+ 1);
2399 if (sr
!= XTENSA_UNDEFINED
)
2401 /* The new default name ("nnn") is different from the old default
2402 name ("URnnn"). The old default is handled below, and we don't
2403 want to recognize [RW]nnn, so do nothing if the name is the (new)
2405 static char namebuf
[10];
2406 sprintf (namebuf
, "%d", xtensa_sysreg_number (isa
, sr
));
2407 if (strcmp (namebuf
, opname
+ 1) == 0)
2415 /* Only continue if the reg name is "URnnn". */
2416 if (opname
[1] != 'u' || opname
[2] != 'r')
2418 val
= strtoul (opname
+ 3, &end
, 10);
2422 sr
= xtensa_sysreg_lookup (isa
, val
, 1);
2423 if (sr
== XTENSA_UNDEFINED
)
2425 as_bad (_("invalid register number (%ld) for '%s'"),
2426 (long) val
, opname
);
2431 /* Translate the opcode. */
2432 sr_name
= xtensa_sysreg_name (isa
, sr
);
2433 new_opname
= XNEWVEC (char, strlen (sr_name
) + 6);
2434 sprintf (new_opname
, "%s%cur.%s", (has_underbar
? "_" : ""),
2435 opname
[0], sr_name
);
2437 *popname
= new_opname
;
2444 xtensa_translate_zero_immed (const char *old_op
,
2454 gas_assert (opname
[0] != '_');
2456 if (strcmp (opname
, old_op
) != 0)
2459 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2461 if (xg_arg_is_constant (arg_strings
[1], &val
) && val
== 0)
2463 xg_replace_opname (popname
, new_op
);
2464 free (arg_strings
[1]);
2465 arg_strings
[1] = arg_strings
[2];
2474 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2475 Returns non-zero if an error was found. */
2478 xg_translate_idioms (char **popname
, int *pnum_args
, char **arg_strings
)
2480 char *opname
= *popname
;
2481 bfd_boolean has_underbar
= FALSE
;
2485 has_underbar
= TRUE
;
2489 if (strcmp (opname
, "mov") == 0)
2491 if (use_transform () && !has_underbar
&& density_supported
)
2492 xg_replace_opname (popname
, "mov.n");
2495 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2497 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2498 arg_strings
[2] = xstrdup (arg_strings
[1]);
2504 if (strcmp (opname
, "bbsi.l") == 0)
2506 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2508 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2509 if (target_big_endian
)
2510 xg_reverse_shift_count (&arg_strings
[1]);
2514 if (strcmp (opname
, "bbci.l") == 0)
2516 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2518 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2519 if (target_big_endian
)
2520 xg_reverse_shift_count (&arg_strings
[1]);
2524 /* Don't do anything special with NOPs inside FLIX instructions. They
2525 are handled elsewhere. Real NOP instructions are always available
2526 in configurations with FLIX, so this should never be an issue but
2527 check for it anyway. */
2528 if (!cur_vinsn
.inside_bundle
&& xtensa_nop_opcode
== XTENSA_UNDEFINED
2529 && strcmp (opname
, "nop") == 0)
2531 if (use_transform () && !has_underbar
&& density_supported
)
2532 xg_replace_opname (popname
, "nop.n");
2535 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2537 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2538 arg_strings
[0] = xstrdup ("a1");
2539 arg_strings
[1] = xstrdup ("a1");
2540 arg_strings
[2] = xstrdup ("a1");
2546 /* Recognize [RW]UR and [RWX]SR. */
2547 if ((((opname
[0] == 'r' || opname
[0] == 'w')
2548 && (opname
[1] == 'u' || opname
[1] == 's'))
2549 || (opname
[0] == 'x' && opname
[1] == 's'))
2551 && opname
[3] == '\0')
2552 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2554 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2555 [RW]<name> if <name> is the non-default name of a user register. */
2556 if ((opname
[0] == 'r' || opname
[0] == 'w')
2557 && xtensa_opcode_lookup (xtensa_default_isa
, opname
) == XTENSA_UNDEFINED
)
2558 return xtensa_translate_old_userreg_ops (popname
);
2560 /* Relax branches that don't allow comparisons against an immediate value
2561 of zero to the corresponding branches with implicit zero immediates. */
2562 if (!has_underbar
&& use_transform ())
2564 if (xtensa_translate_zero_immed ("bnei", "bnez", popname
,
2565 pnum_args
, arg_strings
))
2568 if (xtensa_translate_zero_immed ("beqi", "beqz", popname
,
2569 pnum_args
, arg_strings
))
2572 if (xtensa_translate_zero_immed ("bgei", "bgez", popname
,
2573 pnum_args
, arg_strings
))
2576 if (xtensa_translate_zero_immed ("blti", "bltz", popname
,
2577 pnum_args
, arg_strings
))
2585 /* Functions for dealing with the Xtensa ISA. */
2587 /* Currently the assembler only allows us to use a single target per
2588 fragment. Because of this, only one operand for a given
2589 instruction may be symbolic. If there is a PC-relative operand,
2590 the last one is chosen. Otherwise, the result is the number of the
2591 last immediate operand, and if there are none of those, we fail and
2595 get_relaxable_immed (xtensa_opcode opcode
)
2597 int last_immed
= -1;
2600 if (opcode
== XTENSA_UNDEFINED
)
2603 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
, opcode
);
2604 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2606 if (xtensa_operand_is_visible (xtensa_default_isa
, opcode
, opi
) == 0)
2608 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, opi
) == 1)
2610 if (last_immed
== -1
2611 && xtensa_operand_is_register (xtensa_default_isa
, opcode
, opi
) == 0)
2618 static xtensa_opcode
2619 get_opcode_from_buf (const char *buf
, int slot
)
2621 static xtensa_insnbuf insnbuf
= NULL
;
2622 static xtensa_insnbuf slotbuf
= NULL
;
2623 xtensa_isa isa
= xtensa_default_isa
;
2628 insnbuf
= xtensa_insnbuf_alloc (isa
);
2629 slotbuf
= xtensa_insnbuf_alloc (isa
);
2632 xtensa_insnbuf_from_chars (isa
, insnbuf
, (const unsigned char *) buf
, 0);
2633 fmt
= xtensa_format_decode (isa
, insnbuf
);
2634 if (fmt
== XTENSA_UNDEFINED
)
2635 return XTENSA_UNDEFINED
;
2637 if (slot
>= xtensa_format_num_slots (isa
, fmt
))
2638 return XTENSA_UNDEFINED
;
2640 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
2641 return xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
2645 #ifdef TENSILICA_DEBUG
2647 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2650 xtensa_print_insn_table (void)
2652 int num_opcodes
, num_operands
;
2653 xtensa_opcode opcode
;
2654 xtensa_isa isa
= xtensa_default_isa
;
2656 num_opcodes
= xtensa_isa_num_opcodes (xtensa_default_isa
);
2657 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
2660 fprintf (stderr
, "%d: %s: ", opcode
, xtensa_opcode_name (isa
, opcode
));
2661 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2662 for (opn
= 0; opn
< num_operands
; opn
++)
2664 if (xtensa_operand_is_visible (isa
, opcode
, opn
) == 0)
2666 if (xtensa_operand_is_register (isa
, opcode
, opn
) == 1)
2668 xtensa_regfile opnd_rf
=
2669 xtensa_operand_regfile (isa
, opcode
, opn
);
2670 fprintf (stderr
, "%s ", xtensa_regfile_shortname (isa
, opnd_rf
));
2672 else if (xtensa_operand_is_PCrelative (isa
, opcode
, opn
) == 1)
2673 fputs ("[lLr] ", stderr
);
2675 fputs ("i ", stderr
);
2677 fprintf (stderr
, "\n");
2683 print_vliw_insn (xtensa_insnbuf vbuf
)
2685 xtensa_isa isa
= xtensa_default_isa
;
2686 xtensa_format f
= xtensa_format_decode (isa
, vbuf
);
2687 xtensa_insnbuf sbuf
= xtensa_insnbuf_alloc (isa
);
2690 fprintf (stderr
, "format = %d\n", f
);
2692 for (op
= 0; op
< xtensa_format_num_slots (isa
, f
); op
++)
2694 xtensa_opcode opcode
;
2698 xtensa_format_get_slot (isa
, f
, op
, vbuf
, sbuf
);
2699 opcode
= xtensa_opcode_decode (isa
, f
, op
, sbuf
);
2700 opname
= xtensa_opcode_name (isa
, opcode
);
2702 fprintf (stderr
, "op in slot %i is %s;\n", op
, opname
);
2703 fprintf (stderr
, " operands = ");
2705 operands
< xtensa_opcode_num_operands (isa
, opcode
);
2709 if (xtensa_operand_is_visible (isa
, opcode
, operands
) == 0)
2711 xtensa_operand_get_field (isa
, opcode
, operands
, f
, op
, sbuf
, &val
);
2712 xtensa_operand_decode (isa
, opcode
, operands
, &val
);
2713 fprintf (stderr
, "%d ", val
);
2715 fprintf (stderr
, "\n");
2717 xtensa_insnbuf_free (isa
, sbuf
);
2720 #endif /* TENSILICA_DEBUG */
2724 is_direct_call_opcode (xtensa_opcode opcode
)
2726 xtensa_isa isa
= xtensa_default_isa
;
2727 int n
, num_operands
;
2729 if (xtensa_opcode_is_call (isa
, opcode
) != 1)
2732 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2733 for (n
= 0; n
< num_operands
; n
++)
2735 if (xtensa_operand_is_register (isa
, opcode
, n
) == 0
2736 && xtensa_operand_is_PCrelative (isa
, opcode
, n
) == 1)
2743 /* Convert from BFD relocation type code to slot and operand number.
2744 Returns non-zero on failure. */
2747 decode_reloc (bfd_reloc_code_real_type reloc
, int *slot
, bfd_boolean
*is_alt
)
2749 if (reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
2750 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
2752 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_OP
;
2755 else if (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
2756 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
)
2758 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_ALT
;
2768 /* Convert from slot number to BFD relocation type code for the
2769 standard PC-relative relocations. Return BFD_RELOC_NONE on
2772 static bfd_reloc_code_real_type
2773 encode_reloc (int slot
)
2775 if (slot
< 0 || slot
> 14)
2776 return BFD_RELOC_NONE
;
2778 return BFD_RELOC_XTENSA_SLOT0_OP
+ slot
;
2782 /* Convert from slot numbers to BFD relocation type code for the
2783 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2785 static bfd_reloc_code_real_type
2786 encode_alt_reloc (int slot
)
2788 if (slot
< 0 || slot
> 14)
2789 return BFD_RELOC_NONE
;
2791 return BFD_RELOC_XTENSA_SLOT0_ALT
+ slot
;
2796 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf
,
2799 xtensa_opcode opcode
,
2805 uint32 valbuf
= value
;
2807 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
2809 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, operand
)
2811 as_bad_where ((char *) file
, line
,
2812 _("operand %d of '%s' has out of range value '%u'"),
2814 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2817 as_bad_where ((char *) file
, line
,
2818 _("operand %d of '%s' has invalid value '%u'"),
2820 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2825 xtensa_operand_set_field (xtensa_default_isa
, opcode
, operand
, fmt
, slot
,
2831 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf
,
2834 xtensa_opcode opcode
,
2838 (void) xtensa_operand_get_field (xtensa_default_isa
, opcode
, opnum
,
2839 fmt
, slot
, slotbuf
, &val
);
2840 (void) xtensa_operand_decode (xtensa_default_isa
, opcode
, opnum
, &val
);
2845 /* Checks for rules from xtensa-relax tables. */
2847 /* The routine xg_instruction_matches_option_term must return TRUE
2848 when a given option term is true. The meaning of all of the option
2849 terms is given interpretation by this function. */
2852 xg_instruction_matches_option_term (TInsn
*insn
, const ReqOrOption
*option
)
2854 if (strcmp (option
->option_name
, "realnop") == 0
2855 || strncmp (option
->option_name
, "IsaUse", 6) == 0)
2857 /* These conditions were evaluated statically when building the
2858 relaxation table. There's no need to reevaluate them now. */
2861 else if (strcmp (option
->option_name
, "FREEREG") == 0)
2862 return insn
->extra_arg
.X_op
== O_register
;
2865 as_fatal (_("internal error: unknown option name '%s'"),
2866 option
->option_name
);
2872 xg_instruction_matches_or_options (TInsn
*insn
,
2873 const ReqOrOptionList
*or_option
)
2875 const ReqOrOption
*option
;
2876 /* Must match each of the AND terms. */
2877 for (option
= or_option
; option
!= NULL
; option
= option
->next
)
2879 if (xg_instruction_matches_option_term (insn
, option
))
2887 xg_instruction_matches_options (TInsn
*insn
, const ReqOptionList
*options
)
2889 const ReqOption
*req_options
;
2890 /* Must match each of the AND terms. */
2891 for (req_options
= options
;
2892 req_options
!= NULL
;
2893 req_options
= req_options
->next
)
2895 /* Must match one of the OR clauses. */
2896 if (!xg_instruction_matches_or_options (insn
,
2897 req_options
->or_option_terms
))
2904 /* Return the transition rule that matches or NULL if none matches. */
2907 xg_instruction_matches_rule (TInsn
*insn
, TransitionRule
*rule
)
2909 PreconditionList
*condition_l
;
2911 if (rule
->opcode
!= insn
->opcode
)
2914 for (condition_l
= rule
->conditions
;
2915 condition_l
!= NULL
;
2916 condition_l
= condition_l
->next
)
2920 Precondition
*cond
= condition_l
->precond
;
2925 /* The expression must be the constant. */
2926 gas_assert (cond
->op_num
< insn
->ntok
);
2927 exp1
= &insn
->tok
[cond
->op_num
];
2928 if (expr_is_const (exp1
))
2933 if (get_expr_const (exp1
) != cond
->op_data
)
2937 if (get_expr_const (exp1
) == cond
->op_data
)
2944 else if (expr_is_register (exp1
))
2949 if (get_expr_register (exp1
) != cond
->op_data
)
2953 if (get_expr_register (exp1
) == cond
->op_data
)
2965 gas_assert (cond
->op_num
< insn
->ntok
);
2966 gas_assert (cond
->op_data
< insn
->ntok
);
2967 exp1
= &insn
->tok
[cond
->op_num
];
2968 exp2
= &insn
->tok
[cond
->op_data
];
2973 if (!expr_is_equal (exp1
, exp2
))
2977 if (expr_is_equal (exp1
, exp2
))
2989 if (!xg_instruction_matches_options (insn
, rule
->options
))
2997 transition_rule_cmp (const TransitionRule
*a
, const TransitionRule
*b
)
2999 bfd_boolean a_greater
= FALSE
;
3000 bfd_boolean b_greater
= FALSE
;
3002 ReqOptionList
*l_a
= a
->options
;
3003 ReqOptionList
*l_b
= b
->options
;
3005 /* We only care if they both are the same except for
3006 a const16 vs. an l32r. */
3008 while (l_a
&& l_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3010 ReqOrOptionList
*l_or_a
= l_a
->or_option_terms
;
3011 ReqOrOptionList
*l_or_b
= l_b
->or_option_terms
;
3012 while (l_or_a
&& l_or_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3014 if (l_or_a
->is_true
!= l_or_b
->is_true
)
3016 if (strcmp (l_or_a
->option_name
, l_or_b
->option_name
) != 0)
3018 /* This is the case we care about. */
3019 if (strcmp (l_or_a
->option_name
, "IsaUseConst16") == 0
3020 && strcmp (l_or_b
->option_name
, "IsaUseL32R") == 0)
3027 else if (strcmp (l_or_a
->option_name
, "IsaUseL32R") == 0
3028 && strcmp (l_or_b
->option_name
, "IsaUseConst16") == 0)
3038 l_or_a
= l_or_a
->next
;
3039 l_or_b
= l_or_b
->next
;
3041 if (l_or_a
|| l_or_b
)
3050 /* Incomparable if the substitution was used differently in two cases. */
3051 if (a_greater
&& b_greater
)
3063 static TransitionRule
*
3064 xg_instruction_match (TInsn
*insn
)
3066 TransitionTable
*table
= xg_build_simplify_table (&transition_rule_cmp
);
3068 gas_assert (insn
->opcode
< table
->num_opcodes
);
3070 /* Walk through all of the possible transitions. */
3071 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3073 TransitionRule
*rule
= l
->rule
;
3074 if (xg_instruction_matches_rule (insn
, rule
))
3081 /* Various Other Internal Functions. */
3084 is_unique_insn_expansion (TransitionRule
*r
)
3086 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
3088 if (r
->to_instr
->typ
!= INSTR_INSTR
)
3094 /* Check if there is exactly one relaxation for INSN that converts it to
3095 another instruction of equal or larger size. If so, and if TARG is
3096 non-null, go ahead and generate the relaxed instruction into TARG. If
3097 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3098 instruction, i.e., ignore relaxations that convert to an instruction of
3099 equal size. In some contexts where this function is used, only
3100 a single widening is allowed and the NARROW_ONLY argument is used to
3101 exclude cases like ADDI being "widened" to an ADDMI, which may
3102 later be relaxed to an ADDMI/ADDI pair. */
3105 xg_is_single_relaxable_insn (TInsn
*insn
, TInsn
*targ
, bfd_boolean narrow_only
)
3107 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3109 TransitionRule
*match
= 0;
3111 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3112 gas_assert (insn
->opcode
< table
->num_opcodes
);
3114 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3116 TransitionRule
*rule
= l
->rule
;
3118 if (xg_instruction_matches_rule (insn
, rule
)
3119 && is_unique_insn_expansion (rule
)
3120 && (xg_get_single_size (insn
->opcode
) + (narrow_only
? 1 : 0)
3121 <= xg_get_single_size (rule
->to_instr
->opcode
)))
3132 xg_build_to_insn (targ
, insn
, match
->to_instr
);
3137 /* Return the maximum number of bytes this opcode can expand to. */
3140 xg_get_max_insn_widen_size (xtensa_opcode opcode
)
3142 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3144 int max_size
= xg_get_single_size (opcode
);
3146 gas_assert (opcode
< table
->num_opcodes
);
3148 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3150 TransitionRule
*rule
= l
->rule
;
3151 BuildInstr
*build_list
;
3156 build_list
= rule
->to_instr
;
3157 if (is_unique_insn_expansion (rule
))
3159 gas_assert (build_list
->typ
== INSTR_INSTR
);
3160 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
3163 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3165 switch (build_list
->typ
)
3168 this_size
+= xg_get_single_size (build_list
->opcode
);
3170 case INSTR_LITERAL_DEF
:
3171 case INSTR_LABEL_DEF
:
3176 if (this_size
> max_size
)
3177 max_size
= this_size
;
3183 /* Return the maximum number of literal bytes this opcode can generate. */
3186 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode
)
3188 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3192 gas_assert (opcode
< table
->num_opcodes
);
3194 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3196 TransitionRule
*rule
= l
->rule
;
3197 BuildInstr
*build_list
;
3202 build_list
= rule
->to_instr
;
3203 if (is_unique_insn_expansion (rule
))
3205 gas_assert (build_list
->typ
== INSTR_INSTR
);
3206 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
3209 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3211 switch (build_list
->typ
)
3213 case INSTR_LITERAL_DEF
:
3214 /* Hard-coded 4-byte literal. */
3218 case INSTR_LABEL_DEF
:
3223 if (this_size
> max_size
)
3224 max_size
= this_size
;
3231 xg_is_relaxable_insn (TInsn
*insn
, int lateral_steps
)
3233 int steps_taken
= 0;
3234 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3237 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3238 gas_assert (insn
->opcode
< table
->num_opcodes
);
3240 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3242 TransitionRule
*rule
= l
->rule
;
3244 if (xg_instruction_matches_rule (insn
, rule
))
3246 if (steps_taken
== lateral_steps
)
3256 get_special_literal_symbol (void)
3258 static symbolS
*sym
= NULL
;
3261 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
3267 get_special_label_symbol (void)
3269 static symbolS
*sym
= NULL
;
3272 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
3278 xg_valid_literal_expression (const expressionS
*exp
)
3300 /* This will check to see if the value can be converted into the
3301 operand type. It will return TRUE if it does not fit. */
3304 xg_check_operand (int32 value
, xtensa_opcode opcode
, int operand
)
3306 uint32 valbuf
= value
;
3307 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
3313 /* Assumes: All immeds are constants. Check that all constants fit
3314 into their immeds; return FALSE if not. */
3317 xg_immeds_fit (const TInsn
*insn
)
3319 xtensa_isa isa
= xtensa_default_isa
;
3323 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3324 for (i
= 0; i
< n
; ++i
)
3326 const expressionS
*exp
= &insn
->tok
[i
];
3328 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3335 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3340 /* The symbol should have a fixup associated with it. */
3349 /* This should only be called after we have an initial
3350 estimate of the addresses. */
3353 xg_symbolic_immeds_fit (const TInsn
*insn
,
3359 xtensa_isa isa
= xtensa_default_isa
;
3367 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3369 for (i
= 0; i
< n
; ++i
)
3371 const expressionS
*exp
= &insn
->tok
[i
];
3373 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3380 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3386 /* Check for the worst case. */
3387 if (xg_check_operand (0xffff, insn
->opcode
, i
))
3392 /* We only allow symbols for PC-relative references.
3393 If pc_frag == 0, then we don't have frag locations yet. */
3395 || xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 0)
3398 /* If it is a weak symbol or a symbol in a different section,
3399 it cannot be known to fit at assembly time. */
3400 if (S_IS_WEAK (exp
->X_add_symbol
)
3401 || S_GET_SEGMENT (exp
->X_add_symbol
) != pc_seg
)
3403 /* For a direct call with --no-longcalls, be optimistic and
3404 assume it will be in range. If the symbol is weak and
3405 undefined, it may remain undefined at link-time, in which
3406 case it will have a zero value and almost certainly be out
3407 of range for a direct call; thus, relax for undefined weak
3408 symbols even if longcalls is not enabled. */
3409 if (is_direct_call_opcode (insn
->opcode
)
3410 && ! pc_frag
->tc_frag_data
.use_longcalls
3411 && (! S_IS_WEAK (exp
->X_add_symbol
)
3412 || S_IS_DEFINED (exp
->X_add_symbol
)))
3418 symbolP
= exp
->X_add_symbol
;
3419 sym_frag
= symbol_get_frag (symbolP
);
3420 target
= S_GET_VALUE (symbolP
) + exp
->X_add_number
;
3421 pc
= pc_frag
->fr_address
+ pc_offset
;
3423 /* If frag has yet to be reached on this pass, assume it
3424 will move by STRETCH just as we did. If this is not so,
3425 it will be because some frag between grows, and that will
3426 force another pass. Beware zero-length frags. There
3427 should be a faster way to do this. */
3430 && sym_frag
->relax_marker
!= pc_frag
->relax_marker
3431 && S_GET_SEGMENT (symbolP
) == pc_seg
)
3436 new_offset
= target
;
3437 xtensa_operand_do_reloc (isa
, insn
->opcode
, i
, &new_offset
, pc
);
3438 if (xg_check_operand (new_offset
, insn
->opcode
, i
))
3443 /* The symbol should have a fixup associated with it. */
3452 /* Return TRUE on success. */
3455 xg_build_to_insn (TInsn
*targ
, TInsn
*insn
, BuildInstr
*bi
)
3461 targ
->debug_line
= insn
->debug_line
;
3462 targ
->loc_directive_seen
= insn
->loc_directive_seen
;
3467 targ
->opcode
= bi
->opcode
;
3468 targ
->insn_type
= ITYPE_INSN
;
3469 targ
->is_specific_opcode
= FALSE
;
3471 for (; op
!= NULL
; op
= op
->next
)
3473 int op_num
= op
->op_num
;
3474 int op_data
= op
->op_data
;
3476 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3478 if (targ
->ntok
<= op_num
)
3479 targ
->ntok
= op_num
+ 1;
3484 set_expr_const (&targ
->tok
[op_num
], op_data
);
3487 gas_assert (op_data
< insn
->ntok
);
3488 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3491 if (insn
->extra_arg
.X_op
!= O_register
)
3493 copy_expr (&targ
->tok
[op_num
], &insn
->extra_arg
);
3496 sym
= get_special_literal_symbol ();
3497 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3498 if (insn
->tok
[op_data
].X_op
== O_tlsfunc
3499 || insn
->tok
[op_data
].X_op
== O_tlsarg
)
3500 copy_expr (&targ
->extra_arg
, &insn
->tok
[op_data
]);
3503 sym
= get_special_label_symbol ();
3504 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3506 case OP_OPERAND_HI16U
:
3507 case OP_OPERAND_LOW16U
:
3508 gas_assert (op_data
< insn
->ntok
);
3509 if (expr_is_const (&insn
->tok
[op_data
]))
3512 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3513 val
= xg_apply_userdef_op_fn (op
->typ
,
3516 targ
->tok
[op_num
].X_add_number
= val
;
3520 /* For const16 we can create relocations for these. */
3521 if (targ
->opcode
== XTENSA_UNDEFINED
3522 || (targ
->opcode
!= xtensa_const16_opcode
))
3524 gas_assert (op_data
< insn
->ntok
);
3525 /* Need to build a O_lo16 or O_hi16. */
3526 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3527 if (targ
->tok
[op_num
].X_op
== O_symbol
)
3529 if (op
->typ
== OP_OPERAND_HI16U
)
3530 targ
->tok
[op_num
].X_op
= O_hi16
;
3531 else if (op
->typ
== OP_OPERAND_LOW16U
)
3532 targ
->tok
[op_num
].X_op
= O_lo16
;
3539 /* currently handles:
3542 OP_OPERAND_F32MINUS */
3543 if (xg_has_userdef_op_fn (op
->typ
))
3545 gas_assert (op_data
< insn
->ntok
);
3546 if (expr_is_const (&insn
->tok
[op_data
]))
3549 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3550 val
= xg_apply_userdef_op_fn (op
->typ
,
3553 targ
->tok
[op_num
].X_add_number
= val
;
3556 return FALSE
; /* We cannot use a relocation for this. */
3565 case INSTR_LITERAL_DEF
:
3567 targ
->opcode
= XTENSA_UNDEFINED
;
3568 targ
->insn_type
= ITYPE_LITERAL
;
3569 targ
->is_specific_opcode
= FALSE
;
3570 for (; op
!= NULL
; op
= op
->next
)
3572 int op_num
= op
->op_num
;
3573 int op_data
= op
->op_data
;
3574 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3576 if (targ
->ntok
<= op_num
)
3577 targ
->ntok
= op_num
+ 1;
3582 gas_assert (op_data
< insn
->ntok
);
3583 /* We can only pass resolvable literals through. */
3584 if (!xg_valid_literal_expression (&insn
->tok
[op_data
]))
3586 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3598 case INSTR_LABEL_DEF
:
3600 targ
->opcode
= XTENSA_UNDEFINED
;
3601 targ
->insn_type
= ITYPE_LABEL
;
3602 targ
->is_specific_opcode
= FALSE
;
3603 /* Literal with no ops is a label? */
3604 gas_assert (op
== NULL
);
3615 /* Return TRUE on success. */
3618 xg_build_to_stack (IStack
*istack
, TInsn
*insn
, BuildInstr
*bi
)
3620 for (; bi
!= NULL
; bi
= bi
->next
)
3622 TInsn
*next_insn
= istack_push_space (istack
);
3624 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3631 /* Return TRUE on valid expansion. */
3634 xg_expand_to_stack (IStack
*istack
, TInsn
*insn
, int lateral_steps
)
3636 int stack_size
= istack
->ninsn
;
3637 int steps_taken
= 0;
3638 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3641 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3642 gas_assert (insn
->opcode
< table
->num_opcodes
);
3644 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3646 TransitionRule
*rule
= l
->rule
;
3648 if (xg_instruction_matches_rule (insn
, rule
))
3650 if (lateral_steps
== steps_taken
)
3654 /* This is it. Expand the rule to the stack. */
3655 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3658 /* Check to see if it fits. */
3659 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3661 TInsn
*tinsn
= &istack
->insn
[i
];
3663 if (tinsn
->insn_type
== ITYPE_INSN
3664 && !tinsn_has_symbolic_operands (tinsn
)
3665 && !xg_immeds_fit (tinsn
))
3667 istack
->ninsn
= stack_size
;
3680 /* Relax the assembly instruction at least "min_steps".
3681 Return the number of steps taken.
3683 For relaxation to correctly terminate, every relaxation chain must
3684 terminate in one of two ways:
3686 1. If the chain from one instruction to the next consists entirely of
3687 single instructions, then the chain *must* handle all possible
3688 immediates without failing. It must not ever fail because an
3689 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3690 chain is one example. L32R loads 32 bits, and there cannot be an
3691 immediate larger than 32 bits, so it satisfies this condition.
3692 Single instruction relaxation chains are as defined by
3693 xg_is_single_relaxable_instruction.
3695 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3696 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3698 Strictly speaking, in most cases you can violate condition 1 and be OK
3699 -- in particular when the last two instructions have the same single
3700 size. But nevertheless, you should guarantee the above two conditions.
3702 We could fix this so that single-instruction expansions correctly
3703 terminate when they can't handle the range, but the error messages are
3704 worse, and it actually turns out that in every case but one (18-bit wide
3705 branches), you need a multi-instruction expansion to get the full range
3706 anyway. And because 18-bit branches are handled identically to 15-bit
3707 branches, there isn't any point in changing it. */
3710 xg_assembly_relax (IStack
*istack
,
3713 fragS
*pc_frag
, /* if pc_frag == 0, not pc-relative */
3714 offsetT pc_offset
, /* offset in fragment */
3715 int min_steps
, /* minimum conversion steps */
3716 long stretch
) /* number of bytes stretched so far */
3718 int steps_taken
= 0;
3720 /* Some of its immeds don't fit. Try to build a relaxed version.
3721 This may go through a couple of stages of single instruction
3722 transformations before we get there. */
3724 TInsn single_target
;
3726 int lateral_steps
= 0;
3727 int istack_size
= istack
->ninsn
;
3729 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3730 && steps_taken
>= min_steps
)
3732 istack_push (istack
, insn
);
3735 current_insn
= *insn
;
3737 /* Walk through all of the single instruction expansions. */
3738 while (xg_is_single_relaxable_insn (¤t_insn
, &single_target
, FALSE
))
3741 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3744 if (steps_taken
>= min_steps
)
3746 istack_push (istack
, &single_target
);
3750 current_insn
= single_target
;
3753 /* Now check for a multi-instruction expansion. */
3754 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3756 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3759 if (steps_taken
>= min_steps
)
3761 istack_push (istack
, ¤t_insn
);
3766 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3768 if (steps_taken
>= min_steps
)
3772 istack
->ninsn
= istack_size
;
3775 /* It's not going to work -- use the original. */
3776 istack_push (istack
, insn
);
3782 xg_finish_frag (char *last_insn
,
3783 enum xtensa_relax_statesE frag_state
,
3784 enum xtensa_relax_statesE slot0_state
,
3786 bfd_boolean is_insn
)
3788 /* Finish off this fragment so that it has at LEAST the desired
3789 max_growth. If it doesn't fit in this fragment, close this one
3790 and start a new one. In either case, return a pointer to the
3791 beginning of the growth area. */
3795 frag_grow (max_growth
);
3796 old_frag
= frag_now
;
3798 frag_now
->fr_opcode
= last_insn
;
3800 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3802 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3803 frag_state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3805 old_frag
->tc_frag_data
.slot_subtypes
[0] = slot0_state
;
3806 xtensa_set_frag_assembly_state (frag_now
);
3808 /* Just to make sure that we did not split it up. */
3809 gas_assert (old_frag
->fr_next
== frag_now
);
3813 /* Return TRUE if the target frag is one of the next non-empty frags. */
3816 is_next_frag_target (const fragS
*fragP
, const fragS
*target
)
3821 for (; fragP
; fragP
= fragP
->fr_next
)
3823 if (fragP
== target
)
3825 if (fragP
->fr_fix
!= 0)
3827 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
3829 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
3830 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
3832 if (fragP
->fr_type
== rs_space
)
3840 is_branch_jmp_to_next (TInsn
*insn
, fragS
*fragP
)
3842 xtensa_isa isa
= xtensa_default_isa
;
3844 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3849 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) != 1
3850 && xtensa_opcode_is_jump (isa
, insn
->opcode
) != 1)
3853 for (i
= 0; i
< num_ops
; i
++)
3855 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1)
3861 if (target_op
== -1)
3864 if (insn
->ntok
<= target_op
)
3867 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3870 sym
= insn
->tok
[target_op
].X_add_symbol
;
3874 if (insn
->tok
[target_op
].X_add_number
!= 0)
3877 target_frag
= symbol_get_frag (sym
);
3878 if (target_frag
== NULL
)
3881 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3882 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3890 xg_add_branch_and_loop_targets (TInsn
*insn
)
3892 xtensa_isa isa
= xtensa_default_isa
;
3893 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3895 if (xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3898 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3899 && insn
->tok
[i
].X_op
== O_symbol
)
3900 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3904 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) == 1
3905 || xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3909 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3911 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3912 && insn
->tok
[i
].X_op
== O_symbol
)
3914 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3915 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3916 if (S_IS_DEFINED (sym
))
3917 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3924 /* Return FALSE if no error. */
3927 xg_build_token_insn (BuildInstr
*instr_spec
, TInsn
*old_insn
, TInsn
*new_insn
)
3932 switch (instr_spec
->typ
)
3935 new_insn
->insn_type
= ITYPE_INSN
;
3936 new_insn
->opcode
= instr_spec
->opcode
;
3938 case INSTR_LITERAL_DEF
:
3939 new_insn
->insn_type
= ITYPE_LITERAL
;
3940 new_insn
->opcode
= XTENSA_UNDEFINED
;
3942 case INSTR_LABEL_DEF
:
3945 new_insn
->is_specific_opcode
= FALSE
;
3946 new_insn
->debug_line
= old_insn
->debug_line
;
3947 new_insn
->loc_directive_seen
= old_insn
->loc_directive_seen
;
3949 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3952 const expressionS
*src_exp
;
3958 /* The expression must be the constant. */
3959 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3960 exp
= &new_insn
->tok
[b_op
->op_num
];
3961 set_expr_const (exp
, b_op
->op_data
);
3965 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3966 gas_assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3967 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3968 exp
= &new_insn
->tok
[b_op
->op_num
];
3969 copy_expr (exp
, src_exp
);
3974 as_bad (_("can't handle generation of literal/labels yet"));
3978 as_bad (_("can't handle undefined OP TYPE"));
3983 new_insn
->ntok
= num_ops
;
3988 /* Return TRUE if it was simplified. */
3991 xg_simplify_insn (TInsn
*old_insn
, TInsn
*new_insn
)
3993 TransitionRule
*rule
;
3994 BuildInstr
*insn_spec
;
3996 if (old_insn
->is_specific_opcode
|| !density_supported
)
3999 rule
= xg_instruction_match (old_insn
);
4003 insn_spec
= rule
->to_instr
;
4004 /* There should only be one. */
4005 gas_assert (insn_spec
!= NULL
);
4006 gas_assert (insn_spec
->next
== NULL
);
4007 if (insn_spec
->next
!= NULL
)
4010 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
4016 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
4017 l32i.n. (2) Check the number of operands. (3) Place the instruction
4018 tokens into the stack or relax it and place multiple
4019 instructions/literals onto the stack. Return FALSE if no error. */
4022 xg_expand_assembly_insn (IStack
*istack
, TInsn
*orig_insn
)
4026 bfd_boolean do_expand
;
4028 tinsn_init (&new_insn
);
4030 /* Narrow it if we can. xg_simplify_insn now does all the
4031 appropriate checking (e.g., for the density option). */
4032 if (xg_simplify_insn (orig_insn
, &new_insn
))
4033 orig_insn
= &new_insn
;
4035 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
,
4037 if (orig_insn
->ntok
< noperands
)
4039 as_bad (ngettext ("found %d operand for '%s': Expected %d",
4040 "found %d operands for '%s': Expected %d",
4043 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4047 if (orig_insn
->ntok
> noperands
)
4048 as_warn (ngettext ("found %d operand for '%s': Expected %d",
4049 "found %d operands for '%s': Expected %d",
4052 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4055 /* If there are not enough operands, we will assert above. If there
4056 are too many, just cut out the extras here. */
4057 orig_insn
->ntok
= noperands
;
4059 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
4062 /* Special case for extui opcode which has constraints not handled
4063 by the ordinary operand encoding checks. The number of operands
4064 and related syntax issues have already been checked. */
4065 if (orig_insn
->opcode
== xtensa_extui_opcode
)
4067 int shiftimm
= orig_insn
->tok
[2].X_add_number
;
4068 int maskimm
= orig_insn
->tok
[3].X_add_number
;
4069 if (shiftimm
+ maskimm
> 32)
4071 as_bad (_("immediate operands sum to greater than 32"));
4076 /* If the instruction will definitely need to be relaxed, it is better
4077 to expand it now for better scheduling. Decide whether to expand
4079 do_expand
= (!orig_insn
->is_specific_opcode
&& use_transform ());
4081 /* Calls should be expanded to longcalls only in the backend relaxation
4082 so that the assembly scheduler will keep the L32R/CALLX instructions
4084 if (is_direct_call_opcode (orig_insn
->opcode
))
4087 if (tinsn_has_symbolic_operands (orig_insn
))
4089 /* The values of symbolic operands are not known yet, so only expand
4090 now if an operand is "complex" (e.g., difference of symbols) and
4091 will have to be stored as a literal regardless of the value. */
4092 if (!tinsn_has_complex_operands (orig_insn
))
4095 else if (xg_immeds_fit (orig_insn
))
4099 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
4101 istack_push (istack
, orig_insn
);
4107 /* Return TRUE if the section flags are marked linkonce
4108 or the name is .gnu.linkonce.*. */
4110 static int linkonce_len
= sizeof (".gnu.linkonce.") - 1;
4113 get_is_linkonce_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
)
4115 flagword flags
, link_once_flags
;
4117 flags
= bfd_get_section_flags (abfd
, sec
);
4118 link_once_flags
= (flags
& SEC_LINK_ONCE
);
4120 /* Flags might not be set yet. */
4121 if (!link_once_flags
4122 && strncmp (segment_name (sec
), ".gnu.linkonce.", linkonce_len
) == 0)
4123 link_once_flags
= SEC_LINK_ONCE
;
4125 return (link_once_flags
!= 0);
4130 xtensa_add_literal_sym (symbolS
*sym
)
4134 l
= XNEW (sym_list
);
4136 l
->next
= literal_syms
;
4142 xtensa_create_literal_symbol (segT sec
, fragS
*frag
)
4144 static int lit_num
= 0;
4145 static char name
[256];
4148 sprintf (name
, ".L_lit_sym%d", lit_num
);
4150 /* Create a local symbol. If it is in a linkonce section, we have to
4151 be careful to make sure that if it is used in a relocation that the
4152 symbol will be in the output file. */
4153 if (get_is_linkonce_section (stdoutput
, sec
))
4155 symbolP
= symbol_new (name
, sec
, 0, frag
);
4156 S_CLEAR_EXTERNAL (symbolP
);
4157 /* symbolP->local = 1; */
4160 symbolP
= symbol_new (name
, sec
, 0, frag
);
4162 xtensa_add_literal_sym (symbolP
);
4169 /* Currently all literals that are generated here are 32-bit L32R targets. */
4172 xg_assemble_literal (/* const */ TInsn
*insn
)
4175 symbolS
*lit_sym
= NULL
;
4176 bfd_reloc_code_real_type reloc
;
4177 bfd_boolean pcrel
= FALSE
;
4180 /* size = 4 for L32R. It could easily be larger when we move to
4181 larger constants. Add a parameter later. */
4182 offsetT litsize
= 4;
4183 offsetT litalign
= 2; /* 2^2 = 4 */
4184 expressionS saved_loc
;
4185 expressionS
* emit_val
;
4187 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
4189 gas_assert (insn
->insn_type
== ITYPE_LITERAL
);
4190 gas_assert (insn
->ntok
== 1); /* must be only one token here */
4192 xtensa_switch_to_literal_fragment (&state
);
4194 emit_val
= &insn
->tok
[0];
4195 if (emit_val
->X_op
== O_big
)
4197 int size
= emit_val
->X_add_number
* CHARS_PER_LITTLENUM
;
4200 /* This happens when someone writes a "movi a2, big_number". */
4201 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
4202 _("invalid immediate"));
4203 xtensa_restore_emit_state (&state
);
4208 /* Force a 4-byte align here. Note that this opens a new frag, so all
4209 literals done with this function have a frag to themselves. That's
4210 important for the way text section literals work. */
4211 frag_align (litalign
, 0, 0);
4212 record_alignment (now_seg
, litalign
);
4214 switch (emit_val
->X_op
)
4224 p
= frag_more (litsize
);
4225 xtensa_set_frag_assembly_state (frag_now
);
4226 reloc
= map_operator_to_reloc (emit_val
->X_op
, TRUE
);
4227 if (emit_val
->X_add_symbol
)
4228 emit_val
->X_op
= O_symbol
;
4230 emit_val
->X_op
= O_constant
;
4231 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
4232 litsize
, emit_val
, pcrel
, reloc
);
4236 emit_expr (emit_val
, litsize
);
4240 gas_assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
4241 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4242 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4243 lit_sym
= frag_now
->fr_symbol
;
4246 xtensa_restore_emit_state (&state
);
4252 xg_assemble_literal_space (/* const */ int size
, int slot
)
4255 /* We might have to do something about this alignment. It only
4256 takes effect if something is placed here. */
4257 offsetT litalign
= 2; /* 2^2 = 4 */
4258 fragS
*lit_saved_frag
;
4260 gas_assert (size
% 4 == 0);
4262 xtensa_switch_to_literal_fragment (&state
);
4264 /* Force a 4-byte align here. */
4265 frag_align (litalign
, 0, 0);
4266 record_alignment (now_seg
, litalign
);
4270 lit_saved_frag
= frag_now
;
4271 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4272 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4273 xg_finish_frag (0, RELAX_LITERAL
, 0, size
, FALSE
);
4276 xtensa_restore_emit_state (&state
);
4277 frag_now
->tc_frag_data
.literal_frags
[slot
] = lit_saved_frag
;
4281 /* Put in a fixup record based on the opcode.
4282 Return TRUE on success. */
4285 xg_add_opcode_fix (TInsn
*tinsn
,
4293 xtensa_opcode opcode
= tinsn
->opcode
;
4294 bfd_reloc_code_real_type reloc
;
4295 reloc_howto_type
*howto
;
4299 reloc
= BFD_RELOC_NONE
;
4301 /* First try the special cases for "alternate" relocs. */
4302 if (opcode
== xtensa_l32r_opcode
)
4304 if (fragP
->tc_frag_data
.use_absolute_literals
)
4305 reloc
= encode_alt_reloc (slot
);
4307 else if (opcode
== xtensa_const16_opcode
)
4309 if (exp
->X_op
== O_lo16
)
4311 reloc
= encode_reloc (slot
);
4312 exp
->X_op
= O_symbol
;
4314 else if (exp
->X_op
== O_hi16
)
4316 reloc
= encode_alt_reloc (slot
);
4317 exp
->X_op
= O_symbol
;
4321 if (opnum
!= get_relaxable_immed (opcode
))
4323 as_bad (_("invalid relocation for operand %i of '%s'"),
4324 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4328 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4329 into the symbol table where the generic portions of the assembler
4330 won't know what to do with them. */
4331 if (exp
->X_op
== O_lo16
|| exp
->X_op
== O_hi16
)
4333 as_bad (_("invalid expression for operand %i of '%s'"),
4334 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4338 /* Next try the generic relocs. */
4339 if (reloc
== BFD_RELOC_NONE
)
4340 reloc
= encode_reloc (slot
);
4341 if (reloc
== BFD_RELOC_NONE
)
4343 as_bad (_("invalid relocation in instruction slot %i"), slot
);
4347 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4350 as_bad (_("undefined symbol for opcode \"%s\""),
4351 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4355 fmt_length
= xtensa_format_length (xtensa_default_isa
, fmt
);
4356 the_fix
= fix_new_exp (fragP
, offset
, fmt_length
, exp
,
4357 howto
->pc_relative
, reloc
);
4358 the_fix
->fx_no_overflow
= 1;
4359 the_fix
->tc_fix_data
.X_add_symbol
= exp
->X_add_symbol
;
4360 the_fix
->tc_fix_data
.X_add_number
= exp
->X_add_number
;
4361 the_fix
->tc_fix_data
.slot
= slot
;
4368 xg_emit_insn_to_buf (TInsn
*tinsn
,
4372 bfd_boolean build_fix
)
4374 static xtensa_insnbuf insnbuf
= NULL
;
4375 bfd_boolean has_symbolic_immed
= FALSE
;
4376 bfd_boolean ok
= TRUE
;
4379 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4381 has_symbolic_immed
= tinsn_to_insnbuf (tinsn
, insnbuf
);
4382 if (has_symbolic_immed
&& build_fix
)
4385 xtensa_format fmt
= xg_get_single_format (tinsn
->opcode
);
4386 int slot
= xg_get_single_slot (tinsn
->opcode
);
4387 int opnum
= get_relaxable_immed (tinsn
->opcode
);
4388 expressionS
*exp
= &tinsn
->tok
[opnum
];
4390 if (!xg_add_opcode_fix (tinsn
, opnum
, fmt
, slot
, exp
, fragP
, offset
))
4393 fragP
->tc_frag_data
.is_insn
= TRUE
;
4394 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4395 (unsigned char *) buf
, 0);
4401 xg_resolve_literals (TInsn
*insn
, symbolS
*lit_sym
)
4403 symbolS
*sym
= get_special_literal_symbol ();
4407 gas_assert (insn
->insn_type
== ITYPE_INSN
);
4408 for (i
= 0; i
< insn
->ntok
; i
++)
4409 if (insn
->tok
[i
].X_add_symbol
== sym
)
4410 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4416 xg_resolve_labels (TInsn
*insn
, symbolS
*label_sym
)
4418 symbolS
*sym
= get_special_label_symbol ();
4420 for (i
= 0; i
< insn
->ntok
; i
++)
4421 if (insn
->tok
[i
].X_add_symbol
== sym
)
4422 insn
->tok
[i
].X_add_symbol
= label_sym
;
4427 /* Return TRUE if the instruction can write to the specified
4428 integer register. */
4431 is_register_writer (const TInsn
*insn
, const char *regset
, int regnum
)
4435 xtensa_isa isa
= xtensa_default_isa
;
4437 num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
4439 for (i
= 0; i
< num_ops
; i
++)
4442 inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
4443 if ((inout
== 'o' || inout
== 'm')
4444 && xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
4446 xtensa_regfile opnd_rf
=
4447 xtensa_operand_regfile (isa
, insn
->opcode
, i
);
4448 if (!strcmp (xtensa_regfile_shortname (isa
, opnd_rf
), regset
))
4450 if ((insn
->tok
[i
].X_op
== O_register
)
4451 && (insn
->tok
[i
].X_add_number
== regnum
))
4461 is_bad_loopend_opcode (const TInsn
*tinsn
)
4463 xtensa_opcode opcode
= tinsn
->opcode
;
4465 if (opcode
== XTENSA_UNDEFINED
)
4468 if (opcode
== xtensa_call0_opcode
4469 || opcode
== xtensa_callx0_opcode
4470 || opcode
== xtensa_call4_opcode
4471 || opcode
== xtensa_callx4_opcode
4472 || opcode
== xtensa_call8_opcode
4473 || opcode
== xtensa_callx8_opcode
4474 || opcode
== xtensa_call12_opcode
4475 || opcode
== xtensa_callx12_opcode
4476 || opcode
== xtensa_isync_opcode
4477 || opcode
== xtensa_ret_opcode
4478 || opcode
== xtensa_ret_n_opcode
4479 || opcode
== xtensa_retw_opcode
4480 || opcode
== xtensa_retw_n_opcode
4481 || opcode
== xtensa_waiti_opcode
4482 || opcode
== xtensa_rsr_lcount_opcode
)
4489 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4490 This allows the debugger to add unaligned labels.
4491 Also, the assembler generates stabs labels that need
4492 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4495 is_unaligned_label (symbolS
*sym
)
4497 const char *name
= S_GET_NAME (sym
);
4498 static size_t fake_size
= 0;
4502 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4505 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4507 fake_size
= strlen (FAKE_LABEL_NAME
);
4510 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4511 && (name
[fake_size
] == 'F'
4512 || name
[fake_size
] == 'L'
4513 || (name
[fake_size
] == 'e'
4514 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4522 next_non_empty_frag (const fragS
*fragP
)
4524 fragS
*next_fragP
= fragP
->fr_next
;
4526 /* Sometimes an empty will end up here due storage allocation issues.
4527 So we have to skip until we find something legit. */
4528 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4529 next_fragP
= next_fragP
->fr_next
;
4531 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4539 next_frag_opcode_is_loop (const fragS
*fragP
, xtensa_opcode
*opcode
)
4541 xtensa_opcode out_opcode
;
4542 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4544 if (next_fragP
== NULL
)
4547 out_opcode
= get_opcode_from_buf (next_fragP
->fr_literal
, 0);
4548 if (xtensa_opcode_is_loop (xtensa_default_isa
, out_opcode
) == 1)
4550 *opcode
= out_opcode
;
4558 frag_format_size (const fragS
*fragP
)
4560 static xtensa_insnbuf insnbuf
= NULL
;
4561 xtensa_isa isa
= xtensa_default_isa
;
4566 insnbuf
= xtensa_insnbuf_alloc (isa
);
4569 return XTENSA_UNDEFINED
;
4571 xtensa_insnbuf_from_chars (isa
, insnbuf
,
4572 (unsigned char *) fragP
->fr_literal
, 0);
4574 fmt
= xtensa_format_decode (isa
, insnbuf
);
4575 if (fmt
== XTENSA_UNDEFINED
)
4576 return XTENSA_UNDEFINED
;
4577 fmt_size
= xtensa_format_length (isa
, fmt
);
4579 /* If the next format won't be changing due to relaxation, just
4580 return the length of the first format. */
4581 if (fragP
->fr_opcode
!= fragP
->fr_literal
)
4584 /* If during relaxation we have to pull an instruction out of a
4585 multi-slot instruction, we will return the more conservative
4586 number. This works because alignment on bigger instructions
4587 is more restrictive than alignment on smaller instructions.
4588 This is more conservative than we would like, but it happens
4591 if (xtensa_format_num_slots (xtensa_default_isa
, fmt
) > 1)
4594 /* If we aren't doing one of our own relaxations or it isn't
4595 slot-based, then the insn size won't change. */
4596 if (fragP
->fr_type
!= rs_machine_dependent
)
4598 if (fragP
->fr_subtype
!= RELAX_SLOTS
)
4601 /* If an instruction is about to grow, return the longer size. */
4602 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP1
4603 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP2
4604 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP3
)
4606 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4607 instruction in the relaxed version is of length 3. (The case
4608 where we have to pull the instruction out of a FLIX bundle
4609 is handled conservatively above.) However, frags with opcodes
4610 that are expanding to wide branches end up having formats that
4611 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4612 we can't tell directly what format the relaxer picked. This
4613 is a wart in the design of the relaxer that should someday be
4614 fixed, but would require major changes, or at least should
4615 be accompanied by major changes to make use of that data.
4617 In any event, we can tell that we are expanding from a single-slot
4618 format to a wider one with the logic below. */
4621 int relaxed_size
= fmt_size
+ fragP
->tc_frag_data
.text_expansion
[0];
4623 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
4625 if (relaxed_size
== xtensa_format_length (isa
, i
))
4626 return relaxed_size
;
4632 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
4633 return 2 + fragP
->tc_frag_data
.text_expansion
[0];
4640 next_frag_format_size (const fragS
*fragP
)
4642 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4643 return frag_format_size (next_fragP
);
4647 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4648 required two-byte instructions to be treated as three-byte instructions
4649 for loop instruction alignment. This restriction was removed beginning
4650 with Xtensa LX. Now the only requirement on loop instruction alignment
4651 is that the first instruction of the loop must appear at an address that
4652 does not cross a fetch boundary. */
4655 get_loop_align_size (int insn_size
)
4657 if (insn_size
== XTENSA_UNDEFINED
)
4658 return xtensa_fetch_width
;
4660 if (enforce_three_byte_loop_align
&& insn_size
== 2)
4667 /* If the next legit fragment is an end-of-loop marker,
4668 switch its state so it will instantiate a NOP. */
4671 update_next_frag_state (fragS
*fragP
)
4673 fragS
*next_fragP
= fragP
->fr_next
;
4674 fragS
*new_target
= NULL
;
4678 /* We are guaranteed there will be one of these... */
4679 while (!(next_fragP
->fr_type
== rs_machine_dependent
4680 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4681 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
)))
4682 next_fragP
= next_fragP
->fr_next
;
4684 gas_assert (next_fragP
->fr_type
== rs_machine_dependent
4685 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4686 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
));
4688 /* ...and one of these. */
4689 new_target
= next_fragP
->fr_next
;
4690 while (!(new_target
->fr_type
== rs_machine_dependent
4691 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4692 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
)))
4693 new_target
= new_target
->fr_next
;
4695 gas_assert (new_target
->fr_type
== rs_machine_dependent
4696 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4697 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
));
4700 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4702 if (next_fragP
->fr_type
== rs_machine_dependent
4703 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4705 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4709 next_fragP
= next_fragP
->fr_next
;
4715 next_frag_is_branch_target (const fragS
*fragP
)
4717 /* Sometimes an empty will end up here due to storage allocation issues,
4718 so we have to skip until we find something legit. */
4719 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4721 if (fragP
->tc_frag_data
.is_branch_target
)
4723 if (fragP
->fr_fix
!= 0)
4731 next_frag_is_loop_target (const fragS
*fragP
)
4733 /* Sometimes an empty will end up here due storage allocation issues.
4734 So we have to skip until we find something legit. */
4735 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4737 if (fragP
->tc_frag_data
.is_loop_target
)
4739 if (fragP
->fr_fix
!= 0)
4746 /* As specified in the relaxation table, when a loop instruction is
4747 relaxed, there are 24 bytes between the loop instruction itself and
4748 the first instruction in the loop. */
4750 #define RELAXED_LOOP_INSN_BYTES 24
4753 next_frag_pre_opcode_bytes (const fragS
*fragp
)
4755 const fragS
*next_fragp
= fragp
->fr_next
;
4756 xtensa_opcode next_opcode
;
4758 if (!next_frag_opcode_is_loop (fragp
, &next_opcode
))
4761 /* Sometimes an empty will end up here due to storage allocation issues,
4762 so we have to skip until we find something legit. */
4763 while (next_fragp
->fr_fix
== 0)
4764 next_fragp
= next_fragp
->fr_next
;
4766 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4769 /* There is some implicit knowledge encoded in here.
4770 The LOOP instructions that are NOT RELAX_IMMED have
4771 been relaxed. Note that we can assume that the LOOP
4772 instruction is in slot 0 because loops aren't bundleable. */
4773 if (next_fragp
->tc_frag_data
.slot_subtypes
[0] > RELAX_IMMED
)
4774 return get_expanded_loop_offset (next_opcode
) + RELAXED_LOOP_INSN_BYTES
;
4780 /* Mark a location where we can later insert literal frags. Update
4781 the section's literal_pool_loc, so subsequent literals can be
4782 placed nearest to their use. */
4785 xtensa_mark_literal_pool_location (void)
4787 /* Any labels pointing to the current location need
4788 to be adjusted to after the literal pool. */
4789 fragS
*pool_location
;
4791 if (use_literal_section
)
4794 /* We stash info in these frags so we can later move the literal's
4795 fixes into this frchain's fix list. */
4796 pool_location
= frag_now
;
4797 frag_now
->tc_frag_data
.lit_frchain
= frchain_now
;
4798 frag_now
->tc_frag_data
.literal_frag
= frag_now
;
4799 /* Just record this frag. */
4800 xtensa_maybe_create_literal_pool_frag (FALSE
, FALSE
);
4801 frag_variant (rs_machine_dependent
, 0, 0,
4802 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4803 xtensa_set_frag_assembly_state (frag_now
);
4804 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
4805 frag_variant (rs_machine_dependent
, 0, 0,
4806 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4807 xtensa_set_frag_assembly_state (frag_now
);
4809 set_literal_pool_location (now_seg
, pool_location
);
4813 /* Build a nop of the correct size into tinsn. */
4816 build_nop (TInsn
*tinsn
, int size
)
4822 tinsn
->opcode
= xtensa_nop_n_opcode
;
4824 if (tinsn
->opcode
== XTENSA_UNDEFINED
)
4825 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4829 if (xtensa_nop_opcode
== XTENSA_UNDEFINED
)
4831 tinsn
->opcode
= xtensa_or_opcode
;
4832 set_expr_const (&tinsn
->tok
[0], 1);
4833 set_expr_const (&tinsn
->tok
[1], 1);
4834 set_expr_const (&tinsn
->tok
[2], 1);
4838 tinsn
->opcode
= xtensa_nop_opcode
;
4840 gas_assert (tinsn
->opcode
!= XTENSA_UNDEFINED
);
4845 /* Assemble a NOP of the requested size in the buffer. User must have
4846 allocated "buf" with at least "size" bytes. */
4849 assemble_nop (int size
, char *buf
)
4851 static xtensa_insnbuf insnbuf
= NULL
;
4854 build_nop (&tinsn
, size
);
4857 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4859 tinsn_to_insnbuf (&tinsn
, insnbuf
);
4860 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4861 (unsigned char *) buf
, 0);
4865 /* Return the number of bytes for the offset of the expanded loop
4866 instruction. This should be incorporated into the relaxation
4867 specification but is hard-coded here. This is used to auto-align
4868 the loop instruction. It is invalid to call this function if the
4869 configuration does not have loops or if the opcode is not a loop
4873 get_expanded_loop_offset (xtensa_opcode opcode
)
4875 /* This is the OFFSET of the loop instruction in the expanded loop.
4876 This MUST correspond directly to the specification of the loop
4877 expansion. It will be validated on fragment conversion. */
4878 gas_assert (opcode
!= XTENSA_UNDEFINED
);
4879 if (opcode
== xtensa_loop_opcode
)
4881 if (opcode
== xtensa_loopnez_opcode
)
4883 if (opcode
== xtensa_loopgtz_opcode
)
4885 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4891 get_literal_pool_location (segT seg
)
4895 struct litpool_seg
*lps
= litpool_seg_list
.next
;
4896 struct litpool_frag
*lpf
;
4897 for ( ; lps
&& lps
->seg
->id
!= seg
->id
; lps
= lps
->next
)
4901 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4902 { /* Skip "candidates" for now. */
4903 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
4907 /* Must convert a lower-priority pool. */
4908 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4910 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
4913 /* Still no match -- try for a low priority pool. */
4914 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4916 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
4921 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4926 set_literal_pool_location (segT seg
, fragS
*literal_pool_loc
)
4928 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4932 /* Set frag assembly state should be called when a new frag is
4933 opened and after a frag has been closed. */
4936 xtensa_set_frag_assembly_state (fragS
*fragP
)
4938 if (!density_supported
)
4939 fragP
->tc_frag_data
.is_no_density
= TRUE
;
4941 /* This function is called from subsegs_finish, which is called
4942 after xtensa_end, so we can't use "use_transform" or
4943 "use_schedule" here. */
4944 if (!directive_state
[directive_transform
])
4945 fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4946 if (directive_state
[directive_longcalls
])
4947 fragP
->tc_frag_data
.use_longcalls
= TRUE
;
4948 fragP
->tc_frag_data
.use_absolute_literals
=
4949 directive_state
[directive_absolute_literals
];
4950 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
4955 relaxable_section (asection
*sec
)
4957 return ((sec
->flags
& SEC_DEBUGGING
) == 0
4958 && strcmp (sec
->name
, ".eh_frame") != 0);
4963 xtensa_mark_frags_for_org (void)
4967 /* Walk over each fragment of all of the current segments. If we find
4968 a .org frag in any of the segments, mark all frags prior to it as
4969 "no transform", which will prevent linker optimizations from messing
4970 up the .org distance. This should be done after
4971 xtensa_find_unmarked_state_frags, because we don't want to worry here
4972 about that function trashing the data we save here. */
4974 for (seclist
= &stdoutput
->sections
;
4975 seclist
&& *seclist
;
4976 seclist
= &(*seclist
)->next
)
4978 segT sec
= *seclist
;
4979 segment_info_type
*seginfo
;
4982 flags
= bfd_get_section_flags (stdoutput
, sec
);
4983 if (flags
& SEC_DEBUGGING
)
4985 if (!(flags
& SEC_ALLOC
))
4988 seginfo
= seg_info (sec
);
4989 if (seginfo
&& seginfo
->frchainP
)
4991 fragS
*last_fragP
= seginfo
->frchainP
->frch_root
;
4992 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
4993 fragP
= fragP
->fr_next
)
4995 /* cvt_frag_to_fill has changed the fr_type of org frags to
4996 rs_fill, so use the value as cached in rs_subtype here. */
4997 if (fragP
->fr_subtype
== RELAX_ORG
)
4999 while (last_fragP
!= fragP
->fr_next
)
5001 last_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
5002 last_fragP
= last_fragP
->fr_next
;
5012 xtensa_find_unmarked_state_frags (void)
5016 /* Walk over each fragment of all of the current segments. For each
5017 unmarked fragment, mark it with the same info as the previous
5019 for (seclist
= &stdoutput
->sections
;
5020 seclist
&& *seclist
;
5021 seclist
= &(*seclist
)->next
)
5023 segT sec
= *seclist
;
5024 segment_info_type
*seginfo
;
5027 flags
= bfd_get_section_flags (stdoutput
, sec
);
5028 if (flags
& SEC_DEBUGGING
)
5030 if (!(flags
& SEC_ALLOC
))
5033 seginfo
= seg_info (sec
);
5034 if (seginfo
&& seginfo
->frchainP
)
5036 fragS
*last_fragP
= 0;
5037 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5038 fragP
= fragP
->fr_next
)
5040 if (fragP
->fr_fix
!= 0
5041 && !fragP
->tc_frag_data
.is_assembly_state_set
)
5043 if (last_fragP
== 0)
5045 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
5046 _("assembly state not set for first frag in section %s"),
5051 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
5052 fragP
->tc_frag_data
.is_no_density
=
5053 last_fragP
->tc_frag_data
.is_no_density
;
5054 fragP
->tc_frag_data
.is_no_transform
=
5055 last_fragP
->tc_frag_data
.is_no_transform
;
5056 fragP
->tc_frag_data
.use_longcalls
=
5057 last_fragP
->tc_frag_data
.use_longcalls
;
5058 fragP
->tc_frag_data
.use_absolute_literals
=
5059 last_fragP
->tc_frag_data
.use_absolute_literals
;
5062 if (fragP
->tc_frag_data
.is_assembly_state_set
)
5071 xtensa_find_unaligned_branch_targets (bfd
*abfd ATTRIBUTE_UNUSED
,
5073 void *unused ATTRIBUTE_UNUSED
)
5075 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5076 segment_info_type
*seginfo
= seg_info (sec
);
5077 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5079 if (flags
& SEC_CODE
)
5081 xtensa_isa isa
= xtensa_default_isa
;
5082 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5083 while (frag
!= NULL
)
5085 if (frag
->tc_frag_data
.is_branch_target
)
5088 addressT branch_align
, frag_addr
;
5091 xtensa_insnbuf_from_chars
5092 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5093 fmt
= xtensa_format_decode (isa
, insnbuf
);
5094 op_size
= xtensa_format_length (isa
, fmt
);
5095 branch_align
= 1 << branch_align_power (sec
);
5096 frag_addr
= frag
->fr_address
% branch_align
;
5097 if (frag_addr
+ op_size
> branch_align
)
5098 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5099 _("unaligned branch target: %d bytes at 0x%lx"),
5100 op_size
, (long) frag
->fr_address
);
5102 frag
= frag
->fr_next
;
5104 xtensa_insnbuf_free (isa
, insnbuf
);
5110 xtensa_find_unaligned_loops (bfd
*abfd ATTRIBUTE_UNUSED
,
5112 void *unused ATTRIBUTE_UNUSED
)
5114 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5115 segment_info_type
*seginfo
= seg_info (sec
);
5116 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5117 xtensa_isa isa
= xtensa_default_isa
;
5119 if (flags
& SEC_CODE
)
5121 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5122 while (frag
!= NULL
)
5124 if (frag
->tc_frag_data
.is_first_loop_insn
)
5130 if (frag
->fr_fix
== 0)
5131 frag
= next_non_empty_frag (frag
);
5135 xtensa_insnbuf_from_chars
5136 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5137 fmt
= xtensa_format_decode (isa
, insnbuf
);
5138 op_size
= xtensa_format_length (isa
, fmt
);
5139 frag_addr
= frag
->fr_address
% xtensa_fetch_width
;
5141 if (frag_addr
+ op_size
> xtensa_fetch_width
)
5142 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5143 _("unaligned loop: %d bytes at 0x%lx"),
5144 op_size
, (long) frag
->fr_address
);
5147 frag
= frag
->fr_next
;
5149 xtensa_insnbuf_free (isa
, insnbuf
);
5155 xg_apply_fix_value (fixS
*fixP
, valueT val
)
5157 xtensa_isa isa
= xtensa_default_isa
;
5158 static xtensa_insnbuf insnbuf
= NULL
;
5159 static xtensa_insnbuf slotbuf
= NULL
;
5162 bfd_boolean alt_reloc
;
5163 xtensa_opcode opcode
;
5164 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5166 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
)
5168 as_fatal (_("unexpected fix"));
5172 insnbuf
= xtensa_insnbuf_alloc (isa
);
5173 slotbuf
= xtensa_insnbuf_alloc (isa
);
5176 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5177 fmt
= xtensa_format_decode (isa
, insnbuf
);
5178 if (fmt
== XTENSA_UNDEFINED
)
5179 as_fatal (_("undecodable fix"));
5180 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5181 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5182 if (opcode
== XTENSA_UNDEFINED
)
5183 as_fatal (_("undecodable fix"));
5185 /* CONST16 immediates are not PC-relative, despite the fact that we
5186 reuse the normal PC-relative operand relocations for the low part
5187 of a CONST16 operand. */
5188 if (opcode
== xtensa_const16_opcode
)
5191 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
,
5192 get_relaxable_immed (opcode
), val
,
5193 fixP
->fx_file
, fixP
->fx_line
);
5195 xtensa_format_set_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5196 xtensa_insnbuf_to_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5202 /* External Functions and Other GAS Hooks. */
5205 xtensa_target_format (void)
5207 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
5212 xtensa_file_arch_init (bfd
*abfd
)
5214 bfd_set_private_flags (abfd
, 0x100 | 0x200);
5219 md_number_to_chars (char *buf
, valueT val
, int n
)
5221 if (target_big_endian
)
5222 number_to_chars_bigendian (buf
, val
, n
);
5224 number_to_chars_littleendian (buf
, val
, n
);
5228 xg_init_global_config (void)
5230 target_big_endian
= XCHAL_HAVE_BE
;
5232 density_supported
= XCHAL_HAVE_DENSITY
;
5233 absolute_literals_supported
= XSHAL_USE_ABSOLUTE_LITERALS
;
5234 xtensa_fetch_width
= XCHAL_INST_FETCH_WIDTH
;
5236 directive_state
[directive_density
] = XCHAL_HAVE_DENSITY
;
5237 directive_state
[directive_absolute_literals
] = XSHAL_USE_ABSOLUTE_LITERALS
;
5241 xtensa_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
5243 xg_init_global_config ();
5246 /* This function is called once, at assembler startup time. It should
5247 set up all the tables, etc. that the MD part of the assembler will
5253 segT current_section
= now_seg
;
5254 int current_subsec
= now_subseg
;
5258 xtensa_default_isa
= xtensa_isa_init (0, 0);
5259 isa
= xtensa_default_isa
;
5263 /* Set up the literal sections. */
5264 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
5266 subseg_set (current_section
, current_subsec
);
5268 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
5269 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
5270 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
5271 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
5272 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
5273 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
5274 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
5275 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
5276 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
5277 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
5278 xtensa_const16_opcode
= xtensa_opcode_lookup (isa
, "const16");
5279 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
5280 xtensa_extui_opcode
= xtensa_opcode_lookup (isa
, "extui");
5281 xtensa_movi_opcode
= xtensa_opcode_lookup (isa
, "movi");
5282 xtensa_movi_n_opcode
= xtensa_opcode_lookup (isa
, "movi.n");
5283 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
5284 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
5285 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
5286 xtensa_l32r_opcode
= xtensa_opcode_lookup (isa
, "l32r");
5287 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
5288 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
5289 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
5290 xtensa_nop_opcode
= xtensa_opcode_lookup (isa
, "nop");
5291 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
5292 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
5293 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
5294 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
5295 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
5296 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
5297 xtensa_rsr_lcount_opcode
= xtensa_opcode_lookup (isa
, "rsr.lcount");
5298 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
5300 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
5302 int format_slots
= xtensa_format_num_slots (isa
, i
);
5303 if (format_slots
> config_max_slots
)
5304 config_max_slots
= format_slots
;
5307 xg_init_vinsn (&cur_vinsn
);
5309 xtensa_num_pipe_stages
= xtensa_isa_num_pipe_stages (isa
);
5311 init_op_placement_info_table ();
5313 /* Set up the assembly state. */
5314 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5315 xtensa_set_frag_assembly_state (frag_now
);
5317 if (!use_literal_section
)
5318 xtensa_mark_literal_pool_location ();
5322 /* TC_INIT_FIX_DATA hook */
5325 xtensa_init_fix_data (fixS
*x
)
5327 x
->tc_fix_data
.slot
= 0;
5328 x
->tc_fix_data
.X_add_symbol
= NULL
;
5329 x
->tc_fix_data
.X_add_number
= 0;
5333 /* tc_frob_label hook */
5336 xtensa_frob_label (symbolS
*sym
)
5340 if (cur_vinsn
.inside_bundle
)
5342 as_bad (_("labels are not valid inside bundles"));
5346 freq
= get_subseg_target_freq (now_seg
, now_subseg
);
5348 /* Since the label was already attached to a frag associated with the
5349 previous basic block, it now needs to be reset to the current frag. */
5350 symbol_set_frag (sym
, frag_now
);
5351 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5353 if (generating_literals
)
5354 xtensa_add_literal_sym (sym
);
5356 xtensa_add_insn_label (sym
);
5358 if (symbol_get_tc (sym
)->is_loop_target
)
5360 if ((get_last_insn_flags (now_seg
, now_subseg
)
5361 & FLAG_IS_BAD_LOOPEND
) != 0)
5362 as_bad (_("invalid last instruction for a zero-overhead loop"));
5364 xtensa_set_frag_assembly_state (frag_now
);
5365 frag_var (rs_machine_dependent
, 4, 4, RELAX_LOOP_END
,
5366 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5368 xtensa_set_frag_assembly_state (frag_now
);
5369 xtensa_move_labels (frag_now
, 0);
5372 /* No target aligning in the absolute section. */
5373 if (now_seg
!= absolute_section
5374 && !is_unaligned_label (sym
)
5375 && !generating_literals
)
5377 xtensa_set_frag_assembly_state (frag_now
);
5379 if (do_align_targets ())
5380 frag_var (rs_machine_dependent
, 0, (int) freq
,
5381 RELAX_DESIRE_ALIGN_IF_TARGET
, frag_now
->fr_symbol
,
5382 frag_now
->fr_offset
, NULL
);
5384 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
5385 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5386 xtensa_set_frag_assembly_state (frag_now
);
5387 xtensa_move_labels (frag_now
, 0);
5390 /* We need to mark the following properties even if we aren't aligning. */
5392 /* If the label is already known to be a branch target, i.e., a
5393 forward branch, mark the frag accordingly. Backward branches
5394 are handled by xg_add_branch_and_loop_targets. */
5395 if (symbol_get_tc (sym
)->is_branch_target
)
5396 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
5398 /* Loops only go forward, so they can be identified here. */
5399 if (symbol_get_tc (sym
)->is_loop_target
)
5400 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
5402 dwarf2_emit_label (sym
);
5406 /* tc_unrecognized_line hook */
5409 xtensa_unrecognized_line (int ch
)
5414 if (cur_vinsn
.inside_bundle
== 0)
5416 /* PR8110: Cannot emit line number info inside a FLIX bundle
5417 when using --gstabs. Temporarily disable debug info. */
5418 generate_lineno_debug ();
5419 if (debug_type
== DEBUG_STABS
)
5421 xt_saved_debug_type
= debug_type
;
5422 debug_type
= DEBUG_NONE
;
5425 cur_vinsn
.inside_bundle
= 1;
5429 as_bad (_("extra opening brace"));
5435 if (cur_vinsn
.inside_bundle
)
5436 finish_vinsn (&cur_vinsn
);
5439 as_bad (_("extra closing brace"));
5444 as_bad (_("syntax error"));
5451 /* md_flush_pending_output hook */
5454 xtensa_flush_pending_output (void)
5456 /* This line fixes a bug where automatically generated gstabs info
5457 separates a function label from its entry instruction, ending up
5458 with the literal position between the function label and the entry
5459 instruction and crashing code. It only happens with --gstabs and
5460 --text-section-literals, and when several other obscure relaxation
5461 conditions are met. */
5462 if (outputting_stabs_line_debug
)
5465 if (cur_vinsn
.inside_bundle
)
5466 as_bad (_("missing closing brace"));
5468 /* If there is a non-zero instruction fragment, close it. */
5469 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
5471 frag_wane (frag_now
);
5473 xtensa_set_frag_assembly_state (frag_now
);
5475 frag_now
->tc_frag_data
.is_insn
= FALSE
;
5477 xtensa_clear_insn_labels ();
5481 /* We had an error while parsing an instruction. The string might look
5482 like this: "insn arg1, arg2 }". If so, we need to see the closing
5483 brace and reset some fields. Otherwise, the vinsn never gets closed
5484 and the num_slots field will grow past the end of the array of slots,
5485 and bad things happen. */
5488 error_reset_cur_vinsn (void)
5490 if (cur_vinsn
.inside_bundle
)
5492 if (*input_line_pointer
== '}'
5493 || *(input_line_pointer
- 1) == '}'
5494 || *(input_line_pointer
- 2) == '}')
5495 xg_clear_vinsn (&cur_vinsn
);
5501 md_assemble (char *str
)
5503 xtensa_isa isa
= xtensa_default_isa
;
5506 bfd_boolean has_underbar
= FALSE
;
5507 char *arg_strings
[MAX_INSN_ARGS
];
5509 TInsn orig_insn
; /* Original instruction from the input. */
5511 tinsn_init (&orig_insn
);
5513 /* Split off the opcode. */
5514 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5515 opname
= xstrndup (str
, opnamelen
);
5517 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
5520 as_bad (_("syntax error"));
5524 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
5527 /* Check for an underbar prefix. */
5530 has_underbar
= TRUE
;
5534 orig_insn
.insn_type
= ITYPE_INSN
;
5536 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_transform ());
5537 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
5539 /* Special case: Check for "CALLXn.TLS" pseudo op. If found, grab its
5540 extra argument and set the opcode to "CALLXn". */
5541 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5542 && strncasecmp (opname
, "callx", 5) == 0)
5544 unsigned long window_size
;
5547 window_size
= strtoul (opname
+ 5, &suffix
, 10);
5548 if (suffix
!= opname
+ 5
5549 && (window_size
== 0
5552 || window_size
== 12)
5553 && strcasecmp (suffix
, ".tls") == 0)
5555 switch (window_size
)
5557 case 0: orig_insn
.opcode
= xtensa_callx0_opcode
; break;
5558 case 4: orig_insn
.opcode
= xtensa_callx4_opcode
; break;
5559 case 8: orig_insn
.opcode
= xtensa_callx8_opcode
; break;
5560 case 12: orig_insn
.opcode
= xtensa_callx12_opcode
; break;
5564 as_bad (_("wrong number of operands for '%s'"), opname
);
5567 bfd_reloc_code_real_type reloc
;
5568 char *old_input_line_pointer
;
5569 expressionS
*tok
= &orig_insn
.extra_arg
;
5571 old_input_line_pointer
= input_line_pointer
;
5572 input_line_pointer
= arg_strings
[num_args
- 1];
5575 if (tok
->X_op
== O_symbol
5576 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
5577 == BFD_RELOC_XTENSA_TLS_CALL
))
5578 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
5580 as_bad (_("bad relocation expression for '%s'"), opname
);
5582 input_line_pointer
= old_input_line_pointer
;
5588 /* Special case: Check for "j.l" pseudo op. */
5589 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5590 && strncasecmp (opname
, "j.l", 3) == 0)
5593 as_bad (_("wrong number of operands for '%s'"), opname
);
5596 char *old_input_line_pointer
;
5597 expressionS
*tok
= &orig_insn
.extra_arg
;
5599 old_input_line_pointer
= input_line_pointer
;
5600 input_line_pointer
= arg_strings
[num_args
- 1];
5602 expression_maybe_register (xtensa_jx_opcode
, 0, tok
);
5603 input_line_pointer
= old_input_line_pointer
;
5606 orig_insn
.opcode
= xtensa_j_opcode
;
5610 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
5612 xtensa_format fmt
= xtensa_format_lookup (isa
, opname
);
5613 if (fmt
== XTENSA_UNDEFINED
)
5615 as_bad (_("unknown opcode or format name '%s'"), opname
);
5616 error_reset_cur_vinsn ();
5619 if (!cur_vinsn
.inside_bundle
)
5621 as_bad (_("format names only valid inside bundles"));
5622 error_reset_cur_vinsn ();
5625 if (cur_vinsn
.format
!= XTENSA_UNDEFINED
)
5626 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5628 cur_vinsn
.format
= fmt
;
5629 free (has_underbar
? opname
- 1 : opname
);
5630 error_reset_cur_vinsn ();
5634 /* Parse the arguments. */
5635 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
5637 as_bad (_("syntax error"));
5638 error_reset_cur_vinsn ();
5642 /* Free the opcode and argument strings, now that they've been parsed. */
5643 free (has_underbar
? opname
- 1 : opname
);
5645 while (num_args
-- > 0)
5646 free (arg_strings
[num_args
]);
5648 /* Get expressions for invisible operands. */
5649 if (get_invisible_operands (&orig_insn
))
5651 error_reset_cur_vinsn ();
5655 /* Check for the right number and type of arguments. */
5656 if (tinsn_check_arguments (&orig_insn
))
5658 error_reset_cur_vinsn ();
5662 /* Record the line number for each TInsn, because a FLIX bundle may be
5663 spread across multiple input lines and individual instructions may be
5664 moved around in some cases. */
5665 orig_insn
.loc_directive_seen
= dwarf2_loc_directive_seen
;
5666 dwarf2_where (&orig_insn
.debug_line
);
5667 dwarf2_consume_line_info ();
5669 xg_add_branch_and_loop_targets (&orig_insn
);
5671 /* Check that immediate value for ENTRY is >= 16. */
5672 if (orig_insn
.opcode
== xtensa_entry_opcode
&& orig_insn
.ntok
>= 3)
5674 expressionS
*exp
= &orig_insn
.tok
[2];
5675 if (exp
->X_op
== O_constant
&& exp
->X_add_number
< 16)
5676 as_warn (_("entry instruction with stack decrement < 16"));
5680 assemble_tokens (opcode, tok, ntok);
5681 expand the tokens from the orig_insn into the
5682 stack of instructions that will not expand
5683 unless required at relaxation time. */
5685 if (!cur_vinsn
.inside_bundle
)
5686 emit_single_op (&orig_insn
);
5687 else /* We are inside a bundle. */
5689 cur_vinsn
.slots
[cur_vinsn
.num_slots
] = orig_insn
;
5690 cur_vinsn
.num_slots
++;
5691 if (*input_line_pointer
== '}'
5692 || *(input_line_pointer
- 1) == '}'
5693 || *(input_line_pointer
- 2) == '}')
5694 finish_vinsn (&cur_vinsn
);
5697 /* We've just emitted a new instruction so clear the list of labels. */
5698 xtensa_clear_insn_labels ();
5700 xtensa_check_frag_count ();
5704 /* HANDLE_ALIGN hook */
5706 /* For a .align directive, we mark the previous block with the alignment
5707 information. This will be placed in the object file in the
5708 property section corresponding to this section. */
5711 xtensa_handle_align (fragS
*fragP
)
5714 && ! fragP
->tc_frag_data
.is_literal
5715 && (fragP
->fr_type
== rs_align
5716 || fragP
->fr_type
== rs_align_code
)
5717 && fragP
->fr_offset
> 0
5718 && now_seg
!= bss_section
)
5720 fragP
->tc_frag_data
.is_align
= TRUE
;
5721 fragP
->tc_frag_data
.alignment
= fragP
->fr_offset
;
5724 if (fragP
->fr_type
== rs_align_test
)
5727 count
= fragP
->fr_next
->fr_address
- fragP
->fr_address
- fragP
->fr_fix
;
5729 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
5730 _("unaligned entry instruction"));
5733 if (linkrelax
&& fragP
->fr_type
== rs_org
)
5734 fragP
->fr_subtype
= RELAX_ORG
;
5738 /* TC_FRAG_INIT hook */
5741 xtensa_frag_init (fragS
*frag
)
5743 xtensa_set_frag_assembly_state (frag
);
5748 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
5754 /* Round up a section size to the appropriate boundary. */
5757 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
5759 return size
; /* Byte alignment is fine. */
5764 md_pcrel_from (fixS
*fixP
)
5767 static xtensa_insnbuf insnbuf
= NULL
;
5768 static xtensa_insnbuf slotbuf
= NULL
;
5771 xtensa_opcode opcode
;
5774 xtensa_isa isa
= xtensa_default_isa
;
5775 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5776 bfd_boolean alt_reloc
;
5778 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5781 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
)
5786 insnbuf
= xtensa_insnbuf_alloc (isa
);
5787 slotbuf
= xtensa_insnbuf_alloc (isa
);
5790 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5791 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) insn_p
, 0);
5792 fmt
= xtensa_format_decode (isa
, insnbuf
);
5794 if (fmt
== XTENSA_UNDEFINED
)
5795 as_fatal (_("bad instruction format"));
5797 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
) != 0)
5798 as_fatal (_("invalid relocation"));
5800 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5801 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5803 /* Check for "alternate" relocations (operand not specified). None
5804 of the current uses for these are really PC-relative. */
5805 if (alt_reloc
|| opcode
== xtensa_const16_opcode
)
5807 if (opcode
!= xtensa_l32r_opcode
5808 && opcode
!= xtensa_const16_opcode
)
5809 as_fatal (_("invalid relocation for '%s' instruction"),
5810 xtensa_opcode_name (isa
, opcode
));
5814 opnum
= get_relaxable_immed (opcode
);
5816 if (xtensa_operand_is_PCrelative (isa
, opcode
, opnum
) != 1
5817 || xtensa_operand_do_reloc (isa
, opcode
, opnum
, &opnd_value
, addr
))
5819 as_bad_where (fixP
->fx_file
,
5821 _("invalid relocation for operand %d of '%s'"),
5822 opnum
, xtensa_opcode_name (isa
, opcode
));
5825 return 0 - opnd_value
;
5829 /* TC_FORCE_RELOCATION hook */
5832 xtensa_force_relocation (fixS
*fix
)
5834 switch (fix
->fx_r_type
)
5836 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5837 case BFD_RELOC_XTENSA_SLOT0_ALT
:
5838 case BFD_RELOC_XTENSA_SLOT1_ALT
:
5839 case BFD_RELOC_XTENSA_SLOT2_ALT
:
5840 case BFD_RELOC_XTENSA_SLOT3_ALT
:
5841 case BFD_RELOC_XTENSA_SLOT4_ALT
:
5842 case BFD_RELOC_XTENSA_SLOT5_ALT
:
5843 case BFD_RELOC_XTENSA_SLOT6_ALT
:
5844 case BFD_RELOC_XTENSA_SLOT7_ALT
:
5845 case BFD_RELOC_XTENSA_SLOT8_ALT
:
5846 case BFD_RELOC_XTENSA_SLOT9_ALT
:
5847 case BFD_RELOC_XTENSA_SLOT10_ALT
:
5848 case BFD_RELOC_XTENSA_SLOT11_ALT
:
5849 case BFD_RELOC_XTENSA_SLOT12_ALT
:
5850 case BFD_RELOC_XTENSA_SLOT13_ALT
:
5851 case BFD_RELOC_XTENSA_SLOT14_ALT
:
5857 if (linkrelax
&& fix
->fx_addsy
5858 && relaxable_section (S_GET_SEGMENT (fix
->fx_addsy
)))
5861 return generic_force_reloc (fix
);
5865 /* TC_VALIDATE_FIX_SUB hook */
5868 xtensa_validate_fix_sub (fixS
*fix
)
5870 segT add_symbol_segment
, sub_symbol_segment
;
5872 /* The difference of two symbols should be resolved by the assembler when
5873 linkrelax is not set. If the linker may relax the section containing
5874 the symbols, then an Xtensa DIFF relocation must be generated so that
5875 the linker knows to adjust the difference value. */
5876 if (!linkrelax
|| fix
->fx_addsy
== NULL
)
5879 /* Make sure both symbols are in the same segment, and that segment is
5880 "normal" and relaxable. If the segment is not "normal", then the
5881 fix is not valid. If the segment is not "relaxable", then the fix
5882 should have been handled earlier. */
5883 add_symbol_segment
= S_GET_SEGMENT (fix
->fx_addsy
);
5884 if (! SEG_NORMAL (add_symbol_segment
) ||
5885 ! relaxable_section (add_symbol_segment
))
5887 sub_symbol_segment
= S_GET_SEGMENT (fix
->fx_subsy
);
5888 return (sub_symbol_segment
== add_symbol_segment
);
5892 /* NO_PSEUDO_DOT hook */
5894 /* This function has nothing to do with pseudo dots, but this is the
5895 nearest macro to where the check needs to take place. FIXME: This
5899 xtensa_check_inside_bundle (void)
5901 if (cur_vinsn
.inside_bundle
&& input_line_pointer
[-1] == '.')
5902 as_bad (_("directives are not valid inside bundles"));
5904 /* This function must always return FALSE because it is called via a
5905 macro that has nothing to do with bundling. */
5910 /* md_elf_section_change_hook */
5913 xtensa_elf_section_change_hook (void)
5915 /* Set up the assembly state. */
5916 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5917 xtensa_set_frag_assembly_state (frag_now
);
5919 if (!use_literal_section
5920 && seg_info (now_seg
)->tc_segment_info_data
.literal_pool_loc
== NULL
5921 && !xtensa_is_init_fini (now_seg
))
5922 xtensa_mark_literal_pool_location ();
5926 /* tc_fix_adjustable hook */
5929 xtensa_fix_adjustable (fixS
*fixP
)
5931 /* We need the symbol name for the VTABLE entries. */
5932 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5933 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5940 /* tc_symbol_new_hook */
5942 symbolS
*expr_symbols
= NULL
;
5945 xtensa_symbol_new_hook (symbolS
*sym
)
5947 if (is_leb128_expr
&& S_GET_SEGMENT (sym
) == expr_section
)
5949 symbol_get_tc (sym
)->next_expr_symbol
= expr_symbols
;
5956 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
5958 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5961 /* Subtracted symbols are only allowed for a few relocation types, and
5962 unless linkrelax is enabled, they should not make it to this point. */
5963 if (fixP
->fx_subsy
&& !(linkrelax
&& (fixP
->fx_r_type
== BFD_RELOC_32
5964 || fixP
->fx_r_type
== BFD_RELOC_16
5965 || fixP
->fx_r_type
== BFD_RELOC_8
)))
5966 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
5968 switch (fixP
->fx_r_type
)
5970 case BFD_RELOC_32_PCREL
:
5976 switch (fixP
->fx_r_type
)
5979 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF8
;
5980 fixP
->fx_signed
= 0;
5983 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF16
;
5984 fixP
->fx_signed
= 0;
5987 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF32
;
5988 fixP
->fx_signed
= 0;
5994 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
5995 - S_GET_VALUE (fixP
->fx_subsy
));
5997 /* The difference value gets written out, and the DIFF reloc
5998 identifies the address of the subtracted symbol (i.e., the one
5999 with the lowest address). */
6001 fixP
->fx_offset
-= val
;
6002 fixP
->fx_subsy
= NULL
;
6004 else if (! fixP
->fx_addsy
)
6009 else if (S_GET_SEGMENT (fixP
->fx_addsy
) == absolute_section
)
6011 val
= S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
;
6017 case BFD_RELOC_XTENSA_PLT
:
6018 md_number_to_chars (fixpos
, val
, fixP
->fx_size
);
6019 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6022 case BFD_RELOC_XTENSA_TLSDESC_FN
:
6023 case BFD_RELOC_XTENSA_TLSDESC_ARG
:
6024 case BFD_RELOC_XTENSA_TLS_TPOFF
:
6025 case BFD_RELOC_XTENSA_TLS_DTPOFF
:
6026 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6027 md_number_to_chars (fixpos
, 0, fixP
->fx_size
);
6028 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6031 case BFD_RELOC_XTENSA_SLOT0_OP
:
6032 case BFD_RELOC_XTENSA_SLOT1_OP
:
6033 case BFD_RELOC_XTENSA_SLOT2_OP
:
6034 case BFD_RELOC_XTENSA_SLOT3_OP
:
6035 case BFD_RELOC_XTENSA_SLOT4_OP
:
6036 case BFD_RELOC_XTENSA_SLOT5_OP
:
6037 case BFD_RELOC_XTENSA_SLOT6_OP
:
6038 case BFD_RELOC_XTENSA_SLOT7_OP
:
6039 case BFD_RELOC_XTENSA_SLOT8_OP
:
6040 case BFD_RELOC_XTENSA_SLOT9_OP
:
6041 case BFD_RELOC_XTENSA_SLOT10_OP
:
6042 case BFD_RELOC_XTENSA_SLOT11_OP
:
6043 case BFD_RELOC_XTENSA_SLOT12_OP
:
6044 case BFD_RELOC_XTENSA_SLOT13_OP
:
6045 case BFD_RELOC_XTENSA_SLOT14_OP
:
6048 /* Write the tentative value of a PC-relative relocation to a
6049 local symbol into the instruction. The value will be ignored
6050 by the linker, and it makes the object file disassembly
6051 readable when all branch targets are encoded in relocations. */
6053 gas_assert (fixP
->fx_addsy
);
6054 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
6055 && !S_FORCE_RELOC (fixP
->fx_addsy
, 1))
6057 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6058 - md_pcrel_from (fixP
));
6059 (void) xg_apply_fix_value (fixP
, val
);
6062 else if (! fixP
->fx_addsy
)
6065 if (xg_apply_fix_value (fixP
, val
))
6070 case BFD_RELOC_XTENSA_ASM_EXPAND
:
6071 case BFD_RELOC_XTENSA_TLS_FUNC
:
6072 case BFD_RELOC_XTENSA_TLS_ARG
:
6073 case BFD_RELOC_XTENSA_TLS_CALL
:
6074 case BFD_RELOC_XTENSA_SLOT0_ALT
:
6075 case BFD_RELOC_XTENSA_SLOT1_ALT
:
6076 case BFD_RELOC_XTENSA_SLOT2_ALT
:
6077 case BFD_RELOC_XTENSA_SLOT3_ALT
:
6078 case BFD_RELOC_XTENSA_SLOT4_ALT
:
6079 case BFD_RELOC_XTENSA_SLOT5_ALT
:
6080 case BFD_RELOC_XTENSA_SLOT6_ALT
:
6081 case BFD_RELOC_XTENSA_SLOT7_ALT
:
6082 case BFD_RELOC_XTENSA_SLOT8_ALT
:
6083 case BFD_RELOC_XTENSA_SLOT9_ALT
:
6084 case BFD_RELOC_XTENSA_SLOT10_ALT
:
6085 case BFD_RELOC_XTENSA_SLOT11_ALT
:
6086 case BFD_RELOC_XTENSA_SLOT12_ALT
:
6087 case BFD_RELOC_XTENSA_SLOT13_ALT
:
6088 case BFD_RELOC_XTENSA_SLOT14_ALT
:
6089 /* These all need to be resolved at link-time. Do nothing now. */
6092 case BFD_RELOC_VTABLE_INHERIT
:
6093 case BFD_RELOC_VTABLE_ENTRY
:
6098 as_bad (_("unhandled local relocation fix %s"),
6099 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6105 md_atof (int type
, char *litP
, int *sizeP
)
6107 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
6112 md_estimate_size_before_relax (fragS
*fragP
, segT seg ATTRIBUTE_UNUSED
)
6114 return total_frag_text_expansion (fragP
);
6118 /* Translate internal representation of relocation info to BFD target
6122 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
6126 reloc
= XNEW (arelent
);
6127 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
6128 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
6129 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6131 /* Make sure none of our internal relocations make it this far.
6132 They'd better have been fully resolved by this point. */
6133 gas_assert ((int) fixp
->fx_r_type
> 0);
6135 reloc
->addend
= fixp
->fx_offset
;
6137 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
6138 if (reloc
->howto
== NULL
)
6140 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
6141 _("cannot represent `%s' relocation in object file"),
6142 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6143 free (reloc
->sym_ptr_ptr
);
6148 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
6149 as_fatal (_("internal error; cannot generate `%s' relocation"),
6150 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6156 /* Checks for resource conflicts between instructions. */
6158 /* The func unit stuff could be implemented as bit-vectors rather
6159 than the iterative approach here. If it ends up being too
6160 slow, we will switch it. */
6163 new_resource_table (void *data
,
6166 unit_num_copies_func uncf
,
6167 opcode_num_units_func onuf
,
6168 opcode_funcUnit_use_unit_func ouuf
,
6169 opcode_funcUnit_use_stage_func ousf
)
6172 resource_table
*rt
= XNEW (resource_table
);
6174 rt
->cycles
= cycles
;
6175 rt
->allocated_cycles
= cycles
;
6177 rt
->unit_num_copies
= uncf
;
6178 rt
->opcode_num_units
= onuf
;
6179 rt
->opcode_unit_use
= ouuf
;
6180 rt
->opcode_unit_stage
= ousf
;
6182 rt
->units
= XCNEWVEC (unsigned char *, cycles
);
6183 for (i
= 0; i
< cycles
; i
++)
6184 rt
->units
[i
] = XCNEWVEC (unsigned char, nu
);
6191 clear_resource_table (resource_table
*rt
)
6194 for (i
= 0; i
< rt
->allocated_cycles
; i
++)
6195 for (j
= 0; j
< rt
->num_units
; j
++)
6196 rt
->units
[i
][j
] = 0;
6200 /* We never shrink it, just fake it into thinking so. */
6203 resize_resource_table (resource_table
*rt
, int cycles
)
6207 rt
->cycles
= cycles
;
6208 if (cycles
<= rt
->allocated_cycles
)
6211 old_cycles
= rt
->allocated_cycles
;
6212 rt
->allocated_cycles
= cycles
;
6214 rt
->units
= XRESIZEVEC (unsigned char *, rt
->units
, rt
->allocated_cycles
);
6215 for (i
= 0; i
< old_cycles
; i
++)
6216 rt
->units
[i
] = XRESIZEVEC (unsigned char, rt
->units
[i
], rt
->num_units
);
6217 for (i
= old_cycles
; i
< cycles
; i
++)
6218 rt
->units
[i
] = XCNEWVEC (unsigned char, rt
->num_units
);
6223 resources_available (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6226 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6228 for (i
= 0; i
< uses
; i
++)
6230 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6231 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6232 int copies_in_use
= rt
->units
[stage
+ cycle
][unit
];
6233 int copies
= (rt
->unit_num_copies
) (rt
->data
, unit
);
6234 if (copies_in_use
>= copies
)
6242 reserve_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6245 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6247 for (i
= 0; i
< uses
; i
++)
6249 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6250 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6251 /* Note that this allows resources to be oversubscribed. That's
6252 essential to the way the optional scheduler works.
6253 resources_available reports when a resource is over-subscribed,
6254 so it's easy to tell. */
6255 rt
->units
[stage
+ cycle
][unit
]++;
6261 release_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6264 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6266 for (i
= 0; i
< uses
; i
++)
6268 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6269 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6270 gas_assert (rt
->units
[stage
+ cycle
][unit
] > 0);
6271 rt
->units
[stage
+ cycle
][unit
]--;
6276 /* Wrapper functions make parameterized resource reservation
6280 opcode_funcUnit_use_unit (void *data
, xtensa_opcode opcode
, int idx
)
6282 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6288 opcode_funcUnit_use_stage (void *data
, xtensa_opcode opcode
, int idx
)
6290 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6295 /* Note that this function does not check issue constraints, but
6296 solely whether the hardware is available to execute the given
6297 instructions together. It also doesn't check if the tinsns
6298 write the same state, or access the same tieports. That is
6299 checked by check_t1_t2_reads_and_writes. */
6302 resources_conflict (vliw_insn
*vinsn
)
6305 static resource_table
*rt
= NULL
;
6307 /* This is the most common case by far. Optimize it. */
6308 if (vinsn
->num_slots
== 1)
6313 xtensa_isa isa
= xtensa_default_isa
;
6314 rt
= new_resource_table
6315 (isa
, xtensa_num_pipe_stages
,
6316 xtensa_isa_num_funcUnits (isa
),
6317 (unit_num_copies_func
) xtensa_funcUnit_num_copies
,
6318 (opcode_num_units_func
) xtensa_opcode_num_funcUnit_uses
,
6319 opcode_funcUnit_use_unit
,
6320 opcode_funcUnit_use_stage
);
6323 clear_resource_table (rt
);
6325 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6327 if (!resources_available (rt
, vinsn
->slots
[i
].opcode
, 0))
6329 reserve_resources (rt
, vinsn
->slots
[i
].opcode
, 0);
6336 /* finish_vinsn, emit_single_op and helper functions. */
6338 static bfd_boolean
find_vinsn_conflicts (vliw_insn
*);
6339 static xtensa_format
xg_find_narrowest_format (vliw_insn
*);
6340 static void xg_assemble_vliw_tokens (vliw_insn
*);
6343 /* We have reached the end of a bundle; emit into the frag. */
6346 finish_vinsn (vliw_insn
*vinsn
)
6352 if (find_vinsn_conflicts (vinsn
))
6354 xg_clear_vinsn (vinsn
);
6358 /* First, find a format that works. */
6359 if (vinsn
->format
== XTENSA_UNDEFINED
)
6360 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6362 slots
= xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
);
6364 && produce_flix
== FLIX_NONE
)
6366 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6367 xg_clear_vinsn (vinsn
);
6371 if (vinsn
->format
== XTENSA_UNDEFINED
)
6373 as_bad (_("couldn't find a valid instruction format"));
6374 fprintf (stderr
, _(" ops were: "));
6375 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6376 fprintf (stderr
, _(" %s;"),
6377 xtensa_opcode_name (xtensa_default_isa
,
6378 vinsn
->slots
[i
].opcode
));
6379 fprintf (stderr
, _("\n"));
6380 xg_clear_vinsn (vinsn
);
6384 if (vinsn
->num_slots
!= slots
)
6386 as_bad (_("mismatch for format '%s': #slots = %d, #opcodes = %d"),
6387 xtensa_format_name (xtensa_default_isa
, vinsn
->format
),
6388 slots
, vinsn
->num_slots
);
6389 xg_clear_vinsn (vinsn
);
6393 if (resources_conflict (vinsn
))
6395 as_bad (_("illegal resource usage in bundle"));
6396 fprintf (stderr
, " ops were: ");
6397 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6398 fprintf (stderr
, " %s;",
6399 xtensa_opcode_name (xtensa_default_isa
,
6400 vinsn
->slots
[i
].opcode
));
6401 fprintf (stderr
, "\n");
6402 xg_clear_vinsn (vinsn
);
6406 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6408 if (vinsn
->slots
[i
].opcode
!= XTENSA_UNDEFINED
)
6410 symbolS
*lit_sym
= NULL
;
6412 bfd_boolean e
= FALSE
;
6413 bfd_boolean saved_density
= density_supported
;
6415 /* We don't want to narrow ops inside multi-slot bundles. */
6416 if (vinsn
->num_slots
> 1)
6417 density_supported
= FALSE
;
6419 istack_init (&slotstack
);
6420 if (vinsn
->slots
[i
].opcode
== xtensa_nop_opcode
)
6422 vinsn
->slots
[i
].opcode
=
6423 xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6425 vinsn
->slots
[i
].ntok
= 0;
6428 if (xg_expand_assembly_insn (&slotstack
, &vinsn
->slots
[i
]))
6434 density_supported
= saved_density
;
6438 xg_clear_vinsn (vinsn
);
6442 for (j
= 0; j
< slotstack
.ninsn
; j
++)
6444 TInsn
*insn
= &slotstack
.insn
[j
];
6445 if (insn
->insn_type
== ITYPE_LITERAL
)
6447 gas_assert (lit_sym
== NULL
);
6448 lit_sym
= xg_assemble_literal (insn
);
6452 gas_assert (insn
->insn_type
== ITYPE_INSN
);
6454 xg_resolve_literals (insn
, lit_sym
);
6455 if (j
!= slotstack
.ninsn
- 1)
6456 emit_single_op (insn
);
6460 if (vinsn
->num_slots
> 1)
6462 if (opcode_fits_format_slot
6463 (slotstack
.insn
[slotstack
.ninsn
- 1].opcode
,
6466 vinsn
->slots
[i
] = slotstack
.insn
[slotstack
.ninsn
- 1];
6470 emit_single_op (&slotstack
.insn
[slotstack
.ninsn
- 1]);
6471 if (vinsn
->format
== XTENSA_UNDEFINED
)
6472 vinsn
->slots
[i
].opcode
= xtensa_nop_opcode
;
6474 vinsn
->slots
[i
].opcode
6475 = xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6478 vinsn
->slots
[i
].ntok
= 0;
6483 vinsn
->slots
[0] = slotstack
.insn
[slotstack
.ninsn
- 1];
6484 vinsn
->format
= XTENSA_UNDEFINED
;
6489 /* Now check resource conflicts on the modified bundle. */
6490 if (resources_conflict (vinsn
))
6492 as_bad (_("illegal resource usage in bundle"));
6493 fprintf (stderr
, " ops were: ");
6494 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6495 fprintf (stderr
, " %s;",
6496 xtensa_opcode_name (xtensa_default_isa
,
6497 vinsn
->slots
[i
].opcode
));
6498 fprintf (stderr
, "\n");
6499 xg_clear_vinsn (vinsn
);
6503 /* First, find a format that works. */
6504 if (vinsn
->format
== XTENSA_UNDEFINED
)
6505 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6507 xg_assemble_vliw_tokens (vinsn
);
6509 xg_clear_vinsn (vinsn
);
6511 xtensa_check_frag_count ();
6515 /* Given an vliw instruction, what conflicts are there in register
6516 usage and in writes to states and queues?
6518 This function does two things:
6519 1. Reports an error when a vinsn contains illegal combinations
6520 of writes to registers states or queues.
6521 2. Marks individual tinsns as not relaxable if the combination
6522 contains antidependencies.
6524 Job 2 handles things like swap semantics in instructions that need
6525 to be relaxed. For example,
6529 normally would be relaxed to
6534 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6536 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6538 then we can't relax it into
6541 { add a0, a1, a0 ; add a2, a0, a4 ; }
6543 because the value of a0 is trashed before the second add can read it. */
6545 static char check_t1_t2_reads_and_writes (TInsn
*, TInsn
*);
6548 find_vinsn_conflicts (vliw_insn
*vinsn
)
6552 xtensa_isa isa
= xtensa_default_isa
;
6554 gas_assert (!past_xtensa_end
);
6556 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6558 TInsn
*op1
= &vinsn
->slots
[i
];
6559 if (op1
->is_specific_opcode
)
6560 op1
->keep_wide
= TRUE
;
6562 op1
->keep_wide
= FALSE
;
6565 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6567 TInsn
*op1
= &vinsn
->slots
[i
];
6569 if (xtensa_opcode_is_branch (isa
, op1
->opcode
) == 1)
6572 for (j
= 0; j
< vinsn
->num_slots
; j
++)
6576 TInsn
*op2
= &vinsn
->slots
[j
];
6577 char conflict_type
= check_t1_t2_reads_and_writes (op1
, op2
);
6578 switch (conflict_type
)
6581 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6582 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6583 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6586 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6587 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6588 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6591 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6592 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6593 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6596 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6597 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6598 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6601 /* Everything is OK. */
6604 op2
->is_specific_opcode
= (op2
->is_specific_opcode
6605 || conflict_type
== 'a');
6612 as_bad (_("multiple branches or jumps in the same bundle"));
6620 /* Check how the state used by t1 and t2 relate.
6623 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6624 case B: no relationship between what is read and written (both could
6625 read the same reg though)
6626 case C: t1 writes a register t2 writes (a register conflict within a
6628 case D: t1 writes a state that t2 also writes
6629 case E: t1 writes a tie queue that t2 also writes
6630 case F: two volatile queue accesses
6634 check_t1_t2_reads_and_writes (TInsn
*t1
, TInsn
*t2
)
6636 xtensa_isa isa
= xtensa_default_isa
;
6637 xtensa_regfile t1_regfile
, t2_regfile
;
6639 int t1_base_reg
, t1_last_reg
;
6640 int t2_base_reg
, t2_last_reg
;
6641 char t1_inout
, t2_inout
;
6643 char conflict
= 'b';
6648 bfd_boolean t1_volatile
= FALSE
;
6649 bfd_boolean t2_volatile
= FALSE
;
6651 /* Check registers. */
6652 for (j
= 0; j
< t2
->ntok
; j
++)
6654 if (xtensa_operand_is_register (isa
, t2
->opcode
, j
) != 1)
6657 t2_regfile
= xtensa_operand_regfile (isa
, t2
->opcode
, j
);
6658 t2_base_reg
= t2
->tok
[j
].X_add_number
;
6659 t2_last_reg
= t2_base_reg
+ xtensa_operand_num_regs (isa
, t2
->opcode
, j
);
6661 for (i
= 0; i
< t1
->ntok
; i
++)
6663 if (xtensa_operand_is_register (isa
, t1
->opcode
, i
) != 1)
6666 t1_regfile
= xtensa_operand_regfile (isa
, t1
->opcode
, i
);
6668 if (t1_regfile
!= t2_regfile
)
6671 t1_inout
= xtensa_operand_inout (isa
, t1
->opcode
, i
);
6672 t2_inout
= xtensa_operand_inout (isa
, t2
->opcode
, j
);
6674 if (xtensa_operand_is_known_reg (isa
, t1
->opcode
, i
) == 0
6675 || xtensa_operand_is_known_reg (isa
, t2
->opcode
, j
) == 0)
6677 if (t1_inout
== 'm' || t1_inout
== 'o'
6678 || t2_inout
== 'm' || t2_inout
== 'o')
6685 t1_base_reg
= t1
->tok
[i
].X_add_number
;
6686 t1_last_reg
= (t1_base_reg
6687 + xtensa_operand_num_regs (isa
, t1
->opcode
, i
));
6689 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
6691 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
6693 if (t1_reg
!= t2_reg
)
6696 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6702 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6708 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6716 t1_states
= xtensa_opcode_num_stateOperands (isa
, t1
->opcode
);
6717 t2_states
= xtensa_opcode_num_stateOperands (isa
, t2
->opcode
);
6718 for (j
= 0; j
< t2_states
; j
++)
6720 xtensa_state t2_so
= xtensa_stateOperand_state (isa
, t2
->opcode
, j
);
6721 t2_inout
= xtensa_stateOperand_inout (isa
, t2
->opcode
, j
);
6722 for (i
= 0; i
< t1_states
; i
++)
6724 xtensa_state t1_so
= xtensa_stateOperand_state (isa
, t1
->opcode
, i
);
6725 t1_inout
= xtensa_stateOperand_inout (isa
, t1
->opcode
, i
);
6726 if (t1_so
!= t2_so
|| xtensa_state_is_shared_or (isa
, t1_so
) == 1)
6729 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6735 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6741 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6746 /* Check tieports. */
6747 t1_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t1
->opcode
);
6748 t2_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t2
->opcode
);
6749 for (j
= 0; j
< t2_interfaces
; j
++)
6751 xtensa_interface t2_int
6752 = xtensa_interfaceOperand_interface (isa
, t2
->opcode
, j
);
6753 int t2_class
= xtensa_interface_class_id (isa
, t2_int
);
6755 t2_inout
= xtensa_interface_inout (isa
, t2_int
);
6756 if (xtensa_interface_has_side_effect (isa
, t2_int
) == 1)
6759 for (i
= 0; i
< t1_interfaces
; i
++)
6761 xtensa_interface t1_int
6762 = xtensa_interfaceOperand_interface (isa
, t1
->opcode
, j
);
6763 int t1_class
= xtensa_interface_class_id (isa
, t1_int
);
6765 t1_inout
= xtensa_interface_inout (isa
, t1_int
);
6766 if (xtensa_interface_has_side_effect (isa
, t1_int
) == 1)
6769 if (t1_volatile
&& t2_volatile
&& (t1_class
== t2_class
))
6772 if (t1_int
!= t2_int
)
6775 if (t2_inout
== 'i' && t1_inout
== 'o')
6781 if (t1_inout
== 'i' && t2_inout
== 'o')
6787 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6796 static xtensa_format
6797 xg_find_narrowest_format (vliw_insn
*vinsn
)
6799 /* Right now we assume that the ops within the vinsn are properly
6800 ordered for the slots that the programmer wanted them in. In
6801 other words, we don't rearrange the ops in hopes of finding a
6802 better format. The scheduler handles that. */
6804 xtensa_isa isa
= xtensa_default_isa
;
6805 xtensa_format format
;
6806 xtensa_opcode nop_opcode
= xtensa_nop_opcode
;
6808 if (vinsn
->num_slots
== 1)
6809 return xg_get_single_format (vinsn
->slots
[0].opcode
);
6811 for (format
= 0; format
< xtensa_isa_num_formats (isa
); format
++)
6814 xg_copy_vinsn (&v_copy
, vinsn
);
6815 if (xtensa_format_num_slots (isa
, format
) == v_copy
.num_slots
)
6819 for (slot
= 0; slot
< v_copy
.num_slots
; slot
++)
6821 if (v_copy
.slots
[slot
].opcode
== nop_opcode
)
6823 v_copy
.slots
[slot
].opcode
=
6824 xtensa_format_slot_nop_opcode (isa
, format
, slot
);
6825 v_copy
.slots
[slot
].ntok
= 0;
6828 if (opcode_fits_format_slot (v_copy
.slots
[slot
].opcode
,
6831 else if (v_copy
.num_slots
> 1)
6834 /* Try the widened version. */
6835 if (!v_copy
.slots
[slot
].keep_wide
6836 && !v_copy
.slots
[slot
].is_specific_opcode
6837 && xg_is_single_relaxable_insn (&v_copy
.slots
[slot
],
6839 && opcode_fits_format_slot (widened
.opcode
,
6842 v_copy
.slots
[slot
] = widened
;
6847 if (fit
== v_copy
.num_slots
)
6849 xg_copy_vinsn (vinsn
, &v_copy
);
6850 xtensa_format_encode (isa
, format
, vinsn
->insnbuf
);
6851 vinsn
->format
= format
;
6857 if (format
== xtensa_isa_num_formats (isa
))
6858 return XTENSA_UNDEFINED
;
6864 /* Return the additional space needed in a frag
6865 for possible relaxations of any ops in a VLIW insn.
6866 Also fill out the relaxations that might be required of
6867 each tinsn in the vinsn. */
6870 relaxation_requirements (vliw_insn
*vinsn
, bfd_boolean
*pfinish_frag
)
6872 bfd_boolean finish_frag
= FALSE
;
6873 int extra_space
= 0;
6876 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6878 TInsn
*tinsn
= &vinsn
->slots
[slot
];
6879 if (!tinsn_has_symbolic_operands (tinsn
))
6881 /* A narrow instruction could be widened later to help
6882 alignment issues. */
6883 if (xg_is_single_relaxable_insn (tinsn
, 0, TRUE
)
6884 && !tinsn
->is_specific_opcode
6885 && vinsn
->num_slots
== 1)
6887 /* Difference in bytes between narrow and wide insns... */
6889 tinsn
->subtype
= RELAX_NARROW
;
6894 if (workaround_b_j_loop_end
6895 && tinsn
->opcode
== xtensa_jx_opcode
6896 && use_transform ())
6898 /* Add 2 of these. */
6899 extra_space
+= 3; /* for the nop size */
6900 tinsn
->subtype
= RELAX_ADD_NOP_IF_PRE_LOOP_END
;
6903 /* Need to assemble it with space for the relocation. */
6904 if (xg_is_relaxable_insn (tinsn
, 0)
6905 && !tinsn
->is_specific_opcode
)
6907 int max_size
= xg_get_max_insn_widen_size (tinsn
->opcode
);
6908 int max_literal_size
=
6909 xg_get_max_insn_widen_literal_size (tinsn
->opcode
);
6911 tinsn
->literal_space
= max_literal_size
;
6913 tinsn
->subtype
= RELAX_IMMED
;
6914 extra_space
+= max_size
;
6918 /* A fix record will be added for this instruction prior
6919 to relaxation, so make it end the frag. */
6924 *pfinish_frag
= finish_frag
;
6930 bundle_tinsn (TInsn
*tinsn
, vliw_insn
*vinsn
)
6932 xtensa_isa isa
= xtensa_default_isa
;
6933 int slot
, chosen_slot
;
6935 vinsn
->format
= xg_get_single_format (tinsn
->opcode
);
6936 gas_assert (vinsn
->format
!= XTENSA_UNDEFINED
);
6937 vinsn
->num_slots
= xtensa_format_num_slots (isa
, vinsn
->format
);
6939 chosen_slot
= xg_get_single_slot (tinsn
->opcode
);
6940 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6942 if (slot
== chosen_slot
)
6943 vinsn
->slots
[slot
] = *tinsn
;
6946 vinsn
->slots
[slot
].opcode
=
6947 xtensa_format_slot_nop_opcode (isa
, vinsn
->format
, slot
);
6948 vinsn
->slots
[slot
].ntok
= 0;
6949 vinsn
->slots
[slot
].insn_type
= ITYPE_INSN
;
6956 emit_single_op (TInsn
*orig_insn
)
6959 IStack istack
; /* put instructions into here */
6960 symbolS
*lit_sym
= NULL
;
6961 symbolS
*label_sym
= NULL
;
6963 istack_init (&istack
);
6965 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6966 Because the scheduling and bundling characteristics of movi and
6967 l32r or const16 are so different, we can do much better if we relax
6968 it prior to scheduling and bundling, rather than after. */
6969 if ((orig_insn
->opcode
== xtensa_movi_opcode
6970 || orig_insn
->opcode
== xtensa_movi_n_opcode
)
6971 && !cur_vinsn
.inside_bundle
6972 && (orig_insn
->tok
[1].X_op
== O_symbol
6973 || orig_insn
->tok
[1].X_op
== O_pltrel
6974 || orig_insn
->tok
[1].X_op
== O_tlsfunc
6975 || orig_insn
->tok
[1].X_op
== O_tlsarg
6976 || orig_insn
->tok
[1].X_op
== O_tpoff
6977 || orig_insn
->tok
[1].X_op
== O_dtpoff
)
6978 && !orig_insn
->is_specific_opcode
&& use_transform ())
6979 xg_assembly_relax (&istack
, orig_insn
, now_seg
, frag_now
, 0, 1, 0);
6981 if (xg_expand_assembly_insn (&istack
, orig_insn
))
6984 for (i
= 0; i
< istack
.ninsn
; i
++)
6986 TInsn
*insn
= &istack
.insn
[i
];
6987 switch (insn
->insn_type
)
6990 gas_assert (lit_sym
== NULL
);
6991 lit_sym
= xg_assemble_literal (insn
);
6995 static int relaxed_sym_idx
= 0;
6996 char *label
= XNEWVEC (char, strlen (FAKE_LABEL_NAME
) + 12);
6997 sprintf (label
, "%s_rl_%x", FAKE_LABEL_NAME
, relaxed_sym_idx
++);
6999 gas_assert (label_sym
== NULL
);
7000 label_sym
= symbol_find_or_make (label
);
7001 gas_assert (label_sym
);
7009 xg_resolve_literals (insn
, lit_sym
);
7011 xg_resolve_labels (insn
, label_sym
);
7013 bundle_tinsn (insn
, &v
);
7028 total_frag_text_expansion (fragS
*fragP
)
7031 int total_expansion
= 0;
7033 for (slot
= 0; slot
< config_max_slots
; slot
++)
7034 total_expansion
+= fragP
->tc_frag_data
.text_expansion
[slot
];
7036 return total_expansion
;
7040 /* Emit a vliw instruction to the current fragment. */
7043 xg_assemble_vliw_tokens (vliw_insn
*vinsn
)
7045 bfd_boolean finish_frag
;
7046 bfd_boolean is_jump
= FALSE
;
7047 bfd_boolean is_branch
= FALSE
;
7048 xtensa_isa isa
= xtensa_default_isa
;
7053 struct dwarf2_line_info debug_line
;
7054 bfd_boolean loc_directive_seen
= FALSE
;
7057 memset (&debug_line
, 0, sizeof (struct dwarf2_line_info
));
7059 if (generating_literals
)
7061 static int reported
= 0;
7063 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
7064 _("cannot assemble into a literal fragment"));
7071 if (frag_now_fix () != 0
7072 && (! frag_now
->tc_frag_data
.is_insn
7073 || (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7074 || (!use_transform ()) != frag_now
->tc_frag_data
.is_no_transform
7075 || (directive_state
[directive_longcalls
]
7076 != frag_now
->tc_frag_data
.use_longcalls
)
7077 || (directive_state
[directive_absolute_literals
]
7078 != frag_now
->tc_frag_data
.use_absolute_literals
)))
7080 frag_wane (frag_now
);
7082 xtensa_set_frag_assembly_state (frag_now
);
7085 if (workaround_a0_b_retw
7086 && vinsn
->num_slots
== 1
7087 && (get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
7088 && xtensa_opcode_is_branch (isa
, vinsn
->slots
[0].opcode
) == 1
7089 && use_transform ())
7091 has_a0_b_retw
= TRUE
;
7093 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7094 After the first assembly pass we will check all of them and
7095 add a nop if needed. */
7096 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7097 frag_var (rs_machine_dependent
, 4, 4,
7098 RELAX_ADD_NOP_IF_A0_B_RETW
,
7099 frag_now
->fr_symbol
,
7100 frag_now
->fr_offset
,
7102 xtensa_set_frag_assembly_state (frag_now
);
7103 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7104 frag_var (rs_machine_dependent
, 4, 4,
7105 RELAX_ADD_NOP_IF_A0_B_RETW
,
7106 frag_now
->fr_symbol
,
7107 frag_now
->fr_offset
,
7109 xtensa_set_frag_assembly_state (frag_now
);
7112 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7114 tinsn
= &vinsn
->slots
[slot
];
7116 /* See if the instruction implies an aligned section. */
7117 if (xtensa_opcode_is_loop (isa
, tinsn
->opcode
) == 1)
7118 record_alignment (now_seg
, 2);
7120 /* Determine the best line number for debug info. */
7121 if ((tinsn
->loc_directive_seen
|| !loc_directive_seen
)
7122 && (tinsn
->debug_line
.filenum
!= debug_line
.filenum
7123 || tinsn
->debug_line
.line
< debug_line
.line
7124 || tinsn
->debug_line
.column
< debug_line
.column
))
7125 debug_line
= tinsn
->debug_line
;
7126 if (tinsn
->loc_directive_seen
)
7127 loc_directive_seen
= TRUE
;
7130 /* Special cases for instructions that force an alignment... */
7131 /* None of these opcodes are bundle-able. */
7132 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1)
7136 /* Remember the symbol that marks the end of the loop in the frag
7137 that marks the start of the loop. This way we can easily find
7138 the end of the loop at the beginning, without adding special code
7139 to mark the loop instructions themselves. */
7140 symbolS
*target_sym
= NULL
;
7141 if (vinsn
->slots
[0].tok
[1].X_op
== O_symbol
)
7142 target_sym
= vinsn
->slots
[0].tok
[1].X_add_symbol
;
7144 xtensa_set_frag_assembly_state (frag_now
);
7145 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7147 max_fill
= get_text_align_max_fill_size
7148 (get_text_align_power (xtensa_fetch_width
),
7149 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
7151 if (use_transform ())
7152 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
7153 RELAX_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7155 frag_var (rs_machine_dependent
, 0, 0,
7156 RELAX_CHECK_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7157 xtensa_set_frag_assembly_state (frag_now
);
7160 if (vinsn
->slots
[0].opcode
== xtensa_entry_opcode
7161 && !vinsn
->slots
[0].is_specific_opcode
)
7163 xtensa_mark_literal_pool_location ();
7164 xtensa_move_labels (frag_now
, 0);
7165 frag_var (rs_align_test
, 1, 1, 0, NULL
, 2, NULL
);
7168 if (vinsn
->num_slots
== 1)
7170 if (workaround_a0_b_retw
&& use_transform ())
7171 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
7172 is_register_writer (&vinsn
->slots
[0], "a", 0));
7174 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
7175 is_bad_loopend_opcode (&vinsn
->slots
[0]));
7178 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
, FALSE
);
7180 insn_size
= xtensa_format_length (isa
, vinsn
->format
);
7182 extra_space
= relaxation_requirements (vinsn
, &finish_frag
);
7184 /* vinsn_to_insnbuf will produce the error. */
7185 if (vinsn
->format
!= XTENSA_UNDEFINED
)
7187 f
= frag_more (insn_size
+ extra_space
);
7188 xtensa_set_frag_assembly_state (frag_now
);
7189 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7192 vinsn_to_insnbuf (vinsn
, f
, frag_now
, FALSE
);
7193 if (vinsn
->format
== XTENSA_UNDEFINED
)
7196 xtensa_insnbuf_to_chars (isa
, vinsn
->insnbuf
, (unsigned char *) f
, 0);
7198 if (debug_type
== DEBUG_DWARF2
|| loc_directive_seen
)
7199 dwarf2_gen_line_info (frag_now_fix () - (insn_size
+ extra_space
),
7202 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7204 tinsn
= &vinsn
->slots
[slot
];
7205 frag_now
->tc_frag_data
.slot_subtypes
[slot
] = tinsn
->subtype
;
7206 frag_now
->tc_frag_data
.slot_symbols
[slot
] = tinsn
->symbol
;
7207 frag_now
->tc_frag_data
.slot_offsets
[slot
] = tinsn
->offset
;
7208 frag_now
->tc_frag_data
.literal_frags
[slot
] = tinsn
->literal_frag
;
7209 if (tinsn
->opcode
== xtensa_l32r_opcode
)
7210 frag_now
->tc_frag_data
.literal_frags
[slot
]
7211 = symbol_get_frag (tinsn
->tok
[1].X_add_symbol
);
7212 if (tinsn
->literal_space
!= 0)
7213 xg_assemble_literal_space (tinsn
->literal_space
, slot
);
7214 frag_now
->tc_frag_data
.free_reg
[slot
] = tinsn
->extra_arg
;
7216 if (tinsn
->subtype
== RELAX_NARROW
)
7217 gas_assert (vinsn
->num_slots
== 1);
7218 if (xtensa_opcode_is_jump (isa
, tinsn
->opcode
) == 1)
7220 if (xtensa_opcode_is_branch (isa
, tinsn
->opcode
) == 1)
7223 if (tinsn
->subtype
|| tinsn
->symbol
|| tinsn
->offset
7224 || tinsn
->literal_frag
|| is_jump
|| is_branch
)
7228 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7229 frag_now
->tc_frag_data
.is_specific_opcode
= TRUE
;
7233 frag_variant (rs_machine_dependent
,
7234 extra_space
, extra_space
, RELAX_SLOTS
,
7235 frag_now
->fr_symbol
, frag_now
->fr_offset
, f
);
7236 xtensa_set_frag_assembly_state (frag_now
);
7239 /* Special cases for loops:
7240 close_loop_end should be inserted AFTER short_loop.
7241 Make sure that CLOSE loops are processed BEFORE short_loops
7242 when converting them. */
7244 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7245 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1
7246 && !vinsn
->slots
[0].is_specific_opcode
)
7248 if (workaround_short_loop
&& use_transform ())
7250 maybe_has_short_loop
= TRUE
;
7251 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7252 frag_var (rs_machine_dependent
, 4, 4,
7253 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7254 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7255 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7256 frag_var (rs_machine_dependent
, 4, 4,
7257 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7258 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7261 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7262 loop at least 12 bytes away from another loop's end. */
7263 if (workaround_close_loop_end
&& use_transform ())
7265 maybe_has_close_loop_end
= TRUE
;
7266 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7267 frag_var (rs_machine_dependent
, 12, 12,
7268 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
7269 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7273 if (use_transform ())
7277 gas_assert (finish_frag
);
7278 frag_var (rs_machine_dependent
,
7279 xtensa_fetch_width
, xtensa_fetch_width
,
7281 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7282 xtensa_set_frag_assembly_state (frag_now
);
7283 xtensa_maybe_create_trampoline_frag ();
7284 /* Always create one here. */
7285 xtensa_maybe_create_literal_pool_frag (TRUE
, FALSE
);
7287 else if (is_branch
&& do_align_targets ())
7289 gas_assert (finish_frag
);
7290 frag_var (rs_machine_dependent
,
7291 xtensa_fetch_width
, xtensa_fetch_width
,
7292 RELAX_MAYBE_UNREACHABLE
,
7293 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7294 xtensa_set_frag_assembly_state (frag_now
);
7295 frag_var (rs_machine_dependent
,
7297 RELAX_MAYBE_DESIRE_ALIGN
,
7298 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7299 xtensa_set_frag_assembly_state (frag_now
);
7303 /* Now, if the original opcode was a call... */
7304 if (do_align_targets ()
7305 && xtensa_opcode_is_call (isa
, vinsn
->slots
[0].opcode
) == 1)
7307 float freq
= get_subseg_total_freq (now_seg
, now_subseg
);
7308 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7309 frag_var (rs_machine_dependent
, 4, (int) freq
, RELAX_DESIRE_ALIGN
,
7310 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7311 xtensa_set_frag_assembly_state (frag_now
);
7314 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7316 frag_wane (frag_now
);
7318 xtensa_set_frag_assembly_state (frag_now
);
7323 /* xtensa_end and helper functions. */
7325 static void xtensa_cleanup_align_frags (void);
7326 static void xtensa_fix_target_frags (void);
7327 static void xtensa_mark_narrow_branches (void);
7328 static void xtensa_mark_zcl_first_insns (void);
7329 static void xtensa_mark_difference_of_two_symbols (void);
7330 static void xtensa_fix_a0_b_retw_frags (void);
7331 static void xtensa_fix_b_j_loop_end_frags (void);
7332 static void xtensa_fix_close_loop_end_frags (void);
7333 static void xtensa_fix_short_loop_frags (void);
7334 static void xtensa_sanity_check (void);
7335 static void xtensa_add_config_info (void);
7340 directive_balance ();
7341 xtensa_flush_pending_output ();
7343 past_xtensa_end
= TRUE
;
7345 xtensa_move_literals ();
7347 xtensa_reorder_segments ();
7348 xtensa_cleanup_align_frags ();
7349 xtensa_fix_target_frags ();
7350 if (workaround_a0_b_retw
&& has_a0_b_retw
)
7351 xtensa_fix_a0_b_retw_frags ();
7352 if (workaround_b_j_loop_end
)
7353 xtensa_fix_b_j_loop_end_frags ();
7355 /* "close_loop_end" should be processed BEFORE "short_loop". */
7356 if (workaround_close_loop_end
&& maybe_has_close_loop_end
)
7357 xtensa_fix_close_loop_end_frags ();
7359 if (workaround_short_loop
&& maybe_has_short_loop
)
7360 xtensa_fix_short_loop_frags ();
7362 xtensa_mark_narrow_branches ();
7363 xtensa_mark_zcl_first_insns ();
7365 xtensa_sanity_check ();
7367 xtensa_add_config_info ();
7369 xtensa_check_frag_count ();
7372 struct trampoline_chain_entry
7378 /* Trampoline chain for a given (sym, offset) pair is a sorted array
7379 of locations of trampoline jumps leading there. Jumps are represented
7380 as pairs (sym, offset): trampoline frag symbol and offset of the jump
7382 struct trampoline_chain
7384 struct trampoline_chain_entry target
;
7385 struct trampoline_chain_entry
*entry
;
7388 bfd_boolean needs_sorting
;
7391 struct trampoline_chain_index
7393 struct trampoline_chain
*entry
;
7396 bfd_boolean needs_sorting
;
7399 struct trampoline_index
7406 struct trampoline_seg
7408 struct trampoline_seg
*next
;
7410 /* Trampolines ordered by their frag fr_address */
7411 struct trampoline_index index
;
7412 /* Known trampoline chains ordered by (sym, offset) pair */
7413 struct trampoline_chain_index chain_index
;
7416 static struct trampoline_seg trampoline_seg_list
;
7417 #define J_RANGE (128 * 1024)
7418 #define J_MARGIN 4096
7420 static int unreachable_count
= 0;
7424 xtensa_maybe_create_trampoline_frag (void)
7426 if (!use_trampolines
)
7429 /* We create an area for possible trampolines every 10 unreachable frags.
7430 These are preferred over the ones not preceded by an unreachable frag,
7431 because we don't have to jump around them. This function is called after
7432 each RELAX_UNREACHABLE frag is created. */
7434 if (++unreachable_count
> 10)
7436 xtensa_create_trampoline_frag (FALSE
);
7437 clear_frag_count ();
7438 unreachable_count
= 0;
7443 xtensa_check_frag_count (void)
7445 if (!use_trampolines
|| frag_now
->tc_frag_data
.is_no_transform
)
7448 /* We create an area for possible trampolines every 8000 frags or so. This
7449 is an estimate based on the max range of a "j" insn (+/-128K) divided
7450 by a typical frag byte count (16), minus a few for safety. This function
7451 is called after each source line is processed. */
7453 if (get_frag_count () > 8000)
7455 xtensa_create_trampoline_frag (TRUE
);
7456 clear_frag_count ();
7457 unreachable_count
= 0;
7460 /* We create an area for a possible literal pool every N (default 5000)
7462 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
7465 static xtensa_insnbuf trampoline_buf
= NULL
;
7466 static xtensa_insnbuf trampoline_slotbuf
= NULL
;
7468 static xtensa_insnbuf litpool_buf
= NULL
;
7469 static xtensa_insnbuf litpool_slotbuf
= NULL
;
7471 #define TRAMPOLINE_FRAG_SIZE 3000
7473 static struct trampoline_seg
*
7474 find_trampoline_seg (asection
*seg
)
7476 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7477 static struct trampoline_seg
*mr
;
7479 if (mr
&& mr
->seg
== seg
)
7482 for ( ; ts
; ts
= ts
->next
)
7494 static size_t xg_find_trampoline (const struct trampoline_index
*idx
,
7498 size_t b
= idx
->n_entries
;
7502 size_t c
= (a
+ b
) / 2;
7504 if (idx
->entry
[c
]->fr_address
<= addr
)
7512 static void xg_add_trampoline_to_index (struct trampoline_index
*idx
,
7515 if (idx
->n_entries
== idx
->n_max
)
7517 idx
->n_max
= (idx
->n_entries
+ 1) * 2;
7518 idx
->entry
= xrealloc (idx
->entry
,
7519 sizeof (*idx
->entry
) * idx
->n_max
);
7521 idx
->entry
[idx
->n_entries
] = fragP
;
7525 static void xg_remove_trampoline_from_index (struct trampoline_index
*idx
,
7528 gas_assert (i
< idx
->n_entries
);
7529 memmove (idx
->entry
+ i
, idx
->entry
+ i
+ 1,
7530 (idx
->n_entries
- i
- 1) * sizeof (*idx
->entry
));
7534 static void xg_add_trampoline_to_seg (struct trampoline_seg
*ts
,
7537 xg_add_trampoline_to_index (&ts
->index
, fragP
);
7541 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around
)
7543 /* Emit a frag where we can place intermediate jump instructions,
7544 in case we need to jump farther than 128K bytes.
7545 Each jump instruction takes three bytes.
7546 We allocate enough for 1000 trampolines in each frag.
7547 If that's not enough, oh well. */
7549 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
7552 int size
= TRAMPOLINE_FRAG_SIZE
;
7556 ts
= XCNEW(struct trampoline_seg
);
7557 ts
->next
= trampoline_seg_list
.next
;
7558 trampoline_seg_list
.next
= ts
;
7562 frag_wane (frag_now
);
7564 xtensa_set_frag_assembly_state (frag_now
);
7565 varP
= frag_var (rs_machine_dependent
, size
, size
, RELAX_TRAMPOLINE
, NULL
, 0, NULL
);
7566 fragP
= (fragS
*)(varP
- SIZEOF_STRUCT_FRAG
);
7567 if (trampoline_buf
== NULL
)
7569 trampoline_buf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7570 trampoline_slotbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7572 fragP
->tc_frag_data
.needs_jump_around
= needs_jump_around
;
7573 xg_add_trampoline_to_seg (ts
, fragP
);
7576 static bfd_boolean
xg_is_trampoline_frag_full (const fragS
*fragP
)
7578 return fragP
->fr_var
< 3;
7581 static int xg_order_trampoline_chain_entry (const void *a
, const void *b
)
7583 const struct trampoline_chain_entry
*pa
= a
;
7584 const struct trampoline_chain_entry
*pb
= b
;
7586 if (pa
->sym
== pb
->sym
||
7587 S_GET_VALUE (pa
->sym
) == S_GET_VALUE (pb
->sym
))
7588 if (pa
->offset
== pb
->offset
)
7591 return pa
->offset
< pb
->offset
? -1 : 1;
7593 return S_GET_VALUE (pa
->sym
) < S_GET_VALUE (pb
->sym
) ? -1 : 1;
7596 static void xg_sort_trampoline_chain (struct trampoline_chain
*tc
)
7598 qsort (tc
->entry
, tc
->n_entries
, sizeof (*tc
->entry
),
7599 xg_order_trampoline_chain_entry
);
7600 tc
->needs_sorting
= FALSE
;
7603 /* Find entry index in the given chain with maximal address <= source. */
7604 static size_t xg_find_chain_entry (struct trampoline_chain
*tc
,
7608 size_t b
= tc
->n_entries
;
7610 if (tc
->needs_sorting
)
7611 xg_sort_trampoline_chain (tc
);
7615 size_t c
= (a
+ b
) / 2;
7616 struct trampoline_chain_entry
*e
= tc
->entry
+ c
;
7618 if (S_GET_VALUE(e
->sym
) + e
->offset
<= source
)
7626 /* Find the best jump target for the source in the given trampoline chain.
7627 The best jump target is the one that results in the shortest path to the
7628 final target, it's the location of the jump closest to the final target,
7629 but within the J_RANGE - J_MARGIN from the source. */
7630 static struct trampoline_chain_entry
*
7631 xg_get_best_chain_entry (struct trampoline_chain
*tc
, addressT source
)
7633 addressT target
= S_GET_VALUE(tc
->target
.sym
) + tc
->target
.offset
;
7634 size_t i
= xg_find_chain_entry (tc
, source
);
7635 struct trampoline_chain_entry
*e
= tc
->entry
+ i
;
7636 int step
= target
< source
? -1 : 1;
7637 addressT chained_target
;
7640 if (target
> source
&&
7641 S_GET_VALUE(e
->sym
) + e
->offset
<= source
&&
7642 i
+ 1 < tc
->n_entries
)
7645 while (i
+ step
< tc
->n_entries
)
7647 struct trampoline_chain_entry
*next
= tc
->entry
+ i
+ step
;
7649 chained_target
= S_GET_VALUE(next
->sym
) + next
->offset
;
7650 off
= source
- chained_target
;
7652 if (labs (off
) >= J_RANGE
- J_MARGIN
)
7659 chained_target
= S_GET_VALUE(e
->sym
) + e
->offset
;
7660 off
= source
- chained_target
;
7662 if (labs (off
) < J_MARGIN
||
7663 labs (off
) >= J_RANGE
- J_MARGIN
)
7665 return tc
->entry
+ i
;
7668 static int xg_order_trampoline_chain (const void *a
, const void *b
)
7670 const struct trampoline_chain
*_pa
= a
;
7671 const struct trampoline_chain
*_pb
= b
;
7672 const struct trampoline_chain_entry
*pa
= &_pa
->target
;
7673 const struct trampoline_chain_entry
*pb
= &_pb
->target
;
7674 symbolS
*s1
= pa
->sym
;
7675 symbolS
*s2
= pb
->sym
;
7678 tmp
= symbol_symbolS (s1
);
7682 tmp
= symbol_symbolS (s2
);
7687 if (pa
->offset
== pb
->offset
)
7690 return pa
->offset
< pb
->offset
? -1 : 1;
7692 return s1
< s2
? -1 : 1;
7695 static struct trampoline_chain
*
7696 xg_get_trampoline_chain (struct trampoline_seg
*ts
,
7700 struct trampoline_chain_index
*idx
= &ts
->chain_index
;
7701 struct trampoline_chain c
;
7703 if (idx
->needs_sorting
)
7705 qsort (idx
->entry
, idx
->n_entries
, sizeof (*idx
->entry
),
7706 xg_order_trampoline_chain
);
7707 idx
->needs_sorting
= FALSE
;
7710 c
.target
.offset
= offset
;
7711 return bsearch (&c
, idx
->entry
, idx
->n_entries
,
7712 sizeof (struct trampoline_chain
),
7713 xg_order_trampoline_chain
);
7716 /* Find trampoline chain in the given trampoline segment that is going
7717 to the *sym + *offset. If found, replace *sym and *offset with the
7718 best jump target in that chain. */
7719 static struct trampoline_chain
*
7720 xg_find_best_eq_target (struct trampoline_seg
*ts
,
7721 addressT source
, symbolS
**sym
,
7724 struct trampoline_chain
*tc
= xg_get_trampoline_chain (ts
, *sym
, *offset
);
7728 struct trampoline_chain_entry
*e
= xg_get_best_chain_entry (tc
, source
);
7731 *offset
= e
->offset
;
7736 static void xg_add_location_to_chain (struct trampoline_chain
*tc
,
7737 symbolS
*sym
, addressT offset
)
7739 struct trampoline_chain_entry
*e
;
7741 if (tc
->n_entries
== tc
->n_max
)
7743 tc
->n_max
= (tc
->n_max
+ 1) * 2;
7744 tc
->entry
= xrealloc (tc
->entry
, sizeof (*tc
->entry
) * tc
->n_max
);
7746 e
= tc
->entry
+ tc
->n_entries
;
7750 tc
->needs_sorting
= TRUE
;
7753 static struct trampoline_chain
*
7754 xg_create_trampoline_chain (struct trampoline_seg
*ts
,
7755 symbolS
*sym
, addressT offset
)
7757 struct trampoline_chain_index
*idx
= &ts
->chain_index
;
7758 struct trampoline_chain
*tc
;
7760 if (idx
->n_entries
== idx
->n_max
)
7762 idx
->n_max
= (idx
->n_max
+ 1) * 2;
7763 idx
->entry
= xrealloc (idx
->entry
,
7764 sizeof (*idx
->entry
) * idx
->n_max
);
7767 tc
= idx
->entry
+ idx
->n_entries
;
7768 tc
->target
.sym
= sym
;
7769 tc
->target
.offset
= offset
;
7773 xg_add_location_to_chain (tc
, sym
, offset
);
7776 idx
->needs_sorting
= TRUE
;
7781 void dump_trampolines (void);
7784 dump_trampolines (void)
7786 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7788 for ( ; ts
; ts
= ts
->next
)
7791 asection
*seg
= ts
->seg
;
7795 fprintf(stderr
, "SECTION %s\n", seg
->name
);
7797 for (i
= 0; i
< ts
->index
.n_entries
; ++i
)
7799 fragS
*tf
= ts
->index
.entry
[i
];
7801 fprintf(stderr
, " 0x%08x: fix=%d, jump_around=%s\n",
7802 (int)tf
->fr_address
, (int)tf
->fr_fix
,
7803 tf
->tc_frag_data
.needs_jump_around
? "T" : "F");
7808 static void dump_litpools (void) __attribute__ ((unused
));
7811 dump_litpools (void)
7813 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7814 struct litpool_frag
*lpf
;
7816 for ( ; lps
; lps
= lps
->next
)
7818 printf("litpool seg %s\n", lps
->seg
->name
);
7819 for ( lpf
= lps
->frag_list
.next
; lpf
->fragP
; lpf
= lpf
->next
)
7821 fragS
*litfrag
= lpf
->fragP
->fr_next
;
7823 while (litfrag
&& litfrag
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7825 if (litfrag
->fr_fix
== 4)
7827 litfrag
= litfrag
->fr_next
;
7829 printf(" %ld <%d:%d> (%d) [%d]: ",
7830 lpf
->addr
, lpf
->priority
, lpf
->original_priority
,
7831 lpf
->fragP
->fr_line
, count
);
7832 //dump_frag(lpf->fragP);
7838 xtensa_maybe_create_literal_pool_frag (bfd_boolean create
,
7839 bfd_boolean only_if_needed
)
7841 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7843 struct litpool_frag
*lpf
;
7844 bfd_boolean needed
= FALSE
;
7846 if (use_literal_section
|| !auto_litpools
)
7849 for ( ; lps
; lps
= lps
->next
)
7851 if (lps
->seg
== now_seg
)
7857 lps
= XCNEW (struct litpool_seg
);
7858 lps
->next
= litpool_seg_list
.next
;
7859 litpool_seg_list
.next
= lps
;
7861 lps
->frag_list
.next
= &lps
->frag_list
;
7862 lps
->frag_list
.prev
= &lps
->frag_list
;
7863 /* Put candidate literal pool at the beginning of every section,
7864 so that even when section starts with literal load there's a
7865 literal pool available. */
7866 lps
->frag_count
= auto_litpool_limit
;
7875 if (past_xtensa_end
|| !use_transform() ||
7876 frag_now
->tc_frag_data
.is_no_transform
)
7880 if (auto_litpool_limit
<= 0)
7882 /* Don't create a litpool based only on frag count. */
7885 else if (lps
->frag_count
> auto_litpool_limit
)
7902 int size
= (only_if_needed
) ? 3 : 0; /* Space for a "j" insn. */
7903 /* Create a potential site for a literal pool. */
7904 frag_wane (frag_now
);
7906 xtensa_set_frag_assembly_state (frag_now
);
7908 fragP
->tc_frag_data
.lit_frchain
= frchain_now
;
7909 fragP
->tc_frag_data
.literal_frag
= fragP
;
7910 frag_var (rs_machine_dependent
, size
, size
,
7912 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
7913 RELAX_LITERAL_POOL_BEGIN
,
7915 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
7916 frag_variant (rs_machine_dependent
, 0, 0,
7917 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
7918 xtensa_set_frag_assembly_state (frag_now
);
7922 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7923 just record it here. */
7927 lpf
= XNEW (struct litpool_frag
);
7928 /* Insert at tail of circular list. */
7930 lps
->frag_list
.prev
->next
= lpf
;
7931 lpf
->next
= &lps
->frag_list
;
7932 lpf
->prev
= lps
->frag_list
.prev
;
7933 lps
->frag_list
.prev
= lpf
;
7935 lpf
->priority
= (needed
) ? (only_if_needed
) ? 3 : 2 : 1;
7936 lpf
->original_priority
= lpf
->priority
;
7937 lpf
->literal_count
= 0;
7939 lps
->frag_count
= 0;
7943 xtensa_cleanup_align_frags (void)
7948 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7949 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7952 /* Walk over all of the fragments in a subsection. */
7953 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7955 if ((fragP
->fr_type
== rs_align
7956 || fragP
->fr_type
== rs_align_code
7957 || (fragP
->fr_type
== rs_machine_dependent
7958 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
7959 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
7960 && fragP
->fr_fix
== 0)
7962 fragS
*next
= fragP
->fr_next
;
7965 && next
->fr_fix
== 0
7966 && next
->fr_type
== rs_machine_dependent
7967 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7970 next
= next
->fr_next
;
7973 /* If we don't widen branch targets, then they
7974 will be easier to align. */
7975 if (fragP
->tc_frag_data
.is_branch_target
7976 && fragP
->fr_opcode
== fragP
->fr_literal
7977 && fragP
->fr_type
== rs_machine_dependent
7978 && fragP
->fr_subtype
== RELAX_SLOTS
7979 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
7981 if (fragP
->fr_type
== rs_machine_dependent
7982 && fragP
->fr_subtype
== RELAX_UNREACHABLE
)
7983 fragP
->tc_frag_data
.is_unreachable
= TRUE
;
7989 /* Re-process all of the fragments looking to convert all of the
7990 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
7991 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
7992 Otherwise, convert to a .fill 0. */
7995 xtensa_fix_target_frags (void)
8000 /* When this routine is called, all of the subsections are still intact
8001 so we walk over subsections instead of sections. */
8002 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8003 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8007 /* Walk over all of the fragments in a subsection. */
8008 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8010 if (fragP
->fr_type
== rs_machine_dependent
8011 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
8013 if (next_frag_is_branch_target (fragP
))
8014 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
8023 static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS
*, TInsn
*);
8026 xtensa_mark_narrow_branches (void)
8031 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8032 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8035 /* Walk over all of the fragments in a subsection. */
8036 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8038 if (fragP
->fr_type
== rs_machine_dependent
8039 && fragP
->fr_subtype
== RELAX_SLOTS
8040 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8044 vinsn_from_chars (&vinsn
, fragP
->fr_opcode
);
8045 tinsn_immed_from_frag (&vinsn
.slots
[0], fragP
, 0);
8047 if (vinsn
.num_slots
== 1
8048 && xtensa_opcode_is_branch (xtensa_default_isa
,
8049 vinsn
.slots
[0].opcode
) == 1
8050 && xg_get_single_size (vinsn
.slots
[0].opcode
) == 2
8051 && is_narrow_branch_guaranteed_in_range (fragP
,
8054 fragP
->fr_subtype
= RELAX_SLOTS
;
8055 fragP
->tc_frag_data
.slot_subtypes
[0] = RELAX_NARROW
;
8056 fragP
->tc_frag_data
.is_aligning_branch
= 1;
8064 /* A branch is typically widened only when its target is out of
8065 range. However, we would like to widen them to align a subsequent
8066 branch target when possible.
8068 Because the branch relaxation code is so convoluted, the optimal solution
8069 (combining the two cases) is difficult to get right in all circumstances.
8070 We therefore go with an "almost as good" solution, where we only
8071 use for alignment narrow branches that definitely will not expand to a
8072 jump and a branch. These functions find and mark these cases. */
8074 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
8075 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
8076 We start counting beginning with the frag after the 2-byte branch, so the
8077 maximum offset is (4 - 2) + 63 = 65. */
8078 #define MAX_IMMED6 65
8080 static offsetT
unrelaxed_frag_max_size (fragS
*);
8083 is_narrow_branch_guaranteed_in_range (fragS
*fragP
, TInsn
*tinsn
)
8085 const expressionS
*exp
= &tinsn
->tok
[1];
8086 symbolS
*symbolP
= exp
->X_add_symbol
;
8087 offsetT max_distance
= exp
->X_add_number
;
8090 if (exp
->X_op
!= O_symbol
)
8093 target_frag
= symbol_get_frag (symbolP
);
8095 max_distance
+= (S_GET_VALUE (symbolP
) - target_frag
->fr_address
);
8096 if (is_branch_jmp_to_next (tinsn
, fragP
))
8099 /* The branch doesn't branch over it's own frag,
8100 but over the subsequent ones. */
8101 fragP
= fragP
->fr_next
;
8102 while (fragP
!= NULL
&& fragP
!= target_frag
&& max_distance
<= MAX_IMMED6
)
8104 max_distance
+= unrelaxed_frag_max_size (fragP
);
8105 fragP
= fragP
->fr_next
;
8107 if (max_distance
<= MAX_IMMED6
&& fragP
== target_frag
)
8114 xtensa_mark_zcl_first_insns (void)
8119 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8120 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8123 /* Walk over all of the fragments in a subsection. */
8124 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8126 if (fragP
->fr_type
== rs_machine_dependent
8127 && (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
8128 || fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
))
8130 /* Find the loop frag. */
8131 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8132 /* Find the first insn frag. */
8133 fragS
*targ_frag
= next_non_empty_frag (loop_frag
);
8135 /* Handle a corner case that comes up in hardware
8136 diagnostics. The original assembly looks like this:
8139 <empty_frag>--not found by next_non_empty_frag
8142 Depending on the start address, the assembler may or
8143 may not change it to look something like this:
8146 nop--frag isn't empty anymore
8149 So set up to check the alignment of the nop if it
8151 while (loop_frag
!= targ_frag
)
8153 if (loop_frag
->fr_type
== rs_machine_dependent
8154 && (loop_frag
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
8155 || loop_frag
->fr_subtype
8156 == RELAX_CHECK_ALIGN_NEXT_OPCODE
))
8157 targ_frag
= loop_frag
;
8159 loop_frag
= loop_frag
->fr_next
;
8162 /* Of course, sometimes (mostly for toy test cases) a
8163 zero-cost loop instruction is the last in a section. */
8166 targ_frag
->tc_frag_data
.is_first_loop_insn
= TRUE
;
8167 /* Do not widen a frag that is the first instruction of a
8168 zero-cost loop. It makes that loop harder to align. */
8169 if (targ_frag
->fr_type
== rs_machine_dependent
8170 && targ_frag
->fr_subtype
== RELAX_SLOTS
8171 && (targ_frag
->tc_frag_data
.slot_subtypes
[0]
8174 if (targ_frag
->tc_frag_data
.is_aligning_branch
)
8175 targ_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
8178 frag_wane (targ_frag
);
8179 targ_frag
->tc_frag_data
.slot_subtypes
[0] = 0;
8183 if (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)
8191 /* When a difference-of-symbols expression is encoded as a uleb128 or
8192 sleb128 value, the linker is unable to adjust that value to account for
8193 link-time relaxation. Mark all the code between such symbols so that
8194 its size cannot be changed by linker relaxation. */
8197 xtensa_mark_difference_of_two_symbols (void)
8201 for (expr_sym
= expr_symbols
; expr_sym
;
8202 expr_sym
= symbol_get_tc (expr_sym
)->next_expr_symbol
)
8204 expressionS
*exp
= symbol_get_value_expression (expr_sym
);
8206 if (exp
->X_op
== O_subtract
)
8208 symbolS
*left
= exp
->X_add_symbol
;
8209 symbolS
*right
= exp
->X_op_symbol
;
8211 /* Difference of two symbols not in the same section
8212 are handled with relocations in the linker. */
8213 if (S_GET_SEGMENT (left
) == S_GET_SEGMENT (right
))
8219 if (symbol_get_frag (left
)->fr_address
8220 <= symbol_get_frag (right
)->fr_address
)
8222 start
= symbol_get_frag (left
);
8223 end
= symbol_get_frag (right
);
8227 start
= symbol_get_frag (right
);
8228 end
= symbol_get_frag (left
);
8231 if (start
->tc_frag_data
.no_transform_end
!= NULL
)
8232 walk
= start
->tc_frag_data
.no_transform_end
;
8237 walk
->tc_frag_data
.is_no_transform
= 1;
8238 walk
= walk
->fr_next
;
8240 while (walk
&& walk
->fr_address
< end
->fr_address
);
8242 start
->tc_frag_data
.no_transform_end
= walk
;
8249 /* Re-process all of the fragments looking to convert all of the
8250 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
8251 conditional branch or a retw/retw.n, convert this frag to one that
8252 will generate a NOP. In any case close it off with a .fill 0. */
8254 static bfd_boolean
next_instrs_are_b_retw (fragS
*);
8257 xtensa_fix_a0_b_retw_frags (void)
8262 /* When this routine is called, all of the subsections are still intact
8263 so we walk over subsections instead of sections. */
8264 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8265 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8269 /* Walk over all of the fragments in a subsection. */
8270 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8272 if (fragP
->fr_type
== rs_machine_dependent
8273 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
8275 if (next_instrs_are_b_retw (fragP
))
8277 if (fragP
->tc_frag_data
.is_no_transform
)
8278 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
8280 relax_frag_add_nop (fragP
);
8290 next_instrs_are_b_retw (fragS
*fragP
)
8292 xtensa_opcode opcode
;
8294 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
8295 static xtensa_insnbuf insnbuf
= NULL
;
8296 static xtensa_insnbuf slotbuf
= NULL
;
8297 xtensa_isa isa
= xtensa_default_isa
;
8298 unsigned int offset
= 0;
8300 bfd_boolean branch_seen
= FALSE
;
8304 insnbuf
= xtensa_insnbuf_alloc (isa
);
8305 slotbuf
= xtensa_insnbuf_alloc (isa
);
8308 if (next_fragP
== NULL
)
8311 /* Check for the conditional branch. */
8312 xtensa_insnbuf_from_chars
8313 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8314 fmt
= xtensa_format_decode (isa
, insnbuf
);
8315 if (fmt
== XTENSA_UNDEFINED
)
8318 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8320 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
8321 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
8323 branch_seen
= (branch_seen
8324 || xtensa_opcode_is_branch (isa
, opcode
) == 1);
8330 offset
+= xtensa_format_length (isa
, fmt
);
8331 if (offset
== next_fragP
->fr_fix
)
8333 next_fragP
= next_non_empty_frag (next_fragP
);
8337 if (next_fragP
== NULL
)
8340 /* Check for the retw/retw.n. */
8341 xtensa_insnbuf_from_chars
8342 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8343 fmt
= xtensa_format_decode (isa
, insnbuf
);
8345 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8346 have no problems. */
8347 if (fmt
== XTENSA_UNDEFINED
8348 || xtensa_format_num_slots (isa
, fmt
) != 1)
8351 xtensa_format_get_slot (isa
, fmt
, 0, insnbuf
, slotbuf
);
8352 opcode
= xtensa_opcode_decode (isa
, fmt
, 0, slotbuf
);
8354 if (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
)
8361 /* Re-process all of the fragments looking to convert all of the
8362 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8363 loop end label, convert this frag to one that will generate a NOP.
8364 In any case close it off with a .fill 0. */
8366 static bfd_boolean
next_instr_is_loop_end (fragS
*);
8369 xtensa_fix_b_j_loop_end_frags (void)
8374 /* When this routine is called, all of the subsections are still intact
8375 so we walk over subsections instead of sections. */
8376 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8377 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8381 /* Walk over all of the fragments in a subsection. */
8382 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8384 if (fragP
->fr_type
== rs_machine_dependent
8385 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
8387 if (next_instr_is_loop_end (fragP
))
8389 if (fragP
->tc_frag_data
.is_no_transform
)
8390 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8392 relax_frag_add_nop (fragP
);
8402 next_instr_is_loop_end (fragS
*fragP
)
8404 const fragS
*next_fragP
;
8406 if (next_frag_is_loop_target (fragP
))
8409 next_fragP
= next_non_empty_frag (fragP
);
8410 if (next_fragP
== NULL
)
8413 if (!next_frag_is_loop_target (next_fragP
))
8416 /* If the size is >= 3 then there is more than one instruction here.
8417 The hardware bug will not fire. */
8418 if (next_fragP
->fr_fix
> 3)
8425 /* Re-process all of the fragments looking to convert all of the
8426 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8427 not MY loop's loop end within 12 bytes, add enough nops here to
8428 make it at least 12 bytes away. In any case close it off with a
8431 static offsetT min_bytes_to_other_loop_end
8432 (fragS
*, fragS
*, offsetT
);
8435 xtensa_fix_close_loop_end_frags (void)
8440 /* When this routine is called, all of the subsections are still intact
8441 so we walk over subsections instead of sections. */
8442 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8443 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8447 fragS
*current_target
= NULL
;
8449 /* Walk over all of the fragments in a subsection. */
8450 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8452 if (fragP
->fr_type
== rs_machine_dependent
8453 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8454 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8455 current_target
= symbol_get_frag (fragP
->fr_symbol
);
8458 && fragP
->fr_type
== rs_machine_dependent
8459 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
8462 int bytes_added
= 0;
8464 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8465 /* Max out at 12. */
8466 min_bytes
= min_bytes_to_other_loop_end
8467 (fragP
->fr_next
, current_target
, REQUIRED_LOOP_DIVIDING_BYTES
);
8469 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
8471 if (fragP
->tc_frag_data
.is_no_transform
)
8472 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8475 while (min_bytes
+ bytes_added
8476 < REQUIRED_LOOP_DIVIDING_BYTES
)
8480 if (fragP
->fr_var
< length
)
8481 as_fatal (_("fr_var %lu < length %d"),
8482 (long) fragP
->fr_var
, length
);
8485 assemble_nop (length
,
8486 fragP
->fr_literal
+ fragP
->fr_fix
);
8487 fragP
->fr_fix
+= length
;
8488 fragP
->fr_var
-= length
;
8490 bytes_added
+= length
;
8496 gas_assert (fragP
->fr_type
!= rs_machine_dependent
8497 || fragP
->fr_subtype
!= RELAX_ADD_NOP_IF_CLOSE_LOOP_END
);
8503 static offsetT
unrelaxed_frag_min_size (fragS
*);
8506 min_bytes_to_other_loop_end (fragS
*fragP
,
8507 fragS
*current_target
,
8511 fragS
*current_fragP
;
8513 for (current_fragP
= fragP
;
8515 current_fragP
= current_fragP
->fr_next
)
8517 if (current_fragP
->tc_frag_data
.is_loop_target
8518 && current_fragP
!= current_target
)
8521 offset
+= unrelaxed_frag_min_size (current_fragP
);
8523 if (offset
>= max_size
)
8531 unrelaxed_frag_min_size (fragS
*fragP
)
8533 offsetT size
= fragP
->fr_fix
;
8535 /* Add fill size. */
8536 if (fragP
->fr_type
== rs_fill
)
8537 size
+= fragP
->fr_offset
;
8544 unrelaxed_frag_max_size (fragS
*fragP
)
8546 offsetT size
= fragP
->fr_fix
;
8547 switch (fragP
->fr_type
)
8550 /* Empty frags created by the obstack allocation scheme
8551 end up with type 0. */
8556 size
+= fragP
->fr_offset
;
8564 /* No further adjustments needed. */
8566 case rs_machine_dependent
:
8567 if (fragP
->fr_subtype
!= RELAX_DESIRE_ALIGN
)
8568 size
+= fragP
->fr_var
;
8571 /* We had darn well better know how big it is. */
8580 /* Re-process all of the fragments looking to convert all
8581 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8584 1) the instruction size count to the loop end label
8585 is too short (<= 2 instructions),
8586 2) loop has a jump or branch in it
8589 1) workaround_all_short_loops is TRUE
8590 2) The generating loop was a 'loopgtz' or 'loopnez'
8591 3) the instruction size count to the loop end label is too short
8593 then convert this frag (and maybe the next one) to generate a NOP.
8594 In any case close it off with a .fill 0. */
8596 static int count_insns_to_loop_end (fragS
*, bfd_boolean
, int);
8597 static bfd_boolean
branch_before_loop_end (fragS
*);
8600 xtensa_fix_short_loop_frags (void)
8605 /* When this routine is called, all of the subsections are still intact
8606 so we walk over subsections instead of sections. */
8607 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8608 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8611 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
8613 /* Walk over all of the fragments in a subsection. */
8614 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8616 if (fragP
->fr_type
== rs_machine_dependent
8617 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8618 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8621 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8622 tinsn_from_chars (&t_insn
, loop_frag
->fr_opcode
, 0);
8623 current_opcode
= t_insn
.opcode
;
8624 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa
,
8625 current_opcode
) == 1);
8628 if (fragP
->fr_type
== rs_machine_dependent
8629 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8631 if (count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3) < 3
8632 && (branch_before_loop_end (fragP
->fr_next
)
8633 || (workaround_all_short_loops
8634 && current_opcode
!= XTENSA_UNDEFINED
8635 && current_opcode
!= xtensa_loop_opcode
)))
8637 if (fragP
->tc_frag_data
.is_no_transform
)
8638 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8640 relax_frag_add_nop (fragP
);
8649 static int unrelaxed_frag_min_insn_count (fragS
*);
8652 count_insns_to_loop_end (fragS
*base_fragP
,
8653 bfd_boolean count_relax_add
,
8656 fragS
*fragP
= NULL
;
8661 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
8663 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
8664 if (insn_count
>= max_count
)
8667 if (count_relax_add
)
8669 if (fragP
->fr_type
== rs_machine_dependent
8670 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8672 /* In order to add the appropriate number of
8673 NOPs, we count an instruction for downstream
8676 if (insn_count
>= max_count
)
8686 unrelaxed_frag_min_insn_count (fragS
*fragP
)
8688 xtensa_isa isa
= xtensa_default_isa
;
8689 static xtensa_insnbuf insnbuf
= NULL
;
8691 unsigned int offset
= 0;
8693 if (!fragP
->tc_frag_data
.is_insn
)
8697 insnbuf
= xtensa_insnbuf_alloc (isa
);
8699 /* Decode the fixed instructions. */
8700 while (offset
< fragP
->fr_fix
)
8704 xtensa_insnbuf_from_chars
8705 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8706 fmt
= xtensa_format_decode (isa
, insnbuf
);
8708 if (fmt
== XTENSA_UNDEFINED
)
8710 as_fatal (_("undecodable instruction in instruction frag"));
8713 offset
+= xtensa_format_length (isa
, fmt
);
8721 static bfd_boolean
unrelaxed_frag_has_b_j (fragS
*);
8724 branch_before_loop_end (fragS
*base_fragP
)
8728 for (fragP
= base_fragP
;
8729 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
8730 fragP
= fragP
->fr_next
)
8732 if (unrelaxed_frag_has_b_j (fragP
))
8740 unrelaxed_frag_has_b_j (fragS
*fragP
)
8742 static xtensa_insnbuf insnbuf
= NULL
;
8743 xtensa_isa isa
= xtensa_default_isa
;
8744 unsigned int offset
= 0;
8746 if (!fragP
->tc_frag_data
.is_insn
)
8750 insnbuf
= xtensa_insnbuf_alloc (isa
);
8752 /* Decode the fixed instructions. */
8753 while (offset
< fragP
->fr_fix
)
8758 xtensa_insnbuf_from_chars
8759 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8760 fmt
= xtensa_format_decode (isa
, insnbuf
);
8761 if (fmt
== XTENSA_UNDEFINED
)
8764 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8766 xtensa_opcode opcode
=
8767 get_opcode_from_buf (fragP
->fr_literal
+ offset
, slot
);
8768 if (xtensa_opcode_is_branch (isa
, opcode
) == 1
8769 || xtensa_opcode_is_jump (isa
, opcode
) == 1)
8772 offset
+= xtensa_format_length (isa
, fmt
);
8778 /* Checks to be made after initial assembly but before relaxation. */
8780 static bfd_boolean
is_empty_loop (const TInsn
*, fragS
*);
8781 static bfd_boolean
is_local_forward_loop (const TInsn
*, fragS
*);
8784 xtensa_sanity_check (void)
8786 const char *file_name
;
8791 file_name
= as_where (&line
);
8792 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8793 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8797 /* Walk over all of the fragments in a subsection. */
8798 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8800 if (fragP
->fr_type
== rs_machine_dependent
8801 && fragP
->fr_subtype
== RELAX_SLOTS
8802 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8804 static xtensa_insnbuf insnbuf
= NULL
;
8807 if (fragP
->fr_opcode
!= NULL
)
8810 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
8811 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
, 0);
8812 tinsn_immed_from_frag (&t_insn
, fragP
, 0);
8814 if (xtensa_opcode_is_loop (xtensa_default_isa
,
8815 t_insn
.opcode
) == 1)
8817 if (is_empty_loop (&t_insn
, fragP
))
8819 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8820 as_bad (_("invalid empty loop"));
8822 if (!is_local_forward_loop (&t_insn
, fragP
))
8824 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8825 as_bad (_("loop target does not follow "
8826 "loop instruction in section"));
8833 new_logical_line (file_name
, line
);
8837 #define LOOP_IMMED_OPN 1
8839 /* Return TRUE if the loop target is the next non-zero fragment. */
8842 is_empty_loop (const TInsn
*insn
, fragS
*fragP
)
8844 const expressionS
*exp
;
8848 if (insn
->insn_type
!= ITYPE_INSN
)
8851 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8854 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8857 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8859 if (exp
->X_op
!= O_symbol
)
8862 symbolP
= exp
->X_add_symbol
;
8866 if (symbol_get_frag (symbolP
) == NULL
)
8869 if (S_GET_VALUE (symbolP
) != 0)
8872 /* Walk through the zero-size fragments from this one. If we find
8873 the target fragment, then this is a zero-size loop. */
8875 for (next_fragP
= fragP
->fr_next
;
8877 next_fragP
= next_fragP
->fr_next
)
8879 if (next_fragP
== symbol_get_frag (symbolP
))
8881 if (next_fragP
->fr_fix
!= 0)
8889 is_local_forward_loop (const TInsn
*insn
, fragS
*fragP
)
8891 const expressionS
*exp
;
8895 if (insn
->insn_type
!= ITYPE_INSN
)
8898 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8901 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8904 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8906 if (exp
->X_op
!= O_symbol
)
8909 symbolP
= exp
->X_add_symbol
;
8913 if (symbol_get_frag (symbolP
) == NULL
)
8916 /* Walk through fragments until we find the target.
8917 If we do not find the target, then this is an invalid loop. */
8919 for (next_fragP
= fragP
->fr_next
;
8921 next_fragP
= next_fragP
->fr_next
)
8923 if (next_fragP
== symbol_get_frag (symbolP
))
8931 #define XTINFO_NAME "Xtensa_Info"
8932 #define XTINFO_NAMESZ 12
8933 #define XTINFO_TYPE 1
8936 xtensa_add_config_info (void)
8942 info_sec
= subseg_new (".xtensa.info", 0);
8943 bfd_set_section_flags (stdoutput
, info_sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
8945 data
= XNEWVEC (char, 100);
8946 sprintf (data
, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8947 XSHAL_USE_ABSOLUTE_LITERALS
, XSHAL_ABI
);
8948 sz
= strlen (data
) + 1;
8950 /* Add enough null terminators to pad to a word boundary. */
8953 while ((sz
& 3) != 0);
8955 /* Follow the standard note section layout:
8956 First write the length of the name string. */
8958 md_number_to_chars (p
, (valueT
) XTINFO_NAMESZ
, 4);
8960 /* Next comes the length of the "descriptor", i.e., the actual data. */
8962 md_number_to_chars (p
, (valueT
) sz
, 4);
8964 /* Write the note type. */
8966 md_number_to_chars (p
, (valueT
) XTINFO_TYPE
, 4);
8968 /* Write the name field. */
8969 p
= frag_more (XTINFO_NAMESZ
);
8970 memcpy (p
, XTINFO_NAME
, XTINFO_NAMESZ
);
8972 /* Finally, write the descriptor. */
8974 memcpy (p
, data
, sz
);
8980 /* Alignment Functions. */
8983 get_text_align_power (unsigned target_size
)
8985 if (target_size
<= 4)
8988 if (target_size
<= 8)
8991 if (target_size
<= 16)
8994 if (target_size
<= 32)
8997 if (target_size
<= 64)
9000 if (target_size
<= 128)
9003 if (target_size
<= 256)
9006 if (target_size
<= 512)
9009 if (target_size
<= 1024)
9018 get_text_align_max_fill_size (int align_pow
,
9019 bfd_boolean use_nops
,
9020 bfd_boolean use_no_density
)
9023 return (1 << align_pow
);
9025 return 3 * (1 << align_pow
);
9027 return 1 + (1 << align_pow
);
9031 /* Calculate the minimum bytes of fill needed at "address" to align a
9032 target instruction of size "target_size" so that it does not cross a
9033 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
9034 the fill can be an arbitrary number of bytes. Otherwise, the space must
9035 be filled by NOP instructions. */
9038 get_text_align_fill_size (addressT address
,
9041 bfd_boolean use_nops
,
9042 bfd_boolean use_no_density
)
9044 addressT alignment
, fill
, fill_limit
, fill_step
;
9045 bfd_boolean skip_one
= FALSE
;
9047 alignment
= (1 << align_pow
);
9048 gas_assert (target_size
> 0 && alignment
>= (addressT
) target_size
);
9052 fill_limit
= alignment
;
9055 else if (!use_no_density
)
9057 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
9058 fill_limit
= alignment
* 2;
9064 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
9065 fill_limit
= alignment
* 3;
9069 /* Try all fill sizes until finding one that works. */
9070 for (fill
= 0; fill
< fill_limit
; fill
+= fill_step
)
9072 if (skip_one
&& fill
== 1)
9074 if ((address
+ fill
) >> align_pow
9075 == (address
+ fill
+ target_size
- 1) >> align_pow
)
9084 branch_align_power (segT sec
)
9086 /* If the Xtensa processor has a fetch width of X, and
9087 the section is aligned to at least that boundary, then a branch
9088 target need only fit within that aligned block of memory to avoid
9089 a stall. Otherwise, try to fit branch targets within 4-byte
9090 aligned blocks (which may be insufficient, e.g., if the section
9091 has no alignment, but it's good enough). */
9092 int fetch_align
= get_text_align_power(xtensa_fetch_width
);
9093 int sec_align
= get_recorded_alignment (sec
);
9095 if (sec_align
>= fetch_align
)
9102 /* This will assert if it is not possible. */
9105 get_text_align_nop_count (offsetT fill_size
, bfd_boolean use_no_density
)
9111 gas_assert (fill_size
% 3 == 0);
9112 return (fill_size
/ 3);
9115 gas_assert (fill_size
!= 1); /* Bad argument. */
9117 while (fill_size
> 1)
9120 if (fill_size
== 2 || fill_size
== 4)
9122 fill_size
-= insn_size
;
9125 gas_assert (fill_size
!= 1); /* Bad algorithm. */
9131 get_text_align_nth_nop_size (offsetT fill_size
,
9133 bfd_boolean use_no_density
)
9140 gas_assert (fill_size
!= 1); /* Bad argument. */
9142 while (fill_size
> 1)
9145 if (fill_size
== 2 || fill_size
== 4)
9147 fill_size
-= insn_size
;
9157 /* For the given fragment, find the appropriate address
9158 for it to begin at if we are using NOPs to align it. */
9161 get_noop_aligned_address (fragS
*fragP
, addressT address
)
9163 /* The rule is: get next fragment's FIRST instruction. Find
9164 the smallest number of bytes that need to be added to
9165 ensure that the next fragment's FIRST instruction will fit
9168 E.G., 2 bytes : 0, 1, 2 mod 4
9171 If the FIRST instruction MIGHT be relaxed,
9172 assume that it will become a 3-byte instruction.
9174 Note again here that LOOP instructions are not bundleable,
9175 and this relaxation only applies to LOOP opcodes. */
9178 int first_insn_size
;
9180 addressT pre_opcode_bytes
;
9183 xtensa_opcode opcode
;
9184 bfd_boolean is_loop
;
9186 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
9187 gas_assert (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
);
9189 /* Find the loop frag. */
9190 first_insn
= next_non_empty_frag (fragP
);
9191 /* Now find the first insn frag. */
9192 first_insn
= next_non_empty_frag (first_insn
);
9194 is_loop
= next_frag_opcode_is_loop (fragP
, &opcode
);
9195 gas_assert (is_loop
);
9196 loop_insn_size
= xg_get_single_size (opcode
);
9198 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
9199 pre_opcode_bytes
+= loop_insn_size
;
9201 /* For loops, the alignment depends on the size of the
9202 instruction following the loop, not the LOOP instruction. */
9204 if (first_insn
== NULL
)
9205 first_insn_size
= xtensa_fetch_width
;
9207 first_insn_size
= get_loop_align_size (frag_format_size (first_insn
));
9209 /* If it was 8, then we'll need a larger alignment for the section. */
9210 align_power
= get_text_align_power (first_insn_size
);
9211 record_alignment (now_seg
, align_power
);
9213 fill_size
= get_text_align_fill_size
9214 (address
+ pre_opcode_bytes
, align_power
, first_insn_size
, TRUE
,
9215 fragP
->tc_frag_data
.is_no_density
);
9217 return address
+ fill_size
;
9221 /* 3 mechanisms for relaxing an alignment:
9223 Align to a power of 2.
9224 Align so the next fragment's instruction does not cross a word boundary.
9225 Align the current instruction so that if the next instruction
9226 were 3 bytes, it would not cross a word boundary.
9230 zeros - This is easy; always insert zeros.
9231 nops - 3-byte and 2-byte instructions
9235 >=5 : 3-byte instruction + fn (n-3)
9236 widening - widen previous instructions. */
9239 get_aligned_diff (fragS
*fragP
, addressT address
, offsetT
*max_diff
)
9241 addressT target_address
, loop_insn_offset
;
9243 xtensa_opcode loop_opcode
;
9244 bfd_boolean is_loop
;
9247 offsetT branch_align
;
9250 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
9251 switch (fragP
->fr_subtype
)
9253 case RELAX_DESIRE_ALIGN
:
9254 target_size
= next_frag_format_size (fragP
);
9255 if (target_size
== XTENSA_UNDEFINED
)
9257 align_power
= branch_align_power (now_seg
);
9258 branch_align
= 1 << align_power
;
9259 /* Don't count on the section alignment being as large as the target. */
9260 if (target_size
> branch_align
)
9261 target_size
= branch_align
;
9262 opt_diff
= get_text_align_fill_size (address
, align_power
,
9263 target_size
, FALSE
, FALSE
);
9265 *max_diff
= (opt_diff
+ branch_align
9266 - (target_size
+ ((address
+ opt_diff
) % branch_align
)));
9267 gas_assert (*max_diff
>= opt_diff
);
9270 case RELAX_ALIGN_NEXT_OPCODE
:
9271 /* The next non-empty frag after this one holds the LOOP instruction
9272 that needs to be aligned. The required alignment depends on the
9273 size of the next non-empty frag after the loop frag, i.e., the
9274 first instruction in the loop. */
9275 loop_frag
= next_non_empty_frag (fragP
);
9276 target_size
= get_loop_align_size (next_frag_format_size (loop_frag
));
9277 loop_insn_offset
= 0;
9278 is_loop
= next_frag_opcode_is_loop (fragP
, &loop_opcode
);
9279 gas_assert (is_loop
);
9281 /* If the loop has been expanded then the LOOP instruction
9282 could be at an offset from this fragment. */
9283 if (loop_frag
->tc_frag_data
.slot_subtypes
[0] != RELAX_IMMED
)
9284 loop_insn_offset
= get_expanded_loop_offset (loop_opcode
);
9286 /* In an ideal world, which is what we are shooting for here,
9287 we wouldn't need to use any NOPs immediately prior to the
9288 LOOP instruction. If this approach fails, relax_frag_loop_align
9289 will call get_noop_aligned_address. */
9291 address
+ loop_insn_offset
+ xg_get_single_size (loop_opcode
);
9292 align_power
= get_text_align_power (target_size
);
9293 opt_diff
= get_text_align_fill_size (target_address
, align_power
,
9294 target_size
, FALSE
, FALSE
);
9296 *max_diff
= xtensa_fetch_width
9297 - ((target_address
+ opt_diff
) % xtensa_fetch_width
)
9298 - target_size
+ opt_diff
;
9299 gas_assert (*max_diff
>= opt_diff
);
9310 /* md_relax_frag Hook and Helper Functions. */
9312 static long relax_frag_loop_align (fragS
*, long);
9313 static long relax_frag_for_align (fragS
*, long);
9314 static long relax_frag_immed
9315 (segT
, fragS
*, long, int, xtensa_format
, int, int *, bfd_boolean
);
9317 /* Get projected address for the first fulcrum on a path from source to
9319 static addressT
xg_get_fulcrum (addressT source
, addressT target
)
9321 offsetT delta
= target
- source
;
9324 n
= (labs (delta
) + J_RANGE
- J_MARGIN
- 1) / (J_RANGE
- J_MARGIN
);
9325 return source
+ delta
/ n
;
9328 /* Given trampoline index, source and target of a jump find the best
9329 candidate trampoline for the first fulcrum. The best trampoline is
9330 the one in the reach of "j' instruction from the source, closest to
9331 the projected fulcrum address, and preferrably w/o a jump around or
9332 with already initialized jump around. */
9333 static size_t xg_find_best_trampoline (struct trampoline_index
*idx
,
9334 addressT source
, addressT target
)
9336 addressT fulcrum
= xg_get_fulcrum (source
, target
);
9339 size_t base_tr
= xg_find_trampoline (idx
, fulcrum
);
9342 /* Check trampoline frags around the base_tr to find the best. */
9343 for (dist
= 0; checked
; ++dist
)
9346 size_t tr
= base_tr
- dist
;
9350 /* Trampolines are checked in the following order:
9351 base_tr, base_tr + 1, base_tr - 1, base_tr + 2, base_tr - 2 */
9352 for (i
= 0; i
< 2; ++i
, tr
= base_tr
+ dist
+ 1)
9353 if (tr
< idx
->n_entries
)
9355 fragS
*trampoline_frag
= idx
->entry
[tr
];
9358 /* Don't check trampolines outside source - target interval. */
9359 if ((trampoline_frag
->fr_address
< source
&&
9360 trampoline_frag
->fr_address
< target
) ||
9361 (trampoline_frag
->fr_address
> source
&&
9362 trampoline_frag
->fr_address
> target
))
9365 /* Don't choose trampoline that contains the source. */
9366 if (source
>= trampoline_frag
->fr_address
9367 && source
<= trampoline_frag
->fr_address
+
9368 trampoline_frag
->fr_fix
)
9371 off
= trampoline_frag
->fr_address
- fulcrum
;
9372 /* Stop if some trampoline is found and the search is more than
9373 J_RANGE / 4 from the projected fulcrum. A trampoline w/o jump
9374 around is nice, but it shouldn't have much overhead. */
9375 if (best
< idx
->n_entries
&& labs (off
) > J_RANGE
/ 4)
9378 off
= trampoline_frag
->fr_address
- source
;
9379 if (labs (off
) < J_RANGE
- J_MARGIN
)
9382 /* Stop if a trampoline w/o jump around is found or initialized
9383 trampoline with jump around is found. */
9384 if (!trampoline_frag
->tc_frag_data
.needs_jump_around
||
9385 trampoline_frag
->fr_fix
)
9387 else if (best
>= idx
->n_entries
)
9393 if (best
< idx
->n_entries
)
9396 as_fatal (_("cannot find suitable trampoline"));
9399 static fixS
*xg_relax_fixup (struct trampoline_index
*idx
, fixS
*fixP
)
9401 symbolS
*s
= fixP
->fx_addsy
;
9402 addressT source
= fixP
->fx_frag
->fr_address
;
9403 addressT target
= S_GET_VALUE (s
) + fixP
->fx_offset
;
9404 size_t tr
= xg_find_best_trampoline (idx
, source
, target
);
9405 fragS
*trampoline_frag
= idx
->entry
[tr
];
9408 init_trampoline_frag (trampoline_frag
);
9409 newfixP
= xg_append_jump (trampoline_frag
,
9410 fixP
->fx_addsy
, fixP
->fx_offset
);
9412 /* Adjust the fixup for the original "j" instruction to
9413 point to the newly added jump. */
9414 fixP
->fx_addsy
= trampoline_frag
->fr_symbol
;
9415 fixP
->fx_offset
= trampoline_frag
->fr_fix
- 3;
9416 fixP
->tc_fix_data
.X_add_symbol
= trampoline_frag
->fr_symbol
;
9417 fixP
->tc_fix_data
.X_add_number
= trampoline_frag
->fr_fix
- 3;
9419 trampoline_frag
->tc_frag_data
.relax_seen
= FALSE
;
9421 if (xg_is_trampoline_frag_full (trampoline_frag
))
9422 xg_remove_trampoline_from_index (idx
, tr
);
9427 static bfd_boolean
xg_is_relaxable_fixup (fixS
*fixP
)
9429 xtensa_isa isa
= xtensa_default_isa
;
9430 addressT addr
= fixP
->fx_frag
->fr_address
;
9433 symbolS
*s
= fixP
->fx_addsy
;
9436 xtensa_opcode opcode
;
9438 if (fixP
->fx_r_type
< BFD_RELOC_XTENSA_SLOT0_OP
||
9439 fixP
->fx_r_type
> BFD_RELOC_XTENSA_SLOT14_OP
)
9442 target
= S_GET_VALUE (s
) + fixP
->fx_offset
;
9443 delta
= target
- addr
;
9445 if (labs (delta
) < J_RANGE
- J_MARGIN
)
9448 xtensa_insnbuf_from_chars (isa
, trampoline_buf
,
9449 (unsigned char *) fixP
->fx_frag
->fr_literal
+
9451 fmt
= xtensa_format_decode (isa
, trampoline_buf
);
9452 gas_assert (fmt
!= XTENSA_UNDEFINED
);
9453 slot
= fixP
->tc_fix_data
.slot
;
9454 xtensa_format_get_slot (isa
, fmt
, slot
, trampoline_buf
, trampoline_slotbuf
);
9455 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, trampoline_slotbuf
);
9456 return opcode
== xtensa_j_opcode
;
9459 static void xg_relax_fixups (struct trampoline_seg
*ts
)
9461 struct trampoline_index
*idx
= &ts
->index
;
9462 segment_info_type
*seginfo
= seg_info (now_seg
);
9465 for (fx
= seginfo
->fix_root
; fx
; fx
= fx
->fx_next
)
9468 struct trampoline_chain
*tc
= NULL
;
9470 if (xg_is_relaxable_fixup (fixP
))
9472 tc
= xg_find_best_eq_target (ts
, fixP
->fx_frag
->fr_address
,
9473 &fixP
->fx_addsy
, &fixP
->fx_offset
);
9475 tc
= xg_create_trampoline_chain (ts
, fixP
->fx_addsy
,
9480 while (xg_is_relaxable_fixup (fixP
))
9482 fixP
= xg_relax_fixup (idx
, fixP
);
9483 xg_add_location_to_chain (tc
, fixP
->fx_frag
->fr_symbol
,
9489 /* Given a trampoline frag relax all jumps that might want to use this
9490 trampoline. Only do real work once per relaxation cycle, when
9491 xg_relax_trampoline is called for the first trampoline in the now_seg.
9492 Don't use stretch, don't update new_stretch: place fulcrums with a
9493 slack to tolerate code movement. In the worst case if a jump between
9494 two trampolines wouldn't reach the next relaxation pass will fix it. */
9495 static void xg_relax_trampoline (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
,
9496 long *new_stretch ATTRIBUTE_UNUSED
)
9498 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9500 if (ts
->index
.n_entries
&& ts
->index
.entry
[0] == fragP
)
9501 xg_relax_fixups (ts
);
9504 /* Return the number of bytes added to this fragment, given that the
9505 input has been stretched already by "stretch". */
9508 xtensa_relax_frag (fragS
*fragP
, long stretch
, int *stretched_p
)
9510 xtensa_isa isa
= xtensa_default_isa
;
9511 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
9512 long new_stretch
= 0;
9513 const char *file_name
;
9516 static xtensa_insnbuf vbuf
= NULL
;
9517 int slot
, num_slots
;
9520 file_name
= as_where (&line
);
9521 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
9523 fragP
->tc_frag_data
.unreported_expansion
= 0;
9525 switch (fragP
->fr_subtype
)
9527 case RELAX_ALIGN_NEXT_OPCODE
:
9528 /* Always convert. */
9529 if (fragP
->tc_frag_data
.relax_seen
)
9530 new_stretch
= relax_frag_loop_align (fragP
, stretch
);
9533 case RELAX_LOOP_END
:
9537 case RELAX_LOOP_END_ADD_NOP
:
9538 /* Add a NOP and switch to .fill 0. */
9539 new_stretch
= relax_frag_add_nop (fragP
);
9543 case RELAX_DESIRE_ALIGN
:
9544 /* Do nothing. The narrowing before this frag will either align
9549 case RELAX_LITERAL_FINAL
:
9552 case RELAX_LITERAL_NR
:
9554 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
9555 gas_assert (unreported
== lit_size
);
9556 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
9557 fragP
->fr_var
-= lit_size
;
9558 fragP
->fr_fix
+= lit_size
;
9564 vbuf
= xtensa_insnbuf_alloc (isa
);
9566 xtensa_insnbuf_from_chars
9567 (isa
, vbuf
, (unsigned char *) fragP
->fr_opcode
, 0);
9568 fmt
= xtensa_format_decode (isa
, vbuf
);
9569 num_slots
= xtensa_format_num_slots (isa
, fmt
);
9571 for (slot
= 0; slot
< num_slots
; slot
++)
9573 switch (fragP
->tc_frag_data
.slot_subtypes
[slot
])
9576 if (fragP
->tc_frag_data
.relax_seen
)
9577 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9581 case RELAX_IMMED_STEP1
:
9582 case RELAX_IMMED_STEP2
:
9583 case RELAX_IMMED_STEP3
:
9584 /* Place the immediate. */
9585 new_stretch
+= relax_frag_immed
9586 (now_seg
, fragP
, stretch
,
9587 fragP
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
9588 fmt
, slot
, stretched_p
, FALSE
);
9592 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9598 case RELAX_LITERAL_POOL_BEGIN
:
9599 if (fragP
->fr_var
!= 0)
9601 /* We have a converted "candidate" literal pool;
9602 assemble a jump around it. */
9604 if (!litpool_slotbuf
)
9606 litpool_buf
= xtensa_insnbuf_alloc (isa
);
9607 litpool_slotbuf
= xtensa_insnbuf_alloc (isa
);
9610 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9611 fragP
->tc_frag_data
.is_insn
= TRUE
;
9613 insn
.insn_type
= ITYPE_INSN
;
9614 insn
.opcode
= xtensa_j_opcode
;
9616 set_expr_symbol_offset (&insn
.tok
[0], fragP
->fr_symbol
,
9618 fmt
= xg_get_single_format (xtensa_j_opcode
);
9619 tinsn_to_slotbuf (fmt
, 0, &insn
, litpool_slotbuf
);
9620 xtensa_format_set_slot (isa
, fmt
, 0, litpool_buf
, litpool_slotbuf
);
9621 xtensa_insnbuf_to_chars (isa
, litpool_buf
,
9622 (unsigned char *)fragP
->fr_literal
+
9627 fix_new (fragP
, 0, 3, fragP
->fr_symbol
, 0, TRUE
,
9628 BFD_RELOC_XTENSA_SLOT0_OP
);
9632 case RELAX_LITERAL_POOL_END
:
9633 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
9634 case RELAX_MAYBE_UNREACHABLE
:
9635 case RELAX_MAYBE_DESIRE_ALIGN
:
9636 /* No relaxation required. */
9639 case RELAX_FILL_NOP
:
9640 case RELAX_UNREACHABLE
:
9641 if (fragP
->tc_frag_data
.relax_seen
)
9642 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9645 case RELAX_TRAMPOLINE
:
9646 if (fragP
->tc_frag_data
.relax_seen
)
9647 xg_relax_trampoline (fragP
, stretch
, &new_stretch
);
9651 as_bad (_("bad relaxation state"));
9654 /* Tell gas we need another relaxation pass. */
9655 if (! fragP
->tc_frag_data
.relax_seen
)
9657 fragP
->tc_frag_data
.relax_seen
= TRUE
;
9661 new_logical_line (file_name
, line
);
9667 relax_frag_loop_align (fragS
*fragP
, long stretch
)
9669 addressT old_address
, old_next_address
, old_size
;
9670 addressT new_address
, new_next_address
, new_size
;
9673 /* All the frags with relax_frag_for_alignment prior to this one in the
9674 section have been done, hopefully eliminating the need for a NOP here.
9675 But, this will put it in if necessary. */
9677 /* Calculate the old address of this fragment and the next fragment. */
9678 old_address
= fragP
->fr_address
- stretch
;
9679 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
9680 fragP
->tc_frag_data
.text_expansion
[0]);
9681 old_size
= old_next_address
- old_address
;
9683 /* Calculate the new address of this fragment and the next fragment. */
9684 new_address
= fragP
->fr_address
;
9686 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
9687 new_size
= new_next_address
- new_address
;
9689 growth
= new_size
- old_size
;
9691 /* Fix up the text_expansion field and return the new growth. */
9692 fragP
->tc_frag_data
.text_expansion
[0] += growth
;
9697 /* Add a NOP instruction. */
9700 relax_frag_add_nop (fragS
*fragP
)
9702 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
9703 int length
= fragP
->tc_frag_data
.is_no_density
? 3 : 2;
9704 assemble_nop (length
, nop_buf
);
9705 fragP
->tc_frag_data
.is_insn
= TRUE
;
9707 if (fragP
->fr_var
< length
)
9709 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP
->fr_var
, length
);
9713 fragP
->fr_fix
+= length
;
9714 fragP
->fr_var
-= length
;
9719 static long future_alignment_required (fragS
*, long);
9722 relax_frag_for_align (fragS
*fragP
, long stretch
)
9724 /* Overview of the relaxation procedure for alignment:
9725 We can widen with NOPs or by widening instructions or by filling
9726 bytes after jump instructions. Find the opportune places and widen
9727 them if necessary. */
9732 gas_assert (fragP
->fr_subtype
== RELAX_FILL_NOP
9733 || fragP
->fr_subtype
== RELAX_UNREACHABLE
9734 || (fragP
->fr_subtype
== RELAX_SLOTS
9735 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
));
9737 stretch_me
= future_alignment_required (fragP
, stretch
);
9738 diff
= stretch_me
- fragP
->tc_frag_data
.text_expansion
[0];
9744 /* We expanded on a previous pass. Can we shrink now? */
9745 long shrink
= fragP
->tc_frag_data
.text_expansion
[0] - stretch_me
;
9746 if (shrink
<= stretch
&& stretch
> 0)
9748 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9754 /* Below here, diff > 0. */
9755 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9761 /* Return the address of the next frag that should be aligned.
9763 By "address" we mean the address it _would_ be at if there
9764 is no action taken to align it between here and the target frag.
9765 In other words, if no narrows and no fill nops are used between
9766 here and the frag to align, _even_if_ some of the frags we use
9767 to align targets have already expanded on a previous relaxation
9770 Also, count each frag that may be used to help align the target.
9772 Return 0 if there are no frags left in the chain that need to be
9776 find_address_of_next_align_frag (fragS
**fragPP
,
9780 bfd_boolean
*paddable
)
9782 fragS
*fragP
= *fragPP
;
9783 addressT address
= fragP
->fr_address
;
9785 /* Do not reset the counts to 0. */
9789 /* Limit this to a small search. */
9790 if (*widens
>= (int) xtensa_fetch_width
)
9795 address
+= fragP
->fr_fix
;
9797 if (fragP
->fr_type
== rs_fill
)
9798 address
+= fragP
->fr_offset
* fragP
->fr_var
;
9799 else if (fragP
->fr_type
== rs_machine_dependent
)
9801 switch (fragP
->fr_subtype
)
9803 case RELAX_UNREACHABLE
:
9807 case RELAX_FILL_NOP
:
9809 if (!fragP
->tc_frag_data
.is_no_density
)
9814 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9819 address
+= total_frag_text_expansion (fragP
);
9823 address
+= fragP
->tc_frag_data
.text_expansion
[0];
9826 case RELAX_ALIGN_NEXT_OPCODE
:
9827 case RELAX_DESIRE_ALIGN
:
9831 case RELAX_MAYBE_UNREACHABLE
:
9832 case RELAX_MAYBE_DESIRE_ALIGN
:
9837 /* Just punt if we don't know the type. */
9844 /* Just punt if we don't know the type. */
9848 fragP
= fragP
->fr_next
;
9856 static long bytes_to_stretch (fragS
*, int, int, int, int);
9859 future_alignment_required (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
)
9861 fragS
*this_frag
= fragP
;
9865 int narrow_nops
= 0;
9866 bfd_boolean paddable
= FALSE
;
9867 offsetT local_opt_diff
;
9870 int stretch_amount
= 0;
9871 int local_stretch_amount
;
9872 int global_stretch_amount
;
9874 address
= find_address_of_next_align_frag
9875 (&fragP
, &wide_nops
, &narrow_nops
, &num_widens
, &paddable
);
9879 if (this_frag
->tc_frag_data
.is_aligning_branch
)
9880 this_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
9882 frag_wane (this_frag
);
9886 local_opt_diff
= get_aligned_diff (fragP
, address
, &max_diff
);
9887 opt_diff
= local_opt_diff
;
9888 gas_assert (opt_diff
>= 0);
9889 gas_assert (max_diff
>= opt_diff
);
9894 fragP
= fragP
->fr_next
;
9896 while (fragP
&& opt_diff
< max_diff
&& address
)
9898 /* We only use these to determine if we can exit early
9899 because there will be plenty of ways to align future
9901 int glob_widens
= 0;
9904 bfd_boolean glob_pad
= 0;
9905 address
= find_address_of_next_align_frag
9906 (&fragP
, &glob_widens
, &dnn
, &dw
, &glob_pad
);
9907 /* If there is a padable portion, then skip. */
9908 if (glob_pad
|| glob_widens
>= (1 << branch_align_power (now_seg
)))
9913 offsetT next_m_diff
;
9914 offsetT next_o_diff
;
9916 /* Downrange frags haven't had stretch added to them yet. */
9919 /* The address also includes any text expansion from this
9920 frag in a previous pass, but we don't want that. */
9921 address
-= this_frag
->tc_frag_data
.text_expansion
[0];
9923 /* Assume we are going to move at least opt_diff. In
9924 reality, we might not be able to, but assuming that
9925 we will helps catch cases where moving opt_diff pushes
9926 the next target from aligned to unaligned. */
9927 address
+= opt_diff
;
9929 next_o_diff
= get_aligned_diff (fragP
, address
, &next_m_diff
);
9931 /* Now cleanup for the adjustments to address. */
9932 next_o_diff
+= opt_diff
;
9933 next_m_diff
+= opt_diff
;
9934 if (next_o_diff
<= max_diff
&& next_o_diff
> opt_diff
)
9935 opt_diff
= next_o_diff
;
9936 if (next_m_diff
< max_diff
)
9937 max_diff
= next_m_diff
;
9938 fragP
= fragP
->fr_next
;
9942 /* If there are enough wideners in between, do it. */
9945 if (this_frag
->fr_subtype
== RELAX_UNREACHABLE
)
9947 gas_assert (opt_diff
<= (signed) xtensa_fetch_width
);
9952 local_stretch_amount
9953 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9954 num_widens
, local_opt_diff
);
9955 global_stretch_amount
9956 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9957 num_widens
, opt_diff
);
9958 /* If the condition below is true, then the frag couldn't
9959 stretch the correct amount for the global case, so we just
9960 optimize locally. We'll rely on the subsequent frags to get
9961 the correct alignment in the global case. */
9962 if (global_stretch_amount
< local_stretch_amount
)
9963 stretch_amount
= local_stretch_amount
;
9965 stretch_amount
= global_stretch_amount
;
9967 if (this_frag
->fr_subtype
== RELAX_SLOTS
9968 && this_frag
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9969 gas_assert (stretch_amount
<= 1);
9970 else if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9972 if (this_frag
->tc_frag_data
.is_no_density
)
9973 gas_assert (stretch_amount
== 3 || stretch_amount
== 0);
9975 gas_assert (stretch_amount
<= 3);
9978 return stretch_amount
;
9982 /* The idea: widen everything you can to get a target or loop aligned,
9983 then start using NOPs.
9985 wide_nops = the number of wide NOPs available for aligning
9986 narrow_nops = the number of narrow NOPs available for aligning
9987 (a subset of wide_nops)
9988 widens = the number of narrow instructions that should be widened
9993 bytes_to_stretch (fragS
*this_frag
,
10002 int bytes_short
= desired_diff
- num_widens
;
10004 gas_assert (desired_diff
>= 0
10005 && desired_diff
< (signed) xtensa_fetch_width
);
10006 if (desired_diff
== 0)
10009 gas_assert (wide_nops
> 0 || num_widens
> 0);
10011 /* Always prefer widening to NOP-filling. */
10012 if (bytes_short
< 0)
10014 /* There are enough RELAX_NARROW frags after this one
10015 to align the target without widening this frag in any way. */
10019 if (bytes_short
== 0)
10021 /* Widen every narrow between here and the align target
10022 and the align target will be properly aligned. */
10023 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10029 /* From here we will need at least one NOP to get an alignment.
10030 However, we may not be able to align at all, in which case,
10032 nops_needed
= desired_diff
/ 3;
10034 /* If there aren't enough nops, don't widen. */
10035 if (nops_needed
> wide_nops
)
10038 /* First try it with all wide nops. */
10039 nop_bytes
= nops_needed
* 3;
10040 extra_bytes
= desired_diff
- nop_bytes
;
10042 if (nop_bytes
+ num_widens
>= desired_diff
)
10044 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10046 else if (num_widens
== extra_bytes
)
10051 /* Add a narrow nop. */
10055 if (narrow_nops
== 0 || nops_needed
> wide_nops
)
10058 if (nop_bytes
+ num_widens
>= desired_diff
&& extra_bytes
>= 0)
10060 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10061 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
10062 else if (num_widens
== extra_bytes
)
10067 /* Replace a wide nop with a narrow nop--we can get here if
10068 extra_bytes was negative in the previous conditional. */
10069 if (narrow_nops
== 1)
10073 if (nop_bytes
+ num_widens
>= desired_diff
)
10075 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10076 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
10077 else if (num_widens
== extra_bytes
)
10082 /* If we can't satisfy any of the above cases, then we can't align
10083 using padding or fill nops. */
10089 xg_find_best_trampoline_for_tinsn (TInsn
*tinsn
, fragS
*fragP
)
10091 symbolS
*sym
= tinsn
->tok
[0].X_add_symbol
;
10092 addressT source
= fragP
->fr_address
;
10093 addressT target
= S_GET_VALUE (sym
) + tinsn
->tok
[0].X_add_number
;
10094 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10097 if (!ts
|| !ts
->index
.n_entries
)
10100 i
= xg_find_best_trampoline (&ts
->index
, source
, target
);
10102 return ts
->index
.entry
[i
];
10106 /* Append jump to sym + offset to the end of the trampoline frag fragP.
10107 Adjust fragP's jump around if it's present. Adjust fragP's fr_fix/fr_var
10108 and finish the frag if it's full (but don't remove it from the trampoline
10109 frag index). Return fixup for the newly created jump. */
10110 static fixS
*xg_append_jump (fragS
*fragP
, symbolS
*sym
, offsetT offset
)
10115 xtensa_isa isa
= xtensa_default_isa
;
10117 gas_assert (fragP
->fr_var
>= 3);
10118 tinsn_init (&insn
);
10119 insn
.insn_type
= ITYPE_INSN
;
10120 insn
.opcode
= xtensa_j_opcode
;
10122 set_expr_symbol_offset (&insn
.tok
[0], sym
, offset
);
10123 fmt
= xg_get_single_format (xtensa_j_opcode
);
10124 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10125 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10126 xtensa_insnbuf_to_chars (isa
, trampoline_buf
,
10127 (unsigned char *)fragP
->fr_literal
+ fragP
->fr_fix
, 3);
10128 fixP
= fix_new (fragP
, fragP
->fr_fix
, 3, sym
, offset
, TRUE
,
10129 BFD_RELOC_XTENSA_SLOT0_OP
);
10130 fixP
->tc_fix_data
.slot
= 0;
10132 fragP
->fr_fix
+= 3;
10133 fragP
->fr_var
-= 3;
10135 /* Adjust the jump around this trampoline (if present). */
10136 if (fragP
->tc_frag_data
.jump_around_fix
)
10137 fragP
->tc_frag_data
.jump_around_fix
->fx_offset
+= 3;
10139 /* Do we have room for more? */
10140 if (xg_is_trampoline_frag_full (fragP
))
10143 fragP
->fr_subtype
= 0;
10151 init_trampoline_frag (fragS
*fp
)
10155 if (fp
->fr_fix
== 0)
10158 char label
[10 + 2 * sizeof(fp
)];
10160 sprintf (label
, ".L0_TR_%p", fp
);
10161 lsym
= (symbolS
*)local_symbol_make (label
, now_seg
, 0, fp
);
10162 fp
->fr_symbol
= lsym
;
10163 if (fp
->tc_frag_data
.needs_jump_around
)
10165 fp
->tc_frag_data
.jump_around_fix
= xg_append_jump (fp
, lsym
, 3);
10173 xg_get_single_symbol_slot (fragS
*fragP
)
10178 for (i
= 0; i
< MAX_SLOTS
; ++i
)
10179 if (fragP
->tc_frag_data
.slot_symbols
[i
])
10181 gas_assert (slot
== -1);
10185 gas_assert (slot
>= 0 && slot
< MAX_SLOTS
);
10191 add_jump_to_trampoline (fragS
*tramp
, fragS
*origfrag
)
10193 int slot
= xg_get_single_symbol_slot (origfrag
);
10196 /* Assemble a jump to the target label in the trampoline frag. */
10197 fixP
= xg_append_jump (tramp
,
10198 origfrag
->tc_frag_data
.slot_symbols
[slot
],
10199 origfrag
->tc_frag_data
.slot_offsets
[slot
]);
10201 /* Modify the original j to point here. */
10202 origfrag
->tc_frag_data
.slot_symbols
[slot
] = tramp
->fr_symbol
;
10203 origfrag
->tc_frag_data
.slot_offsets
[slot
] = tramp
->fr_fix
- 3;
10205 /* If trampoline is full, remove it from the list. */
10206 if (xg_is_trampoline_frag_full (tramp
))
10208 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10209 size_t tr
= xg_find_trampoline (&ts
->index
, tramp
->fr_address
);
10211 gas_assert (ts
->index
.entry
[tr
] == tramp
);
10212 xg_remove_trampoline_from_index (&ts
->index
, tr
);
10220 relax_frag_immed (segT segP
,
10227 bfd_boolean estimate_only
)
10231 bfd_boolean negatable_branch
= FALSE
;
10232 bfd_boolean branch_jmp_to_next
= FALSE
;
10233 bfd_boolean from_wide_insn
= FALSE
;
10234 xtensa_isa isa
= xtensa_default_isa
;
10236 offsetT frag_offset
;
10238 int num_text_bytes
, num_literal_bytes
;
10239 int literal_diff
, total_text_diff
, this_text_diff
;
10241 gas_assert (fragP
->fr_opcode
!= NULL
);
10243 xg_clear_vinsn (&cur_vinsn
);
10244 vinsn_from_chars (&cur_vinsn
, fragP
->fr_opcode
);
10245 if (cur_vinsn
.num_slots
> 1)
10246 from_wide_insn
= TRUE
;
10248 tinsn
= cur_vinsn
.slots
[slot
];
10249 tinsn_immed_from_frag (&tinsn
, fragP
, slot
);
10251 if (estimate_only
&& xtensa_opcode_is_loop (isa
, tinsn
.opcode
) == 1)
10254 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10255 branch_jmp_to_next
= is_branch_jmp_to_next (&tinsn
, fragP
);
10257 negatable_branch
= (xtensa_opcode_is_branch (isa
, tinsn
.opcode
) == 1);
10259 old_size
= xtensa_format_length (isa
, fmt
);
10261 /* Special case: replace a branch to the next instruction with a NOP.
10262 This is required to work around a hardware bug in T1040.0 and also
10263 serves as an optimization. */
10265 if (branch_jmp_to_next
10266 && ((old_size
== 2) || (old_size
== 3))
10267 && !next_frag_is_loop_target (fragP
))
10270 /* Here is the fun stuff: Get the immediate field from this
10271 instruction. If it fits, we are done. If not, find the next
10272 instruction sequence that fits. */
10274 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10275 istack_init (&istack
);
10276 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
, frag_offset
,
10277 min_steps
, stretch
);
10278 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10280 fragP
->tc_frag_data
.slot_subtypes
[slot
] = (int) RELAX_IMMED
+ num_steps
;
10282 /* Figure out the number of bytes needed. */
10283 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10285 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10286 num_text_bytes
= get_num_stack_text_bytes (&istack
);
10288 if (from_wide_insn
)
10291 while (istack
.insn
[first
].opcode
== XTENSA_UNDEFINED
)
10294 num_text_bytes
+= old_size
;
10295 if (opcode_fits_format_slot (istack
.insn
[first
].opcode
, fmt
, slot
))
10296 num_text_bytes
-= xg_get_single_size (istack
.insn
[first
].opcode
);
10299 /* The first instruction in the relaxed sequence will go after
10300 the current wide instruction, and thus its symbolic immediates
10303 istack_init (&istack
);
10304 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
,
10305 frag_offset
+ old_size
,
10306 min_steps
, stretch
+ old_size
);
10307 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10309 fragP
->tc_frag_data
.slot_subtypes
[slot
]
10310 = (int) RELAX_IMMED
+ num_steps
;
10312 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10314 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10316 num_text_bytes
= get_num_stack_text_bytes (&istack
) + old_size
;
10320 total_text_diff
= num_text_bytes
- old_size
;
10321 this_text_diff
= total_text_diff
- fragP
->tc_frag_data
.text_expansion
[slot
];
10323 /* It MUST get larger. If not, we could get an infinite loop. */
10324 gas_assert (num_text_bytes
>= 0);
10325 gas_assert (literal_diff
>= 0);
10326 gas_assert (total_text_diff
>= 0);
10328 fragP
->tc_frag_data
.text_expansion
[slot
] = total_text_diff
;
10329 fragP
->tc_frag_data
.literal_expansion
[slot
] = num_literal_bytes
;
10330 gas_assert (fragP
->tc_frag_data
.text_expansion
[slot
] >= 0);
10331 gas_assert (fragP
->tc_frag_data
.literal_expansion
[slot
] >= 0);
10333 /* Find the associated expandable literal for this. */
10334 if (literal_diff
!= 0)
10336 fragS
*lit_fragP
= fragP
->tc_frag_data
.literal_frags
[slot
];
10339 gas_assert (literal_diff
== 4);
10340 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
10342 /* We expect that the literal section state has NOT been
10344 gas_assert (lit_fragP
->fr_type
== rs_machine_dependent
10345 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
10346 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
10348 /* We need to mark this section for another iteration
10354 if (negatable_branch
&& istack
.ninsn
> 1)
10355 update_next_frag_state (fragP
);
10357 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10358 if (istack
.ninsn
> 2 &&
10359 istack
.insn
[istack
.ninsn
- 1].insn_type
== ITYPE_LABEL
&&
10360 istack
.insn
[istack
.ninsn
- 2].insn_type
== ITYPE_INSN
&&
10361 istack
.insn
[istack
.ninsn
- 2].opcode
== xtensa_j_opcode
)
10363 TInsn
*jinsn
= &istack
.insn
[istack
.ninsn
- 2];
10364 struct trampoline_seg
*ts
= find_trampoline_seg (segP
);
10365 struct trampoline_chain
*tc
= NULL
;
10368 !xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
,
10371 int s
= xg_get_single_symbol_slot (fragP
);
10372 addressT offset
= fragP
->tc_frag_data
.slot_offsets
[s
];
10374 tc
= xg_find_best_eq_target (ts
, fragP
->fr_address
,
10375 &fragP
->tc_frag_data
.slot_symbols
[s
],
10379 tc
= xg_create_trampoline_chain (ts
,
10380 fragP
->tc_frag_data
.slot_symbols
[s
],
10382 fragP
->tc_frag_data
.slot_offsets
[s
] = offset
;
10383 tinsn_immed_from_frag (jinsn
, fragP
, s
);
10386 if (!xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
,
10389 fragS
*tf
= xg_find_best_trampoline_for_tinsn (jinsn
, fragP
);
10395 this_text_diff
+= init_trampoline_frag (tf
) + 3;
10396 fixP
= add_jump_to_trampoline (tf
, fragP
);
10397 xg_add_location_to_chain (tc
, fixP
->fx_frag
->fr_symbol
,
10399 fragP
->tc_frag_data
.relax_seen
= FALSE
;
10403 /* If target symbol is undefined, assume it will reach once linked. */
10404 expressionS
*exp
= &istack
.insn
[istack
.ninsn
- 2].tok
[0];
10406 if (exp
->X_op
== O_symbol
&& S_IS_DEFINED (exp
->X_add_symbol
))
10408 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10409 _("jump target out of range; no usable trampoline found"));
10415 return this_text_diff
;
10419 /* md_convert_frag Hook and Helper Functions. */
10421 static void convert_frag_align_next_opcode (fragS
*);
10422 static void convert_frag_narrow (segT
, fragS
*, xtensa_format
, int);
10423 static void convert_frag_fill_nop (fragS
*);
10424 static void convert_frag_immed (segT
, fragS
*, int, xtensa_format
, int);
10427 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, fragS
*fragp
)
10429 static xtensa_insnbuf vbuf
= NULL
;
10430 xtensa_isa isa
= xtensa_default_isa
;
10434 const char *file_name
;
10437 file_name
= as_where (&line
);
10438 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
10440 switch (fragp
->fr_subtype
)
10442 case RELAX_ALIGN_NEXT_OPCODE
:
10443 /* Always convert. */
10444 convert_frag_align_next_opcode (fragp
);
10447 case RELAX_DESIRE_ALIGN
:
10448 /* Do nothing. If not aligned already, too bad. */
10451 case RELAX_LITERAL
:
10452 case RELAX_LITERAL_FINAL
:
10457 vbuf
= xtensa_insnbuf_alloc (isa
);
10459 xtensa_insnbuf_from_chars
10460 (isa
, vbuf
, (unsigned char *) fragp
->fr_opcode
, 0);
10461 fmt
= xtensa_format_decode (isa
, vbuf
);
10462 num_slots
= xtensa_format_num_slots (isa
, fmt
);
10464 for (slot
= 0; slot
< num_slots
; slot
++)
10466 switch (fragp
->tc_frag_data
.slot_subtypes
[slot
])
10469 convert_frag_narrow (sec
, fragp
, fmt
, slot
);
10473 case RELAX_IMMED_STEP1
:
10474 case RELAX_IMMED_STEP2
:
10475 case RELAX_IMMED_STEP3
:
10476 /* Place the immediate. */
10479 fragp
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
10484 /* This is OK because some slots could have
10485 relaxations and others have none. */
10491 case RELAX_UNREACHABLE
:
10492 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, fragp
->fr_var
);
10493 fragp
->fr_fix
+= fragp
->tc_frag_data
.text_expansion
[0];
10494 fragp
->fr_var
-= fragp
->tc_frag_data
.text_expansion
[0];
10498 case RELAX_MAYBE_UNREACHABLE
:
10499 case RELAX_MAYBE_DESIRE_ALIGN
:
10503 case RELAX_FILL_NOP
:
10504 convert_frag_fill_nop (fragp
);
10507 case RELAX_LITERAL_NR
:
10508 if (use_literal_section
)
10510 /* This should have been handled during relaxation. When
10511 relaxing a code segment, literals sometimes need to be
10512 added to the corresponding literal segment. If that
10513 literal segment has already been relaxed, then we end up
10514 in this situation. Marking the literal segments as data
10515 would make this happen less often (since GAS always relaxes
10516 code before data), but we could still get into trouble if
10517 there are instructions in a segment that is not marked as
10518 containing code. Until we can implement a better solution,
10519 cheat and adjust the addresses of all the following frags.
10520 This could break subsequent alignments, but the linker's
10521 literal coalescing will do that anyway. */
10524 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
10525 gas_assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
10526 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
10527 fragp
->fr_var
-= 4;
10528 fragp
->fr_fix
+= 4;
10529 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
10530 f
->fr_address
+= 4;
10533 as_bad (_("invalid relaxation fragment result"));
10536 case RELAX_TRAMPOLINE
:
10541 new_logical_line (file_name
, line
);
10546 convert_frag_align_next_opcode (fragS
*fragp
)
10548 char *nop_buf
; /* Location for Writing. */
10549 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
10550 addressT aligned_address
;
10552 int nop
, nop_count
;
10554 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
10556 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
10557 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
10558 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
10560 for (nop
= 0; nop
< nop_count
; nop
++)
10563 nop_size
= get_text_align_nth_nop_size (fill_size
, nop
, use_no_density
);
10565 assemble_nop (nop_size
, nop_buf
);
10566 nop_buf
+= nop_size
;
10569 fragp
->fr_fix
+= fill_size
;
10570 fragp
->fr_var
-= fill_size
;
10575 convert_frag_narrow (segT segP
, fragS
*fragP
, xtensa_format fmt
, int slot
)
10577 TInsn tinsn
, single_target
;
10578 int size
, old_size
, diff
;
10579 offsetT frag_offset
;
10581 gas_assert (slot
== 0);
10582 tinsn_from_chars (&tinsn
, fragP
->fr_opcode
, 0);
10584 if (fragP
->tc_frag_data
.is_aligning_branch
== 1)
10586 gas_assert (fragP
->tc_frag_data
.text_expansion
[0] == 1
10587 || fragP
->tc_frag_data
.text_expansion
[0] == 0);
10588 convert_frag_immed (segP
, fragP
, fragP
->tc_frag_data
.text_expansion
[0],
10593 if (fragP
->tc_frag_data
.text_expansion
[0] == 0)
10595 /* No conversion. */
10600 gas_assert (fragP
->fr_opcode
!= NULL
);
10602 /* Frags in this relaxation state should only contain
10603 single instruction bundles. */
10604 tinsn_immed_from_frag (&tinsn
, fragP
, 0);
10606 /* Just convert it to a wide form.... */
10608 old_size
= xg_get_single_size (tinsn
.opcode
);
10610 tinsn_init (&single_target
);
10611 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10613 if (! xg_is_single_relaxable_insn (&tinsn
, &single_target
, FALSE
))
10615 as_bad (_("unable to widen instruction"));
10619 size
= xg_get_single_size (single_target
.opcode
);
10620 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
, fragP
,
10621 frag_offset
, TRUE
);
10623 diff
= size
- old_size
;
10624 gas_assert (diff
>= 0);
10625 gas_assert (diff
<= fragP
->fr_var
);
10626 fragP
->fr_var
-= diff
;
10627 fragP
->fr_fix
+= diff
;
10635 convert_frag_fill_nop (fragS
*fragP
)
10637 char *loc
= &fragP
->fr_literal
[fragP
->fr_fix
];
10638 int size
= fragP
->tc_frag_data
.text_expansion
[0];
10639 gas_assert ((unsigned) size
== (fragP
->fr_next
->fr_address
10640 - fragP
->fr_address
- fragP
->fr_fix
));
10643 /* No conversion. */
10647 assemble_nop (size
, loc
);
10648 fragP
->tc_frag_data
.is_insn
= TRUE
;
10649 fragP
->fr_var
-= size
;
10650 fragP
->fr_fix
+= size
;
10655 static fixS
*fix_new_exp_in_seg
10656 (segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
10657 bfd_reloc_code_real_type
);
10660 convert_frag_immed (segT segP
,
10666 char *immed_instr
= fragP
->fr_opcode
;
10668 bfd_boolean expanded
= FALSE
;
10669 bfd_boolean branch_jmp_to_next
= FALSE
;
10670 char *fr_opcode
= fragP
->fr_opcode
;
10671 xtensa_isa isa
= xtensa_default_isa
;
10672 bfd_boolean from_wide_insn
= FALSE
;
10674 bfd_boolean is_loop
;
10676 gas_assert (fr_opcode
!= NULL
);
10678 xg_clear_vinsn (&cur_vinsn
);
10680 vinsn_from_chars (&cur_vinsn
, fr_opcode
);
10681 if (cur_vinsn
.num_slots
> 1)
10682 from_wide_insn
= TRUE
;
10684 orig_tinsn
= cur_vinsn
.slots
[slot
];
10685 tinsn_immed_from_frag (&orig_tinsn
, fragP
, slot
);
10687 is_loop
= xtensa_opcode_is_loop (xtensa_default_isa
, orig_tinsn
.opcode
) == 1;
10689 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10690 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_tinsn
, fragP
);
10692 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
10694 /* Conversion just inserts a NOP and marks the fix as completed. */
10695 bytes
= xtensa_format_length (isa
, fmt
);
10698 cur_vinsn
.slots
[slot
].opcode
=
10699 xtensa_format_slot_nop_opcode (isa
, cur_vinsn
.format
, slot
);
10700 cur_vinsn
.slots
[slot
].ntok
= 0;
10704 bytes
+= fragP
->tc_frag_data
.text_expansion
[0];
10705 gas_assert (bytes
== 2 || bytes
== 3);
10706 build_nop (&cur_vinsn
.slots
[0], bytes
);
10707 fragP
->fr_fix
+= fragP
->tc_frag_data
.text_expansion
[0];
10709 vinsn_to_insnbuf (&cur_vinsn
, fr_opcode
, frag_now
, TRUE
);
10710 xtensa_insnbuf_to_chars
10711 (isa
, cur_vinsn
.insnbuf
, (unsigned char *) fr_opcode
, 0);
10716 /* Here is the fun stuff: Get the immediate field from this
10717 instruction. If it fits, we're done. If not, find the next
10718 instruction sequence that fits. */
10722 symbolS
*lit_sym
= NULL
;
10723 int total_size
= 0;
10724 int target_offset
= 0;
10727 symbolS
*gen_label
= NULL
;
10728 offsetT frag_offset
;
10729 bfd_boolean first
= TRUE
;
10731 /* It does not fit. Find something that does and
10732 convert immediately. */
10733 frag_offset
= fr_opcode
- fragP
->fr_literal
;
10734 istack_init (&istack
);
10735 xg_assembly_relax (&istack
, &orig_tinsn
,
10736 segP
, fragP
, frag_offset
, min_steps
, 0);
10738 old_size
= xtensa_format_length (isa
, fmt
);
10740 /* Assemble this right inline. */
10742 /* First, create the mapping from a label name to the REAL label. */
10744 for (i
= 0; i
< istack
.ninsn
; i
++)
10746 TInsn
*tinsn
= &istack
.insn
[i
];
10749 switch (tinsn
->insn_type
)
10751 case ITYPE_LITERAL
:
10752 if (lit_sym
!= NULL
)
10753 as_bad (_("multiple literals in expansion"));
10754 /* First find the appropriate space in the literal pool. */
10755 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10756 if (lit_frag
== NULL
)
10757 as_bad (_("no registered fragment for literal"));
10758 if (tinsn
->ntok
!= 1)
10759 as_bad (_("number of literal tokens != 1"));
10761 /* Set the literal symbol and add a fixup. */
10762 lit_sym
= lit_frag
->fr_symbol
;
10766 if (align_targets
&& !is_loop
)
10768 fragS
*unreach
= fragP
->fr_next
;
10769 while (!(unreach
->fr_type
== rs_machine_dependent
10770 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10771 || unreach
->fr_subtype
== RELAX_UNREACHABLE
)))
10773 unreach
= unreach
->fr_next
;
10776 gas_assert (unreach
->fr_type
== rs_machine_dependent
10777 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10778 || unreach
->fr_subtype
== RELAX_UNREACHABLE
));
10780 target_offset
+= unreach
->tc_frag_data
.text_expansion
[0];
10782 gas_assert (gen_label
== NULL
);
10783 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
10784 fr_opcode
- fragP
->fr_literal
10785 + target_offset
, fragP
);
10789 if (first
&& from_wide_insn
)
10791 target_offset
+= xtensa_format_length (isa
, fmt
);
10793 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10794 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10797 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10804 for (i
= 0; i
< istack
.ninsn
; i
++)
10806 TInsn
*tinsn
= &istack
.insn
[i
];
10810 bfd_reloc_code_real_type reloc_type
;
10812 switch (tinsn
->insn_type
)
10814 case ITYPE_LITERAL
:
10815 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10816 /* Already checked. */
10817 gas_assert (lit_frag
!= NULL
);
10818 gas_assert (lit_sym
!= NULL
);
10819 gas_assert (tinsn
->ntok
== 1);
10821 target_seg
= S_GET_SEGMENT (lit_sym
);
10822 gas_assert (target_seg
);
10823 reloc_type
= map_operator_to_reloc (tinsn
->tok
[0].X_op
, TRUE
);
10824 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
10825 &tinsn
->tok
[0], FALSE
, reloc_type
);
10832 xg_resolve_labels (tinsn
, gen_label
);
10833 xg_resolve_literals (tinsn
, lit_sym
);
10834 if (from_wide_insn
&& first
)
10837 if (opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10839 cur_vinsn
.slots
[slot
] = *tinsn
;
10843 cur_vinsn
.slots
[slot
].opcode
=
10844 xtensa_format_slot_nop_opcode (isa
, fmt
, slot
);
10845 cur_vinsn
.slots
[slot
].ntok
= 0;
10847 vinsn_to_insnbuf (&cur_vinsn
, immed_instr
, fragP
, TRUE
);
10848 xtensa_insnbuf_to_chars (isa
, cur_vinsn
.insnbuf
,
10849 (unsigned char *) immed_instr
, 0);
10850 fragP
->tc_frag_data
.is_insn
= TRUE
;
10851 size
= xtensa_format_length (isa
, fmt
);
10852 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10854 xg_emit_insn_to_buf
10855 (tinsn
, immed_instr
+ size
, fragP
,
10856 immed_instr
- fragP
->fr_literal
+ size
, TRUE
);
10857 size
+= xg_get_single_size (tinsn
->opcode
);
10862 size
= xg_get_single_size (tinsn
->opcode
);
10863 xg_emit_insn_to_buf (tinsn
, immed_instr
, fragP
,
10864 immed_instr
- fragP
->fr_literal
, TRUE
);
10866 immed_instr
+= size
;
10867 total_size
+= size
;
10872 diff
= total_size
- old_size
;
10873 gas_assert (diff
>= 0);
10876 gas_assert (diff
<= fragP
->fr_var
);
10877 fragP
->fr_var
-= diff
;
10878 fragP
->fr_fix
+= diff
;
10881 /* Check for undefined immediates in LOOP instructions. */
10885 sym
= orig_tinsn
.tok
[1].X_add_symbol
;
10886 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10888 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10891 sym
= orig_tinsn
.tok
[1].X_op_symbol
;
10892 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10894 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10899 if (expanded
&& is_direct_call_opcode (orig_tinsn
.opcode
))
10901 /* Add an expansion note on the expanded instruction. */
10902 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
10903 &orig_tinsn
.tok
[0], TRUE
,
10904 BFD_RELOC_XTENSA_ASM_EXPAND
);
10909 /* Add a new fix expression into the desired segment. We have to
10910 switch to that segment to do this. */
10913 fix_new_exp_in_seg (segT new_seg
,
10914 subsegT new_subseg
,
10920 bfd_reloc_code_real_type r_type
)
10923 segT seg
= now_seg
;
10924 subsegT subseg
= now_subseg
;
10926 gas_assert (new_seg
!= 0);
10927 subseg_set (new_seg
, new_subseg
);
10929 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
10930 subseg_set (seg
, subseg
);
10936 /* A map that keeps information on a per-subsegment basis. This is
10937 maintained during initial assembly, but is invalid once the
10938 subsegments are smashed together. I.E., it cannot be used during
10941 typedef struct subseg_map_struct
10949 float total_freq
; /* fall-through + branch target frequency */
10950 float target_freq
; /* branch target frequency alone */
10952 struct subseg_map_struct
*next
;
10956 static subseg_map
*sseg_map
= NULL
;
10958 static subseg_map
*
10959 get_subseg_info (segT seg
, subsegT subseg
)
10961 subseg_map
*subseg_e
;
10963 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
10965 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
10972 static subseg_map
*
10973 add_subseg_info (segT seg
, subsegT subseg
)
10975 subseg_map
*subseg_e
= XNEW (subseg_map
);
10976 memset (subseg_e
, 0, sizeof (subseg_map
));
10977 subseg_e
->seg
= seg
;
10978 subseg_e
->subseg
= subseg
;
10979 subseg_e
->flags
= 0;
10980 /* Start off considering every branch target very important. */
10981 subseg_e
->target_freq
= 1.0;
10982 subseg_e
->total_freq
= 1.0;
10983 subseg_e
->next
= sseg_map
;
10984 sseg_map
= subseg_e
;
10990 get_last_insn_flags (segT seg
, subsegT subseg
)
10992 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
10994 return subseg_e
->flags
;
11000 set_last_insn_flags (segT seg
,
11005 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11007 subseg_e
= add_subseg_info (seg
, subseg
);
11009 subseg_e
->flags
|= fl
;
11011 subseg_e
->flags
&= ~fl
;
11016 get_subseg_total_freq (segT seg
, subsegT subseg
)
11018 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11020 return subseg_e
->total_freq
;
11026 get_subseg_target_freq (segT seg
, subsegT subseg
)
11028 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11030 return subseg_e
->target_freq
;
11036 set_subseg_freq (segT seg
, subsegT subseg
, float total_f
, float target_f
)
11038 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11040 subseg_e
= add_subseg_info (seg
, subseg
);
11041 subseg_e
->total_freq
= total_f
;
11042 subseg_e
->target_freq
= target_f
;
11046 /* Segment Lists and emit_state Stuff. */
11049 xtensa_move_seg_list_to_beginning (seg_list
*head
)
11054 segT literal_section
= head
->seg
;
11056 /* Move the literal section to the front of the section list. */
11057 gas_assert (literal_section
);
11058 if (literal_section
!= stdoutput
->sections
)
11060 bfd_section_list_remove (stdoutput
, literal_section
);
11061 bfd_section_list_prepend (stdoutput
, literal_section
);
11068 static void mark_literal_frags (seg_list
*);
11071 xg_promote_candidate_litpool (struct litpool_seg
*lps
,
11072 struct litpool_frag
*lp
)
11077 char label
[10 + 2 * sizeof (fragS
*)];
11079 poolbeg
= lp
->fragP
;
11081 poolbeg
->fr_subtype
= RELAX_LITERAL_POOL_BEGIN
;
11082 poolend
= poolbeg
->fr_next
;
11083 gas_assert (poolend
->fr_type
== rs_machine_dependent
&&
11084 poolend
->fr_subtype
== RELAX_LITERAL_POOL_END
);
11085 /* Create a local symbol pointing to the
11086 end of the pool. */
11087 sprintf (label
, ".L0_LT_%p", poolbeg
);
11088 lsym
= (symbolS
*)local_symbol_make (label
, lps
->seg
,
11090 poolbeg
->fr_symbol
= lsym
;
11091 /* Rest is done in xtensa_relax_frag. */
11094 static struct litpool_frag
*xg_find_litpool (struct litpool_seg
*lps
,
11095 struct litpool_frag
*lpf
,
11098 struct litpool_frag
*lp
= lpf
->prev
;
11100 gas_assert (lp
->fragP
);
11102 while (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11105 if (lp
->fragP
== NULL
)
11107 /* End of list; have to bite the bullet.
11108 Take the nearest. */
11112 /* Does it (conservatively) reach? */
11113 if (addr
- lp
->addr
<= 128 * 1024)
11115 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
11116 lp
->literal_count
< MAX_POOL_LITERALS
)
11118 /* Found a good one. */
11121 else if (lp
->prev
->fragP
&&
11122 addr
- lp
->prev
->addr
> 128 * 1024 &&
11123 lp
->prev
->literal_count
< MAX_POOL_LITERALS
)
11125 /* This is still a "candidate" but the next one
11126 will be too far away, so revert to the nearest
11127 one, convert it and add the jump around. */
11134 if (lp
->literal_count
>= MAX_POOL_LITERALS
)
11137 while (lp
&& lp
->fragP
&& lp
->literal_count
>= MAX_POOL_LITERALS
)
11144 gas_assert (lp
&& lp
->fragP
&& lp
->literal_count
< MAX_POOL_LITERALS
);
11145 ++lp
->literal_count
;
11147 /* Convert candidate and add the jump around. */
11148 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11149 xg_promote_candidate_litpool (lps
, lp
);
11154 static bfd_boolean
xtensa_is_init_fini (segT seg
)
11158 return strcmp (segment_name (seg
), INIT_SECTION_NAME
) == 0
11159 || strcmp (segment_name (seg
), FINI_SECTION_NAME
) == 0;
11163 xtensa_assign_litpool_addresses (void)
11165 struct litpool_seg
*lps
;
11167 for (lps
= litpool_seg_list
.next
; lps
; lps
= lps
->next
)
11169 frchainS
*frchP
= seg_info (lps
->seg
)->frchainP
;
11170 struct litpool_frag
*lpf
= lps
->frag_list
.next
;
11173 if (xtensa_is_init_fini (lps
->seg
))
11176 for ( ; frchP
; frchP
= frchP
->frch_next
)
11179 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11181 if (lpf
&& fragP
== lpf
->fragP
)
11183 gas_assert(fragP
->fr_type
== rs_machine_dependent
&&
11184 (fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
||
11185 fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
));
11186 /* Found a litpool location. */
11190 if (fragP
->fr_type
== rs_machine_dependent
&&
11191 fragP
->fr_subtype
== RELAX_SLOTS
)
11194 for (slot
= 0; slot
< MAX_SLOTS
; slot
++)
11196 fragS
*litfrag
= fragP
->tc_frag_data
.literal_frags
[slot
];
11199 && litfrag
->tc_frag_data
.is_literal
11200 && !litfrag
->tc_frag_data
.literal_frag
)
11202 /* L32R referring .literal or generated as a result
11203 of relaxation. Point its literal to the nearest
11204 litpool preferring non-"candidate" positions to
11205 avoid the jump-around. */
11207 struct litpool_frag
*lp
;
11209 lp
= xg_find_litpool (lps
, lpf
, addr
);
11210 /* Take earliest use of this literal to avoid
11212 litfrag
->tc_frag_data
.literal_frag
= lp
->fragP
;
11216 addr
+= fragP
->fr_fix
;
11217 if (fragP
->fr_type
== rs_fill
)
11218 addr
+= fragP
->fr_offset
;
11225 xtensa_move_literals (void)
11228 frchainS
*frchain_from
, *frchain_to
;
11229 fragS
*search_frag
, *next_frag
, *literal_pool
, *insert_after
;
11230 fragS
**frag_splice
;
11233 fixS
*fix
, *next_fix
, **fix_splice
;
11235 const char *init_name
= INIT_SECTION_NAME
;
11236 const char *fini_name
= FINI_SECTION_NAME
;
11237 int init_name_len
= strlen(init_name
);
11238 int fini_name_len
= strlen(fini_name
);
11240 mark_literal_frags (literal_head
->next
);
11242 if (use_literal_section
)
11245 /* Assign addresses (rough estimates) to the potential literal pool locations
11246 and create new ones if the gaps are too large. */
11248 xtensa_assign_litpool_addresses ();
11250 /* Walk through the literal segments. */
11251 for (segment
= literal_head
->next
; segment
; segment
= segment
->next
)
11253 const char *seg_name
= segment_name (segment
->seg
);
11255 /* Keep the literals for .init and .fini in separate sections. */
11256 if ((!memcmp (seg_name
, init_name
, init_name_len
) &&
11257 !strcmp (seg_name
+ init_name_len
, ".literal")) ||
11258 (!memcmp (seg_name
, fini_name
, fini_name_len
) &&
11259 !strcmp (seg_name
+ fini_name_len
, ".literal")))
11262 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11263 search_frag
= frchain_from
->frch_root
;
11264 literal_pool
= NULL
;
11266 frag_splice
= &(frchain_from
->frch_root
);
11268 while (search_frag
&& !search_frag
->tc_frag_data
.literal_frag
)
11270 gas_assert (search_frag
->fr_fix
== 0
11271 || search_frag
->fr_type
== rs_align
);
11272 search_frag
= search_frag
->fr_next
;
11278 gas_assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
11279 == RELAX_LITERAL_POOL_BEGIN
);
11280 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
11282 /* Make sure that all the frags in this series are closed, and
11283 that there is at least one left over of zero-size. This
11284 prevents us from making a segment with an frchain without any
11286 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11287 xtensa_set_frag_assembly_state (frag_now
);
11288 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11289 xtensa_set_frag_assembly_state (frag_now
);
11291 while (search_frag
!= frag_now
)
11293 next_frag
= search_frag
->fr_next
;
11294 if (search_frag
->tc_frag_data
.literal_frag
)
11296 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
11297 gas_assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
11298 frchain_to
= literal_pool
->tc_frag_data
.lit_frchain
;
11299 gas_assert (frchain_to
);
11302 if (search_frag
->fr_type
== rs_fill
&& search_frag
->fr_fix
== 0)
11304 /* Skip empty fill frags. */
11305 *frag_splice
= next_frag
;
11306 search_frag
= next_frag
;
11310 if (search_frag
->fr_type
== rs_align
)
11312 /* Skip alignment frags, because the pool as a whole will be
11313 aligned if used, and we don't want to force alignment if the
11315 *frag_splice
= next_frag
;
11316 search_frag
= next_frag
;
11320 /* First, move the frag out of the literal section and
11321 to the appropriate place. */
11323 /* Insert an alignment frag at start of pool. */
11324 if (literal_pool
->fr_next
->fr_type
== rs_machine_dependent
&&
11325 literal_pool
->fr_next
->fr_subtype
== RELAX_LITERAL_POOL_END
)
11327 segT pool_seg
= literal_pool
->fr_next
->tc_frag_data
.lit_seg
;
11328 emit_state prev_state
;
11331 xtensa_switch_section_emit_state (&prev_state
, pool_seg
, 0);
11332 prev_frag
= frag_now
;
11333 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11334 align_frag
= frag_now
;
11335 frag_align (2, 0, 0);
11336 /* Splice it into the right place. */
11337 prev_frag
->fr_next
= align_frag
->fr_next
;
11338 align_frag
->fr_next
= literal_pool
->fr_next
;
11339 literal_pool
->fr_next
= align_frag
;
11340 /* Insert after this one. */
11341 literal_pool
->tc_frag_data
.literal_frag
= align_frag
;
11342 xtensa_restore_emit_state (&prev_state
);
11344 insert_after
= literal_pool
->tc_frag_data
.literal_frag
;
11345 dest_seg
= insert_after
->fr_next
->tc_frag_data
.lit_seg
;
11346 /* Skip align frag. */
11347 if (insert_after
->fr_next
->fr_type
== rs_align
)
11349 insert_after
= insert_after
->fr_next
;
11352 *frag_splice
= next_frag
;
11353 search_frag
->fr_next
= insert_after
->fr_next
;
11354 insert_after
->fr_next
= search_frag
;
11355 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
11356 literal_pool
->tc_frag_data
.literal_frag
= search_frag
;
11358 /* Now move any fixups associated with this frag to the
11360 fix
= frchain_from
->fix_root
;
11361 fix_splice
= &(frchain_from
->fix_root
);
11364 next_fix
= fix
->fx_next
;
11365 if (fix
->fx_frag
== search_frag
)
11367 *fix_splice
= next_fix
;
11368 fix
->fx_next
= frchain_to
->fix_root
;
11369 frchain_to
->fix_root
= fix
;
11370 if (frchain_to
->fix_tail
== NULL
)
11371 frchain_to
->fix_tail
= fix
;
11374 fix_splice
= &(fix
->fx_next
);
11377 search_frag
= next_frag
;
11380 if (frchain_from
->fix_root
!= NULL
)
11382 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11383 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
11385 gas_assert (frchain_from
->fix_root
== NULL
);
11387 frchain_from
->fix_tail
= NULL
;
11388 xtensa_restore_emit_state (&state
);
11391 /* Now fix up the SEGMENT value for all the literal symbols. */
11392 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
11394 symbolS
*lit_sym
= lit
->sym
;
11395 segT dseg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
11397 S_SET_SEGMENT (lit_sym
, dseg
);
11402 /* Walk over all the frags for segments in a list and mark them as
11403 containing literals. As clunky as this is, we can't rely on frag_var
11404 and frag_variant to get called in all situations. */
11407 mark_literal_frags (seg_list
*segment
)
11409 frchainS
*frchain_from
;
11410 fragS
*search_frag
;
11414 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11415 search_frag
= frchain_from
->frch_root
;
11416 while (search_frag
)
11418 search_frag
->tc_frag_data
.is_literal
= TRUE
;
11419 search_frag
= search_frag
->fr_next
;
11421 segment
= segment
->next
;
11427 xtensa_reorder_seg_list (seg_list
*head
, segT after
)
11429 /* Move all of the sections in the section list to come
11430 after "after" in the gnu segment list. */
11435 segT literal_section
= head
->seg
;
11437 /* Move the literal section after "after". */
11438 gas_assert (literal_section
);
11439 if (literal_section
!= after
)
11441 bfd_section_list_remove (stdoutput
, literal_section
);
11442 bfd_section_list_insert_after (stdoutput
, after
, literal_section
);
11450 /* Push all the literal segments to the end of the gnu list. */
11453 xtensa_reorder_segments (void)
11460 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11466 /* Now that we have the last section, push all the literal
11467 sections to the end. */
11468 xtensa_reorder_seg_list (literal_head
, last_sec
);
11470 /* Now perform the final error check. */
11471 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11473 gas_assert (new_count
== old_count
);
11477 /* Change the emit state (seg, subseg, and frag related stuff) to the
11478 correct location. Return a emit_state which can be passed to
11479 xtensa_restore_emit_state to return to current fragment. */
11482 xtensa_switch_to_literal_fragment (emit_state
*result
)
11484 if (directive_state
[directive_absolute_literals
])
11486 segT lit4_seg
= cache_literal_section (TRUE
);
11487 xtensa_switch_section_emit_state (result
, lit4_seg
, 0);
11490 xtensa_switch_to_non_abs_literal_fragment (result
);
11492 /* Do a 4-byte align here. */
11493 frag_align (2, 0, 0);
11494 record_alignment (now_seg
, 2);
11499 xtensa_switch_to_non_abs_literal_fragment (emit_state
*result
)
11501 fragS
*pool_location
= get_literal_pool_location (now_seg
);
11503 bfd_boolean is_init_fini
= xtensa_is_init_fini (now_seg
);
11505 if (pool_location
== NULL
11506 && !use_literal_section
11509 if (!auto_litpools
)
11511 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11513 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
11514 pool_location
= get_literal_pool_location (now_seg
);
11517 lit_seg
= cache_literal_section (FALSE
);
11518 xtensa_switch_section_emit_state (result
, lit_seg
, 0);
11520 if (!use_literal_section
11522 && get_literal_pool_location (now_seg
) != pool_location
)
11524 /* Close whatever frag is there. */
11525 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11526 xtensa_set_frag_assembly_state (frag_now
);
11527 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
11528 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11529 xtensa_set_frag_assembly_state (frag_now
);
11534 /* Call this function before emitting data into the literal section.
11535 This is a helper function for xtensa_switch_to_literal_fragment.
11536 This is similar to a .section new_now_seg subseg. */
11539 xtensa_switch_section_emit_state (emit_state
*state
,
11541 subsegT new_now_subseg
)
11543 state
->name
= now_seg
->name
;
11544 state
->now_seg
= now_seg
;
11545 state
->now_subseg
= now_subseg
;
11546 state
->generating_literals
= generating_literals
;
11547 generating_literals
++;
11548 subseg_set (new_now_seg
, new_now_subseg
);
11552 /* Use to restore the emitting into the normal place. */
11555 xtensa_restore_emit_state (emit_state
*state
)
11557 generating_literals
= state
->generating_literals
;
11558 subseg_set (state
->now_seg
, state
->now_subseg
);
11562 /* Predicate function used to look up a section in a particular group. */
11565 match_section_group (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, void *inf
)
11567 const char *gname
= inf
;
11568 const char *group_name
= elf_group_name (sec
);
11570 return (group_name
== gname
11571 || (group_name
!= NULL
11573 && strcmp (group_name
, gname
) == 0));
11577 /* Get the literal section to be used for the current text section.
11578 The result may be cached in the default_lit_sections structure. */
11581 cache_literal_section (bfd_boolean use_abs_literals
)
11583 const char *text_name
, *group_name
= 0;
11584 const char *base_name
, *suffix
;
11587 segT seg
, current_section
;
11588 int current_subsec
;
11589 bfd_boolean linkonce
= FALSE
;
11591 /* Save the current section/subsection. */
11592 current_section
= now_seg
;
11593 current_subsec
= now_subseg
;
11595 /* Clear the cached values if they are no longer valid. */
11596 if (now_seg
!= default_lit_sections
.current_text_seg
)
11598 default_lit_sections
.current_text_seg
= now_seg
;
11599 default_lit_sections
.lit_seg
= NULL
;
11600 default_lit_sections
.lit4_seg
= NULL
;
11603 /* Check if the literal section is already cached. */
11604 if (use_abs_literals
)
11605 pcached
= &default_lit_sections
.lit4_seg
;
11607 pcached
= &default_lit_sections
.lit_seg
;
11612 text_name
= default_lit_sections
.lit_prefix
;
11613 if (! text_name
|| ! *text_name
)
11615 text_name
= segment_name (current_section
);
11616 group_name
= elf_group_name (current_section
);
11617 linkonce
= (current_section
->flags
& SEC_LINK_ONCE
) != 0;
11620 base_name
= use_abs_literals
? ".lit4" : ".literal";
11623 name
= concat (base_name
, ".", group_name
, (char *) NULL
);
11625 else if (strncmp (text_name
, ".gnu.linkonce.", linkonce_len
) == 0)
11627 suffix
= strchr (text_name
+ linkonce_len
, '.');
11629 name
= concat (".gnu.linkonce", base_name
, suffix
? suffix
: "",
11635 /* If the section name begins or ends with ".text", then replace
11636 that portion instead of appending an additional suffix. */
11637 size_t len
= strlen (text_name
);
11639 && (strcmp (text_name
+ len
- 5, ".text") == 0
11640 || strncmp (text_name
, ".text", 5) == 0))
11643 name
= XNEWVEC (char, len
+ strlen (base_name
) + 1);
11644 if (strncmp (text_name
, ".text", 5) == 0)
11646 strcpy (name
, base_name
);
11647 strcat (name
, text_name
+ 5);
11651 strcpy (name
, text_name
);
11652 strcpy (name
+ len
, base_name
);
11656 /* Canonicalize section names to allow renaming literal sections.
11657 The group name, if any, came from the current text section and
11658 has already been canonicalized. */
11659 name
= tc_canonicalize_symbol_name (name
);
11661 seg
= bfd_get_section_by_name_if (stdoutput
, name
, match_section_group
,
11662 (void *) group_name
);
11667 seg
= subseg_force_new (name
, 0);
11669 if (! use_abs_literals
)
11671 /* Add the newly created literal segment to the list. */
11672 seg_list
*n
= XNEW (seg_list
);
11674 n
->next
= literal_head
->next
;
11675 literal_head
->next
= n
;
11678 flags
= (SEC_HAS_CONTENTS
| SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
11679 | (linkonce
? (SEC_LINK_ONCE
| SEC_LINK_DUPLICATES_DISCARD
) : 0)
11680 | (use_abs_literals
? SEC_DATA
: SEC_CODE
));
11682 elf_group_name (seg
) = group_name
;
11684 bfd_set_section_flags (stdoutput
, seg
, flags
);
11685 bfd_set_section_alignment (stdoutput
, seg
, 2);
11689 subseg_set (current_section
, current_subsec
);
11694 /* Property Tables Stuff. */
11696 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11697 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11698 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11700 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
11701 typedef void (*frag_flags_fn
) (const fragS
*, frag_flags
*);
11703 static bfd_boolean
get_frag_is_literal (const fragS
*);
11704 static void xtensa_create_property_segments
11705 (frag_predicate
, frag_predicate
, const char *, xt_section_type
);
11706 static void xtensa_create_xproperty_segments
11707 (frag_flags_fn
, const char *, xt_section_type
);
11708 static bfd_boolean
exclude_section_from_property_tables (segT
);
11709 static bfd_boolean
section_has_property (segT
, frag_predicate
);
11710 static bfd_boolean
section_has_xproperty (segT
, frag_flags_fn
);
11711 static void add_xt_block_frags
11712 (segT
, xtensa_block_info
**, frag_predicate
, frag_predicate
);
11713 static bfd_boolean
xtensa_frag_flags_is_empty (const frag_flags
*);
11714 static void xtensa_frag_flags_init (frag_flags
*);
11715 static void get_frag_property_flags (const fragS
*, frag_flags
*);
11716 static flagword
frag_flags_to_number (const frag_flags
*);
11717 static void add_xt_prop_frags (segT
, xtensa_block_info
**, frag_flags_fn
);
11719 /* Set up property tables after relaxation. */
11722 xtensa_post_relax_hook (void)
11724 xtensa_move_seg_list_to_beginning (literal_head
);
11726 xtensa_find_unmarked_state_frags ();
11727 xtensa_mark_frags_for_org ();
11728 xtensa_mark_difference_of_two_symbols ();
11730 xtensa_create_property_segments (get_frag_is_literal
,
11732 XTENSA_LIT_SEC_NAME
,
11734 xtensa_create_xproperty_segments (get_frag_property_flags
,
11735 XTENSA_PROP_SEC_NAME
,
11738 if (warn_unaligned_branch_targets
)
11739 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_branch_targets
, 0);
11740 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_loops
, 0);
11744 /* This function is only meaningful after xtensa_move_literals. */
11747 get_frag_is_literal (const fragS
*fragP
)
11749 gas_assert (fragP
!= NULL
);
11750 return fragP
->tc_frag_data
.is_literal
;
11755 xtensa_create_property_segments (frag_predicate property_function
,
11756 frag_predicate end_property_function
,
11757 const char *section_name_base
,
11758 xt_section_type sec_type
)
11762 /* Walk over all of the current segments.
11763 Walk over each fragment
11764 For each non-empty fragment,
11765 Build a property record (append where possible). */
11767 for (seclist
= &stdoutput
->sections
;
11768 seclist
&& *seclist
;
11769 seclist
= &(*seclist
)->next
)
11771 segT sec
= *seclist
;
11773 if (exclude_section_from_property_tables (sec
))
11776 if (section_has_property (sec
, property_function
))
11778 segment_info_type
*xt_seg_info
;
11779 xtensa_block_info
**xt_blocks
;
11780 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11782 prop_sec
->output_section
= prop_sec
;
11783 subseg_set (prop_sec
, 0);
11784 xt_seg_info
= seg_info (prop_sec
);
11785 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11787 /* Walk over all of the frchains here and add new sections. */
11788 add_xt_block_frags (sec
, xt_blocks
, property_function
,
11789 end_property_function
);
11793 /* Now we fill them out.... */
11795 for (seclist
= &stdoutput
->sections
;
11796 seclist
&& *seclist
;
11797 seclist
= &(*seclist
)->next
)
11799 segment_info_type
*seginfo
;
11800 xtensa_block_info
*block
;
11801 segT sec
= *seclist
;
11803 seginfo
= seg_info (sec
);
11804 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11808 xtensa_block_info
*cur_block
;
11810 bfd_size_type rec_size
;
11812 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11815 rec_size
= num_recs
* 8;
11816 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11823 subseg_set (sec
, 0);
11824 frag_data
= frag_more (rec_size
);
11826 for (i
= 0; i
< num_recs
; i
++)
11830 /* Write the fixup. */
11831 gas_assert (cur_block
);
11832 fix
= fix_new (frag_now
, i
* 8, 4,
11833 section_symbol (cur_block
->sec
),
11835 FALSE
, BFD_RELOC_32
);
11836 fix
->fx_file
= "<internal>";
11839 /* Write the length. */
11840 md_number_to_chars (&frag_data
[4 + i
* 8],
11841 cur_block
->size
, 4);
11842 cur_block
= cur_block
->next
;
11844 frag_wane (frag_now
);
11846 frag_wane (frag_now
);
11854 xtensa_create_xproperty_segments (frag_flags_fn flag_fn
,
11855 const char *section_name_base
,
11856 xt_section_type sec_type
)
11860 /* Walk over all of the current segments.
11861 Walk over each fragment.
11862 For each fragment that has instructions,
11863 build an instruction record (append where possible). */
11865 for (seclist
= &stdoutput
->sections
;
11866 seclist
&& *seclist
;
11867 seclist
= &(*seclist
)->next
)
11869 segT sec
= *seclist
;
11871 if (exclude_section_from_property_tables (sec
))
11874 if (section_has_xproperty (sec
, flag_fn
))
11876 segment_info_type
*xt_seg_info
;
11877 xtensa_block_info
**xt_blocks
;
11878 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11880 prop_sec
->output_section
= prop_sec
;
11881 subseg_set (prop_sec
, 0);
11882 xt_seg_info
= seg_info (prop_sec
);
11883 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11885 /* Walk over all of the frchains here and add new sections. */
11886 add_xt_prop_frags (sec
, xt_blocks
, flag_fn
);
11890 /* Now we fill them out.... */
11892 for (seclist
= &stdoutput
->sections
;
11893 seclist
&& *seclist
;
11894 seclist
= &(*seclist
)->next
)
11896 segment_info_type
*seginfo
;
11897 xtensa_block_info
*block
;
11898 segT sec
= *seclist
;
11900 seginfo
= seg_info (sec
);
11901 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11905 xtensa_block_info
*cur_block
;
11907 bfd_size_type rec_size
;
11909 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11912 rec_size
= num_recs
* (8 + 4);
11913 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11914 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
11921 subseg_set (sec
, 0);
11922 frag_data
= frag_more (rec_size
);
11924 for (i
= 0; i
< num_recs
; i
++)
11928 /* Write the fixup. */
11929 gas_assert (cur_block
);
11930 fix
= fix_new (frag_now
, i
* 12, 4,
11931 section_symbol (cur_block
->sec
),
11933 FALSE
, BFD_RELOC_32
);
11934 fix
->fx_file
= "<internal>";
11937 /* Write the length. */
11938 md_number_to_chars (&frag_data
[4 + i
* 12],
11939 cur_block
->size
, 4);
11940 md_number_to_chars (&frag_data
[8 + i
* 12],
11941 frag_flags_to_number (&cur_block
->flags
),
11942 sizeof (flagword
));
11943 cur_block
= cur_block
->next
;
11945 frag_wane (frag_now
);
11947 frag_wane (frag_now
);
11955 exclude_section_from_property_tables (segT sec
)
11957 flagword flags
= bfd_get_section_flags (stdoutput
, sec
);
11959 /* Sections that don't contribute to the memory footprint are excluded. */
11960 if ((flags
& SEC_DEBUGGING
)
11961 || !(flags
& SEC_ALLOC
)
11962 || (flags
& SEC_MERGE
))
11965 /* Linker cie and fde optimizations mess up property entries for
11966 eh_frame sections, but there is nothing inside them relevant to
11967 property tables anyway. */
11968 if (strcmp (sec
->name
, ".eh_frame") == 0)
11976 section_has_property (segT sec
, frag_predicate property_function
)
11978 segment_info_type
*seginfo
= seg_info (sec
);
11981 if (seginfo
&& seginfo
->frchainP
)
11983 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11985 if (property_function (fragP
)
11986 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
11995 section_has_xproperty (segT sec
, frag_flags_fn property_function
)
11997 segment_info_type
*seginfo
= seg_info (sec
);
12000 if (seginfo
&& seginfo
->frchainP
)
12002 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
12004 frag_flags prop_flags
;
12005 property_function (fragP
, &prop_flags
);
12006 if (!xtensa_frag_flags_is_empty (&prop_flags
))
12014 /* Two types of block sections exist right now: literal and insns. */
12017 add_xt_block_frags (segT sec
,
12018 xtensa_block_info
**xt_block
,
12019 frag_predicate property_function
,
12020 frag_predicate end_property_function
)
12024 /* Build it if needed. */
12025 while (*xt_block
!= NULL
)
12026 xt_block
= &(*xt_block
)->next
;
12027 /* We are either at NULL at the beginning or at the end. */
12029 /* Walk through the frags. */
12030 if (seg_info (sec
)->frchainP
)
12032 for (fragP
= seg_info (sec
)->frchainP
->frch_root
;
12034 fragP
= fragP
->fr_next
)
12036 if (property_function (fragP
)
12037 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
12039 if (*xt_block
!= NULL
)
12041 if ((*xt_block
)->offset
+ (*xt_block
)->size
12042 == fragP
->fr_address
)
12043 (*xt_block
)->size
+= fragP
->fr_fix
;
12045 xt_block
= &((*xt_block
)->next
);
12047 if (*xt_block
== NULL
)
12049 xtensa_block_info
*new_block
= XNEW (xtensa_block_info
);
12050 new_block
->sec
= sec
;
12051 new_block
->offset
= fragP
->fr_address
;
12052 new_block
->size
= fragP
->fr_fix
;
12053 new_block
->next
= NULL
;
12054 xtensa_frag_flags_init (&new_block
->flags
);
12055 *xt_block
= new_block
;
12057 if (end_property_function
12058 && end_property_function (fragP
))
12060 xt_block
= &((*xt_block
)->next
);
12068 /* Break the encapsulation of add_xt_prop_frags here. */
12071 xtensa_frag_flags_is_empty (const frag_flags
*prop_flags
)
12073 if (prop_flags
->is_literal
12074 || prop_flags
->is_insn
12075 || prop_flags
->is_data
12076 || prop_flags
->is_unreachable
)
12083 xtensa_frag_flags_init (frag_flags
*prop_flags
)
12085 memset (prop_flags
, 0, sizeof (frag_flags
));
12090 get_frag_property_flags (const fragS
*fragP
, frag_flags
*prop_flags
)
12092 xtensa_frag_flags_init (prop_flags
);
12093 if (fragP
->tc_frag_data
.is_literal
)
12094 prop_flags
->is_literal
= TRUE
;
12095 if (fragP
->tc_frag_data
.is_specific_opcode
12096 || fragP
->tc_frag_data
.is_no_transform
)
12098 prop_flags
->is_no_transform
= TRUE
;
12099 if (xtensa_frag_flags_is_empty (prop_flags
))
12100 prop_flags
->is_data
= TRUE
;
12102 if (fragP
->tc_frag_data
.is_unreachable
)
12103 prop_flags
->is_unreachable
= TRUE
;
12104 else if (fragP
->tc_frag_data
.is_insn
)
12106 prop_flags
->is_insn
= TRUE
;
12107 if (fragP
->tc_frag_data
.is_loop_target
)
12108 prop_flags
->insn
.is_loop_target
= TRUE
;
12109 if (fragP
->tc_frag_data
.is_branch_target
)
12110 prop_flags
->insn
.is_branch_target
= TRUE
;
12111 if (fragP
->tc_frag_data
.is_no_density
)
12112 prop_flags
->insn
.is_no_density
= TRUE
;
12113 if (fragP
->tc_frag_data
.use_absolute_literals
)
12114 prop_flags
->insn
.is_abslit
= TRUE
;
12116 if (fragP
->tc_frag_data
.is_align
)
12118 prop_flags
->is_align
= TRUE
;
12119 prop_flags
->alignment
= fragP
->tc_frag_data
.alignment
;
12120 if (xtensa_frag_flags_is_empty (prop_flags
))
12121 prop_flags
->is_data
= TRUE
;
12127 frag_flags_to_number (const frag_flags
*prop_flags
)
12130 if (prop_flags
->is_literal
)
12131 num
|= XTENSA_PROP_LITERAL
;
12132 if (prop_flags
->is_insn
)
12133 num
|= XTENSA_PROP_INSN
;
12134 if (prop_flags
->is_data
)
12135 num
|= XTENSA_PROP_DATA
;
12136 if (prop_flags
->is_unreachable
)
12137 num
|= XTENSA_PROP_UNREACHABLE
;
12138 if (prop_flags
->insn
.is_loop_target
)
12139 num
|= XTENSA_PROP_INSN_LOOP_TARGET
;
12140 if (prop_flags
->insn
.is_branch_target
)
12142 num
|= XTENSA_PROP_INSN_BRANCH_TARGET
;
12143 num
= SET_XTENSA_PROP_BT_ALIGN (num
, prop_flags
->insn
.bt_align_priority
);
12146 if (prop_flags
->insn
.is_no_density
)
12147 num
|= XTENSA_PROP_INSN_NO_DENSITY
;
12148 if (prop_flags
->is_no_transform
)
12149 num
|= XTENSA_PROP_NO_TRANSFORM
;
12150 if (prop_flags
->insn
.is_no_reorder
)
12151 num
|= XTENSA_PROP_INSN_NO_REORDER
;
12152 if (prop_flags
->insn
.is_abslit
)
12153 num
|= XTENSA_PROP_INSN_ABSLIT
;
12155 if (prop_flags
->is_align
)
12157 num
|= XTENSA_PROP_ALIGN
;
12158 num
= SET_XTENSA_PROP_ALIGNMENT (num
, prop_flags
->alignment
);
12166 xtensa_frag_flags_combinable (const frag_flags
*prop_flags_1
,
12167 const frag_flags
*prop_flags_2
)
12169 /* Cannot combine with an end marker. */
12171 if (prop_flags_1
->is_literal
!= prop_flags_2
->is_literal
)
12173 if (prop_flags_1
->is_insn
!= prop_flags_2
->is_insn
)
12175 if (prop_flags_1
->is_data
!= prop_flags_2
->is_data
)
12178 if (prop_flags_1
->is_insn
)
12180 /* Properties of the beginning of the frag. */
12181 if (prop_flags_2
->insn
.is_loop_target
)
12183 if (prop_flags_2
->insn
.is_branch_target
)
12185 if (prop_flags_1
->insn
.is_no_density
!=
12186 prop_flags_2
->insn
.is_no_density
)
12188 if (prop_flags_1
->is_no_transform
!=
12189 prop_flags_2
->is_no_transform
)
12191 if (prop_flags_1
->insn
.is_no_reorder
!=
12192 prop_flags_2
->insn
.is_no_reorder
)
12194 if (prop_flags_1
->insn
.is_abslit
!=
12195 prop_flags_2
->insn
.is_abslit
)
12199 if (prop_flags_1
->is_align
)
12207 xt_block_aligned_size (const xtensa_block_info
*xt_block
)
12210 unsigned align_bits
;
12212 if (!xt_block
->flags
.is_align
)
12213 return xt_block
->size
;
12215 end_addr
= xt_block
->offset
+ xt_block
->size
;
12216 align_bits
= xt_block
->flags
.alignment
;
12217 end_addr
= ((end_addr
+ ((1 << align_bits
) -1)) >> align_bits
) << align_bits
;
12218 return end_addr
- xt_block
->offset
;
12223 xtensa_xt_block_combine (xtensa_block_info
*xt_block
,
12224 const xtensa_block_info
*xt_block_2
)
12226 if (xt_block
->sec
!= xt_block_2
->sec
)
12228 if (xt_block
->offset
+ xt_block_aligned_size (xt_block
)
12229 != xt_block_2
->offset
)
12232 if (xt_block_2
->size
== 0
12233 && (!xt_block_2
->flags
.is_unreachable
12234 || xt_block
->flags
.is_unreachable
))
12236 if (xt_block_2
->flags
.is_align
12237 && xt_block
->flags
.is_align
)
12239 /* Nothing needed. */
12240 if (xt_block
->flags
.alignment
>= xt_block_2
->flags
.alignment
)
12245 if (xt_block_2
->flags
.is_align
)
12247 /* Push alignment to previous entry. */
12248 xt_block
->flags
.is_align
= xt_block_2
->flags
.is_align
;
12249 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12254 if (!xtensa_frag_flags_combinable (&xt_block
->flags
,
12255 &xt_block_2
->flags
))
12258 xt_block
->size
+= xt_block_2
->size
;
12260 if (xt_block_2
->flags
.is_align
)
12262 xt_block
->flags
.is_align
= TRUE
;
12263 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12271 add_xt_prop_frags (segT sec
,
12272 xtensa_block_info
**xt_block
,
12273 frag_flags_fn property_function
)
12277 /* Build it if needed. */
12278 while (*xt_block
!= NULL
)
12280 xt_block
= &(*xt_block
)->next
;
12282 /* We are either at NULL at the beginning or at the end. */
12284 /* Walk through the frags. */
12285 if (seg_info (sec
)->frchainP
)
12287 for (fragP
= seg_info (sec
)->frchainP
->frch_root
; fragP
;
12288 fragP
= fragP
->fr_next
)
12290 xtensa_block_info tmp_block
;
12291 tmp_block
.sec
= sec
;
12292 tmp_block
.offset
= fragP
->fr_address
;
12293 tmp_block
.size
= fragP
->fr_fix
;
12294 tmp_block
.next
= NULL
;
12295 property_function (fragP
, &tmp_block
.flags
);
12297 if (!xtensa_frag_flags_is_empty (&tmp_block
.flags
))
12298 /* && fragP->fr_fix != 0) */
12300 if ((*xt_block
) == NULL
12301 || !xtensa_xt_block_combine (*xt_block
, &tmp_block
))
12303 xtensa_block_info
*new_block
;
12304 if ((*xt_block
) != NULL
)
12305 xt_block
= &(*xt_block
)->next
;
12306 new_block
= XNEW (xtensa_block_info
);
12307 *new_block
= tmp_block
;
12308 *xt_block
= new_block
;
12316 /* op_placement_info_table */
12318 /* op_placement_info makes it easier to determine which
12319 ops can go in which slots. */
12322 init_op_placement_info_table (void)
12324 xtensa_isa isa
= xtensa_default_isa
;
12325 xtensa_insnbuf ibuf
= xtensa_insnbuf_alloc (isa
);
12326 xtensa_opcode opcode
;
12329 int num_opcodes
= xtensa_isa_num_opcodes (isa
);
12331 op_placement_table
= XNEWVEC (op_placement_info
, num_opcodes
);
12332 gas_assert (xtensa_isa_num_formats (isa
) < MAX_FORMATS
);
12334 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
12336 op_placement_info
*opi
= &op_placement_table
[opcode
];
12337 /* FIXME: Make tinsn allocation dynamic. */
12338 if (xtensa_opcode_num_operands (isa
, opcode
) > MAX_INSN_ARGS
)
12339 as_fatal (_("too many operands in instruction"));
12340 opi
->narrowest
= XTENSA_UNDEFINED
;
12341 opi
->narrowest_size
= 0x7F;
12342 opi
->narrowest_slot
= 0;
12344 opi
->num_formats
= 0;
12346 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
12348 opi
->slots
[fmt
] = 0;
12349 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
12351 if (xtensa_opcode_encode (isa
, fmt
, slot
, ibuf
, opcode
) == 0)
12353 int fmt_length
= xtensa_format_length (isa
, fmt
);
12355 set_bit (fmt
, opi
->formats
);
12356 set_bit (slot
, opi
->slots
[fmt
]);
12357 if (fmt_length
< opi
->narrowest_size
12358 || (fmt_length
== opi
->narrowest_size
12359 && (xtensa_format_num_slots (isa
, fmt
)
12360 < xtensa_format_num_slots (isa
,
12363 opi
->narrowest
= fmt
;
12364 opi
->narrowest_size
= fmt_length
;
12365 opi
->narrowest_slot
= slot
;
12370 opi
->num_formats
++;
12373 xtensa_insnbuf_free (isa
, ibuf
);
12378 opcode_fits_format_slot (xtensa_opcode opcode
, xtensa_format fmt
, int slot
)
12380 return bit_is_set (slot
, op_placement_table
[opcode
].slots
[fmt
]);
12384 /* If the opcode is available in a single slot format, return its size. */
12387 xg_get_single_size (xtensa_opcode opcode
)
12389 return op_placement_table
[opcode
].narrowest_size
;
12393 static xtensa_format
12394 xg_get_single_format (xtensa_opcode opcode
)
12396 return op_placement_table
[opcode
].narrowest
;
12401 xg_get_single_slot (xtensa_opcode opcode
)
12403 return op_placement_table
[opcode
].narrowest_slot
;
12407 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12410 istack_init (IStack
*stack
)
12417 istack_empty (IStack
*stack
)
12419 return (stack
->ninsn
== 0);
12424 istack_full (IStack
*stack
)
12426 return (stack
->ninsn
== MAX_ISTACK
);
12430 /* Return a pointer to the top IStack entry.
12431 It is an error to call this if istack_empty () is TRUE. */
12434 istack_top (IStack
*stack
)
12436 int rec
= stack
->ninsn
- 1;
12437 gas_assert (!istack_empty (stack
));
12438 return &stack
->insn
[rec
];
12442 /* Add a new TInsn to an IStack.
12443 It is an error to call this if istack_full () is TRUE. */
12446 istack_push (IStack
*stack
, TInsn
*insn
)
12448 int rec
= stack
->ninsn
;
12449 gas_assert (!istack_full (stack
));
12450 stack
->insn
[rec
] = *insn
;
12455 /* Clear space for the next TInsn on the IStack and return a pointer
12456 to it. It is an error to call this if istack_full () is TRUE. */
12459 istack_push_space (IStack
*stack
)
12461 int rec
= stack
->ninsn
;
12463 gas_assert (!istack_full (stack
));
12464 insn
= &stack
->insn
[rec
];
12471 /* Remove the last pushed instruction. It is an error to call this if
12472 istack_empty () returns TRUE. */
12475 istack_pop (IStack
*stack
)
12477 int rec
= stack
->ninsn
- 1;
12478 gas_assert (!istack_empty (stack
));
12480 tinsn_init (&stack
->insn
[rec
]);
12484 /* TInsn functions. */
12487 tinsn_init (TInsn
*dst
)
12489 memset (dst
, 0, sizeof (TInsn
));
12493 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12496 tinsn_has_symbolic_operands (const TInsn
*insn
)
12499 int n
= insn
->ntok
;
12501 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12503 for (i
= 0; i
< n
; ++i
)
12505 switch (insn
->tok
[i
].X_op
)
12519 tinsn_has_invalid_symbolic_operands (const TInsn
*insn
)
12521 xtensa_isa isa
= xtensa_default_isa
;
12523 int n
= insn
->ntok
;
12525 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12527 for (i
= 0; i
< n
; ++i
)
12529 switch (insn
->tok
[i
].X_op
)
12537 /* Errors for these types are caught later. */
12542 /* Symbolic immediates are only allowed on the last immediate
12543 operand. At this time, CONST16 is the only opcode where we
12544 support non-PC-relative relocations. */
12545 if (i
!= get_relaxable_immed (insn
->opcode
)
12546 || (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) != 1
12547 && insn
->opcode
!= xtensa_const16_opcode
))
12549 as_bad (_("invalid symbolic operand"));
12558 /* For assembly code with complex expressions (e.g. subtraction),
12559 we have to build them in the literal pool so that
12560 their results are calculated correctly after relaxation.
12561 The relaxation only handles expressions that
12562 boil down to SYMBOL + OFFSET. */
12565 tinsn_has_complex_operands (const TInsn
*insn
)
12568 int n
= insn
->ntok
;
12569 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12570 for (i
= 0; i
< n
; ++i
)
12572 switch (insn
->tok
[i
].X_op
)
12588 /* Encode a TInsn opcode and its constant operands into slotbuf.
12589 Return TRUE if there is a symbol in the immediate field. This
12590 function assumes that:
12591 1) The number of operands are correct.
12592 2) The insn_type is ITYPE_INSN.
12593 3) The opcode can be encoded in the specified format and slot.
12594 4) Operands are either O_constant or O_symbol, and all constants fit. */
12597 tinsn_to_slotbuf (xtensa_format fmt
,
12600 xtensa_insnbuf slotbuf
)
12602 xtensa_isa isa
= xtensa_default_isa
;
12603 xtensa_opcode opcode
= tinsn
->opcode
;
12604 bfd_boolean has_fixup
= FALSE
;
12605 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12608 gas_assert (tinsn
->insn_type
== ITYPE_INSN
);
12609 if (noperands
!= tinsn
->ntok
)
12610 as_fatal (_("operand number mismatch"));
12612 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opcode
))
12614 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12615 xtensa_opcode_name (isa
, opcode
), xtensa_format_name (isa
, fmt
));
12619 for (i
= 0; i
< noperands
; i
++)
12621 expressionS
*exp
= &tinsn
->tok
[i
];
12624 const char *file_name
;
12630 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12632 /* The register number has already been checked in
12633 expression_maybe_register, so we don't need to check here. */
12634 opnd_value
= exp
->X_add_number
;
12635 (void) xtensa_operand_encode (isa
, opcode
, i
, &opnd_value
);
12636 rc
= xtensa_operand_set_field (isa
, opcode
, i
, fmt
, slot
, slotbuf
,
12639 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa
));
12643 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12645 file_name
= as_where (&line
);
12646 /* It is a constant and we called this function
12647 then we have to try to fit it. */
12648 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
, i
,
12649 exp
->X_add_number
, file_name
, line
);
12662 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12663 into a multi-slot instruction, fill the other slots with NOPs.
12664 Return TRUE if there is a symbol in the immediate field. See also the
12665 assumptions listed for tinsn_to_slotbuf. */
12668 tinsn_to_insnbuf (TInsn
*tinsn
, xtensa_insnbuf insnbuf
)
12670 static xtensa_insnbuf slotbuf
= 0;
12671 static vliw_insn vinsn
;
12672 xtensa_isa isa
= xtensa_default_isa
;
12673 bfd_boolean has_fixup
= FALSE
;
12678 slotbuf
= xtensa_insnbuf_alloc (isa
);
12679 xg_init_vinsn (&vinsn
);
12682 xg_clear_vinsn (&vinsn
);
12684 bundle_tinsn (tinsn
, &vinsn
);
12686 xtensa_format_encode (isa
, vinsn
.format
, insnbuf
);
12688 for (i
= 0; i
< vinsn
.num_slots
; i
++)
12690 /* Only one slot may have a fix-up because the rest contains NOPs. */
12692 tinsn_to_slotbuf (vinsn
.format
, i
, &vinsn
.slots
[i
], vinsn
.slotbuf
[i
]);
12693 xtensa_format_set_slot (isa
, vinsn
.format
, i
, insnbuf
, vinsn
.slotbuf
[i
]);
12700 /* Check the instruction arguments. Return TRUE on failure. */
12703 tinsn_check_arguments (const TInsn
*insn
)
12705 xtensa_isa isa
= xtensa_default_isa
;
12706 xtensa_opcode opcode
= insn
->opcode
;
12707 xtensa_regfile t1_regfile
, t2_regfile
;
12708 int t1_reg
, t2_reg
;
12709 int t1_base_reg
, t1_last_reg
;
12710 int t2_base_reg
, t2_last_reg
;
12711 char t1_inout
, t2_inout
;
12714 if (opcode
== XTENSA_UNDEFINED
)
12716 as_bad (_("invalid opcode"));
12720 if (xtensa_opcode_num_operands (isa
, opcode
) > insn
->ntok
)
12722 as_bad (_("too few operands"));
12726 if (xtensa_opcode_num_operands (isa
, opcode
) < insn
->ntok
)
12728 as_bad (_("too many operands"));
12732 /* Check registers. */
12733 for (j
= 0; j
< insn
->ntok
; j
++)
12735 if (xtensa_operand_is_register (isa
, insn
->opcode
, j
) != 1)
12738 t2_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, j
);
12739 t2_base_reg
= insn
->tok
[j
].X_add_number
;
12741 = t2_base_reg
+ xtensa_operand_num_regs (isa
, insn
->opcode
, j
);
12743 for (i
= 0; i
< insn
->ntok
; i
++)
12748 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) != 1)
12751 t1_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, i
);
12753 if (t1_regfile
!= t2_regfile
)
12756 t1_inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
12757 t2_inout
= xtensa_operand_inout (isa
, insn
->opcode
, j
);
12759 t1_base_reg
= insn
->tok
[i
].X_add_number
;
12760 t1_last_reg
= (t1_base_reg
12761 + xtensa_operand_num_regs (isa
, insn
->opcode
, i
));
12763 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
12765 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
12767 if (t1_reg
!= t2_reg
)
12770 if (t1_inout
!= 'i' && t2_inout
!= 'i')
12772 as_bad (_("multiple writes to the same register"));
12783 /* Load an instruction from its encoded form. */
12786 tinsn_from_chars (TInsn
*tinsn
, char *f
, int slot
)
12790 xg_init_vinsn (&vinsn
);
12791 vinsn_from_chars (&vinsn
, f
);
12793 *tinsn
= vinsn
.slots
[slot
];
12794 xg_free_vinsn (&vinsn
);
12799 tinsn_from_insnbuf (TInsn
*tinsn
,
12800 xtensa_insnbuf slotbuf
,
12805 xtensa_isa isa
= xtensa_default_isa
;
12807 /* Find the immed. */
12808 tinsn_init (tinsn
);
12809 tinsn
->insn_type
= ITYPE_INSN
;
12810 tinsn
->is_specific_opcode
= FALSE
; /* must not be specific */
12811 tinsn
->opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
12812 tinsn
->ntok
= xtensa_opcode_num_operands (isa
, tinsn
->opcode
);
12813 for (i
= 0; i
< tinsn
->ntok
; i
++)
12815 set_expr_const (&tinsn
->tok
[i
],
12816 xtensa_insnbuf_get_operand (slotbuf
, fmt
, slot
,
12817 tinsn
->opcode
, i
));
12822 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12825 tinsn_immed_from_frag (TInsn
*tinsn
, fragS
*fragP
, int slot
)
12827 xtensa_opcode opcode
= tinsn
->opcode
;
12830 if (fragP
->tc_frag_data
.slot_symbols
[slot
])
12832 opnum
= get_relaxable_immed (opcode
);
12833 gas_assert (opnum
>= 0);
12834 set_expr_symbol_offset (&tinsn
->tok
[opnum
],
12835 fragP
->tc_frag_data
.slot_symbols
[slot
],
12836 fragP
->tc_frag_data
.slot_offsets
[slot
]);
12838 tinsn
->extra_arg
= fragP
->tc_frag_data
.free_reg
[slot
];
12843 get_num_stack_text_bytes (IStack
*istack
)
12846 int text_bytes
= 0;
12848 for (i
= 0; i
< istack
->ninsn
; i
++)
12850 TInsn
*tinsn
= &istack
->insn
[i
];
12851 if (tinsn
->insn_type
== ITYPE_INSN
)
12852 text_bytes
+= xg_get_single_size (tinsn
->opcode
);
12859 get_num_stack_literal_bytes (IStack
*istack
)
12864 for (i
= 0; i
< istack
->ninsn
; i
++)
12866 TInsn
*tinsn
= &istack
->insn
[i
];
12867 if (tinsn
->insn_type
== ITYPE_LITERAL
&& tinsn
->ntok
== 1)
12874 /* vliw_insn functions. */
12877 xg_init_vinsn (vliw_insn
*v
)
12880 xtensa_isa isa
= xtensa_default_isa
;
12882 xg_clear_vinsn (v
);
12884 v
->insnbuf
= xtensa_insnbuf_alloc (isa
);
12885 if (v
->insnbuf
== NULL
)
12886 as_fatal (_("out of memory"));
12888 for (i
= 0; i
< config_max_slots
; i
++)
12890 v
->slotbuf
[i
] = xtensa_insnbuf_alloc (isa
);
12891 if (v
->slotbuf
[i
] == NULL
)
12892 as_fatal (_("out of memory"));
12898 xg_clear_vinsn (vliw_insn
*v
)
12902 memset (v
, 0, offsetof (vliw_insn
, slots
)
12903 + sizeof(TInsn
) * config_max_slots
);
12905 v
->format
= XTENSA_UNDEFINED
;
12907 v
->inside_bundle
= FALSE
;
12909 if (xt_saved_debug_type
!= DEBUG_NONE
)
12910 debug_type
= xt_saved_debug_type
;
12912 for (i
= 0; i
< config_max_slots
; i
++)
12913 v
->slots
[i
].opcode
= XTENSA_UNDEFINED
;
12918 xg_copy_vinsn (vliw_insn
*dst
, vliw_insn
*src
)
12921 offsetof(vliw_insn
, slots
) + src
->num_slots
* sizeof(TInsn
));
12922 dst
->insnbuf
= src
->insnbuf
;
12923 memcpy (dst
->slotbuf
, src
->slotbuf
, src
->num_slots
* sizeof(xtensa_insnbuf
));
12928 vinsn_has_specific_opcodes (vliw_insn
*v
)
12932 for (i
= 0; i
< v
->num_slots
; i
++)
12934 if (v
->slots
[i
].is_specific_opcode
)
12942 xg_free_vinsn (vliw_insn
*v
)
12945 xtensa_insnbuf_free (xtensa_default_isa
, v
->insnbuf
);
12946 for (i
= 0; i
< config_max_slots
; i
++)
12947 xtensa_insnbuf_free (xtensa_default_isa
, v
->slotbuf
[i
]);
12951 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
12952 operands. See also the assumptions listed for tinsn_to_slotbuf. */
12955 vinsn_to_insnbuf (vliw_insn
*vinsn
,
12958 bfd_boolean record_fixup
)
12960 xtensa_isa isa
= xtensa_default_isa
;
12961 xtensa_format fmt
= vinsn
->format
;
12962 xtensa_insnbuf insnbuf
= vinsn
->insnbuf
;
12964 bfd_boolean has_fixup
= FALSE
;
12966 xtensa_format_encode (isa
, fmt
, insnbuf
);
12968 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
12970 TInsn
*tinsn
= &vinsn
->slots
[slot
];
12971 expressionS
*extra_arg
= &tinsn
->extra_arg
;
12972 bfd_boolean tinsn_has_fixup
=
12973 tinsn_to_slotbuf (vinsn
->format
, slot
, tinsn
,
12974 vinsn
->slotbuf
[slot
]);
12976 xtensa_format_set_slot (isa
, fmt
, slot
,
12977 insnbuf
, vinsn
->slotbuf
[slot
]);
12978 if (extra_arg
->X_op
!= O_illegal
&& extra_arg
->X_op
!= O_register
)
12980 if (vinsn
->num_slots
!= 1)
12981 as_bad (_("TLS relocation not allowed in FLIX bundle"));
12982 else if (record_fixup
)
12983 /* Instructions that generate TLS relocations should always be
12984 relaxed in the front-end. If "record_fixup" is set, then this
12985 function is being called during back-end relaxation, so flag
12986 the unexpected behavior as an error. */
12987 as_bad (_("unexpected TLS relocation"));
12989 fix_new (fragP
, frag_offset
- fragP
->fr_literal
,
12990 xtensa_format_length (isa
, fmt
),
12991 extra_arg
->X_add_symbol
, extra_arg
->X_add_number
,
12992 FALSE
, map_operator_to_reloc (extra_arg
->X_op
, FALSE
));
12994 if (tinsn_has_fixup
)
12997 xtensa_opcode opcode
= tinsn
->opcode
;
12998 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
13001 for (i
= 0; i
< noperands
; i
++)
13003 expressionS
* exp
= &tinsn
->tok
[i
];
13009 if (get_relaxable_immed (opcode
) == i
)
13011 /* Add a fix record for the instruction, except if this
13012 function is being called prior to relaxation, i.e.,
13013 if record_fixup is false, and the instruction might
13014 be relaxed later. */
13016 || tinsn
->is_specific_opcode
13017 || !xg_is_relaxable_insn (tinsn
, 0))
13019 xg_add_opcode_fix (tinsn
, i
, fmt
, slot
, exp
, fragP
,
13020 frag_offset
- fragP
->fr_literal
);
13024 if (exp
->X_op
!= O_symbol
)
13025 as_bad (_("invalid operand"));
13026 tinsn
->symbol
= exp
->X_add_symbol
;
13027 tinsn
->offset
= exp
->X_add_number
;
13031 as_bad (_("symbolic operand not allowed"));
13039 as_bad (_("expression too complex"));
13051 vinsn_from_chars (vliw_insn
*vinsn
, char *f
)
13053 static xtensa_insnbuf insnbuf
= NULL
;
13054 static xtensa_insnbuf slotbuf
= NULL
;
13057 xtensa_isa isa
= xtensa_default_isa
;
13061 insnbuf
= xtensa_insnbuf_alloc (isa
);
13062 slotbuf
= xtensa_insnbuf_alloc (isa
);
13065 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) f
, 0);
13066 fmt
= xtensa_format_decode (isa
, insnbuf
);
13067 if (fmt
== XTENSA_UNDEFINED
)
13068 as_fatal (_("cannot decode instruction format"));
13069 vinsn
->format
= fmt
;
13070 vinsn
->num_slots
= xtensa_format_num_slots (isa
, fmt
);
13072 for (i
= 0; i
< vinsn
->num_slots
; i
++)
13074 TInsn
*tinsn
= &vinsn
->slots
[i
];
13075 xtensa_format_get_slot (isa
, fmt
, i
, insnbuf
, slotbuf
);
13076 tinsn_from_insnbuf (tinsn
, slotbuf
, fmt
, i
);
13081 /* Expression utilities. */
13083 /* Return TRUE if the expression is an integer constant. */
13086 expr_is_const (const expressionS
*s
)
13088 return (s
->X_op
== O_constant
);
13092 /* Get the expression constant.
13093 Calling this is illegal if expr_is_const () returns TRUE. */
13096 get_expr_const (const expressionS
*s
)
13098 gas_assert (expr_is_const (s
));
13099 return s
->X_add_number
;
13103 /* Set the expression to a constant value. */
13106 set_expr_const (expressionS
*s
, offsetT val
)
13108 s
->X_op
= O_constant
;
13109 s
->X_add_number
= val
;
13110 s
->X_add_symbol
= NULL
;
13111 s
->X_op_symbol
= NULL
;
13116 expr_is_register (const expressionS
*s
)
13118 return (s
->X_op
== O_register
);
13122 /* Get the expression constant.
13123 Calling this is illegal if expr_is_const () returns TRUE. */
13126 get_expr_register (const expressionS
*s
)
13128 gas_assert (expr_is_register (s
));
13129 return s
->X_add_number
;
13133 /* Set the expression to a symbol + constant offset. */
13136 set_expr_symbol_offset (expressionS
*s
, symbolS
*sym
, offsetT offset
)
13138 s
->X_op
= O_symbol
;
13139 s
->X_add_symbol
= sym
;
13140 s
->X_op_symbol
= NULL
; /* unused */
13141 s
->X_add_number
= offset
;
13145 /* Return TRUE if the two expressions are equal. */
13148 expr_is_equal (expressionS
*s1
, expressionS
*s2
)
13150 if (s1
->X_op
!= s2
->X_op
)
13152 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
13154 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
13156 if (s1
->X_add_number
!= s2
->X_add_number
)
13163 copy_expr (expressionS
*dst
, const expressionS
*src
)
13165 memcpy (dst
, src
, sizeof (expressionS
));
13169 /* Support for the "--rename-section" option. */
13171 struct rename_section_struct
13173 const char *old_name
;
13175 struct rename_section_struct
*next
;
13178 static struct rename_section_struct
*section_rename
;
13181 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13182 entries to the section_rename list. Note: Specifying multiple
13183 renamings separated by colons is not documented and is retained only
13184 for backward compatibility. */
13187 build_section_rename (const char *arg
)
13189 struct rename_section_struct
*r
;
13190 char *this_arg
= NULL
;
13191 char *next_arg
= NULL
;
13193 for (this_arg
= xstrdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
13195 char *old_name
, *new_name
;
13199 next_arg
= strchr (this_arg
, ':');
13207 old_name
= this_arg
;
13208 new_name
= strchr (this_arg
, '=');
13210 if (*old_name
== '\0')
13212 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13215 if (!new_name
|| new_name
[1] == '\0')
13217 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13224 /* Check for invalid section renaming. */
13225 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13227 if (strcmp (r
->old_name
, old_name
) == 0)
13228 as_bad (_("section %s renamed multiple times"), old_name
);
13229 if (strcmp (r
->new_name
, new_name
) == 0)
13230 as_bad (_("multiple sections remapped to output section %s"),
13235 r
= XNEW (struct rename_section_struct
);
13236 r
->old_name
= xstrdup (old_name
);
13237 r
->new_name
= xstrdup (new_name
);
13238 r
->next
= section_rename
;
13239 section_rename
= r
;
13245 xtensa_section_rename (const char *name
)
13247 struct rename_section_struct
*r
= section_rename
;
13249 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13251 if (strcmp (r
->old_name
, name
) == 0)
13252 return r
->new_name
;
13255 return (char *) name
;