1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2018 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
32 #include "elf/xtensa.h"
34 /* Provide default values for new configuration settings. */
40 #define uint32 unsigned int
43 #define int32 signed int
48 Naming conventions (used somewhat inconsistently):
49 The xtensa_ functions are exported
50 The xg_ functions are internal
52 We also have a couple of different extensibility mechanisms.
53 1) The idiom replacement:
54 This is used when a line is first parsed to
55 replace an instruction pattern with another instruction
56 It is currently limited to replacements of instructions
57 with constant operands.
58 2) The xtensa-relax.c mechanism that has stronger instruction
59 replacement patterns. When an instruction's immediate field
60 does not fit the next instruction sequence is attempted.
61 In addition, "narrow" opcodes are supported this way. */
64 /* Define characters with special meanings to GAS. */
65 const char comment_chars
[] = "#";
66 const char line_comment_chars
[] = "#";
67 const char line_separator_chars
[] = ";";
68 const char EXP_CHARS
[] = "eE";
69 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
72 /* Flags to indicate whether the hardware supports the density and
73 absolute literals options. */
75 bfd_boolean density_supported
;
76 bfd_boolean absolute_literals_supported
;
78 static vliw_insn cur_vinsn
;
80 unsigned xtensa_num_pipe_stages
;
81 unsigned xtensa_fetch_width
;
83 static enum debug_info_type xt_saved_debug_type
= DEBUG_NONE
;
85 /* Some functions are only valid in the front end. This variable
86 allows us to assert that we haven't crossed over into the
88 static bfd_boolean past_xtensa_end
= FALSE
;
90 /* Flags for properties of the last instruction in a segment. */
91 #define FLAG_IS_A0_WRITER 0x1
92 #define FLAG_IS_BAD_LOOPEND 0x2
95 /* We define a special segment names ".literal" to place literals
96 into. The .fini and .init sections are special because they
97 contain code that is moved together by the linker. We give them
98 their own special .fini.literal and .init.literal sections. */
100 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
101 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
102 #define INIT_SECTION_NAME xtensa_section_rename (".init")
103 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
106 /* This type is used for the directive_stack to keep track of the
107 state of the literal collection pools. If lit_prefix is set, it is
108 used to determine the literal section names; otherwise, the literal
109 sections are determined based on the current text section. The
110 lit_seg and lit4_seg fields cache these literal sections, with the
111 current_text_seg field used a tag to indicate whether the cached
114 typedef struct lit_state_struct
117 segT current_text_seg
;
122 static lit_state default_lit_sections
;
125 /* We keep a list of literal segments. The seg_list type is the node
126 for this list. The literal_head pointer is the head of the list,
127 with the literal_head_h dummy node at the start. */
129 typedef struct seg_list_struct
131 struct seg_list_struct
*next
;
135 static seg_list literal_head_h
;
136 static seg_list
*literal_head
= &literal_head_h
;
139 /* Lists of symbols. We keep a list of symbols that label the current
140 instruction, so that we can adjust the symbols when inserting alignment
141 for various instructions. We also keep a list of all the symbols on
142 literals, so that we can fix up those symbols when the literals are
143 later moved into the text sections. */
145 typedef struct sym_list_struct
147 struct sym_list_struct
*next
;
151 static sym_list
*insn_labels
= NULL
;
152 static sym_list
*free_insn_labels
= NULL
;
153 static sym_list
*saved_insn_labels
= NULL
;
155 static sym_list
*literal_syms
;
158 /* Flags to determine whether to prefer const16 or l32r
159 if both options are available. */
160 int prefer_const16
= 0;
163 /* Global flag to indicate when we are emitting literals. */
164 int generating_literals
= 0;
166 /* The following PROPERTY table definitions are copied from
167 <elf/xtensa.h> and must be kept in sync with the code there. */
169 /* Flags in the property tables to specify whether blocks of memory
170 are literals, instructions, data, or unreachable. For
171 instructions, blocks that begin loop targets and branch targets are
172 designated. Blocks that do not allow density, instruction
173 reordering or transformation are also specified. Finally, for
174 branch targets, branch target alignment priority is included.
175 Alignment of the next block is specified in the current block
176 and the size of the current block does not include any fill required
177 to align to the next block. */
179 #define XTENSA_PROP_LITERAL 0x00000001
180 #define XTENSA_PROP_INSN 0x00000002
181 #define XTENSA_PROP_DATA 0x00000004
182 #define XTENSA_PROP_UNREACHABLE 0x00000008
183 /* Instruction only properties at beginning of code. */
184 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
185 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
186 /* Instruction only properties about code. */
187 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
188 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
189 /* Historically, NO_TRANSFORM was a property of instructions,
190 but it should apply to literals under certain circumstances. */
191 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
193 /* Branch target alignment information. This transmits information
194 to the linker optimization about the priority of aligning a
195 particular block for branch target alignment: None, low priority,
196 high priority, or required. These only need to be checked in
197 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
200 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
201 case XTENSA_PROP_BT_ALIGN_NONE:
202 case XTENSA_PROP_BT_ALIGN_LOW:
203 case XTENSA_PROP_BT_ALIGN_HIGH:
204 case XTENSA_PROP_BT_ALIGN_REQUIRE:
206 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
208 /* No branch target alignment. */
209 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
210 /* Low priority branch target alignment. */
211 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
212 /* High priority branch target alignment. */
213 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
214 /* Required branch target alignment. */
215 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
217 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
218 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
219 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
222 /* Alignment is specified in the block BEFORE the one that needs
223 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
224 get the required alignment specified as a power of 2. Use
225 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
226 alignment. Be careful of side effects since the SET will evaluate
227 flags twice. Also, note that the SIZE of a block in the property
228 table does not include the alignment size, so the alignment fill
229 must be calculated to determine if two blocks are contiguous.
230 TEXT_ALIGN is not currently implemented but is a placeholder for a
231 possible future implementation. */
233 #define XTENSA_PROP_ALIGN 0x00000800
235 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
237 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
238 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
239 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
241 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
244 /* Structure for saving instruction and alignment per-fragment data
245 that will be written to the object file. This structure is
246 equivalent to the actual data that will be written out to the file
247 but is easier to use. We provide a conversion to file flags
248 in frag_flags_to_number. */
250 typedef struct frag_flags_struct frag_flags
;
252 struct frag_flags_struct
254 /* is_literal should only be used after xtensa_move_literals.
255 If you need to check if you are generating a literal fragment,
256 then use the generating_literals global. */
258 unsigned is_literal
: 1;
259 unsigned is_insn
: 1;
260 unsigned is_data
: 1;
261 unsigned is_unreachable
: 1;
263 /* is_specific_opcode implies no_transform. */
264 unsigned is_no_transform
: 1;
268 unsigned is_loop_target
: 1;
269 unsigned is_branch_target
: 1; /* Branch targets have a priority. */
270 unsigned bt_align_priority
: 2;
272 unsigned is_no_density
: 1;
273 /* no_longcalls flag does not need to be placed in the object file. */
275 unsigned is_no_reorder
: 1;
277 /* Uses absolute literal addressing for l32r. */
278 unsigned is_abslit
: 1;
280 unsigned is_align
: 1;
281 unsigned alignment
: 5;
285 /* Structure for saving information about a block of property data
286 for frags that have the same flags. */
287 struct xtensa_block_info_struct
293 struct xtensa_block_info_struct
*next
;
297 /* Structure for saving the current state before emitting literals. */
298 typedef struct emit_state_struct
303 int generating_literals
;
307 /* Opcode placement information */
309 typedef unsigned long long bitfield
;
310 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
311 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
312 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
314 #define MAX_FORMATS 32
316 typedef struct op_placement_info_struct
319 /* A number describing how restrictive the issue is for this
320 opcode. For example, an opcode that fits lots of different
321 formats has a high freedom, as does an opcode that fits
322 only one format but many slots in that format. The most
323 restrictive is the opcode that fits only one slot in one
326 xtensa_format narrowest
;
330 /* formats is a bitfield with the Nth bit set
331 if the opcode fits in the Nth xtensa_format. */
334 /* slots[N]'s Mth bit is set if the op fits in the
335 Mth slot of the Nth xtensa_format. */
336 bitfield slots
[MAX_FORMATS
];
338 /* A count of the number of slots in a given format
339 an op can fit (i.e., the bitcount of the slot field above). */
340 char slots_in_format
[MAX_FORMATS
];
342 } op_placement_info
, *op_placement_info_table
;
344 op_placement_info_table op_placement_table
;
347 /* Extra expression types. */
349 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
350 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
351 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
352 #define O_pcrel O_md4 /* value is a PC-relative offset */
353 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
354 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
355 #define O_tlscall O_md7 /* TLS_CALL relocation */
356 #define O_tpoff O_md8 /* TPOFF relocation */
357 #define O_dtpoff O_md9 /* DTPOFF relocation */
359 struct suffix_reloc_map
363 bfd_reloc_code_real_type reloc
;
367 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
369 static struct suffix_reloc_map suffix_relocs
[] =
371 SUFFIX_MAP ("l", BFD_RELOC_LO16
, O_lo16
),
372 SUFFIX_MAP ("h", BFD_RELOC_HI16
, O_hi16
),
373 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT
, O_pltrel
),
374 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL
, O_pcrel
),
375 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC
, O_tlsfunc
),
376 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG
, O_tlsarg
),
377 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL
, O_tlscall
),
378 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF
, O_tpoff
),
379 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF
, O_dtpoff
),
393 directive_literal_prefix
,
395 directive_absolute_literals
,
396 directive_last_directive
402 bfd_boolean can_be_negated
;
405 const directive_infoS directive_info
[] =
408 { "literal", FALSE
},
410 { "transform", TRUE
},
411 { "freeregs", FALSE
},
412 { "longcalls", TRUE
},
413 { "literal_prefix", FALSE
},
414 { "schedule", TRUE
},
415 { "absolute-literals", TRUE
}
418 bfd_boolean directive_state
[] =
423 TRUE
, /* transform */
424 FALSE
, /* freeregs */
425 FALSE
, /* longcalls */
426 FALSE
, /* literal_prefix */
427 FALSE
, /* schedule */
428 FALSE
/* absolute_literals */
431 /* A circular list of all potential and actual literal pool locations
435 struct litpool_frag
*next
;
436 struct litpool_frag
*prev
;
439 short priority
; /* 1, 2, or 3 -- 1 is highest */
440 short original_priority
;
444 /* Map a segment to its litpool_frag list. */
447 struct litpool_seg
*next
;
449 struct litpool_frag frag_list
;
450 int frag_count
; /* since last litpool location */
453 static struct litpool_seg litpool_seg_list
;
455 /* Limit maximal size of auto litpool by half of the j range. */
456 #define MAX_AUTO_POOL_LITERALS 16384
458 /* Limit maximal size of explicit literal pool by l32r range. */
459 #define MAX_EXPLICIT_POOL_LITERALS 65536
461 #define MAX_POOL_LITERALS \
462 (auto_litpools ? MAX_AUTO_POOL_LITERALS : MAX_EXPLICIT_POOL_LITERALS)
464 /* Directive functions. */
466 static void xtensa_begin_directive (int);
467 static void xtensa_end_directive (int);
468 static void xtensa_literal_prefix (void);
469 static void xtensa_literal_position (int);
470 static void xtensa_literal_pseudo (int);
471 static void xtensa_frequency_pseudo (int);
472 static void xtensa_elf_cons (int);
473 static void xtensa_leb128 (int);
475 /* Parsing and Idiom Translation. */
477 static bfd_reloc_code_real_type
xtensa_elf_suffix (char **, expressionS
*);
479 /* Various Other Internal Functions. */
481 extern bfd_boolean
xg_is_single_relaxable_insn (TInsn
*, TInsn
*, bfd_boolean
);
482 static bfd_boolean
xg_build_to_insn (TInsn
*, TInsn
*, BuildInstr
*);
483 static void xtensa_mark_literal_pool_location (void);
484 static addressT
get_expanded_loop_offset (xtensa_opcode
);
485 static fragS
*get_literal_pool_location (segT
);
486 static void set_literal_pool_location (segT
, fragS
*);
487 static void xtensa_set_frag_assembly_state (fragS
*);
488 static void finish_vinsn (vliw_insn
*);
489 static bfd_boolean
emit_single_op (TInsn
*);
490 static int total_frag_text_expansion (fragS
*);
491 static bfd_boolean use_trampolines
= TRUE
;
492 static void xtensa_check_frag_count (void);
493 static void xtensa_create_trampoline_frag (bfd_boolean
);
494 static void xtensa_maybe_create_trampoline_frag (void);
495 struct trampoline_frag
;
496 static int init_trampoline_frag (fragS
*);
497 static fixS
*xg_append_jump (fragS
*fragP
, symbolS
*sym
, offsetT offset
);
498 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean
, bfd_boolean
);
499 static bfd_boolean auto_litpools
= FALSE
;
500 static int auto_litpool_limit
= 0;
502 /* Alignment Functions. */
504 static int get_text_align_power (unsigned);
505 static int get_text_align_max_fill_size (int, bfd_boolean
, bfd_boolean
);
506 static int branch_align_power (segT
);
508 /* Helpers for xtensa_relax_frag(). */
510 static long relax_frag_add_nop (fragS
*);
512 /* Accessors for additional per-subsegment information. */
514 static unsigned get_last_insn_flags (segT
, subsegT
);
515 static void set_last_insn_flags (segT
, subsegT
, unsigned, bfd_boolean
);
516 static float get_subseg_total_freq (segT
, subsegT
);
517 static float get_subseg_target_freq (segT
, subsegT
);
518 static void set_subseg_freq (segT
, subsegT
, float, float);
520 /* Segment list functions. */
522 static void xtensa_move_literals (void);
523 static void xtensa_reorder_segments (void);
524 static void xtensa_switch_to_literal_fragment (emit_state
*);
525 static void xtensa_switch_to_non_abs_literal_fragment (emit_state
*);
526 static void xtensa_switch_section_emit_state (emit_state
*, segT
, subsegT
);
527 static void xtensa_restore_emit_state (emit_state
*);
528 static segT
cache_literal_section (bfd_boolean
);
530 /* op_placement_info functions. */
532 static void init_op_placement_info_table (void);
533 extern bfd_boolean
opcode_fits_format_slot (xtensa_opcode
, xtensa_format
, int);
534 static int xg_get_single_size (xtensa_opcode
);
535 static xtensa_format
xg_get_single_format (xtensa_opcode
);
536 static int xg_get_single_slot (xtensa_opcode
);
538 /* TInsn and IStack functions. */
540 static bfd_boolean
tinsn_has_symbolic_operands (const TInsn
*);
541 static bfd_boolean
tinsn_has_invalid_symbolic_operands (const TInsn
*);
542 static bfd_boolean
tinsn_has_complex_operands (const TInsn
*);
543 static bfd_boolean
tinsn_to_insnbuf (TInsn
*, xtensa_insnbuf
);
544 static bfd_boolean
tinsn_check_arguments (const TInsn
*);
545 static void tinsn_from_chars (TInsn
*, char *, int);
546 static void tinsn_immed_from_frag (TInsn
*, fragS
*, int);
547 static int get_num_stack_text_bytes (IStack
*);
548 static int get_num_stack_literal_bytes (IStack
*);
549 static bfd_boolean
tinsn_to_slotbuf (xtensa_format
, int, TInsn
*, xtensa_insnbuf
);
551 /* vliw_insn functions. */
553 static void xg_init_vinsn (vliw_insn
*);
554 static void xg_copy_vinsn (vliw_insn
*, vliw_insn
*);
555 static void xg_clear_vinsn (vliw_insn
*);
556 static bfd_boolean
vinsn_has_specific_opcodes (vliw_insn
*);
557 static void xg_free_vinsn (vliw_insn
*);
558 static bfd_boolean vinsn_to_insnbuf
559 (vliw_insn
*, char *, fragS
*, bfd_boolean
);
560 static void vinsn_from_chars (vliw_insn
*, char *);
562 /* Expression Utilities. */
564 bfd_boolean
expr_is_const (const expressionS
*);
565 offsetT
get_expr_const (const expressionS
*);
566 void set_expr_const (expressionS
*, offsetT
);
567 bfd_boolean
expr_is_register (const expressionS
*);
568 offsetT
get_expr_register (const expressionS
*);
569 void set_expr_symbol_offset (expressionS
*, symbolS
*, offsetT
);
570 bfd_boolean
expr_is_equal (expressionS
*, expressionS
*);
571 static void copy_expr (expressionS
*, const expressionS
*);
573 /* Section renaming. */
575 static void build_section_rename (const char *);
578 /* ISA imported from bfd. */
579 extern xtensa_isa xtensa_default_isa
;
581 extern int target_big_endian
;
583 static xtensa_opcode xtensa_addi_opcode
;
584 static xtensa_opcode xtensa_addmi_opcode
;
585 static xtensa_opcode xtensa_call0_opcode
;
586 static xtensa_opcode xtensa_call4_opcode
;
587 static xtensa_opcode xtensa_call8_opcode
;
588 static xtensa_opcode xtensa_call12_opcode
;
589 static xtensa_opcode xtensa_callx0_opcode
;
590 static xtensa_opcode xtensa_callx4_opcode
;
591 static xtensa_opcode xtensa_callx8_opcode
;
592 static xtensa_opcode xtensa_callx12_opcode
;
593 static xtensa_opcode xtensa_const16_opcode
;
594 static xtensa_opcode xtensa_entry_opcode
;
595 static xtensa_opcode xtensa_extui_opcode
;
596 static xtensa_opcode xtensa_movi_opcode
;
597 static xtensa_opcode xtensa_movi_n_opcode
;
598 static xtensa_opcode xtensa_isync_opcode
;
599 static xtensa_opcode xtensa_j_opcode
;
600 static xtensa_opcode xtensa_jx_opcode
;
601 static xtensa_opcode xtensa_l32r_opcode
;
602 static xtensa_opcode xtensa_loop_opcode
;
603 static xtensa_opcode xtensa_loopnez_opcode
;
604 static xtensa_opcode xtensa_loopgtz_opcode
;
605 static xtensa_opcode xtensa_nop_opcode
;
606 static xtensa_opcode xtensa_nop_n_opcode
;
607 static xtensa_opcode xtensa_or_opcode
;
608 static xtensa_opcode xtensa_ret_opcode
;
609 static xtensa_opcode xtensa_ret_n_opcode
;
610 static xtensa_opcode xtensa_retw_opcode
;
611 static xtensa_opcode xtensa_retw_n_opcode
;
612 static xtensa_opcode xtensa_rsr_lcount_opcode
;
613 static xtensa_opcode xtensa_waiti_opcode
;
614 static int config_max_slots
= 0;
617 /* Command-line Options. */
619 bfd_boolean use_literal_section
= TRUE
;
620 enum flix_level produce_flix
= FLIX_ALL
;
621 static bfd_boolean align_targets
= TRUE
;
622 static bfd_boolean warn_unaligned_branch_targets
= FALSE
;
623 static bfd_boolean has_a0_b_retw
= FALSE
;
624 static bfd_boolean workaround_a0_b_retw
= FALSE
;
625 static bfd_boolean workaround_b_j_loop_end
= FALSE
;
626 static bfd_boolean workaround_short_loop
= FALSE
;
627 static bfd_boolean maybe_has_short_loop
= FALSE
;
628 static bfd_boolean workaround_close_loop_end
= FALSE
;
629 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
630 static bfd_boolean enforce_three_byte_loop_align
= FALSE
;
632 /* When workaround_short_loops is TRUE, all loops with early exits must
633 have at least 3 instructions. workaround_all_short_loops is a modifier
634 to the workaround_short_loop flag. In addition to the
635 workaround_short_loop actions, all straightline loopgtz and loopnez
636 must have at least 3 instructions. */
638 static bfd_boolean workaround_all_short_loops
= FALSE
;
640 /* Generate individual property section for every section.
641 This option is defined in BDF library. */
642 extern bfd_boolean elf32xtensa_separate_props
;
645 xtensa_setup_hw_workarounds (int earliest
, int latest
)
647 if (earliest
> latest
)
648 as_fatal (_("illegal range of target hardware versions"));
650 /* Enable all workarounds for pre-T1050.0 hardware. */
651 if (earliest
< 105000 || latest
< 105000)
653 workaround_a0_b_retw
|= TRUE
;
654 workaround_b_j_loop_end
|= TRUE
;
655 workaround_short_loop
|= TRUE
;
656 workaround_close_loop_end
|= TRUE
;
657 workaround_all_short_loops
|= TRUE
;
658 enforce_three_byte_loop_align
= TRUE
;
665 option_density
= OPTION_MD_BASE
,
669 option_no_generate_flix
,
676 option_no_link_relax
,
684 option_text_section_literals
,
685 option_no_text_section_literals
,
687 option_absolute_literals
,
688 option_no_absolute_literals
,
690 option_align_targets
,
691 option_no_align_targets
,
693 option_warn_unaligned_targets
,
698 option_workaround_a0_b_retw
,
699 option_no_workaround_a0_b_retw
,
701 option_workaround_b_j_loop_end
,
702 option_no_workaround_b_j_loop_end
,
704 option_workaround_short_loop
,
705 option_no_workaround_short_loop
,
707 option_workaround_all_short_loops
,
708 option_no_workaround_all_short_loops
,
710 option_workaround_close_loop_end
,
711 option_no_workaround_close_loop_end
,
713 option_no_workarounds
,
715 option_rename_section_name
,
718 option_prefer_const16
,
720 option_target_hardware
,
723 option_no_trampolines
,
725 option_auto_litpools
,
726 option_no_auto_litpools
,
727 option_auto_litpool_limit
,
729 option_separate_props
,
730 option_no_separate_props
,
733 const char *md_shortopts
= "";
735 struct option md_longopts
[] =
737 { "density", no_argument
, NULL
, option_density
},
738 { "no-density", no_argument
, NULL
, option_no_density
},
740 { "flix", no_argument
, NULL
, option_flix
},
741 { "no-generate-flix", no_argument
, NULL
, option_no_generate_flix
},
742 { "no-allow-flix", no_argument
, NULL
, option_no_flix
},
744 /* Both "relax" and "generics" are deprecated and treated as equivalent
745 to the "transform" option. */
746 { "relax", no_argument
, NULL
, option_relax
},
747 { "no-relax", no_argument
, NULL
, option_no_relax
},
748 { "generics", no_argument
, NULL
, option_generics
},
749 { "no-generics", no_argument
, NULL
, option_no_generics
},
751 { "transform", no_argument
, NULL
, option_transform
},
752 { "no-transform", no_argument
, NULL
, option_no_transform
},
753 { "text-section-literals", no_argument
, NULL
, option_text_section_literals
},
754 { "no-text-section-literals", no_argument
, NULL
,
755 option_no_text_section_literals
},
756 { "absolute-literals", no_argument
, NULL
, option_absolute_literals
},
757 { "no-absolute-literals", no_argument
, NULL
, option_no_absolute_literals
},
758 /* This option was changed from -align-target to -target-align
759 because it conflicted with the "-al" option. */
760 { "target-align", no_argument
, NULL
, option_align_targets
},
761 { "no-target-align", no_argument
, NULL
, option_no_align_targets
},
762 { "warn-unaligned-targets", no_argument
, NULL
,
763 option_warn_unaligned_targets
},
764 { "longcalls", no_argument
, NULL
, option_longcalls
},
765 { "no-longcalls", no_argument
, NULL
, option_no_longcalls
},
767 { "no-workaround-a0-b-retw", no_argument
, NULL
,
768 option_no_workaround_a0_b_retw
},
769 { "workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
771 { "no-workaround-b-j-loop-end", no_argument
, NULL
,
772 option_no_workaround_b_j_loop_end
},
773 { "workaround-b-j-loop-end", no_argument
, NULL
,
774 option_workaround_b_j_loop_end
},
776 { "no-workaround-short-loops", no_argument
, NULL
,
777 option_no_workaround_short_loop
},
778 { "workaround-short-loops", no_argument
, NULL
,
779 option_workaround_short_loop
},
781 { "no-workaround-all-short-loops", no_argument
, NULL
,
782 option_no_workaround_all_short_loops
},
783 { "workaround-all-short-loop", no_argument
, NULL
,
784 option_workaround_all_short_loops
},
786 { "prefer-l32r", no_argument
, NULL
, option_prefer_l32r
},
787 { "prefer-const16", no_argument
, NULL
, option_prefer_const16
},
789 { "no-workarounds", no_argument
, NULL
, option_no_workarounds
},
791 { "no-workaround-close-loop-end", no_argument
, NULL
,
792 option_no_workaround_close_loop_end
},
793 { "workaround-close-loop-end", no_argument
, NULL
,
794 option_workaround_close_loop_end
},
796 { "rename-section", required_argument
, NULL
, option_rename_section_name
},
798 { "link-relax", no_argument
, NULL
, option_link_relax
},
799 { "no-link-relax", no_argument
, NULL
, option_no_link_relax
},
801 { "target-hardware", required_argument
, NULL
, option_target_hardware
},
803 { "trampolines", no_argument
, NULL
, option_trampolines
},
804 { "no-trampolines", no_argument
, NULL
, option_no_trampolines
},
806 { "auto-litpools", no_argument
, NULL
, option_auto_litpools
},
807 { "no-auto-litpools", no_argument
, NULL
, option_no_auto_litpools
},
808 { "auto-litpool-limit", required_argument
, NULL
, option_auto_litpool_limit
},
810 { "separate-prop-tables", no_argument
, NULL
, option_separate_props
},
812 { NULL
, no_argument
, NULL
, 0 }
815 size_t md_longopts_size
= sizeof md_longopts
;
819 md_parse_option (int c
, const char *arg
)
824 as_warn (_("--density option is ignored"));
826 case option_no_density
:
827 as_warn (_("--no-density option is ignored"));
829 case option_link_relax
:
832 case option_no_link_relax
:
836 produce_flix
= FLIX_ALL
;
838 case option_no_generate_flix
:
839 produce_flix
= FLIX_NO_GENERATE
;
842 produce_flix
= FLIX_NONE
;
844 case option_generics
:
845 as_warn (_("--generics is deprecated; use --transform instead"));
846 return md_parse_option (option_transform
, arg
);
847 case option_no_generics
:
848 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
849 return md_parse_option (option_no_transform
, arg
);
851 as_warn (_("--relax is deprecated; use --transform instead"));
852 return md_parse_option (option_transform
, arg
);
853 case option_no_relax
:
854 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
855 return md_parse_option (option_no_transform
, arg
);
856 case option_longcalls
:
857 directive_state
[directive_longcalls
] = TRUE
;
859 case option_no_longcalls
:
860 directive_state
[directive_longcalls
] = FALSE
;
862 case option_text_section_literals
:
863 use_literal_section
= FALSE
;
865 case option_no_text_section_literals
:
866 use_literal_section
= TRUE
;
868 case option_absolute_literals
:
869 if (!absolute_literals_supported
)
871 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
874 directive_state
[directive_absolute_literals
] = TRUE
;
876 case option_no_absolute_literals
:
877 directive_state
[directive_absolute_literals
] = FALSE
;
880 case option_workaround_a0_b_retw
:
881 workaround_a0_b_retw
= TRUE
;
883 case option_no_workaround_a0_b_retw
:
884 workaround_a0_b_retw
= FALSE
;
886 case option_workaround_b_j_loop_end
:
887 workaround_b_j_loop_end
= TRUE
;
889 case option_no_workaround_b_j_loop_end
:
890 workaround_b_j_loop_end
= FALSE
;
893 case option_workaround_short_loop
:
894 workaround_short_loop
= TRUE
;
896 case option_no_workaround_short_loop
:
897 workaround_short_loop
= FALSE
;
900 case option_workaround_all_short_loops
:
901 workaround_all_short_loops
= TRUE
;
903 case option_no_workaround_all_short_loops
:
904 workaround_all_short_loops
= FALSE
;
907 case option_workaround_close_loop_end
:
908 workaround_close_loop_end
= TRUE
;
910 case option_no_workaround_close_loop_end
:
911 workaround_close_loop_end
= FALSE
;
914 case option_no_workarounds
:
915 workaround_a0_b_retw
= FALSE
;
916 workaround_b_j_loop_end
= FALSE
;
917 workaround_short_loop
= FALSE
;
918 workaround_all_short_loops
= FALSE
;
919 workaround_close_loop_end
= FALSE
;
922 case option_align_targets
:
923 align_targets
= TRUE
;
925 case option_no_align_targets
:
926 align_targets
= FALSE
;
929 case option_warn_unaligned_targets
:
930 warn_unaligned_branch_targets
= TRUE
;
933 case option_rename_section_name
:
934 build_section_rename (arg
);
938 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
939 should be emitted or not. FIXME: Not implemented. */
942 case option_prefer_l32r
:
944 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
948 case option_prefer_const16
:
950 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
954 case option_target_hardware
:
956 int earliest
, latest
= 0;
958 if (*arg
== 0 || *arg
== '-')
959 as_fatal (_("invalid target hardware version"));
961 earliest
= strtol (arg
, &end
, 0);
965 else if (*end
== '-')
968 as_fatal (_("invalid target hardware version"));
969 latest
= strtol (end
, &end
, 0);
972 as_fatal (_("invalid target hardware version"));
974 xtensa_setup_hw_workarounds (earliest
, latest
);
978 case option_transform
:
979 /* This option has no affect other than to use the defaults,
980 which are already set. */
983 case option_no_transform
:
984 /* This option turns off all transformations of any kind.
985 However, because we want to preserve the state of other
986 directives, we only change its own field. Thus, before
987 you perform any transformation, always check if transform
988 is available. If you use the functions we provide for this
989 purpose, you will be ok. */
990 directive_state
[directive_transform
] = FALSE
;
993 case option_trampolines
:
994 use_trampolines
= TRUE
;
997 case option_no_trampolines
:
998 use_trampolines
= FALSE
;
1001 case option_auto_litpools
:
1002 auto_litpools
= TRUE
;
1003 use_literal_section
= FALSE
;
1004 if (auto_litpool_limit
<= 0)
1005 auto_litpool_limit
= MAX_AUTO_POOL_LITERALS
/ 2;
1008 case option_no_auto_litpools
:
1009 auto_litpools
= FALSE
;
1010 auto_litpool_limit
= -1;
1013 case option_auto_litpool_limit
:
1017 if (auto_litpool_limit
< 0)
1018 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
1019 if (*arg
== 0 || *arg
== '-')
1020 as_fatal (_("invalid auto-litpool-limit argument"));
1021 value
= strtol (arg
, &end
, 10);
1023 as_fatal (_("invalid auto-litpool-limit argument"));
1024 if (value
< 100 || value
> 10000)
1025 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1026 auto_litpool_limit
= value
;
1027 auto_litpools
= TRUE
;
1028 use_literal_section
= FALSE
;
1032 case option_separate_props
:
1033 elf32xtensa_separate_props
= TRUE
;
1036 case option_no_separate_props
:
1037 elf32xtensa_separate_props
= FALSE
;
1047 md_show_usage (FILE *stream
)
1051 --[no-]text-section-literals\n\
1052 [Do not] put literals in the text section\n\
1053 --[no-]absolute-literals\n\
1054 [Do not] default to use non-PC-relative literals\n\
1055 --[no-]target-align [Do not] try to align branch targets\n\
1056 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1057 --[no-]transform [Do not] transform instructions\n\
1058 --flix both allow hand-written and generate flix bundles\n\
1059 --no-generate-flix allow hand-written but do not generate\n\
1061 --no-allow-flix neither allow hand-written nor generate\n\
1063 --rename-section old=new Rename section 'old' to 'new'\n\
1064 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1065 when jumps do not reach their targets\n\
1066 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1067 --auto-litpool-limit=<value>\n\
1068 (range 100-10000) Maximum number of blocks of\n\
1069 instructions to emit between literal pool\n\
1070 locations; implies --auto-litpools flag\n\
1071 --[no-]separate-prop-tables\n\
1072 [Do not] place Xtensa property records into\n\
1073 individual property sections for each section.\n\
1074 Default is to generate single property section.\n", stream
);
1078 /* Functions related to the list of current label symbols. */
1081 xtensa_add_insn_label (symbolS
*sym
)
1085 if (!free_insn_labels
)
1086 l
= XNEW (sym_list
);
1089 l
= free_insn_labels
;
1090 free_insn_labels
= l
->next
;
1094 l
->next
= insn_labels
;
1100 xtensa_clear_insn_labels (void)
1104 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
1112 xtensa_move_labels (fragS
*new_frag
, valueT new_offset
)
1116 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
1118 symbolS
*lit_sym
= lit
->sym
;
1119 S_SET_VALUE (lit_sym
, new_offset
);
1120 symbol_set_frag (lit_sym
, new_frag
);
1125 /* Directive data and functions. */
1127 typedef struct state_stackS_struct
1129 directiveE directive
;
1130 bfd_boolean negated
;
1131 bfd_boolean old_state
;
1135 struct state_stackS_struct
*prev
;
1138 state_stackS
*directive_state_stack
;
1140 const pseudo_typeS md_pseudo_table
[] =
1142 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1143 { "literal_position", xtensa_literal_position
, 0 },
1144 { "frame", s_ignore
, 0 }, /* Formerly used for STABS debugging. */
1145 { "long", xtensa_elf_cons
, 4 },
1146 { "word", xtensa_elf_cons
, 4 },
1147 { "4byte", xtensa_elf_cons
, 4 },
1148 { "short", xtensa_elf_cons
, 2 },
1149 { "2byte", xtensa_elf_cons
, 2 },
1150 { "sleb128", xtensa_leb128
, 1},
1151 { "uleb128", xtensa_leb128
, 0},
1152 { "begin", xtensa_begin_directive
, 0 },
1153 { "end", xtensa_end_directive
, 0 },
1154 { "literal", xtensa_literal_pseudo
, 0 },
1155 { "frequency", xtensa_frequency_pseudo
, 0 },
1161 use_transform (void)
1163 /* After md_end, you should be checking frag by frag, rather
1164 than state directives. */
1165 gas_assert (!past_xtensa_end
);
1166 return directive_state
[directive_transform
];
1171 do_align_targets (void)
1173 /* Do not use this function after md_end; just look at align_targets
1174 instead. There is no target-align directive, so alignment is either
1175 enabled for all frags or not done at all. */
1176 gas_assert (!past_xtensa_end
);
1177 return align_targets
&& use_transform ();
1182 directive_push (directiveE directive
, bfd_boolean negated
, const void *datum
)
1186 state_stackS
*stack
= XNEW (state_stackS
);
1188 file
= as_where (&line
);
1190 stack
->directive
= directive
;
1191 stack
->negated
= negated
;
1192 stack
->old_state
= directive_state
[directive
];
1195 stack
->datum
= datum
;
1196 stack
->prev
= directive_state_stack
;
1197 directive_state_stack
= stack
;
1199 directive_state
[directive
] = !negated
;
1204 directive_pop (directiveE
*directive
,
1205 bfd_boolean
*negated
,
1210 state_stackS
*top
= directive_state_stack
;
1212 if (!directive_state_stack
)
1214 as_bad (_("unmatched .end directive"));
1215 *directive
= directive_none
;
1219 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1220 *directive
= top
->directive
;
1221 *negated
= top
->negated
;
1224 *datum
= top
->datum
;
1225 directive_state_stack
= top
->prev
;
1231 directive_balance (void)
1233 while (directive_state_stack
)
1235 directiveE directive
;
1236 bfd_boolean negated
;
1241 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1242 as_warn_where ((char *) file
, line
,
1243 _(".begin directive with no matching .end directive"));
1249 inside_directive (directiveE dir
)
1251 state_stackS
*top
= directive_state_stack
;
1253 while (top
&& top
->directive
!= dir
)
1256 return (top
!= NULL
);
1261 get_directive (directiveE
*directive
, bfd_boolean
*negated
)
1265 const char *directive_string
;
1267 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1272 input_line_pointer
+= 3;
1275 len
= strspn (input_line_pointer
,
1276 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1278 /* This code is a hack to make .begin [no-][generics|relax] exactly
1279 equivalent to .begin [no-]transform. We should remove it when
1280 we stop accepting those options. */
1282 if (strncmp (input_line_pointer
, "generics", strlen ("generics")) == 0)
1284 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1285 directive_string
= "transform";
1287 else if (strncmp (input_line_pointer
, "relax", strlen ("relax")) == 0)
1289 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1290 directive_string
= "transform";
1293 directive_string
= input_line_pointer
;
1295 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1297 if (strncmp (directive_string
, directive_info
[i
].name
, len
) == 0)
1299 input_line_pointer
+= len
;
1300 *directive
= (directiveE
) i
;
1301 if (*negated
&& !directive_info
[i
].can_be_negated
)
1302 as_bad (_("directive %s cannot be negated"),
1303 directive_info
[i
].name
);
1308 as_bad (_("unknown directive"));
1309 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1314 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED
)
1316 directiveE directive
;
1317 bfd_boolean negated
;
1321 get_directive (&directive
, &negated
);
1322 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1324 discard_rest_of_line ();
1328 if (cur_vinsn
.inside_bundle
)
1329 as_bad (_("directives are not valid inside bundles"));
1333 case directive_literal
:
1334 if (!inside_directive (directive_literal
))
1336 /* Previous labels go with whatever follows this directive, not with
1337 the literal, so save them now. */
1338 saved_insn_labels
= insn_labels
;
1341 as_warn (_(".begin literal is deprecated; use .literal instead"));
1342 state
= XNEW (emit_state
);
1343 xtensa_switch_to_literal_fragment (state
);
1344 directive_push (directive_literal
, negated
, state
);
1347 case directive_literal_prefix
:
1348 /* Have to flush pending output because a movi relaxed to an l32r
1349 might produce a literal. */
1350 md_flush_pending_output ();
1351 /* Check to see if the current fragment is a literal
1352 fragment. If it is, then this operation is not allowed. */
1353 if (generating_literals
)
1355 as_bad (_("cannot set literal_prefix inside literal fragment"));
1359 /* Allocate the literal state for this section and push
1360 onto the directive stack. */
1361 ls
= XNEW (lit_state
);
1364 *ls
= default_lit_sections
;
1365 directive_push (directive_literal_prefix
, negated
, ls
);
1367 /* Process the new prefix. */
1368 xtensa_literal_prefix ();
1371 case directive_freeregs
:
1372 /* This information is currently unused, but we'll accept the statement
1373 and just discard the rest of the line. This won't check the syntax,
1374 but it will accept every correct freeregs directive. */
1375 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1376 directive_push (directive_freeregs
, negated
, 0);
1379 case directive_schedule
:
1380 md_flush_pending_output ();
1381 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
1382 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
1383 directive_push (directive_schedule
, negated
, 0);
1384 xtensa_set_frag_assembly_state (frag_now
);
1387 case directive_density
:
1388 as_warn (_(".begin [no-]density is ignored"));
1391 case directive_absolute_literals
:
1392 md_flush_pending_output ();
1393 if (!absolute_literals_supported
&& !negated
)
1395 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1398 xtensa_set_frag_assembly_state (frag_now
);
1399 directive_push (directive
, negated
, 0);
1403 md_flush_pending_output ();
1404 xtensa_set_frag_assembly_state (frag_now
);
1405 directive_push (directive
, negated
, 0);
1409 demand_empty_rest_of_line ();
1414 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED
)
1416 directiveE begin_directive
, end_directive
;
1417 bfd_boolean begin_negated
, end_negated
;
1421 emit_state
**state_ptr
;
1424 if (cur_vinsn
.inside_bundle
)
1425 as_bad (_("directives are not valid inside bundles"));
1427 get_directive (&end_directive
, &end_negated
);
1429 md_flush_pending_output ();
1431 switch ((int) end_directive
)
1433 case XTENSA_UNDEFINED
:
1434 discard_rest_of_line ();
1437 case (int) directive_density
:
1438 as_warn (_(".end [no-]density is ignored"));
1439 demand_empty_rest_of_line ();
1442 case (int) directive_absolute_literals
:
1443 if (!absolute_literals_supported
&& !end_negated
)
1445 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1446 demand_empty_rest_of_line ();
1455 state_ptr
= &state
; /* use state_ptr to avoid type-punning warning */
1456 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1457 (const void **) state_ptr
);
1459 if (begin_directive
!= directive_none
)
1461 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1463 as_bad (_("does not match begin %s%s at %s:%d"),
1464 begin_negated
? "no-" : "",
1465 directive_info
[begin_directive
].name
, file
, line
);
1469 switch (end_directive
)
1471 case directive_literal
:
1472 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1473 xtensa_restore_emit_state (state
);
1474 xtensa_set_frag_assembly_state (frag_now
);
1476 if (!inside_directive (directive_literal
))
1478 /* Restore the list of current labels. */
1479 xtensa_clear_insn_labels ();
1480 insn_labels
= saved_insn_labels
;
1484 case directive_literal_prefix
:
1485 /* Restore the default collection sections from saved state. */
1486 s
= (lit_state
*) state
;
1488 default_lit_sections
= *s
;
1490 /* Free the state storage. */
1491 free (s
->lit_prefix
);
1495 case directive_schedule
:
1496 case directive_freeregs
:
1500 xtensa_set_frag_assembly_state (frag_now
);
1506 demand_empty_rest_of_line ();
1510 /* Place an aligned literal fragment at the current location. */
1513 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED
)
1515 md_flush_pending_output ();
1517 if (inside_directive (directive_literal
))
1518 as_warn (_(".literal_position inside literal directive; ignoring"));
1519 xtensa_mark_literal_pool_location ();
1521 demand_empty_rest_of_line ();
1522 xtensa_clear_insn_labels ();
1526 /* Support .literal label, expr, ... */
1529 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED
)
1532 char *p
, *base_name
;
1536 if (inside_directive (directive_literal
))
1538 as_bad (_(".literal not allowed inside .begin literal region"));
1539 ignore_rest_of_line ();
1543 md_flush_pending_output ();
1545 /* Previous labels go with whatever follows this directive, not with
1546 the literal, so save them now. */
1547 saved_insn_labels
= insn_labels
;
1550 /* If we are using text-section literals, then this is the right value... */
1553 base_name
= input_line_pointer
;
1555 xtensa_switch_to_literal_fragment (&state
);
1557 /* ...but if we aren't using text-section-literals, then we
1558 need to put them in the section we just switched to. */
1559 if (use_literal_section
|| directive_state
[directive_absolute_literals
])
1562 /* FIXME, despite the previous comments, dest_seg is unused... */
1565 /* All literals are aligned to four-byte boundaries. */
1566 frag_align (2, 0, 0);
1567 record_alignment (now_seg
, 2);
1569 c
= get_symbol_name (&base_name
);
1570 /* Just after name is now '\0'. */
1571 p
= input_line_pointer
;
1573 SKIP_WHITESPACE_AFTER_NAME ();
1575 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1577 as_bad (_("expected comma or colon after symbol name; "
1578 "rest of line ignored"));
1579 ignore_rest_of_line ();
1580 xtensa_restore_emit_state (&state
);
1588 input_line_pointer
++; /* skip ',' or ':' */
1590 xtensa_elf_cons (4);
1592 xtensa_restore_emit_state (&state
);
1594 /* Restore the list of current labels. */
1595 xtensa_clear_insn_labels ();
1596 insn_labels
= saved_insn_labels
;
1601 xtensa_literal_prefix (void)
1606 /* Parse the new prefix from the input_line_pointer. */
1608 len
= strspn (input_line_pointer
,
1609 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1610 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1612 /* Get a null-terminated copy of the name. */
1613 name
= xmemdup0 (input_line_pointer
, len
);
1615 /* Skip the name in the input line. */
1616 input_line_pointer
+= len
;
1618 default_lit_sections
.lit_prefix
= name
;
1620 /* Clear cached literal sections, since the prefix has changed. */
1621 default_lit_sections
.lit_seg
= NULL
;
1622 default_lit_sections
.lit4_seg
= NULL
;
1626 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1629 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED
)
1631 float fall_through_f
, target_f
;
1633 fall_through_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1634 if (fall_through_f
< 0)
1636 as_bad (_("fall through frequency must be greater than 0"));
1637 ignore_rest_of_line ();
1641 target_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1644 as_bad (_("branch target frequency must be greater than 0"));
1645 ignore_rest_of_line ();
1649 set_subseg_freq (now_seg
, now_subseg
, target_f
+ fall_through_f
, target_f
);
1651 demand_empty_rest_of_line ();
1655 /* Like normal .long/.short/.word, except support @plt, etc.
1656 Clobbers input_line_pointer, checks end-of-line. */
1659 xtensa_elf_cons (int nbytes
)
1662 bfd_reloc_code_real_type reloc
;
1664 md_flush_pending_output ();
1666 if (cur_vinsn
.inside_bundle
)
1667 as_bad (_("directives are not valid inside bundles"));
1669 if (is_it_end_of_statement ())
1671 demand_empty_rest_of_line ();
1678 if (exp
.X_op
== O_symbol
1679 && *input_line_pointer
== '@'
1680 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, &exp
))
1683 reloc_howto_type
*reloc_howto
=
1684 bfd_reloc_type_lookup (stdoutput
, reloc
);
1686 if (reloc
== BFD_RELOC_UNUSED
|| !reloc_howto
)
1687 as_bad (_("unsupported relocation"));
1688 else if ((reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
1689 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
1690 || (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
1691 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
))
1692 as_bad (_("opcode-specific %s relocation used outside "
1693 "an instruction"), reloc_howto
->name
);
1694 else if (nbytes
!= (int) bfd_get_reloc_size (reloc_howto
))
1695 as_bad (ngettext ("%s relocations do not fit in %d byte",
1696 "%s relocations do not fit in %d bytes",
1698 reloc_howto
->name
, nbytes
);
1699 else if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
1700 || reloc
== BFD_RELOC_XTENSA_TLS_ARG
1701 || reloc
== BFD_RELOC_XTENSA_TLS_CALL
)
1702 as_bad (_("invalid use of %s relocation"), reloc_howto
->name
);
1705 char *p
= frag_more ((int) nbytes
);
1706 xtensa_set_frag_assembly_state (frag_now
);
1707 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
1708 nbytes
, &exp
, reloc_howto
->pc_relative
, reloc
);
1713 xtensa_set_frag_assembly_state (frag_now
);
1714 emit_expr (&exp
, (unsigned int) nbytes
);
1717 while (*input_line_pointer
++ == ',');
1719 input_line_pointer
--; /* Put terminator back into stream. */
1720 demand_empty_rest_of_line ();
1723 static bfd_boolean is_leb128_expr
;
1726 xtensa_leb128 (int sign
)
1728 is_leb128_expr
= TRUE
;
1730 is_leb128_expr
= FALSE
;
1734 /* Parsing and Idiom Translation. */
1736 /* Parse @plt, etc. and return the desired relocation. */
1737 static bfd_reloc_code_real_type
1738 xtensa_elf_suffix (char **str_p
, expressionS
*exp_p
)
1748 return BFD_RELOC_NONE
;
1750 for (ch
= *str
, str2
= ident
;
1751 (str2
< ident
+ sizeof (ident
) - 1
1752 && (ISALNUM (ch
) || ch
== '@'));
1755 *str2
++ = (ISLOWER (ch
)) ? ch
: TOLOWER (ch
);
1762 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1763 if (ch
== suffix_relocs
[i
].suffix
[0]
1764 && len
== suffix_relocs
[i
].length
1765 && memcmp (ident
, suffix_relocs
[i
].suffix
, suffix_relocs
[i
].length
) == 0)
1767 /* Now check for "identifier@suffix+constant". */
1768 if (*str
== '-' || *str
== '+')
1770 char *orig_line
= input_line_pointer
;
1771 expressionS new_exp
;
1773 input_line_pointer
= str
;
1774 expression (&new_exp
);
1775 if (new_exp
.X_op
== O_constant
)
1777 exp_p
->X_add_number
+= new_exp
.X_add_number
;
1778 str
= input_line_pointer
;
1781 if (&input_line_pointer
!= str_p
)
1782 input_line_pointer
= orig_line
;
1786 return suffix_relocs
[i
].reloc
;
1789 return BFD_RELOC_UNUSED
;
1793 /* Find the matching operator type. */
1795 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc
)
1797 operatorT
operator = O_illegal
;
1800 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1802 if (suffix_relocs
[i
].reloc
== reloc
)
1804 operator = suffix_relocs
[i
].operator;
1808 gas_assert (operator != O_illegal
);
1813 /* Find the matching reloc type. */
1814 static bfd_reloc_code_real_type
1815 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal
)
1818 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
1820 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1822 if (suffix_relocs
[i
].operator == operator)
1824 reloc
= suffix_relocs
[i
].reloc
;
1831 if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
)
1832 return BFD_RELOC_XTENSA_TLSDESC_FN
;
1833 else if (reloc
== BFD_RELOC_XTENSA_TLS_ARG
)
1834 return BFD_RELOC_XTENSA_TLSDESC_ARG
;
1837 if (reloc
== BFD_RELOC_UNUSED
)
1838 return BFD_RELOC_32
;
1845 expression_end (const char *name
)
1868 #define ERROR_REG_NUM ((unsigned) -1)
1871 tc_get_register (const char *prefix
)
1874 const char *next_expr
;
1875 const char *old_line_pointer
;
1878 old_line_pointer
= input_line_pointer
;
1880 if (*input_line_pointer
== '$')
1881 ++input_line_pointer
;
1883 /* Accept "sp" as a synonym for "a1". */
1884 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1885 && expression_end (input_line_pointer
+ 2))
1887 input_line_pointer
+= 2;
1888 return 1; /* AR[1] */
1891 while (*input_line_pointer
++ == *prefix
++)
1893 --input_line_pointer
;
1898 as_bad (_("bad register name: %s"), old_line_pointer
);
1899 return ERROR_REG_NUM
;
1902 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1904 as_bad (_("bad register number: %s"), input_line_pointer
);
1905 return ERROR_REG_NUM
;
1910 while (ISDIGIT ((int) *input_line_pointer
))
1911 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1913 if (!(next_expr
= expression_end (input_line_pointer
)))
1915 as_bad (_("bad register name: %s"), old_line_pointer
);
1916 return ERROR_REG_NUM
;
1919 input_line_pointer
= (char *) next_expr
;
1926 expression_maybe_register (xtensa_opcode opc
, int opnd
, expressionS
*tok
)
1928 xtensa_isa isa
= xtensa_default_isa
;
1930 /* Check if this is an immediate operand. */
1931 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 0)
1933 bfd_reloc_code_real_type reloc
;
1934 segT t
= expression (tok
);
1936 if (t
== absolute_section
1937 && xtensa_operand_is_PCrelative (isa
, opc
, opnd
) == 1)
1939 gas_assert (tok
->X_op
== O_constant
);
1940 tok
->X_op
= O_symbol
;
1941 tok
->X_add_symbol
= &abs_symbol
;
1944 if ((tok
->X_op
== O_constant
|| tok
->X_op
== O_symbol
)
1945 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
1950 case BFD_RELOC_LO16
:
1951 if (tok
->X_op
== O_constant
)
1953 tok
->X_add_number
&= 0xffff;
1957 case BFD_RELOC_HI16
:
1958 if (tok
->X_op
== O_constant
)
1960 tok
->X_add_number
= ((unsigned) tok
->X_add_number
) >> 16;
1964 case BFD_RELOC_UNUSED
:
1965 as_bad (_("unsupported relocation"));
1967 case BFD_RELOC_32_PCREL
:
1968 as_bad (_("pcrel relocation not allowed in an instruction"));
1973 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
1978 xtensa_regfile opnd_rf
= xtensa_operand_regfile (isa
, opc
, opnd
);
1979 unsigned reg
= tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
));
1981 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1984 if (xtensa_operand_encode (isa
, opc
, opnd
, &buf
))
1985 as_bad (_("register number out of range"));
1988 tok
->X_op
= O_register
;
1989 tok
->X_add_symbol
= 0;
1990 tok
->X_add_number
= reg
;
1995 /* Split up the arguments for an opcode or pseudo-op. */
1998 tokenize_arguments (char **args
, char *str
)
2000 char *old_input_line_pointer
;
2001 bfd_boolean saw_comma
= FALSE
;
2002 bfd_boolean saw_arg
= FALSE
;
2003 bfd_boolean saw_colon
= FALSE
;
2005 char *arg_end
, *arg
;
2008 /* Save and restore input_line_pointer around this function. */
2009 old_input_line_pointer
= input_line_pointer
;
2010 input_line_pointer
= str
;
2012 while (*input_line_pointer
)
2015 switch (*input_line_pointer
)
2022 input_line_pointer
++;
2023 if (saw_comma
|| saw_colon
|| !saw_arg
)
2029 input_line_pointer
++;
2030 if (saw_comma
|| saw_colon
|| !saw_arg
)
2036 if (!saw_comma
&& !saw_colon
&& saw_arg
)
2039 arg_end
= input_line_pointer
+ 1;
2040 while (!expression_end (arg_end
))
2043 arg_len
= arg_end
- input_line_pointer
;
2044 arg
= XNEWVEC (char, (saw_colon
? 1 : 0) + arg_len
+ 1);
2045 args
[num_args
] = arg
;
2049 strncpy (arg
, input_line_pointer
, arg_len
);
2050 arg
[arg_len
] = '\0';
2052 input_line_pointer
= arg_end
;
2062 if (saw_comma
|| saw_colon
)
2064 input_line_pointer
= old_input_line_pointer
;
2069 as_bad (_("extra comma"));
2071 as_bad (_("extra colon"));
2073 as_bad (_("missing argument"));
2075 as_bad (_("missing comma or colon"));
2076 input_line_pointer
= old_input_line_pointer
;
2081 /* Parse the arguments to an opcode. Return TRUE on error. */
2084 parse_arguments (TInsn
*insn
, int num_args
, char **arg_strings
)
2086 expressionS
*tok
, *last_tok
;
2087 xtensa_opcode opcode
= insn
->opcode
;
2088 bfd_boolean had_error
= TRUE
;
2089 xtensa_isa isa
= xtensa_default_isa
;
2090 int n
, num_regs
= 0;
2091 int opcode_operand_count
;
2092 int opnd_cnt
, last_opnd_cnt
;
2093 unsigned int next_reg
= 0;
2094 char *old_input_line_pointer
;
2096 if (insn
->insn_type
== ITYPE_LITERAL
)
2097 opcode_operand_count
= 1;
2099 opcode_operand_count
= xtensa_opcode_num_operands (isa
, opcode
);
2102 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
2104 /* Save and restore input_line_pointer around this function. */
2105 old_input_line_pointer
= input_line_pointer
;
2111 /* Skip invisible operands. */
2112 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0)
2118 for (n
= 0; n
< num_args
; n
++)
2120 input_line_pointer
= arg_strings
[n
];
2121 if (*input_line_pointer
== ':')
2123 xtensa_regfile opnd_rf
;
2124 input_line_pointer
++;
2127 gas_assert (opnd_cnt
> 0);
2129 opnd_rf
= xtensa_operand_regfile (isa
, opcode
, last_opnd_cnt
);
2131 != tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
)))
2132 as_warn (_("incorrect register number, ignoring"));
2137 if (opnd_cnt
>= opcode_operand_count
)
2139 as_warn (_("too many arguments"));
2142 gas_assert (opnd_cnt
< MAX_INSN_ARGS
);
2144 expression_maybe_register (opcode
, opnd_cnt
, tok
);
2145 next_reg
= tok
->X_add_number
+ 1;
2147 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2149 if (xtensa_operand_is_register (isa
, opcode
, opnd_cnt
) == 1)
2151 num_regs
= xtensa_operand_num_regs (isa
, opcode
, opnd_cnt
) - 1;
2152 /* minus 1 because we are seeing one right now */
2158 last_opnd_cnt
= opnd_cnt
;
2159 demand_empty_rest_of_line ();
2166 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0);
2170 if (num_regs
> 0 && ((int) next_reg
!= last_tok
->X_add_number
+ 1))
2173 insn
->ntok
= tok
- insn
->tok
;
2177 input_line_pointer
= old_input_line_pointer
;
2183 get_invisible_operands (TInsn
*insn
)
2185 xtensa_isa isa
= xtensa_default_isa
;
2186 static xtensa_insnbuf slotbuf
= NULL
;
2188 xtensa_opcode opc
= insn
->opcode
;
2189 int slot
, opnd
, fmt_found
;
2193 slotbuf
= xtensa_insnbuf_alloc (isa
);
2195 /* Find format/slot where this can be encoded. */
2198 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
2200 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
2202 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opc
) == 0)
2208 if (fmt_found
) break;
2213 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa
, opc
));
2217 /* First encode all the visible operands
2218 (to deal with shared field operands). */
2219 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2221 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 1
2222 && (insn
->tok
[opnd
].X_op
== O_register
2223 || insn
->tok
[opnd
].X_op
== O_constant
))
2225 val
= insn
->tok
[opnd
].X_add_number
;
2226 xtensa_operand_encode (isa
, opc
, opnd
, &val
);
2227 xtensa_operand_set_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, val
);
2231 /* Then pull out the values for the invisible ones. */
2232 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2234 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 0)
2236 xtensa_operand_get_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, &val
);
2237 xtensa_operand_decode (isa
, opc
, opnd
, &val
);
2238 insn
->tok
[opnd
].X_add_number
= val
;
2239 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 1)
2240 insn
->tok
[opnd
].X_op
= O_register
;
2242 insn
->tok
[opnd
].X_op
= O_constant
;
2251 xg_reverse_shift_count (char **cnt_argp
)
2253 char *cnt_arg
, *new_arg
;
2254 cnt_arg
= *cnt_argp
;
2256 /* replace the argument with "31-(argument)" */
2257 new_arg
= concat ("31-(", cnt_arg
, ")", (char *) NULL
);
2260 *cnt_argp
= new_arg
;
2264 /* If "arg" is a constant expression, return non-zero with the value
2268 xg_arg_is_constant (char *arg
, offsetT
*valp
)
2271 char *save_ptr
= input_line_pointer
;
2273 input_line_pointer
= arg
;
2275 input_line_pointer
= save_ptr
;
2277 if (exp
.X_op
== O_constant
)
2279 *valp
= exp
.X_add_number
;
2288 xg_replace_opname (char **popname
, const char *newop
)
2291 *popname
= xstrdup (newop
);
2296 xg_check_num_args (int *pnum_args
,
2301 int num_args
= *pnum_args
;
2303 if (num_args
< expected_num
)
2305 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2306 num_args
, opname
, expected_num
);
2310 if (num_args
> expected_num
)
2312 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2313 num_args
, opname
, expected_num
);
2314 while (num_args
-- > expected_num
)
2316 free (arg_strings
[num_args
]);
2317 arg_strings
[num_args
] = 0;
2319 *pnum_args
= expected_num
;
2327 /* If the register is not specified as part of the opcode,
2328 then get it from the operand and move it to the opcode. */
2331 xg_translate_sysreg_op (char **popname
, int *pnum_args
, char **arg_strings
)
2333 xtensa_isa isa
= xtensa_default_isa
;
2335 char *opname
, *new_opname
;
2336 const char *sr_name
;
2337 int is_user
, is_write
;
2342 is_user
= (opname
[1] == 'u');
2343 is_write
= (opname
[0] == 'w');
2345 /* Opname == [rw]ur or [rwx]sr... */
2347 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2350 /* Check if the argument is a symbolic register name. */
2351 sr
= xtensa_sysreg_lookup_name (isa
, arg_strings
[1]);
2352 /* Handle WSR to "INTSET" as a special case. */
2353 if (sr
== XTENSA_UNDEFINED
&& is_write
&& !is_user
2354 && !strcasecmp (arg_strings
[1], "intset"))
2355 sr
= xtensa_sysreg_lookup_name (isa
, "interrupt");
2356 if (sr
== XTENSA_UNDEFINED
2357 || (xtensa_sysreg_is_user (isa
, sr
) == 1) != is_user
)
2359 /* Maybe it's a register number.... */
2361 if (!xg_arg_is_constant (arg_strings
[1], &val
))
2363 as_bad (_("invalid register '%s' for '%s' instruction"),
2364 arg_strings
[1], opname
);
2367 sr
= xtensa_sysreg_lookup (isa
, val
, is_user
);
2368 if (sr
== XTENSA_UNDEFINED
)
2370 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2371 (long) val
, opname
);
2376 /* Remove the last argument, which is now part of the opcode. */
2377 free (arg_strings
[1]);
2381 /* Translate the opcode. */
2382 sr_name
= xtensa_sysreg_name (isa
, sr
);
2383 /* Another special case for "WSR.INTSET".... */
2384 if (is_write
&& !is_user
&& !strcasecmp ("interrupt", sr_name
))
2386 new_opname
= concat (*popname
, ".", sr_name
, (char *) NULL
);
2388 *popname
= new_opname
;
2395 xtensa_translate_old_userreg_ops (char **popname
)
2397 xtensa_isa isa
= xtensa_default_isa
;
2399 char *opname
, *new_opname
;
2400 const char *sr_name
;
2401 bfd_boolean has_underbar
= FALSE
;
2404 if (opname
[0] == '_')
2406 has_underbar
= TRUE
;
2410 sr
= xtensa_sysreg_lookup_name (isa
, opname
+ 1);
2411 if (sr
!= XTENSA_UNDEFINED
)
2413 /* The new default name ("nnn") is different from the old default
2414 name ("URnnn"). The old default is handled below, and we don't
2415 want to recognize [RW]nnn, so do nothing if the name is the (new)
2417 static char namebuf
[10];
2418 sprintf (namebuf
, "%d", xtensa_sysreg_number (isa
, sr
));
2419 if (strcmp (namebuf
, opname
+ 1) == 0)
2427 /* Only continue if the reg name is "URnnn". */
2428 if (opname
[1] != 'u' || opname
[2] != 'r')
2430 val
= strtoul (opname
+ 3, &end
, 10);
2434 sr
= xtensa_sysreg_lookup (isa
, val
, 1);
2435 if (sr
== XTENSA_UNDEFINED
)
2437 as_bad (_("invalid register number (%ld) for '%s'"),
2438 (long) val
, opname
);
2443 /* Translate the opcode. */
2444 sr_name
= xtensa_sysreg_name (isa
, sr
);
2445 new_opname
= XNEWVEC (char, strlen (sr_name
) + 6);
2446 sprintf (new_opname
, "%s%cur.%s", (has_underbar
? "_" : ""),
2447 opname
[0], sr_name
);
2449 *popname
= new_opname
;
2456 xtensa_translate_zero_immed (const char *old_op
,
2466 gas_assert (opname
[0] != '_');
2468 if (strcmp (opname
, old_op
) != 0)
2471 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2473 if (xg_arg_is_constant (arg_strings
[1], &val
) && val
== 0)
2475 xg_replace_opname (popname
, new_op
);
2476 free (arg_strings
[1]);
2477 arg_strings
[1] = arg_strings
[2];
2486 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2487 Returns non-zero if an error was found. */
2490 xg_translate_idioms (char **popname
, int *pnum_args
, char **arg_strings
)
2492 char *opname
= *popname
;
2493 bfd_boolean has_underbar
= FALSE
;
2497 has_underbar
= TRUE
;
2501 if (strcmp (opname
, "mov") == 0)
2503 if (use_transform () && !has_underbar
&& density_supported
)
2504 xg_replace_opname (popname
, "mov.n");
2507 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2509 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2510 arg_strings
[2] = xstrdup (arg_strings
[1]);
2516 if (strcmp (opname
, "bbsi.l") == 0)
2518 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2520 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2521 if (target_big_endian
)
2522 xg_reverse_shift_count (&arg_strings
[1]);
2526 if (strcmp (opname
, "bbci.l") == 0)
2528 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2530 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2531 if (target_big_endian
)
2532 xg_reverse_shift_count (&arg_strings
[1]);
2536 /* Don't do anything special with NOPs inside FLIX instructions. They
2537 are handled elsewhere. Real NOP instructions are always available
2538 in configurations with FLIX, so this should never be an issue but
2539 check for it anyway. */
2540 if (!cur_vinsn
.inside_bundle
&& xtensa_nop_opcode
== XTENSA_UNDEFINED
2541 && strcmp (opname
, "nop") == 0)
2543 if (use_transform () && !has_underbar
&& density_supported
)
2544 xg_replace_opname (popname
, "nop.n");
2547 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2549 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2550 arg_strings
[0] = xstrdup ("a1");
2551 arg_strings
[1] = xstrdup ("a1");
2552 arg_strings
[2] = xstrdup ("a1");
2558 /* Recognize [RW]UR and [RWX]SR. */
2559 if ((((opname
[0] == 'r' || opname
[0] == 'w')
2560 && (opname
[1] == 'u' || opname
[1] == 's'))
2561 || (opname
[0] == 'x' && opname
[1] == 's'))
2563 && opname
[3] == '\0')
2564 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2566 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2567 [RW]<name> if <name> is the non-default name of a user register. */
2568 if ((opname
[0] == 'r' || opname
[0] == 'w')
2569 && xtensa_opcode_lookup (xtensa_default_isa
, opname
) == XTENSA_UNDEFINED
)
2570 return xtensa_translate_old_userreg_ops (popname
);
2572 /* Relax branches that don't allow comparisons against an immediate value
2573 of zero to the corresponding branches with implicit zero immediates. */
2574 if (!has_underbar
&& use_transform ())
2576 if (xtensa_translate_zero_immed ("bnei", "bnez", popname
,
2577 pnum_args
, arg_strings
))
2580 if (xtensa_translate_zero_immed ("beqi", "beqz", popname
,
2581 pnum_args
, arg_strings
))
2584 if (xtensa_translate_zero_immed ("bgei", "bgez", popname
,
2585 pnum_args
, arg_strings
))
2588 if (xtensa_translate_zero_immed ("blti", "bltz", popname
,
2589 pnum_args
, arg_strings
))
2597 /* Functions for dealing with the Xtensa ISA. */
2599 /* Currently the assembler only allows us to use a single target per
2600 fragment. Because of this, only one operand for a given
2601 instruction may be symbolic. If there is a PC-relative operand,
2602 the last one is chosen. Otherwise, the result is the number of the
2603 last immediate operand, and if there are none of those, we fail and
2607 get_relaxable_immed (xtensa_opcode opcode
)
2609 int last_immed
= -1;
2612 if (opcode
== XTENSA_UNDEFINED
)
2615 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
, opcode
);
2616 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2618 if (xtensa_operand_is_visible (xtensa_default_isa
, opcode
, opi
) == 0)
2620 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, opi
) == 1)
2622 if (last_immed
== -1
2623 && xtensa_operand_is_register (xtensa_default_isa
, opcode
, opi
) == 0)
2630 static xtensa_opcode
2631 get_opcode_from_buf (const char *buf
, int slot
)
2633 static xtensa_insnbuf insnbuf
= NULL
;
2634 static xtensa_insnbuf slotbuf
= NULL
;
2635 xtensa_isa isa
= xtensa_default_isa
;
2640 insnbuf
= xtensa_insnbuf_alloc (isa
);
2641 slotbuf
= xtensa_insnbuf_alloc (isa
);
2644 xtensa_insnbuf_from_chars (isa
, insnbuf
, (const unsigned char *) buf
, 0);
2645 fmt
= xtensa_format_decode (isa
, insnbuf
);
2646 if (fmt
== XTENSA_UNDEFINED
)
2647 return XTENSA_UNDEFINED
;
2649 if (slot
>= xtensa_format_num_slots (isa
, fmt
))
2650 return XTENSA_UNDEFINED
;
2652 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
2653 return xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
2657 #ifdef TENSILICA_DEBUG
2659 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2662 xtensa_print_insn_table (void)
2664 int num_opcodes
, num_operands
;
2665 xtensa_opcode opcode
;
2666 xtensa_isa isa
= xtensa_default_isa
;
2668 num_opcodes
= xtensa_isa_num_opcodes (xtensa_default_isa
);
2669 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
2672 fprintf (stderr
, "%d: %s: ", opcode
, xtensa_opcode_name (isa
, opcode
));
2673 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2674 for (opn
= 0; opn
< num_operands
; opn
++)
2676 if (xtensa_operand_is_visible (isa
, opcode
, opn
) == 0)
2678 if (xtensa_operand_is_register (isa
, opcode
, opn
) == 1)
2680 xtensa_regfile opnd_rf
=
2681 xtensa_operand_regfile (isa
, opcode
, opn
);
2682 fprintf (stderr
, "%s ", xtensa_regfile_shortname (isa
, opnd_rf
));
2684 else if (xtensa_operand_is_PCrelative (isa
, opcode
, opn
) == 1)
2685 fputs ("[lLr] ", stderr
);
2687 fputs ("i ", stderr
);
2689 fprintf (stderr
, "\n");
2695 print_vliw_insn (xtensa_insnbuf vbuf
)
2697 xtensa_isa isa
= xtensa_default_isa
;
2698 xtensa_format f
= xtensa_format_decode (isa
, vbuf
);
2699 xtensa_insnbuf sbuf
= xtensa_insnbuf_alloc (isa
);
2702 fprintf (stderr
, "format = %d\n", f
);
2704 for (op
= 0; op
< xtensa_format_num_slots (isa
, f
); op
++)
2706 xtensa_opcode opcode
;
2710 xtensa_format_get_slot (isa
, f
, op
, vbuf
, sbuf
);
2711 opcode
= xtensa_opcode_decode (isa
, f
, op
, sbuf
);
2712 opname
= xtensa_opcode_name (isa
, opcode
);
2714 fprintf (stderr
, "op in slot %i is %s;\n", op
, opname
);
2715 fprintf (stderr
, " operands = ");
2717 operands
< xtensa_opcode_num_operands (isa
, opcode
);
2721 if (xtensa_operand_is_visible (isa
, opcode
, operands
) == 0)
2723 xtensa_operand_get_field (isa
, opcode
, operands
, f
, op
, sbuf
, &val
);
2724 xtensa_operand_decode (isa
, opcode
, operands
, &val
);
2725 fprintf (stderr
, "%d ", val
);
2727 fprintf (stderr
, "\n");
2729 xtensa_insnbuf_free (isa
, sbuf
);
2732 #endif /* TENSILICA_DEBUG */
2736 is_direct_call_opcode (xtensa_opcode opcode
)
2738 xtensa_isa isa
= xtensa_default_isa
;
2739 int n
, num_operands
;
2741 if (xtensa_opcode_is_call (isa
, opcode
) != 1)
2744 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2745 for (n
= 0; n
< num_operands
; n
++)
2747 if (xtensa_operand_is_register (isa
, opcode
, n
) == 0
2748 && xtensa_operand_is_PCrelative (isa
, opcode
, n
) == 1)
2755 /* Convert from BFD relocation type code to slot and operand number.
2756 Returns non-zero on failure. */
2759 decode_reloc (bfd_reloc_code_real_type reloc
, int *slot
, bfd_boolean
*is_alt
)
2761 if (reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
2762 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
2764 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_OP
;
2767 else if (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
2768 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
)
2770 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_ALT
;
2780 /* Convert from slot number to BFD relocation type code for the
2781 standard PC-relative relocations. Return BFD_RELOC_NONE on
2784 static bfd_reloc_code_real_type
2785 encode_reloc (int slot
)
2787 if (slot
< 0 || slot
> 14)
2788 return BFD_RELOC_NONE
;
2790 return BFD_RELOC_XTENSA_SLOT0_OP
+ slot
;
2794 /* Convert from slot numbers to BFD relocation type code for the
2795 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2797 static bfd_reloc_code_real_type
2798 encode_alt_reloc (int slot
)
2800 if (slot
< 0 || slot
> 14)
2801 return BFD_RELOC_NONE
;
2803 return BFD_RELOC_XTENSA_SLOT0_ALT
+ slot
;
2808 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf
,
2811 xtensa_opcode opcode
,
2817 uint32 valbuf
= value
;
2819 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
2821 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, operand
)
2823 as_bad_where ((char *) file
, line
,
2824 _("operand %d of '%s' has out of range value '%u'"),
2826 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2829 as_bad_where ((char *) file
, line
,
2830 _("operand %d of '%s' has invalid value '%u'"),
2832 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2837 xtensa_operand_set_field (xtensa_default_isa
, opcode
, operand
, fmt
, slot
,
2843 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf
,
2846 xtensa_opcode opcode
,
2850 (void) xtensa_operand_get_field (xtensa_default_isa
, opcode
, opnum
,
2851 fmt
, slot
, slotbuf
, &val
);
2852 (void) xtensa_operand_decode (xtensa_default_isa
, opcode
, opnum
, &val
);
2857 /* Checks for rules from xtensa-relax tables. */
2859 /* The routine xg_instruction_matches_option_term must return TRUE
2860 when a given option term is true. The meaning of all of the option
2861 terms is given interpretation by this function. */
2864 xg_instruction_matches_option_term (TInsn
*insn
, const ReqOrOption
*option
)
2866 if (strcmp (option
->option_name
, "realnop") == 0
2867 || strncmp (option
->option_name
, "IsaUse", 6) == 0)
2869 /* These conditions were evaluated statically when building the
2870 relaxation table. There's no need to reevaluate them now. */
2873 else if (strcmp (option
->option_name
, "FREEREG") == 0)
2874 return insn
->extra_arg
.X_op
== O_register
;
2877 as_fatal (_("internal error: unknown option name '%s'"),
2878 option
->option_name
);
2884 xg_instruction_matches_or_options (TInsn
*insn
,
2885 const ReqOrOptionList
*or_option
)
2887 const ReqOrOption
*option
;
2888 /* Must match each of the AND terms. */
2889 for (option
= or_option
; option
!= NULL
; option
= option
->next
)
2891 if (xg_instruction_matches_option_term (insn
, option
))
2899 xg_instruction_matches_options (TInsn
*insn
, const ReqOptionList
*options
)
2901 const ReqOption
*req_options
;
2902 /* Must match each of the AND terms. */
2903 for (req_options
= options
;
2904 req_options
!= NULL
;
2905 req_options
= req_options
->next
)
2907 /* Must match one of the OR clauses. */
2908 if (!xg_instruction_matches_or_options (insn
,
2909 req_options
->or_option_terms
))
2916 /* Return the transition rule that matches or NULL if none matches. */
2919 xg_instruction_matches_rule (TInsn
*insn
, TransitionRule
*rule
)
2921 PreconditionList
*condition_l
;
2923 if (rule
->opcode
!= insn
->opcode
)
2926 for (condition_l
= rule
->conditions
;
2927 condition_l
!= NULL
;
2928 condition_l
= condition_l
->next
)
2932 Precondition
*cond
= condition_l
->precond
;
2937 /* The expression must be the constant. */
2938 gas_assert (cond
->op_num
< insn
->ntok
);
2939 exp1
= &insn
->tok
[cond
->op_num
];
2940 if (expr_is_const (exp1
))
2945 if (get_expr_const (exp1
) != cond
->op_data
)
2949 if (get_expr_const (exp1
) == cond
->op_data
)
2956 else if (expr_is_register (exp1
))
2961 if (get_expr_register (exp1
) != cond
->op_data
)
2965 if (get_expr_register (exp1
) == cond
->op_data
)
2977 gas_assert (cond
->op_num
< insn
->ntok
);
2978 gas_assert (cond
->op_data
< insn
->ntok
);
2979 exp1
= &insn
->tok
[cond
->op_num
];
2980 exp2
= &insn
->tok
[cond
->op_data
];
2985 if (!expr_is_equal (exp1
, exp2
))
2989 if (expr_is_equal (exp1
, exp2
))
3001 if (!xg_instruction_matches_options (insn
, rule
->options
))
3009 transition_rule_cmp (const TransitionRule
*a
, const TransitionRule
*b
)
3011 bfd_boolean a_greater
= FALSE
;
3012 bfd_boolean b_greater
= FALSE
;
3014 ReqOptionList
*l_a
= a
->options
;
3015 ReqOptionList
*l_b
= b
->options
;
3017 /* We only care if they both are the same except for
3018 a const16 vs. an l32r. */
3020 while (l_a
&& l_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3022 ReqOrOptionList
*l_or_a
= l_a
->or_option_terms
;
3023 ReqOrOptionList
*l_or_b
= l_b
->or_option_terms
;
3024 while (l_or_a
&& l_or_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3026 if (l_or_a
->is_true
!= l_or_b
->is_true
)
3028 if (strcmp (l_or_a
->option_name
, l_or_b
->option_name
) != 0)
3030 /* This is the case we care about. */
3031 if (strcmp (l_or_a
->option_name
, "IsaUseConst16") == 0
3032 && strcmp (l_or_b
->option_name
, "IsaUseL32R") == 0)
3039 else if (strcmp (l_or_a
->option_name
, "IsaUseL32R") == 0
3040 && strcmp (l_or_b
->option_name
, "IsaUseConst16") == 0)
3050 l_or_a
= l_or_a
->next
;
3051 l_or_b
= l_or_b
->next
;
3053 if (l_or_a
|| l_or_b
)
3062 /* Incomparable if the substitution was used differently in two cases. */
3063 if (a_greater
&& b_greater
)
3075 static TransitionRule
*
3076 xg_instruction_match (TInsn
*insn
)
3078 TransitionTable
*table
= xg_build_simplify_table (&transition_rule_cmp
);
3080 gas_assert (insn
->opcode
< table
->num_opcodes
);
3082 /* Walk through all of the possible transitions. */
3083 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3085 TransitionRule
*rule
= l
->rule
;
3086 if (xg_instruction_matches_rule (insn
, rule
))
3093 /* Various Other Internal Functions. */
3096 is_unique_insn_expansion (TransitionRule
*r
)
3098 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
3100 if (r
->to_instr
->typ
!= INSTR_INSTR
)
3106 /* Check if there is exactly one relaxation for INSN that converts it to
3107 another instruction of equal or larger size. If so, and if TARG is
3108 non-null, go ahead and generate the relaxed instruction into TARG. If
3109 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3110 instruction, i.e., ignore relaxations that convert to an instruction of
3111 equal size. In some contexts where this function is used, only
3112 a single widening is allowed and the NARROW_ONLY argument is used to
3113 exclude cases like ADDI being "widened" to an ADDMI, which may
3114 later be relaxed to an ADDMI/ADDI pair. */
3117 xg_is_single_relaxable_insn (TInsn
*insn
, TInsn
*targ
, bfd_boolean narrow_only
)
3119 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3121 TransitionRule
*match
= 0;
3123 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3124 gas_assert (insn
->opcode
< table
->num_opcodes
);
3126 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3128 TransitionRule
*rule
= l
->rule
;
3130 if (xg_instruction_matches_rule (insn
, rule
)
3131 && is_unique_insn_expansion (rule
)
3132 && (xg_get_single_size (insn
->opcode
) + (narrow_only
? 1 : 0)
3133 <= xg_get_single_size (rule
->to_instr
->opcode
)))
3144 xg_build_to_insn (targ
, insn
, match
->to_instr
);
3149 /* Return the maximum number of bytes this opcode can expand to. */
3152 xg_get_max_insn_widen_size (xtensa_opcode opcode
)
3154 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3156 int max_size
= xg_get_single_size (opcode
);
3158 gas_assert (opcode
< table
->num_opcodes
);
3160 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3162 TransitionRule
*rule
= l
->rule
;
3163 BuildInstr
*build_list
;
3168 build_list
= rule
->to_instr
;
3169 if (is_unique_insn_expansion (rule
))
3171 gas_assert (build_list
->typ
== INSTR_INSTR
);
3172 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
3175 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3177 switch (build_list
->typ
)
3180 this_size
+= xg_get_single_size (build_list
->opcode
);
3182 case INSTR_LITERAL_DEF
:
3183 case INSTR_LABEL_DEF
:
3188 if (this_size
> max_size
)
3189 max_size
= this_size
;
3195 /* Return the maximum number of literal bytes this opcode can generate. */
3198 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode
)
3200 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3204 gas_assert (opcode
< table
->num_opcodes
);
3206 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3208 TransitionRule
*rule
= l
->rule
;
3209 BuildInstr
*build_list
;
3214 build_list
= rule
->to_instr
;
3215 if (is_unique_insn_expansion (rule
))
3217 gas_assert (build_list
->typ
== INSTR_INSTR
);
3218 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
3221 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3223 switch (build_list
->typ
)
3225 case INSTR_LITERAL_DEF
:
3226 /* Hard-coded 4-byte literal. */
3230 case INSTR_LABEL_DEF
:
3235 if (this_size
> max_size
)
3236 max_size
= this_size
;
3243 xg_is_relaxable_insn (TInsn
*insn
, int lateral_steps
)
3245 int steps_taken
= 0;
3246 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3249 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3250 gas_assert (insn
->opcode
< table
->num_opcodes
);
3252 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3254 TransitionRule
*rule
= l
->rule
;
3256 if (xg_instruction_matches_rule (insn
, rule
))
3258 if (steps_taken
== lateral_steps
)
3268 get_special_literal_symbol (void)
3270 static symbolS
*sym
= NULL
;
3273 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
3279 get_special_label_symbol (void)
3281 static symbolS
*sym
= NULL
;
3284 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
3290 xg_valid_literal_expression (const expressionS
*exp
)
3312 /* This will check to see if the value can be converted into the
3313 operand type. It will return TRUE if it does not fit. */
3316 xg_check_operand (int32 value
, xtensa_opcode opcode
, int operand
)
3318 uint32 valbuf
= value
;
3319 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
3325 /* Assumes: All immeds are constants. Check that all constants fit
3326 into their immeds; return FALSE if not. */
3329 xg_immeds_fit (const TInsn
*insn
)
3331 xtensa_isa isa
= xtensa_default_isa
;
3335 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3336 for (i
= 0; i
< n
; ++i
)
3338 const expressionS
*exp
= &insn
->tok
[i
];
3340 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3347 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3352 /* The symbol should have a fixup associated with it. */
3361 /* This should only be called after we have an initial
3362 estimate of the addresses. */
3365 xg_symbolic_immeds_fit (const TInsn
*insn
,
3371 xtensa_isa isa
= xtensa_default_isa
;
3379 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3381 for (i
= 0; i
< n
; ++i
)
3383 const expressionS
*exp
= &insn
->tok
[i
];
3385 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3392 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3398 /* Check for the worst case. */
3399 if (xg_check_operand (0xffff, insn
->opcode
, i
))
3404 /* We only allow symbols for PC-relative references.
3405 If pc_frag == 0, then we don't have frag locations yet. */
3407 || xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 0)
3410 /* If it is a weak symbol or a symbol in a different section,
3411 it cannot be known to fit at assembly time. */
3412 if (S_IS_WEAK (exp
->X_add_symbol
)
3413 || S_GET_SEGMENT (exp
->X_add_symbol
) != pc_seg
)
3415 /* For a direct call with --no-longcalls, be optimistic and
3416 assume it will be in range. If the symbol is weak and
3417 undefined, it may remain undefined at link-time, in which
3418 case it will have a zero value and almost certainly be out
3419 of range for a direct call; thus, relax for undefined weak
3420 symbols even if longcalls is not enabled. */
3421 if (is_direct_call_opcode (insn
->opcode
)
3422 && ! pc_frag
->tc_frag_data
.use_longcalls
3423 && (! S_IS_WEAK (exp
->X_add_symbol
)
3424 || S_IS_DEFINED (exp
->X_add_symbol
)))
3430 symbolP
= exp
->X_add_symbol
;
3431 sym_frag
= symbol_get_frag (symbolP
);
3432 target
= S_GET_VALUE (symbolP
) + exp
->X_add_number
;
3433 pc
= pc_frag
->fr_address
+ pc_offset
;
3435 /* If frag has yet to be reached on this pass, assume it
3436 will move by STRETCH just as we did. If this is not so,
3437 it will be because some frag between grows, and that will
3438 force another pass. Beware zero-length frags. There
3439 should be a faster way to do this. */
3442 && sym_frag
->relax_marker
!= pc_frag
->relax_marker
3443 && S_GET_SEGMENT (symbolP
) == pc_seg
)
3448 new_offset
= target
;
3449 xtensa_operand_do_reloc (isa
, insn
->opcode
, i
, &new_offset
, pc
);
3450 if (xg_check_operand (new_offset
, insn
->opcode
, i
))
3455 /* The symbol should have a fixup associated with it. */
3464 /* Return TRUE on success. */
3467 xg_build_to_insn (TInsn
*targ
, TInsn
*insn
, BuildInstr
*bi
)
3473 targ
->debug_line
= insn
->debug_line
;
3474 targ
->loc_directive_seen
= insn
->loc_directive_seen
;
3479 targ
->opcode
= bi
->opcode
;
3480 targ
->insn_type
= ITYPE_INSN
;
3481 targ
->is_specific_opcode
= FALSE
;
3483 for (; op
!= NULL
; op
= op
->next
)
3485 int op_num
= op
->op_num
;
3486 int op_data
= op
->op_data
;
3488 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3490 if (targ
->ntok
<= op_num
)
3491 targ
->ntok
= op_num
+ 1;
3496 set_expr_const (&targ
->tok
[op_num
], op_data
);
3499 gas_assert (op_data
< insn
->ntok
);
3500 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3503 if (insn
->extra_arg
.X_op
!= O_register
)
3505 copy_expr (&targ
->tok
[op_num
], &insn
->extra_arg
);
3508 sym
= get_special_literal_symbol ();
3509 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3510 if (insn
->tok
[op_data
].X_op
== O_tlsfunc
3511 || insn
->tok
[op_data
].X_op
== O_tlsarg
)
3512 copy_expr (&targ
->extra_arg
, &insn
->tok
[op_data
]);
3515 sym
= get_special_label_symbol ();
3516 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3518 case OP_OPERAND_HI16U
:
3519 case OP_OPERAND_LOW16U
:
3520 gas_assert (op_data
< insn
->ntok
);
3521 if (expr_is_const (&insn
->tok
[op_data
]))
3524 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3525 val
= xg_apply_userdef_op_fn (op
->typ
,
3528 targ
->tok
[op_num
].X_add_number
= val
;
3532 /* For const16 we can create relocations for these. */
3533 if (targ
->opcode
== XTENSA_UNDEFINED
3534 || (targ
->opcode
!= xtensa_const16_opcode
))
3536 gas_assert (op_data
< insn
->ntok
);
3537 /* Need to build a O_lo16 or O_hi16. */
3538 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3539 if (targ
->tok
[op_num
].X_op
== O_symbol
)
3541 if (op
->typ
== OP_OPERAND_HI16U
)
3542 targ
->tok
[op_num
].X_op
= O_hi16
;
3543 else if (op
->typ
== OP_OPERAND_LOW16U
)
3544 targ
->tok
[op_num
].X_op
= O_lo16
;
3551 /* currently handles:
3554 OP_OPERAND_F32MINUS */
3555 if (xg_has_userdef_op_fn (op
->typ
))
3557 gas_assert (op_data
< insn
->ntok
);
3558 if (expr_is_const (&insn
->tok
[op_data
]))
3561 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3562 val
= xg_apply_userdef_op_fn (op
->typ
,
3565 targ
->tok
[op_num
].X_add_number
= val
;
3568 return FALSE
; /* We cannot use a relocation for this. */
3577 case INSTR_LITERAL_DEF
:
3579 targ
->opcode
= XTENSA_UNDEFINED
;
3580 targ
->insn_type
= ITYPE_LITERAL
;
3581 targ
->is_specific_opcode
= FALSE
;
3582 for (; op
!= NULL
; op
= op
->next
)
3584 int op_num
= op
->op_num
;
3585 int op_data
= op
->op_data
;
3586 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3588 if (targ
->ntok
<= op_num
)
3589 targ
->ntok
= op_num
+ 1;
3594 gas_assert (op_data
< insn
->ntok
);
3595 /* We can only pass resolvable literals through. */
3596 if (!xg_valid_literal_expression (&insn
->tok
[op_data
]))
3598 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3610 case INSTR_LABEL_DEF
:
3612 targ
->opcode
= XTENSA_UNDEFINED
;
3613 targ
->insn_type
= ITYPE_LABEL
;
3614 targ
->is_specific_opcode
= FALSE
;
3615 /* Literal with no ops is a label? */
3616 gas_assert (op
== NULL
);
3627 /* Return TRUE on success. */
3630 xg_build_to_stack (IStack
*istack
, TInsn
*insn
, BuildInstr
*bi
)
3632 for (; bi
!= NULL
; bi
= bi
->next
)
3634 TInsn
*next_insn
= istack_push_space (istack
);
3636 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3643 /* Return TRUE on valid expansion. */
3646 xg_expand_to_stack (IStack
*istack
, TInsn
*insn
, int lateral_steps
)
3648 int stack_size
= istack
->ninsn
;
3649 int steps_taken
= 0;
3650 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3653 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3654 gas_assert (insn
->opcode
< table
->num_opcodes
);
3656 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3658 TransitionRule
*rule
= l
->rule
;
3660 if (xg_instruction_matches_rule (insn
, rule
))
3662 if (lateral_steps
== steps_taken
)
3666 /* This is it. Expand the rule to the stack. */
3667 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3670 /* Check to see if it fits. */
3671 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3673 TInsn
*tinsn
= &istack
->insn
[i
];
3675 if (tinsn
->insn_type
== ITYPE_INSN
3676 && !tinsn_has_symbolic_operands (tinsn
)
3677 && !xg_immeds_fit (tinsn
))
3679 istack
->ninsn
= stack_size
;
3692 /* Relax the assembly instruction at least "min_steps".
3693 Return the number of steps taken.
3695 For relaxation to correctly terminate, every relaxation chain must
3696 terminate in one of two ways:
3698 1. If the chain from one instruction to the next consists entirely of
3699 single instructions, then the chain *must* handle all possible
3700 immediates without failing. It must not ever fail because an
3701 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3702 chain is one example. L32R loads 32 bits, and there cannot be an
3703 immediate larger than 32 bits, so it satisfies this condition.
3704 Single instruction relaxation chains are as defined by
3705 xg_is_single_relaxable_instruction.
3707 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3708 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3710 Strictly speaking, in most cases you can violate condition 1 and be OK
3711 -- in particular when the last two instructions have the same single
3712 size. But nevertheless, you should guarantee the above two conditions.
3714 We could fix this so that single-instruction expansions correctly
3715 terminate when they can't handle the range, but the error messages are
3716 worse, and it actually turns out that in every case but one (18-bit wide
3717 branches), you need a multi-instruction expansion to get the full range
3718 anyway. And because 18-bit branches are handled identically to 15-bit
3719 branches, there isn't any point in changing it. */
3722 xg_assembly_relax (IStack
*istack
,
3725 fragS
*pc_frag
, /* if pc_frag == 0, not pc-relative */
3726 offsetT pc_offset
, /* offset in fragment */
3727 int min_steps
, /* minimum conversion steps */
3728 long stretch
) /* number of bytes stretched so far */
3730 int steps_taken
= 0;
3732 /* Some of its immeds don't fit. Try to build a relaxed version.
3733 This may go through a couple of stages of single instruction
3734 transformations before we get there. */
3736 TInsn single_target
;
3738 int lateral_steps
= 0;
3739 int istack_size
= istack
->ninsn
;
3741 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3742 && steps_taken
>= min_steps
)
3744 istack_push (istack
, insn
);
3747 current_insn
= *insn
;
3749 /* Walk through all of the single instruction expansions. */
3750 while (xg_is_single_relaxable_insn (¤t_insn
, &single_target
, FALSE
))
3753 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3756 if (steps_taken
>= min_steps
)
3758 istack_push (istack
, &single_target
);
3762 current_insn
= single_target
;
3765 /* Now check for a multi-instruction expansion. */
3766 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3768 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3771 if (steps_taken
>= min_steps
)
3773 istack_push (istack
, ¤t_insn
);
3778 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3780 if (steps_taken
>= min_steps
)
3784 istack
->ninsn
= istack_size
;
3787 /* It's not going to work -- use the original. */
3788 istack_push (istack
, insn
);
3794 xg_finish_frag (char *last_insn
,
3795 enum xtensa_relax_statesE frag_state
,
3796 enum xtensa_relax_statesE slot0_state
,
3798 bfd_boolean is_insn
)
3800 /* Finish off this fragment so that it has at LEAST the desired
3801 max_growth. If it doesn't fit in this fragment, close this one
3802 and start a new one. In either case, return a pointer to the
3803 beginning of the growth area. */
3807 frag_grow (max_growth
);
3808 old_frag
= frag_now
;
3810 frag_now
->fr_opcode
= last_insn
;
3812 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3814 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3815 frag_state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3817 old_frag
->tc_frag_data
.slot_subtypes
[0] = slot0_state
;
3818 xtensa_set_frag_assembly_state (frag_now
);
3820 /* Just to make sure that we did not split it up. */
3821 gas_assert (old_frag
->fr_next
== frag_now
);
3825 /* Return TRUE if the target frag is one of the next non-empty frags. */
3828 is_next_frag_target (const fragS
*fragP
, const fragS
*target
)
3833 for (; fragP
; fragP
= fragP
->fr_next
)
3835 if (fragP
== target
)
3837 if (fragP
->fr_fix
!= 0)
3839 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
3841 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
3842 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
3844 if (fragP
->fr_type
== rs_space
)
3852 is_branch_jmp_to_next (TInsn
*insn
, fragS
*fragP
)
3854 xtensa_isa isa
= xtensa_default_isa
;
3856 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3861 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) != 1
3862 && xtensa_opcode_is_jump (isa
, insn
->opcode
) != 1)
3865 for (i
= 0; i
< num_ops
; i
++)
3867 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1)
3873 if (target_op
== -1)
3876 if (insn
->ntok
<= target_op
)
3879 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3882 sym
= insn
->tok
[target_op
].X_add_symbol
;
3886 if (insn
->tok
[target_op
].X_add_number
!= 0)
3889 target_frag
= symbol_get_frag (sym
);
3890 if (target_frag
== NULL
)
3893 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3894 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3902 xg_add_branch_and_loop_targets (TInsn
*insn
)
3904 xtensa_isa isa
= xtensa_default_isa
;
3905 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3907 if (xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3910 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3911 && insn
->tok
[i
].X_op
== O_symbol
)
3912 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3916 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) == 1
3917 || xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3921 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3923 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3924 && insn
->tok
[i
].X_op
== O_symbol
)
3926 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3927 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3928 if (S_IS_DEFINED (sym
))
3929 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3936 /* Return FALSE if no error. */
3939 xg_build_token_insn (BuildInstr
*instr_spec
, TInsn
*old_insn
, TInsn
*new_insn
)
3944 switch (instr_spec
->typ
)
3947 new_insn
->insn_type
= ITYPE_INSN
;
3948 new_insn
->opcode
= instr_spec
->opcode
;
3950 case INSTR_LITERAL_DEF
:
3951 new_insn
->insn_type
= ITYPE_LITERAL
;
3952 new_insn
->opcode
= XTENSA_UNDEFINED
;
3954 case INSTR_LABEL_DEF
:
3957 new_insn
->is_specific_opcode
= FALSE
;
3958 new_insn
->debug_line
= old_insn
->debug_line
;
3959 new_insn
->loc_directive_seen
= old_insn
->loc_directive_seen
;
3961 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3964 const expressionS
*src_exp
;
3970 /* The expression must be the constant. */
3971 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3972 exp
= &new_insn
->tok
[b_op
->op_num
];
3973 set_expr_const (exp
, b_op
->op_data
);
3977 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3978 gas_assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3979 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3980 exp
= &new_insn
->tok
[b_op
->op_num
];
3981 copy_expr (exp
, src_exp
);
3986 as_bad (_("can't handle generation of literal/labels yet"));
3990 as_bad (_("can't handle undefined OP TYPE"));
3995 new_insn
->ntok
= num_ops
;
4000 /* Return TRUE if it was simplified. */
4003 xg_simplify_insn (TInsn
*old_insn
, TInsn
*new_insn
)
4005 TransitionRule
*rule
;
4006 BuildInstr
*insn_spec
;
4008 if (old_insn
->is_specific_opcode
|| !density_supported
)
4011 rule
= xg_instruction_match (old_insn
);
4015 insn_spec
= rule
->to_instr
;
4016 /* There should only be one. */
4017 gas_assert (insn_spec
!= NULL
);
4018 gas_assert (insn_spec
->next
== NULL
);
4019 if (insn_spec
->next
!= NULL
)
4022 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
4028 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
4029 l32i.n. (2) Check the number of operands. (3) Place the instruction
4030 tokens into the stack or relax it and place multiple
4031 instructions/literals onto the stack. Return FALSE if no error. */
4034 xg_expand_assembly_insn (IStack
*istack
, TInsn
*orig_insn
)
4038 bfd_boolean do_expand
;
4040 tinsn_init (&new_insn
);
4042 /* Narrow it if we can. xg_simplify_insn now does all the
4043 appropriate checking (e.g., for the density option). */
4044 if (xg_simplify_insn (orig_insn
, &new_insn
))
4045 orig_insn
= &new_insn
;
4047 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
,
4049 if (orig_insn
->ntok
< noperands
)
4051 as_bad (ngettext ("found %d operand for '%s': Expected %d",
4052 "found %d operands for '%s': Expected %d",
4055 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4059 if (orig_insn
->ntok
> noperands
)
4060 as_warn (ngettext ("found %d operand for '%s': Expected %d",
4061 "found %d operands for '%s': Expected %d",
4064 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4067 /* If there are not enough operands, we will assert above. If there
4068 are too many, just cut out the extras here. */
4069 orig_insn
->ntok
= noperands
;
4071 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
4074 /* Special case for extui opcode which has constraints not handled
4075 by the ordinary operand encoding checks. The number of operands
4076 and related syntax issues have already been checked. */
4077 if (orig_insn
->opcode
== xtensa_extui_opcode
)
4079 int shiftimm
= orig_insn
->tok
[2].X_add_number
;
4080 int maskimm
= orig_insn
->tok
[3].X_add_number
;
4081 if (shiftimm
+ maskimm
> 32)
4083 as_bad (_("immediate operands sum to greater than 32"));
4088 /* If the instruction will definitely need to be relaxed, it is better
4089 to expand it now for better scheduling. Decide whether to expand
4091 do_expand
= (!orig_insn
->is_specific_opcode
&& use_transform ());
4093 /* Calls should be expanded to longcalls only in the backend relaxation
4094 so that the assembly scheduler will keep the L32R/CALLX instructions
4096 if (is_direct_call_opcode (orig_insn
->opcode
))
4099 if (tinsn_has_symbolic_operands (orig_insn
))
4101 /* The values of symbolic operands are not known yet, so only expand
4102 now if an operand is "complex" (e.g., difference of symbols) and
4103 will have to be stored as a literal regardless of the value. */
4104 if (!tinsn_has_complex_operands (orig_insn
))
4107 else if (xg_immeds_fit (orig_insn
))
4111 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
4113 istack_push (istack
, orig_insn
);
4119 /* Return TRUE if the section flags are marked linkonce
4120 or the name is .gnu.linkonce.*. */
4122 static int linkonce_len
= sizeof (".gnu.linkonce.") - 1;
4125 get_is_linkonce_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
)
4127 flagword flags
, link_once_flags
;
4129 flags
= bfd_get_section_flags (abfd
, sec
);
4130 link_once_flags
= (flags
& SEC_LINK_ONCE
);
4132 /* Flags might not be set yet. */
4133 if (!link_once_flags
4134 && strncmp (segment_name (sec
), ".gnu.linkonce.", linkonce_len
) == 0)
4135 link_once_flags
= SEC_LINK_ONCE
;
4137 return (link_once_flags
!= 0);
4142 xtensa_add_literal_sym (symbolS
*sym
)
4146 l
= XNEW (sym_list
);
4148 l
->next
= literal_syms
;
4154 xtensa_create_literal_symbol (segT sec
, fragS
*frag
)
4156 static int lit_num
= 0;
4157 static char name
[256];
4160 sprintf (name
, ".L_lit_sym%d", lit_num
);
4162 /* Create a local symbol. If it is in a linkonce section, we have to
4163 be careful to make sure that if it is used in a relocation that the
4164 symbol will be in the output file. */
4165 if (get_is_linkonce_section (stdoutput
, sec
))
4167 symbolP
= symbol_new (name
, sec
, 0, frag
);
4168 S_CLEAR_EXTERNAL (symbolP
);
4169 /* symbolP->local = 1; */
4172 symbolP
= symbol_new (name
, sec
, 0, frag
);
4174 xtensa_add_literal_sym (symbolP
);
4181 /* Currently all literals that are generated here are 32-bit L32R targets. */
4184 xg_assemble_literal (/* const */ TInsn
*insn
)
4187 symbolS
*lit_sym
= NULL
;
4188 bfd_reloc_code_real_type reloc
;
4189 bfd_boolean pcrel
= FALSE
;
4192 /* size = 4 for L32R. It could easily be larger when we move to
4193 larger constants. Add a parameter later. */
4194 offsetT litsize
= 4;
4195 offsetT litalign
= 2; /* 2^2 = 4 */
4196 expressionS saved_loc
;
4197 expressionS
* emit_val
;
4199 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
4201 gas_assert (insn
->insn_type
== ITYPE_LITERAL
);
4202 gas_assert (insn
->ntok
== 1); /* must be only one token here */
4204 xtensa_switch_to_literal_fragment (&state
);
4206 emit_val
= &insn
->tok
[0];
4207 if (emit_val
->X_op
== O_big
)
4209 int size
= emit_val
->X_add_number
* CHARS_PER_LITTLENUM
;
4212 /* This happens when someone writes a "movi a2, big_number". */
4213 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
4214 _("invalid immediate"));
4215 xtensa_restore_emit_state (&state
);
4220 /* Force a 4-byte align here. Note that this opens a new frag, so all
4221 literals done with this function have a frag to themselves. That's
4222 important for the way text section literals work. */
4223 frag_align (litalign
, 0, 0);
4224 record_alignment (now_seg
, litalign
);
4226 switch (emit_val
->X_op
)
4236 p
= frag_more (litsize
);
4237 xtensa_set_frag_assembly_state (frag_now
);
4238 reloc
= map_operator_to_reloc (emit_val
->X_op
, TRUE
);
4239 if (emit_val
->X_add_symbol
)
4240 emit_val
->X_op
= O_symbol
;
4242 emit_val
->X_op
= O_constant
;
4243 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
4244 litsize
, emit_val
, pcrel
, reloc
);
4248 emit_expr (emit_val
, litsize
);
4252 gas_assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
4253 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4254 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4255 lit_sym
= frag_now
->fr_symbol
;
4258 xtensa_restore_emit_state (&state
);
4264 xg_assemble_literal_space (/* const */ int size
, int slot
)
4267 /* We might have to do something about this alignment. It only
4268 takes effect if something is placed here. */
4269 offsetT litalign
= 2; /* 2^2 = 4 */
4270 fragS
*lit_saved_frag
;
4272 gas_assert (size
% 4 == 0);
4274 xtensa_switch_to_literal_fragment (&state
);
4276 /* Force a 4-byte align here. */
4277 frag_align (litalign
, 0, 0);
4278 record_alignment (now_seg
, litalign
);
4282 lit_saved_frag
= frag_now
;
4283 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4284 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4285 xg_finish_frag (0, RELAX_LITERAL
, 0, size
, FALSE
);
4288 xtensa_restore_emit_state (&state
);
4289 frag_now
->tc_frag_data
.literal_frags
[slot
] = lit_saved_frag
;
4293 /* Put in a fixup record based on the opcode.
4294 Return TRUE on success. */
4297 xg_add_opcode_fix (TInsn
*tinsn
,
4305 xtensa_opcode opcode
= tinsn
->opcode
;
4306 bfd_reloc_code_real_type reloc
;
4307 reloc_howto_type
*howto
;
4311 reloc
= BFD_RELOC_NONE
;
4313 /* First try the special cases for "alternate" relocs. */
4314 if (opcode
== xtensa_l32r_opcode
)
4316 if (fragP
->tc_frag_data
.use_absolute_literals
)
4317 reloc
= encode_alt_reloc (slot
);
4319 else if (opcode
== xtensa_const16_opcode
)
4321 if (exp
->X_op
== O_lo16
)
4323 reloc
= encode_reloc (slot
);
4324 exp
->X_op
= O_symbol
;
4326 else if (exp
->X_op
== O_hi16
)
4328 reloc
= encode_alt_reloc (slot
);
4329 exp
->X_op
= O_symbol
;
4333 if (opnum
!= get_relaxable_immed (opcode
))
4335 as_bad (_("invalid relocation for operand %i of '%s'"),
4336 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4340 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4341 into the symbol table where the generic portions of the assembler
4342 won't know what to do with them. */
4343 if (exp
->X_op
== O_lo16
|| exp
->X_op
== O_hi16
)
4345 as_bad (_("invalid expression for operand %i of '%s'"),
4346 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4350 /* Next try the generic relocs. */
4351 if (reloc
== BFD_RELOC_NONE
)
4352 reloc
= encode_reloc (slot
);
4353 if (reloc
== BFD_RELOC_NONE
)
4355 as_bad (_("invalid relocation in instruction slot %i"), slot
);
4359 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4362 as_bad (_("undefined symbol for opcode \"%s\""),
4363 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4367 fmt_length
= xtensa_format_length (xtensa_default_isa
, fmt
);
4368 the_fix
= fix_new_exp (fragP
, offset
, fmt_length
, exp
,
4369 howto
->pc_relative
, reloc
);
4370 the_fix
->fx_no_overflow
= 1;
4371 the_fix
->tc_fix_data
.X_add_symbol
= exp
->X_add_symbol
;
4372 the_fix
->tc_fix_data
.X_add_number
= exp
->X_add_number
;
4373 the_fix
->tc_fix_data
.slot
= slot
;
4380 xg_emit_insn_to_buf (TInsn
*tinsn
,
4384 bfd_boolean build_fix
)
4386 static xtensa_insnbuf insnbuf
= NULL
;
4387 bfd_boolean has_symbolic_immed
= FALSE
;
4388 bfd_boolean ok
= TRUE
;
4391 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4393 has_symbolic_immed
= tinsn_to_insnbuf (tinsn
, insnbuf
);
4394 if (has_symbolic_immed
&& build_fix
)
4397 xtensa_format fmt
= xg_get_single_format (tinsn
->opcode
);
4398 int slot
= xg_get_single_slot (tinsn
->opcode
);
4399 int opnum
= get_relaxable_immed (tinsn
->opcode
);
4400 expressionS
*exp
= &tinsn
->tok
[opnum
];
4402 if (!xg_add_opcode_fix (tinsn
, opnum
, fmt
, slot
, exp
, fragP
, offset
))
4405 fragP
->tc_frag_data
.is_insn
= TRUE
;
4406 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4407 (unsigned char *) buf
, 0);
4413 xg_resolve_literals (TInsn
*insn
, symbolS
*lit_sym
)
4415 symbolS
*sym
= get_special_literal_symbol ();
4419 gas_assert (insn
->insn_type
== ITYPE_INSN
);
4420 for (i
= 0; i
< insn
->ntok
; i
++)
4421 if (insn
->tok
[i
].X_add_symbol
== sym
)
4422 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4428 xg_resolve_labels (TInsn
*insn
, symbolS
*label_sym
)
4430 symbolS
*sym
= get_special_label_symbol ();
4432 for (i
= 0; i
< insn
->ntok
; i
++)
4433 if (insn
->tok
[i
].X_add_symbol
== sym
)
4434 insn
->tok
[i
].X_add_symbol
= label_sym
;
4439 /* Return TRUE if the instruction can write to the specified
4440 integer register. */
4443 is_register_writer (const TInsn
*insn
, const char *regset
, int regnum
)
4447 xtensa_isa isa
= xtensa_default_isa
;
4449 num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
4451 for (i
= 0; i
< num_ops
; i
++)
4454 inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
4455 if ((inout
== 'o' || inout
== 'm')
4456 && xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
4458 xtensa_regfile opnd_rf
=
4459 xtensa_operand_regfile (isa
, insn
->opcode
, i
);
4460 if (!strcmp (xtensa_regfile_shortname (isa
, opnd_rf
), regset
))
4462 if ((insn
->tok
[i
].X_op
== O_register
)
4463 && (insn
->tok
[i
].X_add_number
== regnum
))
4473 is_bad_loopend_opcode (const TInsn
*tinsn
)
4475 xtensa_opcode opcode
= tinsn
->opcode
;
4477 if (opcode
== XTENSA_UNDEFINED
)
4480 if (opcode
== xtensa_call0_opcode
4481 || opcode
== xtensa_callx0_opcode
4482 || opcode
== xtensa_call4_opcode
4483 || opcode
== xtensa_callx4_opcode
4484 || opcode
== xtensa_call8_opcode
4485 || opcode
== xtensa_callx8_opcode
4486 || opcode
== xtensa_call12_opcode
4487 || opcode
== xtensa_callx12_opcode
4488 || opcode
== xtensa_isync_opcode
4489 || opcode
== xtensa_ret_opcode
4490 || opcode
== xtensa_ret_n_opcode
4491 || opcode
== xtensa_retw_opcode
4492 || opcode
== xtensa_retw_n_opcode
4493 || opcode
== xtensa_waiti_opcode
4494 || opcode
== xtensa_rsr_lcount_opcode
)
4501 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4502 This allows the debugger to add unaligned labels.
4503 Also, the assembler generates stabs labels that need
4504 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4507 is_unaligned_label (symbolS
*sym
)
4509 const char *name
= S_GET_NAME (sym
);
4510 static size_t fake_size
= 0;
4514 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4517 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4519 fake_size
= strlen (FAKE_LABEL_NAME
);
4522 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4523 && (name
[fake_size
] == 'F'
4524 || name
[fake_size
] == 'L'
4525 || (name
[fake_size
] == 'e'
4526 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4534 next_non_empty_frag (const fragS
*fragP
)
4536 fragS
*next_fragP
= fragP
->fr_next
;
4538 /* Sometimes an empty will end up here due storage allocation issues.
4539 So we have to skip until we find something legit. */
4540 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4541 next_fragP
= next_fragP
->fr_next
;
4543 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4551 next_frag_opcode_is_loop (const fragS
*fragP
, xtensa_opcode
*opcode
)
4553 xtensa_opcode out_opcode
;
4554 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4556 if (next_fragP
== NULL
)
4559 out_opcode
= get_opcode_from_buf (next_fragP
->fr_literal
, 0);
4560 if (xtensa_opcode_is_loop (xtensa_default_isa
, out_opcode
) == 1)
4562 *opcode
= out_opcode
;
4570 frag_format_size (const fragS
*fragP
)
4572 static xtensa_insnbuf insnbuf
= NULL
;
4573 xtensa_isa isa
= xtensa_default_isa
;
4578 insnbuf
= xtensa_insnbuf_alloc (isa
);
4581 return XTENSA_UNDEFINED
;
4583 xtensa_insnbuf_from_chars (isa
, insnbuf
,
4584 (unsigned char *) fragP
->fr_literal
, 0);
4586 fmt
= xtensa_format_decode (isa
, insnbuf
);
4587 if (fmt
== XTENSA_UNDEFINED
)
4588 return XTENSA_UNDEFINED
;
4589 fmt_size
= xtensa_format_length (isa
, fmt
);
4591 /* If the next format won't be changing due to relaxation, just
4592 return the length of the first format. */
4593 if (fragP
->fr_opcode
!= fragP
->fr_literal
)
4596 /* If during relaxation we have to pull an instruction out of a
4597 multi-slot instruction, we will return the more conservative
4598 number. This works because alignment on bigger instructions
4599 is more restrictive than alignment on smaller instructions.
4600 This is more conservative than we would like, but it happens
4603 if (xtensa_format_num_slots (xtensa_default_isa
, fmt
) > 1)
4606 /* If we aren't doing one of our own relaxations or it isn't
4607 slot-based, then the insn size won't change. */
4608 if (fragP
->fr_type
!= rs_machine_dependent
)
4610 if (fragP
->fr_subtype
!= RELAX_SLOTS
)
4613 /* If an instruction is about to grow, return the longer size. */
4614 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP1
4615 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP2
4616 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP3
)
4618 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4619 instruction in the relaxed version is of length 3. (The case
4620 where we have to pull the instruction out of a FLIX bundle
4621 is handled conservatively above.) However, frags with opcodes
4622 that are expanding to wide branches end up having formats that
4623 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4624 we can't tell directly what format the relaxer picked. This
4625 is a wart in the design of the relaxer that should someday be
4626 fixed, but would require major changes, or at least should
4627 be accompanied by major changes to make use of that data.
4629 In any event, we can tell that we are expanding from a single-slot
4630 format to a wider one with the logic below. */
4633 int relaxed_size
= fmt_size
+ fragP
->tc_frag_data
.text_expansion
[0];
4635 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
4637 if (relaxed_size
== xtensa_format_length (isa
, i
))
4638 return relaxed_size
;
4644 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
4645 return 2 + fragP
->tc_frag_data
.text_expansion
[0];
4652 next_frag_format_size (const fragS
*fragP
)
4654 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4655 return frag_format_size (next_fragP
);
4659 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4660 required two-byte instructions to be treated as three-byte instructions
4661 for loop instruction alignment. This restriction was removed beginning
4662 with Xtensa LX. Now the only requirement on loop instruction alignment
4663 is that the first instruction of the loop must appear at an address that
4664 does not cross a fetch boundary. */
4667 get_loop_align_size (int insn_size
)
4669 if (insn_size
== XTENSA_UNDEFINED
)
4670 return xtensa_fetch_width
;
4672 if (enforce_three_byte_loop_align
&& insn_size
== 2)
4679 /* If the next legit fragment is an end-of-loop marker,
4680 switch its state so it will instantiate a NOP. */
4683 update_next_frag_state (fragS
*fragP
)
4685 fragS
*next_fragP
= fragP
->fr_next
;
4686 fragS
*new_target
= NULL
;
4690 /* We are guaranteed there will be one of these... */
4691 while (!(next_fragP
->fr_type
== rs_machine_dependent
4692 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4693 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
)))
4694 next_fragP
= next_fragP
->fr_next
;
4696 gas_assert (next_fragP
->fr_type
== rs_machine_dependent
4697 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4698 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
));
4700 /* ...and one of these. */
4701 new_target
= next_fragP
->fr_next
;
4702 while (!(new_target
->fr_type
== rs_machine_dependent
4703 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4704 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
)))
4705 new_target
= new_target
->fr_next
;
4707 gas_assert (new_target
->fr_type
== rs_machine_dependent
4708 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4709 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
));
4712 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4714 if (next_fragP
->fr_type
== rs_machine_dependent
4715 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4717 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4721 next_fragP
= next_fragP
->fr_next
;
4727 next_frag_is_branch_target (const fragS
*fragP
)
4729 /* Sometimes an empty will end up here due to storage allocation issues,
4730 so we have to skip until we find something legit. */
4731 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4733 if (fragP
->tc_frag_data
.is_branch_target
)
4735 if (fragP
->fr_fix
!= 0)
4743 next_frag_is_loop_target (const fragS
*fragP
)
4745 /* Sometimes an empty will end up here due storage allocation issues.
4746 So we have to skip until we find something legit. */
4747 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4749 if (fragP
->tc_frag_data
.is_loop_target
)
4751 if (fragP
->fr_fix
!= 0)
4758 /* As specified in the relaxation table, when a loop instruction is
4759 relaxed, there are 24 bytes between the loop instruction itself and
4760 the first instruction in the loop. */
4762 #define RELAXED_LOOP_INSN_BYTES 24
4765 next_frag_pre_opcode_bytes (const fragS
*fragp
)
4767 const fragS
*next_fragp
= fragp
->fr_next
;
4768 xtensa_opcode next_opcode
;
4770 if (!next_frag_opcode_is_loop (fragp
, &next_opcode
))
4773 /* Sometimes an empty will end up here due to storage allocation issues,
4774 so we have to skip until we find something legit. */
4775 while (next_fragp
->fr_fix
== 0)
4776 next_fragp
= next_fragp
->fr_next
;
4778 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4781 /* There is some implicit knowledge encoded in here.
4782 The LOOP instructions that are NOT RELAX_IMMED have
4783 been relaxed. Note that we can assume that the LOOP
4784 instruction is in slot 0 because loops aren't bundleable. */
4785 if (next_fragp
->tc_frag_data
.slot_subtypes
[0] > RELAX_IMMED
)
4786 return get_expanded_loop_offset (next_opcode
) + RELAXED_LOOP_INSN_BYTES
;
4792 /* Mark a location where we can later insert literal frags. Update
4793 the section's literal_pool_loc, so subsequent literals can be
4794 placed nearest to their use. */
4797 xtensa_mark_literal_pool_location (void)
4799 /* Any labels pointing to the current location need
4800 to be adjusted to after the literal pool. */
4802 fragS
*pool_location
;
4804 if (use_literal_section
)
4807 /* We stash info in these frags so we can later move the literal's
4808 fixes into this frchain's fix list. */
4809 pool_location
= frag_now
;
4810 frag_now
->tc_frag_data
.lit_frchain
= frchain_now
;
4811 frag_now
->tc_frag_data
.literal_frag
= frag_now
;
4812 /* Just record this frag. */
4813 xtensa_maybe_create_literal_pool_frag (FALSE
, FALSE
);
4814 frag_variant (rs_machine_dependent
, 0, 0,
4815 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4816 xtensa_set_frag_assembly_state (frag_now
);
4817 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
4818 frag_variant (rs_machine_dependent
, 0, 0,
4819 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4820 xtensa_set_frag_assembly_state (frag_now
);
4822 /* Now put a frag into the literal pool that points to this location. */
4823 set_literal_pool_location (now_seg
, pool_location
);
4824 xtensa_switch_to_non_abs_literal_fragment (&s
);
4825 frag_align (2, 0, 0);
4826 record_alignment (now_seg
, 2);
4828 /* Close whatever frag is there. */
4829 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4830 xtensa_set_frag_assembly_state (frag_now
);
4831 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
4832 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4833 xtensa_restore_emit_state (&s
);
4834 xtensa_set_frag_assembly_state (frag_now
);
4838 /* Build a nop of the correct size into tinsn. */
4841 build_nop (TInsn
*tinsn
, int size
)
4847 tinsn
->opcode
= xtensa_nop_n_opcode
;
4849 if (tinsn
->opcode
== XTENSA_UNDEFINED
)
4850 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4854 if (xtensa_nop_opcode
== XTENSA_UNDEFINED
)
4856 tinsn
->opcode
= xtensa_or_opcode
;
4857 set_expr_const (&tinsn
->tok
[0], 1);
4858 set_expr_const (&tinsn
->tok
[1], 1);
4859 set_expr_const (&tinsn
->tok
[2], 1);
4863 tinsn
->opcode
= xtensa_nop_opcode
;
4865 gas_assert (tinsn
->opcode
!= XTENSA_UNDEFINED
);
4870 /* Assemble a NOP of the requested size in the buffer. User must have
4871 allocated "buf" with at least "size" bytes. */
4874 assemble_nop (int size
, char *buf
)
4876 static xtensa_insnbuf insnbuf
= NULL
;
4879 build_nop (&tinsn
, size
);
4882 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4884 tinsn_to_insnbuf (&tinsn
, insnbuf
);
4885 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4886 (unsigned char *) buf
, 0);
4890 /* Return the number of bytes for the offset of the expanded loop
4891 instruction. This should be incorporated into the relaxation
4892 specification but is hard-coded here. This is used to auto-align
4893 the loop instruction. It is invalid to call this function if the
4894 configuration does not have loops or if the opcode is not a loop
4898 get_expanded_loop_offset (xtensa_opcode opcode
)
4900 /* This is the OFFSET of the loop instruction in the expanded loop.
4901 This MUST correspond directly to the specification of the loop
4902 expansion. It will be validated on fragment conversion. */
4903 gas_assert (opcode
!= XTENSA_UNDEFINED
);
4904 if (opcode
== xtensa_loop_opcode
)
4906 if (opcode
== xtensa_loopnez_opcode
)
4908 if (opcode
== xtensa_loopgtz_opcode
)
4910 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4916 get_literal_pool_location (segT seg
)
4918 struct litpool_seg
*lps
= litpool_seg_list
.next
;
4919 struct litpool_frag
*lpf
;
4920 for ( ; lps
&& lps
->seg
->id
!= seg
->id
; lps
= lps
->next
)
4924 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4925 { /* Skip "candidates" for now. */
4926 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
4930 /* Must convert a lower-priority pool. */
4931 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4933 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
4936 /* Still no match -- try for a low priority pool. */
4937 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4939 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
4943 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4948 set_literal_pool_location (segT seg
, fragS
*literal_pool_loc
)
4950 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4954 /* Set frag assembly state should be called when a new frag is
4955 opened and after a frag has been closed. */
4958 xtensa_set_frag_assembly_state (fragS
*fragP
)
4960 if (!density_supported
)
4961 fragP
->tc_frag_data
.is_no_density
= TRUE
;
4963 /* This function is called from subsegs_finish, which is called
4964 after xtensa_end, so we can't use "use_transform" or
4965 "use_schedule" here. */
4966 if (!directive_state
[directive_transform
])
4967 fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4968 if (directive_state
[directive_longcalls
])
4969 fragP
->tc_frag_data
.use_longcalls
= TRUE
;
4970 fragP
->tc_frag_data
.use_absolute_literals
=
4971 directive_state
[directive_absolute_literals
];
4972 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
4977 relaxable_section (asection
*sec
)
4979 return ((sec
->flags
& SEC_DEBUGGING
) == 0
4980 && strcmp (sec
->name
, ".eh_frame") != 0);
4985 xtensa_mark_frags_for_org (void)
4989 /* Walk over each fragment of all of the current segments. If we find
4990 a .org frag in any of the segments, mark all frags prior to it as
4991 "no transform", which will prevent linker optimizations from messing
4992 up the .org distance. This should be done after
4993 xtensa_find_unmarked_state_frags, because we don't want to worry here
4994 about that function trashing the data we save here. */
4996 for (seclist
= &stdoutput
->sections
;
4997 seclist
&& *seclist
;
4998 seclist
= &(*seclist
)->next
)
5000 segT sec
= *seclist
;
5001 segment_info_type
*seginfo
;
5004 flags
= bfd_get_section_flags (stdoutput
, sec
);
5005 if (flags
& SEC_DEBUGGING
)
5007 if (!(flags
& SEC_ALLOC
))
5010 seginfo
= seg_info (sec
);
5011 if (seginfo
&& seginfo
->frchainP
)
5013 fragS
*last_fragP
= seginfo
->frchainP
->frch_root
;
5014 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5015 fragP
= fragP
->fr_next
)
5017 /* cvt_frag_to_fill has changed the fr_type of org frags to
5018 rs_fill, so use the value as cached in rs_subtype here. */
5019 if (fragP
->fr_subtype
== RELAX_ORG
)
5021 while (last_fragP
!= fragP
->fr_next
)
5023 last_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
5024 last_fragP
= last_fragP
->fr_next
;
5034 xtensa_find_unmarked_state_frags (void)
5038 /* Walk over each fragment of all of the current segments. For each
5039 unmarked fragment, mark it with the same info as the previous
5041 for (seclist
= &stdoutput
->sections
;
5042 seclist
&& *seclist
;
5043 seclist
= &(*seclist
)->next
)
5045 segT sec
= *seclist
;
5046 segment_info_type
*seginfo
;
5049 flags
= bfd_get_section_flags (stdoutput
, sec
);
5050 if (flags
& SEC_DEBUGGING
)
5052 if (!(flags
& SEC_ALLOC
))
5055 seginfo
= seg_info (sec
);
5056 if (seginfo
&& seginfo
->frchainP
)
5058 fragS
*last_fragP
= 0;
5059 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5060 fragP
= fragP
->fr_next
)
5062 if (fragP
->fr_fix
!= 0
5063 && !fragP
->tc_frag_data
.is_assembly_state_set
)
5065 if (last_fragP
== 0)
5067 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
5068 _("assembly state not set for first frag in section %s"),
5073 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
5074 fragP
->tc_frag_data
.is_no_density
=
5075 last_fragP
->tc_frag_data
.is_no_density
;
5076 fragP
->tc_frag_data
.is_no_transform
=
5077 last_fragP
->tc_frag_data
.is_no_transform
;
5078 fragP
->tc_frag_data
.use_longcalls
=
5079 last_fragP
->tc_frag_data
.use_longcalls
;
5080 fragP
->tc_frag_data
.use_absolute_literals
=
5081 last_fragP
->tc_frag_data
.use_absolute_literals
;
5084 if (fragP
->tc_frag_data
.is_assembly_state_set
)
5093 xtensa_find_unaligned_branch_targets (bfd
*abfd ATTRIBUTE_UNUSED
,
5095 void *unused ATTRIBUTE_UNUSED
)
5097 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5098 segment_info_type
*seginfo
= seg_info (sec
);
5099 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5101 if (flags
& SEC_CODE
)
5103 xtensa_isa isa
= xtensa_default_isa
;
5104 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5105 while (frag
!= NULL
)
5107 if (frag
->tc_frag_data
.is_branch_target
)
5110 addressT branch_align
, frag_addr
;
5113 xtensa_insnbuf_from_chars
5114 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5115 fmt
= xtensa_format_decode (isa
, insnbuf
);
5116 op_size
= xtensa_format_length (isa
, fmt
);
5117 branch_align
= 1 << branch_align_power (sec
);
5118 frag_addr
= frag
->fr_address
% branch_align
;
5119 if (frag_addr
+ op_size
> branch_align
)
5120 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5121 _("unaligned branch target: %d bytes at 0x%lx"),
5122 op_size
, (long) frag
->fr_address
);
5124 frag
= frag
->fr_next
;
5126 xtensa_insnbuf_free (isa
, insnbuf
);
5132 xtensa_find_unaligned_loops (bfd
*abfd ATTRIBUTE_UNUSED
,
5134 void *unused ATTRIBUTE_UNUSED
)
5136 flagword flags
= bfd_get_section_flags (abfd
, sec
);
5137 segment_info_type
*seginfo
= seg_info (sec
);
5138 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5139 xtensa_isa isa
= xtensa_default_isa
;
5141 if (flags
& SEC_CODE
)
5143 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5144 while (frag
!= NULL
)
5146 if (frag
->tc_frag_data
.is_first_loop_insn
)
5152 if (frag
->fr_fix
== 0)
5153 frag
= next_non_empty_frag (frag
);
5157 xtensa_insnbuf_from_chars
5158 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5159 fmt
= xtensa_format_decode (isa
, insnbuf
);
5160 op_size
= xtensa_format_length (isa
, fmt
);
5161 frag_addr
= frag
->fr_address
% xtensa_fetch_width
;
5163 if (frag_addr
+ op_size
> xtensa_fetch_width
)
5164 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5165 _("unaligned loop: %d bytes at 0x%lx"),
5166 op_size
, (long) frag
->fr_address
);
5169 frag
= frag
->fr_next
;
5171 xtensa_insnbuf_free (isa
, insnbuf
);
5177 xg_apply_fix_value (fixS
*fixP
, valueT val
)
5179 xtensa_isa isa
= xtensa_default_isa
;
5180 static xtensa_insnbuf insnbuf
= NULL
;
5181 static xtensa_insnbuf slotbuf
= NULL
;
5184 bfd_boolean alt_reloc
;
5185 xtensa_opcode opcode
;
5186 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5188 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
)
5190 as_fatal (_("unexpected fix"));
5194 insnbuf
= xtensa_insnbuf_alloc (isa
);
5195 slotbuf
= xtensa_insnbuf_alloc (isa
);
5198 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5199 fmt
= xtensa_format_decode (isa
, insnbuf
);
5200 if (fmt
== XTENSA_UNDEFINED
)
5201 as_fatal (_("undecodable fix"));
5202 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5203 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5204 if (opcode
== XTENSA_UNDEFINED
)
5205 as_fatal (_("undecodable fix"));
5207 /* CONST16 immediates are not PC-relative, despite the fact that we
5208 reuse the normal PC-relative operand relocations for the low part
5209 of a CONST16 operand. */
5210 if (opcode
== xtensa_const16_opcode
)
5213 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
,
5214 get_relaxable_immed (opcode
), val
,
5215 fixP
->fx_file
, fixP
->fx_line
);
5217 xtensa_format_set_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5218 xtensa_insnbuf_to_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5224 /* External Functions and Other GAS Hooks. */
5227 xtensa_target_format (void)
5229 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
5234 xtensa_file_arch_init (bfd
*abfd
)
5236 bfd_set_private_flags (abfd
, 0x100 | 0x200);
5241 md_number_to_chars (char *buf
, valueT val
, int n
)
5243 if (target_big_endian
)
5244 number_to_chars_bigendian (buf
, val
, n
);
5246 number_to_chars_littleendian (buf
, val
, n
);
5250 xg_init_global_config (void)
5252 target_big_endian
= XCHAL_HAVE_BE
;
5254 density_supported
= XCHAL_HAVE_DENSITY
;
5255 absolute_literals_supported
= XSHAL_USE_ABSOLUTE_LITERALS
;
5256 xtensa_fetch_width
= XCHAL_INST_FETCH_WIDTH
;
5258 directive_state
[directive_density
] = XCHAL_HAVE_DENSITY
;
5259 directive_state
[directive_absolute_literals
] = XSHAL_USE_ABSOLUTE_LITERALS
;
5263 xtensa_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
5265 xg_init_global_config ();
5268 /* This function is called once, at assembler startup time. It should
5269 set up all the tables, etc. that the MD part of the assembler will
5275 segT current_section
= now_seg
;
5276 int current_subsec
= now_subseg
;
5280 xtensa_default_isa
= xtensa_isa_init (0, 0);
5281 isa
= xtensa_default_isa
;
5285 /* Set up the literal sections. */
5286 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
5288 subseg_set (current_section
, current_subsec
);
5290 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
5291 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
5292 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
5293 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
5294 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
5295 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
5296 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
5297 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
5298 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
5299 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
5300 xtensa_const16_opcode
= xtensa_opcode_lookup (isa
, "const16");
5301 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
5302 xtensa_extui_opcode
= xtensa_opcode_lookup (isa
, "extui");
5303 xtensa_movi_opcode
= xtensa_opcode_lookup (isa
, "movi");
5304 xtensa_movi_n_opcode
= xtensa_opcode_lookup (isa
, "movi.n");
5305 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
5306 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
5307 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
5308 xtensa_l32r_opcode
= xtensa_opcode_lookup (isa
, "l32r");
5309 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
5310 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
5311 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
5312 xtensa_nop_opcode
= xtensa_opcode_lookup (isa
, "nop");
5313 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
5314 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
5315 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
5316 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
5317 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
5318 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
5319 xtensa_rsr_lcount_opcode
= xtensa_opcode_lookup (isa
, "rsr.lcount");
5320 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
5322 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
5324 int format_slots
= xtensa_format_num_slots (isa
, i
);
5325 if (format_slots
> config_max_slots
)
5326 config_max_slots
= format_slots
;
5329 xg_init_vinsn (&cur_vinsn
);
5331 xtensa_num_pipe_stages
= xtensa_isa_num_pipe_stages (isa
);
5333 init_op_placement_info_table ();
5335 /* Set up the assembly state. */
5336 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5337 xtensa_set_frag_assembly_state (frag_now
);
5341 /* TC_INIT_FIX_DATA hook */
5344 xtensa_init_fix_data (fixS
*x
)
5346 x
->tc_fix_data
.slot
= 0;
5347 x
->tc_fix_data
.X_add_symbol
= NULL
;
5348 x
->tc_fix_data
.X_add_number
= 0;
5352 /* tc_frob_label hook */
5355 xtensa_frob_label (symbolS
*sym
)
5359 if (cur_vinsn
.inside_bundle
)
5361 as_bad (_("labels are not valid inside bundles"));
5365 freq
= get_subseg_target_freq (now_seg
, now_subseg
);
5367 /* Since the label was already attached to a frag associated with the
5368 previous basic block, it now needs to be reset to the current frag. */
5369 symbol_set_frag (sym
, frag_now
);
5370 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5372 if (generating_literals
)
5373 xtensa_add_literal_sym (sym
);
5375 xtensa_add_insn_label (sym
);
5377 if (symbol_get_tc (sym
)->is_loop_target
)
5379 if ((get_last_insn_flags (now_seg
, now_subseg
)
5380 & FLAG_IS_BAD_LOOPEND
) != 0)
5381 as_bad (_("invalid last instruction for a zero-overhead loop"));
5383 xtensa_set_frag_assembly_state (frag_now
);
5384 frag_var (rs_machine_dependent
, 4, 4, RELAX_LOOP_END
,
5385 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5387 xtensa_set_frag_assembly_state (frag_now
);
5388 xtensa_move_labels (frag_now
, 0);
5391 /* No target aligning in the absolute section. */
5392 if (now_seg
!= absolute_section
5393 && !is_unaligned_label (sym
)
5394 && !generating_literals
)
5396 xtensa_set_frag_assembly_state (frag_now
);
5398 if (do_align_targets ())
5399 frag_var (rs_machine_dependent
, 0, (int) freq
,
5400 RELAX_DESIRE_ALIGN_IF_TARGET
, frag_now
->fr_symbol
,
5401 frag_now
->fr_offset
, NULL
);
5403 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
5404 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5405 xtensa_set_frag_assembly_state (frag_now
);
5406 xtensa_move_labels (frag_now
, 0);
5409 /* We need to mark the following properties even if we aren't aligning. */
5411 /* If the label is already known to be a branch target, i.e., a
5412 forward branch, mark the frag accordingly. Backward branches
5413 are handled by xg_add_branch_and_loop_targets. */
5414 if (symbol_get_tc (sym
)->is_branch_target
)
5415 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
5417 /* Loops only go forward, so they can be identified here. */
5418 if (symbol_get_tc (sym
)->is_loop_target
)
5419 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
5421 dwarf2_emit_label (sym
);
5425 /* tc_unrecognized_line hook */
5428 xtensa_unrecognized_line (int ch
)
5433 if (cur_vinsn
.inside_bundle
== 0)
5435 /* PR8110: Cannot emit line number info inside a FLIX bundle
5436 when using --gstabs. Temporarily disable debug info. */
5437 generate_lineno_debug ();
5438 if (debug_type
== DEBUG_STABS
)
5440 xt_saved_debug_type
= debug_type
;
5441 debug_type
= DEBUG_NONE
;
5444 cur_vinsn
.inside_bundle
= 1;
5448 as_bad (_("extra opening brace"));
5454 if (cur_vinsn
.inside_bundle
)
5455 finish_vinsn (&cur_vinsn
);
5458 as_bad (_("extra closing brace"));
5463 as_bad (_("syntax error"));
5470 /* md_flush_pending_output hook */
5473 xtensa_flush_pending_output (void)
5475 /* This line fixes a bug where automatically generated gstabs info
5476 separates a function label from its entry instruction, ending up
5477 with the literal position between the function label and the entry
5478 instruction and crashing code. It only happens with --gstabs and
5479 --text-section-literals, and when several other obscure relaxation
5480 conditions are met. */
5481 if (outputting_stabs_line_debug
)
5484 if (cur_vinsn
.inside_bundle
)
5485 as_bad (_("missing closing brace"));
5487 /* If there is a non-zero instruction fragment, close it. */
5488 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
5490 frag_wane (frag_now
);
5492 xtensa_set_frag_assembly_state (frag_now
);
5494 frag_now
->tc_frag_data
.is_insn
= FALSE
;
5496 xtensa_clear_insn_labels ();
5500 /* We had an error while parsing an instruction. The string might look
5501 like this: "insn arg1, arg2 }". If so, we need to see the closing
5502 brace and reset some fields. Otherwise, the vinsn never gets closed
5503 and the num_slots field will grow past the end of the array of slots,
5504 and bad things happen. */
5507 error_reset_cur_vinsn (void)
5509 if (cur_vinsn
.inside_bundle
)
5511 if (*input_line_pointer
== '}'
5512 || *(input_line_pointer
- 1) == '}'
5513 || *(input_line_pointer
- 2) == '}')
5514 xg_clear_vinsn (&cur_vinsn
);
5520 md_assemble (char *str
)
5522 xtensa_isa isa
= xtensa_default_isa
;
5525 bfd_boolean has_underbar
= FALSE
;
5526 char *arg_strings
[MAX_INSN_ARGS
];
5528 TInsn orig_insn
; /* Original instruction from the input. */
5530 tinsn_init (&orig_insn
);
5532 /* Split off the opcode. */
5533 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5534 opname
= xstrndup (str
, opnamelen
);
5536 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
5539 as_bad (_("syntax error"));
5543 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
5546 /* Check for an underbar prefix. */
5549 has_underbar
= TRUE
;
5553 orig_insn
.insn_type
= ITYPE_INSN
;
5555 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_transform ());
5556 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
5558 /* Special case: Check for "CALLXn.TLS" pseudo op. If found, grab its
5559 extra argument and set the opcode to "CALLXn". */
5560 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5561 && strncasecmp (opname
, "callx", 5) == 0)
5563 unsigned long window_size
;
5566 window_size
= strtoul (opname
+ 5, &suffix
, 10);
5567 if (suffix
!= opname
+ 5
5568 && (window_size
== 0
5571 || window_size
== 12)
5572 && strcasecmp (suffix
, ".tls") == 0)
5574 switch (window_size
)
5576 case 0: orig_insn
.opcode
= xtensa_callx0_opcode
; break;
5577 case 4: orig_insn
.opcode
= xtensa_callx4_opcode
; break;
5578 case 8: orig_insn
.opcode
= xtensa_callx8_opcode
; break;
5579 case 12: orig_insn
.opcode
= xtensa_callx12_opcode
; break;
5583 as_bad (_("wrong number of operands for '%s'"), opname
);
5586 bfd_reloc_code_real_type reloc
;
5587 char *old_input_line_pointer
;
5588 expressionS
*tok
= &orig_insn
.extra_arg
;
5590 old_input_line_pointer
= input_line_pointer
;
5591 input_line_pointer
= arg_strings
[num_args
- 1];
5594 if (tok
->X_op
== O_symbol
5595 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
5596 == BFD_RELOC_XTENSA_TLS_CALL
))
5597 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
5599 as_bad (_("bad relocation expression for '%s'"), opname
);
5601 input_line_pointer
= old_input_line_pointer
;
5607 /* Special case: Check for "j.l" pseudo op. */
5608 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5609 && strncasecmp (opname
, "j.l", 3) == 0)
5612 as_bad (_("wrong number of operands for '%s'"), opname
);
5615 char *old_input_line_pointer
;
5616 expressionS
*tok
= &orig_insn
.extra_arg
;
5618 old_input_line_pointer
= input_line_pointer
;
5619 input_line_pointer
= arg_strings
[num_args
- 1];
5621 expression_maybe_register (xtensa_jx_opcode
, 0, tok
);
5622 input_line_pointer
= old_input_line_pointer
;
5625 orig_insn
.opcode
= xtensa_j_opcode
;
5629 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
5631 xtensa_format fmt
= xtensa_format_lookup (isa
, opname
);
5632 if (fmt
== XTENSA_UNDEFINED
)
5634 as_bad (_("unknown opcode or format name '%s'"), opname
);
5635 error_reset_cur_vinsn ();
5638 if (!cur_vinsn
.inside_bundle
)
5640 as_bad (_("format names only valid inside bundles"));
5641 error_reset_cur_vinsn ();
5644 if (cur_vinsn
.format
!= XTENSA_UNDEFINED
)
5645 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5647 cur_vinsn
.format
= fmt
;
5648 free (has_underbar
? opname
- 1 : opname
);
5649 error_reset_cur_vinsn ();
5653 /* Parse the arguments. */
5654 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
5656 as_bad (_("syntax error"));
5657 error_reset_cur_vinsn ();
5661 /* Free the opcode and argument strings, now that they've been parsed. */
5662 free (has_underbar
? opname
- 1 : opname
);
5664 while (num_args
-- > 0)
5665 free (arg_strings
[num_args
]);
5667 /* Get expressions for invisible operands. */
5668 if (get_invisible_operands (&orig_insn
))
5670 error_reset_cur_vinsn ();
5674 /* Check for the right number and type of arguments. */
5675 if (tinsn_check_arguments (&orig_insn
))
5677 error_reset_cur_vinsn ();
5681 /* Record the line number for each TInsn, because a FLIX bundle may be
5682 spread across multiple input lines and individual instructions may be
5683 moved around in some cases. */
5684 orig_insn
.loc_directive_seen
= dwarf2_loc_directive_seen
;
5685 dwarf2_where (&orig_insn
.debug_line
);
5686 dwarf2_consume_line_info ();
5688 xg_add_branch_and_loop_targets (&orig_insn
);
5690 /* Check that immediate value for ENTRY is >= 16. */
5691 if (orig_insn
.opcode
== xtensa_entry_opcode
&& orig_insn
.ntok
>= 3)
5693 expressionS
*exp
= &orig_insn
.tok
[2];
5694 if (exp
->X_op
== O_constant
&& exp
->X_add_number
< 16)
5695 as_warn (_("entry instruction with stack decrement < 16"));
5699 assemble_tokens (opcode, tok, ntok);
5700 expand the tokens from the orig_insn into the
5701 stack of instructions that will not expand
5702 unless required at relaxation time. */
5704 if (!cur_vinsn
.inside_bundle
)
5705 emit_single_op (&orig_insn
);
5706 else /* We are inside a bundle. */
5708 cur_vinsn
.slots
[cur_vinsn
.num_slots
] = orig_insn
;
5709 cur_vinsn
.num_slots
++;
5710 if (*input_line_pointer
== '}'
5711 || *(input_line_pointer
- 1) == '}'
5712 || *(input_line_pointer
- 2) == '}')
5713 finish_vinsn (&cur_vinsn
);
5716 /* We've just emitted a new instruction so clear the list of labels. */
5717 xtensa_clear_insn_labels ();
5719 xtensa_check_frag_count ();
5723 /* HANDLE_ALIGN hook */
5725 /* For a .align directive, we mark the previous block with the alignment
5726 information. This will be placed in the object file in the
5727 property section corresponding to this section. */
5730 xtensa_handle_align (fragS
*fragP
)
5733 && ! fragP
->tc_frag_data
.is_literal
5734 && (fragP
->fr_type
== rs_align
5735 || fragP
->fr_type
== rs_align_code
)
5736 && fragP
->fr_offset
> 0
5737 && now_seg
!= bss_section
)
5739 fragP
->tc_frag_data
.is_align
= TRUE
;
5740 fragP
->tc_frag_data
.alignment
= fragP
->fr_offset
;
5743 if (fragP
->fr_type
== rs_align_test
)
5746 count
= fragP
->fr_next
->fr_address
- fragP
->fr_address
- fragP
->fr_fix
;
5748 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
5749 _("unaligned entry instruction"));
5752 if (linkrelax
&& fragP
->fr_type
== rs_org
)
5753 fragP
->fr_subtype
= RELAX_ORG
;
5757 /* TC_FRAG_INIT hook */
5760 xtensa_frag_init (fragS
*frag
)
5762 xtensa_set_frag_assembly_state (frag
);
5767 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
5773 /* Round up a section size to the appropriate boundary. */
5776 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
5778 return size
; /* Byte alignment is fine. */
5783 md_pcrel_from (fixS
*fixP
)
5786 static xtensa_insnbuf insnbuf
= NULL
;
5787 static xtensa_insnbuf slotbuf
= NULL
;
5790 xtensa_opcode opcode
;
5793 xtensa_isa isa
= xtensa_default_isa
;
5794 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5795 bfd_boolean alt_reloc
;
5797 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5800 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
)
5805 insnbuf
= xtensa_insnbuf_alloc (isa
);
5806 slotbuf
= xtensa_insnbuf_alloc (isa
);
5809 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5810 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) insn_p
, 0);
5811 fmt
= xtensa_format_decode (isa
, insnbuf
);
5813 if (fmt
== XTENSA_UNDEFINED
)
5814 as_fatal (_("bad instruction format"));
5816 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
) != 0)
5817 as_fatal (_("invalid relocation"));
5819 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5820 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5822 /* Check for "alternate" relocations (operand not specified). None
5823 of the current uses for these are really PC-relative. */
5824 if (alt_reloc
|| opcode
== xtensa_const16_opcode
)
5826 if (opcode
!= xtensa_l32r_opcode
5827 && opcode
!= xtensa_const16_opcode
)
5828 as_fatal (_("invalid relocation for '%s' instruction"),
5829 xtensa_opcode_name (isa
, opcode
));
5833 opnum
= get_relaxable_immed (opcode
);
5835 if (xtensa_operand_is_PCrelative (isa
, opcode
, opnum
) != 1
5836 || xtensa_operand_do_reloc (isa
, opcode
, opnum
, &opnd_value
, addr
))
5838 as_bad_where (fixP
->fx_file
,
5840 _("invalid relocation for operand %d of '%s'"),
5841 opnum
, xtensa_opcode_name (isa
, opcode
));
5844 return 0 - opnd_value
;
5848 /* TC_FORCE_RELOCATION hook */
5851 xtensa_force_relocation (fixS
*fix
)
5853 switch (fix
->fx_r_type
)
5855 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5856 case BFD_RELOC_XTENSA_SLOT0_ALT
:
5857 case BFD_RELOC_XTENSA_SLOT1_ALT
:
5858 case BFD_RELOC_XTENSA_SLOT2_ALT
:
5859 case BFD_RELOC_XTENSA_SLOT3_ALT
:
5860 case BFD_RELOC_XTENSA_SLOT4_ALT
:
5861 case BFD_RELOC_XTENSA_SLOT5_ALT
:
5862 case BFD_RELOC_XTENSA_SLOT6_ALT
:
5863 case BFD_RELOC_XTENSA_SLOT7_ALT
:
5864 case BFD_RELOC_XTENSA_SLOT8_ALT
:
5865 case BFD_RELOC_XTENSA_SLOT9_ALT
:
5866 case BFD_RELOC_XTENSA_SLOT10_ALT
:
5867 case BFD_RELOC_XTENSA_SLOT11_ALT
:
5868 case BFD_RELOC_XTENSA_SLOT12_ALT
:
5869 case BFD_RELOC_XTENSA_SLOT13_ALT
:
5870 case BFD_RELOC_XTENSA_SLOT14_ALT
:
5876 if (linkrelax
&& fix
->fx_addsy
5877 && relaxable_section (S_GET_SEGMENT (fix
->fx_addsy
)))
5880 return generic_force_reloc (fix
);
5884 /* TC_VALIDATE_FIX_SUB hook */
5887 xtensa_validate_fix_sub (fixS
*fix
)
5889 segT add_symbol_segment
, sub_symbol_segment
;
5891 /* The difference of two symbols should be resolved by the assembler when
5892 linkrelax is not set. If the linker may relax the section containing
5893 the symbols, then an Xtensa DIFF relocation must be generated so that
5894 the linker knows to adjust the difference value. */
5895 if (!linkrelax
|| fix
->fx_addsy
== NULL
)
5898 /* Make sure both symbols are in the same segment, and that segment is
5899 "normal" and relaxable. If the segment is not "normal", then the
5900 fix is not valid. If the segment is not "relaxable", then the fix
5901 should have been handled earlier. */
5902 add_symbol_segment
= S_GET_SEGMENT (fix
->fx_addsy
);
5903 if (! SEG_NORMAL (add_symbol_segment
) ||
5904 ! relaxable_section (add_symbol_segment
))
5906 sub_symbol_segment
= S_GET_SEGMENT (fix
->fx_subsy
);
5907 return (sub_symbol_segment
== add_symbol_segment
);
5911 /* NO_PSEUDO_DOT hook */
5913 /* This function has nothing to do with pseudo dots, but this is the
5914 nearest macro to where the check needs to take place. FIXME: This
5918 xtensa_check_inside_bundle (void)
5920 if (cur_vinsn
.inside_bundle
&& input_line_pointer
[-1] == '.')
5921 as_bad (_("directives are not valid inside bundles"));
5923 /* This function must always return FALSE because it is called via a
5924 macro that has nothing to do with bundling. */
5929 /* md_elf_section_change_hook */
5932 xtensa_elf_section_change_hook (void)
5934 /* Set up the assembly state. */
5935 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5936 xtensa_set_frag_assembly_state (frag_now
);
5940 /* tc_fix_adjustable hook */
5943 xtensa_fix_adjustable (fixS
*fixP
)
5945 /* We need the symbol name for the VTABLE entries. */
5946 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5947 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5954 /* tc_symbol_new_hook */
5956 symbolS
*expr_symbols
= NULL
;
5959 xtensa_symbol_new_hook (symbolS
*sym
)
5961 if (is_leb128_expr
&& S_GET_SEGMENT (sym
) == expr_section
)
5963 symbol_get_tc (sym
)->next_expr_symbol
= expr_symbols
;
5970 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
5972 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5975 /* Subtracted symbols are only allowed for a few relocation types, and
5976 unless linkrelax is enabled, they should not make it to this point. */
5977 if (fixP
->fx_subsy
&& !(linkrelax
&& (fixP
->fx_r_type
== BFD_RELOC_32
5978 || fixP
->fx_r_type
== BFD_RELOC_16
5979 || fixP
->fx_r_type
== BFD_RELOC_8
)))
5980 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
5982 switch (fixP
->fx_r_type
)
5984 case BFD_RELOC_32_PCREL
:
5990 switch (fixP
->fx_r_type
)
5993 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF8
;
5994 fixP
->fx_signed
= 0;
5997 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF16
;
5998 fixP
->fx_signed
= 0;
6001 fixP
->fx_r_type
= BFD_RELOC_XTENSA_DIFF32
;
6002 fixP
->fx_signed
= 0;
6008 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6009 - S_GET_VALUE (fixP
->fx_subsy
));
6011 /* The difference value gets written out, and the DIFF reloc
6012 identifies the address of the subtracted symbol (i.e., the one
6013 with the lowest address). */
6015 fixP
->fx_offset
-= val
;
6016 fixP
->fx_subsy
= NULL
;
6018 else if (! fixP
->fx_addsy
)
6025 case BFD_RELOC_XTENSA_PLT
:
6026 md_number_to_chars (fixpos
, val
, fixP
->fx_size
);
6027 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6030 case BFD_RELOC_XTENSA_TLSDESC_FN
:
6031 case BFD_RELOC_XTENSA_TLSDESC_ARG
:
6032 case BFD_RELOC_XTENSA_TLS_TPOFF
:
6033 case BFD_RELOC_XTENSA_TLS_DTPOFF
:
6034 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6035 md_number_to_chars (fixpos
, 0, fixP
->fx_size
);
6036 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6039 case BFD_RELOC_XTENSA_SLOT0_OP
:
6040 case BFD_RELOC_XTENSA_SLOT1_OP
:
6041 case BFD_RELOC_XTENSA_SLOT2_OP
:
6042 case BFD_RELOC_XTENSA_SLOT3_OP
:
6043 case BFD_RELOC_XTENSA_SLOT4_OP
:
6044 case BFD_RELOC_XTENSA_SLOT5_OP
:
6045 case BFD_RELOC_XTENSA_SLOT6_OP
:
6046 case BFD_RELOC_XTENSA_SLOT7_OP
:
6047 case BFD_RELOC_XTENSA_SLOT8_OP
:
6048 case BFD_RELOC_XTENSA_SLOT9_OP
:
6049 case BFD_RELOC_XTENSA_SLOT10_OP
:
6050 case BFD_RELOC_XTENSA_SLOT11_OP
:
6051 case BFD_RELOC_XTENSA_SLOT12_OP
:
6052 case BFD_RELOC_XTENSA_SLOT13_OP
:
6053 case BFD_RELOC_XTENSA_SLOT14_OP
:
6056 /* Write the tentative value of a PC-relative relocation to a
6057 local symbol into the instruction. The value will be ignored
6058 by the linker, and it makes the object file disassembly
6059 readable when all branch targets are encoded in relocations. */
6061 gas_assert (fixP
->fx_addsy
);
6062 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
6063 && !S_FORCE_RELOC (fixP
->fx_addsy
, 1))
6065 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6066 - md_pcrel_from (fixP
));
6067 (void) xg_apply_fix_value (fixP
, val
);
6070 else if (! fixP
->fx_addsy
)
6073 if (xg_apply_fix_value (fixP
, val
))
6078 case BFD_RELOC_XTENSA_ASM_EXPAND
:
6079 case BFD_RELOC_XTENSA_TLS_FUNC
:
6080 case BFD_RELOC_XTENSA_TLS_ARG
:
6081 case BFD_RELOC_XTENSA_TLS_CALL
:
6082 case BFD_RELOC_XTENSA_SLOT0_ALT
:
6083 case BFD_RELOC_XTENSA_SLOT1_ALT
:
6084 case BFD_RELOC_XTENSA_SLOT2_ALT
:
6085 case BFD_RELOC_XTENSA_SLOT3_ALT
:
6086 case BFD_RELOC_XTENSA_SLOT4_ALT
:
6087 case BFD_RELOC_XTENSA_SLOT5_ALT
:
6088 case BFD_RELOC_XTENSA_SLOT6_ALT
:
6089 case BFD_RELOC_XTENSA_SLOT7_ALT
:
6090 case BFD_RELOC_XTENSA_SLOT8_ALT
:
6091 case BFD_RELOC_XTENSA_SLOT9_ALT
:
6092 case BFD_RELOC_XTENSA_SLOT10_ALT
:
6093 case BFD_RELOC_XTENSA_SLOT11_ALT
:
6094 case BFD_RELOC_XTENSA_SLOT12_ALT
:
6095 case BFD_RELOC_XTENSA_SLOT13_ALT
:
6096 case BFD_RELOC_XTENSA_SLOT14_ALT
:
6097 /* These all need to be resolved at link-time. Do nothing now. */
6100 case BFD_RELOC_VTABLE_INHERIT
:
6101 case BFD_RELOC_VTABLE_ENTRY
:
6106 as_bad (_("unhandled local relocation fix %s"),
6107 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6113 md_atof (int type
, char *litP
, int *sizeP
)
6115 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
6120 md_estimate_size_before_relax (fragS
*fragP
, segT seg ATTRIBUTE_UNUSED
)
6122 return total_frag_text_expansion (fragP
);
6126 /* Translate internal representation of relocation info to BFD target
6130 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
6134 reloc
= XNEW (arelent
);
6135 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
6136 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
6137 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6139 /* Make sure none of our internal relocations make it this far.
6140 They'd better have been fully resolved by this point. */
6141 gas_assert ((int) fixp
->fx_r_type
> 0);
6143 reloc
->addend
= fixp
->fx_offset
;
6145 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
6146 if (reloc
->howto
== NULL
)
6148 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
6149 _("cannot represent `%s' relocation in object file"),
6150 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6151 free (reloc
->sym_ptr_ptr
);
6156 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
6157 as_fatal (_("internal error; cannot generate `%s' relocation"),
6158 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6164 /* Checks for resource conflicts between instructions. */
6166 /* The func unit stuff could be implemented as bit-vectors rather
6167 than the iterative approach here. If it ends up being too
6168 slow, we will switch it. */
6171 new_resource_table (void *data
,
6174 unit_num_copies_func uncf
,
6175 opcode_num_units_func onuf
,
6176 opcode_funcUnit_use_unit_func ouuf
,
6177 opcode_funcUnit_use_stage_func ousf
)
6180 resource_table
*rt
= XNEW (resource_table
);
6182 rt
->cycles
= cycles
;
6183 rt
->allocated_cycles
= cycles
;
6185 rt
->unit_num_copies
= uncf
;
6186 rt
->opcode_num_units
= onuf
;
6187 rt
->opcode_unit_use
= ouuf
;
6188 rt
->opcode_unit_stage
= ousf
;
6190 rt
->units
= XCNEWVEC (unsigned char *, cycles
);
6191 for (i
= 0; i
< cycles
; i
++)
6192 rt
->units
[i
] = XCNEWVEC (unsigned char, nu
);
6199 clear_resource_table (resource_table
*rt
)
6202 for (i
= 0; i
< rt
->allocated_cycles
; i
++)
6203 for (j
= 0; j
< rt
->num_units
; j
++)
6204 rt
->units
[i
][j
] = 0;
6208 /* We never shrink it, just fake it into thinking so. */
6211 resize_resource_table (resource_table
*rt
, int cycles
)
6215 rt
->cycles
= cycles
;
6216 if (cycles
<= rt
->allocated_cycles
)
6219 old_cycles
= rt
->allocated_cycles
;
6220 rt
->allocated_cycles
= cycles
;
6222 rt
->units
= XRESIZEVEC (unsigned char *, rt
->units
, rt
->allocated_cycles
);
6223 for (i
= 0; i
< old_cycles
; i
++)
6224 rt
->units
[i
] = XRESIZEVEC (unsigned char, rt
->units
[i
], rt
->num_units
);
6225 for (i
= old_cycles
; i
< cycles
; i
++)
6226 rt
->units
[i
] = XCNEWVEC (unsigned char, rt
->num_units
);
6231 resources_available (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6234 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6236 for (i
= 0; i
< uses
; i
++)
6238 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6239 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6240 int copies_in_use
= rt
->units
[stage
+ cycle
][unit
];
6241 int copies
= (rt
->unit_num_copies
) (rt
->data
, unit
);
6242 if (copies_in_use
>= copies
)
6250 reserve_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6253 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6255 for (i
= 0; i
< uses
; i
++)
6257 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6258 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6259 /* Note that this allows resources to be oversubscribed. That's
6260 essential to the way the optional scheduler works.
6261 resources_available reports when a resource is over-subscribed,
6262 so it's easy to tell. */
6263 rt
->units
[stage
+ cycle
][unit
]++;
6269 release_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6272 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6274 for (i
= 0; i
< uses
; i
++)
6276 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6277 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6278 gas_assert (rt
->units
[stage
+ cycle
][unit
] > 0);
6279 rt
->units
[stage
+ cycle
][unit
]--;
6284 /* Wrapper functions make parameterized resource reservation
6288 opcode_funcUnit_use_unit (void *data
, xtensa_opcode opcode
, int idx
)
6290 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6296 opcode_funcUnit_use_stage (void *data
, xtensa_opcode opcode
, int idx
)
6298 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6303 /* Note that this function does not check issue constraints, but
6304 solely whether the hardware is available to execute the given
6305 instructions together. It also doesn't check if the tinsns
6306 write the same state, or access the same tieports. That is
6307 checked by check_t1_t2_reads_and_writes. */
6310 resources_conflict (vliw_insn
*vinsn
)
6313 static resource_table
*rt
= NULL
;
6315 /* This is the most common case by far. Optimize it. */
6316 if (vinsn
->num_slots
== 1)
6321 xtensa_isa isa
= xtensa_default_isa
;
6322 rt
= new_resource_table
6323 (isa
, xtensa_num_pipe_stages
,
6324 xtensa_isa_num_funcUnits (isa
),
6325 (unit_num_copies_func
) xtensa_funcUnit_num_copies
,
6326 (opcode_num_units_func
) xtensa_opcode_num_funcUnit_uses
,
6327 opcode_funcUnit_use_unit
,
6328 opcode_funcUnit_use_stage
);
6331 clear_resource_table (rt
);
6333 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6335 if (!resources_available (rt
, vinsn
->slots
[i
].opcode
, 0))
6337 reserve_resources (rt
, vinsn
->slots
[i
].opcode
, 0);
6344 /* finish_vinsn, emit_single_op and helper functions. */
6346 static bfd_boolean
find_vinsn_conflicts (vliw_insn
*);
6347 static xtensa_format
xg_find_narrowest_format (vliw_insn
*);
6348 static void xg_assemble_vliw_tokens (vliw_insn
*);
6351 /* We have reached the end of a bundle; emit into the frag. */
6354 finish_vinsn (vliw_insn
*vinsn
)
6360 if (find_vinsn_conflicts (vinsn
))
6362 xg_clear_vinsn (vinsn
);
6366 /* First, find a format that works. */
6367 if (vinsn
->format
== XTENSA_UNDEFINED
)
6368 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6370 slots
= xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
);
6372 && produce_flix
== FLIX_NONE
)
6374 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6375 xg_clear_vinsn (vinsn
);
6379 if (vinsn
->format
== XTENSA_UNDEFINED
)
6381 as_bad (_("couldn't find a valid instruction format"));
6382 fprintf (stderr
, _(" ops were: "));
6383 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6384 fprintf (stderr
, _(" %s;"),
6385 xtensa_opcode_name (xtensa_default_isa
,
6386 vinsn
->slots
[i
].opcode
));
6387 fprintf (stderr
, _("\n"));
6388 xg_clear_vinsn (vinsn
);
6392 if (vinsn
->num_slots
!= slots
)
6394 as_bad (_("mismatch for format '%s': #slots = %d, #opcodes = %d"),
6395 xtensa_format_name (xtensa_default_isa
, vinsn
->format
),
6396 slots
, vinsn
->num_slots
);
6397 xg_clear_vinsn (vinsn
);
6401 if (resources_conflict (vinsn
))
6403 as_bad (_("illegal resource usage in bundle"));
6404 fprintf (stderr
, " ops were: ");
6405 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6406 fprintf (stderr
, " %s;",
6407 xtensa_opcode_name (xtensa_default_isa
,
6408 vinsn
->slots
[i
].opcode
));
6409 fprintf (stderr
, "\n");
6410 xg_clear_vinsn (vinsn
);
6414 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6416 if (vinsn
->slots
[i
].opcode
!= XTENSA_UNDEFINED
)
6418 symbolS
*lit_sym
= NULL
;
6420 bfd_boolean e
= FALSE
;
6421 bfd_boolean saved_density
= density_supported
;
6423 /* We don't want to narrow ops inside multi-slot bundles. */
6424 if (vinsn
->num_slots
> 1)
6425 density_supported
= FALSE
;
6427 istack_init (&slotstack
);
6428 if (vinsn
->slots
[i
].opcode
== xtensa_nop_opcode
)
6430 vinsn
->slots
[i
].opcode
=
6431 xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6433 vinsn
->slots
[i
].ntok
= 0;
6436 if (xg_expand_assembly_insn (&slotstack
, &vinsn
->slots
[i
]))
6442 density_supported
= saved_density
;
6446 xg_clear_vinsn (vinsn
);
6450 for (j
= 0; j
< slotstack
.ninsn
; j
++)
6452 TInsn
*insn
= &slotstack
.insn
[j
];
6453 if (insn
->insn_type
== ITYPE_LITERAL
)
6455 gas_assert (lit_sym
== NULL
);
6456 lit_sym
= xg_assemble_literal (insn
);
6460 gas_assert (insn
->insn_type
== ITYPE_INSN
);
6462 xg_resolve_literals (insn
, lit_sym
);
6463 if (j
!= slotstack
.ninsn
- 1)
6464 emit_single_op (insn
);
6468 if (vinsn
->num_slots
> 1)
6470 if (opcode_fits_format_slot
6471 (slotstack
.insn
[slotstack
.ninsn
- 1].opcode
,
6474 vinsn
->slots
[i
] = slotstack
.insn
[slotstack
.ninsn
- 1];
6478 emit_single_op (&slotstack
.insn
[slotstack
.ninsn
- 1]);
6479 if (vinsn
->format
== XTENSA_UNDEFINED
)
6480 vinsn
->slots
[i
].opcode
= xtensa_nop_opcode
;
6482 vinsn
->slots
[i
].opcode
6483 = xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6486 vinsn
->slots
[i
].ntok
= 0;
6491 vinsn
->slots
[0] = slotstack
.insn
[slotstack
.ninsn
- 1];
6492 vinsn
->format
= XTENSA_UNDEFINED
;
6497 /* Now check resource conflicts on the modified bundle. */
6498 if (resources_conflict (vinsn
))
6500 as_bad (_("illegal resource usage in bundle"));
6501 fprintf (stderr
, " ops were: ");
6502 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6503 fprintf (stderr
, " %s;",
6504 xtensa_opcode_name (xtensa_default_isa
,
6505 vinsn
->slots
[i
].opcode
));
6506 fprintf (stderr
, "\n");
6507 xg_clear_vinsn (vinsn
);
6511 /* First, find a format that works. */
6512 if (vinsn
->format
== XTENSA_UNDEFINED
)
6513 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6515 xg_assemble_vliw_tokens (vinsn
);
6517 xg_clear_vinsn (vinsn
);
6519 xtensa_check_frag_count ();
6523 /* Given an vliw instruction, what conflicts are there in register
6524 usage and in writes to states and queues?
6526 This function does two things:
6527 1. Reports an error when a vinsn contains illegal combinations
6528 of writes to registers states or queues.
6529 2. Marks individual tinsns as not relaxable if the combination
6530 contains antidependencies.
6532 Job 2 handles things like swap semantics in instructions that need
6533 to be relaxed. For example,
6537 normally would be relaxed to
6542 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6544 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6546 then we can't relax it into
6549 { add a0, a1, a0 ; add a2, a0, a4 ; }
6551 because the value of a0 is trashed before the second add can read it. */
6553 static char check_t1_t2_reads_and_writes (TInsn
*, TInsn
*);
6556 find_vinsn_conflicts (vliw_insn
*vinsn
)
6560 xtensa_isa isa
= xtensa_default_isa
;
6562 gas_assert (!past_xtensa_end
);
6564 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6566 TInsn
*op1
= &vinsn
->slots
[i
];
6567 if (op1
->is_specific_opcode
)
6568 op1
->keep_wide
= TRUE
;
6570 op1
->keep_wide
= FALSE
;
6573 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6575 TInsn
*op1
= &vinsn
->slots
[i
];
6577 if (xtensa_opcode_is_branch (isa
, op1
->opcode
) == 1)
6580 for (j
= 0; j
< vinsn
->num_slots
; j
++)
6584 TInsn
*op2
= &vinsn
->slots
[j
];
6585 char conflict_type
= check_t1_t2_reads_and_writes (op1
, op2
);
6586 switch (conflict_type
)
6589 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6590 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6591 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6594 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6595 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6596 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6599 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6600 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6601 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6604 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6605 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6606 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6609 /* Everything is OK. */
6612 op2
->is_specific_opcode
= (op2
->is_specific_opcode
6613 || conflict_type
== 'a');
6620 as_bad (_("multiple branches or jumps in the same bundle"));
6628 /* Check how the state used by t1 and t2 relate.
6631 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6632 case B: no relationship between what is read and written (both could
6633 read the same reg though)
6634 case C: t1 writes a register t2 writes (a register conflict within a
6636 case D: t1 writes a state that t2 also writes
6637 case E: t1 writes a tie queue that t2 also writes
6638 case F: two volatile queue accesses
6642 check_t1_t2_reads_and_writes (TInsn
*t1
, TInsn
*t2
)
6644 xtensa_isa isa
= xtensa_default_isa
;
6645 xtensa_regfile t1_regfile
, t2_regfile
;
6647 int t1_base_reg
, t1_last_reg
;
6648 int t2_base_reg
, t2_last_reg
;
6649 char t1_inout
, t2_inout
;
6651 char conflict
= 'b';
6656 bfd_boolean t1_volatile
= FALSE
;
6657 bfd_boolean t2_volatile
= FALSE
;
6659 /* Check registers. */
6660 for (j
= 0; j
< t2
->ntok
; j
++)
6662 if (xtensa_operand_is_register (isa
, t2
->opcode
, j
) != 1)
6665 t2_regfile
= xtensa_operand_regfile (isa
, t2
->opcode
, j
);
6666 t2_base_reg
= t2
->tok
[j
].X_add_number
;
6667 t2_last_reg
= t2_base_reg
+ xtensa_operand_num_regs (isa
, t2
->opcode
, j
);
6669 for (i
= 0; i
< t1
->ntok
; i
++)
6671 if (xtensa_operand_is_register (isa
, t1
->opcode
, i
) != 1)
6674 t1_regfile
= xtensa_operand_regfile (isa
, t1
->opcode
, i
);
6676 if (t1_regfile
!= t2_regfile
)
6679 t1_inout
= xtensa_operand_inout (isa
, t1
->opcode
, i
);
6680 t2_inout
= xtensa_operand_inout (isa
, t2
->opcode
, j
);
6682 if (xtensa_operand_is_known_reg (isa
, t1
->opcode
, i
) == 0
6683 || xtensa_operand_is_known_reg (isa
, t2
->opcode
, j
) == 0)
6685 if (t1_inout
== 'm' || t1_inout
== 'o'
6686 || t2_inout
== 'm' || t2_inout
== 'o')
6693 t1_base_reg
= t1
->tok
[i
].X_add_number
;
6694 t1_last_reg
= (t1_base_reg
6695 + xtensa_operand_num_regs (isa
, t1
->opcode
, i
));
6697 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
6699 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
6701 if (t1_reg
!= t2_reg
)
6704 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6710 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6716 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6724 t1_states
= xtensa_opcode_num_stateOperands (isa
, t1
->opcode
);
6725 t2_states
= xtensa_opcode_num_stateOperands (isa
, t2
->opcode
);
6726 for (j
= 0; j
< t2_states
; j
++)
6728 xtensa_state t2_so
= xtensa_stateOperand_state (isa
, t2
->opcode
, j
);
6729 t2_inout
= xtensa_stateOperand_inout (isa
, t2
->opcode
, j
);
6730 for (i
= 0; i
< t1_states
; i
++)
6732 xtensa_state t1_so
= xtensa_stateOperand_state (isa
, t1
->opcode
, i
);
6733 t1_inout
= xtensa_stateOperand_inout (isa
, t1
->opcode
, i
);
6734 if (t1_so
!= t2_so
|| xtensa_state_is_shared_or (isa
, t1_so
) == 1)
6737 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6743 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6749 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6754 /* Check tieports. */
6755 t1_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t1
->opcode
);
6756 t2_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t2
->opcode
);
6757 for (j
= 0; j
< t2_interfaces
; j
++)
6759 xtensa_interface t2_int
6760 = xtensa_interfaceOperand_interface (isa
, t2
->opcode
, j
);
6761 int t2_class
= xtensa_interface_class_id (isa
, t2_int
);
6763 t2_inout
= xtensa_interface_inout (isa
, t2_int
);
6764 if (xtensa_interface_has_side_effect (isa
, t2_int
) == 1)
6767 for (i
= 0; i
< t1_interfaces
; i
++)
6769 xtensa_interface t1_int
6770 = xtensa_interfaceOperand_interface (isa
, t1
->opcode
, j
);
6771 int t1_class
= xtensa_interface_class_id (isa
, t1_int
);
6773 t1_inout
= xtensa_interface_inout (isa
, t1_int
);
6774 if (xtensa_interface_has_side_effect (isa
, t1_int
) == 1)
6777 if (t1_volatile
&& t2_volatile
&& (t1_class
== t2_class
))
6780 if (t1_int
!= t2_int
)
6783 if (t2_inout
== 'i' && t1_inout
== 'o')
6789 if (t1_inout
== 'i' && t2_inout
== 'o')
6795 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6804 static xtensa_format
6805 xg_find_narrowest_format (vliw_insn
*vinsn
)
6807 /* Right now we assume that the ops within the vinsn are properly
6808 ordered for the slots that the programmer wanted them in. In
6809 other words, we don't rearrange the ops in hopes of finding a
6810 better format. The scheduler handles that. */
6812 xtensa_isa isa
= xtensa_default_isa
;
6813 xtensa_format format
;
6814 xtensa_opcode nop_opcode
= xtensa_nop_opcode
;
6816 if (vinsn
->num_slots
== 1)
6817 return xg_get_single_format (vinsn
->slots
[0].opcode
);
6819 for (format
= 0; format
< xtensa_isa_num_formats (isa
); format
++)
6822 xg_copy_vinsn (&v_copy
, vinsn
);
6823 if (xtensa_format_num_slots (isa
, format
) == v_copy
.num_slots
)
6827 for (slot
= 0; slot
< v_copy
.num_slots
; slot
++)
6829 if (v_copy
.slots
[slot
].opcode
== nop_opcode
)
6831 v_copy
.slots
[slot
].opcode
=
6832 xtensa_format_slot_nop_opcode (isa
, format
, slot
);
6833 v_copy
.slots
[slot
].ntok
= 0;
6836 if (opcode_fits_format_slot (v_copy
.slots
[slot
].opcode
,
6839 else if (v_copy
.num_slots
> 1)
6842 /* Try the widened version. */
6843 if (!v_copy
.slots
[slot
].keep_wide
6844 && !v_copy
.slots
[slot
].is_specific_opcode
6845 && xg_is_single_relaxable_insn (&v_copy
.slots
[slot
],
6847 && opcode_fits_format_slot (widened
.opcode
,
6850 v_copy
.slots
[slot
] = widened
;
6855 if (fit
== v_copy
.num_slots
)
6857 xg_copy_vinsn (vinsn
, &v_copy
);
6858 xtensa_format_encode (isa
, format
, vinsn
->insnbuf
);
6859 vinsn
->format
= format
;
6865 if (format
== xtensa_isa_num_formats (isa
))
6866 return XTENSA_UNDEFINED
;
6872 /* Return the additional space needed in a frag
6873 for possible relaxations of any ops in a VLIW insn.
6874 Also fill out the relaxations that might be required of
6875 each tinsn in the vinsn. */
6878 relaxation_requirements (vliw_insn
*vinsn
, bfd_boolean
*pfinish_frag
)
6880 bfd_boolean finish_frag
= FALSE
;
6881 int extra_space
= 0;
6884 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6886 TInsn
*tinsn
= &vinsn
->slots
[slot
];
6887 if (!tinsn_has_symbolic_operands (tinsn
))
6889 /* A narrow instruction could be widened later to help
6890 alignment issues. */
6891 if (xg_is_single_relaxable_insn (tinsn
, 0, TRUE
)
6892 && !tinsn
->is_specific_opcode
6893 && vinsn
->num_slots
== 1)
6895 /* Difference in bytes between narrow and wide insns... */
6897 tinsn
->subtype
= RELAX_NARROW
;
6902 if (workaround_b_j_loop_end
6903 && tinsn
->opcode
== xtensa_jx_opcode
6904 && use_transform ())
6906 /* Add 2 of these. */
6907 extra_space
+= 3; /* for the nop size */
6908 tinsn
->subtype
= RELAX_ADD_NOP_IF_PRE_LOOP_END
;
6911 /* Need to assemble it with space for the relocation. */
6912 if (xg_is_relaxable_insn (tinsn
, 0)
6913 && !tinsn
->is_specific_opcode
)
6915 int max_size
= xg_get_max_insn_widen_size (tinsn
->opcode
);
6916 int max_literal_size
=
6917 xg_get_max_insn_widen_literal_size (tinsn
->opcode
);
6919 tinsn
->literal_space
= max_literal_size
;
6921 tinsn
->subtype
= RELAX_IMMED
;
6922 extra_space
+= max_size
;
6926 /* A fix record will be added for this instruction prior
6927 to relaxation, so make it end the frag. */
6932 *pfinish_frag
= finish_frag
;
6938 bundle_tinsn (TInsn
*tinsn
, vliw_insn
*vinsn
)
6940 xtensa_isa isa
= xtensa_default_isa
;
6941 int slot
, chosen_slot
;
6943 vinsn
->format
= xg_get_single_format (tinsn
->opcode
);
6944 gas_assert (vinsn
->format
!= XTENSA_UNDEFINED
);
6945 vinsn
->num_slots
= xtensa_format_num_slots (isa
, vinsn
->format
);
6947 chosen_slot
= xg_get_single_slot (tinsn
->opcode
);
6948 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6950 if (slot
== chosen_slot
)
6951 vinsn
->slots
[slot
] = *tinsn
;
6954 vinsn
->slots
[slot
].opcode
=
6955 xtensa_format_slot_nop_opcode (isa
, vinsn
->format
, slot
);
6956 vinsn
->slots
[slot
].ntok
= 0;
6957 vinsn
->slots
[slot
].insn_type
= ITYPE_INSN
;
6964 emit_single_op (TInsn
*orig_insn
)
6967 IStack istack
; /* put instructions into here */
6968 symbolS
*lit_sym
= NULL
;
6969 symbolS
*label_sym
= NULL
;
6971 istack_init (&istack
);
6973 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6974 Because the scheduling and bundling characteristics of movi and
6975 l32r or const16 are so different, we can do much better if we relax
6976 it prior to scheduling and bundling, rather than after. */
6977 if ((orig_insn
->opcode
== xtensa_movi_opcode
6978 || orig_insn
->opcode
== xtensa_movi_n_opcode
)
6979 && !cur_vinsn
.inside_bundle
6980 && (orig_insn
->tok
[1].X_op
== O_symbol
6981 || orig_insn
->tok
[1].X_op
== O_pltrel
6982 || orig_insn
->tok
[1].X_op
== O_tlsfunc
6983 || orig_insn
->tok
[1].X_op
== O_tlsarg
6984 || orig_insn
->tok
[1].X_op
== O_tpoff
6985 || orig_insn
->tok
[1].X_op
== O_dtpoff
)
6986 && !orig_insn
->is_specific_opcode
&& use_transform ())
6987 xg_assembly_relax (&istack
, orig_insn
, now_seg
, frag_now
, 0, 1, 0);
6989 if (xg_expand_assembly_insn (&istack
, orig_insn
))
6992 for (i
= 0; i
< istack
.ninsn
; i
++)
6994 TInsn
*insn
= &istack
.insn
[i
];
6995 switch (insn
->insn_type
)
6998 gas_assert (lit_sym
== NULL
);
6999 lit_sym
= xg_assemble_literal (insn
);
7003 static int relaxed_sym_idx
= 0;
7004 char *label
= XNEWVEC (char, strlen (FAKE_LABEL_NAME
) + 12);
7005 sprintf (label
, "%s_rl_%x", FAKE_LABEL_NAME
, relaxed_sym_idx
++);
7007 gas_assert (label_sym
== NULL
);
7008 label_sym
= symbol_find_or_make (label
);
7009 gas_assert (label_sym
);
7017 xg_resolve_literals (insn
, lit_sym
);
7019 xg_resolve_labels (insn
, label_sym
);
7021 bundle_tinsn (insn
, &v
);
7036 total_frag_text_expansion (fragS
*fragP
)
7039 int total_expansion
= 0;
7041 for (slot
= 0; slot
< config_max_slots
; slot
++)
7042 total_expansion
+= fragP
->tc_frag_data
.text_expansion
[slot
];
7044 return total_expansion
;
7048 /* Emit a vliw instruction to the current fragment. */
7051 xg_assemble_vliw_tokens (vliw_insn
*vinsn
)
7053 bfd_boolean finish_frag
;
7054 bfd_boolean is_jump
= FALSE
;
7055 bfd_boolean is_branch
= FALSE
;
7056 xtensa_isa isa
= xtensa_default_isa
;
7061 struct dwarf2_line_info debug_line
;
7062 bfd_boolean loc_directive_seen
= FALSE
;
7065 memset (&debug_line
, 0, sizeof (struct dwarf2_line_info
));
7067 if (generating_literals
)
7069 static int reported
= 0;
7071 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
7072 _("cannot assemble into a literal fragment"));
7079 if (frag_now_fix () != 0
7080 && (! frag_now
->tc_frag_data
.is_insn
7081 || (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7082 || (!use_transform ()) != frag_now
->tc_frag_data
.is_no_transform
7083 || (directive_state
[directive_longcalls
]
7084 != frag_now
->tc_frag_data
.use_longcalls
)
7085 || (directive_state
[directive_absolute_literals
]
7086 != frag_now
->tc_frag_data
.use_absolute_literals
)))
7088 frag_wane (frag_now
);
7090 xtensa_set_frag_assembly_state (frag_now
);
7093 if (workaround_a0_b_retw
7094 && vinsn
->num_slots
== 1
7095 && (get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
7096 && xtensa_opcode_is_branch (isa
, vinsn
->slots
[0].opcode
) == 1
7097 && use_transform ())
7099 has_a0_b_retw
= TRUE
;
7101 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7102 After the first assembly pass we will check all of them and
7103 add a nop if needed. */
7104 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7105 frag_var (rs_machine_dependent
, 4, 4,
7106 RELAX_ADD_NOP_IF_A0_B_RETW
,
7107 frag_now
->fr_symbol
,
7108 frag_now
->fr_offset
,
7110 xtensa_set_frag_assembly_state (frag_now
);
7111 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7112 frag_var (rs_machine_dependent
, 4, 4,
7113 RELAX_ADD_NOP_IF_A0_B_RETW
,
7114 frag_now
->fr_symbol
,
7115 frag_now
->fr_offset
,
7117 xtensa_set_frag_assembly_state (frag_now
);
7120 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7122 tinsn
= &vinsn
->slots
[slot
];
7124 /* See if the instruction implies an aligned section. */
7125 if (xtensa_opcode_is_loop (isa
, tinsn
->opcode
) == 1)
7126 record_alignment (now_seg
, 2);
7128 /* Determine the best line number for debug info. */
7129 if ((tinsn
->loc_directive_seen
|| !loc_directive_seen
)
7130 && (tinsn
->debug_line
.filenum
!= debug_line
.filenum
7131 || tinsn
->debug_line
.line
< debug_line
.line
7132 || tinsn
->debug_line
.column
< debug_line
.column
))
7133 debug_line
= tinsn
->debug_line
;
7134 if (tinsn
->loc_directive_seen
)
7135 loc_directive_seen
= TRUE
;
7138 /* Special cases for instructions that force an alignment... */
7139 /* None of these opcodes are bundle-able. */
7140 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1)
7144 /* Remember the symbol that marks the end of the loop in the frag
7145 that marks the start of the loop. This way we can easily find
7146 the end of the loop at the beginning, without adding special code
7147 to mark the loop instructions themselves. */
7148 symbolS
*target_sym
= NULL
;
7149 if (vinsn
->slots
[0].tok
[1].X_op
== O_symbol
)
7150 target_sym
= vinsn
->slots
[0].tok
[1].X_add_symbol
;
7152 xtensa_set_frag_assembly_state (frag_now
);
7153 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7155 max_fill
= get_text_align_max_fill_size
7156 (get_text_align_power (xtensa_fetch_width
),
7157 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
7159 if (use_transform ())
7160 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
7161 RELAX_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7163 frag_var (rs_machine_dependent
, 0, 0,
7164 RELAX_CHECK_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7165 xtensa_set_frag_assembly_state (frag_now
);
7168 if (vinsn
->slots
[0].opcode
== xtensa_entry_opcode
7169 && !vinsn
->slots
[0].is_specific_opcode
)
7171 xtensa_mark_literal_pool_location ();
7172 xtensa_move_labels (frag_now
, 0);
7173 frag_var (rs_align_test
, 1, 1, 0, NULL
, 2, NULL
);
7176 if (vinsn
->num_slots
== 1)
7178 if (workaround_a0_b_retw
&& use_transform ())
7179 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
7180 is_register_writer (&vinsn
->slots
[0], "a", 0));
7182 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
7183 is_bad_loopend_opcode (&vinsn
->slots
[0]));
7186 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
, FALSE
);
7188 insn_size
= xtensa_format_length (isa
, vinsn
->format
);
7190 extra_space
= relaxation_requirements (vinsn
, &finish_frag
);
7192 /* vinsn_to_insnbuf will produce the error. */
7193 if (vinsn
->format
!= XTENSA_UNDEFINED
)
7195 f
= frag_more (insn_size
+ extra_space
);
7196 xtensa_set_frag_assembly_state (frag_now
);
7197 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7200 vinsn_to_insnbuf (vinsn
, f
, frag_now
, FALSE
);
7201 if (vinsn
->format
== XTENSA_UNDEFINED
)
7204 xtensa_insnbuf_to_chars (isa
, vinsn
->insnbuf
, (unsigned char *) f
, 0);
7206 if (debug_type
== DEBUG_DWARF2
|| loc_directive_seen
)
7207 dwarf2_gen_line_info (frag_now_fix () - (insn_size
+ extra_space
),
7210 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7212 tinsn
= &vinsn
->slots
[slot
];
7213 frag_now
->tc_frag_data
.slot_subtypes
[slot
] = tinsn
->subtype
;
7214 frag_now
->tc_frag_data
.slot_symbols
[slot
] = tinsn
->symbol
;
7215 frag_now
->tc_frag_data
.slot_offsets
[slot
] = tinsn
->offset
;
7216 frag_now
->tc_frag_data
.literal_frags
[slot
] = tinsn
->literal_frag
;
7217 if (tinsn
->opcode
== xtensa_l32r_opcode
)
7219 frag_now
->tc_frag_data
.literal_frags
[slot
] =
7220 tinsn
->tok
[1].X_add_symbol
->sy_frag
;
7222 if (tinsn
->literal_space
!= 0)
7223 xg_assemble_literal_space (tinsn
->literal_space
, slot
);
7224 frag_now
->tc_frag_data
.free_reg
[slot
] = tinsn
->extra_arg
;
7226 if (tinsn
->subtype
== RELAX_NARROW
)
7227 gas_assert (vinsn
->num_slots
== 1);
7228 if (xtensa_opcode_is_jump (isa
, tinsn
->opcode
) == 1)
7230 if (xtensa_opcode_is_branch (isa
, tinsn
->opcode
) == 1)
7233 if (tinsn
->subtype
|| tinsn
->symbol
|| tinsn
->offset
7234 || tinsn
->literal_frag
|| is_jump
|| is_branch
)
7238 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7239 frag_now
->tc_frag_data
.is_specific_opcode
= TRUE
;
7243 frag_variant (rs_machine_dependent
,
7244 extra_space
, extra_space
, RELAX_SLOTS
,
7245 frag_now
->fr_symbol
, frag_now
->fr_offset
, f
);
7246 xtensa_set_frag_assembly_state (frag_now
);
7249 /* Special cases for loops:
7250 close_loop_end should be inserted AFTER short_loop.
7251 Make sure that CLOSE loops are processed BEFORE short_loops
7252 when converting them. */
7254 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7255 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1
7256 && !vinsn
->slots
[0].is_specific_opcode
)
7258 if (workaround_short_loop
&& use_transform ())
7260 maybe_has_short_loop
= TRUE
;
7261 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7262 frag_var (rs_machine_dependent
, 4, 4,
7263 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7264 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7265 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7266 frag_var (rs_machine_dependent
, 4, 4,
7267 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7268 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7271 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7272 loop at least 12 bytes away from another loop's end. */
7273 if (workaround_close_loop_end
&& use_transform ())
7275 maybe_has_close_loop_end
= TRUE
;
7276 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7277 frag_var (rs_machine_dependent
, 12, 12,
7278 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
7279 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7283 if (use_transform ())
7287 gas_assert (finish_frag
);
7288 frag_var (rs_machine_dependent
,
7289 xtensa_fetch_width
, xtensa_fetch_width
,
7291 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7292 xtensa_set_frag_assembly_state (frag_now
);
7293 xtensa_maybe_create_trampoline_frag ();
7294 /* Always create one here. */
7295 xtensa_maybe_create_literal_pool_frag (TRUE
, FALSE
);
7297 else if (is_branch
&& do_align_targets ())
7299 gas_assert (finish_frag
);
7300 frag_var (rs_machine_dependent
,
7301 xtensa_fetch_width
, xtensa_fetch_width
,
7302 RELAX_MAYBE_UNREACHABLE
,
7303 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7304 xtensa_set_frag_assembly_state (frag_now
);
7305 frag_var (rs_machine_dependent
,
7307 RELAX_MAYBE_DESIRE_ALIGN
,
7308 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7309 xtensa_set_frag_assembly_state (frag_now
);
7313 /* Now, if the original opcode was a call... */
7314 if (do_align_targets ()
7315 && xtensa_opcode_is_call (isa
, vinsn
->slots
[0].opcode
) == 1)
7317 float freq
= get_subseg_total_freq (now_seg
, now_subseg
);
7318 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7319 frag_var (rs_machine_dependent
, 4, (int) freq
, RELAX_DESIRE_ALIGN
,
7320 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7321 xtensa_set_frag_assembly_state (frag_now
);
7324 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7326 frag_wane (frag_now
);
7328 xtensa_set_frag_assembly_state (frag_now
);
7333 /* xtensa_end and helper functions. */
7335 static void xtensa_cleanup_align_frags (void);
7336 static void xtensa_fix_target_frags (void);
7337 static void xtensa_mark_narrow_branches (void);
7338 static void xtensa_mark_zcl_first_insns (void);
7339 static void xtensa_mark_difference_of_two_symbols (void);
7340 static void xtensa_fix_a0_b_retw_frags (void);
7341 static void xtensa_fix_b_j_loop_end_frags (void);
7342 static void xtensa_fix_close_loop_end_frags (void);
7343 static void xtensa_fix_short_loop_frags (void);
7344 static void xtensa_sanity_check (void);
7345 static void xtensa_add_config_info (void);
7350 directive_balance ();
7351 xtensa_flush_pending_output ();
7353 past_xtensa_end
= TRUE
;
7355 xtensa_move_literals ();
7357 xtensa_reorder_segments ();
7358 xtensa_cleanup_align_frags ();
7359 xtensa_fix_target_frags ();
7360 if (workaround_a0_b_retw
&& has_a0_b_retw
)
7361 xtensa_fix_a0_b_retw_frags ();
7362 if (workaround_b_j_loop_end
)
7363 xtensa_fix_b_j_loop_end_frags ();
7365 /* "close_loop_end" should be processed BEFORE "short_loop". */
7366 if (workaround_close_loop_end
&& maybe_has_close_loop_end
)
7367 xtensa_fix_close_loop_end_frags ();
7369 if (workaround_short_loop
&& maybe_has_short_loop
)
7370 xtensa_fix_short_loop_frags ();
7372 xtensa_mark_narrow_branches ();
7373 xtensa_mark_zcl_first_insns ();
7375 xtensa_sanity_check ();
7377 xtensa_add_config_info ();
7379 xtensa_check_frag_count ();
7382 struct trampoline_chain_entry
7388 /* Trampoline chain for a given (sym, offset) pair is a sorted array
7389 of locations of trampoline jumps leading there. Jumps are represented
7390 as pairs (sym, offset): trampoline frag symbol and offset of the jump
7392 struct trampoline_chain
7394 struct trampoline_chain_entry target
;
7395 struct trampoline_chain_entry
*entry
;
7398 bfd_boolean needs_sorting
;
7401 struct trampoline_chain_index
7403 struct trampoline_chain
*entry
;
7406 bfd_boolean needs_sorting
;
7409 struct trampoline_index
7416 struct trampoline_seg
7418 struct trampoline_seg
*next
;
7420 /* Trampolines ordered by their frag fr_address */
7421 struct trampoline_index index
;
7422 /* Known trampoline chains ordered by (sym, offset) pair */
7423 struct trampoline_chain_index chain_index
;
7426 static struct trampoline_seg trampoline_seg_list
;
7427 #define J_RANGE (128 * 1024)
7428 #define J_MARGIN 4096
7430 static int unreachable_count
= 0;
7434 xtensa_maybe_create_trampoline_frag (void)
7436 if (!use_trampolines
)
7439 /* We create an area for possible trampolines every 10 unreachable frags.
7440 These are preferred over the ones not preceded by an unreachable frag,
7441 because we don't have to jump around them. This function is called after
7442 each RELAX_UNREACHABLE frag is created. */
7444 if (++unreachable_count
> 10)
7446 xtensa_create_trampoline_frag (FALSE
);
7447 clear_frag_count ();
7448 unreachable_count
= 0;
7453 xtensa_check_frag_count (void)
7455 if (!use_trampolines
|| frag_now
->tc_frag_data
.is_no_transform
)
7458 /* We create an area for possible trampolines every 8000 frags or so. This
7459 is an estimate based on the max range of a "j" insn (+/-128K) divided
7460 by a typical frag byte count (16), minus a few for safety. This function
7461 is called after each source line is processed. */
7463 if (get_frag_count () > 8000)
7465 xtensa_create_trampoline_frag (TRUE
);
7466 clear_frag_count ();
7467 unreachable_count
= 0;
7470 /* We create an area for a possible literal pool every N (default 5000)
7472 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
7475 static xtensa_insnbuf trampoline_buf
= NULL
;
7476 static xtensa_insnbuf trampoline_slotbuf
= NULL
;
7478 static xtensa_insnbuf litpool_buf
= NULL
;
7479 static xtensa_insnbuf litpool_slotbuf
= NULL
;
7481 #define TRAMPOLINE_FRAG_SIZE 3000
7483 static struct trampoline_seg
*
7484 find_trampoline_seg (asection
*seg
)
7486 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7487 static struct trampoline_seg
*mr
;
7489 if (mr
&& mr
->seg
== seg
)
7492 for ( ; ts
; ts
= ts
->next
)
7504 static size_t xg_find_trampoline (const struct trampoline_index
*idx
,
7508 size_t b
= idx
->n_entries
;
7512 size_t c
= (a
+ b
) / 2;
7514 if (idx
->entry
[c
]->fr_address
<= addr
)
7522 static void xg_add_trampoline_to_index (struct trampoline_index
*idx
,
7525 if (idx
->n_entries
== idx
->n_max
)
7527 idx
->n_max
= (idx
->n_entries
+ 1) * 2;
7528 idx
->entry
= xrealloc (idx
->entry
,
7529 sizeof (*idx
->entry
) * idx
->n_max
);
7531 idx
->entry
[idx
->n_entries
] = fragP
;
7535 static void xg_remove_trampoline_from_index (struct trampoline_index
*idx
,
7538 gas_assert (i
< idx
->n_entries
);
7539 memmove (idx
->entry
+ i
, idx
->entry
+ i
+ 1,
7540 (idx
->n_entries
- i
- 1) * sizeof (*idx
->entry
));
7544 static void xg_add_trampoline_to_seg (struct trampoline_seg
*ts
,
7547 xg_add_trampoline_to_index (&ts
->index
, fragP
);
7551 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around
)
7553 /* Emit a frag where we can place intermediate jump instructions,
7554 in case we need to jump farther than 128K bytes.
7555 Each jump instruction takes three bytes.
7556 We allocate enough for 1000 trampolines in each frag.
7557 If that's not enough, oh well. */
7559 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
7562 int size
= TRAMPOLINE_FRAG_SIZE
;
7566 ts
= XCNEW(struct trampoline_seg
);
7567 ts
->next
= trampoline_seg_list
.next
;
7568 trampoline_seg_list
.next
= ts
;
7572 frag_wane (frag_now
);
7574 xtensa_set_frag_assembly_state (frag_now
);
7575 varP
= frag_var (rs_machine_dependent
, size
, size
, RELAX_TRAMPOLINE
, NULL
, 0, NULL
);
7576 fragP
= (fragS
*)(varP
- SIZEOF_STRUCT_FRAG
);
7577 if (trampoline_buf
== NULL
)
7579 trampoline_buf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7580 trampoline_slotbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7582 fragP
->tc_frag_data
.needs_jump_around
= needs_jump_around
;
7583 xg_add_trampoline_to_seg (ts
, fragP
);
7586 static bfd_boolean
xg_is_trampoline_frag_full (const fragS
*fragP
)
7588 return fragP
->fr_var
< 3;
7591 static int xg_order_trampoline_chain_entry (const void *a
, const void *b
)
7593 const struct trampoline_chain_entry
*pa
= a
;
7594 const struct trampoline_chain_entry
*pb
= b
;
7596 if (pa
->sym
== pb
->sym
||
7597 S_GET_VALUE (pa
->sym
) == S_GET_VALUE (pb
->sym
))
7598 if (pa
->offset
== pb
->offset
)
7601 return pa
->offset
< pb
->offset
? -1 : 1;
7603 return S_GET_VALUE (pa
->sym
) < S_GET_VALUE (pb
->sym
) ? -1 : 1;
7606 static void xg_sort_trampoline_chain (struct trampoline_chain
*tc
)
7608 qsort (tc
->entry
, tc
->n_entries
, sizeof (*tc
->entry
),
7609 xg_order_trampoline_chain_entry
);
7610 tc
->needs_sorting
= FALSE
;
7613 /* Find entry index in the given chain with maximal address <= source. */
7614 static size_t xg_find_chain_entry (struct trampoline_chain
*tc
,
7618 size_t b
= tc
->n_entries
;
7620 if (tc
->needs_sorting
)
7621 xg_sort_trampoline_chain (tc
);
7625 size_t c
= (a
+ b
) / 2;
7626 struct trampoline_chain_entry
*e
= tc
->entry
+ c
;
7628 if (S_GET_VALUE(e
->sym
) + e
->offset
<= source
)
7636 /* Find the best jump target for the source in the given trampoline chain.
7637 The best jump target is the one that results in the shortest path to the
7638 final target, it's the location of the jump closest to the final target,
7639 but within the J_RANGE - J_MARGIN from the source. */
7640 static struct trampoline_chain_entry
*
7641 xg_get_best_chain_entry (struct trampoline_chain
*tc
, addressT source
)
7643 addressT target
= S_GET_VALUE(tc
->target
.sym
) + tc
->target
.offset
;
7644 size_t i
= xg_find_chain_entry (tc
, source
);
7645 struct trampoline_chain_entry
*e
= tc
->entry
+ i
;
7646 int step
= target
< source
? -1 : 1;
7647 addressT chained_target
;
7650 if (target
> source
&&
7651 S_GET_VALUE(e
->sym
) + e
->offset
<= source
&&
7652 i
+ 1 < tc
->n_entries
)
7655 while (i
+ step
< tc
->n_entries
)
7657 struct trampoline_chain_entry
*next
= tc
->entry
+ i
+ step
;
7659 chained_target
= S_GET_VALUE(next
->sym
) + next
->offset
;
7660 off
= source
- chained_target
;
7662 if (labs (off
) >= J_RANGE
- J_MARGIN
)
7669 chained_target
= S_GET_VALUE(e
->sym
) + e
->offset
;
7670 off
= source
- chained_target
;
7672 if (labs (off
) < J_MARGIN
||
7673 labs (off
) >= J_RANGE
- J_MARGIN
)
7675 return tc
->entry
+ i
;
7678 static int xg_order_trampoline_chain (const void *a
, const void *b
)
7680 const struct trampoline_chain
*_pa
= a
;
7681 const struct trampoline_chain
*_pb
= b
;
7682 const struct trampoline_chain_entry
*pa
= &_pa
->target
;
7683 const struct trampoline_chain_entry
*pb
= &_pb
->target
;
7684 symbolS
*s1
= pa
->sym
;
7685 symbolS
*s2
= pb
->sym
;
7687 if (s1
->sy_flags
.sy_local_symbol
7688 && local_symbol_converted_p ((struct local_symbol
*) s1
))
7689 s1
= local_symbol_get_real_symbol ((struct local_symbol
*) s1
);
7691 if (s2
->sy_flags
.sy_local_symbol
7692 && local_symbol_converted_p ((struct local_symbol
*) s2
))
7693 s2
= local_symbol_get_real_symbol ((struct local_symbol
*) s2
);
7696 if (pa
->offset
== pb
->offset
)
7699 return pa
->offset
< pb
->offset
? -1 : 1;
7701 return s1
< s2
? -1 : 1;
7704 static struct trampoline_chain
*
7705 xg_get_trampoline_chain (struct trampoline_seg
*ts
,
7709 struct trampoline_chain_index
*idx
= &ts
->chain_index
;
7710 struct trampoline_chain c
;
7712 if (idx
->needs_sorting
)
7714 qsort (idx
->entry
, idx
->n_entries
, sizeof (*idx
->entry
),
7715 xg_order_trampoline_chain
);
7716 idx
->needs_sorting
= FALSE
;
7719 c
.target
.offset
= offset
;
7720 return bsearch (&c
, idx
->entry
, idx
->n_entries
,
7721 sizeof (struct trampoline_chain
),
7722 xg_order_trampoline_chain
);
7725 /* Find trampoline chain in the given trampoline segment that is going
7726 to the *sym + *offset. If found, replace *sym and *offset with the
7727 best jump target in that chain. */
7728 static struct trampoline_chain
*
7729 xg_find_best_eq_target (struct trampoline_seg
*ts
,
7730 addressT source
, symbolS
**sym
,
7733 struct trampoline_chain
*tc
= xg_get_trampoline_chain (ts
, *sym
, *offset
);
7737 struct trampoline_chain_entry
*e
= xg_get_best_chain_entry (tc
, source
);
7740 *offset
= e
->offset
;
7745 static void xg_add_location_to_chain (struct trampoline_chain
*tc
,
7746 symbolS
*sym
, addressT offset
)
7748 struct trampoline_chain_entry
*e
;
7750 if (tc
->n_entries
== tc
->n_max
)
7752 tc
->n_max
= (tc
->n_max
+ 1) * 2;
7753 tc
->entry
= xrealloc (tc
->entry
, sizeof (*tc
->entry
) * tc
->n_max
);
7755 e
= tc
->entry
+ tc
->n_entries
;
7759 tc
->needs_sorting
= TRUE
;
7762 static struct trampoline_chain
*
7763 xg_create_trampoline_chain (struct trampoline_seg
*ts
,
7764 symbolS
*sym
, addressT offset
)
7766 struct trampoline_chain_index
*idx
= &ts
->chain_index
;
7767 struct trampoline_chain
*tc
;
7769 if (idx
->n_entries
== idx
->n_max
)
7771 idx
->n_max
= (idx
->n_max
+ 1) * 2;
7772 idx
->entry
= xrealloc (idx
->entry
,
7773 sizeof (*idx
->entry
) * idx
->n_max
);
7776 tc
= idx
->entry
+ idx
->n_entries
;
7777 tc
->target
.sym
= sym
;
7778 tc
->target
.offset
= offset
;
7782 xg_add_location_to_chain (tc
, sym
, offset
);
7785 idx
->needs_sorting
= TRUE
;
7790 void dump_trampolines (void);
7793 dump_trampolines (void)
7795 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7797 for ( ; ts
; ts
= ts
->next
)
7800 asection
*seg
= ts
->seg
;
7804 fprintf(stderr
, "SECTION %s\n", seg
->name
);
7806 for (i
= 0; i
< ts
->index
.n_entries
; ++i
)
7808 fragS
*tf
= ts
->index
.entry
[i
];
7810 fprintf(stderr
, " 0x%08x: fix=%d, jump_around=%s\n",
7811 (int)tf
->fr_address
, (int)tf
->fr_fix
,
7812 tf
->tc_frag_data
.needs_jump_around
? "T" : "F");
7817 static void dump_litpools (void) __attribute__ ((unused
));
7820 dump_litpools (void)
7822 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7823 struct litpool_frag
*lpf
;
7825 for ( ; lps
; lps
= lps
->next
)
7827 printf("litpool seg %s\n", lps
->seg
->name
);
7828 for ( lpf
= lps
->frag_list
.next
; lpf
->fragP
; lpf
= lpf
->next
)
7830 fragS
*litfrag
= lpf
->fragP
->fr_next
;
7832 while (litfrag
&& litfrag
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7834 if (litfrag
->fr_fix
== 4)
7836 litfrag
= litfrag
->fr_next
;
7838 printf(" %ld <%d:%d> (%d) [%d]: ",
7839 lpf
->addr
, lpf
->priority
, lpf
->original_priority
,
7840 lpf
->fragP
->fr_line
, count
);
7841 //dump_frag(lpf->fragP);
7847 xtensa_maybe_create_literal_pool_frag (bfd_boolean create
,
7848 bfd_boolean only_if_needed
)
7850 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7852 struct litpool_frag
*lpf
;
7853 bfd_boolean needed
= FALSE
;
7855 if (use_literal_section
|| !auto_litpools
)
7858 for ( ; lps
; lps
= lps
->next
)
7860 if (lps
->seg
== now_seg
)
7866 lps
= XCNEW (struct litpool_seg
);
7867 lps
->next
= litpool_seg_list
.next
;
7868 litpool_seg_list
.next
= lps
;
7870 lps
->frag_list
.next
= &lps
->frag_list
;
7871 lps
->frag_list
.prev
= &lps
->frag_list
;
7872 /* Put candidate literal pool at the beginning of every section,
7873 so that even when section starts with literal load there's a
7874 literal pool available. */
7875 lps
->frag_count
= auto_litpool_limit
;
7884 if (past_xtensa_end
|| !use_transform() ||
7885 frag_now
->tc_frag_data
.is_no_transform
)
7889 if (auto_litpool_limit
<= 0)
7891 /* Don't create a litpool based only on frag count. */
7894 else if (lps
->frag_count
> auto_litpool_limit
)
7911 int size
= (only_if_needed
) ? 3 : 0; /* Space for a "j" insn. */
7912 /* Create a potential site for a literal pool. */
7913 frag_wane (frag_now
);
7915 xtensa_set_frag_assembly_state (frag_now
);
7917 fragP
->tc_frag_data
.lit_frchain
= frchain_now
;
7918 fragP
->tc_frag_data
.literal_frag
= fragP
;
7919 frag_var (rs_machine_dependent
, size
, size
,
7921 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
7922 RELAX_LITERAL_POOL_BEGIN
,
7924 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
7925 frag_variant (rs_machine_dependent
, 0, 0,
7926 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
7927 xtensa_set_frag_assembly_state (frag_now
);
7931 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7932 just record it here. */
7936 lpf
= XNEW (struct litpool_frag
);
7937 /* Insert at tail of circular list. */
7939 lps
->frag_list
.prev
->next
= lpf
;
7940 lpf
->next
= &lps
->frag_list
;
7941 lpf
->prev
= lps
->frag_list
.prev
;
7942 lps
->frag_list
.prev
= lpf
;
7944 lpf
->priority
= (needed
) ? (only_if_needed
) ? 3 : 2 : 1;
7945 lpf
->original_priority
= lpf
->priority
;
7946 lpf
->literal_count
= 0;
7948 lps
->frag_count
= 0;
7952 xtensa_cleanup_align_frags (void)
7957 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7958 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7961 /* Walk over all of the fragments in a subsection. */
7962 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7964 if ((fragP
->fr_type
== rs_align
7965 || fragP
->fr_type
== rs_align_code
7966 || (fragP
->fr_type
== rs_machine_dependent
7967 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
7968 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
7969 && fragP
->fr_fix
== 0)
7971 fragS
*next
= fragP
->fr_next
;
7974 && next
->fr_fix
== 0
7975 && next
->fr_type
== rs_machine_dependent
7976 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7979 next
= next
->fr_next
;
7982 /* If we don't widen branch targets, then they
7983 will be easier to align. */
7984 if (fragP
->tc_frag_data
.is_branch_target
7985 && fragP
->fr_opcode
== fragP
->fr_literal
7986 && fragP
->fr_type
== rs_machine_dependent
7987 && fragP
->fr_subtype
== RELAX_SLOTS
7988 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
7990 if (fragP
->fr_type
== rs_machine_dependent
7991 && fragP
->fr_subtype
== RELAX_UNREACHABLE
)
7992 fragP
->tc_frag_data
.is_unreachable
= TRUE
;
7998 /* Re-process all of the fragments looking to convert all of the
7999 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
8000 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
8001 Otherwise, convert to a .fill 0. */
8004 xtensa_fix_target_frags (void)
8009 /* When this routine is called, all of the subsections are still intact
8010 so we walk over subsections instead of sections. */
8011 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8012 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8016 /* Walk over all of the fragments in a subsection. */
8017 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8019 if (fragP
->fr_type
== rs_machine_dependent
8020 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
8022 if (next_frag_is_branch_target (fragP
))
8023 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
8032 static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS
*, TInsn
*);
8035 xtensa_mark_narrow_branches (void)
8040 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8041 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8044 /* Walk over all of the fragments in a subsection. */
8045 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8047 if (fragP
->fr_type
== rs_machine_dependent
8048 && fragP
->fr_subtype
== RELAX_SLOTS
8049 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8053 vinsn_from_chars (&vinsn
, fragP
->fr_opcode
);
8054 tinsn_immed_from_frag (&vinsn
.slots
[0], fragP
, 0);
8056 if (vinsn
.num_slots
== 1
8057 && xtensa_opcode_is_branch (xtensa_default_isa
,
8058 vinsn
.slots
[0].opcode
) == 1
8059 && xg_get_single_size (vinsn
.slots
[0].opcode
) == 2
8060 && is_narrow_branch_guaranteed_in_range (fragP
,
8063 fragP
->fr_subtype
= RELAX_SLOTS
;
8064 fragP
->tc_frag_data
.slot_subtypes
[0] = RELAX_NARROW
;
8065 fragP
->tc_frag_data
.is_aligning_branch
= 1;
8073 /* A branch is typically widened only when its target is out of
8074 range. However, we would like to widen them to align a subsequent
8075 branch target when possible.
8077 Because the branch relaxation code is so convoluted, the optimal solution
8078 (combining the two cases) is difficult to get right in all circumstances.
8079 We therefore go with an "almost as good" solution, where we only
8080 use for alignment narrow branches that definitely will not expand to a
8081 jump and a branch. These functions find and mark these cases. */
8083 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
8084 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
8085 We start counting beginning with the frag after the 2-byte branch, so the
8086 maximum offset is (4 - 2) + 63 = 65. */
8087 #define MAX_IMMED6 65
8089 static offsetT
unrelaxed_frag_max_size (fragS
*);
8092 is_narrow_branch_guaranteed_in_range (fragS
*fragP
, TInsn
*tinsn
)
8094 const expressionS
*exp
= &tinsn
->tok
[1];
8095 symbolS
*symbolP
= exp
->X_add_symbol
;
8096 offsetT max_distance
= exp
->X_add_number
;
8099 if (exp
->X_op
!= O_symbol
)
8102 target_frag
= symbol_get_frag (symbolP
);
8104 max_distance
+= (S_GET_VALUE (symbolP
) - target_frag
->fr_address
);
8105 if (is_branch_jmp_to_next (tinsn
, fragP
))
8108 /* The branch doesn't branch over it's own frag,
8109 but over the subsequent ones. */
8110 fragP
= fragP
->fr_next
;
8111 while (fragP
!= NULL
&& fragP
!= target_frag
&& max_distance
<= MAX_IMMED6
)
8113 max_distance
+= unrelaxed_frag_max_size (fragP
);
8114 fragP
= fragP
->fr_next
;
8116 if (max_distance
<= MAX_IMMED6
&& fragP
== target_frag
)
8123 xtensa_mark_zcl_first_insns (void)
8128 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8129 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8132 /* Walk over all of the fragments in a subsection. */
8133 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8135 if (fragP
->fr_type
== rs_machine_dependent
8136 && (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
8137 || fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
))
8139 /* Find the loop frag. */
8140 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8141 /* Find the first insn frag. */
8142 fragS
*targ_frag
= next_non_empty_frag (loop_frag
);
8144 /* Handle a corner case that comes up in hardware
8145 diagnostics. The original assembly looks like this:
8148 <empty_frag>--not found by next_non_empty_frag
8151 Depending on the start address, the assembler may or
8152 may not change it to look something like this:
8155 nop--frag isn't empty anymore
8158 So set up to check the alignment of the nop if it
8160 while (loop_frag
!= targ_frag
)
8162 if (loop_frag
->fr_type
== rs_machine_dependent
8163 && (loop_frag
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
8164 || loop_frag
->fr_subtype
8165 == RELAX_CHECK_ALIGN_NEXT_OPCODE
))
8166 targ_frag
= loop_frag
;
8168 loop_frag
= loop_frag
->fr_next
;
8171 /* Of course, sometimes (mostly for toy test cases) a
8172 zero-cost loop instruction is the last in a section. */
8175 targ_frag
->tc_frag_data
.is_first_loop_insn
= TRUE
;
8176 /* Do not widen a frag that is the first instruction of a
8177 zero-cost loop. It makes that loop harder to align. */
8178 if (targ_frag
->fr_type
== rs_machine_dependent
8179 && targ_frag
->fr_subtype
== RELAX_SLOTS
8180 && (targ_frag
->tc_frag_data
.slot_subtypes
[0]
8183 if (targ_frag
->tc_frag_data
.is_aligning_branch
)
8184 targ_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
8187 frag_wane (targ_frag
);
8188 targ_frag
->tc_frag_data
.slot_subtypes
[0] = 0;
8192 if (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)
8200 /* When a difference-of-symbols expression is encoded as a uleb128 or
8201 sleb128 value, the linker is unable to adjust that value to account for
8202 link-time relaxation. Mark all the code between such symbols so that
8203 its size cannot be changed by linker relaxation. */
8206 xtensa_mark_difference_of_two_symbols (void)
8210 for (expr_sym
= expr_symbols
; expr_sym
;
8211 expr_sym
= symbol_get_tc (expr_sym
)->next_expr_symbol
)
8213 expressionS
*exp
= symbol_get_value_expression (expr_sym
);
8215 if (exp
->X_op
== O_subtract
)
8217 symbolS
*left
= exp
->X_add_symbol
;
8218 symbolS
*right
= exp
->X_op_symbol
;
8220 /* Difference of two symbols not in the same section
8221 are handled with relocations in the linker. */
8222 if (S_GET_SEGMENT (left
) == S_GET_SEGMENT (right
))
8228 if (symbol_get_frag (left
)->fr_address
8229 <= symbol_get_frag (right
)->fr_address
)
8231 start
= symbol_get_frag (left
);
8232 end
= symbol_get_frag (right
);
8236 start
= symbol_get_frag (right
);
8237 end
= symbol_get_frag (left
);
8240 if (start
->tc_frag_data
.no_transform_end
!= NULL
)
8241 walk
= start
->tc_frag_data
.no_transform_end
;
8246 walk
->tc_frag_data
.is_no_transform
= 1;
8247 walk
= walk
->fr_next
;
8249 while (walk
&& walk
->fr_address
< end
->fr_address
);
8251 start
->tc_frag_data
.no_transform_end
= walk
;
8258 /* Re-process all of the fragments looking to convert all of the
8259 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
8260 conditional branch or a retw/retw.n, convert this frag to one that
8261 will generate a NOP. In any case close it off with a .fill 0. */
8263 static bfd_boolean
next_instrs_are_b_retw (fragS
*);
8266 xtensa_fix_a0_b_retw_frags (void)
8271 /* When this routine is called, all of the subsections are still intact
8272 so we walk over subsections instead of sections. */
8273 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8274 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8278 /* Walk over all of the fragments in a subsection. */
8279 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8281 if (fragP
->fr_type
== rs_machine_dependent
8282 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
8284 if (next_instrs_are_b_retw (fragP
))
8286 if (fragP
->tc_frag_data
.is_no_transform
)
8287 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
8289 relax_frag_add_nop (fragP
);
8299 next_instrs_are_b_retw (fragS
*fragP
)
8301 xtensa_opcode opcode
;
8303 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
8304 static xtensa_insnbuf insnbuf
= NULL
;
8305 static xtensa_insnbuf slotbuf
= NULL
;
8306 xtensa_isa isa
= xtensa_default_isa
;
8309 bfd_boolean branch_seen
= FALSE
;
8313 insnbuf
= xtensa_insnbuf_alloc (isa
);
8314 slotbuf
= xtensa_insnbuf_alloc (isa
);
8317 if (next_fragP
== NULL
)
8320 /* Check for the conditional branch. */
8321 xtensa_insnbuf_from_chars
8322 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8323 fmt
= xtensa_format_decode (isa
, insnbuf
);
8324 if (fmt
== XTENSA_UNDEFINED
)
8327 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8329 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
8330 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
8332 branch_seen
= (branch_seen
8333 || xtensa_opcode_is_branch (isa
, opcode
) == 1);
8339 offset
+= xtensa_format_length (isa
, fmt
);
8340 if (offset
== next_fragP
->fr_fix
)
8342 next_fragP
= next_non_empty_frag (next_fragP
);
8346 if (next_fragP
== NULL
)
8349 /* Check for the retw/retw.n. */
8350 xtensa_insnbuf_from_chars
8351 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8352 fmt
= xtensa_format_decode (isa
, insnbuf
);
8354 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8355 have no problems. */
8356 if (fmt
== XTENSA_UNDEFINED
8357 || xtensa_format_num_slots (isa
, fmt
) != 1)
8360 xtensa_format_get_slot (isa
, fmt
, 0, insnbuf
, slotbuf
);
8361 opcode
= xtensa_opcode_decode (isa
, fmt
, 0, slotbuf
);
8363 if (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
)
8370 /* Re-process all of the fragments looking to convert all of the
8371 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8372 loop end label, convert this frag to one that will generate a NOP.
8373 In any case close it off with a .fill 0. */
8375 static bfd_boolean
next_instr_is_loop_end (fragS
*);
8378 xtensa_fix_b_j_loop_end_frags (void)
8383 /* When this routine is called, all of the subsections are still intact
8384 so we walk over subsections instead of sections. */
8385 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8386 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8390 /* Walk over all of the fragments in a subsection. */
8391 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8393 if (fragP
->fr_type
== rs_machine_dependent
8394 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
8396 if (next_instr_is_loop_end (fragP
))
8398 if (fragP
->tc_frag_data
.is_no_transform
)
8399 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8401 relax_frag_add_nop (fragP
);
8411 next_instr_is_loop_end (fragS
*fragP
)
8413 const fragS
*next_fragP
;
8415 if (next_frag_is_loop_target (fragP
))
8418 next_fragP
= next_non_empty_frag (fragP
);
8419 if (next_fragP
== NULL
)
8422 if (!next_frag_is_loop_target (next_fragP
))
8425 /* If the size is >= 3 then there is more than one instruction here.
8426 The hardware bug will not fire. */
8427 if (next_fragP
->fr_fix
> 3)
8434 /* Re-process all of the fragments looking to convert all of the
8435 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8436 not MY loop's loop end within 12 bytes, add enough nops here to
8437 make it at least 12 bytes away. In any case close it off with a
8440 static offsetT min_bytes_to_other_loop_end
8441 (fragS
*, fragS
*, offsetT
);
8444 xtensa_fix_close_loop_end_frags (void)
8449 /* When this routine is called, all of the subsections are still intact
8450 so we walk over subsections instead of sections. */
8451 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8452 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8456 fragS
*current_target
= NULL
;
8458 /* Walk over all of the fragments in a subsection. */
8459 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8461 if (fragP
->fr_type
== rs_machine_dependent
8462 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8463 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8464 current_target
= symbol_get_frag (fragP
->fr_symbol
);
8467 && fragP
->fr_type
== rs_machine_dependent
8468 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
8471 int bytes_added
= 0;
8473 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8474 /* Max out at 12. */
8475 min_bytes
= min_bytes_to_other_loop_end
8476 (fragP
->fr_next
, current_target
, REQUIRED_LOOP_DIVIDING_BYTES
);
8478 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
8480 if (fragP
->tc_frag_data
.is_no_transform
)
8481 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8484 while (min_bytes
+ bytes_added
8485 < REQUIRED_LOOP_DIVIDING_BYTES
)
8489 if (fragP
->fr_var
< length
)
8490 as_fatal (_("fr_var %lu < length %d"),
8491 (long) fragP
->fr_var
, length
);
8494 assemble_nop (length
,
8495 fragP
->fr_literal
+ fragP
->fr_fix
);
8496 fragP
->fr_fix
+= length
;
8497 fragP
->fr_var
-= length
;
8499 bytes_added
+= length
;
8505 gas_assert (fragP
->fr_type
!= rs_machine_dependent
8506 || fragP
->fr_subtype
!= RELAX_ADD_NOP_IF_CLOSE_LOOP_END
);
8512 static offsetT
unrelaxed_frag_min_size (fragS
*);
8515 min_bytes_to_other_loop_end (fragS
*fragP
,
8516 fragS
*current_target
,
8520 fragS
*current_fragP
;
8522 for (current_fragP
= fragP
;
8524 current_fragP
= current_fragP
->fr_next
)
8526 if (current_fragP
->tc_frag_data
.is_loop_target
8527 && current_fragP
!= current_target
)
8530 offset
+= unrelaxed_frag_min_size (current_fragP
);
8532 if (offset
>= max_size
)
8540 unrelaxed_frag_min_size (fragS
*fragP
)
8542 offsetT size
= fragP
->fr_fix
;
8544 /* Add fill size. */
8545 if (fragP
->fr_type
== rs_fill
)
8546 size
+= fragP
->fr_offset
;
8553 unrelaxed_frag_max_size (fragS
*fragP
)
8555 offsetT size
= fragP
->fr_fix
;
8556 switch (fragP
->fr_type
)
8559 /* Empty frags created by the obstack allocation scheme
8560 end up with type 0. */
8565 size
+= fragP
->fr_offset
;
8573 /* No further adjustments needed. */
8575 case rs_machine_dependent
:
8576 if (fragP
->fr_subtype
!= RELAX_DESIRE_ALIGN
)
8577 size
+= fragP
->fr_var
;
8580 /* We had darn well better know how big it is. */
8589 /* Re-process all of the fragments looking to convert all
8590 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8593 1) the instruction size count to the loop end label
8594 is too short (<= 2 instructions),
8595 2) loop has a jump or branch in it
8598 1) workaround_all_short_loops is TRUE
8599 2) The generating loop was a 'loopgtz' or 'loopnez'
8600 3) the instruction size count to the loop end label is too short
8602 then convert this frag (and maybe the next one) to generate a NOP.
8603 In any case close it off with a .fill 0. */
8605 static int count_insns_to_loop_end (fragS
*, bfd_boolean
, int);
8606 static bfd_boolean
branch_before_loop_end (fragS
*);
8609 xtensa_fix_short_loop_frags (void)
8614 /* When this routine is called, all of the subsections are still intact
8615 so we walk over subsections instead of sections. */
8616 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8617 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8620 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
8622 /* Walk over all of the fragments in a subsection. */
8623 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8625 if (fragP
->fr_type
== rs_machine_dependent
8626 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8627 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8630 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8631 tinsn_from_chars (&t_insn
, loop_frag
->fr_opcode
, 0);
8632 current_opcode
= t_insn
.opcode
;
8633 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa
,
8634 current_opcode
) == 1);
8637 if (fragP
->fr_type
== rs_machine_dependent
8638 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8640 if (count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3) < 3
8641 && (branch_before_loop_end (fragP
->fr_next
)
8642 || (workaround_all_short_loops
8643 && current_opcode
!= XTENSA_UNDEFINED
8644 && current_opcode
!= xtensa_loop_opcode
)))
8646 if (fragP
->tc_frag_data
.is_no_transform
)
8647 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8649 relax_frag_add_nop (fragP
);
8658 static int unrelaxed_frag_min_insn_count (fragS
*);
8661 count_insns_to_loop_end (fragS
*base_fragP
,
8662 bfd_boolean count_relax_add
,
8665 fragS
*fragP
= NULL
;
8670 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
8672 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
8673 if (insn_count
>= max_count
)
8676 if (count_relax_add
)
8678 if (fragP
->fr_type
== rs_machine_dependent
8679 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8681 /* In order to add the appropriate number of
8682 NOPs, we count an instruction for downstream
8685 if (insn_count
>= max_count
)
8695 unrelaxed_frag_min_insn_count (fragS
*fragP
)
8697 xtensa_isa isa
= xtensa_default_isa
;
8698 static xtensa_insnbuf insnbuf
= NULL
;
8702 if (!fragP
->tc_frag_data
.is_insn
)
8706 insnbuf
= xtensa_insnbuf_alloc (isa
);
8708 /* Decode the fixed instructions. */
8709 while (offset
< fragP
->fr_fix
)
8713 xtensa_insnbuf_from_chars
8714 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8715 fmt
= xtensa_format_decode (isa
, insnbuf
);
8717 if (fmt
== XTENSA_UNDEFINED
)
8719 as_fatal (_("undecodable instruction in instruction frag"));
8722 offset
+= xtensa_format_length (isa
, fmt
);
8730 static bfd_boolean
unrelaxed_frag_has_b_j (fragS
*);
8733 branch_before_loop_end (fragS
*base_fragP
)
8737 for (fragP
= base_fragP
;
8738 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
8739 fragP
= fragP
->fr_next
)
8741 if (unrelaxed_frag_has_b_j (fragP
))
8749 unrelaxed_frag_has_b_j (fragS
*fragP
)
8751 static xtensa_insnbuf insnbuf
= NULL
;
8752 xtensa_isa isa
= xtensa_default_isa
;
8755 if (!fragP
->tc_frag_data
.is_insn
)
8759 insnbuf
= xtensa_insnbuf_alloc (isa
);
8761 /* Decode the fixed instructions. */
8762 while (offset
< fragP
->fr_fix
)
8767 xtensa_insnbuf_from_chars
8768 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8769 fmt
= xtensa_format_decode (isa
, insnbuf
);
8770 if (fmt
== XTENSA_UNDEFINED
)
8773 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8775 xtensa_opcode opcode
=
8776 get_opcode_from_buf (fragP
->fr_literal
+ offset
, slot
);
8777 if (xtensa_opcode_is_branch (isa
, opcode
) == 1
8778 || xtensa_opcode_is_jump (isa
, opcode
) == 1)
8781 offset
+= xtensa_format_length (isa
, fmt
);
8787 /* Checks to be made after initial assembly but before relaxation. */
8789 static bfd_boolean
is_empty_loop (const TInsn
*, fragS
*);
8790 static bfd_boolean
is_local_forward_loop (const TInsn
*, fragS
*);
8793 xtensa_sanity_check (void)
8795 const char *file_name
;
8800 file_name
= as_where (&line
);
8801 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8802 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8806 /* Walk over all of the fragments in a subsection. */
8807 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8809 if (fragP
->fr_type
== rs_machine_dependent
8810 && fragP
->fr_subtype
== RELAX_SLOTS
8811 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8813 static xtensa_insnbuf insnbuf
= NULL
;
8816 if (fragP
->fr_opcode
!= NULL
)
8819 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
8820 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
, 0);
8821 tinsn_immed_from_frag (&t_insn
, fragP
, 0);
8823 if (xtensa_opcode_is_loop (xtensa_default_isa
,
8824 t_insn
.opcode
) == 1)
8826 if (is_empty_loop (&t_insn
, fragP
))
8828 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8829 as_bad (_("invalid empty loop"));
8831 if (!is_local_forward_loop (&t_insn
, fragP
))
8833 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8834 as_bad (_("loop target does not follow "
8835 "loop instruction in section"));
8842 new_logical_line (file_name
, line
);
8846 #define LOOP_IMMED_OPN 1
8848 /* Return TRUE if the loop target is the next non-zero fragment. */
8851 is_empty_loop (const TInsn
*insn
, fragS
*fragP
)
8853 const expressionS
*exp
;
8857 if (insn
->insn_type
!= ITYPE_INSN
)
8860 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8863 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8866 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8868 if (exp
->X_op
!= O_symbol
)
8871 symbolP
= exp
->X_add_symbol
;
8875 if (symbol_get_frag (symbolP
) == NULL
)
8878 if (S_GET_VALUE (symbolP
) != 0)
8881 /* Walk through the zero-size fragments from this one. If we find
8882 the target fragment, then this is a zero-size loop. */
8884 for (next_fragP
= fragP
->fr_next
;
8886 next_fragP
= next_fragP
->fr_next
)
8888 if (next_fragP
== symbol_get_frag (symbolP
))
8890 if (next_fragP
->fr_fix
!= 0)
8898 is_local_forward_loop (const TInsn
*insn
, fragS
*fragP
)
8900 const expressionS
*exp
;
8904 if (insn
->insn_type
!= ITYPE_INSN
)
8907 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8910 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8913 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8915 if (exp
->X_op
!= O_symbol
)
8918 symbolP
= exp
->X_add_symbol
;
8922 if (symbol_get_frag (symbolP
) == NULL
)
8925 /* Walk through fragments until we find the target.
8926 If we do not find the target, then this is an invalid loop. */
8928 for (next_fragP
= fragP
->fr_next
;
8930 next_fragP
= next_fragP
->fr_next
)
8932 if (next_fragP
== symbol_get_frag (symbolP
))
8940 #define XTINFO_NAME "Xtensa_Info"
8941 #define XTINFO_NAMESZ 12
8942 #define XTINFO_TYPE 1
8945 xtensa_add_config_info (void)
8951 info_sec
= subseg_new (".xtensa.info", 0);
8952 bfd_set_section_flags (stdoutput
, info_sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
8954 data
= XNEWVEC (char, 100);
8955 sprintf (data
, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8956 XSHAL_USE_ABSOLUTE_LITERALS
, XSHAL_ABI
);
8957 sz
= strlen (data
) + 1;
8959 /* Add enough null terminators to pad to a word boundary. */
8962 while ((sz
& 3) != 0);
8964 /* Follow the standard note section layout:
8965 First write the length of the name string. */
8967 md_number_to_chars (p
, (valueT
) XTINFO_NAMESZ
, 4);
8969 /* Next comes the length of the "descriptor", i.e., the actual data. */
8971 md_number_to_chars (p
, (valueT
) sz
, 4);
8973 /* Write the note type. */
8975 md_number_to_chars (p
, (valueT
) XTINFO_TYPE
, 4);
8977 /* Write the name field. */
8978 p
= frag_more (XTINFO_NAMESZ
);
8979 memcpy (p
, XTINFO_NAME
, XTINFO_NAMESZ
);
8981 /* Finally, write the descriptor. */
8983 memcpy (p
, data
, sz
);
8989 /* Alignment Functions. */
8992 get_text_align_power (unsigned target_size
)
8994 if (target_size
<= 4)
8997 if (target_size
<= 8)
9000 if (target_size
<= 16)
9003 if (target_size
<= 32)
9006 if (target_size
<= 64)
9009 if (target_size
<= 128)
9012 if (target_size
<= 256)
9015 if (target_size
<= 512)
9018 if (target_size
<= 1024)
9027 get_text_align_max_fill_size (int align_pow
,
9028 bfd_boolean use_nops
,
9029 bfd_boolean use_no_density
)
9032 return (1 << align_pow
);
9034 return 3 * (1 << align_pow
);
9036 return 1 + (1 << align_pow
);
9040 /* Calculate the minimum bytes of fill needed at "address" to align a
9041 target instruction of size "target_size" so that it does not cross a
9042 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
9043 the fill can be an arbitrary number of bytes. Otherwise, the space must
9044 be filled by NOP instructions. */
9047 get_text_align_fill_size (addressT address
,
9050 bfd_boolean use_nops
,
9051 bfd_boolean use_no_density
)
9053 addressT alignment
, fill
, fill_limit
, fill_step
;
9054 bfd_boolean skip_one
= FALSE
;
9056 alignment
= (1 << align_pow
);
9057 gas_assert (target_size
> 0 && alignment
>= (addressT
) target_size
);
9061 fill_limit
= alignment
;
9064 else if (!use_no_density
)
9066 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
9067 fill_limit
= alignment
* 2;
9073 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
9074 fill_limit
= alignment
* 3;
9078 /* Try all fill sizes until finding one that works. */
9079 for (fill
= 0; fill
< fill_limit
; fill
+= fill_step
)
9081 if (skip_one
&& fill
== 1)
9083 if ((address
+ fill
) >> align_pow
9084 == (address
+ fill
+ target_size
- 1) >> align_pow
)
9093 branch_align_power (segT sec
)
9095 /* If the Xtensa processor has a fetch width of X, and
9096 the section is aligned to at least that boundary, then a branch
9097 target need only fit within that aligned block of memory to avoid
9098 a stall. Otherwise, try to fit branch targets within 4-byte
9099 aligned blocks (which may be insufficient, e.g., if the section
9100 has no alignment, but it's good enough). */
9101 int fetch_align
= get_text_align_power(xtensa_fetch_width
);
9102 int sec_align
= get_recorded_alignment (sec
);
9104 if (sec_align
>= fetch_align
)
9111 /* This will assert if it is not possible. */
9114 get_text_align_nop_count (offsetT fill_size
, bfd_boolean use_no_density
)
9120 gas_assert (fill_size
% 3 == 0);
9121 return (fill_size
/ 3);
9124 gas_assert (fill_size
!= 1); /* Bad argument. */
9126 while (fill_size
> 1)
9129 if (fill_size
== 2 || fill_size
== 4)
9131 fill_size
-= insn_size
;
9134 gas_assert (fill_size
!= 1); /* Bad algorithm. */
9140 get_text_align_nth_nop_size (offsetT fill_size
,
9142 bfd_boolean use_no_density
)
9149 gas_assert (fill_size
!= 1); /* Bad argument. */
9151 while (fill_size
> 1)
9154 if (fill_size
== 2 || fill_size
== 4)
9156 fill_size
-= insn_size
;
9166 /* For the given fragment, find the appropriate address
9167 for it to begin at if we are using NOPs to align it. */
9170 get_noop_aligned_address (fragS
*fragP
, addressT address
)
9172 /* The rule is: get next fragment's FIRST instruction. Find
9173 the smallest number of bytes that need to be added to
9174 ensure that the next fragment's FIRST instruction will fit
9177 E.G., 2 bytes : 0, 1, 2 mod 4
9180 If the FIRST instruction MIGHT be relaxed,
9181 assume that it will become a 3-byte instruction.
9183 Note again here that LOOP instructions are not bundleable,
9184 and this relaxation only applies to LOOP opcodes. */
9187 int first_insn_size
;
9189 addressT pre_opcode_bytes
;
9192 xtensa_opcode opcode
;
9193 bfd_boolean is_loop
;
9195 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
9196 gas_assert (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
);
9198 /* Find the loop frag. */
9199 first_insn
= next_non_empty_frag (fragP
);
9200 /* Now find the first insn frag. */
9201 first_insn
= next_non_empty_frag (first_insn
);
9203 is_loop
= next_frag_opcode_is_loop (fragP
, &opcode
);
9204 gas_assert (is_loop
);
9205 loop_insn_size
= xg_get_single_size (opcode
);
9207 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
9208 pre_opcode_bytes
+= loop_insn_size
;
9210 /* For loops, the alignment depends on the size of the
9211 instruction following the loop, not the LOOP instruction. */
9213 if (first_insn
== NULL
)
9214 first_insn_size
= xtensa_fetch_width
;
9216 first_insn_size
= get_loop_align_size (frag_format_size (first_insn
));
9218 /* If it was 8, then we'll need a larger alignment for the section. */
9219 align_power
= get_text_align_power (first_insn_size
);
9220 record_alignment (now_seg
, align_power
);
9222 fill_size
= get_text_align_fill_size
9223 (address
+ pre_opcode_bytes
, align_power
, first_insn_size
, TRUE
,
9224 fragP
->tc_frag_data
.is_no_density
);
9226 return address
+ fill_size
;
9230 /* 3 mechanisms for relaxing an alignment:
9232 Align to a power of 2.
9233 Align so the next fragment's instruction does not cross a word boundary.
9234 Align the current instruction so that if the next instruction
9235 were 3 bytes, it would not cross a word boundary.
9239 zeros - This is easy; always insert zeros.
9240 nops - 3-byte and 2-byte instructions
9244 >=5 : 3-byte instruction + fn (n-3)
9245 widening - widen previous instructions. */
9248 get_aligned_diff (fragS
*fragP
, addressT address
, offsetT
*max_diff
)
9250 addressT target_address
, loop_insn_offset
;
9252 xtensa_opcode loop_opcode
;
9253 bfd_boolean is_loop
;
9256 offsetT branch_align
;
9259 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
9260 switch (fragP
->fr_subtype
)
9262 case RELAX_DESIRE_ALIGN
:
9263 target_size
= next_frag_format_size (fragP
);
9264 if (target_size
== XTENSA_UNDEFINED
)
9266 align_power
= branch_align_power (now_seg
);
9267 branch_align
= 1 << align_power
;
9268 /* Don't count on the section alignment being as large as the target. */
9269 if (target_size
> branch_align
)
9270 target_size
= branch_align
;
9271 opt_diff
= get_text_align_fill_size (address
, align_power
,
9272 target_size
, FALSE
, FALSE
);
9274 *max_diff
= (opt_diff
+ branch_align
9275 - (target_size
+ ((address
+ opt_diff
) % branch_align
)));
9276 gas_assert (*max_diff
>= opt_diff
);
9279 case RELAX_ALIGN_NEXT_OPCODE
:
9280 /* The next non-empty frag after this one holds the LOOP instruction
9281 that needs to be aligned. The required alignment depends on the
9282 size of the next non-empty frag after the loop frag, i.e., the
9283 first instruction in the loop. */
9284 loop_frag
= next_non_empty_frag (fragP
);
9285 target_size
= get_loop_align_size (next_frag_format_size (loop_frag
));
9286 loop_insn_offset
= 0;
9287 is_loop
= next_frag_opcode_is_loop (fragP
, &loop_opcode
);
9288 gas_assert (is_loop
);
9290 /* If the loop has been expanded then the LOOP instruction
9291 could be at an offset from this fragment. */
9292 if (loop_frag
->tc_frag_data
.slot_subtypes
[0] != RELAX_IMMED
)
9293 loop_insn_offset
= get_expanded_loop_offset (loop_opcode
);
9295 /* In an ideal world, which is what we are shooting for here,
9296 we wouldn't need to use any NOPs immediately prior to the
9297 LOOP instruction. If this approach fails, relax_frag_loop_align
9298 will call get_noop_aligned_address. */
9300 address
+ loop_insn_offset
+ xg_get_single_size (loop_opcode
);
9301 align_power
= get_text_align_power (target_size
);
9302 opt_diff
= get_text_align_fill_size (target_address
, align_power
,
9303 target_size
, FALSE
, FALSE
);
9305 *max_diff
= xtensa_fetch_width
9306 - ((target_address
+ opt_diff
) % xtensa_fetch_width
)
9307 - target_size
+ opt_diff
;
9308 gas_assert (*max_diff
>= opt_diff
);
9319 /* md_relax_frag Hook and Helper Functions. */
9321 static long relax_frag_loop_align (fragS
*, long);
9322 static long relax_frag_for_align (fragS
*, long);
9323 static long relax_frag_immed
9324 (segT
, fragS
*, long, int, xtensa_format
, int, int *, bfd_boolean
);
9326 /* Get projected address for the first fulcrum on a path from source to
9328 static addressT
xg_get_fulcrum (addressT source
, addressT target
)
9330 offsetT delta
= target
- source
;
9333 n
= (labs (delta
) + J_RANGE
- J_MARGIN
- 1) / (J_RANGE
- J_MARGIN
);
9334 return source
+ delta
/ n
;
9337 /* Given trampoline index, source and target of a jump find the best
9338 candidate trampoline for the first fulcrum. The best trampoline is
9339 the one in the reach of "j' instruction from the source, closest to
9340 the projected fulcrum address, and preferrably w/o a jump around or
9341 with already initialized jump around. */
9342 static size_t xg_find_best_trampoline (struct trampoline_index
*idx
,
9343 addressT source
, addressT target
)
9345 addressT fulcrum
= xg_get_fulcrum (source
, target
);
9348 size_t base_tr
= xg_find_trampoline (idx
, fulcrum
);
9351 /* Check trampoline frags around the base_tr to find the best. */
9352 for (dist
= 0; checked
; ++dist
)
9355 size_t tr
= base_tr
- dist
;
9359 /* Trampolines are checked in the following order:
9360 base_tr, base_tr + 1, base_tr - 1, base_tr + 2, base_tr - 2 */
9361 for (i
= 0; i
< 2; ++i
, tr
= base_tr
+ dist
+ 1)
9362 if (tr
< idx
->n_entries
)
9364 fragS
*trampoline_frag
= idx
->entry
[tr
];
9367 /* Don't check trampolines outside source - target interval. */
9368 if ((trampoline_frag
->fr_address
< source
&&
9369 trampoline_frag
->fr_address
< target
) ||
9370 (trampoline_frag
->fr_address
> source
&&
9371 trampoline_frag
->fr_address
> target
))
9374 /* Don't choose trampoline that contains the source. */
9375 if (source
>= trampoline_frag
->fr_address
9376 && source
<= trampoline_frag
->fr_address
+
9377 trampoline_frag
->fr_fix
)
9380 off
= trampoline_frag
->fr_address
- fulcrum
;
9381 /* Stop if some trampoline is found and the search is more than
9382 J_RANGE / 4 from the projected fulcrum. A trampoline w/o jump
9383 around is nice, but it shouldn't have much overhead. */
9384 if (best
< idx
->n_entries
&& labs (off
) > J_RANGE
/ 4)
9387 off
= trampoline_frag
->fr_address
- source
;
9388 if (labs (off
) < J_RANGE
- J_MARGIN
)
9391 /* Stop if a trampoline w/o jump around is found or initialized
9392 trampoline with jump around is found. */
9393 if (!trampoline_frag
->tc_frag_data
.needs_jump_around
||
9394 trampoline_frag
->fr_fix
)
9396 else if (best
>= idx
->n_entries
)
9402 if (best
< idx
->n_entries
)
9405 as_fatal (_("cannot find suitable trampoline"));
9408 static fixS
*xg_relax_fixup (struct trampoline_index
*idx
, fixS
*fixP
)
9410 symbolS
*s
= fixP
->fx_addsy
;
9411 addressT source
= fixP
->fx_frag
->fr_address
;
9412 addressT target
= S_GET_VALUE (s
) + fixP
->fx_offset
;
9413 size_t tr
= xg_find_best_trampoline (idx
, source
, target
);
9414 fragS
*trampoline_frag
= idx
->entry
[tr
];
9417 init_trampoline_frag (trampoline_frag
);
9418 newfixP
= xg_append_jump (trampoline_frag
,
9419 fixP
->fx_addsy
, fixP
->fx_offset
);
9421 /* Adjust the fixup for the original "j" instruction to
9422 point to the newly added jump. */
9423 fixP
->fx_addsy
= trampoline_frag
->fr_symbol
;
9424 fixP
->fx_offset
= trampoline_frag
->fr_fix
- 3;
9425 fixP
->tc_fix_data
.X_add_symbol
= trampoline_frag
->fr_symbol
;
9426 fixP
->tc_fix_data
.X_add_number
= trampoline_frag
->fr_fix
- 3;
9428 trampoline_frag
->tc_frag_data
.relax_seen
= FALSE
;
9430 if (xg_is_trampoline_frag_full (trampoline_frag
))
9431 xg_remove_trampoline_from_index (idx
, tr
);
9436 static bfd_boolean
xg_is_relaxable_fixup (fixS
*fixP
)
9438 xtensa_isa isa
= xtensa_default_isa
;
9439 addressT addr
= fixP
->fx_frag
->fr_address
;
9442 symbolS
*s
= fixP
->fx_addsy
;
9445 xtensa_opcode opcode
;
9447 if (fixP
->fx_r_type
< BFD_RELOC_XTENSA_SLOT0_OP
||
9448 fixP
->fx_r_type
> BFD_RELOC_XTENSA_SLOT14_OP
)
9451 target
= S_GET_VALUE (s
) + fixP
->fx_offset
;
9452 delta
= target
- addr
;
9454 if (labs (delta
) < J_RANGE
- J_MARGIN
)
9457 xtensa_insnbuf_from_chars (isa
, trampoline_buf
,
9458 (unsigned char *) fixP
->fx_frag
->fr_literal
+
9460 fmt
= xtensa_format_decode (isa
, trampoline_buf
);
9461 gas_assert (fmt
!= XTENSA_UNDEFINED
);
9462 slot
= fixP
->tc_fix_data
.slot
;
9463 xtensa_format_get_slot (isa
, fmt
, slot
, trampoline_buf
, trampoline_slotbuf
);
9464 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, trampoline_slotbuf
);
9465 return opcode
== xtensa_j_opcode
;
9468 static void xg_relax_fixups (struct trampoline_seg
*ts
)
9470 struct trampoline_index
*idx
= &ts
->index
;
9471 segment_info_type
*seginfo
= seg_info (now_seg
);
9474 for (fx
= seginfo
->fix_root
; fx
; fx
= fx
->fx_next
)
9477 struct trampoline_chain
*tc
= NULL
;
9479 if (xg_is_relaxable_fixup (fixP
))
9481 tc
= xg_find_best_eq_target (ts
, fixP
->fx_frag
->fr_address
,
9482 &fixP
->fx_addsy
, &fixP
->fx_offset
);
9484 tc
= xg_create_trampoline_chain (ts
, fixP
->fx_addsy
,
9489 while (xg_is_relaxable_fixup (fixP
))
9491 fixP
= xg_relax_fixup (idx
, fixP
);
9492 xg_add_location_to_chain (tc
, fixP
->fx_frag
->fr_symbol
,
9498 /* Given a trampoline frag relax all jumps that might want to use this
9499 trampoline. Only do real work once per relaxation cycle, when
9500 xg_relax_trampoline is called for the first trampoline in the now_seg.
9501 Don't use stretch, don't update new_stretch: place fulcrums with a
9502 slack to tolerate code movement. In the worst case if a jump between
9503 two trampolines wouldn't reach the next relaxation pass will fix it. */
9504 static void xg_relax_trampoline (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
,
9505 long *new_stretch ATTRIBUTE_UNUSED
)
9507 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9509 if (ts
->index
.n_entries
&& ts
->index
.entry
[0] == fragP
)
9510 xg_relax_fixups (ts
);
9513 /* Return the number of bytes added to this fragment, given that the
9514 input has been stretched already by "stretch". */
9517 xtensa_relax_frag (fragS
*fragP
, long stretch
, int *stretched_p
)
9519 xtensa_isa isa
= xtensa_default_isa
;
9520 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
9521 long new_stretch
= 0;
9522 const char *file_name
;
9525 static xtensa_insnbuf vbuf
= NULL
;
9526 int slot
, num_slots
;
9529 file_name
= as_where (&line
);
9530 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
9532 fragP
->tc_frag_data
.unreported_expansion
= 0;
9534 switch (fragP
->fr_subtype
)
9536 case RELAX_ALIGN_NEXT_OPCODE
:
9537 /* Always convert. */
9538 if (fragP
->tc_frag_data
.relax_seen
)
9539 new_stretch
= relax_frag_loop_align (fragP
, stretch
);
9542 case RELAX_LOOP_END
:
9546 case RELAX_LOOP_END_ADD_NOP
:
9547 /* Add a NOP and switch to .fill 0. */
9548 new_stretch
= relax_frag_add_nop (fragP
);
9552 case RELAX_DESIRE_ALIGN
:
9553 /* Do nothing. The narrowing before this frag will either align
9558 case RELAX_LITERAL_FINAL
:
9561 case RELAX_LITERAL_NR
:
9563 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
9564 gas_assert (unreported
== lit_size
);
9565 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
9566 fragP
->fr_var
-= lit_size
;
9567 fragP
->fr_fix
+= lit_size
;
9573 vbuf
= xtensa_insnbuf_alloc (isa
);
9575 xtensa_insnbuf_from_chars
9576 (isa
, vbuf
, (unsigned char *) fragP
->fr_opcode
, 0);
9577 fmt
= xtensa_format_decode (isa
, vbuf
);
9578 num_slots
= xtensa_format_num_slots (isa
, fmt
);
9580 for (slot
= 0; slot
< num_slots
; slot
++)
9582 switch (fragP
->tc_frag_data
.slot_subtypes
[slot
])
9585 if (fragP
->tc_frag_data
.relax_seen
)
9586 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9590 case RELAX_IMMED_STEP1
:
9591 case RELAX_IMMED_STEP2
:
9592 case RELAX_IMMED_STEP3
:
9593 /* Place the immediate. */
9594 new_stretch
+= relax_frag_immed
9595 (now_seg
, fragP
, stretch
,
9596 fragP
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
9597 fmt
, slot
, stretched_p
, FALSE
);
9601 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9607 case RELAX_LITERAL_POOL_BEGIN
:
9608 if (fragP
->fr_var
!= 0)
9610 /* We have a converted "candidate" literal pool;
9611 assemble a jump around it. */
9613 if (!litpool_slotbuf
)
9615 litpool_buf
= xtensa_insnbuf_alloc (isa
);
9616 litpool_slotbuf
= xtensa_insnbuf_alloc (isa
);
9619 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9620 fragP
->tc_frag_data
.is_insn
= TRUE
;
9622 insn
.insn_type
= ITYPE_INSN
;
9623 insn
.opcode
= xtensa_j_opcode
;
9625 set_expr_symbol_offset (&insn
.tok
[0], fragP
->fr_symbol
,
9627 fmt
= xg_get_single_format (xtensa_j_opcode
);
9628 tinsn_to_slotbuf (fmt
, 0, &insn
, litpool_slotbuf
);
9629 xtensa_format_set_slot (isa
, fmt
, 0, litpool_buf
, litpool_slotbuf
);
9630 xtensa_insnbuf_to_chars (isa
, litpool_buf
,
9631 (unsigned char *)fragP
->fr_literal
+
9636 fix_new (fragP
, 0, 3, fragP
->fr_symbol
, 0, TRUE
,
9637 BFD_RELOC_XTENSA_SLOT0_OP
);
9641 case RELAX_LITERAL_POOL_END
:
9642 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
9643 case RELAX_MAYBE_UNREACHABLE
:
9644 case RELAX_MAYBE_DESIRE_ALIGN
:
9645 /* No relaxation required. */
9648 case RELAX_FILL_NOP
:
9649 case RELAX_UNREACHABLE
:
9650 if (fragP
->tc_frag_data
.relax_seen
)
9651 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9654 case RELAX_TRAMPOLINE
:
9655 if (fragP
->tc_frag_data
.relax_seen
)
9656 xg_relax_trampoline (fragP
, stretch
, &new_stretch
);
9660 as_bad (_("bad relaxation state"));
9663 /* Tell gas we need another relaxation pass. */
9664 if (! fragP
->tc_frag_data
.relax_seen
)
9666 fragP
->tc_frag_data
.relax_seen
= TRUE
;
9670 new_logical_line (file_name
, line
);
9676 relax_frag_loop_align (fragS
*fragP
, long stretch
)
9678 addressT old_address
, old_next_address
, old_size
;
9679 addressT new_address
, new_next_address
, new_size
;
9682 /* All the frags with relax_frag_for_alignment prior to this one in the
9683 section have been done, hopefully eliminating the need for a NOP here.
9684 But, this will put it in if necessary. */
9686 /* Calculate the old address of this fragment and the next fragment. */
9687 old_address
= fragP
->fr_address
- stretch
;
9688 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
9689 fragP
->tc_frag_data
.text_expansion
[0]);
9690 old_size
= old_next_address
- old_address
;
9692 /* Calculate the new address of this fragment and the next fragment. */
9693 new_address
= fragP
->fr_address
;
9695 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
9696 new_size
= new_next_address
- new_address
;
9698 growth
= new_size
- old_size
;
9700 /* Fix up the text_expansion field and return the new growth. */
9701 fragP
->tc_frag_data
.text_expansion
[0] += growth
;
9706 /* Add a NOP instruction. */
9709 relax_frag_add_nop (fragS
*fragP
)
9711 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
9712 int length
= fragP
->tc_frag_data
.is_no_density
? 3 : 2;
9713 assemble_nop (length
, nop_buf
);
9714 fragP
->tc_frag_data
.is_insn
= TRUE
;
9716 if (fragP
->fr_var
< length
)
9718 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP
->fr_var
, length
);
9722 fragP
->fr_fix
+= length
;
9723 fragP
->fr_var
-= length
;
9728 static long future_alignment_required (fragS
*, long);
9731 relax_frag_for_align (fragS
*fragP
, long stretch
)
9733 /* Overview of the relaxation procedure for alignment:
9734 We can widen with NOPs or by widening instructions or by filling
9735 bytes after jump instructions. Find the opportune places and widen
9736 them if necessary. */
9741 gas_assert (fragP
->fr_subtype
== RELAX_FILL_NOP
9742 || fragP
->fr_subtype
== RELAX_UNREACHABLE
9743 || (fragP
->fr_subtype
== RELAX_SLOTS
9744 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
));
9746 stretch_me
= future_alignment_required (fragP
, stretch
);
9747 diff
= stretch_me
- fragP
->tc_frag_data
.text_expansion
[0];
9753 /* We expanded on a previous pass. Can we shrink now? */
9754 long shrink
= fragP
->tc_frag_data
.text_expansion
[0] - stretch_me
;
9755 if (shrink
<= stretch
&& stretch
> 0)
9757 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9763 /* Below here, diff > 0. */
9764 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9770 /* Return the address of the next frag that should be aligned.
9772 By "address" we mean the address it _would_ be at if there
9773 is no action taken to align it between here and the target frag.
9774 In other words, if no narrows and no fill nops are used between
9775 here and the frag to align, _even_if_ some of the frags we use
9776 to align targets have already expanded on a previous relaxation
9779 Also, count each frag that may be used to help align the target.
9781 Return 0 if there are no frags left in the chain that need to be
9785 find_address_of_next_align_frag (fragS
**fragPP
,
9789 bfd_boolean
*paddable
)
9791 fragS
*fragP
= *fragPP
;
9792 addressT address
= fragP
->fr_address
;
9794 /* Do not reset the counts to 0. */
9798 /* Limit this to a small search. */
9799 if (*widens
>= (int) xtensa_fetch_width
)
9804 address
+= fragP
->fr_fix
;
9806 if (fragP
->fr_type
== rs_fill
)
9807 address
+= fragP
->fr_offset
* fragP
->fr_var
;
9808 else if (fragP
->fr_type
== rs_machine_dependent
)
9810 switch (fragP
->fr_subtype
)
9812 case RELAX_UNREACHABLE
:
9816 case RELAX_FILL_NOP
:
9818 if (!fragP
->tc_frag_data
.is_no_density
)
9823 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9828 address
+= total_frag_text_expansion (fragP
);
9832 address
+= fragP
->tc_frag_data
.text_expansion
[0];
9835 case RELAX_ALIGN_NEXT_OPCODE
:
9836 case RELAX_DESIRE_ALIGN
:
9840 case RELAX_MAYBE_UNREACHABLE
:
9841 case RELAX_MAYBE_DESIRE_ALIGN
:
9846 /* Just punt if we don't know the type. */
9853 /* Just punt if we don't know the type. */
9857 fragP
= fragP
->fr_next
;
9865 static long bytes_to_stretch (fragS
*, int, int, int, int);
9868 future_alignment_required (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
)
9870 fragS
*this_frag
= fragP
;
9874 int narrow_nops
= 0;
9875 bfd_boolean paddable
= FALSE
;
9876 offsetT local_opt_diff
;
9879 int stretch_amount
= 0;
9880 int local_stretch_amount
;
9881 int global_stretch_amount
;
9883 address
= find_address_of_next_align_frag
9884 (&fragP
, &wide_nops
, &narrow_nops
, &num_widens
, &paddable
);
9888 if (this_frag
->tc_frag_data
.is_aligning_branch
)
9889 this_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
9891 frag_wane (this_frag
);
9895 local_opt_diff
= get_aligned_diff (fragP
, address
, &max_diff
);
9896 opt_diff
= local_opt_diff
;
9897 gas_assert (opt_diff
>= 0);
9898 gas_assert (max_diff
>= opt_diff
);
9903 fragP
= fragP
->fr_next
;
9905 while (fragP
&& opt_diff
< max_diff
&& address
)
9907 /* We only use these to determine if we can exit early
9908 because there will be plenty of ways to align future
9910 int glob_widens
= 0;
9913 bfd_boolean glob_pad
= 0;
9914 address
= find_address_of_next_align_frag
9915 (&fragP
, &glob_widens
, &dnn
, &dw
, &glob_pad
);
9916 /* If there is a padable portion, then skip. */
9917 if (glob_pad
|| glob_widens
>= (1 << branch_align_power (now_seg
)))
9922 offsetT next_m_diff
;
9923 offsetT next_o_diff
;
9925 /* Downrange frags haven't had stretch added to them yet. */
9928 /* The address also includes any text expansion from this
9929 frag in a previous pass, but we don't want that. */
9930 address
-= this_frag
->tc_frag_data
.text_expansion
[0];
9932 /* Assume we are going to move at least opt_diff. In
9933 reality, we might not be able to, but assuming that
9934 we will helps catch cases where moving opt_diff pushes
9935 the next target from aligned to unaligned. */
9936 address
+= opt_diff
;
9938 next_o_diff
= get_aligned_diff (fragP
, address
, &next_m_diff
);
9940 /* Now cleanup for the adjustments to address. */
9941 next_o_diff
+= opt_diff
;
9942 next_m_diff
+= opt_diff
;
9943 if (next_o_diff
<= max_diff
&& next_o_diff
> opt_diff
)
9944 opt_diff
= next_o_diff
;
9945 if (next_m_diff
< max_diff
)
9946 max_diff
= next_m_diff
;
9947 fragP
= fragP
->fr_next
;
9951 /* If there are enough wideners in between, do it. */
9954 if (this_frag
->fr_subtype
== RELAX_UNREACHABLE
)
9956 gas_assert (opt_diff
<= (signed) xtensa_fetch_width
);
9961 local_stretch_amount
9962 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9963 num_widens
, local_opt_diff
);
9964 global_stretch_amount
9965 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9966 num_widens
, opt_diff
);
9967 /* If the condition below is true, then the frag couldn't
9968 stretch the correct amount for the global case, so we just
9969 optimize locally. We'll rely on the subsequent frags to get
9970 the correct alignment in the global case. */
9971 if (global_stretch_amount
< local_stretch_amount
)
9972 stretch_amount
= local_stretch_amount
;
9974 stretch_amount
= global_stretch_amount
;
9976 if (this_frag
->fr_subtype
== RELAX_SLOTS
9977 && this_frag
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9978 gas_assert (stretch_amount
<= 1);
9979 else if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9981 if (this_frag
->tc_frag_data
.is_no_density
)
9982 gas_assert (stretch_amount
== 3 || stretch_amount
== 0);
9984 gas_assert (stretch_amount
<= 3);
9987 return stretch_amount
;
9991 /* The idea: widen everything you can to get a target or loop aligned,
9992 then start using NOPs.
9994 wide_nops = the number of wide NOPs available for aligning
9995 narrow_nops = the number of narrow NOPs available for aligning
9996 (a subset of wide_nops)
9997 widens = the number of narrow instructions that should be widened
10002 bytes_to_stretch (fragS
*this_frag
,
10011 int bytes_short
= desired_diff
- num_widens
;
10013 gas_assert (desired_diff
>= 0
10014 && desired_diff
< (signed) xtensa_fetch_width
);
10015 if (desired_diff
== 0)
10018 gas_assert (wide_nops
> 0 || num_widens
> 0);
10020 /* Always prefer widening to NOP-filling. */
10021 if (bytes_short
< 0)
10023 /* There are enough RELAX_NARROW frags after this one
10024 to align the target without widening this frag in any way. */
10028 if (bytes_short
== 0)
10030 /* Widen every narrow between here and the align target
10031 and the align target will be properly aligned. */
10032 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10038 /* From here we will need at least one NOP to get an alignment.
10039 However, we may not be able to align at all, in which case,
10041 nops_needed
= desired_diff
/ 3;
10043 /* If there aren't enough nops, don't widen. */
10044 if (nops_needed
> wide_nops
)
10047 /* First try it with all wide nops. */
10048 nop_bytes
= nops_needed
* 3;
10049 extra_bytes
= desired_diff
- nop_bytes
;
10051 if (nop_bytes
+ num_widens
>= desired_diff
)
10053 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10055 else if (num_widens
== extra_bytes
)
10060 /* Add a narrow nop. */
10064 if (narrow_nops
== 0 || nops_needed
> wide_nops
)
10067 if (nop_bytes
+ num_widens
>= desired_diff
&& extra_bytes
>= 0)
10069 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10070 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
10071 else if (num_widens
== extra_bytes
)
10076 /* Replace a wide nop with a narrow nop--we can get here if
10077 extra_bytes was negative in the previous conditional. */
10078 if (narrow_nops
== 1)
10082 if (nop_bytes
+ num_widens
>= desired_diff
)
10084 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10085 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
10086 else if (num_widens
== extra_bytes
)
10091 /* If we can't satisfy any of the above cases, then we can't align
10092 using padding or fill nops. */
10098 xg_find_best_trampoline_for_tinsn (TInsn
*tinsn
, fragS
*fragP
)
10100 symbolS
*sym
= tinsn
->tok
[0].X_add_symbol
;
10101 addressT source
= fragP
->fr_address
;
10102 addressT target
= S_GET_VALUE (sym
) + tinsn
->tok
[0].X_add_number
;
10103 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10106 if (!ts
|| !ts
->index
.n_entries
)
10109 i
= xg_find_best_trampoline (&ts
->index
, source
, target
);
10111 return ts
->index
.entry
[i
];
10115 /* Append jump to sym + offset to the end of the trampoline frag fragP.
10116 Adjust fragP's jump around if it's present. Adjust fragP's fr_fix/fr_var
10117 and finish the frag if it's full (but don't remove it from the trampoline
10118 frag index). Return fixup for the newly created jump. */
10119 static fixS
*xg_append_jump (fragS
*fragP
, symbolS
*sym
, offsetT offset
)
10124 xtensa_isa isa
= xtensa_default_isa
;
10126 gas_assert (fragP
->fr_var
>= 3);
10127 tinsn_init (&insn
);
10128 insn
.insn_type
= ITYPE_INSN
;
10129 insn
.opcode
= xtensa_j_opcode
;
10131 set_expr_symbol_offset (&insn
.tok
[0], sym
, offset
);
10132 fmt
= xg_get_single_format (xtensa_j_opcode
);
10133 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10134 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10135 xtensa_insnbuf_to_chars (isa
, trampoline_buf
,
10136 (unsigned char *)fragP
->fr_literal
+ fragP
->fr_fix
, 3);
10137 fixP
= fix_new (fragP
, fragP
->fr_fix
, 3, sym
, offset
, TRUE
,
10138 BFD_RELOC_XTENSA_SLOT0_OP
);
10139 fixP
->tc_fix_data
.slot
= 0;
10141 fragP
->fr_fix
+= 3;
10142 fragP
->fr_var
-= 3;
10144 /* Adjust the jump around this trampoline (if present). */
10145 if (fragP
->tc_frag_data
.jump_around_fix
)
10146 fragP
->tc_frag_data
.jump_around_fix
->fx_offset
+= 3;
10148 /* Do we have room for more? */
10149 if (xg_is_trampoline_frag_full (fragP
))
10152 fragP
->fr_subtype
= 0;
10160 init_trampoline_frag (fragS
*fp
)
10164 if (fp
->fr_fix
== 0)
10167 char label
[10 + 2 * sizeof(fp
)];
10169 sprintf (label
, ".L0_TR_%p", fp
);
10170 lsym
= (symbolS
*)local_symbol_make (label
, now_seg
, 0, fp
);
10171 fp
->fr_symbol
= lsym
;
10172 if (fp
->tc_frag_data
.needs_jump_around
)
10174 fp
->tc_frag_data
.jump_around_fix
= xg_append_jump (fp
, lsym
, 3);
10182 xg_get_single_symbol_slot (fragS
*fragP
)
10187 for (i
= 0; i
< MAX_SLOTS
; ++i
)
10188 if (fragP
->tc_frag_data
.slot_symbols
[i
])
10190 gas_assert (slot
== -1);
10194 gas_assert (slot
>= 0 && slot
< MAX_SLOTS
);
10200 add_jump_to_trampoline (fragS
*tramp
, fragS
*origfrag
)
10202 int slot
= xg_get_single_symbol_slot (origfrag
);
10205 /* Assemble a jump to the target label in the trampoline frag. */
10206 fixP
= xg_append_jump (tramp
,
10207 origfrag
->tc_frag_data
.slot_symbols
[slot
],
10208 origfrag
->tc_frag_data
.slot_offsets
[slot
]);
10210 /* Modify the original j to point here. */
10211 origfrag
->tc_frag_data
.slot_symbols
[slot
] = tramp
->fr_symbol
;
10212 origfrag
->tc_frag_data
.slot_offsets
[slot
] = tramp
->fr_fix
- 3;
10214 /* If trampoline is full, remove it from the list. */
10215 if (xg_is_trampoline_frag_full (tramp
))
10217 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10218 size_t tr
= xg_find_trampoline (&ts
->index
, tramp
->fr_address
);
10220 gas_assert (ts
->index
.entry
[tr
] == tramp
);
10221 xg_remove_trampoline_from_index (&ts
->index
, tr
);
10229 relax_frag_immed (segT segP
,
10236 bfd_boolean estimate_only
)
10240 bfd_boolean negatable_branch
= FALSE
;
10241 bfd_boolean branch_jmp_to_next
= FALSE
;
10242 bfd_boolean from_wide_insn
= FALSE
;
10243 xtensa_isa isa
= xtensa_default_isa
;
10245 offsetT frag_offset
;
10247 int num_text_bytes
, num_literal_bytes
;
10248 int literal_diff
, total_text_diff
, this_text_diff
;
10250 gas_assert (fragP
->fr_opcode
!= NULL
);
10252 xg_clear_vinsn (&cur_vinsn
);
10253 vinsn_from_chars (&cur_vinsn
, fragP
->fr_opcode
);
10254 if (cur_vinsn
.num_slots
> 1)
10255 from_wide_insn
= TRUE
;
10257 tinsn
= cur_vinsn
.slots
[slot
];
10258 tinsn_immed_from_frag (&tinsn
, fragP
, slot
);
10260 if (estimate_only
&& xtensa_opcode_is_loop (isa
, tinsn
.opcode
) == 1)
10263 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10264 branch_jmp_to_next
= is_branch_jmp_to_next (&tinsn
, fragP
);
10266 negatable_branch
= (xtensa_opcode_is_branch (isa
, tinsn
.opcode
) == 1);
10268 old_size
= xtensa_format_length (isa
, fmt
);
10270 /* Special case: replace a branch to the next instruction with a NOP.
10271 This is required to work around a hardware bug in T1040.0 and also
10272 serves as an optimization. */
10274 if (branch_jmp_to_next
10275 && ((old_size
== 2) || (old_size
== 3))
10276 && !next_frag_is_loop_target (fragP
))
10279 /* Here is the fun stuff: Get the immediate field from this
10280 instruction. If it fits, we are done. If not, find the next
10281 instruction sequence that fits. */
10283 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10284 istack_init (&istack
);
10285 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
, frag_offset
,
10286 min_steps
, stretch
);
10287 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10289 fragP
->tc_frag_data
.slot_subtypes
[slot
] = (int) RELAX_IMMED
+ num_steps
;
10291 /* Figure out the number of bytes needed. */
10292 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10294 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10295 num_text_bytes
= get_num_stack_text_bytes (&istack
);
10297 if (from_wide_insn
)
10300 while (istack
.insn
[first
].opcode
== XTENSA_UNDEFINED
)
10303 num_text_bytes
+= old_size
;
10304 if (opcode_fits_format_slot (istack
.insn
[first
].opcode
, fmt
, slot
))
10305 num_text_bytes
-= xg_get_single_size (istack
.insn
[first
].opcode
);
10308 /* The first instruction in the relaxed sequence will go after
10309 the current wide instruction, and thus its symbolic immediates
10312 istack_init (&istack
);
10313 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
,
10314 frag_offset
+ old_size
,
10315 min_steps
, stretch
+ old_size
);
10316 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10318 fragP
->tc_frag_data
.slot_subtypes
[slot
]
10319 = (int) RELAX_IMMED
+ num_steps
;
10321 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10323 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10325 num_text_bytes
= get_num_stack_text_bytes (&istack
) + old_size
;
10329 total_text_diff
= num_text_bytes
- old_size
;
10330 this_text_diff
= total_text_diff
- fragP
->tc_frag_data
.text_expansion
[slot
];
10332 /* It MUST get larger. If not, we could get an infinite loop. */
10333 gas_assert (num_text_bytes
>= 0);
10334 gas_assert (literal_diff
>= 0);
10335 gas_assert (total_text_diff
>= 0);
10337 fragP
->tc_frag_data
.text_expansion
[slot
] = total_text_diff
;
10338 fragP
->tc_frag_data
.literal_expansion
[slot
] = num_literal_bytes
;
10339 gas_assert (fragP
->tc_frag_data
.text_expansion
[slot
] >= 0);
10340 gas_assert (fragP
->tc_frag_data
.literal_expansion
[slot
] >= 0);
10342 /* Find the associated expandable literal for this. */
10343 if (literal_diff
!= 0)
10345 fragS
*lit_fragP
= fragP
->tc_frag_data
.literal_frags
[slot
];
10348 gas_assert (literal_diff
== 4);
10349 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
10351 /* We expect that the literal section state has NOT been
10353 gas_assert (lit_fragP
->fr_type
== rs_machine_dependent
10354 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
10355 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
10357 /* We need to mark this section for another iteration
10363 if (negatable_branch
&& istack
.ninsn
> 1)
10364 update_next_frag_state (fragP
);
10366 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10367 if (istack
.ninsn
> 2 &&
10368 istack
.insn
[istack
.ninsn
- 1].insn_type
== ITYPE_LABEL
&&
10369 istack
.insn
[istack
.ninsn
- 2].insn_type
== ITYPE_INSN
&&
10370 istack
.insn
[istack
.ninsn
- 2].opcode
== xtensa_j_opcode
)
10372 TInsn
*jinsn
= &istack
.insn
[istack
.ninsn
- 2];
10373 struct trampoline_seg
*ts
= find_trampoline_seg (segP
);
10374 struct trampoline_chain
*tc
= NULL
;
10377 !xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
,
10380 int s
= xg_get_single_symbol_slot (fragP
);
10381 addressT offset
= fragP
->tc_frag_data
.slot_offsets
[s
];
10383 tc
= xg_find_best_eq_target (ts
, fragP
->fr_address
,
10384 &fragP
->tc_frag_data
.slot_symbols
[s
],
10388 tc
= xg_create_trampoline_chain (ts
,
10389 fragP
->tc_frag_data
.slot_symbols
[s
],
10391 fragP
->tc_frag_data
.slot_offsets
[s
] = offset
;
10392 tinsn_immed_from_frag (jinsn
, fragP
, s
);
10395 if (!xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
,
10398 fragS
*tf
= xg_find_best_trampoline_for_tinsn (jinsn
, fragP
);
10404 this_text_diff
+= init_trampoline_frag (tf
) + 3;
10405 fixP
= add_jump_to_trampoline (tf
, fragP
);
10406 xg_add_location_to_chain (tc
, fixP
->fx_frag
->fr_symbol
,
10408 fragP
->tc_frag_data
.relax_seen
= FALSE
;
10412 /* If target symbol is undefined, assume it will reach once linked. */
10413 expressionS
*exp
= &istack
.insn
[istack
.ninsn
- 2].tok
[0];
10415 if (exp
->X_op
== O_symbol
&& S_IS_DEFINED (exp
->X_add_symbol
))
10417 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10418 _("jump target out of range; no usable trampoline found"));
10424 return this_text_diff
;
10428 /* md_convert_frag Hook and Helper Functions. */
10430 static void convert_frag_align_next_opcode (fragS
*);
10431 static void convert_frag_narrow (segT
, fragS
*, xtensa_format
, int);
10432 static void convert_frag_fill_nop (fragS
*);
10433 static void convert_frag_immed (segT
, fragS
*, int, xtensa_format
, int);
10436 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, fragS
*fragp
)
10438 static xtensa_insnbuf vbuf
= NULL
;
10439 xtensa_isa isa
= xtensa_default_isa
;
10443 const char *file_name
;
10446 file_name
= as_where (&line
);
10447 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
10449 switch (fragp
->fr_subtype
)
10451 case RELAX_ALIGN_NEXT_OPCODE
:
10452 /* Always convert. */
10453 convert_frag_align_next_opcode (fragp
);
10456 case RELAX_DESIRE_ALIGN
:
10457 /* Do nothing. If not aligned already, too bad. */
10460 case RELAX_LITERAL
:
10461 case RELAX_LITERAL_FINAL
:
10466 vbuf
= xtensa_insnbuf_alloc (isa
);
10468 xtensa_insnbuf_from_chars
10469 (isa
, vbuf
, (unsigned char *) fragp
->fr_opcode
, 0);
10470 fmt
= xtensa_format_decode (isa
, vbuf
);
10471 num_slots
= xtensa_format_num_slots (isa
, fmt
);
10473 for (slot
= 0; slot
< num_slots
; slot
++)
10475 switch (fragp
->tc_frag_data
.slot_subtypes
[slot
])
10478 convert_frag_narrow (sec
, fragp
, fmt
, slot
);
10482 case RELAX_IMMED_STEP1
:
10483 case RELAX_IMMED_STEP2
:
10484 case RELAX_IMMED_STEP3
:
10485 /* Place the immediate. */
10488 fragp
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
10493 /* This is OK because some slots could have
10494 relaxations and others have none. */
10500 case RELAX_UNREACHABLE
:
10501 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, fragp
->fr_var
);
10502 fragp
->fr_fix
+= fragp
->tc_frag_data
.text_expansion
[0];
10503 fragp
->fr_var
-= fragp
->tc_frag_data
.text_expansion
[0];
10507 case RELAX_MAYBE_UNREACHABLE
:
10508 case RELAX_MAYBE_DESIRE_ALIGN
:
10512 case RELAX_FILL_NOP
:
10513 convert_frag_fill_nop (fragp
);
10516 case RELAX_LITERAL_NR
:
10517 if (use_literal_section
)
10519 /* This should have been handled during relaxation. When
10520 relaxing a code segment, literals sometimes need to be
10521 added to the corresponding literal segment. If that
10522 literal segment has already been relaxed, then we end up
10523 in this situation. Marking the literal segments as data
10524 would make this happen less often (since GAS always relaxes
10525 code before data), but we could still get into trouble if
10526 there are instructions in a segment that is not marked as
10527 containing code. Until we can implement a better solution,
10528 cheat and adjust the addresses of all the following frags.
10529 This could break subsequent alignments, but the linker's
10530 literal coalescing will do that anyway. */
10533 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
10534 gas_assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
10535 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
10536 fragp
->fr_var
-= 4;
10537 fragp
->fr_fix
+= 4;
10538 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
10539 f
->fr_address
+= 4;
10542 as_bad (_("invalid relaxation fragment result"));
10545 case RELAX_TRAMPOLINE
:
10550 new_logical_line (file_name
, line
);
10555 convert_frag_align_next_opcode (fragS
*fragp
)
10557 char *nop_buf
; /* Location for Writing. */
10558 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
10559 addressT aligned_address
;
10561 int nop
, nop_count
;
10563 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
10565 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
10566 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
10567 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
10569 for (nop
= 0; nop
< nop_count
; nop
++)
10572 nop_size
= get_text_align_nth_nop_size (fill_size
, nop
, use_no_density
);
10574 assemble_nop (nop_size
, nop_buf
);
10575 nop_buf
+= nop_size
;
10578 fragp
->fr_fix
+= fill_size
;
10579 fragp
->fr_var
-= fill_size
;
10584 convert_frag_narrow (segT segP
, fragS
*fragP
, xtensa_format fmt
, int slot
)
10586 TInsn tinsn
, single_target
;
10587 int size
, old_size
, diff
;
10588 offsetT frag_offset
;
10590 gas_assert (slot
== 0);
10591 tinsn_from_chars (&tinsn
, fragP
->fr_opcode
, 0);
10593 if (fragP
->tc_frag_data
.is_aligning_branch
== 1)
10595 gas_assert (fragP
->tc_frag_data
.text_expansion
[0] == 1
10596 || fragP
->tc_frag_data
.text_expansion
[0] == 0);
10597 convert_frag_immed (segP
, fragP
, fragP
->tc_frag_data
.text_expansion
[0],
10602 if (fragP
->tc_frag_data
.text_expansion
[0] == 0)
10604 /* No conversion. */
10609 gas_assert (fragP
->fr_opcode
!= NULL
);
10611 /* Frags in this relaxation state should only contain
10612 single instruction bundles. */
10613 tinsn_immed_from_frag (&tinsn
, fragP
, 0);
10615 /* Just convert it to a wide form.... */
10617 old_size
= xg_get_single_size (tinsn
.opcode
);
10619 tinsn_init (&single_target
);
10620 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10622 if (! xg_is_single_relaxable_insn (&tinsn
, &single_target
, FALSE
))
10624 as_bad (_("unable to widen instruction"));
10628 size
= xg_get_single_size (single_target
.opcode
);
10629 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
, fragP
,
10630 frag_offset
, TRUE
);
10632 diff
= size
- old_size
;
10633 gas_assert (diff
>= 0);
10634 gas_assert (diff
<= fragP
->fr_var
);
10635 fragP
->fr_var
-= diff
;
10636 fragP
->fr_fix
+= diff
;
10644 convert_frag_fill_nop (fragS
*fragP
)
10646 char *loc
= &fragP
->fr_literal
[fragP
->fr_fix
];
10647 int size
= fragP
->tc_frag_data
.text_expansion
[0];
10648 gas_assert ((unsigned) size
== (fragP
->fr_next
->fr_address
10649 - fragP
->fr_address
- fragP
->fr_fix
));
10652 /* No conversion. */
10656 assemble_nop (size
, loc
);
10657 fragP
->tc_frag_data
.is_insn
= TRUE
;
10658 fragP
->fr_var
-= size
;
10659 fragP
->fr_fix
+= size
;
10664 static fixS
*fix_new_exp_in_seg
10665 (segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
10666 bfd_reloc_code_real_type
);
10667 static void convert_frag_immed_finish_loop (segT
, fragS
*, TInsn
*);
10670 convert_frag_immed (segT segP
,
10676 char *immed_instr
= fragP
->fr_opcode
;
10678 bfd_boolean expanded
= FALSE
;
10679 bfd_boolean branch_jmp_to_next
= FALSE
;
10680 char *fr_opcode
= fragP
->fr_opcode
;
10681 xtensa_isa isa
= xtensa_default_isa
;
10682 bfd_boolean from_wide_insn
= FALSE
;
10684 bfd_boolean is_loop
;
10686 gas_assert (fr_opcode
!= NULL
);
10688 xg_clear_vinsn (&cur_vinsn
);
10690 vinsn_from_chars (&cur_vinsn
, fr_opcode
);
10691 if (cur_vinsn
.num_slots
> 1)
10692 from_wide_insn
= TRUE
;
10694 orig_tinsn
= cur_vinsn
.slots
[slot
];
10695 tinsn_immed_from_frag (&orig_tinsn
, fragP
, slot
);
10697 is_loop
= xtensa_opcode_is_loop (xtensa_default_isa
, orig_tinsn
.opcode
) == 1;
10699 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10700 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_tinsn
, fragP
);
10702 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
10704 /* Conversion just inserts a NOP and marks the fix as completed. */
10705 bytes
= xtensa_format_length (isa
, fmt
);
10708 cur_vinsn
.slots
[slot
].opcode
=
10709 xtensa_format_slot_nop_opcode (isa
, cur_vinsn
.format
, slot
);
10710 cur_vinsn
.slots
[slot
].ntok
= 0;
10714 bytes
+= fragP
->tc_frag_data
.text_expansion
[0];
10715 gas_assert (bytes
== 2 || bytes
== 3);
10716 build_nop (&cur_vinsn
.slots
[0], bytes
);
10717 fragP
->fr_fix
+= fragP
->tc_frag_data
.text_expansion
[0];
10719 vinsn_to_insnbuf (&cur_vinsn
, fr_opcode
, frag_now
, TRUE
);
10720 xtensa_insnbuf_to_chars
10721 (isa
, cur_vinsn
.insnbuf
, (unsigned char *) fr_opcode
, 0);
10726 /* Here is the fun stuff: Get the immediate field from this
10727 instruction. If it fits, we're done. If not, find the next
10728 instruction sequence that fits. */
10732 symbolS
*lit_sym
= NULL
;
10733 int total_size
= 0;
10734 int target_offset
= 0;
10737 symbolS
*gen_label
= NULL
;
10738 offsetT frag_offset
;
10739 bfd_boolean first
= TRUE
;
10741 /* It does not fit. Find something that does and
10742 convert immediately. */
10743 frag_offset
= fr_opcode
- fragP
->fr_literal
;
10744 istack_init (&istack
);
10745 xg_assembly_relax (&istack
, &orig_tinsn
,
10746 segP
, fragP
, frag_offset
, min_steps
, 0);
10748 old_size
= xtensa_format_length (isa
, fmt
);
10750 /* Assemble this right inline. */
10752 /* First, create the mapping from a label name to the REAL label. */
10754 for (i
= 0; i
< istack
.ninsn
; i
++)
10756 TInsn
*tinsn
= &istack
.insn
[i
];
10759 switch (tinsn
->insn_type
)
10761 case ITYPE_LITERAL
:
10762 if (lit_sym
!= NULL
)
10763 as_bad (_("multiple literals in expansion"));
10764 /* First find the appropriate space in the literal pool. */
10765 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10766 if (lit_frag
== NULL
)
10767 as_bad (_("no registered fragment for literal"));
10768 if (tinsn
->ntok
!= 1)
10769 as_bad (_("number of literal tokens != 1"));
10771 /* Set the literal symbol and add a fixup. */
10772 lit_sym
= lit_frag
->fr_symbol
;
10776 if (align_targets
&& !is_loop
)
10778 fragS
*unreach
= fragP
->fr_next
;
10779 while (!(unreach
->fr_type
== rs_machine_dependent
10780 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10781 || unreach
->fr_subtype
== RELAX_UNREACHABLE
)))
10783 unreach
= unreach
->fr_next
;
10786 gas_assert (unreach
->fr_type
== rs_machine_dependent
10787 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10788 || unreach
->fr_subtype
== RELAX_UNREACHABLE
));
10790 target_offset
+= unreach
->tc_frag_data
.text_expansion
[0];
10792 gas_assert (gen_label
== NULL
);
10793 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
10794 fr_opcode
- fragP
->fr_literal
10795 + target_offset
, fragP
);
10799 if (first
&& from_wide_insn
)
10801 target_offset
+= xtensa_format_length (isa
, fmt
);
10803 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10804 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10807 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10814 for (i
= 0; i
< istack
.ninsn
; i
++)
10816 TInsn
*tinsn
= &istack
.insn
[i
];
10820 bfd_reloc_code_real_type reloc_type
;
10822 switch (tinsn
->insn_type
)
10824 case ITYPE_LITERAL
:
10825 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10826 /* Already checked. */
10827 gas_assert (lit_frag
!= NULL
);
10828 gas_assert (lit_sym
!= NULL
);
10829 gas_assert (tinsn
->ntok
== 1);
10831 target_seg
= S_GET_SEGMENT (lit_sym
);
10832 gas_assert (target_seg
);
10833 reloc_type
= map_operator_to_reloc (tinsn
->tok
[0].X_op
, TRUE
);
10834 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
10835 &tinsn
->tok
[0], FALSE
, reloc_type
);
10842 xg_resolve_labels (tinsn
, gen_label
);
10843 xg_resolve_literals (tinsn
, lit_sym
);
10844 if (from_wide_insn
&& first
)
10847 if (opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10849 cur_vinsn
.slots
[slot
] = *tinsn
;
10853 cur_vinsn
.slots
[slot
].opcode
=
10854 xtensa_format_slot_nop_opcode (isa
, fmt
, slot
);
10855 cur_vinsn
.slots
[slot
].ntok
= 0;
10857 vinsn_to_insnbuf (&cur_vinsn
, immed_instr
, fragP
, TRUE
);
10858 xtensa_insnbuf_to_chars (isa
, cur_vinsn
.insnbuf
,
10859 (unsigned char *) immed_instr
, 0);
10860 fragP
->tc_frag_data
.is_insn
= TRUE
;
10861 size
= xtensa_format_length (isa
, fmt
);
10862 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10864 xg_emit_insn_to_buf
10865 (tinsn
, immed_instr
+ size
, fragP
,
10866 immed_instr
- fragP
->fr_literal
+ size
, TRUE
);
10867 size
+= xg_get_single_size (tinsn
->opcode
);
10872 size
= xg_get_single_size (tinsn
->opcode
);
10873 xg_emit_insn_to_buf (tinsn
, immed_instr
, fragP
,
10874 immed_instr
- fragP
->fr_literal
, TRUE
);
10876 immed_instr
+= size
;
10877 total_size
+= size
;
10882 diff
= total_size
- old_size
;
10883 gas_assert (diff
>= 0);
10886 gas_assert (diff
<= fragP
->fr_var
);
10887 fragP
->fr_var
-= diff
;
10888 fragP
->fr_fix
+= diff
;
10891 /* Check for undefined immediates in LOOP instructions. */
10895 sym
= orig_tinsn
.tok
[1].X_add_symbol
;
10896 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10898 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10901 sym
= orig_tinsn
.tok
[1].X_op_symbol
;
10902 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10904 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10909 if (expanded
&& xtensa_opcode_is_loop (isa
, orig_tinsn
.opcode
) == 1)
10910 convert_frag_immed_finish_loop (segP
, fragP
, &orig_tinsn
);
10912 if (expanded
&& is_direct_call_opcode (orig_tinsn
.opcode
))
10914 /* Add an expansion note on the expanded instruction. */
10915 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
10916 &orig_tinsn
.tok
[0], TRUE
,
10917 BFD_RELOC_XTENSA_ASM_EXPAND
);
10922 /* Add a new fix expression into the desired segment. We have to
10923 switch to that segment to do this. */
10926 fix_new_exp_in_seg (segT new_seg
,
10927 subsegT new_subseg
,
10933 bfd_reloc_code_real_type r_type
)
10936 segT seg
= now_seg
;
10937 subsegT subseg
= now_subseg
;
10939 gas_assert (new_seg
!= 0);
10940 subseg_set (new_seg
, new_subseg
);
10942 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
10943 subseg_set (seg
, subseg
);
10948 /* Relax a loop instruction so that it can span loop >256 bytes.
10954 addi as, as, lo8 (label-.L1)
10955 addmi as, as, mid8 (label-.L1)
10966 convert_frag_immed_finish_loop (segT segP
, fragS
*fragP
, TInsn
*tinsn
)
10971 unsigned long target
;
10972 static xtensa_insnbuf insnbuf
= NULL
;
10973 unsigned int loop_length
, loop_length_hi
, loop_length_lo
;
10974 xtensa_isa isa
= xtensa_default_isa
;
10975 addressT loop_offset
;
10976 addressT addi_offset
= 9;
10977 addressT addmi_offset
= 12;
10982 insnbuf
= xtensa_insnbuf_alloc (isa
);
10984 /* Get the loop offset. */
10985 loop_offset
= get_expanded_loop_offset (tinsn
->opcode
);
10987 /* Validate that there really is a LOOP at the loop_offset. Because
10988 loops are not bundleable, we can assume that the instruction will be
10990 tinsn_from_chars (&loop_insn
, fragP
->fr_opcode
+ loop_offset
, 0);
10991 tinsn_immed_from_frag (&loop_insn
, fragP
, 0);
10993 gas_assert (xtensa_opcode_is_loop (isa
, loop_insn
.opcode
) == 1);
10994 addi_offset
+= loop_offset
;
10995 addmi_offset
+= loop_offset
;
10997 gas_assert (tinsn
->ntok
== 2);
10998 if (tinsn
->tok
[1].X_op
== O_constant
)
10999 target
= tinsn
->tok
[1].X_add_number
;
11000 else if (tinsn
->tok
[1].X_op
== O_symbol
)
11002 /* Find the fragment. */
11003 symbolS
*sym
= tinsn
->tok
[1].X_add_symbol
;
11004 gas_assert (S_GET_SEGMENT (sym
) == segP
11005 || S_GET_SEGMENT (sym
) == absolute_section
);
11006 target
= (S_GET_VALUE (sym
) + tinsn
->tok
[1].X_add_number
);
11010 as_bad (_("invalid expression evaluation type %d"), tinsn
->tok
[1].X_op
);
11014 loop_length
= target
- (fragP
->fr_address
+ fragP
->fr_fix
);
11015 loop_length_hi
= loop_length
& ~0x0ff;
11016 loop_length_lo
= loop_length
& 0x0ff;
11017 if (loop_length_lo
>= 128)
11019 loop_length_lo
-= 256;
11020 loop_length_hi
+= 256;
11023 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
11024 32512. If the loop is larger than that, then we just fail. */
11025 if (loop_length_hi
> 32512)
11026 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
11027 _("loop too long for LOOP instruction"));
11029 tinsn_from_chars (&addi_insn
, fragP
->fr_opcode
+ addi_offset
, 0);
11030 gas_assert (addi_insn
.opcode
== xtensa_addi_opcode
);
11032 tinsn_from_chars (&addmi_insn
, fragP
->fr_opcode
+ addmi_offset
, 0);
11033 gas_assert (addmi_insn
.opcode
== xtensa_addmi_opcode
);
11035 set_expr_const (&addi_insn
.tok
[2], loop_length_lo
);
11036 tinsn_to_insnbuf (&addi_insn
, insnbuf
);
11038 fragP
->tc_frag_data
.is_insn
= TRUE
;
11039 xtensa_insnbuf_to_chars
11040 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addi_offset
, 0);
11042 set_expr_const (&addmi_insn
.tok
[2], loop_length_hi
);
11043 tinsn_to_insnbuf (&addmi_insn
, insnbuf
);
11044 xtensa_insnbuf_to_chars
11045 (isa
, insnbuf
, (unsigned char *) fragP
->fr_opcode
+ addmi_offset
, 0);
11047 /* Walk through all of the frags from here to the loop end
11048 and mark them as no_transform to keep them from being modified
11049 by the linker. If we ever have a relocation for the
11050 addi/addmi of the difference of two symbols we can remove this. */
11053 for (next_fragP
= fragP
; next_fragP
!= NULL
;
11054 next_fragP
= next_fragP
->fr_next
)
11056 next_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
11057 if (next_fragP
->tc_frag_data
.is_loop_target
)
11059 if (target_count
== 2)
11065 /* A map that keeps information on a per-subsegment basis. This is
11066 maintained during initial assembly, but is invalid once the
11067 subsegments are smashed together. I.E., it cannot be used during
11070 typedef struct subseg_map_struct
11078 float total_freq
; /* fall-through + branch target frequency */
11079 float target_freq
; /* branch target frequency alone */
11081 struct subseg_map_struct
*next
;
11085 static subseg_map
*sseg_map
= NULL
;
11087 static subseg_map
*
11088 get_subseg_info (segT seg
, subsegT subseg
)
11090 subseg_map
*subseg_e
;
11092 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
11094 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
11101 static subseg_map
*
11102 add_subseg_info (segT seg
, subsegT subseg
)
11104 subseg_map
*subseg_e
= XNEW (subseg_map
);
11105 memset (subseg_e
, 0, sizeof (subseg_map
));
11106 subseg_e
->seg
= seg
;
11107 subseg_e
->subseg
= subseg
;
11108 subseg_e
->flags
= 0;
11109 /* Start off considering every branch target very important. */
11110 subseg_e
->target_freq
= 1.0;
11111 subseg_e
->total_freq
= 1.0;
11112 subseg_e
->next
= sseg_map
;
11113 sseg_map
= subseg_e
;
11119 get_last_insn_flags (segT seg
, subsegT subseg
)
11121 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11123 return subseg_e
->flags
;
11129 set_last_insn_flags (segT seg
,
11134 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11136 subseg_e
= add_subseg_info (seg
, subseg
);
11138 subseg_e
->flags
|= fl
;
11140 subseg_e
->flags
&= ~fl
;
11145 get_subseg_total_freq (segT seg
, subsegT subseg
)
11147 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11149 return subseg_e
->total_freq
;
11155 get_subseg_target_freq (segT seg
, subsegT subseg
)
11157 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11159 return subseg_e
->target_freq
;
11165 set_subseg_freq (segT seg
, subsegT subseg
, float total_f
, float target_f
)
11167 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11169 subseg_e
= add_subseg_info (seg
, subseg
);
11170 subseg_e
->total_freq
= total_f
;
11171 subseg_e
->target_freq
= target_f
;
11175 /* Segment Lists and emit_state Stuff. */
11178 xtensa_move_seg_list_to_beginning (seg_list
*head
)
11183 segT literal_section
= head
->seg
;
11185 /* Move the literal section to the front of the section list. */
11186 gas_assert (literal_section
);
11187 if (literal_section
!= stdoutput
->sections
)
11189 bfd_section_list_remove (stdoutput
, literal_section
);
11190 bfd_section_list_prepend (stdoutput
, literal_section
);
11197 static void mark_literal_frags (seg_list
*);
11200 xg_promote_candidate_litpool (struct litpool_seg
*lps
,
11201 struct litpool_frag
*lp
)
11206 char label
[10 + 2 * sizeof (fragS
*)];
11208 poolbeg
= lp
->fragP
;
11210 poolbeg
->fr_subtype
= RELAX_LITERAL_POOL_BEGIN
;
11211 poolend
= poolbeg
->fr_next
;
11212 gas_assert (poolend
->fr_type
== rs_machine_dependent
&&
11213 poolend
->fr_subtype
== RELAX_LITERAL_POOL_END
);
11214 /* Create a local symbol pointing to the
11215 end of the pool. */
11216 sprintf (label
, ".L0_LT_%p", poolbeg
);
11217 lsym
= (symbolS
*)local_symbol_make (label
, lps
->seg
,
11219 poolbeg
->fr_symbol
= lsym
;
11220 /* Rest is done in xtensa_relax_frag. */
11223 static struct litpool_frag
*xg_find_litpool (struct litpool_seg
*lps
,
11224 struct litpool_frag
*lpf
,
11227 struct litpool_frag
*lp
= lpf
->prev
;
11229 gas_assert (lp
->fragP
);
11231 while (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11234 if (lp
->fragP
== NULL
)
11236 /* End of list; have to bite the bullet.
11237 Take the nearest. */
11241 /* Does it (conservatively) reach? */
11242 if (addr
- lp
->addr
<= 128 * 1024)
11244 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
11245 lp
->literal_count
< MAX_POOL_LITERALS
)
11247 /* Found a good one. */
11250 else if (lp
->prev
->fragP
&&
11251 addr
- lp
->prev
->addr
> 128 * 1024 &&
11252 lp
->prev
->literal_count
< MAX_POOL_LITERALS
)
11254 /* This is still a "candidate" but the next one
11255 will be too far away, so revert to the nearest
11256 one, convert it and add the jump around. */
11263 if (lp
->literal_count
>= MAX_POOL_LITERALS
)
11266 while (lp
&& lp
->fragP
&& lp
->literal_count
>= MAX_POOL_LITERALS
)
11273 gas_assert (lp
&& lp
->fragP
&& lp
->literal_count
< MAX_POOL_LITERALS
);
11274 ++lp
->literal_count
;
11276 /* Convert candidate and add the jump around. */
11277 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11278 xg_promote_candidate_litpool (lps
, lp
);
11283 static bfd_boolean
xtensa_is_init_fini (segT seg
)
11287 return strcmp (segment_name (seg
), INIT_SECTION_NAME
) == 0
11288 || strcmp (segment_name (seg
), FINI_SECTION_NAME
) == 0;
11292 xtensa_move_literals (void)
11295 frchainS
*frchain_from
, *frchain_to
;
11296 fragS
*search_frag
, *next_frag
, *literal_pool
, *insert_after
;
11297 fragS
**frag_splice
;
11300 fixS
*fix
, *next_fix
, **fix_splice
;
11302 struct litpool_seg
*lps
;
11303 const char *init_name
= INIT_SECTION_NAME
;
11304 const char *fini_name
= FINI_SECTION_NAME
;
11305 int init_name_len
= strlen(init_name
);
11306 int fini_name_len
= strlen(fini_name
);
11308 mark_literal_frags (literal_head
->next
);
11310 if (use_literal_section
)
11313 /* Assign addresses (rough estimates) to the potential literal pool locations
11314 and create new ones if the gaps are too large. */
11316 for (lps
= litpool_seg_list
.next
; lps
; lps
= lps
->next
)
11318 frchainS
*frchP
= seg_info (lps
->seg
)->frchainP
;
11319 struct litpool_frag
*lpf
= lps
->frag_list
.next
;
11322 if (xtensa_is_init_fini (lps
->seg
))
11325 for ( ; frchP
; frchP
= frchP
->frch_next
)
11328 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11330 if (lpf
&& fragP
== lpf
->fragP
)
11332 gas_assert(fragP
->fr_type
== rs_machine_dependent
&&
11333 (fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
||
11334 fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
));
11335 /* Found a litpool location. */
11339 if (fragP
->fr_type
== rs_machine_dependent
&&
11340 fragP
->fr_subtype
== RELAX_SLOTS
)
11343 for (slot
= 0; slot
< MAX_SLOTS
; slot
++)
11345 fragS
*litfrag
= fragP
->tc_frag_data
.literal_frags
[slot
];
11348 && litfrag
->tc_frag_data
.is_literal
11349 && !litfrag
->tc_frag_data
.literal_frag
)
11351 /* L32R referring .literal or generated as a result
11352 of relaxation. Point its literal to the nearest
11353 litpool preferring non-"candidate" positions to
11354 avoid the jump-around. */
11356 struct litpool_frag
*lp
;
11358 lp
= xg_find_litpool (lps
, lpf
, addr
);
11359 /* Take earliest use of this literal to avoid
11361 litfrag
->tc_frag_data
.literal_frag
= lp
->fragP
;
11365 addr
+= fragP
->fr_fix
;
11366 if (fragP
->fr_type
== rs_fill
)
11367 addr
+= fragP
->fr_offset
;
11372 for (segment
= literal_head
->next
; segment
; segment
= segment
->next
)
11374 const char *seg_name
= segment_name (segment
->seg
);
11376 /* Keep the literals for .init and .fini in separate sections. */
11377 if ((!memcmp (seg_name
, init_name
, init_name_len
) &&
11378 !strcmp (seg_name
+ init_name_len
, ".literal")) ||
11379 (!memcmp (seg_name
, fini_name
, fini_name_len
) &&
11380 !strcmp (seg_name
+ fini_name_len
, ".literal")))
11383 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11384 search_frag
= frchain_from
->frch_root
;
11385 literal_pool
= NULL
;
11387 frag_splice
= &(frchain_from
->frch_root
);
11389 while (search_frag
&& !search_frag
->tc_frag_data
.literal_frag
)
11391 gas_assert (search_frag
->fr_fix
== 0
11392 || search_frag
->fr_type
== rs_align
);
11393 search_frag
= search_frag
->fr_next
;
11398 search_frag
= frchain_from
->frch_root
;
11399 as_bad_where (search_frag
->fr_file
, search_frag
->fr_line
,
11400 _("literal pool location required for text-section-literals; specify with .literal_position"));
11404 gas_assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
11405 == RELAX_LITERAL_POOL_BEGIN
);
11406 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
11408 /* Make sure that all the frags in this series are closed, and
11409 that there is at least one left over of zero-size. This
11410 prevents us from making a segment with an frchain without any
11412 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11413 xtensa_set_frag_assembly_state (frag_now
);
11414 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11415 xtensa_set_frag_assembly_state (frag_now
);
11417 while (search_frag
!= frag_now
)
11419 next_frag
= search_frag
->fr_next
;
11420 if (search_frag
->tc_frag_data
.literal_frag
)
11422 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
11423 gas_assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
11424 frchain_to
= literal_pool
->tc_frag_data
.lit_frchain
;
11425 gas_assert (frchain_to
);
11428 if (search_frag
->fr_type
== rs_fill
&& search_frag
->fr_fix
== 0)
11430 /* Skip empty fill frags. */
11431 *frag_splice
= next_frag
;
11432 search_frag
= next_frag
;
11436 if (search_frag
->fr_type
== rs_align
)
11438 /* Skip alignment frags, because the pool as a whole will be
11439 aligned if used, and we don't want to force alignment if the
11441 *frag_splice
= next_frag
;
11442 search_frag
= next_frag
;
11446 /* First, move the frag out of the literal section and
11447 to the appropriate place. */
11449 /* Insert an alignment frag at start of pool. */
11450 if (literal_pool
->fr_next
->fr_type
== rs_machine_dependent
&&
11451 literal_pool
->fr_next
->fr_subtype
== RELAX_LITERAL_POOL_END
)
11453 segT pool_seg
= literal_pool
->fr_next
->tc_frag_data
.lit_seg
;
11454 emit_state prev_state
;
11457 xtensa_switch_section_emit_state (&prev_state
, pool_seg
, 0);
11458 prev_frag
= frag_now
;
11459 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11460 align_frag
= frag_now
;
11461 frag_align (2, 0, 0);
11462 /* Splice it into the right place. */
11463 prev_frag
->fr_next
= align_frag
->fr_next
;
11464 align_frag
->fr_next
= literal_pool
->fr_next
;
11465 literal_pool
->fr_next
= align_frag
;
11466 /* Insert after this one. */
11467 literal_pool
->tc_frag_data
.literal_frag
= align_frag
;
11468 xtensa_restore_emit_state (&prev_state
);
11470 insert_after
= literal_pool
->tc_frag_data
.literal_frag
;
11471 dest_seg
= insert_after
->fr_next
->tc_frag_data
.lit_seg
;
11472 /* Skip align frag. */
11473 if (insert_after
->fr_next
->fr_type
== rs_align
)
11475 insert_after
= insert_after
->fr_next
;
11478 *frag_splice
= next_frag
;
11479 search_frag
->fr_next
= insert_after
->fr_next
;
11480 insert_after
->fr_next
= search_frag
;
11481 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
11482 literal_pool
->tc_frag_data
.literal_frag
= search_frag
;
11484 /* Now move any fixups associated with this frag to the
11486 fix
= frchain_from
->fix_root
;
11487 fix_splice
= &(frchain_from
->fix_root
);
11490 next_fix
= fix
->fx_next
;
11491 if (fix
->fx_frag
== search_frag
)
11493 *fix_splice
= next_fix
;
11494 fix
->fx_next
= frchain_to
->fix_root
;
11495 frchain_to
->fix_root
= fix
;
11496 if (frchain_to
->fix_tail
== NULL
)
11497 frchain_to
->fix_tail
= fix
;
11500 fix_splice
= &(fix
->fx_next
);
11503 search_frag
= next_frag
;
11506 if (frchain_from
->fix_root
!= NULL
)
11508 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11509 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
11511 gas_assert (frchain_from
->fix_root
== NULL
);
11513 frchain_from
->fix_tail
= NULL
;
11514 xtensa_restore_emit_state (&state
);
11517 /* Now fix up the SEGMENT value for all the literal symbols. */
11518 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
11520 symbolS
*lit_sym
= lit
->sym
;
11521 segT dseg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
11523 S_SET_SEGMENT (lit_sym
, dseg
);
11528 /* Walk over all the frags for segments in a list and mark them as
11529 containing literals. As clunky as this is, we can't rely on frag_var
11530 and frag_variant to get called in all situations. */
11533 mark_literal_frags (seg_list
*segment
)
11535 frchainS
*frchain_from
;
11536 fragS
*search_frag
;
11540 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11541 search_frag
= frchain_from
->frch_root
;
11542 while (search_frag
)
11544 search_frag
->tc_frag_data
.is_literal
= TRUE
;
11545 search_frag
= search_frag
->fr_next
;
11547 segment
= segment
->next
;
11553 xtensa_reorder_seg_list (seg_list
*head
, segT after
)
11555 /* Move all of the sections in the section list to come
11556 after "after" in the gnu segment list. */
11561 segT literal_section
= head
->seg
;
11563 /* Move the literal section after "after". */
11564 gas_assert (literal_section
);
11565 if (literal_section
!= after
)
11567 bfd_section_list_remove (stdoutput
, literal_section
);
11568 bfd_section_list_insert_after (stdoutput
, after
, literal_section
);
11576 /* Push all the literal segments to the end of the gnu list. */
11579 xtensa_reorder_segments (void)
11586 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11592 /* Now that we have the last section, push all the literal
11593 sections to the end. */
11594 xtensa_reorder_seg_list (literal_head
, last_sec
);
11596 /* Now perform the final error check. */
11597 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11599 gas_assert (new_count
== old_count
);
11603 /* Change the emit state (seg, subseg, and frag related stuff) to the
11604 correct location. Return a emit_state which can be passed to
11605 xtensa_restore_emit_state to return to current fragment. */
11608 xtensa_switch_to_literal_fragment (emit_state
*result
)
11610 if (directive_state
[directive_absolute_literals
])
11612 segT lit4_seg
= cache_literal_section (TRUE
);
11613 xtensa_switch_section_emit_state (result
, lit4_seg
, 0);
11616 xtensa_switch_to_non_abs_literal_fragment (result
);
11618 /* Do a 4-byte align here. */
11619 frag_align (2, 0, 0);
11620 record_alignment (now_seg
, 2);
11625 xtensa_switch_to_non_abs_literal_fragment (emit_state
*result
)
11627 fragS
*pool_location
= get_literal_pool_location (now_seg
);
11629 bfd_boolean is_init_fini
= xtensa_is_init_fini (now_seg
);
11631 if (pool_location
== NULL
11632 && !use_literal_section
11635 if (!auto_litpools
)
11637 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11639 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
11640 pool_location
= get_literal_pool_location (now_seg
);
11643 lit_seg
= cache_literal_section (FALSE
);
11644 xtensa_switch_section_emit_state (result
, lit_seg
, 0);
11646 if (!use_literal_section
11648 && get_literal_pool_location (now_seg
) != pool_location
)
11650 /* Close whatever frag is there. */
11651 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11652 xtensa_set_frag_assembly_state (frag_now
);
11653 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
11654 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11655 xtensa_set_frag_assembly_state (frag_now
);
11660 /* Call this function before emitting data into the literal section.
11661 This is a helper function for xtensa_switch_to_literal_fragment.
11662 This is similar to a .section new_now_seg subseg. */
11665 xtensa_switch_section_emit_state (emit_state
*state
,
11667 subsegT new_now_subseg
)
11669 state
->name
= now_seg
->name
;
11670 state
->now_seg
= now_seg
;
11671 state
->now_subseg
= now_subseg
;
11672 state
->generating_literals
= generating_literals
;
11673 generating_literals
++;
11674 subseg_set (new_now_seg
, new_now_subseg
);
11678 /* Use to restore the emitting into the normal place. */
11681 xtensa_restore_emit_state (emit_state
*state
)
11683 generating_literals
= state
->generating_literals
;
11684 subseg_set (state
->now_seg
, state
->now_subseg
);
11688 /* Predicate function used to look up a section in a particular group. */
11691 match_section_group (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, void *inf
)
11693 const char *gname
= inf
;
11694 const char *group_name
= elf_group_name (sec
);
11696 return (group_name
== gname
11697 || (group_name
!= NULL
11699 && strcmp (group_name
, gname
) == 0));
11703 /* Get the literal section to be used for the current text section.
11704 The result may be cached in the default_lit_sections structure. */
11707 cache_literal_section (bfd_boolean use_abs_literals
)
11709 const char *text_name
, *group_name
= 0;
11710 const char *base_name
, *suffix
;
11713 segT seg
, current_section
;
11714 int current_subsec
;
11715 bfd_boolean linkonce
= FALSE
;
11717 /* Save the current section/subsection. */
11718 current_section
= now_seg
;
11719 current_subsec
= now_subseg
;
11721 /* Clear the cached values if they are no longer valid. */
11722 if (now_seg
!= default_lit_sections
.current_text_seg
)
11724 default_lit_sections
.current_text_seg
= now_seg
;
11725 default_lit_sections
.lit_seg
= NULL
;
11726 default_lit_sections
.lit4_seg
= NULL
;
11729 /* Check if the literal section is already cached. */
11730 if (use_abs_literals
)
11731 pcached
= &default_lit_sections
.lit4_seg
;
11733 pcached
= &default_lit_sections
.lit_seg
;
11738 text_name
= default_lit_sections
.lit_prefix
;
11739 if (! text_name
|| ! *text_name
)
11741 text_name
= segment_name (current_section
);
11742 group_name
= elf_group_name (current_section
);
11743 linkonce
= (current_section
->flags
& SEC_LINK_ONCE
) != 0;
11746 base_name
= use_abs_literals
? ".lit4" : ".literal";
11749 name
= concat (base_name
, ".", group_name
, (char *) NULL
);
11751 else if (strncmp (text_name
, ".gnu.linkonce.", linkonce_len
) == 0)
11753 suffix
= strchr (text_name
+ linkonce_len
, '.');
11755 name
= concat (".gnu.linkonce", base_name
, suffix
? suffix
: "",
11761 /* If the section name begins or ends with ".text", then replace
11762 that portion instead of appending an additional suffix. */
11763 size_t len
= strlen (text_name
);
11765 && (strcmp (text_name
+ len
- 5, ".text") == 0
11766 || strncmp (text_name
, ".text", 5) == 0))
11769 name
= XNEWVEC (char, len
+ strlen (base_name
) + 1);
11770 if (strncmp (text_name
, ".text", 5) == 0)
11772 strcpy (name
, base_name
);
11773 strcat (name
, text_name
+ 5);
11777 strcpy (name
, text_name
);
11778 strcpy (name
+ len
, base_name
);
11782 /* Canonicalize section names to allow renaming literal sections.
11783 The group name, if any, came from the current text section and
11784 has already been canonicalized. */
11785 name
= tc_canonicalize_symbol_name (name
);
11787 seg
= bfd_get_section_by_name_if (stdoutput
, name
, match_section_group
,
11788 (void *) group_name
);
11793 seg
= subseg_force_new (name
, 0);
11795 if (! use_abs_literals
)
11797 /* Add the newly created literal segment to the list. */
11798 seg_list
*n
= XNEW (seg_list
);
11800 n
->next
= literal_head
->next
;
11801 literal_head
->next
= n
;
11804 flags
= (SEC_HAS_CONTENTS
| SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
11805 | (linkonce
? (SEC_LINK_ONCE
| SEC_LINK_DUPLICATES_DISCARD
) : 0)
11806 | (use_abs_literals
? SEC_DATA
: SEC_CODE
));
11808 elf_group_name (seg
) = group_name
;
11810 bfd_set_section_flags (stdoutput
, seg
, flags
);
11811 bfd_set_section_alignment (stdoutput
, seg
, 2);
11815 subseg_set (current_section
, current_subsec
);
11820 /* Property Tables Stuff. */
11822 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11823 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11824 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11826 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
11827 typedef void (*frag_flags_fn
) (const fragS
*, frag_flags
*);
11829 static bfd_boolean
get_frag_is_literal (const fragS
*);
11830 static void xtensa_create_property_segments
11831 (frag_predicate
, frag_predicate
, const char *, xt_section_type
);
11832 static void xtensa_create_xproperty_segments
11833 (frag_flags_fn
, const char *, xt_section_type
);
11834 static bfd_boolean
exclude_section_from_property_tables (segT
);
11835 static bfd_boolean
section_has_property (segT
, frag_predicate
);
11836 static bfd_boolean
section_has_xproperty (segT
, frag_flags_fn
);
11837 static void add_xt_block_frags
11838 (segT
, xtensa_block_info
**, frag_predicate
, frag_predicate
);
11839 static bfd_boolean
xtensa_frag_flags_is_empty (const frag_flags
*);
11840 static void xtensa_frag_flags_init (frag_flags
*);
11841 static void get_frag_property_flags (const fragS
*, frag_flags
*);
11842 static flagword
frag_flags_to_number (const frag_flags
*);
11843 static void add_xt_prop_frags (segT
, xtensa_block_info
**, frag_flags_fn
);
11845 /* Set up property tables after relaxation. */
11848 xtensa_post_relax_hook (void)
11850 xtensa_move_seg_list_to_beginning (literal_head
);
11852 xtensa_find_unmarked_state_frags ();
11853 xtensa_mark_frags_for_org ();
11854 xtensa_mark_difference_of_two_symbols ();
11856 xtensa_create_property_segments (get_frag_is_literal
,
11858 XTENSA_LIT_SEC_NAME
,
11860 xtensa_create_xproperty_segments (get_frag_property_flags
,
11861 XTENSA_PROP_SEC_NAME
,
11864 if (warn_unaligned_branch_targets
)
11865 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_branch_targets
, 0);
11866 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_loops
, 0);
11870 /* This function is only meaningful after xtensa_move_literals. */
11873 get_frag_is_literal (const fragS
*fragP
)
11875 gas_assert (fragP
!= NULL
);
11876 return fragP
->tc_frag_data
.is_literal
;
11881 xtensa_create_property_segments (frag_predicate property_function
,
11882 frag_predicate end_property_function
,
11883 const char *section_name_base
,
11884 xt_section_type sec_type
)
11888 /* Walk over all of the current segments.
11889 Walk over each fragment
11890 For each non-empty fragment,
11891 Build a property record (append where possible). */
11893 for (seclist
= &stdoutput
->sections
;
11894 seclist
&& *seclist
;
11895 seclist
= &(*seclist
)->next
)
11897 segT sec
= *seclist
;
11899 if (exclude_section_from_property_tables (sec
))
11902 if (section_has_property (sec
, property_function
))
11904 segment_info_type
*xt_seg_info
;
11905 xtensa_block_info
**xt_blocks
;
11906 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11908 prop_sec
->output_section
= prop_sec
;
11909 subseg_set (prop_sec
, 0);
11910 xt_seg_info
= seg_info (prop_sec
);
11911 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11913 /* Walk over all of the frchains here and add new sections. */
11914 add_xt_block_frags (sec
, xt_blocks
, property_function
,
11915 end_property_function
);
11919 /* Now we fill them out.... */
11921 for (seclist
= &stdoutput
->sections
;
11922 seclist
&& *seclist
;
11923 seclist
= &(*seclist
)->next
)
11925 segment_info_type
*seginfo
;
11926 xtensa_block_info
*block
;
11927 segT sec
= *seclist
;
11929 seginfo
= seg_info (sec
);
11930 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11934 xtensa_block_info
*cur_block
;
11936 bfd_size_type rec_size
;
11938 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11941 rec_size
= num_recs
* 8;
11942 bfd_set_section_size (stdoutput
, sec
, rec_size
);
11949 subseg_set (sec
, 0);
11950 frag_data
= frag_more (rec_size
);
11952 for (i
= 0; i
< num_recs
; i
++)
11956 /* Write the fixup. */
11957 gas_assert (cur_block
);
11958 fix
= fix_new (frag_now
, i
* 8, 4,
11959 section_symbol (cur_block
->sec
),
11961 FALSE
, BFD_RELOC_32
);
11962 fix
->fx_file
= "<internal>";
11965 /* Write the length. */
11966 md_number_to_chars (&frag_data
[4 + i
* 8],
11967 cur_block
->size
, 4);
11968 cur_block
= cur_block
->next
;
11970 frag_wane (frag_now
);
11972 frag_wane (frag_now
);
11980 xtensa_create_xproperty_segments (frag_flags_fn flag_fn
,
11981 const char *section_name_base
,
11982 xt_section_type sec_type
)
11986 /* Walk over all of the current segments.
11987 Walk over each fragment.
11988 For each fragment that has instructions,
11989 build an instruction record (append where possible). */
11991 for (seclist
= &stdoutput
->sections
;
11992 seclist
&& *seclist
;
11993 seclist
= &(*seclist
)->next
)
11995 segT sec
= *seclist
;
11997 if (exclude_section_from_property_tables (sec
))
12000 if (section_has_xproperty (sec
, flag_fn
))
12002 segment_info_type
*xt_seg_info
;
12003 xtensa_block_info
**xt_blocks
;
12004 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
12006 prop_sec
->output_section
= prop_sec
;
12007 subseg_set (prop_sec
, 0);
12008 xt_seg_info
= seg_info (prop_sec
);
12009 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
12011 /* Walk over all of the frchains here and add new sections. */
12012 add_xt_prop_frags (sec
, xt_blocks
, flag_fn
);
12016 /* Now we fill them out.... */
12018 for (seclist
= &stdoutput
->sections
;
12019 seclist
&& *seclist
;
12020 seclist
= &(*seclist
)->next
)
12022 segment_info_type
*seginfo
;
12023 xtensa_block_info
*block
;
12024 segT sec
= *seclist
;
12026 seginfo
= seg_info (sec
);
12027 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
12031 xtensa_block_info
*cur_block
;
12033 bfd_size_type rec_size
;
12035 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
12038 rec_size
= num_recs
* (8 + 4);
12039 bfd_set_section_size (stdoutput
, sec
, rec_size
);
12040 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
12047 subseg_set (sec
, 0);
12048 frag_data
= frag_more (rec_size
);
12050 for (i
= 0; i
< num_recs
; i
++)
12054 /* Write the fixup. */
12055 gas_assert (cur_block
);
12056 fix
= fix_new (frag_now
, i
* 12, 4,
12057 section_symbol (cur_block
->sec
),
12059 FALSE
, BFD_RELOC_32
);
12060 fix
->fx_file
= "<internal>";
12063 /* Write the length. */
12064 md_number_to_chars (&frag_data
[4 + i
* 12],
12065 cur_block
->size
, 4);
12066 md_number_to_chars (&frag_data
[8 + i
* 12],
12067 frag_flags_to_number (&cur_block
->flags
),
12068 sizeof (flagword
));
12069 cur_block
= cur_block
->next
;
12071 frag_wane (frag_now
);
12073 frag_wane (frag_now
);
12081 exclude_section_from_property_tables (segT sec
)
12083 flagword flags
= bfd_get_section_flags (stdoutput
, sec
);
12085 /* Sections that don't contribute to the memory footprint are excluded. */
12086 if ((flags
& SEC_DEBUGGING
)
12087 || !(flags
& SEC_ALLOC
)
12088 || (flags
& SEC_MERGE
))
12091 /* Linker cie and fde optimizations mess up property entries for
12092 eh_frame sections, but there is nothing inside them relevant to
12093 property tables anyway. */
12094 if (strcmp (sec
->name
, ".eh_frame") == 0)
12102 section_has_property (segT sec
, frag_predicate property_function
)
12104 segment_info_type
*seginfo
= seg_info (sec
);
12107 if (seginfo
&& seginfo
->frchainP
)
12109 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
12111 if (property_function (fragP
)
12112 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
12121 section_has_xproperty (segT sec
, frag_flags_fn property_function
)
12123 segment_info_type
*seginfo
= seg_info (sec
);
12126 if (seginfo
&& seginfo
->frchainP
)
12128 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
12130 frag_flags prop_flags
;
12131 property_function (fragP
, &prop_flags
);
12132 if (!xtensa_frag_flags_is_empty (&prop_flags
))
12140 /* Two types of block sections exist right now: literal and insns. */
12143 add_xt_block_frags (segT sec
,
12144 xtensa_block_info
**xt_block
,
12145 frag_predicate property_function
,
12146 frag_predicate end_property_function
)
12150 /* Build it if needed. */
12151 while (*xt_block
!= NULL
)
12152 xt_block
= &(*xt_block
)->next
;
12153 /* We are either at NULL at the beginning or at the end. */
12155 /* Walk through the frags. */
12156 if (seg_info (sec
)->frchainP
)
12158 for (fragP
= seg_info (sec
)->frchainP
->frch_root
;
12160 fragP
= fragP
->fr_next
)
12162 if (property_function (fragP
)
12163 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
12165 if (*xt_block
!= NULL
)
12167 if ((*xt_block
)->offset
+ (*xt_block
)->size
12168 == fragP
->fr_address
)
12169 (*xt_block
)->size
+= fragP
->fr_fix
;
12171 xt_block
= &((*xt_block
)->next
);
12173 if (*xt_block
== NULL
)
12175 xtensa_block_info
*new_block
= XNEW (xtensa_block_info
);
12176 new_block
->sec
= sec
;
12177 new_block
->offset
= fragP
->fr_address
;
12178 new_block
->size
= fragP
->fr_fix
;
12179 new_block
->next
= NULL
;
12180 xtensa_frag_flags_init (&new_block
->flags
);
12181 *xt_block
= new_block
;
12183 if (end_property_function
12184 && end_property_function (fragP
))
12186 xt_block
= &((*xt_block
)->next
);
12194 /* Break the encapsulation of add_xt_prop_frags here. */
12197 xtensa_frag_flags_is_empty (const frag_flags
*prop_flags
)
12199 if (prop_flags
->is_literal
12200 || prop_flags
->is_insn
12201 || prop_flags
->is_data
12202 || prop_flags
->is_unreachable
)
12209 xtensa_frag_flags_init (frag_flags
*prop_flags
)
12211 memset (prop_flags
, 0, sizeof (frag_flags
));
12216 get_frag_property_flags (const fragS
*fragP
, frag_flags
*prop_flags
)
12218 xtensa_frag_flags_init (prop_flags
);
12219 if (fragP
->tc_frag_data
.is_literal
)
12220 prop_flags
->is_literal
= TRUE
;
12221 if (fragP
->tc_frag_data
.is_specific_opcode
12222 || fragP
->tc_frag_data
.is_no_transform
)
12224 prop_flags
->is_no_transform
= TRUE
;
12225 if (xtensa_frag_flags_is_empty (prop_flags
))
12226 prop_flags
->is_data
= TRUE
;
12228 if (fragP
->tc_frag_data
.is_unreachable
)
12229 prop_flags
->is_unreachable
= TRUE
;
12230 else if (fragP
->tc_frag_data
.is_insn
)
12232 prop_flags
->is_insn
= TRUE
;
12233 if (fragP
->tc_frag_data
.is_loop_target
)
12234 prop_flags
->insn
.is_loop_target
= TRUE
;
12235 if (fragP
->tc_frag_data
.is_branch_target
)
12236 prop_flags
->insn
.is_branch_target
= TRUE
;
12237 if (fragP
->tc_frag_data
.is_no_density
)
12238 prop_flags
->insn
.is_no_density
= TRUE
;
12239 if (fragP
->tc_frag_data
.use_absolute_literals
)
12240 prop_flags
->insn
.is_abslit
= TRUE
;
12242 if (fragP
->tc_frag_data
.is_align
)
12244 prop_flags
->is_align
= TRUE
;
12245 prop_flags
->alignment
= fragP
->tc_frag_data
.alignment
;
12246 if (xtensa_frag_flags_is_empty (prop_flags
))
12247 prop_flags
->is_data
= TRUE
;
12253 frag_flags_to_number (const frag_flags
*prop_flags
)
12256 if (prop_flags
->is_literal
)
12257 num
|= XTENSA_PROP_LITERAL
;
12258 if (prop_flags
->is_insn
)
12259 num
|= XTENSA_PROP_INSN
;
12260 if (prop_flags
->is_data
)
12261 num
|= XTENSA_PROP_DATA
;
12262 if (prop_flags
->is_unreachable
)
12263 num
|= XTENSA_PROP_UNREACHABLE
;
12264 if (prop_flags
->insn
.is_loop_target
)
12265 num
|= XTENSA_PROP_INSN_LOOP_TARGET
;
12266 if (prop_flags
->insn
.is_branch_target
)
12268 num
|= XTENSA_PROP_INSN_BRANCH_TARGET
;
12269 num
= SET_XTENSA_PROP_BT_ALIGN (num
, prop_flags
->insn
.bt_align_priority
);
12272 if (prop_flags
->insn
.is_no_density
)
12273 num
|= XTENSA_PROP_INSN_NO_DENSITY
;
12274 if (prop_flags
->is_no_transform
)
12275 num
|= XTENSA_PROP_NO_TRANSFORM
;
12276 if (prop_flags
->insn
.is_no_reorder
)
12277 num
|= XTENSA_PROP_INSN_NO_REORDER
;
12278 if (prop_flags
->insn
.is_abslit
)
12279 num
|= XTENSA_PROP_INSN_ABSLIT
;
12281 if (prop_flags
->is_align
)
12283 num
|= XTENSA_PROP_ALIGN
;
12284 num
= SET_XTENSA_PROP_ALIGNMENT (num
, prop_flags
->alignment
);
12292 xtensa_frag_flags_combinable (const frag_flags
*prop_flags_1
,
12293 const frag_flags
*prop_flags_2
)
12295 /* Cannot combine with an end marker. */
12297 if (prop_flags_1
->is_literal
!= prop_flags_2
->is_literal
)
12299 if (prop_flags_1
->is_insn
!= prop_flags_2
->is_insn
)
12301 if (prop_flags_1
->is_data
!= prop_flags_2
->is_data
)
12304 if (prop_flags_1
->is_insn
)
12306 /* Properties of the beginning of the frag. */
12307 if (prop_flags_2
->insn
.is_loop_target
)
12309 if (prop_flags_2
->insn
.is_branch_target
)
12311 if (prop_flags_1
->insn
.is_no_density
!=
12312 prop_flags_2
->insn
.is_no_density
)
12314 if (prop_flags_1
->is_no_transform
!=
12315 prop_flags_2
->is_no_transform
)
12317 if (prop_flags_1
->insn
.is_no_reorder
!=
12318 prop_flags_2
->insn
.is_no_reorder
)
12320 if (prop_flags_1
->insn
.is_abslit
!=
12321 prop_flags_2
->insn
.is_abslit
)
12325 if (prop_flags_1
->is_align
)
12333 xt_block_aligned_size (const xtensa_block_info
*xt_block
)
12336 unsigned align_bits
;
12338 if (!xt_block
->flags
.is_align
)
12339 return xt_block
->size
;
12341 end_addr
= xt_block
->offset
+ xt_block
->size
;
12342 align_bits
= xt_block
->flags
.alignment
;
12343 end_addr
= ((end_addr
+ ((1 << align_bits
) -1)) >> align_bits
) << align_bits
;
12344 return end_addr
- xt_block
->offset
;
12349 xtensa_xt_block_combine (xtensa_block_info
*xt_block
,
12350 const xtensa_block_info
*xt_block_2
)
12352 if (xt_block
->sec
!= xt_block_2
->sec
)
12354 if (xt_block
->offset
+ xt_block_aligned_size (xt_block
)
12355 != xt_block_2
->offset
)
12358 if (xt_block_2
->size
== 0
12359 && (!xt_block_2
->flags
.is_unreachable
12360 || xt_block
->flags
.is_unreachable
))
12362 if (xt_block_2
->flags
.is_align
12363 && xt_block
->flags
.is_align
)
12365 /* Nothing needed. */
12366 if (xt_block
->flags
.alignment
>= xt_block_2
->flags
.alignment
)
12371 if (xt_block_2
->flags
.is_align
)
12373 /* Push alignment to previous entry. */
12374 xt_block
->flags
.is_align
= xt_block_2
->flags
.is_align
;
12375 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12380 if (!xtensa_frag_flags_combinable (&xt_block
->flags
,
12381 &xt_block_2
->flags
))
12384 xt_block
->size
+= xt_block_2
->size
;
12386 if (xt_block_2
->flags
.is_align
)
12388 xt_block
->flags
.is_align
= TRUE
;
12389 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12397 add_xt_prop_frags (segT sec
,
12398 xtensa_block_info
**xt_block
,
12399 frag_flags_fn property_function
)
12403 /* Build it if needed. */
12404 while (*xt_block
!= NULL
)
12406 xt_block
= &(*xt_block
)->next
;
12408 /* We are either at NULL at the beginning or at the end. */
12410 /* Walk through the frags. */
12411 if (seg_info (sec
)->frchainP
)
12413 for (fragP
= seg_info (sec
)->frchainP
->frch_root
; fragP
;
12414 fragP
= fragP
->fr_next
)
12416 xtensa_block_info tmp_block
;
12417 tmp_block
.sec
= sec
;
12418 tmp_block
.offset
= fragP
->fr_address
;
12419 tmp_block
.size
= fragP
->fr_fix
;
12420 tmp_block
.next
= NULL
;
12421 property_function (fragP
, &tmp_block
.flags
);
12423 if (!xtensa_frag_flags_is_empty (&tmp_block
.flags
))
12424 /* && fragP->fr_fix != 0) */
12426 if ((*xt_block
) == NULL
12427 || !xtensa_xt_block_combine (*xt_block
, &tmp_block
))
12429 xtensa_block_info
*new_block
;
12430 if ((*xt_block
) != NULL
)
12431 xt_block
= &(*xt_block
)->next
;
12432 new_block
= XNEW (xtensa_block_info
);
12433 *new_block
= tmp_block
;
12434 *xt_block
= new_block
;
12442 /* op_placement_info_table */
12444 /* op_placement_info makes it easier to determine which
12445 ops can go in which slots. */
12448 init_op_placement_info_table (void)
12450 xtensa_isa isa
= xtensa_default_isa
;
12451 xtensa_insnbuf ibuf
= xtensa_insnbuf_alloc (isa
);
12452 xtensa_opcode opcode
;
12455 int num_opcodes
= xtensa_isa_num_opcodes (isa
);
12457 op_placement_table
= XNEWVEC (op_placement_info
, num_opcodes
);
12458 gas_assert (xtensa_isa_num_formats (isa
) < MAX_FORMATS
);
12460 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
12462 op_placement_info
*opi
= &op_placement_table
[opcode
];
12463 /* FIXME: Make tinsn allocation dynamic. */
12464 if (xtensa_opcode_num_operands (isa
, opcode
) > MAX_INSN_ARGS
)
12465 as_fatal (_("too many operands in instruction"));
12466 opi
->narrowest
= XTENSA_UNDEFINED
;
12467 opi
->narrowest_size
= 0x7F;
12468 opi
->narrowest_slot
= 0;
12470 opi
->num_formats
= 0;
12472 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
12474 opi
->slots
[fmt
] = 0;
12475 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
12477 if (xtensa_opcode_encode (isa
, fmt
, slot
, ibuf
, opcode
) == 0)
12479 int fmt_length
= xtensa_format_length (isa
, fmt
);
12481 set_bit (fmt
, opi
->formats
);
12482 set_bit (slot
, opi
->slots
[fmt
]);
12483 if (fmt_length
< opi
->narrowest_size
12484 || (fmt_length
== opi
->narrowest_size
12485 && (xtensa_format_num_slots (isa
, fmt
)
12486 < xtensa_format_num_slots (isa
,
12489 opi
->narrowest
= fmt
;
12490 opi
->narrowest_size
= fmt_length
;
12491 opi
->narrowest_slot
= slot
;
12496 opi
->num_formats
++;
12499 xtensa_insnbuf_free (isa
, ibuf
);
12504 opcode_fits_format_slot (xtensa_opcode opcode
, xtensa_format fmt
, int slot
)
12506 return bit_is_set (slot
, op_placement_table
[opcode
].slots
[fmt
]);
12510 /* If the opcode is available in a single slot format, return its size. */
12513 xg_get_single_size (xtensa_opcode opcode
)
12515 return op_placement_table
[opcode
].narrowest_size
;
12519 static xtensa_format
12520 xg_get_single_format (xtensa_opcode opcode
)
12522 return op_placement_table
[opcode
].narrowest
;
12527 xg_get_single_slot (xtensa_opcode opcode
)
12529 return op_placement_table
[opcode
].narrowest_slot
;
12533 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12536 istack_init (IStack
*stack
)
12543 istack_empty (IStack
*stack
)
12545 return (stack
->ninsn
== 0);
12550 istack_full (IStack
*stack
)
12552 return (stack
->ninsn
== MAX_ISTACK
);
12556 /* Return a pointer to the top IStack entry.
12557 It is an error to call this if istack_empty () is TRUE. */
12560 istack_top (IStack
*stack
)
12562 int rec
= stack
->ninsn
- 1;
12563 gas_assert (!istack_empty (stack
));
12564 return &stack
->insn
[rec
];
12568 /* Add a new TInsn to an IStack.
12569 It is an error to call this if istack_full () is TRUE. */
12572 istack_push (IStack
*stack
, TInsn
*insn
)
12574 int rec
= stack
->ninsn
;
12575 gas_assert (!istack_full (stack
));
12576 stack
->insn
[rec
] = *insn
;
12581 /* Clear space for the next TInsn on the IStack and return a pointer
12582 to it. It is an error to call this if istack_full () is TRUE. */
12585 istack_push_space (IStack
*stack
)
12587 int rec
= stack
->ninsn
;
12589 gas_assert (!istack_full (stack
));
12590 insn
= &stack
->insn
[rec
];
12597 /* Remove the last pushed instruction. It is an error to call this if
12598 istack_empty () returns TRUE. */
12601 istack_pop (IStack
*stack
)
12603 int rec
= stack
->ninsn
- 1;
12604 gas_assert (!istack_empty (stack
));
12606 tinsn_init (&stack
->insn
[rec
]);
12610 /* TInsn functions. */
12613 tinsn_init (TInsn
*dst
)
12615 memset (dst
, 0, sizeof (TInsn
));
12619 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12622 tinsn_has_symbolic_operands (const TInsn
*insn
)
12625 int n
= insn
->ntok
;
12627 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12629 for (i
= 0; i
< n
; ++i
)
12631 switch (insn
->tok
[i
].X_op
)
12645 tinsn_has_invalid_symbolic_operands (const TInsn
*insn
)
12647 xtensa_isa isa
= xtensa_default_isa
;
12649 int n
= insn
->ntok
;
12651 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12653 for (i
= 0; i
< n
; ++i
)
12655 switch (insn
->tok
[i
].X_op
)
12663 /* Errors for these types are caught later. */
12668 /* Symbolic immediates are only allowed on the last immediate
12669 operand. At this time, CONST16 is the only opcode where we
12670 support non-PC-relative relocations. */
12671 if (i
!= get_relaxable_immed (insn
->opcode
)
12672 || (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) != 1
12673 && insn
->opcode
!= xtensa_const16_opcode
))
12675 as_bad (_("invalid symbolic operand"));
12684 /* For assembly code with complex expressions (e.g. subtraction),
12685 we have to build them in the literal pool so that
12686 their results are calculated correctly after relaxation.
12687 The relaxation only handles expressions that
12688 boil down to SYMBOL + OFFSET. */
12691 tinsn_has_complex_operands (const TInsn
*insn
)
12694 int n
= insn
->ntok
;
12695 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12696 for (i
= 0; i
< n
; ++i
)
12698 switch (insn
->tok
[i
].X_op
)
12714 /* Encode a TInsn opcode and its constant operands into slotbuf.
12715 Return TRUE if there is a symbol in the immediate field. This
12716 function assumes that:
12717 1) The number of operands are correct.
12718 2) The insn_type is ITYPE_INSN.
12719 3) The opcode can be encoded in the specified format and slot.
12720 4) Operands are either O_constant or O_symbol, and all constants fit. */
12723 tinsn_to_slotbuf (xtensa_format fmt
,
12726 xtensa_insnbuf slotbuf
)
12728 xtensa_isa isa
= xtensa_default_isa
;
12729 xtensa_opcode opcode
= tinsn
->opcode
;
12730 bfd_boolean has_fixup
= FALSE
;
12731 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12734 gas_assert (tinsn
->insn_type
== ITYPE_INSN
);
12735 if (noperands
!= tinsn
->ntok
)
12736 as_fatal (_("operand number mismatch"));
12738 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opcode
))
12740 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12741 xtensa_opcode_name (isa
, opcode
), xtensa_format_name (isa
, fmt
));
12745 for (i
= 0; i
< noperands
; i
++)
12747 expressionS
*exp
= &tinsn
->tok
[i
];
12750 const char *file_name
;
12756 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12758 /* The register number has already been checked in
12759 expression_maybe_register, so we don't need to check here. */
12760 opnd_value
= exp
->X_add_number
;
12761 (void) xtensa_operand_encode (isa
, opcode
, i
, &opnd_value
);
12762 rc
= xtensa_operand_set_field (isa
, opcode
, i
, fmt
, slot
, slotbuf
,
12765 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa
));
12769 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12771 file_name
= as_where (&line
);
12772 /* It is a constant and we called this function
12773 then we have to try to fit it. */
12774 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
, i
,
12775 exp
->X_add_number
, file_name
, line
);
12788 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12789 into a multi-slot instruction, fill the other slots with NOPs.
12790 Return TRUE if there is a symbol in the immediate field. See also the
12791 assumptions listed for tinsn_to_slotbuf. */
12794 tinsn_to_insnbuf (TInsn
*tinsn
, xtensa_insnbuf insnbuf
)
12796 static xtensa_insnbuf slotbuf
= 0;
12797 static vliw_insn vinsn
;
12798 xtensa_isa isa
= xtensa_default_isa
;
12799 bfd_boolean has_fixup
= FALSE
;
12804 slotbuf
= xtensa_insnbuf_alloc (isa
);
12805 xg_init_vinsn (&vinsn
);
12808 xg_clear_vinsn (&vinsn
);
12810 bundle_tinsn (tinsn
, &vinsn
);
12812 xtensa_format_encode (isa
, vinsn
.format
, insnbuf
);
12814 for (i
= 0; i
< vinsn
.num_slots
; i
++)
12816 /* Only one slot may have a fix-up because the rest contains NOPs. */
12818 tinsn_to_slotbuf (vinsn
.format
, i
, &vinsn
.slots
[i
], vinsn
.slotbuf
[i
]);
12819 xtensa_format_set_slot (isa
, vinsn
.format
, i
, insnbuf
, vinsn
.slotbuf
[i
]);
12826 /* Check the instruction arguments. Return TRUE on failure. */
12829 tinsn_check_arguments (const TInsn
*insn
)
12831 xtensa_isa isa
= xtensa_default_isa
;
12832 xtensa_opcode opcode
= insn
->opcode
;
12833 xtensa_regfile t1_regfile
, t2_regfile
;
12834 int t1_reg
, t2_reg
;
12835 int t1_base_reg
, t1_last_reg
;
12836 int t2_base_reg
, t2_last_reg
;
12837 char t1_inout
, t2_inout
;
12840 if (opcode
== XTENSA_UNDEFINED
)
12842 as_bad (_("invalid opcode"));
12846 if (xtensa_opcode_num_operands (isa
, opcode
) > insn
->ntok
)
12848 as_bad (_("too few operands"));
12852 if (xtensa_opcode_num_operands (isa
, opcode
) < insn
->ntok
)
12854 as_bad (_("too many operands"));
12858 /* Check registers. */
12859 for (j
= 0; j
< insn
->ntok
; j
++)
12861 if (xtensa_operand_is_register (isa
, insn
->opcode
, j
) != 1)
12864 t2_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, j
);
12865 t2_base_reg
= insn
->tok
[j
].X_add_number
;
12867 = t2_base_reg
+ xtensa_operand_num_regs (isa
, insn
->opcode
, j
);
12869 for (i
= 0; i
< insn
->ntok
; i
++)
12874 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) != 1)
12877 t1_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, i
);
12879 if (t1_regfile
!= t2_regfile
)
12882 t1_inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
12883 t2_inout
= xtensa_operand_inout (isa
, insn
->opcode
, j
);
12885 t1_base_reg
= insn
->tok
[i
].X_add_number
;
12886 t1_last_reg
= (t1_base_reg
12887 + xtensa_operand_num_regs (isa
, insn
->opcode
, i
));
12889 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
12891 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
12893 if (t1_reg
!= t2_reg
)
12896 if (t1_inout
!= 'i' && t2_inout
!= 'i')
12898 as_bad (_("multiple writes to the same register"));
12909 /* Load an instruction from its encoded form. */
12912 tinsn_from_chars (TInsn
*tinsn
, char *f
, int slot
)
12916 xg_init_vinsn (&vinsn
);
12917 vinsn_from_chars (&vinsn
, f
);
12919 *tinsn
= vinsn
.slots
[slot
];
12920 xg_free_vinsn (&vinsn
);
12925 tinsn_from_insnbuf (TInsn
*tinsn
,
12926 xtensa_insnbuf slotbuf
,
12931 xtensa_isa isa
= xtensa_default_isa
;
12933 /* Find the immed. */
12934 tinsn_init (tinsn
);
12935 tinsn
->insn_type
= ITYPE_INSN
;
12936 tinsn
->is_specific_opcode
= FALSE
; /* must not be specific */
12937 tinsn
->opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
12938 tinsn
->ntok
= xtensa_opcode_num_operands (isa
, tinsn
->opcode
);
12939 for (i
= 0; i
< tinsn
->ntok
; i
++)
12941 set_expr_const (&tinsn
->tok
[i
],
12942 xtensa_insnbuf_get_operand (slotbuf
, fmt
, slot
,
12943 tinsn
->opcode
, i
));
12948 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12951 tinsn_immed_from_frag (TInsn
*tinsn
, fragS
*fragP
, int slot
)
12953 xtensa_opcode opcode
= tinsn
->opcode
;
12956 if (fragP
->tc_frag_data
.slot_symbols
[slot
])
12958 opnum
= get_relaxable_immed (opcode
);
12959 gas_assert (opnum
>= 0);
12960 set_expr_symbol_offset (&tinsn
->tok
[opnum
],
12961 fragP
->tc_frag_data
.slot_symbols
[slot
],
12962 fragP
->tc_frag_data
.slot_offsets
[slot
]);
12964 tinsn
->extra_arg
= fragP
->tc_frag_data
.free_reg
[slot
];
12969 get_num_stack_text_bytes (IStack
*istack
)
12972 int text_bytes
= 0;
12974 for (i
= 0; i
< istack
->ninsn
; i
++)
12976 TInsn
*tinsn
= &istack
->insn
[i
];
12977 if (tinsn
->insn_type
== ITYPE_INSN
)
12978 text_bytes
+= xg_get_single_size (tinsn
->opcode
);
12985 get_num_stack_literal_bytes (IStack
*istack
)
12990 for (i
= 0; i
< istack
->ninsn
; i
++)
12992 TInsn
*tinsn
= &istack
->insn
[i
];
12993 if (tinsn
->insn_type
== ITYPE_LITERAL
&& tinsn
->ntok
== 1)
13000 /* vliw_insn functions. */
13003 xg_init_vinsn (vliw_insn
*v
)
13006 xtensa_isa isa
= xtensa_default_isa
;
13008 xg_clear_vinsn (v
);
13010 v
->insnbuf
= xtensa_insnbuf_alloc (isa
);
13011 if (v
->insnbuf
== NULL
)
13012 as_fatal (_("out of memory"));
13014 for (i
= 0; i
< config_max_slots
; i
++)
13016 v
->slotbuf
[i
] = xtensa_insnbuf_alloc (isa
);
13017 if (v
->slotbuf
[i
] == NULL
)
13018 as_fatal (_("out of memory"));
13024 xg_clear_vinsn (vliw_insn
*v
)
13028 memset (v
, 0, offsetof (vliw_insn
, slots
)
13029 + sizeof(TInsn
) * config_max_slots
);
13031 v
->format
= XTENSA_UNDEFINED
;
13033 v
->inside_bundle
= FALSE
;
13035 if (xt_saved_debug_type
!= DEBUG_NONE
)
13036 debug_type
= xt_saved_debug_type
;
13038 for (i
= 0; i
< config_max_slots
; i
++)
13039 v
->slots
[i
].opcode
= XTENSA_UNDEFINED
;
13044 xg_copy_vinsn (vliw_insn
*dst
, vliw_insn
*src
)
13047 offsetof(vliw_insn
, slots
) + src
->num_slots
* sizeof(TInsn
));
13048 dst
->insnbuf
= src
->insnbuf
;
13049 memcpy (dst
->slotbuf
, src
->slotbuf
, src
->num_slots
* sizeof(xtensa_insnbuf
));
13054 vinsn_has_specific_opcodes (vliw_insn
*v
)
13058 for (i
= 0; i
< v
->num_slots
; i
++)
13060 if (v
->slots
[i
].is_specific_opcode
)
13068 xg_free_vinsn (vliw_insn
*v
)
13071 xtensa_insnbuf_free (xtensa_default_isa
, v
->insnbuf
);
13072 for (i
= 0; i
< config_max_slots
; i
++)
13073 xtensa_insnbuf_free (xtensa_default_isa
, v
->slotbuf
[i
]);
13077 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
13078 operands. See also the assumptions listed for tinsn_to_slotbuf. */
13081 vinsn_to_insnbuf (vliw_insn
*vinsn
,
13084 bfd_boolean record_fixup
)
13086 xtensa_isa isa
= xtensa_default_isa
;
13087 xtensa_format fmt
= vinsn
->format
;
13088 xtensa_insnbuf insnbuf
= vinsn
->insnbuf
;
13090 bfd_boolean has_fixup
= FALSE
;
13092 xtensa_format_encode (isa
, fmt
, insnbuf
);
13094 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
13096 TInsn
*tinsn
= &vinsn
->slots
[slot
];
13097 expressionS
*extra_arg
= &tinsn
->extra_arg
;
13098 bfd_boolean tinsn_has_fixup
=
13099 tinsn_to_slotbuf (vinsn
->format
, slot
, tinsn
,
13100 vinsn
->slotbuf
[slot
]);
13102 xtensa_format_set_slot (isa
, fmt
, slot
,
13103 insnbuf
, vinsn
->slotbuf
[slot
]);
13104 if (extra_arg
->X_op
!= O_illegal
&& extra_arg
->X_op
!= O_register
)
13106 if (vinsn
->num_slots
!= 1)
13107 as_bad (_("TLS relocation not allowed in FLIX bundle"));
13108 else if (record_fixup
)
13109 /* Instructions that generate TLS relocations should always be
13110 relaxed in the front-end. If "record_fixup" is set, then this
13111 function is being called during back-end relaxation, so flag
13112 the unexpected behavior as an error. */
13113 as_bad (_("unexpected TLS relocation"));
13115 fix_new (fragP
, frag_offset
- fragP
->fr_literal
,
13116 xtensa_format_length (isa
, fmt
),
13117 extra_arg
->X_add_symbol
, extra_arg
->X_add_number
,
13118 FALSE
, map_operator_to_reloc (extra_arg
->X_op
, FALSE
));
13120 if (tinsn_has_fixup
)
13123 xtensa_opcode opcode
= tinsn
->opcode
;
13124 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
13127 for (i
= 0; i
< noperands
; i
++)
13129 expressionS
* exp
= &tinsn
->tok
[i
];
13135 if (get_relaxable_immed (opcode
) == i
)
13137 /* Add a fix record for the instruction, except if this
13138 function is being called prior to relaxation, i.e.,
13139 if record_fixup is false, and the instruction might
13140 be relaxed later. */
13142 || tinsn
->is_specific_opcode
13143 || !xg_is_relaxable_insn (tinsn
, 0))
13145 xg_add_opcode_fix (tinsn
, i
, fmt
, slot
, exp
, fragP
,
13146 frag_offset
- fragP
->fr_literal
);
13150 if (exp
->X_op
!= O_symbol
)
13151 as_bad (_("invalid operand"));
13152 tinsn
->symbol
= exp
->X_add_symbol
;
13153 tinsn
->offset
= exp
->X_add_number
;
13157 as_bad (_("symbolic operand not allowed"));
13165 as_bad (_("expression too complex"));
13177 vinsn_from_chars (vliw_insn
*vinsn
, char *f
)
13179 static xtensa_insnbuf insnbuf
= NULL
;
13180 static xtensa_insnbuf slotbuf
= NULL
;
13183 xtensa_isa isa
= xtensa_default_isa
;
13187 insnbuf
= xtensa_insnbuf_alloc (isa
);
13188 slotbuf
= xtensa_insnbuf_alloc (isa
);
13191 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) f
, 0);
13192 fmt
= xtensa_format_decode (isa
, insnbuf
);
13193 if (fmt
== XTENSA_UNDEFINED
)
13194 as_fatal (_("cannot decode instruction format"));
13195 vinsn
->format
= fmt
;
13196 vinsn
->num_slots
= xtensa_format_num_slots (isa
, fmt
);
13198 for (i
= 0; i
< vinsn
->num_slots
; i
++)
13200 TInsn
*tinsn
= &vinsn
->slots
[i
];
13201 xtensa_format_get_slot (isa
, fmt
, i
, insnbuf
, slotbuf
);
13202 tinsn_from_insnbuf (tinsn
, slotbuf
, fmt
, i
);
13207 /* Expression utilities. */
13209 /* Return TRUE if the expression is an integer constant. */
13212 expr_is_const (const expressionS
*s
)
13214 return (s
->X_op
== O_constant
);
13218 /* Get the expression constant.
13219 Calling this is illegal if expr_is_const () returns TRUE. */
13222 get_expr_const (const expressionS
*s
)
13224 gas_assert (expr_is_const (s
));
13225 return s
->X_add_number
;
13229 /* Set the expression to a constant value. */
13232 set_expr_const (expressionS
*s
, offsetT val
)
13234 s
->X_op
= O_constant
;
13235 s
->X_add_number
= val
;
13236 s
->X_add_symbol
= NULL
;
13237 s
->X_op_symbol
= NULL
;
13242 expr_is_register (const expressionS
*s
)
13244 return (s
->X_op
== O_register
);
13248 /* Get the expression constant.
13249 Calling this is illegal if expr_is_const () returns TRUE. */
13252 get_expr_register (const expressionS
*s
)
13254 gas_assert (expr_is_register (s
));
13255 return s
->X_add_number
;
13259 /* Set the expression to a symbol + constant offset. */
13262 set_expr_symbol_offset (expressionS
*s
, symbolS
*sym
, offsetT offset
)
13264 s
->X_op
= O_symbol
;
13265 s
->X_add_symbol
= sym
;
13266 s
->X_op_symbol
= NULL
; /* unused */
13267 s
->X_add_number
= offset
;
13271 /* Return TRUE if the two expressions are equal. */
13274 expr_is_equal (expressionS
*s1
, expressionS
*s2
)
13276 if (s1
->X_op
!= s2
->X_op
)
13278 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
13280 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
13282 if (s1
->X_add_number
!= s2
->X_add_number
)
13289 copy_expr (expressionS
*dst
, const expressionS
*src
)
13291 memcpy (dst
, src
, sizeof (expressionS
));
13295 /* Support for the "--rename-section" option. */
13297 struct rename_section_struct
13299 const char *old_name
;
13301 struct rename_section_struct
*next
;
13304 static struct rename_section_struct
*section_rename
;
13307 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13308 entries to the section_rename list. Note: Specifying multiple
13309 renamings separated by colons is not documented and is retained only
13310 for backward compatibility. */
13313 build_section_rename (const char *arg
)
13315 struct rename_section_struct
*r
;
13316 char *this_arg
= NULL
;
13317 char *next_arg
= NULL
;
13319 for (this_arg
= xstrdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
13321 char *old_name
, *new_name
;
13325 next_arg
= strchr (this_arg
, ':');
13333 old_name
= this_arg
;
13334 new_name
= strchr (this_arg
, '=');
13336 if (*old_name
== '\0')
13338 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13341 if (!new_name
|| new_name
[1] == '\0')
13343 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13350 /* Check for invalid section renaming. */
13351 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13353 if (strcmp (r
->old_name
, old_name
) == 0)
13354 as_bad (_("section %s renamed multiple times"), old_name
);
13355 if (strcmp (r
->new_name
, new_name
) == 0)
13356 as_bad (_("multiple sections remapped to output section %s"),
13361 r
= XNEW (struct rename_section_struct
);
13362 r
->old_name
= xstrdup (old_name
);
13363 r
->new_name
= xstrdup (new_name
);
13364 r
->next
= section_rename
;
13365 section_rename
= r
;
13371 xtensa_section_rename (const char *name
)
13373 struct rename_section_struct
*r
= section_rename
;
13375 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13377 if (strcmp (r
->old_name
, name
) == 0)
13378 return r
->new_name
;
13381 return (char *) name
;