1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright (C) 2003-2020 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
27 #include "xtensa-relax.h"
28 #include "dwarf2dbg.h"
29 #include "xtensa-istack.h"
30 #include "xtensa-config.h"
31 #include "elf/xtensa.h"
33 /* Provide default values for new configuration settings. */
39 #define uint32 unsigned int
42 #define int32 signed int
47 Naming conventions (used somewhat inconsistently):
48 The xtensa_ functions are exported
49 The xg_ functions are internal
51 We also have a couple of different extensibility mechanisms.
52 1) The idiom replacement:
53 This is used when a line is first parsed to
54 replace an instruction pattern with another instruction
55 It is currently limited to replacements of instructions
56 with constant operands.
57 2) The xtensa-relax.c mechanism that has stronger instruction
58 replacement patterns. When an instruction's immediate field
59 does not fit the next instruction sequence is attempted.
60 In addition, "narrow" opcodes are supported this way. */
63 /* Define characters with special meanings to GAS. */
64 const char comment_chars
[] = "#";
65 const char line_comment_chars
[] = "#";
66 const char line_separator_chars
[] = ";";
67 const char EXP_CHARS
[] = "eE";
68 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
71 /* Flags to indicate whether the hardware supports the density and
72 absolute literals options. */
74 bfd_boolean density_supported
;
75 bfd_boolean absolute_literals_supported
;
77 static vliw_insn cur_vinsn
;
79 unsigned xtensa_num_pipe_stages
;
80 unsigned xtensa_fetch_width
;
82 static enum debug_info_type xt_saved_debug_type
= DEBUG_NONE
;
84 /* Some functions are only valid in the front end. This variable
85 allows us to assert that we haven't crossed over into the
87 static bfd_boolean past_xtensa_end
= FALSE
;
89 /* Flags for properties of the last instruction in a segment. */
90 #define FLAG_IS_A0_WRITER 0x1
91 #define FLAG_IS_BAD_LOOPEND 0x2
94 /* We define a special segment names ".literal" to place literals
95 into. The .fini and .init sections are special because they
96 contain code that is moved together by the linker. We give them
97 their own special .fini.literal and .init.literal sections. */
99 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
100 #define LIT4_SECTION_NAME xtensa_section_rename (".lit4")
101 #define INIT_SECTION_NAME xtensa_section_rename (".init")
102 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
105 /* This type is used for the directive_stack to keep track of the
106 state of the literal collection pools. If lit_prefix is set, it is
107 used to determine the literal section names; otherwise, the literal
108 sections are determined based on the current text section. The
109 lit_seg and lit4_seg fields cache these literal sections, with the
110 current_text_seg field used a tag to indicate whether the cached
113 typedef struct lit_state_struct
116 segT current_text_seg
;
121 static lit_state default_lit_sections
;
124 /* We keep a list of literal segments. The seg_list type is the node
125 for this list. The literal_head pointer is the head of the list,
126 with the literal_head_h dummy node at the start. */
128 typedef struct seg_list_struct
130 struct seg_list_struct
*next
;
134 static seg_list literal_head_h
;
135 static seg_list
*literal_head
= &literal_head_h
;
138 /* Lists of symbols. We keep a list of symbols that label the current
139 instruction, so that we can adjust the symbols when inserting alignment
140 for various instructions. We also keep a list of all the symbols on
141 literals, so that we can fix up those symbols when the literals are
142 later moved into the text sections. */
144 typedef struct sym_list_struct
146 struct sym_list_struct
*next
;
150 static sym_list
*insn_labels
= NULL
;
151 static sym_list
*free_insn_labels
= NULL
;
152 static sym_list
*saved_insn_labels
= NULL
;
154 static sym_list
*literal_syms
;
157 /* Flags to determine whether to prefer const16 or l32r
158 if both options are available. */
159 int prefer_const16
= 0;
162 /* Global flag to indicate when we are emitting literals. */
163 int generating_literals
= 0;
165 /* The following PROPERTY table definitions are copied from
166 <elf/xtensa.h> and must be kept in sync with the code there. */
168 /* Flags in the property tables to specify whether blocks of memory
169 are literals, instructions, data, or unreachable. For
170 instructions, blocks that begin loop targets and branch targets are
171 designated. Blocks that do not allow density, instruction
172 reordering or transformation are also specified. Finally, for
173 branch targets, branch target alignment priority is included.
174 Alignment of the next block is specified in the current block
175 and the size of the current block does not include any fill required
176 to align to the next block. */
178 #define XTENSA_PROP_LITERAL 0x00000001
179 #define XTENSA_PROP_INSN 0x00000002
180 #define XTENSA_PROP_DATA 0x00000004
181 #define XTENSA_PROP_UNREACHABLE 0x00000008
182 /* Instruction only properties at beginning of code. */
183 #define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
184 #define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
185 /* Instruction only properties about code. */
186 #define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
187 #define XTENSA_PROP_INSN_NO_REORDER 0x00000080
188 /* Historically, NO_TRANSFORM was a property of instructions,
189 but it should apply to literals under certain circumstances. */
190 #define XTENSA_PROP_NO_TRANSFORM 0x00000100
192 /* Branch target alignment information. This transmits information
193 to the linker optimization about the priority of aligning a
194 particular block for branch target alignment: None, low priority,
195 high priority, or required. These only need to be checked in
196 instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
199 switch (GET_XTENSA_PROP_BT_ALIGN (flags))
200 case XTENSA_PROP_BT_ALIGN_NONE:
201 case XTENSA_PROP_BT_ALIGN_LOW:
202 case XTENSA_PROP_BT_ALIGN_HIGH:
203 case XTENSA_PROP_BT_ALIGN_REQUIRE:
205 #define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
207 /* No branch target alignment. */
208 #define XTENSA_PROP_BT_ALIGN_NONE 0x0
209 /* Low priority branch target alignment. */
210 #define XTENSA_PROP_BT_ALIGN_LOW 0x1
211 /* High priority branch target alignment. */
212 #define XTENSA_PROP_BT_ALIGN_HIGH 0x2
213 /* Required branch target alignment. */
214 #define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
216 #define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
217 (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
218 (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
221 /* Alignment is specified in the block BEFORE the one that needs
222 alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
223 get the required alignment specified as a power of 2. Use
224 SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
225 alignment. Be careful of side effects since the SET will evaluate
226 flags twice. Also, note that the SIZE of a block in the property
227 table does not include the alignment size, so the alignment fill
228 must be calculated to determine if two blocks are contiguous.
229 TEXT_ALIGN is not currently implemented but is a placeholder for a
230 possible future implementation. */
232 #define XTENSA_PROP_ALIGN 0x00000800
234 #define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
236 #define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
237 (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
238 (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
240 #define XTENSA_PROP_INSN_ABSLIT 0x00020000
243 /* Structure for saving instruction and alignment per-fragment data
244 that will be written to the object file. This structure is
245 equivalent to the actual data that will be written out to the file
246 but is easier to use. We provide a conversion to file flags
247 in frag_flags_to_number. */
249 typedef struct frag_flags_struct frag_flags
;
251 struct frag_flags_struct
253 /* is_literal should only be used after xtensa_move_literals.
254 If you need to check if you are generating a literal fragment,
255 then use the generating_literals global. */
257 unsigned is_literal
: 1;
258 unsigned is_insn
: 1;
259 unsigned is_data
: 1;
260 unsigned is_unreachable
: 1;
262 /* is_specific_opcode implies no_transform. */
263 unsigned is_no_transform
: 1;
267 unsigned is_loop_target
: 1;
268 unsigned is_branch_target
: 1; /* Branch targets have a priority. */
269 unsigned bt_align_priority
: 2;
271 unsigned is_no_density
: 1;
272 /* no_longcalls flag does not need to be placed in the object file. */
274 unsigned is_no_reorder
: 1;
276 /* Uses absolute literal addressing for l32r. */
277 unsigned is_abslit
: 1;
279 unsigned is_align
: 1;
280 unsigned alignment
: 5;
284 /* Structure for saving information about a block of property data
285 for frags that have the same flags. */
286 struct xtensa_block_info_struct
292 struct xtensa_block_info_struct
*next
;
296 /* Structure for saving the current state before emitting literals. */
297 typedef struct emit_state_struct
302 int generating_literals
;
306 /* Opcode placement information */
308 typedef unsigned long long bitfield
;
309 #define bit_is_set(bit, bf) ((bf) & (0x01ll << (bit)))
310 #define set_bit(bit, bf) ((bf) |= (0x01ll << (bit)))
311 #define clear_bit(bit, bf) ((bf) &= ~(0x01ll << (bit)))
313 #define MAX_FORMATS 32
315 typedef struct op_placement_info_struct
318 /* A number describing how restrictive the issue is for this
319 opcode. For example, an opcode that fits lots of different
320 formats has a high freedom, as does an opcode that fits
321 only one format but many slots in that format. The most
322 restrictive is the opcode that fits only one slot in one
325 xtensa_format narrowest
;
329 /* formats is a bitfield with the Nth bit set
330 if the opcode fits in the Nth xtensa_format. */
333 /* slots[N]'s Mth bit is set if the op fits in the
334 Mth slot of the Nth xtensa_format. */
335 bitfield slots
[MAX_FORMATS
];
337 /* A count of the number of slots in a given format
338 an op can fit (i.e., the bitcount of the slot field above). */
339 char slots_in_format
[MAX_FORMATS
];
341 } op_placement_info
, *op_placement_info_table
;
343 op_placement_info_table op_placement_table
;
346 /* Extra expression types. */
348 #define O_pltrel O_md1 /* like O_symbol but use a PLT reloc */
349 #define O_hi16 O_md2 /* use high 16 bits of symbolic value */
350 #define O_lo16 O_md3 /* use low 16 bits of symbolic value */
351 #define O_pcrel O_md4 /* value is a PC-relative offset */
352 #define O_tlsfunc O_md5 /* TLS_FUNC/TLSDESC_FN relocation */
353 #define O_tlsarg O_md6 /* TLS_ARG/TLSDESC_ARG relocation */
354 #define O_tlscall O_md7 /* TLS_CALL relocation */
355 #define O_tpoff O_md8 /* TPOFF relocation */
356 #define O_dtpoff O_md9 /* DTPOFF relocation */
358 struct suffix_reloc_map
362 bfd_reloc_code_real_type reloc
;
366 #define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }
368 static struct suffix_reloc_map suffix_relocs
[] =
370 SUFFIX_MAP ("l", BFD_RELOC_LO16
, O_lo16
),
371 SUFFIX_MAP ("h", BFD_RELOC_HI16
, O_hi16
),
372 SUFFIX_MAP ("plt", BFD_RELOC_XTENSA_PLT
, O_pltrel
),
373 SUFFIX_MAP ("pcrel", BFD_RELOC_32_PCREL
, O_pcrel
),
374 SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC
, O_tlsfunc
),
375 SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG
, O_tlsarg
),
376 SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL
, O_tlscall
),
377 SUFFIX_MAP ("tpoff", BFD_RELOC_XTENSA_TLS_TPOFF
, O_tpoff
),
378 SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF
, O_dtpoff
),
392 directive_literal_prefix
,
394 directive_absolute_literals
,
395 directive_last_directive
401 bfd_boolean can_be_negated
;
404 const directive_infoS directive_info
[] =
407 { "literal", FALSE
},
409 { "transform", TRUE
},
410 { "freeregs", FALSE
},
411 { "longcalls", TRUE
},
412 { "literal_prefix", FALSE
},
413 { "schedule", TRUE
},
414 { "absolute-literals", TRUE
}
417 bfd_boolean directive_state
[] =
422 TRUE
, /* transform */
423 FALSE
, /* freeregs */
424 FALSE
, /* longcalls */
425 FALSE
, /* literal_prefix */
426 FALSE
, /* schedule */
427 FALSE
/* absolute_literals */
430 /* A circular list of all potential and actual literal pool locations
434 struct litpool_frag
*next
;
435 struct litpool_frag
*prev
;
438 short priority
; /* 1, 2, or 3 -- 1 is highest */
439 short original_priority
;
443 /* Map a segment to its litpool_frag list. */
446 struct litpool_seg
*next
;
448 struct litpool_frag frag_list
;
449 int frag_count
; /* since last litpool location */
452 static struct litpool_seg litpool_seg_list
;
454 /* Limit maximal size of auto litpool by half of the j range. */
455 #define MAX_AUTO_POOL_LITERALS 16384
457 /* Limit maximal size of explicit literal pool by l32r range. */
458 #define MAX_EXPLICIT_POOL_LITERALS 65536
460 #define MAX_POOL_LITERALS \
461 (auto_litpools ? MAX_AUTO_POOL_LITERALS : MAX_EXPLICIT_POOL_LITERALS)
463 /* Directive functions. */
465 static void xtensa_begin_directive (int);
466 static void xtensa_end_directive (int);
467 static void xtensa_literal_prefix (void);
468 static void xtensa_literal_position (int);
469 static void xtensa_literal_pseudo (int);
470 static void xtensa_frequency_pseudo (int);
471 static void xtensa_elf_cons (int);
472 static void xtensa_leb128 (int);
474 /* Parsing and Idiom Translation. */
476 static bfd_reloc_code_real_type
xtensa_elf_suffix (char **, expressionS
*);
478 /* Various Other Internal Functions. */
480 extern bfd_boolean
xg_is_single_relaxable_insn (TInsn
*, TInsn
*, bfd_boolean
);
481 static bfd_boolean
xg_build_to_insn (TInsn
*, TInsn
*, BuildInstr
*);
482 static void xtensa_mark_literal_pool_location (void);
483 static addressT
get_expanded_loop_offset (xtensa_opcode
);
484 static fragS
*get_literal_pool_location (segT
);
485 static void set_literal_pool_location (segT
, fragS
*);
486 static void xtensa_set_frag_assembly_state (fragS
*);
487 static void finish_vinsn (vliw_insn
*);
488 static bfd_boolean
emit_single_op (TInsn
*);
489 static int total_frag_text_expansion (fragS
*);
490 static bfd_boolean use_trampolines
= TRUE
;
491 static void xtensa_check_frag_count (void);
492 static void xtensa_create_trampoline_frag (bfd_boolean
);
493 static void xtensa_maybe_create_trampoline_frag (void);
494 struct trampoline_frag
;
495 static int init_trampoline_frag (fragS
*);
496 static fixS
*xg_append_jump (fragS
*fragP
, symbolS
*sym
, offsetT offset
);
497 static void xtensa_maybe_create_literal_pool_frag (bfd_boolean
, bfd_boolean
);
498 static bfd_boolean auto_litpools
= FALSE
;
499 static int auto_litpool_limit
= 0;
500 static bfd_boolean
xtensa_is_init_fini (segT seg
);
502 /* Alignment Functions. */
504 static int get_text_align_power (unsigned);
505 static int get_text_align_max_fill_size (int, bfd_boolean
, bfd_boolean
);
506 static int branch_align_power (segT
);
508 /* Helpers for xtensa_relax_frag(). */
510 static long relax_frag_add_nop (fragS
*);
512 /* Accessors for additional per-subsegment information. */
514 static unsigned get_last_insn_flags (segT
, subsegT
);
515 static void set_last_insn_flags (segT
, subsegT
, unsigned, bfd_boolean
);
516 static float get_subseg_total_freq (segT
, subsegT
);
517 static float get_subseg_target_freq (segT
, subsegT
);
518 static void set_subseg_freq (segT
, subsegT
, float, float);
520 /* Segment list functions. */
522 static void xtensa_move_literals (void);
523 static void xtensa_reorder_segments (void);
524 static void xtensa_switch_to_literal_fragment (emit_state
*);
525 static void xtensa_switch_to_non_abs_literal_fragment (emit_state
*);
526 static void xtensa_switch_section_emit_state (emit_state
*, segT
, subsegT
);
527 static void xtensa_restore_emit_state (emit_state
*);
528 static segT
cache_literal_section (bfd_boolean
);
530 /* op_placement_info functions. */
532 static void init_op_placement_info_table (void);
533 extern bfd_boolean
opcode_fits_format_slot (xtensa_opcode
, xtensa_format
, int);
534 static int xg_get_single_size (xtensa_opcode
);
535 static xtensa_format
xg_get_single_format (xtensa_opcode
);
536 static int xg_get_single_slot (xtensa_opcode
);
538 /* TInsn and IStack functions. */
540 static bfd_boolean
tinsn_has_symbolic_operands (const TInsn
*);
541 static bfd_boolean
tinsn_has_invalid_symbolic_operands (const TInsn
*);
542 static bfd_boolean
tinsn_has_complex_operands (const TInsn
*);
543 static bfd_boolean
tinsn_to_insnbuf (TInsn
*, xtensa_insnbuf
);
544 static bfd_boolean
tinsn_check_arguments (const TInsn
*);
545 static void tinsn_from_chars (TInsn
*, char *, int);
546 static void tinsn_immed_from_frag (TInsn
*, fragS
*, int);
547 static int get_num_stack_text_bytes (IStack
*);
548 static int get_num_stack_literal_bytes (IStack
*);
549 static bfd_boolean
tinsn_to_slotbuf (xtensa_format
, int, TInsn
*, xtensa_insnbuf
);
551 /* vliw_insn functions. */
553 static void xg_init_vinsn (vliw_insn
*);
554 static void xg_copy_vinsn (vliw_insn
*, vliw_insn
*);
555 static void xg_clear_vinsn (vliw_insn
*);
556 static bfd_boolean
vinsn_has_specific_opcodes (vliw_insn
*);
557 static void xg_free_vinsn (vliw_insn
*);
558 static bfd_boolean vinsn_to_insnbuf
559 (vliw_insn
*, char *, fragS
*, bfd_boolean
);
560 static void vinsn_from_chars (vliw_insn
*, char *);
562 /* Expression Utilities. */
564 bfd_boolean
expr_is_const (const expressionS
*);
565 offsetT
get_expr_const (const expressionS
*);
566 void set_expr_const (expressionS
*, offsetT
);
567 bfd_boolean
expr_is_register (const expressionS
*);
568 offsetT
get_expr_register (const expressionS
*);
569 void set_expr_symbol_offset (expressionS
*, symbolS
*, offsetT
);
570 bfd_boolean
expr_is_equal (expressionS
*, expressionS
*);
571 static void copy_expr (expressionS
*, const expressionS
*);
573 /* Section renaming. */
575 static void build_section_rename (const char *);
578 /* ISA imported from bfd. */
579 extern xtensa_isa xtensa_default_isa
;
581 extern int target_big_endian
;
583 static xtensa_opcode xtensa_addi_opcode
;
584 static xtensa_opcode xtensa_addmi_opcode
;
585 static xtensa_opcode xtensa_call0_opcode
;
586 static xtensa_opcode xtensa_call4_opcode
;
587 static xtensa_opcode xtensa_call8_opcode
;
588 static xtensa_opcode xtensa_call12_opcode
;
589 static xtensa_opcode xtensa_callx0_opcode
;
590 static xtensa_opcode xtensa_callx4_opcode
;
591 static xtensa_opcode xtensa_callx8_opcode
;
592 static xtensa_opcode xtensa_callx12_opcode
;
593 static xtensa_opcode xtensa_const16_opcode
;
594 static xtensa_opcode xtensa_entry_opcode
;
595 static xtensa_opcode xtensa_extui_opcode
;
596 static xtensa_opcode xtensa_movi_opcode
;
597 static xtensa_opcode xtensa_movi_n_opcode
;
598 static xtensa_opcode xtensa_isync_opcode
;
599 static xtensa_opcode xtensa_j_opcode
;
600 static xtensa_opcode xtensa_jx_opcode
;
601 static xtensa_opcode xtensa_l32r_opcode
;
602 static xtensa_opcode xtensa_loop_opcode
;
603 static xtensa_opcode xtensa_loopnez_opcode
;
604 static xtensa_opcode xtensa_loopgtz_opcode
;
605 static xtensa_opcode xtensa_nop_opcode
;
606 static xtensa_opcode xtensa_nop_n_opcode
;
607 static xtensa_opcode xtensa_or_opcode
;
608 static xtensa_opcode xtensa_ret_opcode
;
609 static xtensa_opcode xtensa_ret_n_opcode
;
610 static xtensa_opcode xtensa_retw_opcode
;
611 static xtensa_opcode xtensa_retw_n_opcode
;
612 static xtensa_opcode xtensa_rsr_lcount_opcode
;
613 static xtensa_opcode xtensa_waiti_opcode
;
614 static int config_max_slots
= 0;
617 /* Command-line Options. */
619 bfd_boolean use_literal_section
= TRUE
;
620 enum flix_level produce_flix
= FLIX_ALL
;
621 static bfd_boolean align_targets
= TRUE
;
622 static bfd_boolean warn_unaligned_branch_targets
= FALSE
;
623 static bfd_boolean has_a0_b_retw
= FALSE
;
624 static bfd_boolean workaround_a0_b_retw
= FALSE
;
625 static bfd_boolean workaround_b_j_loop_end
= FALSE
;
626 static bfd_boolean workaround_short_loop
= FALSE
;
627 static bfd_boolean maybe_has_short_loop
= FALSE
;
628 static bfd_boolean workaround_close_loop_end
= FALSE
;
629 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
630 static bfd_boolean enforce_three_byte_loop_align
= FALSE
;
631 static bfd_boolean opt_linkrelax
= TRUE
;
633 /* When workaround_short_loops is TRUE, all loops with early exits must
634 have at least 3 instructions. workaround_all_short_loops is a modifier
635 to the workaround_short_loop flag. In addition to the
636 workaround_short_loop actions, all straightline loopgtz and loopnez
637 must have at least 3 instructions. */
639 static bfd_boolean workaround_all_short_loops
= FALSE
;
641 /* Generate individual property section for every section.
642 This option is defined in BDF library. */
643 extern bfd_boolean elf32xtensa_separate_props
;
646 xtensa_setup_hw_workarounds (int earliest
, int latest
)
648 if (earliest
> latest
)
649 as_fatal (_("illegal range of target hardware versions"));
651 /* Enable all workarounds for pre-T1050.0 hardware. */
652 if (earliest
< 105000 || latest
< 105000)
654 workaround_a0_b_retw
|= TRUE
;
655 workaround_b_j_loop_end
|= TRUE
;
656 workaround_short_loop
|= TRUE
;
657 workaround_close_loop_end
|= TRUE
;
658 workaround_all_short_loops
|= TRUE
;
659 enforce_three_byte_loop_align
= TRUE
;
666 option_density
= OPTION_MD_BASE
,
670 option_no_generate_flix
,
677 option_no_link_relax
,
685 option_text_section_literals
,
686 option_no_text_section_literals
,
688 option_absolute_literals
,
689 option_no_absolute_literals
,
691 option_align_targets
,
692 option_no_align_targets
,
694 option_warn_unaligned_targets
,
699 option_workaround_a0_b_retw
,
700 option_no_workaround_a0_b_retw
,
702 option_workaround_b_j_loop_end
,
703 option_no_workaround_b_j_loop_end
,
705 option_workaround_short_loop
,
706 option_no_workaround_short_loop
,
708 option_workaround_all_short_loops
,
709 option_no_workaround_all_short_loops
,
711 option_workaround_close_loop_end
,
712 option_no_workaround_close_loop_end
,
714 option_no_workarounds
,
716 option_rename_section_name
,
719 option_prefer_const16
,
721 option_target_hardware
,
724 option_no_trampolines
,
726 option_auto_litpools
,
727 option_no_auto_litpools
,
728 option_auto_litpool_limit
,
730 option_separate_props
,
731 option_no_separate_props
,
734 const char *md_shortopts
= "";
736 struct option md_longopts
[] =
738 { "density", no_argument
, NULL
, option_density
},
739 { "no-density", no_argument
, NULL
, option_no_density
},
741 { "flix", no_argument
, NULL
, option_flix
},
742 { "no-generate-flix", no_argument
, NULL
, option_no_generate_flix
},
743 { "no-allow-flix", no_argument
, NULL
, option_no_flix
},
745 /* Both "relax" and "generics" are deprecated and treated as equivalent
746 to the "transform" option. */
747 { "relax", no_argument
, NULL
, option_relax
},
748 { "no-relax", no_argument
, NULL
, option_no_relax
},
749 { "generics", no_argument
, NULL
, option_generics
},
750 { "no-generics", no_argument
, NULL
, option_no_generics
},
752 { "transform", no_argument
, NULL
, option_transform
},
753 { "no-transform", no_argument
, NULL
, option_no_transform
},
754 { "text-section-literals", no_argument
, NULL
, option_text_section_literals
},
755 { "no-text-section-literals", no_argument
, NULL
,
756 option_no_text_section_literals
},
757 { "absolute-literals", no_argument
, NULL
, option_absolute_literals
},
758 { "no-absolute-literals", no_argument
, NULL
, option_no_absolute_literals
},
759 /* This option was changed from -align-target to -target-align
760 because it conflicted with the "-al" option. */
761 { "target-align", no_argument
, NULL
, option_align_targets
},
762 { "no-target-align", no_argument
, NULL
, option_no_align_targets
},
763 { "warn-unaligned-targets", no_argument
, NULL
,
764 option_warn_unaligned_targets
},
765 { "longcalls", no_argument
, NULL
, option_longcalls
},
766 { "no-longcalls", no_argument
, NULL
, option_no_longcalls
},
768 { "no-workaround-a0-b-retw", no_argument
, NULL
,
769 option_no_workaround_a0_b_retw
},
770 { "workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
772 { "no-workaround-b-j-loop-end", no_argument
, NULL
,
773 option_no_workaround_b_j_loop_end
},
774 { "workaround-b-j-loop-end", no_argument
, NULL
,
775 option_workaround_b_j_loop_end
},
777 { "no-workaround-short-loops", no_argument
, NULL
,
778 option_no_workaround_short_loop
},
779 { "workaround-short-loops", no_argument
, NULL
,
780 option_workaround_short_loop
},
782 { "no-workaround-all-short-loops", no_argument
, NULL
,
783 option_no_workaround_all_short_loops
},
784 { "workaround-all-short-loop", no_argument
, NULL
,
785 option_workaround_all_short_loops
},
787 { "prefer-l32r", no_argument
, NULL
, option_prefer_l32r
},
788 { "prefer-const16", no_argument
, NULL
, option_prefer_const16
},
790 { "no-workarounds", no_argument
, NULL
, option_no_workarounds
},
792 { "no-workaround-close-loop-end", no_argument
, NULL
,
793 option_no_workaround_close_loop_end
},
794 { "workaround-close-loop-end", no_argument
, NULL
,
795 option_workaround_close_loop_end
},
797 { "rename-section", required_argument
, NULL
, option_rename_section_name
},
799 { "link-relax", no_argument
, NULL
, option_link_relax
},
800 { "no-link-relax", no_argument
, NULL
, option_no_link_relax
},
802 { "target-hardware", required_argument
, NULL
, option_target_hardware
},
804 { "trampolines", no_argument
, NULL
, option_trampolines
},
805 { "no-trampolines", no_argument
, NULL
, option_no_trampolines
},
807 { "auto-litpools", no_argument
, NULL
, option_auto_litpools
},
808 { "no-auto-litpools", no_argument
, NULL
, option_no_auto_litpools
},
809 { "auto-litpool-limit", required_argument
, NULL
, option_auto_litpool_limit
},
811 { "separate-prop-tables", no_argument
, NULL
, option_separate_props
},
813 { NULL
, no_argument
, NULL
, 0 }
816 size_t md_longopts_size
= sizeof md_longopts
;
820 md_parse_option (int c
, const char *arg
)
825 as_warn (_("--density option is ignored"));
827 case option_no_density
:
828 as_warn (_("--no-density option is ignored"));
830 case option_link_relax
:
831 opt_linkrelax
= TRUE
;
833 case option_no_link_relax
:
834 opt_linkrelax
= FALSE
;
837 produce_flix
= FLIX_ALL
;
839 case option_no_generate_flix
:
840 produce_flix
= FLIX_NO_GENERATE
;
843 produce_flix
= FLIX_NONE
;
845 case option_generics
:
846 as_warn (_("--generics is deprecated; use --transform instead"));
847 return md_parse_option (option_transform
, arg
);
848 case option_no_generics
:
849 as_warn (_("--no-generics is deprecated; use --no-transform instead"));
850 return md_parse_option (option_no_transform
, arg
);
852 as_warn (_("--relax is deprecated; use --transform instead"));
853 return md_parse_option (option_transform
, arg
);
854 case option_no_relax
:
855 as_warn (_("--no-relax is deprecated; use --no-transform instead"));
856 return md_parse_option (option_no_transform
, arg
);
857 case option_longcalls
:
858 directive_state
[directive_longcalls
] = TRUE
;
860 case option_no_longcalls
:
861 directive_state
[directive_longcalls
] = FALSE
;
863 case option_text_section_literals
:
864 use_literal_section
= FALSE
;
866 case option_no_text_section_literals
:
867 use_literal_section
= TRUE
;
869 case option_absolute_literals
:
870 if (!absolute_literals_supported
)
872 as_fatal (_("--absolute-literals option not supported in this Xtensa configuration"));
875 directive_state
[directive_absolute_literals
] = TRUE
;
877 case option_no_absolute_literals
:
878 directive_state
[directive_absolute_literals
] = FALSE
;
881 case option_workaround_a0_b_retw
:
882 workaround_a0_b_retw
= TRUE
;
884 case option_no_workaround_a0_b_retw
:
885 workaround_a0_b_retw
= FALSE
;
887 case option_workaround_b_j_loop_end
:
888 workaround_b_j_loop_end
= TRUE
;
890 case option_no_workaround_b_j_loop_end
:
891 workaround_b_j_loop_end
= FALSE
;
894 case option_workaround_short_loop
:
895 workaround_short_loop
= TRUE
;
897 case option_no_workaround_short_loop
:
898 workaround_short_loop
= FALSE
;
901 case option_workaround_all_short_loops
:
902 workaround_all_short_loops
= TRUE
;
904 case option_no_workaround_all_short_loops
:
905 workaround_all_short_loops
= FALSE
;
908 case option_workaround_close_loop_end
:
909 workaround_close_loop_end
= TRUE
;
911 case option_no_workaround_close_loop_end
:
912 workaround_close_loop_end
= FALSE
;
915 case option_no_workarounds
:
916 workaround_a0_b_retw
= FALSE
;
917 workaround_b_j_loop_end
= FALSE
;
918 workaround_short_loop
= FALSE
;
919 workaround_all_short_loops
= FALSE
;
920 workaround_close_loop_end
= FALSE
;
923 case option_align_targets
:
924 align_targets
= TRUE
;
926 case option_no_align_targets
:
927 align_targets
= FALSE
;
930 case option_warn_unaligned_targets
:
931 warn_unaligned_branch_targets
= TRUE
;
934 case option_rename_section_name
:
935 build_section_rename (arg
);
939 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
940 should be emitted or not. FIXME: Not implemented. */
943 case option_prefer_l32r
:
945 as_fatal (_("prefer-l32r conflicts with prefer-const16"));
949 case option_prefer_const16
:
951 as_fatal (_("prefer-const16 conflicts with prefer-l32r"));
955 case option_target_hardware
:
957 int earliest
, latest
= 0;
959 if (*arg
== 0 || *arg
== '-')
960 as_fatal (_("invalid target hardware version"));
962 earliest
= strtol (arg
, &end
, 0);
966 else if (*end
== '-')
969 as_fatal (_("invalid target hardware version"));
970 latest
= strtol (end
, &end
, 0);
973 as_fatal (_("invalid target hardware version"));
975 xtensa_setup_hw_workarounds (earliest
, latest
);
979 case option_transform
:
980 /* This option has no affect other than to use the defaults,
981 which are already set. */
984 case option_no_transform
:
985 /* This option turns off all transformations of any kind.
986 However, because we want to preserve the state of other
987 directives, we only change its own field. Thus, before
988 you perform any transformation, always check if transform
989 is available. If you use the functions we provide for this
990 purpose, you will be ok. */
991 directive_state
[directive_transform
] = FALSE
;
994 case option_trampolines
:
995 use_trampolines
= TRUE
;
998 case option_no_trampolines
:
999 use_trampolines
= FALSE
;
1002 case option_auto_litpools
:
1003 auto_litpools
= TRUE
;
1004 use_literal_section
= FALSE
;
1005 if (auto_litpool_limit
<= 0)
1006 auto_litpool_limit
= MAX_AUTO_POOL_LITERALS
/ 2;
1009 case option_no_auto_litpools
:
1010 auto_litpools
= FALSE
;
1011 auto_litpool_limit
= -1;
1014 case option_auto_litpool_limit
:
1018 if (auto_litpool_limit
< 0)
1019 as_fatal (_("no-auto-litpools is incompatible with auto-litpool-limit"));
1020 if (*arg
== 0 || *arg
== '-')
1021 as_fatal (_("invalid auto-litpool-limit argument"));
1022 value
= strtol (arg
, &end
, 10);
1024 as_fatal (_("invalid auto-litpool-limit argument"));
1025 if (value
< 100 || value
> 10000)
1026 as_fatal (_("invalid auto-litpool-limit argument (range is 100-10000)"));
1027 auto_litpool_limit
= value
;
1028 auto_litpools
= TRUE
;
1029 use_literal_section
= FALSE
;
1033 case option_separate_props
:
1034 elf32xtensa_separate_props
= TRUE
;
1037 case option_no_separate_props
:
1038 elf32xtensa_separate_props
= FALSE
;
1048 md_show_usage (FILE *stream
)
1052 --[no-]text-section-literals\n\
1053 [Do not] put literals in the text section\n\
1054 --[no-]absolute-literals\n\
1055 [Do not] default to use non-PC-relative literals\n\
1056 --[no-]target-align [Do not] try to align branch targets\n\
1057 --[no-]longcalls [Do not] emit 32-bit call sequences\n\
1058 --[no-]transform [Do not] transform instructions\n\
1059 --flix both allow hand-written and generate flix bundles\n\
1060 --no-generate-flix allow hand-written but do not generate\n\
1062 --no-allow-flix neither allow hand-written nor generate\n\
1064 --rename-section old=new Rename section 'old' to 'new'\n\
1065 --[no-]trampolines [Do not] generate trampolines (jumps to jumps)\n\
1066 when jumps do not reach their targets\n\
1067 --[no-]auto-litpools [Do not] automatically create literal pools\n\
1068 --auto-litpool-limit=<value>\n\
1069 (range 100-10000) Maximum number of blocks of\n\
1070 instructions to emit between literal pool\n\
1071 locations; implies --auto-litpools flag\n\
1072 --[no-]separate-prop-tables\n\
1073 [Do not] place Xtensa property records into\n\
1074 individual property sections for each section.\n\
1075 Default is to generate single property section.\n", stream
);
1079 /* Functions related to the list of current label symbols. */
1082 xtensa_add_insn_label (symbolS
*sym
)
1086 if (!free_insn_labels
)
1087 l
= XNEW (sym_list
);
1090 l
= free_insn_labels
;
1091 free_insn_labels
= l
->next
;
1095 l
->next
= insn_labels
;
1101 xtensa_clear_insn_labels (void)
1105 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
1113 xtensa_move_labels (fragS
*new_frag
, valueT new_offset
)
1117 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
1119 symbolS
*lit_sym
= lit
->sym
;
1120 S_SET_VALUE (lit_sym
, new_offset
);
1121 symbol_set_frag (lit_sym
, new_frag
);
1126 /* Directive data and functions. */
1128 typedef struct state_stackS_struct
1130 directiveE directive
;
1131 bfd_boolean negated
;
1132 bfd_boolean old_state
;
1136 struct state_stackS_struct
*prev
;
1139 state_stackS
*directive_state_stack
;
1141 const pseudo_typeS md_pseudo_table
[] =
1143 { "align", s_align_bytes
, 0 }, /* Defaulting is invalid (0). */
1144 { "literal_position", xtensa_literal_position
, 0 },
1145 { "frame", s_ignore
, 0 }, /* Formerly used for STABS debugging. */
1146 { "long", xtensa_elf_cons
, 4 },
1147 { "word", xtensa_elf_cons
, 4 },
1148 { "4byte", xtensa_elf_cons
, 4 },
1149 { "short", xtensa_elf_cons
, 2 },
1150 { "2byte", xtensa_elf_cons
, 2 },
1151 { "sleb128", xtensa_leb128
, 1},
1152 { "uleb128", xtensa_leb128
, 0},
1153 { "begin", xtensa_begin_directive
, 0 },
1154 { "end", xtensa_end_directive
, 0 },
1155 { "literal", xtensa_literal_pseudo
, 0 },
1156 { "frequency", xtensa_frequency_pseudo
, 0 },
1162 use_transform (void)
1164 /* After md_end, you should be checking frag by frag, rather
1165 than state directives. */
1166 gas_assert (!past_xtensa_end
);
1167 return directive_state
[directive_transform
];
1172 do_align_targets (void)
1174 /* Do not use this function after md_end; just look at align_targets
1175 instead. There is no target-align directive, so alignment is either
1176 enabled for all frags or not done at all. */
1177 gas_assert (!past_xtensa_end
);
1178 return align_targets
&& use_transform ();
1183 directive_push (directiveE directive
, bfd_boolean negated
, const void *datum
)
1187 state_stackS
*stack
= XNEW (state_stackS
);
1189 file
= as_where (&line
);
1191 stack
->directive
= directive
;
1192 stack
->negated
= negated
;
1193 stack
->old_state
= directive_state
[directive
];
1196 stack
->datum
= datum
;
1197 stack
->prev
= directive_state_stack
;
1198 directive_state_stack
= stack
;
1200 directive_state
[directive
] = !negated
;
1205 directive_pop (directiveE
*directive
,
1206 bfd_boolean
*negated
,
1211 state_stackS
*top
= directive_state_stack
;
1213 if (!directive_state_stack
)
1215 as_bad (_("unmatched .end directive"));
1216 *directive
= directive_none
;
1220 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1221 *directive
= top
->directive
;
1222 *negated
= top
->negated
;
1225 *datum
= top
->datum
;
1226 directive_state_stack
= top
->prev
;
1232 directive_balance (void)
1234 while (directive_state_stack
)
1236 directiveE directive
;
1237 bfd_boolean negated
;
1242 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1243 as_warn_where ((char *) file
, line
,
1244 _(".begin directive with no matching .end directive"));
1250 inside_directive (directiveE dir
)
1252 state_stackS
*top
= directive_state_stack
;
1254 while (top
&& top
->directive
!= dir
)
1257 return (top
!= NULL
);
1262 get_directive (directiveE
*directive
, bfd_boolean
*negated
)
1266 const char *directive_string
;
1268 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1273 input_line_pointer
+= 3;
1276 len
= strspn (input_line_pointer
,
1277 "abcdefghijklmnopqrstuvwxyz_-/0123456789.");
1279 /* This code is a hack to make .begin [no-][generics|relax] exactly
1280 equivalent to .begin [no-]transform. We should remove it when
1281 we stop accepting those options. */
1283 if (strncmp (input_line_pointer
, "generics", strlen ("generics")) == 0)
1285 as_warn (_("[no-]generics is deprecated; use [no-]transform instead"));
1286 directive_string
= "transform";
1288 else if (strncmp (input_line_pointer
, "relax", strlen ("relax")) == 0)
1290 as_warn (_("[no-]relax is deprecated; use [no-]transform instead"));
1291 directive_string
= "transform";
1294 directive_string
= input_line_pointer
;
1296 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1298 if (strncmp (directive_string
, directive_info
[i
].name
, len
) == 0)
1300 input_line_pointer
+= len
;
1301 *directive
= (directiveE
) i
;
1302 if (*negated
&& !directive_info
[i
].can_be_negated
)
1303 as_bad (_("directive %s cannot be negated"),
1304 directive_info
[i
].name
);
1309 as_bad (_("unknown directive"));
1310 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1315 xtensa_begin_directive (int ignore ATTRIBUTE_UNUSED
)
1317 directiveE directive
;
1318 bfd_boolean negated
;
1322 get_directive (&directive
, &negated
);
1323 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1325 discard_rest_of_line ();
1329 if (cur_vinsn
.inside_bundle
)
1330 as_bad (_("directives are not valid inside bundles"));
1334 case directive_literal
:
1335 if (!inside_directive (directive_literal
))
1337 /* Previous labels go with whatever follows this directive, not with
1338 the literal, so save them now. */
1339 saved_insn_labels
= insn_labels
;
1342 as_warn (_(".begin literal is deprecated; use .literal instead"));
1343 state
= XNEW (emit_state
);
1344 xtensa_switch_to_literal_fragment (state
);
1345 directive_push (directive_literal
, negated
, state
);
1348 case directive_literal_prefix
:
1349 /* Have to flush pending output because a movi relaxed to an l32r
1350 might produce a literal. */
1351 md_flush_pending_output ();
1352 /* Check to see if the current fragment is a literal
1353 fragment. If it is, then this operation is not allowed. */
1354 if (generating_literals
)
1356 as_bad (_("cannot set literal_prefix inside literal fragment"));
1360 /* Allocate the literal state for this section and push
1361 onto the directive stack. */
1362 ls
= XNEW (lit_state
);
1365 *ls
= default_lit_sections
;
1366 directive_push (directive_literal_prefix
, negated
, ls
);
1368 /* Process the new prefix. */
1369 xtensa_literal_prefix ();
1372 case directive_freeregs
:
1373 /* This information is currently unused, but we'll accept the statement
1374 and just discard the rest of the line. This won't check the syntax,
1375 but it will accept every correct freeregs directive. */
1376 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1377 directive_push (directive_freeregs
, negated
, 0);
1380 case directive_schedule
:
1381 md_flush_pending_output ();
1382 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
1383 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
1384 directive_push (directive_schedule
, negated
, 0);
1385 xtensa_set_frag_assembly_state (frag_now
);
1388 case directive_density
:
1389 as_warn (_(".begin [no-]density is ignored"));
1392 case directive_absolute_literals
:
1393 md_flush_pending_output ();
1394 if (!absolute_literals_supported
&& !negated
)
1396 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1399 xtensa_set_frag_assembly_state (frag_now
);
1400 directive_push (directive
, negated
, 0);
1404 md_flush_pending_output ();
1405 xtensa_set_frag_assembly_state (frag_now
);
1406 directive_push (directive
, negated
, 0);
1410 demand_empty_rest_of_line ();
1415 xtensa_end_directive (int ignore ATTRIBUTE_UNUSED
)
1417 directiveE begin_directive
, end_directive
;
1418 bfd_boolean begin_negated
, end_negated
;
1422 emit_state
**state_ptr
;
1425 if (cur_vinsn
.inside_bundle
)
1426 as_bad (_("directives are not valid inside bundles"));
1428 get_directive (&end_directive
, &end_negated
);
1430 md_flush_pending_output ();
1432 switch ((int) end_directive
)
1434 case XTENSA_UNDEFINED
:
1435 discard_rest_of_line ();
1438 case (int) directive_density
:
1439 as_warn (_(".end [no-]density is ignored"));
1440 demand_empty_rest_of_line ();
1443 case (int) directive_absolute_literals
:
1444 if (!absolute_literals_supported
&& !end_negated
)
1446 as_warn (_("Xtensa absolute literals option not supported; ignored"));
1447 demand_empty_rest_of_line ();
1456 state_ptr
= &state
; /* use state_ptr to avoid type-punning warning */
1457 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1458 (const void **) state_ptr
);
1460 if (begin_directive
!= directive_none
)
1462 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1464 as_bad (_("does not match begin %s%s at %s:%d"),
1465 begin_negated
? "no-" : "",
1466 directive_info
[begin_directive
].name
, file
, line
);
1470 switch (end_directive
)
1472 case directive_literal
:
1473 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1474 xtensa_restore_emit_state (state
);
1475 xtensa_set_frag_assembly_state (frag_now
);
1477 if (!inside_directive (directive_literal
))
1479 /* Restore the list of current labels. */
1480 xtensa_clear_insn_labels ();
1481 insn_labels
= saved_insn_labels
;
1485 case directive_literal_prefix
:
1486 /* Restore the default collection sections from saved state. */
1487 s
= (lit_state
*) state
;
1489 default_lit_sections
= *s
;
1491 /* Free the state storage. */
1492 free (s
->lit_prefix
);
1496 case directive_schedule
:
1497 case directive_freeregs
:
1501 xtensa_set_frag_assembly_state (frag_now
);
1507 demand_empty_rest_of_line ();
1511 /* Place an aligned literal fragment at the current location. */
1514 xtensa_literal_position (int ignore ATTRIBUTE_UNUSED
)
1516 md_flush_pending_output ();
1518 if (inside_directive (directive_literal
))
1519 as_warn (_(".literal_position inside literal directive; ignoring"));
1520 xtensa_mark_literal_pool_location ();
1522 demand_empty_rest_of_line ();
1523 xtensa_clear_insn_labels ();
1527 /* Support .literal label, expr, ... */
1530 xtensa_literal_pseudo (int ignored ATTRIBUTE_UNUSED
)
1533 char *p
, *base_name
;
1536 if (inside_directive (directive_literal
))
1538 as_bad (_(".literal not allowed inside .begin literal region"));
1539 ignore_rest_of_line ();
1543 md_flush_pending_output ();
1545 /* Previous labels go with whatever follows this directive, not with
1546 the literal, so save them now. */
1547 saved_insn_labels
= insn_labels
;
1550 base_name
= input_line_pointer
;
1552 xtensa_switch_to_literal_fragment (&state
);
1554 /* All literals are aligned to four-byte boundaries. */
1555 frag_align (2, 0, 0);
1556 record_alignment (now_seg
, 2);
1558 c
= get_symbol_name (&base_name
);
1559 /* Just after name is now '\0'. */
1560 p
= input_line_pointer
;
1562 SKIP_WHITESPACE_AFTER_NAME ();
1564 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1566 as_bad (_("expected comma or colon after symbol name; "
1567 "rest of line ignored"));
1568 ignore_rest_of_line ();
1569 xtensa_restore_emit_state (&state
);
1577 input_line_pointer
++; /* skip ',' or ':' */
1579 xtensa_elf_cons (4);
1581 xtensa_restore_emit_state (&state
);
1583 /* Restore the list of current labels. */
1584 xtensa_clear_insn_labels ();
1585 insn_labels
= saved_insn_labels
;
1590 xtensa_literal_prefix (void)
1595 /* Parse the new prefix from the input_line_pointer. */
1597 len
= strspn (input_line_pointer
,
1598 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1599 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1601 /* Get a null-terminated copy of the name. */
1602 name
= xmemdup0 (input_line_pointer
, len
);
1604 /* Skip the name in the input line. */
1605 input_line_pointer
+= len
;
1607 default_lit_sections
.lit_prefix
= name
;
1609 /* Clear cached literal sections, since the prefix has changed. */
1610 default_lit_sections
.lit_seg
= NULL
;
1611 default_lit_sections
.lit4_seg
= NULL
;
1615 /* Support ".frequency branch_target_frequency fall_through_frequency". */
1618 xtensa_frequency_pseudo (int ignored ATTRIBUTE_UNUSED
)
1620 float fall_through_f
, target_f
;
1622 fall_through_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1623 if (fall_through_f
< 0)
1625 as_bad (_("fall through frequency must be greater than 0"));
1626 ignore_rest_of_line ();
1630 target_f
= (float) strtod (input_line_pointer
, &input_line_pointer
);
1633 as_bad (_("branch target frequency must be greater than 0"));
1634 ignore_rest_of_line ();
1638 set_subseg_freq (now_seg
, now_subseg
, target_f
+ fall_through_f
, target_f
);
1640 demand_empty_rest_of_line ();
1644 /* Like normal .long/.short/.word, except support @plt, etc.
1645 Clobbers input_line_pointer, checks end-of-line. */
1648 xtensa_elf_cons (int nbytes
)
1651 bfd_reloc_code_real_type reloc
;
1653 md_flush_pending_output ();
1655 if (cur_vinsn
.inside_bundle
)
1656 as_bad (_("directives are not valid inside bundles"));
1658 if (is_it_end_of_statement ())
1660 demand_empty_rest_of_line ();
1667 if (exp
.X_op
== O_symbol
1668 && *input_line_pointer
== '@'
1669 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, &exp
))
1672 reloc_howto_type
*reloc_howto
=
1673 bfd_reloc_type_lookup (stdoutput
, reloc
);
1675 if (reloc
== BFD_RELOC_UNUSED
|| !reloc_howto
)
1676 as_bad (_("unsupported relocation"));
1677 else if ((reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
1678 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
1679 || (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
1680 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
))
1681 as_bad (_("opcode-specific %s relocation used outside "
1682 "an instruction"), reloc_howto
->name
);
1683 else if (nbytes
!= (int) bfd_get_reloc_size (reloc_howto
))
1684 as_bad (ngettext ("%s relocations do not fit in %d byte",
1685 "%s relocations do not fit in %d bytes",
1687 reloc_howto
->name
, nbytes
);
1688 else if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
1689 || reloc
== BFD_RELOC_XTENSA_TLS_ARG
1690 || reloc
== BFD_RELOC_XTENSA_TLS_CALL
)
1691 as_bad (_("invalid use of %s relocation"), reloc_howto
->name
);
1694 char *p
= frag_more ((int) nbytes
);
1695 xtensa_set_frag_assembly_state (frag_now
);
1696 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
1697 nbytes
, &exp
, reloc_howto
->pc_relative
, reloc
);
1702 xtensa_set_frag_assembly_state (frag_now
);
1703 emit_expr (&exp
, (unsigned int) nbytes
);
1706 while (*input_line_pointer
++ == ',');
1708 input_line_pointer
--; /* Put terminator back into stream. */
1709 demand_empty_rest_of_line ();
1712 static bfd_boolean is_leb128_expr
;
1715 xtensa_leb128 (int sign
)
1717 is_leb128_expr
= TRUE
;
1719 is_leb128_expr
= FALSE
;
1723 /* Parsing and Idiom Translation. */
1725 /* Parse @plt, etc. and return the desired relocation. */
1726 static bfd_reloc_code_real_type
1727 xtensa_elf_suffix (char **str_p
, expressionS
*exp_p
)
1737 return BFD_RELOC_NONE
;
1739 for (ch
= *str
, str2
= ident
;
1740 (str2
< ident
+ sizeof (ident
) - 1
1741 && (ISALNUM (ch
) || ch
== '@'));
1744 *str2
++ = (ISLOWER (ch
)) ? ch
: TOLOWER (ch
);
1751 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1752 if (ch
== suffix_relocs
[i
].suffix
[0]
1753 && len
== suffix_relocs
[i
].length
1754 && memcmp (ident
, suffix_relocs
[i
].suffix
, suffix_relocs
[i
].length
) == 0)
1756 /* Now check for "identifier@suffix+constant". */
1757 if (*str
== '-' || *str
== '+')
1759 char *orig_line
= input_line_pointer
;
1760 expressionS new_exp
;
1762 input_line_pointer
= str
;
1763 expression (&new_exp
);
1764 if (new_exp
.X_op
== O_constant
)
1766 exp_p
->X_add_number
+= new_exp
.X_add_number
;
1767 str
= input_line_pointer
;
1770 if (&input_line_pointer
!= str_p
)
1771 input_line_pointer
= orig_line
;
1775 return suffix_relocs
[i
].reloc
;
1778 return BFD_RELOC_UNUSED
;
1782 /* Find the matching operator type. */
1784 map_suffix_reloc_to_operator (bfd_reloc_code_real_type reloc
)
1786 operatorT
operator = O_illegal
;
1789 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1791 if (suffix_relocs
[i
].reloc
== reloc
)
1793 operator = suffix_relocs
[i
].operator;
1797 gas_assert (operator != O_illegal
);
1802 /* Find the matching reloc type. */
1803 static bfd_reloc_code_real_type
1804 map_operator_to_reloc (unsigned char operator, bfd_boolean is_literal
)
1807 bfd_reloc_code_real_type reloc
= BFD_RELOC_UNUSED
;
1809 for (i
= 0; i
< ARRAY_SIZE (suffix_relocs
); i
++)
1811 if (suffix_relocs
[i
].operator == operator)
1813 reloc
= suffix_relocs
[i
].reloc
;
1820 if (reloc
== BFD_RELOC_XTENSA_TLS_FUNC
)
1821 return BFD_RELOC_XTENSA_TLSDESC_FN
;
1822 else if (reloc
== BFD_RELOC_XTENSA_TLS_ARG
)
1823 return BFD_RELOC_XTENSA_TLSDESC_ARG
;
1826 if (reloc
== BFD_RELOC_UNUSED
)
1827 return BFD_RELOC_32
;
1834 expression_end (const char *name
)
1857 #define ERROR_REG_NUM ((unsigned) -1)
1860 tc_get_register (const char *prefix
)
1863 const char *next_expr
;
1864 const char *old_line_pointer
;
1867 old_line_pointer
= input_line_pointer
;
1869 if (*input_line_pointer
== '$')
1870 ++input_line_pointer
;
1872 /* Accept "sp" as a synonym for "a1". */
1873 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1874 && expression_end (input_line_pointer
+ 2))
1876 input_line_pointer
+= 2;
1877 return 1; /* AR[1] */
1880 while (*input_line_pointer
++ == *prefix
++)
1882 --input_line_pointer
;
1887 as_bad (_("bad register name: %s"), old_line_pointer
);
1888 return ERROR_REG_NUM
;
1891 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1893 as_bad (_("bad register number: %s"), input_line_pointer
);
1894 return ERROR_REG_NUM
;
1899 while (ISDIGIT ((int) *input_line_pointer
))
1900 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1902 if (!(next_expr
= expression_end (input_line_pointer
)))
1904 as_bad (_("bad register name: %s"), old_line_pointer
);
1905 return ERROR_REG_NUM
;
1908 input_line_pointer
= (char *) next_expr
;
1915 expression_maybe_register (xtensa_opcode opc
, int opnd
, expressionS
*tok
)
1917 xtensa_isa isa
= xtensa_default_isa
;
1919 /* Check if this is an immediate operand. */
1920 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 0)
1922 bfd_reloc_code_real_type reloc
;
1923 segT t
= expression (tok
);
1925 if (t
== absolute_section
1926 && xtensa_operand_is_PCrelative (isa
, opc
, opnd
) == 1)
1928 gas_assert (tok
->X_op
== O_constant
);
1929 tok
->X_op
= O_symbol
;
1930 tok
->X_add_symbol
= &abs_symbol
;
1933 if ((tok
->X_op
== O_constant
|| tok
->X_op
== O_symbol
)
1934 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
1939 case BFD_RELOC_LO16
:
1940 if (tok
->X_op
== O_constant
)
1942 tok
->X_add_number
&= 0xffff;
1946 case BFD_RELOC_HI16
:
1947 if (tok
->X_op
== O_constant
)
1949 tok
->X_add_number
= ((unsigned) tok
->X_add_number
) >> 16;
1953 case BFD_RELOC_UNUSED
:
1954 as_bad (_("unsupported relocation"));
1956 case BFD_RELOC_32_PCREL
:
1957 as_bad (_("pcrel relocation not allowed in an instruction"));
1962 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
1967 xtensa_regfile opnd_rf
= xtensa_operand_regfile (isa
, opc
, opnd
);
1968 unsigned reg
= tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
));
1970 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1973 if (xtensa_operand_encode (isa
, opc
, opnd
, &buf
))
1974 as_bad (_("register number out of range"));
1977 tok
->X_op
= O_register
;
1978 tok
->X_add_symbol
= 0;
1979 tok
->X_add_number
= reg
;
1984 /* Split up the arguments for an opcode or pseudo-op. */
1987 tokenize_arguments (char **args
, char *str
)
1989 char *old_input_line_pointer
;
1990 bfd_boolean saw_comma
= FALSE
;
1991 bfd_boolean saw_arg
= FALSE
;
1992 bfd_boolean saw_colon
= FALSE
;
1994 char *arg_end
, *arg
;
1997 /* Save and restore input_line_pointer around this function. */
1998 old_input_line_pointer
= input_line_pointer
;
1999 input_line_pointer
= str
;
2001 while (*input_line_pointer
)
2004 switch (*input_line_pointer
)
2011 input_line_pointer
++;
2012 if (saw_comma
|| saw_colon
|| !saw_arg
)
2018 input_line_pointer
++;
2019 if (saw_comma
|| saw_colon
|| !saw_arg
)
2025 if (!saw_comma
&& !saw_colon
&& saw_arg
)
2028 arg_end
= input_line_pointer
+ 1;
2029 while (!expression_end (arg_end
))
2032 arg_len
= arg_end
- input_line_pointer
;
2033 arg
= XNEWVEC (char, (saw_colon
? 1 : 0) + arg_len
+ 1);
2034 args
[num_args
] = arg
;
2038 strncpy (arg
, input_line_pointer
, arg_len
);
2039 arg
[arg_len
] = '\0';
2041 input_line_pointer
= arg_end
;
2051 if (saw_comma
|| saw_colon
)
2053 input_line_pointer
= old_input_line_pointer
;
2058 as_bad (_("extra comma"));
2060 as_bad (_("extra colon"));
2062 as_bad (_("missing argument"));
2064 as_bad (_("missing comma or colon"));
2065 input_line_pointer
= old_input_line_pointer
;
2070 /* Parse the arguments to an opcode. Return TRUE on error. */
2073 parse_arguments (TInsn
*insn
, int num_args
, char **arg_strings
)
2075 expressionS
*tok
, *last_tok
;
2076 xtensa_opcode opcode
= insn
->opcode
;
2077 bfd_boolean had_error
= TRUE
;
2078 xtensa_isa isa
= xtensa_default_isa
;
2079 int n
, num_regs
= 0;
2080 int opcode_operand_count
;
2081 int opnd_cnt
, last_opnd_cnt
;
2082 unsigned int next_reg
= 0;
2083 char *old_input_line_pointer
;
2085 if (insn
->insn_type
== ITYPE_LITERAL
)
2086 opcode_operand_count
= 1;
2088 opcode_operand_count
= xtensa_opcode_num_operands (isa
, opcode
);
2091 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
2093 /* Save and restore input_line_pointer around this function. */
2094 old_input_line_pointer
= input_line_pointer
;
2100 /* Skip invisible operands. */
2101 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0)
2107 for (n
= 0; n
< num_args
; n
++)
2109 input_line_pointer
= arg_strings
[n
];
2110 if (*input_line_pointer
== ':')
2112 xtensa_regfile opnd_rf
;
2113 input_line_pointer
++;
2116 gas_assert (opnd_cnt
> 0);
2118 opnd_rf
= xtensa_operand_regfile (isa
, opcode
, last_opnd_cnt
);
2120 != tc_get_register (xtensa_regfile_shortname (isa
, opnd_rf
)))
2121 as_warn (_("incorrect register number, ignoring"));
2126 if (opnd_cnt
>= opcode_operand_count
)
2128 as_warn (_("too many arguments"));
2131 gas_assert (opnd_cnt
< MAX_INSN_ARGS
);
2133 expression_maybe_register (opcode
, opnd_cnt
, tok
);
2134 next_reg
= tok
->X_add_number
+ 1;
2136 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
2138 if (xtensa_operand_is_register (isa
, opcode
, opnd_cnt
) == 1)
2140 num_regs
= xtensa_operand_num_regs (isa
, opcode
, opnd_cnt
) - 1;
2141 /* minus 1 because we are seeing one right now */
2147 last_opnd_cnt
= opnd_cnt
;
2148 demand_empty_rest_of_line ();
2155 while (xtensa_operand_is_visible (isa
, opcode
, opnd_cnt
) == 0);
2159 if (num_regs
> 0 && ((int) next_reg
!= last_tok
->X_add_number
+ 1))
2162 insn
->ntok
= tok
- insn
->tok
;
2166 input_line_pointer
= old_input_line_pointer
;
2172 get_invisible_operands (TInsn
*insn
)
2174 xtensa_isa isa
= xtensa_default_isa
;
2175 static xtensa_insnbuf slotbuf
= NULL
;
2177 xtensa_opcode opc
= insn
->opcode
;
2178 int slot
, opnd
, fmt_found
;
2182 slotbuf
= xtensa_insnbuf_alloc (isa
);
2184 /* Find format/slot where this can be encoded. */
2187 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
2189 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
2191 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opc
) == 0)
2197 if (fmt_found
) break;
2202 as_bad (_("cannot encode opcode \"%s\""), xtensa_opcode_name (isa
, opc
));
2206 /* First encode all the visible operands
2207 (to deal with shared field operands). */
2208 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2210 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 1
2211 && (insn
->tok
[opnd
].X_op
== O_register
2212 || insn
->tok
[opnd
].X_op
== O_constant
))
2214 val
= insn
->tok
[opnd
].X_add_number
;
2215 xtensa_operand_encode (isa
, opc
, opnd
, &val
);
2216 xtensa_operand_set_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, val
);
2220 /* Then pull out the values for the invisible ones. */
2221 for (opnd
= 0; opnd
< insn
->ntok
; opnd
++)
2223 if (xtensa_operand_is_visible (isa
, opc
, opnd
) == 0)
2225 xtensa_operand_get_field (isa
, opc
, opnd
, fmt
, slot
, slotbuf
, &val
);
2226 xtensa_operand_decode (isa
, opc
, opnd
, &val
);
2227 insn
->tok
[opnd
].X_add_number
= val
;
2228 if (xtensa_operand_is_register (isa
, opc
, opnd
) == 1)
2229 insn
->tok
[opnd
].X_op
= O_register
;
2231 insn
->tok
[opnd
].X_op
= O_constant
;
2240 xg_reverse_shift_count (char **cnt_argp
)
2242 char *cnt_arg
, *new_arg
;
2243 cnt_arg
= *cnt_argp
;
2245 /* replace the argument with "31-(argument)" */
2246 new_arg
= concat ("31-(", cnt_arg
, ")", (char *) NULL
);
2249 *cnt_argp
= new_arg
;
2253 /* If "arg" is a constant expression, return non-zero with the value
2257 xg_arg_is_constant (char *arg
, offsetT
*valp
)
2260 char *save_ptr
= input_line_pointer
;
2262 input_line_pointer
= arg
;
2264 input_line_pointer
= save_ptr
;
2266 if (exp
.X_op
== O_constant
)
2268 *valp
= exp
.X_add_number
;
2277 xg_replace_opname (char **popname
, const char *newop
)
2280 *popname
= xstrdup (newop
);
2285 xg_check_num_args (int *pnum_args
,
2290 int num_args
= *pnum_args
;
2292 if (num_args
< expected_num
)
2294 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
2295 num_args
, opname
, expected_num
);
2299 if (num_args
> expected_num
)
2301 as_warn (_("too many operands (%d) for '%s'; expected %d"),
2302 num_args
, opname
, expected_num
);
2303 while (num_args
-- > expected_num
)
2305 free (arg_strings
[num_args
]);
2306 arg_strings
[num_args
] = 0;
2308 *pnum_args
= expected_num
;
2316 /* If the register is not specified as part of the opcode,
2317 then get it from the operand and move it to the opcode. */
2320 xg_translate_sysreg_op (char **popname
, int *pnum_args
, char **arg_strings
)
2322 xtensa_isa isa
= xtensa_default_isa
;
2324 char *opname
, *new_opname
;
2325 const char *sr_name
;
2326 int is_user
, is_write
;
2331 is_user
= (opname
[1] == 'u');
2332 is_write
= (opname
[0] == 'w');
2334 /* Opname == [rw]ur or [rwx]sr... */
2336 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2339 /* Check if the argument is a symbolic register name. */
2340 sr
= xtensa_sysreg_lookup_name (isa
, arg_strings
[1]);
2341 /* Handle WSR to "INTSET" as a special case. */
2342 if (sr
== XTENSA_UNDEFINED
&& is_write
&& !is_user
2343 && !strcasecmp (arg_strings
[1], "intset"))
2344 sr
= xtensa_sysreg_lookup_name (isa
, "interrupt");
2345 if (sr
== XTENSA_UNDEFINED
2346 || (xtensa_sysreg_is_user (isa
, sr
) == 1) != is_user
)
2348 /* Maybe it's a register number.... */
2350 if (!xg_arg_is_constant (arg_strings
[1], &val
))
2352 as_bad (_("invalid register '%s' for '%s' instruction"),
2353 arg_strings
[1], opname
);
2356 sr
= xtensa_sysreg_lookup (isa
, val
, is_user
);
2357 if (sr
== XTENSA_UNDEFINED
)
2359 as_bad (_("invalid register number (%ld) for '%s' instruction"),
2360 (long) val
, opname
);
2365 /* Remove the last argument, which is now part of the opcode. */
2366 free (arg_strings
[1]);
2370 /* Translate the opcode. */
2371 sr_name
= xtensa_sysreg_name (isa
, sr
);
2372 /* Another special case for "WSR.INTSET".... */
2373 if (is_write
&& !is_user
&& !strcasecmp ("interrupt", sr_name
))
2375 new_opname
= concat (*popname
, ".", sr_name
, (char *) NULL
);
2377 *popname
= new_opname
;
2384 xtensa_translate_old_userreg_ops (char **popname
)
2386 xtensa_isa isa
= xtensa_default_isa
;
2388 char *opname
, *new_opname
;
2389 const char *sr_name
;
2390 bfd_boolean has_underbar
= FALSE
;
2393 if (opname
[0] == '_')
2395 has_underbar
= TRUE
;
2399 sr
= xtensa_sysreg_lookup_name (isa
, opname
+ 1);
2400 if (sr
!= XTENSA_UNDEFINED
)
2402 /* The new default name ("nnn") is different from the old default
2403 name ("URnnn"). The old default is handled below, and we don't
2404 want to recognize [RW]nnn, so do nothing if the name is the (new)
2406 static char namebuf
[10];
2407 sprintf (namebuf
, "%d", xtensa_sysreg_number (isa
, sr
));
2408 if (strcmp (namebuf
, opname
+ 1) == 0)
2416 /* Only continue if the reg name is "URnnn". */
2417 if (opname
[1] != 'u' || opname
[2] != 'r')
2419 val
= strtoul (opname
+ 3, &end
, 10);
2423 sr
= xtensa_sysreg_lookup (isa
, val
, 1);
2424 if (sr
== XTENSA_UNDEFINED
)
2426 as_bad (_("invalid register number (%ld) for '%s'"),
2427 (long) val
, opname
);
2432 /* Translate the opcode. */
2433 sr_name
= xtensa_sysreg_name (isa
, sr
);
2434 new_opname
= XNEWVEC (char, strlen (sr_name
) + 6);
2435 sprintf (new_opname
, "%s%cur.%s", (has_underbar
? "_" : ""),
2436 opname
[0], sr_name
);
2438 *popname
= new_opname
;
2445 xtensa_translate_zero_immed (const char *old_op
,
2455 gas_assert (opname
[0] != '_');
2457 if (strcmp (opname
, old_op
) != 0)
2460 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2462 if (xg_arg_is_constant (arg_strings
[1], &val
) && val
== 0)
2464 xg_replace_opname (popname
, new_op
);
2465 free (arg_strings
[1]);
2466 arg_strings
[1] = arg_strings
[2];
2475 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
2476 Returns non-zero if an error was found. */
2479 xg_translate_idioms (char **popname
, int *pnum_args
, char **arg_strings
)
2481 char *opname
= *popname
;
2482 bfd_boolean has_underbar
= FALSE
;
2486 has_underbar
= TRUE
;
2490 if (strcmp (opname
, "mov") == 0)
2492 if (use_transform () && !has_underbar
&& density_supported
)
2493 xg_replace_opname (popname
, "mov.n");
2496 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2498 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2499 arg_strings
[2] = xstrdup (arg_strings
[1]);
2505 if (strcmp (opname
, "bbsi.l") == 0)
2507 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2509 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2510 if (target_big_endian
)
2511 xg_reverse_shift_count (&arg_strings
[1]);
2515 if (strcmp (opname
, "bbci.l") == 0)
2517 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2519 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2520 if (target_big_endian
)
2521 xg_reverse_shift_count (&arg_strings
[1]);
2525 /* Don't do anything special with NOPs inside FLIX instructions. They
2526 are handled elsewhere. Real NOP instructions are always available
2527 in configurations with FLIX, so this should never be an issue but
2528 check for it anyway. */
2529 if (!cur_vinsn
.inside_bundle
&& xtensa_nop_opcode
== XTENSA_UNDEFINED
2530 && strcmp (opname
, "nop") == 0)
2532 if (use_transform () && !has_underbar
&& density_supported
)
2533 xg_replace_opname (popname
, "nop.n");
2536 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2538 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2539 arg_strings
[0] = xstrdup ("a1");
2540 arg_strings
[1] = xstrdup ("a1");
2541 arg_strings
[2] = xstrdup ("a1");
2547 /* Recognize [RW]UR and [RWX]SR. */
2548 if ((((opname
[0] == 'r' || opname
[0] == 'w')
2549 && (opname
[1] == 'u' || opname
[1] == 's'))
2550 || (opname
[0] == 'x' && opname
[1] == 's'))
2552 && opname
[3] == '\0')
2553 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2555 /* Backward compatibility for RUR and WUR: Recognize [RW]UR<nnn> and
2556 [RW]<name> if <name> is the non-default name of a user register. */
2557 if ((opname
[0] == 'r' || opname
[0] == 'w')
2558 && xtensa_opcode_lookup (xtensa_default_isa
, opname
) == XTENSA_UNDEFINED
)
2559 return xtensa_translate_old_userreg_ops (popname
);
2561 /* Relax branches that don't allow comparisons against an immediate value
2562 of zero to the corresponding branches with implicit zero immediates. */
2563 if (!has_underbar
&& use_transform ())
2565 if (xtensa_translate_zero_immed ("bnei", "bnez", popname
,
2566 pnum_args
, arg_strings
))
2569 if (xtensa_translate_zero_immed ("beqi", "beqz", popname
,
2570 pnum_args
, arg_strings
))
2573 if (xtensa_translate_zero_immed ("bgei", "bgez", popname
,
2574 pnum_args
, arg_strings
))
2577 if (xtensa_translate_zero_immed ("blti", "bltz", popname
,
2578 pnum_args
, arg_strings
))
2586 /* Functions for dealing with the Xtensa ISA. */
2588 /* Currently the assembler only allows us to use a single target per
2589 fragment. Because of this, only one operand for a given
2590 instruction may be symbolic. If there is a PC-relative operand,
2591 the last one is chosen. Otherwise, the result is the number of the
2592 last immediate operand, and if there are none of those, we fail and
2596 get_relaxable_immed (xtensa_opcode opcode
)
2598 int last_immed
= -1;
2601 if (opcode
== XTENSA_UNDEFINED
)
2604 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
, opcode
);
2605 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2607 if (xtensa_operand_is_visible (xtensa_default_isa
, opcode
, opi
) == 0)
2609 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, opi
) == 1)
2611 if (last_immed
== -1
2612 && xtensa_operand_is_register (xtensa_default_isa
, opcode
, opi
) == 0)
2619 static xtensa_opcode
2620 get_opcode_from_buf (const char *buf
, int slot
)
2622 static xtensa_insnbuf insnbuf
= NULL
;
2623 static xtensa_insnbuf slotbuf
= NULL
;
2624 xtensa_isa isa
= xtensa_default_isa
;
2629 insnbuf
= xtensa_insnbuf_alloc (isa
);
2630 slotbuf
= xtensa_insnbuf_alloc (isa
);
2633 xtensa_insnbuf_from_chars (isa
, insnbuf
, (const unsigned char *) buf
, 0);
2634 fmt
= xtensa_format_decode (isa
, insnbuf
);
2635 if (fmt
== XTENSA_UNDEFINED
)
2636 return XTENSA_UNDEFINED
;
2638 if (slot
>= xtensa_format_num_slots (isa
, fmt
))
2639 return XTENSA_UNDEFINED
;
2641 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
2642 return xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
2646 #ifdef TENSILICA_DEBUG
2648 /* For debugging, print out the mapping of opcode numbers to opcodes. */
2651 xtensa_print_insn_table (void)
2653 int num_opcodes
, num_operands
;
2654 xtensa_opcode opcode
;
2655 xtensa_isa isa
= xtensa_default_isa
;
2657 num_opcodes
= xtensa_isa_num_opcodes (xtensa_default_isa
);
2658 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
2661 fprintf (stderr
, "%d: %s: ", opcode
, xtensa_opcode_name (isa
, opcode
));
2662 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2663 for (opn
= 0; opn
< num_operands
; opn
++)
2665 if (xtensa_operand_is_visible (isa
, opcode
, opn
) == 0)
2667 if (xtensa_operand_is_register (isa
, opcode
, opn
) == 1)
2669 xtensa_regfile opnd_rf
=
2670 xtensa_operand_regfile (isa
, opcode
, opn
);
2671 fprintf (stderr
, "%s ", xtensa_regfile_shortname (isa
, opnd_rf
));
2673 else if (xtensa_operand_is_PCrelative (isa
, opcode
, opn
) == 1)
2674 fputs ("[lLr] ", stderr
);
2676 fputs ("i ", stderr
);
2678 fprintf (stderr
, "\n");
2684 print_vliw_insn (xtensa_insnbuf vbuf
)
2686 xtensa_isa isa
= xtensa_default_isa
;
2687 xtensa_format f
= xtensa_format_decode (isa
, vbuf
);
2688 xtensa_insnbuf sbuf
= xtensa_insnbuf_alloc (isa
);
2691 fprintf (stderr
, "format = %d\n", f
);
2693 for (op
= 0; op
< xtensa_format_num_slots (isa
, f
); op
++)
2695 xtensa_opcode opcode
;
2699 xtensa_format_get_slot (isa
, f
, op
, vbuf
, sbuf
);
2700 opcode
= xtensa_opcode_decode (isa
, f
, op
, sbuf
);
2701 opname
= xtensa_opcode_name (isa
, opcode
);
2703 fprintf (stderr
, "op in slot %i is %s;\n", op
, opname
);
2704 fprintf (stderr
, " operands = ");
2706 operands
< xtensa_opcode_num_operands (isa
, opcode
);
2710 if (xtensa_operand_is_visible (isa
, opcode
, operands
) == 0)
2712 xtensa_operand_get_field (isa
, opcode
, operands
, f
, op
, sbuf
, &val
);
2713 xtensa_operand_decode (isa
, opcode
, operands
, &val
);
2714 fprintf (stderr
, "%d ", val
);
2716 fprintf (stderr
, "\n");
2718 xtensa_insnbuf_free (isa
, sbuf
);
2721 #endif /* TENSILICA_DEBUG */
2725 is_direct_call_opcode (xtensa_opcode opcode
)
2727 xtensa_isa isa
= xtensa_default_isa
;
2728 int n
, num_operands
;
2730 if (xtensa_opcode_is_call (isa
, opcode
) != 1)
2733 num_operands
= xtensa_opcode_num_operands (isa
, opcode
);
2734 for (n
= 0; n
< num_operands
; n
++)
2736 if (xtensa_operand_is_register (isa
, opcode
, n
) == 0
2737 && xtensa_operand_is_PCrelative (isa
, opcode
, n
) == 1)
2744 /* Convert from BFD relocation type code to slot and operand number.
2745 Returns non-zero on failure. */
2748 decode_reloc (bfd_reloc_code_real_type reloc
, int *slot
, bfd_boolean
*is_alt
)
2750 if (reloc
>= BFD_RELOC_XTENSA_SLOT0_OP
2751 && reloc
<= BFD_RELOC_XTENSA_SLOT14_OP
)
2753 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_OP
;
2756 else if (reloc
>= BFD_RELOC_XTENSA_SLOT0_ALT
2757 && reloc
<= BFD_RELOC_XTENSA_SLOT14_ALT
)
2759 *slot
= reloc
- BFD_RELOC_XTENSA_SLOT0_ALT
;
2769 /* Convert from slot number to BFD relocation type code for the
2770 standard PC-relative relocations. Return BFD_RELOC_NONE on
2773 static bfd_reloc_code_real_type
2774 encode_reloc (int slot
)
2776 if (slot
< 0 || slot
> 14)
2777 return BFD_RELOC_NONE
;
2779 return BFD_RELOC_XTENSA_SLOT0_OP
+ slot
;
2783 /* Convert from slot numbers to BFD relocation type code for the
2784 "alternate" relocations. Return BFD_RELOC_NONE on failure. */
2786 static bfd_reloc_code_real_type
2787 encode_alt_reloc (int slot
)
2789 if (slot
< 0 || slot
> 14)
2790 return BFD_RELOC_NONE
;
2792 return BFD_RELOC_XTENSA_SLOT0_ALT
+ slot
;
2797 xtensa_insnbuf_set_operand (xtensa_insnbuf slotbuf
,
2800 xtensa_opcode opcode
,
2806 uint32 valbuf
= value
;
2808 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
2810 if (xtensa_operand_is_PCrelative (xtensa_default_isa
, opcode
, operand
)
2812 as_bad_where ((char *) file
, line
,
2813 _("operand %d of '%s' has out of range value '%u'"),
2815 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2818 as_bad_where ((char *) file
, line
,
2819 _("operand %d of '%s' has invalid value '%u'"),
2821 xtensa_opcode_name (xtensa_default_isa
, opcode
),
2826 xtensa_operand_set_field (xtensa_default_isa
, opcode
, operand
, fmt
, slot
,
2832 xtensa_insnbuf_get_operand (xtensa_insnbuf slotbuf
,
2835 xtensa_opcode opcode
,
2839 (void) xtensa_operand_get_field (xtensa_default_isa
, opcode
, opnum
,
2840 fmt
, slot
, slotbuf
, &val
);
2841 (void) xtensa_operand_decode (xtensa_default_isa
, opcode
, opnum
, &val
);
2846 /* Checks for rules from xtensa-relax tables. */
2848 /* The routine xg_instruction_matches_option_term must return TRUE
2849 when a given option term is true. The meaning of all of the option
2850 terms is given interpretation by this function. */
2853 xg_instruction_matches_option_term (TInsn
*insn
, const ReqOrOption
*option
)
2855 if (strcmp (option
->option_name
, "realnop") == 0
2856 || strncmp (option
->option_name
, "IsaUse", 6) == 0)
2858 /* These conditions were evaluated statically when building the
2859 relaxation table. There's no need to reevaluate them now. */
2862 else if (strcmp (option
->option_name
, "FREEREG") == 0)
2863 return insn
->extra_arg
.X_op
== O_register
;
2866 as_fatal (_("internal error: unknown option name '%s'"),
2867 option
->option_name
);
2873 xg_instruction_matches_or_options (TInsn
*insn
,
2874 const ReqOrOptionList
*or_option
)
2876 const ReqOrOption
*option
;
2877 /* Must match each of the AND terms. */
2878 for (option
= or_option
; option
!= NULL
; option
= option
->next
)
2880 if (xg_instruction_matches_option_term (insn
, option
))
2888 xg_instruction_matches_options (TInsn
*insn
, const ReqOptionList
*options
)
2890 const ReqOption
*req_options
;
2891 /* Must match each of the AND terms. */
2892 for (req_options
= options
;
2893 req_options
!= NULL
;
2894 req_options
= req_options
->next
)
2896 /* Must match one of the OR clauses. */
2897 if (!xg_instruction_matches_or_options (insn
,
2898 req_options
->or_option_terms
))
2905 /* Return the transition rule that matches or NULL if none matches. */
2908 xg_instruction_matches_rule (TInsn
*insn
, TransitionRule
*rule
)
2910 PreconditionList
*condition_l
;
2912 if (rule
->opcode
!= insn
->opcode
)
2915 for (condition_l
= rule
->conditions
;
2916 condition_l
!= NULL
;
2917 condition_l
= condition_l
->next
)
2921 Precondition
*cond
= condition_l
->precond
;
2926 /* The expression must be the constant. */
2927 gas_assert (cond
->op_num
< insn
->ntok
);
2928 exp1
= &insn
->tok
[cond
->op_num
];
2929 if (expr_is_const (exp1
))
2934 if (get_expr_const (exp1
) != cond
->op_data
)
2938 if (get_expr_const (exp1
) == cond
->op_data
)
2945 else if (expr_is_register (exp1
))
2950 if (get_expr_register (exp1
) != cond
->op_data
)
2954 if (get_expr_register (exp1
) == cond
->op_data
)
2966 gas_assert (cond
->op_num
< insn
->ntok
);
2967 gas_assert (cond
->op_data
< insn
->ntok
);
2968 exp1
= &insn
->tok
[cond
->op_num
];
2969 exp2
= &insn
->tok
[cond
->op_data
];
2974 if (!expr_is_equal (exp1
, exp2
))
2978 if (expr_is_equal (exp1
, exp2
))
2990 if (!xg_instruction_matches_options (insn
, rule
->options
))
2998 transition_rule_cmp (const TransitionRule
*a
, const TransitionRule
*b
)
3000 bfd_boolean a_greater
= FALSE
;
3001 bfd_boolean b_greater
= FALSE
;
3003 ReqOptionList
*l_a
= a
->options
;
3004 ReqOptionList
*l_b
= b
->options
;
3006 /* We only care if they both are the same except for
3007 a const16 vs. an l32r. */
3009 while (l_a
&& l_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3011 ReqOrOptionList
*l_or_a
= l_a
->or_option_terms
;
3012 ReqOrOptionList
*l_or_b
= l_b
->or_option_terms
;
3013 while (l_or_a
&& l_or_b
&& ((l_a
->next
== NULL
) == (l_b
->next
== NULL
)))
3015 if (l_or_a
->is_true
!= l_or_b
->is_true
)
3017 if (strcmp (l_or_a
->option_name
, l_or_b
->option_name
) != 0)
3019 /* This is the case we care about. */
3020 if (strcmp (l_or_a
->option_name
, "IsaUseConst16") == 0
3021 && strcmp (l_or_b
->option_name
, "IsaUseL32R") == 0)
3028 else if (strcmp (l_or_a
->option_name
, "IsaUseL32R") == 0
3029 && strcmp (l_or_b
->option_name
, "IsaUseConst16") == 0)
3039 l_or_a
= l_or_a
->next
;
3040 l_or_b
= l_or_b
->next
;
3042 if (l_or_a
|| l_or_b
)
3051 /* Incomparable if the substitution was used differently in two cases. */
3052 if (a_greater
&& b_greater
)
3064 static TransitionRule
*
3065 xg_instruction_match (TInsn
*insn
)
3067 TransitionTable
*table
= xg_build_simplify_table (&transition_rule_cmp
);
3069 gas_assert (insn
->opcode
< table
->num_opcodes
);
3071 /* Walk through all of the possible transitions. */
3072 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3074 TransitionRule
*rule
= l
->rule
;
3075 if (xg_instruction_matches_rule (insn
, rule
))
3082 /* Various Other Internal Functions. */
3085 is_unique_insn_expansion (TransitionRule
*r
)
3087 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
3089 if (r
->to_instr
->typ
!= INSTR_INSTR
)
3095 /* Check if there is exactly one relaxation for INSN that converts it to
3096 another instruction of equal or larger size. If so, and if TARG is
3097 non-null, go ahead and generate the relaxed instruction into TARG. If
3098 NARROW_ONLY is true, then only consider relaxations that widen a narrow
3099 instruction, i.e., ignore relaxations that convert to an instruction of
3100 equal size. In some contexts where this function is used, only
3101 a single widening is allowed and the NARROW_ONLY argument is used to
3102 exclude cases like ADDI being "widened" to an ADDMI, which may
3103 later be relaxed to an ADDMI/ADDI pair. */
3106 xg_is_single_relaxable_insn (TInsn
*insn
, TInsn
*targ
, bfd_boolean narrow_only
)
3108 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3110 TransitionRule
*match
= 0;
3112 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3113 gas_assert (insn
->opcode
< table
->num_opcodes
);
3115 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3117 TransitionRule
*rule
= l
->rule
;
3119 if (xg_instruction_matches_rule (insn
, rule
)
3120 && is_unique_insn_expansion (rule
)
3121 && (xg_get_single_size (insn
->opcode
) + (narrow_only
? 1 : 0)
3122 <= xg_get_single_size (rule
->to_instr
->opcode
)))
3133 xg_build_to_insn (targ
, insn
, match
->to_instr
);
3138 /* Return the maximum number of bytes this opcode can expand to. */
3141 xg_get_max_insn_widen_size (xtensa_opcode opcode
)
3143 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3145 int max_size
= xg_get_single_size (opcode
);
3147 gas_assert (opcode
< table
->num_opcodes
);
3149 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3151 TransitionRule
*rule
= l
->rule
;
3152 BuildInstr
*build_list
;
3157 build_list
= rule
->to_instr
;
3158 if (is_unique_insn_expansion (rule
))
3160 gas_assert (build_list
->typ
== INSTR_INSTR
);
3161 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
3164 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3166 switch (build_list
->typ
)
3169 this_size
+= xg_get_single_size (build_list
->opcode
);
3171 case INSTR_LITERAL_DEF
:
3172 case INSTR_LABEL_DEF
:
3177 if (this_size
> max_size
)
3178 max_size
= this_size
;
3184 /* Return the maximum number of literal bytes this opcode can generate. */
3187 xg_get_max_insn_widen_literal_size (xtensa_opcode opcode
)
3189 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3193 gas_assert (opcode
< table
->num_opcodes
);
3195 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
3197 TransitionRule
*rule
= l
->rule
;
3198 BuildInstr
*build_list
;
3203 build_list
= rule
->to_instr
;
3204 if (is_unique_insn_expansion (rule
))
3206 gas_assert (build_list
->typ
== INSTR_INSTR
);
3207 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
3210 for (; build_list
!= NULL
; build_list
= build_list
->next
)
3212 switch (build_list
->typ
)
3214 case INSTR_LITERAL_DEF
:
3215 /* Hard-coded 4-byte literal. */
3219 case INSTR_LABEL_DEF
:
3224 if (this_size
> max_size
)
3225 max_size
= this_size
;
3232 xg_is_relaxable_insn (TInsn
*insn
, int lateral_steps
)
3234 int steps_taken
= 0;
3235 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3238 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3239 gas_assert (insn
->opcode
< table
->num_opcodes
);
3241 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3243 TransitionRule
*rule
= l
->rule
;
3245 if (xg_instruction_matches_rule (insn
, rule
))
3247 if (steps_taken
== lateral_steps
)
3257 get_special_literal_symbol (void)
3259 static symbolS
*sym
= NULL
;
3262 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
3268 get_special_label_symbol (void)
3270 static symbolS
*sym
= NULL
;
3273 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
3279 xg_valid_literal_expression (const expressionS
*exp
)
3301 /* This will check to see if the value can be converted into the
3302 operand type. It will return TRUE if it does not fit. */
3305 xg_check_operand (int32 value
, xtensa_opcode opcode
, int operand
)
3307 uint32 valbuf
= value
;
3308 if (xtensa_operand_encode (xtensa_default_isa
, opcode
, operand
, &valbuf
))
3314 /* Assumes: All immeds are constants. Check that all constants fit
3315 into their immeds; return FALSE if not. */
3318 xg_immeds_fit (const TInsn
*insn
)
3320 xtensa_isa isa
= xtensa_default_isa
;
3324 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3325 for (i
= 0; i
< n
; ++i
)
3327 const expressionS
*exp
= &insn
->tok
[i
];
3329 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3336 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3341 /* The symbol should have a fixup associated with it. */
3350 /* This should only be called after we have an initial
3351 estimate of the addresses. */
3354 xg_symbolic_immeds_fit (const TInsn
*insn
,
3360 xtensa_isa isa
= xtensa_default_isa
;
3368 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3370 for (i
= 0; i
< n
; ++i
)
3372 const expressionS
*exp
= &insn
->tok
[i
];
3374 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
3381 if (xg_check_operand (exp
->X_add_number
, insn
->opcode
, i
))
3387 /* Check for the worst case. */
3388 if (xg_check_operand (0xffff, insn
->opcode
, i
))
3393 /* We only allow symbols for PC-relative references.
3394 If pc_frag == 0, then we don't have frag locations yet. */
3396 || xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 0)
3399 /* If it is a weak symbol or a symbol in a different section,
3400 it cannot be known to fit at assembly time. */
3401 if (S_IS_WEAK (exp
->X_add_symbol
)
3402 || S_GET_SEGMENT (exp
->X_add_symbol
) != pc_seg
)
3404 /* For a direct call with --no-longcalls, be optimistic and
3405 assume it will be in range. If the symbol is weak and
3406 undefined, it may remain undefined at link-time, in which
3407 case it will have a zero value and almost certainly be out
3408 of range for a direct call; thus, relax for undefined weak
3409 symbols even if longcalls is not enabled. */
3410 if (is_direct_call_opcode (insn
->opcode
)
3411 && ! pc_frag
->tc_frag_data
.use_longcalls
3412 && (! S_IS_WEAK (exp
->X_add_symbol
)
3413 || S_IS_DEFINED (exp
->X_add_symbol
)))
3419 symbolP
= exp
->X_add_symbol
;
3420 sym_frag
= symbol_get_frag (symbolP
);
3421 target
= S_GET_VALUE (symbolP
) + exp
->X_add_number
;
3422 pc
= pc_frag
->fr_address
+ pc_offset
;
3424 /* If frag has yet to be reached on this pass, assume it
3425 will move by STRETCH just as we did. If this is not so,
3426 it will be because some frag between grows, and that will
3427 force another pass. Beware zero-length frags. There
3428 should be a faster way to do this. */
3431 && sym_frag
->relax_marker
!= pc_frag
->relax_marker
3432 && S_GET_SEGMENT (symbolP
) == pc_seg
)
3437 new_offset
= target
;
3438 xtensa_operand_do_reloc (isa
, insn
->opcode
, i
, &new_offset
, pc
);
3439 if (xg_check_operand (new_offset
, insn
->opcode
, i
))
3444 /* The symbol should have a fixup associated with it. */
3453 /* Return TRUE on success. */
3456 xg_build_to_insn (TInsn
*targ
, TInsn
*insn
, BuildInstr
*bi
)
3462 targ
->debug_line
= insn
->debug_line
;
3463 targ
->loc_directive_seen
= insn
->loc_directive_seen
;
3468 targ
->opcode
= bi
->opcode
;
3469 targ
->insn_type
= ITYPE_INSN
;
3470 targ
->is_specific_opcode
= FALSE
;
3472 for (; op
!= NULL
; op
= op
->next
)
3474 int op_num
= op
->op_num
;
3475 int op_data
= op
->op_data
;
3477 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3479 if (targ
->ntok
<= op_num
)
3480 targ
->ntok
= op_num
+ 1;
3485 set_expr_const (&targ
->tok
[op_num
], op_data
);
3488 gas_assert (op_data
< insn
->ntok
);
3489 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3492 if (insn
->extra_arg
.X_op
!= O_register
)
3494 copy_expr (&targ
->tok
[op_num
], &insn
->extra_arg
);
3497 sym
= get_special_literal_symbol ();
3498 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3499 if (insn
->tok
[op_data
].X_op
== O_tlsfunc
3500 || insn
->tok
[op_data
].X_op
== O_tlsarg
)
3501 copy_expr (&targ
->extra_arg
, &insn
->tok
[op_data
]);
3504 sym
= get_special_label_symbol ();
3505 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
3507 case OP_OPERAND_HI16U
:
3508 case OP_OPERAND_LOW16U
:
3509 gas_assert (op_data
< insn
->ntok
);
3510 if (expr_is_const (&insn
->tok
[op_data
]))
3513 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3514 val
= xg_apply_userdef_op_fn (op
->typ
,
3517 targ
->tok
[op_num
].X_add_number
= val
;
3521 /* For const16 we can create relocations for these. */
3522 if (targ
->opcode
== XTENSA_UNDEFINED
3523 || (targ
->opcode
!= xtensa_const16_opcode
))
3525 gas_assert (op_data
< insn
->ntok
);
3526 /* Need to build a O_lo16 or O_hi16. */
3527 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3528 if (targ
->tok
[op_num
].X_op
== O_symbol
)
3530 if (op
->typ
== OP_OPERAND_HI16U
)
3531 targ
->tok
[op_num
].X_op
= O_hi16
;
3532 else if (op
->typ
== OP_OPERAND_LOW16U
)
3533 targ
->tok
[op_num
].X_op
= O_lo16
;
3540 /* currently handles:
3543 OP_OPERAND_F32MINUS */
3544 if (xg_has_userdef_op_fn (op
->typ
))
3546 gas_assert (op_data
< insn
->ntok
);
3547 if (expr_is_const (&insn
->tok
[op_data
]))
3550 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3551 val
= xg_apply_userdef_op_fn (op
->typ
,
3554 targ
->tok
[op_num
].X_add_number
= val
;
3557 return FALSE
; /* We cannot use a relocation for this. */
3566 case INSTR_LITERAL_DEF
:
3568 targ
->opcode
= XTENSA_UNDEFINED
;
3569 targ
->insn_type
= ITYPE_LITERAL
;
3570 targ
->is_specific_opcode
= FALSE
;
3571 for (; op
!= NULL
; op
= op
->next
)
3573 int op_num
= op
->op_num
;
3574 int op_data
= op
->op_data
;
3575 gas_assert (op
->op_num
< MAX_INSN_ARGS
);
3577 if (targ
->ntok
<= op_num
)
3578 targ
->ntok
= op_num
+ 1;
3583 gas_assert (op_data
< insn
->ntok
);
3584 /* We can only pass resolvable literals through. */
3585 if (!xg_valid_literal_expression (&insn
->tok
[op_data
]))
3587 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
3599 case INSTR_LABEL_DEF
:
3601 targ
->opcode
= XTENSA_UNDEFINED
;
3602 targ
->insn_type
= ITYPE_LABEL
;
3603 targ
->is_specific_opcode
= FALSE
;
3604 /* Literal with no ops is a label? */
3605 gas_assert (op
== NULL
);
3616 /* Return TRUE on success. */
3619 xg_build_to_stack (IStack
*istack
, TInsn
*insn
, BuildInstr
*bi
)
3621 for (; bi
!= NULL
; bi
= bi
->next
)
3623 TInsn
*next_insn
= istack_push_space (istack
);
3625 if (!xg_build_to_insn (next_insn
, insn
, bi
))
3632 /* Return TRUE on valid expansion. */
3635 xg_expand_to_stack (IStack
*istack
, TInsn
*insn
, int lateral_steps
)
3637 int stack_size
= istack
->ninsn
;
3638 int steps_taken
= 0;
3639 TransitionTable
*table
= xg_build_widen_table (&transition_rule_cmp
);
3642 gas_assert (insn
->insn_type
== ITYPE_INSN
);
3643 gas_assert (insn
->opcode
< table
->num_opcodes
);
3645 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3647 TransitionRule
*rule
= l
->rule
;
3649 if (xg_instruction_matches_rule (insn
, rule
))
3651 if (lateral_steps
== steps_taken
)
3655 /* This is it. Expand the rule to the stack. */
3656 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
3659 /* Check to see if it fits. */
3660 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
3662 TInsn
*tinsn
= &istack
->insn
[i
];
3664 if (tinsn
->insn_type
== ITYPE_INSN
3665 && !tinsn_has_symbolic_operands (tinsn
)
3666 && !xg_immeds_fit (tinsn
))
3668 istack
->ninsn
= stack_size
;
3681 /* Relax the assembly instruction at least "min_steps".
3682 Return the number of steps taken.
3684 For relaxation to correctly terminate, every relaxation chain must
3685 terminate in one of two ways:
3687 1. If the chain from one instruction to the next consists entirely of
3688 single instructions, then the chain *must* handle all possible
3689 immediates without failing. It must not ever fail because an
3690 immediate is out of range. The MOVI.N -> MOVI -> L32R relaxation
3691 chain is one example. L32R loads 32 bits, and there cannot be an
3692 immediate larger than 32 bits, so it satisfies this condition.
3693 Single instruction relaxation chains are as defined by
3694 xg_is_single_relaxable_instruction.
3696 2. Otherwise, the chain must end in a multi-instruction expansion: e.g.,
3697 BNEZ.N -> BNEZ -> BNEZ.W15 -> BENZ.N/J
3699 Strictly speaking, in most cases you can violate condition 1 and be OK
3700 -- in particular when the last two instructions have the same single
3701 size. But nevertheless, you should guarantee the above two conditions.
3703 We could fix this so that single-instruction expansions correctly
3704 terminate when they can't handle the range, but the error messages are
3705 worse, and it actually turns out that in every case but one (18-bit wide
3706 branches), you need a multi-instruction expansion to get the full range
3707 anyway. And because 18-bit branches are handled identically to 15-bit
3708 branches, there isn't any point in changing it. */
3711 xg_assembly_relax (IStack
*istack
,
3714 fragS
*pc_frag
, /* if pc_frag == 0, not pc-relative */
3715 offsetT pc_offset
, /* offset in fragment */
3716 int min_steps
, /* minimum conversion steps */
3717 long stretch
) /* number of bytes stretched so far */
3719 int steps_taken
= 0;
3721 /* Some of its immeds don't fit. Try to build a relaxed version.
3722 This may go through a couple of stages of single instruction
3723 transformations before we get there. */
3725 TInsn single_target
;
3727 int lateral_steps
= 0;
3728 int istack_size
= istack
->ninsn
;
3730 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3731 && steps_taken
>= min_steps
)
3733 istack_push (istack
, insn
);
3736 current_insn
= *insn
;
3738 /* Walk through all of the single instruction expansions. */
3739 while (xg_is_single_relaxable_insn (¤t_insn
, &single_target
, FALSE
))
3742 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3745 if (steps_taken
>= min_steps
)
3747 istack_push (istack
, &single_target
);
3751 current_insn
= single_target
;
3754 /* Now check for a multi-instruction expansion. */
3755 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3757 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3760 if (steps_taken
>= min_steps
)
3762 istack_push (istack
, ¤t_insn
);
3767 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3769 if (steps_taken
>= min_steps
)
3773 istack
->ninsn
= istack_size
;
3776 /* It's not going to work -- use the original. */
3777 istack_push (istack
, insn
);
3783 xg_finish_frag (char *last_insn
,
3784 enum xtensa_relax_statesE frag_state
,
3785 enum xtensa_relax_statesE slot0_state
,
3787 bfd_boolean is_insn
)
3789 /* Finish off this fragment so that it has at LEAST the desired
3790 max_growth. If it doesn't fit in this fragment, close this one
3791 and start a new one. In either case, return a pointer to the
3792 beginning of the growth area. */
3796 frag_grow (max_growth
);
3797 old_frag
= frag_now
;
3799 frag_now
->fr_opcode
= last_insn
;
3801 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3803 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3804 frag_state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3806 old_frag
->tc_frag_data
.slot_subtypes
[0] = slot0_state
;
3807 xtensa_set_frag_assembly_state (frag_now
);
3809 /* Just to make sure that we did not split it up. */
3810 gas_assert (old_frag
->fr_next
== frag_now
);
3814 /* Return TRUE if the target frag is one of the next non-empty frags. */
3817 is_next_frag_target (const fragS
*fragP
, const fragS
*target
)
3822 for (; fragP
; fragP
= fragP
->fr_next
)
3824 if (fragP
== target
)
3826 if (fragP
->fr_fix
!= 0)
3828 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
3830 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
3831 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
3833 if (fragP
->fr_type
== rs_space
)
3841 is_branch_jmp_to_next (TInsn
*insn
, fragS
*fragP
)
3843 xtensa_isa isa
= xtensa_default_isa
;
3845 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3850 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) != 1
3851 && xtensa_opcode_is_jump (isa
, insn
->opcode
) != 1)
3854 for (i
= 0; i
< num_ops
; i
++)
3856 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1)
3862 if (target_op
== -1)
3865 if (insn
->ntok
<= target_op
)
3868 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3871 sym
= insn
->tok
[target_op
].X_add_symbol
;
3875 if (insn
->tok
[target_op
].X_add_number
!= 0)
3878 target_frag
= symbol_get_frag (sym
);
3879 if (target_frag
== NULL
)
3882 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3883 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3891 xg_add_branch_and_loop_targets (TInsn
*insn
)
3893 xtensa_isa isa
= xtensa_default_isa
;
3894 int num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
3896 if (xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3899 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3900 && insn
->tok
[i
].X_op
== O_symbol
)
3901 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3905 if (xtensa_opcode_is_branch (isa
, insn
->opcode
) == 1
3906 || xtensa_opcode_is_loop (isa
, insn
->opcode
) == 1)
3910 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3912 if (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) == 1
3913 && insn
->tok
[i
].X_op
== O_symbol
)
3915 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3916 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3917 if (S_IS_DEFINED (sym
))
3918 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3925 /* Return FALSE if no error. */
3928 xg_build_token_insn (BuildInstr
*instr_spec
, TInsn
*old_insn
, TInsn
*new_insn
)
3933 switch (instr_spec
->typ
)
3936 new_insn
->insn_type
= ITYPE_INSN
;
3937 new_insn
->opcode
= instr_spec
->opcode
;
3939 case INSTR_LITERAL_DEF
:
3940 new_insn
->insn_type
= ITYPE_LITERAL
;
3941 new_insn
->opcode
= XTENSA_UNDEFINED
;
3943 case INSTR_LABEL_DEF
:
3946 new_insn
->is_specific_opcode
= FALSE
;
3947 new_insn
->debug_line
= old_insn
->debug_line
;
3948 new_insn
->loc_directive_seen
= old_insn
->loc_directive_seen
;
3950 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3953 const expressionS
*src_exp
;
3959 /* The expression must be the constant. */
3960 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3961 exp
= &new_insn
->tok
[b_op
->op_num
];
3962 set_expr_const (exp
, b_op
->op_data
);
3966 gas_assert (b_op
->op_num
< MAX_INSN_ARGS
);
3967 gas_assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3968 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3969 exp
= &new_insn
->tok
[b_op
->op_num
];
3970 copy_expr (exp
, src_exp
);
3975 as_bad (_("can't handle generation of literal/labels yet"));
3979 as_bad (_("can't handle undefined OP TYPE"));
3984 new_insn
->ntok
= num_ops
;
3989 /* Return TRUE if it was simplified. */
3992 xg_simplify_insn (TInsn
*old_insn
, TInsn
*new_insn
)
3994 TransitionRule
*rule
;
3995 BuildInstr
*insn_spec
;
3997 if (old_insn
->is_specific_opcode
|| !density_supported
)
4000 rule
= xg_instruction_match (old_insn
);
4004 insn_spec
= rule
->to_instr
;
4005 /* There should only be one. */
4006 gas_assert (insn_spec
!= NULL
);
4007 gas_assert (insn_spec
->next
== NULL
);
4008 if (insn_spec
->next
!= NULL
)
4011 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
4017 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
4018 l32i.n. (2) Check the number of operands. (3) Place the instruction
4019 tokens into the stack or relax it and place multiple
4020 instructions/literals onto the stack. Return FALSE if no error. */
4023 xg_expand_assembly_insn (IStack
*istack
, TInsn
*orig_insn
)
4027 bfd_boolean do_expand
;
4029 tinsn_init (&new_insn
);
4031 /* Narrow it if we can. xg_simplify_insn now does all the
4032 appropriate checking (e.g., for the density option). */
4033 if (xg_simplify_insn (orig_insn
, &new_insn
))
4034 orig_insn
= &new_insn
;
4036 noperands
= xtensa_opcode_num_operands (xtensa_default_isa
,
4038 if (orig_insn
->ntok
< noperands
)
4040 as_bad (ngettext ("found %d operand for '%s': Expected %d",
4041 "found %d operands for '%s': Expected %d",
4044 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4048 if (orig_insn
->ntok
> noperands
)
4049 as_warn (ngettext ("found %d operand for '%s': Expected %d",
4050 "found %d operands for '%s': Expected %d",
4053 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
4056 /* If there are not enough operands, we will assert above. If there
4057 are too many, just cut out the extras here. */
4058 orig_insn
->ntok
= noperands
;
4060 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
4063 /* Special case for extui opcode which has constraints not handled
4064 by the ordinary operand encoding checks. The number of operands
4065 and related syntax issues have already been checked. */
4066 if (orig_insn
->opcode
== xtensa_extui_opcode
)
4068 int shiftimm
= orig_insn
->tok
[2].X_add_number
;
4069 int maskimm
= orig_insn
->tok
[3].X_add_number
;
4070 if (shiftimm
+ maskimm
> 32)
4072 as_bad (_("immediate operands sum to greater than 32"));
4077 /* If the instruction will definitely need to be relaxed, it is better
4078 to expand it now for better scheduling. Decide whether to expand
4080 do_expand
= (!orig_insn
->is_specific_opcode
&& use_transform ());
4082 /* Calls should be expanded to longcalls only in the backend relaxation
4083 so that the assembly scheduler will keep the L32R/CALLX instructions
4085 if (is_direct_call_opcode (orig_insn
->opcode
))
4088 if (tinsn_has_symbolic_operands (orig_insn
))
4090 /* The values of symbolic operands are not known yet, so only expand
4091 now if an operand is "complex" (e.g., difference of symbols) and
4092 will have to be stored as a literal regardless of the value. */
4093 if (!tinsn_has_complex_operands (orig_insn
))
4096 else if (xg_immeds_fit (orig_insn
))
4100 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
4102 istack_push (istack
, orig_insn
);
4108 /* Return TRUE if the section flags are marked linkonce
4109 or the name is .gnu.linkonce.*. */
4111 static int linkonce_len
= sizeof (".gnu.linkonce.") - 1;
4114 get_is_linkonce_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
)
4116 flagword flags
, link_once_flags
;
4118 flags
= bfd_section_flags (sec
);
4119 link_once_flags
= (flags
& SEC_LINK_ONCE
);
4121 /* Flags might not be set yet. */
4122 if (!link_once_flags
4123 && strncmp (segment_name (sec
), ".gnu.linkonce.", linkonce_len
) == 0)
4124 link_once_flags
= SEC_LINK_ONCE
;
4126 return (link_once_flags
!= 0);
4131 xtensa_add_literal_sym (symbolS
*sym
)
4135 l
= XNEW (sym_list
);
4137 l
->next
= literal_syms
;
4143 xtensa_create_literal_symbol (segT sec
, fragS
*frag
)
4145 static int lit_num
= 0;
4146 static char name
[256];
4149 sprintf (name
, ".L_lit_sym%d", lit_num
);
4151 /* Create a local symbol. If it is in a linkonce section, we have to
4152 be careful to make sure that if it is used in a relocation that the
4153 symbol will be in the output file. */
4154 if (get_is_linkonce_section (stdoutput
, sec
))
4156 symbolP
= symbol_new (name
, sec
, 0, frag
);
4157 S_CLEAR_EXTERNAL (symbolP
);
4158 /* symbolP->local = 1; */
4161 symbolP
= symbol_new (name
, sec
, 0, frag
);
4163 xtensa_add_literal_sym (symbolP
);
4170 /* Currently all literals that are generated here are 32-bit L32R targets. */
4173 xg_assemble_literal (/* const */ TInsn
*insn
)
4176 symbolS
*lit_sym
= NULL
;
4177 bfd_reloc_code_real_type reloc
;
4178 bfd_boolean pcrel
= FALSE
;
4181 /* size = 4 for L32R. It could easily be larger when we move to
4182 larger constants. Add a parameter later. */
4183 offsetT litsize
= 4;
4184 offsetT litalign
= 2; /* 2^2 = 4 */
4185 expressionS saved_loc
;
4186 expressionS
* emit_val
;
4188 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
4190 gas_assert (insn
->insn_type
== ITYPE_LITERAL
);
4191 gas_assert (insn
->ntok
== 1); /* must be only one token here */
4193 xtensa_switch_to_literal_fragment (&state
);
4195 emit_val
= &insn
->tok
[0];
4196 if (emit_val
->X_op
== O_big
)
4198 int size
= emit_val
->X_add_number
* CHARS_PER_LITTLENUM
;
4201 /* This happens when someone writes a "movi a2, big_number". */
4202 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
4203 _("invalid immediate"));
4204 xtensa_restore_emit_state (&state
);
4209 /* Force a 4-byte align here. Note that this opens a new frag, so all
4210 literals done with this function have a frag to themselves. That's
4211 important for the way text section literals work. */
4212 frag_align (litalign
, 0, 0);
4213 record_alignment (now_seg
, litalign
);
4215 switch (emit_val
->X_op
)
4225 p
= frag_more (litsize
);
4226 xtensa_set_frag_assembly_state (frag_now
);
4227 reloc
= map_operator_to_reloc (emit_val
->X_op
, TRUE
);
4228 if (emit_val
->X_add_symbol
)
4229 emit_val
->X_op
= O_symbol
;
4231 emit_val
->X_op
= O_constant
;
4232 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
,
4233 litsize
, emit_val
, pcrel
, reloc
);
4237 emit_expr (emit_val
, litsize
);
4241 gas_assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
4242 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4243 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4244 lit_sym
= frag_now
->fr_symbol
;
4247 xtensa_restore_emit_state (&state
);
4253 xg_assemble_literal_space (/* const */ int size
, int slot
)
4256 /* We might have to do something about this alignment. It only
4257 takes effect if something is placed here. */
4258 offsetT litalign
= 2; /* 2^2 = 4 */
4259 fragS
*lit_saved_frag
;
4261 gas_assert (size
% 4 == 0);
4263 xtensa_switch_to_literal_fragment (&state
);
4265 /* Force a 4-byte align here. */
4266 frag_align (litalign
, 0, 0);
4267 record_alignment (now_seg
, litalign
);
4271 lit_saved_frag
= frag_now
;
4272 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
4273 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
4274 xg_finish_frag (0, RELAX_LITERAL
, 0, size
, FALSE
);
4277 xtensa_restore_emit_state (&state
);
4278 frag_now
->tc_frag_data
.literal_frags
[slot
] = lit_saved_frag
;
4282 /* Put in a fixup record based on the opcode.
4283 Return TRUE on success. */
4286 xg_add_opcode_fix (TInsn
*tinsn
,
4294 xtensa_opcode opcode
= tinsn
->opcode
;
4295 bfd_reloc_code_real_type reloc
;
4296 reloc_howto_type
*howto
;
4300 reloc
= BFD_RELOC_NONE
;
4302 /* First try the special cases for "alternate" relocs. */
4303 if (opcode
== xtensa_l32r_opcode
)
4305 if (fragP
->tc_frag_data
.use_absolute_literals
)
4306 reloc
= encode_alt_reloc (slot
);
4308 else if (opcode
== xtensa_const16_opcode
)
4310 if (exp
->X_op
== O_lo16
)
4312 reloc
= encode_reloc (slot
);
4313 exp
->X_op
= O_symbol
;
4315 else if (exp
->X_op
== O_hi16
)
4317 reloc
= encode_alt_reloc (slot
);
4318 exp
->X_op
= O_symbol
;
4322 if (opnum
!= get_relaxable_immed (opcode
))
4324 as_bad (_("invalid relocation for operand %i of '%s'"),
4325 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4329 /* Handle erroneous "@h" and "@l" expressions here before they propagate
4330 into the symbol table where the generic portions of the assembler
4331 won't know what to do with them. */
4332 if (exp
->X_op
== O_lo16
|| exp
->X_op
== O_hi16
)
4334 as_bad (_("invalid expression for operand %i of '%s'"),
4335 opnum
+ 1, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4339 /* Next try the generic relocs. */
4340 if (reloc
== BFD_RELOC_NONE
)
4341 reloc
= encode_reloc (slot
);
4342 if (reloc
== BFD_RELOC_NONE
)
4344 as_bad (_("invalid relocation in instruction slot %i"), slot
);
4348 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4351 as_bad (_("undefined symbol for opcode \"%s\""),
4352 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4356 fmt_length
= xtensa_format_length (xtensa_default_isa
, fmt
);
4357 the_fix
= fix_new_exp (fragP
, offset
, fmt_length
, exp
,
4358 howto
->pc_relative
, reloc
);
4359 the_fix
->fx_no_overflow
= 1;
4360 the_fix
->tc_fix_data
.X_add_symbol
= exp
->X_add_symbol
;
4361 the_fix
->tc_fix_data
.X_add_number
= exp
->X_add_number
;
4362 the_fix
->tc_fix_data
.slot
= slot
;
4369 xg_emit_insn_to_buf (TInsn
*tinsn
,
4373 bfd_boolean build_fix
)
4375 static xtensa_insnbuf insnbuf
= NULL
;
4376 bfd_boolean has_symbolic_immed
= FALSE
;
4377 bfd_boolean ok
= TRUE
;
4380 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4382 has_symbolic_immed
= tinsn_to_insnbuf (tinsn
, insnbuf
);
4383 if (has_symbolic_immed
&& build_fix
)
4386 xtensa_format fmt
= xg_get_single_format (tinsn
->opcode
);
4387 int slot
= xg_get_single_slot (tinsn
->opcode
);
4388 int opnum
= get_relaxable_immed (tinsn
->opcode
);
4389 expressionS
*exp
= &tinsn
->tok
[opnum
];
4391 if (!xg_add_opcode_fix (tinsn
, opnum
, fmt
, slot
, exp
, fragP
, offset
))
4394 fragP
->tc_frag_data
.is_insn
= TRUE
;
4395 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4396 (unsigned char *) buf
, 0);
4402 xg_resolve_literals (TInsn
*insn
, symbolS
*lit_sym
)
4404 symbolS
*sym
= get_special_literal_symbol ();
4408 gas_assert (insn
->insn_type
== ITYPE_INSN
);
4409 for (i
= 0; i
< insn
->ntok
; i
++)
4410 if (insn
->tok
[i
].X_add_symbol
== sym
)
4411 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4417 xg_resolve_labels (TInsn
*insn
, symbolS
*label_sym
)
4419 symbolS
*sym
= get_special_label_symbol ();
4421 for (i
= 0; i
< insn
->ntok
; i
++)
4422 if (insn
->tok
[i
].X_add_symbol
== sym
)
4423 insn
->tok
[i
].X_add_symbol
= label_sym
;
4428 /* Return TRUE if the instruction can write to the specified
4429 integer register. */
4432 is_register_writer (const TInsn
*insn
, const char *regset
, int regnum
)
4436 xtensa_isa isa
= xtensa_default_isa
;
4438 num_ops
= xtensa_opcode_num_operands (isa
, insn
->opcode
);
4440 for (i
= 0; i
< num_ops
; i
++)
4443 inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
4444 if ((inout
== 'o' || inout
== 'm')
4445 && xtensa_operand_is_register (isa
, insn
->opcode
, i
) == 1)
4447 xtensa_regfile opnd_rf
=
4448 xtensa_operand_regfile (isa
, insn
->opcode
, i
);
4449 if (!strcmp (xtensa_regfile_shortname (isa
, opnd_rf
), regset
))
4451 if ((insn
->tok
[i
].X_op
== O_register
)
4452 && (insn
->tok
[i
].X_add_number
== regnum
))
4462 is_bad_loopend_opcode (const TInsn
*tinsn
)
4464 xtensa_opcode opcode
= tinsn
->opcode
;
4466 if (opcode
== XTENSA_UNDEFINED
)
4469 if (opcode
== xtensa_call0_opcode
4470 || opcode
== xtensa_callx0_opcode
4471 || opcode
== xtensa_call4_opcode
4472 || opcode
== xtensa_callx4_opcode
4473 || opcode
== xtensa_call8_opcode
4474 || opcode
== xtensa_callx8_opcode
4475 || opcode
== xtensa_call12_opcode
4476 || opcode
== xtensa_callx12_opcode
4477 || opcode
== xtensa_isync_opcode
4478 || opcode
== xtensa_ret_opcode
4479 || opcode
== xtensa_ret_n_opcode
4480 || opcode
== xtensa_retw_opcode
4481 || opcode
== xtensa_retw_n_opcode
4482 || opcode
== xtensa_waiti_opcode
4483 || opcode
== xtensa_rsr_lcount_opcode
)
4490 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4491 This allows the debugger to add unaligned labels.
4492 Also, the assembler generates stabs labels that need
4493 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4496 is_unaligned_label (symbolS
*sym
)
4498 const char *name
= S_GET_NAME (sym
);
4499 static size_t fake_size
= 0;
4503 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4506 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4508 fake_size
= strlen (FAKE_LABEL_NAME
);
4511 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4512 && (name
[fake_size
] == 'F'
4513 || name
[fake_size
] == 'L'
4514 || (name
[fake_size
] == 'e'
4515 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4523 next_non_empty_frag (const fragS
*fragP
)
4525 fragS
*next_fragP
= fragP
->fr_next
;
4527 /* Sometimes an empty will end up here due storage allocation issues.
4528 So we have to skip until we find something legit. */
4529 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4530 next_fragP
= next_fragP
->fr_next
;
4532 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4540 next_frag_opcode_is_loop (const fragS
*fragP
, xtensa_opcode
*opcode
)
4542 xtensa_opcode out_opcode
;
4543 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4545 if (next_fragP
== NULL
)
4548 out_opcode
= get_opcode_from_buf (next_fragP
->fr_literal
, 0);
4549 if (xtensa_opcode_is_loop (xtensa_default_isa
, out_opcode
) == 1)
4551 *opcode
= out_opcode
;
4559 frag_format_size (const fragS
*fragP
)
4561 static xtensa_insnbuf insnbuf
= NULL
;
4562 xtensa_isa isa
= xtensa_default_isa
;
4567 insnbuf
= xtensa_insnbuf_alloc (isa
);
4570 return XTENSA_UNDEFINED
;
4572 xtensa_insnbuf_from_chars (isa
, insnbuf
,
4573 (unsigned char *) fragP
->fr_literal
, 0);
4575 fmt
= xtensa_format_decode (isa
, insnbuf
);
4576 if (fmt
== XTENSA_UNDEFINED
)
4577 return XTENSA_UNDEFINED
;
4578 fmt_size
= xtensa_format_length (isa
, fmt
);
4580 /* If the next format won't be changing due to relaxation, just
4581 return the length of the first format. */
4582 if (fragP
->fr_opcode
!= fragP
->fr_literal
)
4585 /* If during relaxation we have to pull an instruction out of a
4586 multi-slot instruction, we will return the more conservative
4587 number. This works because alignment on bigger instructions
4588 is more restrictive than alignment on smaller instructions.
4589 This is more conservative than we would like, but it happens
4592 if (xtensa_format_num_slots (xtensa_default_isa
, fmt
) > 1)
4595 /* If we aren't doing one of our own relaxations or it isn't
4596 slot-based, then the insn size won't change. */
4597 if (fragP
->fr_type
!= rs_machine_dependent
)
4599 if (fragP
->fr_subtype
!= RELAX_SLOTS
)
4602 /* If an instruction is about to grow, return the longer size. */
4603 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP1
4604 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP2
4605 || fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED_STEP3
)
4607 /* For most frags at RELAX_IMMED_STEPX, with X > 0, the first
4608 instruction in the relaxed version is of length 3. (The case
4609 where we have to pull the instruction out of a FLIX bundle
4610 is handled conservatively above.) However, frags with opcodes
4611 that are expanding to wide branches end up having formats that
4612 are not determinable by the RELAX_IMMED_STEPX enumeration, and
4613 we can't tell directly what format the relaxer picked. This
4614 is a wart in the design of the relaxer that should someday be
4615 fixed, but would require major changes, or at least should
4616 be accompanied by major changes to make use of that data.
4618 In any event, we can tell that we are expanding from a single-slot
4619 format to a wider one with the logic below. */
4622 int relaxed_size
= fmt_size
+ fragP
->tc_frag_data
.text_expansion
[0];
4624 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
4626 if (relaxed_size
== xtensa_format_length (isa
, i
))
4627 return relaxed_size
;
4633 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
4634 return 2 + fragP
->tc_frag_data
.text_expansion
[0];
4641 next_frag_format_size (const fragS
*fragP
)
4643 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4644 return frag_format_size (next_fragP
);
4648 /* In early Xtensa Processors, for reasons that are unclear, the ISA
4649 required two-byte instructions to be treated as three-byte instructions
4650 for loop instruction alignment. This restriction was removed beginning
4651 with Xtensa LX. Now the only requirement on loop instruction alignment
4652 is that the first instruction of the loop must appear at an address that
4653 does not cross a fetch boundary. */
4656 get_loop_align_size (int insn_size
)
4658 if (insn_size
== XTENSA_UNDEFINED
)
4659 return xtensa_fetch_width
;
4661 if (enforce_three_byte_loop_align
&& insn_size
== 2)
4668 /* If the next legit fragment is an end-of-loop marker,
4669 switch its state so it will instantiate a NOP. */
4672 update_next_frag_state (fragS
*fragP
)
4674 fragS
*next_fragP
= fragP
->fr_next
;
4675 fragS
*new_target
= NULL
;
4679 /* We are guaranteed there will be one of these... */
4680 while (!(next_fragP
->fr_type
== rs_machine_dependent
4681 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4682 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
)))
4683 next_fragP
= next_fragP
->fr_next
;
4685 gas_assert (next_fragP
->fr_type
== rs_machine_dependent
4686 && (next_fragP
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
4687 || next_fragP
->fr_subtype
== RELAX_UNREACHABLE
));
4689 /* ...and one of these. */
4690 new_target
= next_fragP
->fr_next
;
4691 while (!(new_target
->fr_type
== rs_machine_dependent
4692 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4693 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
)))
4694 new_target
= new_target
->fr_next
;
4696 gas_assert (new_target
->fr_type
== rs_machine_dependent
4697 && (new_target
->fr_subtype
== RELAX_MAYBE_DESIRE_ALIGN
4698 || new_target
->fr_subtype
== RELAX_DESIRE_ALIGN
));
4701 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4703 if (next_fragP
->fr_type
== rs_machine_dependent
4704 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4706 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4710 next_fragP
= next_fragP
->fr_next
;
4716 next_frag_is_branch_target (const fragS
*fragP
)
4718 /* Sometimes an empty will end up here due to storage allocation issues,
4719 so we have to skip until we find something legit. */
4720 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4722 if (fragP
->tc_frag_data
.is_branch_target
)
4724 if (fragP
->fr_fix
!= 0)
4732 next_frag_is_loop_target (const fragS
*fragP
)
4734 /* Sometimes an empty will end up here due storage allocation issues.
4735 So we have to skip until we find something legit. */
4736 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4738 if (fragP
->tc_frag_data
.is_loop_target
)
4740 if (fragP
->fr_fix
!= 0)
4747 /* As specified in the relaxation table, when a loop instruction is
4748 relaxed, there are 24 bytes between the loop instruction itself and
4749 the first instruction in the loop. */
4751 #define RELAXED_LOOP_INSN_BYTES 24
4754 next_frag_pre_opcode_bytes (const fragS
*fragp
)
4756 const fragS
*next_fragp
= fragp
->fr_next
;
4757 xtensa_opcode next_opcode
;
4759 if (!next_frag_opcode_is_loop (fragp
, &next_opcode
))
4762 /* Sometimes an empty will end up here due to storage allocation issues,
4763 so we have to skip until we find something legit. */
4764 while (next_fragp
->fr_fix
== 0)
4765 next_fragp
= next_fragp
->fr_next
;
4767 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4770 /* There is some implicit knowledge encoded in here.
4771 The LOOP instructions that are NOT RELAX_IMMED have
4772 been relaxed. Note that we can assume that the LOOP
4773 instruction is in slot 0 because loops aren't bundleable. */
4774 if (next_fragp
->tc_frag_data
.slot_subtypes
[0] > RELAX_IMMED
)
4775 return get_expanded_loop_offset (next_opcode
) + RELAXED_LOOP_INSN_BYTES
;
4781 /* Mark a location where we can later insert literal frags. Update
4782 the section's literal_pool_loc, so subsequent literals can be
4783 placed nearest to their use. */
4786 xtensa_mark_literal_pool_location (void)
4788 /* Any labels pointing to the current location need
4789 to be adjusted to after the literal pool. */
4790 fragS
*pool_location
;
4792 if (use_literal_section
)
4795 /* We stash info in these frags so we can later move the literal's
4796 fixes into this frchain's fix list. */
4797 pool_location
= frag_now
;
4798 frag_now
->tc_frag_data
.lit_frchain
= frchain_now
;
4799 frag_now
->tc_frag_data
.literal_frag
= frag_now
;
4800 /* Just record this frag. */
4801 xtensa_maybe_create_literal_pool_frag (FALSE
, FALSE
);
4802 frag_variant (rs_machine_dependent
, 0, 0,
4803 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4804 xtensa_set_frag_assembly_state (frag_now
);
4805 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
4806 frag_variant (rs_machine_dependent
, 0, 0,
4807 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4808 xtensa_set_frag_assembly_state (frag_now
);
4810 set_literal_pool_location (now_seg
, pool_location
);
4814 /* Build a nop of the correct size into tinsn. */
4817 build_nop (TInsn
*tinsn
, int size
)
4823 tinsn
->opcode
= xtensa_nop_n_opcode
;
4825 if (tinsn
->opcode
== XTENSA_UNDEFINED
)
4826 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4830 if (xtensa_nop_opcode
== XTENSA_UNDEFINED
)
4832 tinsn
->opcode
= xtensa_or_opcode
;
4833 set_expr_const (&tinsn
->tok
[0], 1);
4834 set_expr_const (&tinsn
->tok
[1], 1);
4835 set_expr_const (&tinsn
->tok
[2], 1);
4839 tinsn
->opcode
= xtensa_nop_opcode
;
4841 gas_assert (tinsn
->opcode
!= XTENSA_UNDEFINED
);
4846 /* Assemble a NOP of the requested size in the buffer. User must have
4847 allocated "buf" with at least "size" bytes. */
4850 assemble_nop (int size
, char *buf
)
4852 static xtensa_insnbuf insnbuf
= NULL
;
4855 build_nop (&tinsn
, size
);
4858 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4860 tinsn_to_insnbuf (&tinsn
, insnbuf
);
4861 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
,
4862 (unsigned char *) buf
, 0);
4866 /* Return the number of bytes for the offset of the expanded loop
4867 instruction. This should be incorporated into the relaxation
4868 specification but is hard-coded here. This is used to auto-align
4869 the loop instruction. It is invalid to call this function if the
4870 configuration does not have loops or if the opcode is not a loop
4874 get_expanded_loop_offset (xtensa_opcode opcode
)
4876 /* This is the OFFSET of the loop instruction in the expanded loop.
4877 This MUST correspond directly to the specification of the loop
4878 expansion. It will be validated on fragment conversion. */
4879 gas_assert (opcode
!= XTENSA_UNDEFINED
);
4880 if (opcode
== xtensa_loop_opcode
)
4882 if (opcode
== xtensa_loopnez_opcode
)
4884 if (opcode
== xtensa_loopgtz_opcode
)
4886 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4892 get_literal_pool_location (segT seg
)
4896 struct litpool_seg
*lps
= litpool_seg_list
.next
;
4897 struct litpool_frag
*lpf
;
4898 for ( ; lps
&& lps
->seg
->id
!= seg
->id
; lps
= lps
->next
)
4902 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4903 { /* Skip "candidates" for now. */
4904 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
4908 /* Must convert a lower-priority pool. */
4909 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4911 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
)
4914 /* Still no match -- try for a low priority pool. */
4915 for (lpf
= lps
->frag_list
.prev
; lpf
->fragP
; lpf
= lpf
->prev
)
4917 if (lpf
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
4922 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4927 set_literal_pool_location (segT seg
, fragS
*literal_pool_loc
)
4929 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4933 /* Set frag assembly state should be called when a new frag is
4934 opened and after a frag has been closed. */
4937 xtensa_set_frag_assembly_state (fragS
*fragP
)
4939 if (!density_supported
)
4940 fragP
->tc_frag_data
.is_no_density
= TRUE
;
4942 /* This function is called from subsegs_finish, which is called
4943 after xtensa_end, so we can't use "use_transform" or
4944 "use_schedule" here. */
4945 if (!directive_state
[directive_transform
])
4946 fragP
->tc_frag_data
.is_no_transform
= TRUE
;
4947 if (directive_state
[directive_longcalls
])
4948 fragP
->tc_frag_data
.use_longcalls
= TRUE
;
4949 fragP
->tc_frag_data
.use_absolute_literals
=
4950 directive_state
[directive_absolute_literals
];
4951 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
4956 relaxable_section (asection
*sec
)
4958 return ((sec
->flags
& SEC_DEBUGGING
) == 0
4959 && strcmp (sec
->name
, ".eh_frame") != 0);
4964 xtensa_mark_frags_for_org (void)
4968 /* Walk over each fragment of all of the current segments. If we find
4969 a .org frag in any of the segments, mark all frags prior to it as
4970 "no transform", which will prevent linker optimizations from messing
4971 up the .org distance. This should be done after
4972 xtensa_find_unmarked_state_frags, because we don't want to worry here
4973 about that function trashing the data we save here. */
4975 for (seclist
= &stdoutput
->sections
;
4976 seclist
&& *seclist
;
4977 seclist
= &(*seclist
)->next
)
4979 segT sec
= *seclist
;
4980 segment_info_type
*seginfo
;
4983 flags
= bfd_section_flags (sec
);
4984 if (flags
& SEC_DEBUGGING
)
4986 if (!(flags
& SEC_ALLOC
))
4989 seginfo
= seg_info (sec
);
4990 if (seginfo
&& seginfo
->frchainP
)
4992 fragS
*last_fragP
= seginfo
->frchainP
->frch_root
;
4993 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
4994 fragP
= fragP
->fr_next
)
4996 /* cvt_frag_to_fill has changed the fr_type of org frags to
4997 rs_fill, so use the value as cached in rs_subtype here. */
4998 if (fragP
->fr_subtype
== RELAX_ORG
)
5000 while (last_fragP
!= fragP
->fr_next
)
5002 last_fragP
->tc_frag_data
.is_no_transform
= TRUE
;
5003 last_fragP
= last_fragP
->fr_next
;
5013 xtensa_find_unmarked_state_frags (void)
5017 /* Walk over each fragment of all of the current segments. For each
5018 unmarked fragment, mark it with the same info as the previous
5020 for (seclist
= &stdoutput
->sections
;
5021 seclist
&& *seclist
;
5022 seclist
= &(*seclist
)->next
)
5024 segT sec
= *seclist
;
5025 segment_info_type
*seginfo
;
5028 flags
= bfd_section_flags (sec
);
5029 if (flags
& SEC_DEBUGGING
)
5031 if (!(flags
& SEC_ALLOC
))
5034 seginfo
= seg_info (sec
);
5035 if (seginfo
&& seginfo
->frchainP
)
5037 fragS
*last_fragP
= 0;
5038 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
;
5039 fragP
= fragP
->fr_next
)
5041 if (fragP
->fr_fix
!= 0
5042 && !fragP
->tc_frag_data
.is_assembly_state_set
)
5044 if (last_fragP
== 0)
5046 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
5047 _("assembly state not set for first frag in section %s"),
5052 fragP
->tc_frag_data
.is_assembly_state_set
= TRUE
;
5053 fragP
->tc_frag_data
.is_no_density
=
5054 last_fragP
->tc_frag_data
.is_no_density
;
5055 fragP
->tc_frag_data
.is_no_transform
=
5056 last_fragP
->tc_frag_data
.is_no_transform
;
5057 fragP
->tc_frag_data
.use_longcalls
=
5058 last_fragP
->tc_frag_data
.use_longcalls
;
5059 fragP
->tc_frag_data
.use_absolute_literals
=
5060 last_fragP
->tc_frag_data
.use_absolute_literals
;
5063 if (fragP
->tc_frag_data
.is_assembly_state_set
)
5072 xtensa_find_unaligned_branch_targets (bfd
*abfd ATTRIBUTE_UNUSED
,
5074 void *unused ATTRIBUTE_UNUSED
)
5076 flagword flags
= bfd_section_flags (sec
);
5077 segment_info_type
*seginfo
= seg_info (sec
);
5078 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5080 if (flags
& SEC_CODE
)
5082 xtensa_isa isa
= xtensa_default_isa
;
5083 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5084 while (frag
!= NULL
)
5086 if (frag
->tc_frag_data
.is_branch_target
)
5089 addressT branch_align
, frag_addr
;
5092 xtensa_insnbuf_from_chars
5093 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5094 fmt
= xtensa_format_decode (isa
, insnbuf
);
5095 op_size
= xtensa_format_length (isa
, fmt
);
5096 branch_align
= 1 << branch_align_power (sec
);
5097 frag_addr
= frag
->fr_address
% branch_align
;
5098 if (frag_addr
+ op_size
> branch_align
)
5099 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5100 _("unaligned branch target: %d bytes at 0x%lx"),
5101 op_size
, (long) frag
->fr_address
);
5103 frag
= frag
->fr_next
;
5105 xtensa_insnbuf_free (isa
, insnbuf
);
5111 xtensa_find_unaligned_loops (bfd
*abfd ATTRIBUTE_UNUSED
,
5113 void *unused ATTRIBUTE_UNUSED
)
5115 flagword flags
= bfd_section_flags (sec
);
5116 segment_info_type
*seginfo
= seg_info (sec
);
5117 fragS
*frag
= seginfo
->frchainP
->frch_root
;
5118 xtensa_isa isa
= xtensa_default_isa
;
5120 if (flags
& SEC_CODE
)
5122 xtensa_insnbuf insnbuf
= xtensa_insnbuf_alloc (isa
);
5123 while (frag
!= NULL
)
5125 if (frag
->tc_frag_data
.is_first_loop_insn
)
5131 if (frag
->fr_fix
== 0)
5132 frag
= next_non_empty_frag (frag
);
5136 xtensa_insnbuf_from_chars
5137 (isa
, insnbuf
, (unsigned char *) frag
->fr_literal
, 0);
5138 fmt
= xtensa_format_decode (isa
, insnbuf
);
5139 op_size
= xtensa_format_length (isa
, fmt
);
5140 frag_addr
= frag
->fr_address
% xtensa_fetch_width
;
5142 if (frag_addr
+ op_size
> xtensa_fetch_width
)
5143 as_warn_where (frag
->fr_file
, frag
->fr_line
,
5144 _("unaligned loop: %d bytes at 0x%lx"),
5145 op_size
, (long) frag
->fr_address
);
5148 frag
= frag
->fr_next
;
5150 xtensa_insnbuf_free (isa
, insnbuf
);
5156 xg_apply_fix_value (fixS
*fixP
, valueT val
)
5158 xtensa_isa isa
= xtensa_default_isa
;
5159 static xtensa_insnbuf insnbuf
= NULL
;
5160 static xtensa_insnbuf slotbuf
= NULL
;
5163 bfd_boolean alt_reloc
;
5164 xtensa_opcode opcode
;
5165 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5167 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
)
5169 as_fatal (_("unexpected fix"));
5173 insnbuf
= xtensa_insnbuf_alloc (isa
);
5174 slotbuf
= xtensa_insnbuf_alloc (isa
);
5177 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5178 fmt
= xtensa_format_decode (isa
, insnbuf
);
5179 if (fmt
== XTENSA_UNDEFINED
)
5180 as_fatal (_("undecodable fix"));
5181 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5182 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5183 if (opcode
== XTENSA_UNDEFINED
)
5184 as_fatal (_("undecodable fix"));
5186 /* CONST16 immediates are not PC-relative, despite the fact that we
5187 reuse the normal PC-relative operand relocations for the low part
5188 of a CONST16 operand. */
5189 if (opcode
== xtensa_const16_opcode
)
5192 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
,
5193 get_relaxable_immed (opcode
), val
,
5194 fixP
->fx_file
, fixP
->fx_line
);
5196 xtensa_format_set_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5197 xtensa_insnbuf_to_chars (isa
, insnbuf
, (unsigned char *) fixpos
, 0);
5203 /* External Functions and Other GAS Hooks. */
5206 xtensa_target_format (void)
5208 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
5213 xtensa_file_arch_init (bfd
*abfd
)
5215 bfd_set_private_flags (abfd
, 0x100 | 0x200);
5220 md_number_to_chars (char *buf
, valueT val
, int n
)
5222 if (target_big_endian
)
5223 number_to_chars_bigendian (buf
, val
, n
);
5225 number_to_chars_littleendian (buf
, val
, n
);
5229 xg_init_global_config (void)
5231 target_big_endian
= XCHAL_HAVE_BE
;
5233 density_supported
= XCHAL_HAVE_DENSITY
;
5234 absolute_literals_supported
= XSHAL_USE_ABSOLUTE_LITERALS
;
5235 xtensa_fetch_width
= XCHAL_INST_FETCH_WIDTH
;
5237 directive_state
[directive_density
] = XCHAL_HAVE_DENSITY
;
5238 directive_state
[directive_absolute_literals
] = XSHAL_USE_ABSOLUTE_LITERALS
;
5242 xtensa_init (int argc ATTRIBUTE_UNUSED
, char **argv ATTRIBUTE_UNUSED
)
5244 xg_init_global_config ();
5247 /* This function is called once, at assembler startup time. It should
5248 set up all the tables, etc. that the MD part of the assembler will
5254 segT current_section
= now_seg
;
5255 int current_subsec
= now_subseg
;
5259 xtensa_default_isa
= xtensa_isa_init (0, 0);
5260 isa
= xtensa_default_isa
;
5262 linkrelax
= opt_linkrelax
;
5264 /* Set up the literal sections. */
5265 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
5267 subseg_set (current_section
, current_subsec
);
5269 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
5270 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
5271 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
5272 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
5273 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
5274 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
5275 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
5276 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
5277 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
5278 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
5279 xtensa_const16_opcode
= xtensa_opcode_lookup (isa
, "const16");
5280 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
5281 xtensa_extui_opcode
= xtensa_opcode_lookup (isa
, "extui");
5282 xtensa_movi_opcode
= xtensa_opcode_lookup (isa
, "movi");
5283 xtensa_movi_n_opcode
= xtensa_opcode_lookup (isa
, "movi.n");
5284 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
5285 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
5286 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
5287 xtensa_l32r_opcode
= xtensa_opcode_lookup (isa
, "l32r");
5288 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
5289 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
5290 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
5291 xtensa_nop_opcode
= xtensa_opcode_lookup (isa
, "nop");
5292 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
5293 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
5294 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
5295 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
5296 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
5297 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
5298 xtensa_rsr_lcount_opcode
= xtensa_opcode_lookup (isa
, "rsr.lcount");
5299 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
5301 for (i
= 0; i
< xtensa_isa_num_formats (isa
); i
++)
5303 int format_slots
= xtensa_format_num_slots (isa
, i
);
5304 if (format_slots
> config_max_slots
)
5305 config_max_slots
= format_slots
;
5308 xg_init_vinsn (&cur_vinsn
);
5310 xtensa_num_pipe_stages
= xtensa_isa_num_pipe_stages (isa
);
5312 init_op_placement_info_table ();
5314 /* Set up the assembly state. */
5315 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5316 xtensa_set_frag_assembly_state (frag_now
);
5318 if (!use_literal_section
)
5319 xtensa_mark_literal_pool_location ();
5323 /* TC_INIT_FIX_DATA hook */
5326 xtensa_init_fix_data (fixS
*x
)
5328 x
->tc_fix_data
.slot
= 0;
5329 x
->tc_fix_data
.X_add_symbol
= NULL
;
5330 x
->tc_fix_data
.X_add_number
= 0;
5334 /* tc_frob_label hook */
5337 xtensa_frob_label (symbolS
*sym
)
5341 if (cur_vinsn
.inside_bundle
)
5343 as_bad (_("labels are not valid inside bundles"));
5347 freq
= get_subseg_target_freq (now_seg
, now_subseg
);
5349 /* Since the label was already attached to a frag associated with the
5350 previous basic block, it now needs to be reset to the current frag. */
5351 symbol_set_frag (sym
, frag_now
);
5352 S_SET_VALUE (sym
, (valueT
) frag_now_fix ());
5354 if (generating_literals
)
5355 xtensa_add_literal_sym (sym
);
5357 xtensa_add_insn_label (sym
);
5359 if (symbol_get_tc (sym
)->is_loop_target
)
5361 if ((get_last_insn_flags (now_seg
, now_subseg
)
5362 & FLAG_IS_BAD_LOOPEND
) != 0)
5363 as_bad (_("invalid last instruction for a zero-overhead loop"));
5365 xtensa_set_frag_assembly_state (frag_now
);
5366 frag_var (rs_machine_dependent
, 4, 4, RELAX_LOOP_END
,
5367 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5369 xtensa_set_frag_assembly_state (frag_now
);
5370 xtensa_move_labels (frag_now
, 0);
5373 /* No target aligning in the absolute section. */
5374 if (now_seg
!= absolute_section
5375 && !is_unaligned_label (sym
)
5376 && !generating_literals
)
5378 xtensa_set_frag_assembly_state (frag_now
);
5380 if (do_align_targets ())
5381 frag_var (rs_machine_dependent
, 0, (int) freq
,
5382 RELAX_DESIRE_ALIGN_IF_TARGET
, frag_now
->fr_symbol
,
5383 frag_now
->fr_offset
, NULL
);
5385 frag_var (rs_fill
, 0, 0, frag_now
->fr_subtype
,
5386 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
5387 xtensa_set_frag_assembly_state (frag_now
);
5388 xtensa_move_labels (frag_now
, 0);
5391 /* We need to mark the following properties even if we aren't aligning. */
5393 /* If the label is already known to be a branch target, i.e., a
5394 forward branch, mark the frag accordingly. Backward branches
5395 are handled by xg_add_branch_and_loop_targets. */
5396 if (symbol_get_tc (sym
)->is_branch_target
)
5397 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
5399 /* Loops only go forward, so they can be identified here. */
5400 if (symbol_get_tc (sym
)->is_loop_target
)
5401 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
5403 dwarf2_emit_label (sym
);
5407 /* tc_unrecognized_line hook */
5410 xtensa_unrecognized_line (int ch
)
5415 if (cur_vinsn
.inside_bundle
== 0)
5417 /* PR8110: Cannot emit line number info inside a FLIX bundle
5418 when using --gstabs. Temporarily disable debug info. */
5419 generate_lineno_debug ();
5420 if (debug_type
== DEBUG_STABS
)
5422 xt_saved_debug_type
= debug_type
;
5423 debug_type
= DEBUG_NONE
;
5426 cur_vinsn
.inside_bundle
= 1;
5430 as_bad (_("extra opening brace"));
5436 if (cur_vinsn
.inside_bundle
)
5437 finish_vinsn (&cur_vinsn
);
5440 as_bad (_("extra closing brace"));
5445 as_bad (_("syntax error"));
5452 /* md_flush_pending_output hook */
5455 xtensa_flush_pending_output (void)
5457 /* This line fixes a bug where automatically generated gstabs info
5458 separates a function label from its entry instruction, ending up
5459 with the literal position between the function label and the entry
5460 instruction and crashing code. It only happens with --gstabs and
5461 --text-section-literals, and when several other obscure relaxation
5462 conditions are met. */
5463 if (outputting_stabs_line_debug
)
5466 if (cur_vinsn
.inside_bundle
)
5467 as_bad (_("missing closing brace"));
5469 /* If there is a non-zero instruction fragment, close it. */
5470 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
5472 frag_wane (frag_now
);
5474 xtensa_set_frag_assembly_state (frag_now
);
5476 frag_now
->tc_frag_data
.is_insn
= FALSE
;
5478 xtensa_clear_insn_labels ();
5482 /* We had an error while parsing an instruction. The string might look
5483 like this: "insn arg1, arg2 }". If so, we need to see the closing
5484 brace and reset some fields. Otherwise, the vinsn never gets closed
5485 and the num_slots field will grow past the end of the array of slots,
5486 and bad things happen. */
5489 error_reset_cur_vinsn (void)
5491 if (cur_vinsn
.inside_bundle
)
5493 if (*input_line_pointer
== '}'
5494 || *(input_line_pointer
- 1) == '}'
5495 || *(input_line_pointer
- 2) == '}')
5496 xg_clear_vinsn (&cur_vinsn
);
5502 md_assemble (char *str
)
5504 xtensa_isa isa
= xtensa_default_isa
;
5507 bfd_boolean has_underbar
= FALSE
;
5508 char *arg_strings
[MAX_INSN_ARGS
];
5510 TInsn orig_insn
; /* Original instruction from the input. */
5512 tinsn_init (&orig_insn
);
5514 /* Split off the opcode. */
5515 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
5516 opname
= xstrndup (str
, opnamelen
);
5518 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
5521 as_bad (_("syntax error"));
5525 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
5528 /* Check for an underbar prefix. */
5531 has_underbar
= TRUE
;
5535 orig_insn
.insn_type
= ITYPE_INSN
;
5537 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_transform ());
5538 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
5540 /* Special case: Check for "CALLXn.TLS" pseudo op. If found, grab its
5541 extra argument and set the opcode to "CALLXn". */
5542 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5543 && strncasecmp (opname
, "callx", 5) == 0)
5545 unsigned long window_size
;
5548 window_size
= strtoul (opname
+ 5, &suffix
, 10);
5549 if (suffix
!= opname
+ 5
5550 && (window_size
== 0
5553 || window_size
== 12)
5554 && strcasecmp (suffix
, ".tls") == 0)
5556 switch (window_size
)
5558 case 0: orig_insn
.opcode
= xtensa_callx0_opcode
; break;
5559 case 4: orig_insn
.opcode
= xtensa_callx4_opcode
; break;
5560 case 8: orig_insn
.opcode
= xtensa_callx8_opcode
; break;
5561 case 12: orig_insn
.opcode
= xtensa_callx12_opcode
; break;
5565 as_bad (_("wrong number of operands for '%s'"), opname
);
5568 bfd_reloc_code_real_type reloc
;
5569 char *old_input_line_pointer
;
5570 expressionS
*tok
= &orig_insn
.extra_arg
;
5572 old_input_line_pointer
= input_line_pointer
;
5573 input_line_pointer
= arg_strings
[num_args
- 1];
5576 if (tok
->X_op
== O_symbol
5577 && ((reloc
= xtensa_elf_suffix (&input_line_pointer
, tok
))
5578 == BFD_RELOC_XTENSA_TLS_CALL
))
5579 tok
->X_op
= map_suffix_reloc_to_operator (reloc
);
5581 as_bad (_("bad relocation expression for '%s'"), opname
);
5583 input_line_pointer
= old_input_line_pointer
;
5589 /* Special case: Check for "j.l" pseudo op. */
5590 if (orig_insn
.opcode
== XTENSA_UNDEFINED
5591 && strncasecmp (opname
, "j.l", 3) == 0)
5594 as_bad (_("wrong number of operands for '%s'"), opname
);
5597 char *old_input_line_pointer
;
5598 expressionS
*tok
= &orig_insn
.extra_arg
;
5600 old_input_line_pointer
= input_line_pointer
;
5601 input_line_pointer
= arg_strings
[num_args
- 1];
5603 expression_maybe_register (xtensa_jx_opcode
, 0, tok
);
5604 input_line_pointer
= old_input_line_pointer
;
5607 orig_insn
.opcode
= xtensa_j_opcode
;
5611 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
5613 xtensa_format fmt
= xtensa_format_lookup (isa
, opname
);
5614 if (fmt
== XTENSA_UNDEFINED
)
5616 as_bad (_("unknown opcode or format name '%s'"), opname
);
5617 error_reset_cur_vinsn ();
5620 if (!cur_vinsn
.inside_bundle
)
5622 as_bad (_("format names only valid inside bundles"));
5623 error_reset_cur_vinsn ();
5626 if (cur_vinsn
.format
!= XTENSA_UNDEFINED
)
5627 as_warn (_("multiple formats specified for one bundle; using '%s'"),
5629 cur_vinsn
.format
= fmt
;
5630 free (has_underbar
? opname
- 1 : opname
);
5631 error_reset_cur_vinsn ();
5635 /* Parse the arguments. */
5636 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
5638 as_bad (_("syntax error"));
5639 error_reset_cur_vinsn ();
5643 /* Free the opcode and argument strings, now that they've been parsed. */
5644 free (has_underbar
? opname
- 1 : opname
);
5646 while (num_args
-- > 0)
5647 free (arg_strings
[num_args
]);
5649 /* Get expressions for invisible operands. */
5650 if (get_invisible_operands (&orig_insn
))
5652 error_reset_cur_vinsn ();
5656 /* Check for the right number and type of arguments. */
5657 if (tinsn_check_arguments (&orig_insn
))
5659 error_reset_cur_vinsn ();
5663 /* Record the line number for each TInsn, because a FLIX bundle may be
5664 spread across multiple input lines and individual instructions may be
5665 moved around in some cases. */
5666 orig_insn
.loc_directive_seen
= dwarf2_loc_directive_seen
;
5667 dwarf2_where (&orig_insn
.debug_line
);
5668 dwarf2_consume_line_info ();
5670 xg_add_branch_and_loop_targets (&orig_insn
);
5672 /* Check that immediate value for ENTRY is >= 16. */
5673 if (orig_insn
.opcode
== xtensa_entry_opcode
&& orig_insn
.ntok
>= 3)
5675 expressionS
*exp
= &orig_insn
.tok
[2];
5676 if (exp
->X_op
== O_constant
&& exp
->X_add_number
< 16)
5677 as_warn (_("entry instruction with stack decrement < 16"));
5681 assemble_tokens (opcode, tok, ntok);
5682 expand the tokens from the orig_insn into the
5683 stack of instructions that will not expand
5684 unless required at relaxation time. */
5686 if (!cur_vinsn
.inside_bundle
)
5687 emit_single_op (&orig_insn
);
5688 else /* We are inside a bundle. */
5690 cur_vinsn
.slots
[cur_vinsn
.num_slots
] = orig_insn
;
5691 cur_vinsn
.num_slots
++;
5692 if (*input_line_pointer
== '}'
5693 || *(input_line_pointer
- 1) == '}'
5694 || *(input_line_pointer
- 2) == '}')
5695 finish_vinsn (&cur_vinsn
);
5698 /* We've just emitted a new instruction so clear the list of labels. */
5699 xtensa_clear_insn_labels ();
5701 xtensa_check_frag_count ();
5705 /* HANDLE_ALIGN hook */
5707 /* For a .align directive, we mark the previous block with the alignment
5708 information. This will be placed in the object file in the
5709 property section corresponding to this section. */
5712 xtensa_handle_align (fragS
*fragP
)
5715 && ! fragP
->tc_frag_data
.is_literal
5716 && (fragP
->fr_type
== rs_align
5717 || fragP
->fr_type
== rs_align_code
)
5718 && fragP
->fr_offset
> 0
5719 && now_seg
!= bss_section
)
5721 fragP
->tc_frag_data
.is_align
= TRUE
;
5722 fragP
->tc_frag_data
.alignment
= fragP
->fr_offset
;
5725 if (fragP
->fr_type
== rs_align_test
)
5728 count
= fragP
->fr_next
->fr_address
- fragP
->fr_address
- fragP
->fr_fix
;
5730 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
5731 _("unaligned entry instruction"));
5734 if (linkrelax
&& fragP
->fr_type
== rs_org
)
5735 fragP
->fr_subtype
= RELAX_ORG
;
5739 /* TC_FRAG_INIT hook */
5742 xtensa_frag_init (fragS
*frag
)
5744 xtensa_set_frag_assembly_state (frag
);
5749 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
5755 /* Round up a section size to the appropriate boundary. */
5758 md_section_align (segT segment ATTRIBUTE_UNUSED
, valueT size
)
5760 return size
; /* Byte alignment is fine. */
5765 md_pcrel_from (fixS
*fixP
)
5768 static xtensa_insnbuf insnbuf
= NULL
;
5769 static xtensa_insnbuf slotbuf
= NULL
;
5772 xtensa_opcode opcode
;
5775 xtensa_isa isa
= xtensa_default_isa
;
5776 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5777 bfd_boolean alt_reloc
;
5779 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5782 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
)
5787 insnbuf
= xtensa_insnbuf_alloc (isa
);
5788 slotbuf
= xtensa_insnbuf_alloc (isa
);
5791 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5792 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) insn_p
, 0);
5793 fmt
= xtensa_format_decode (isa
, insnbuf
);
5795 if (fmt
== XTENSA_UNDEFINED
)
5796 as_fatal (_("bad instruction format"));
5798 if (decode_reloc (fixP
->fx_r_type
, &slot
, &alt_reloc
) != 0)
5799 as_fatal (_("invalid relocation"));
5801 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
5802 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
5804 /* Check for "alternate" relocations (operand not specified). None
5805 of the current uses for these are really PC-relative. */
5806 if (alt_reloc
|| opcode
== xtensa_const16_opcode
)
5808 if (opcode
!= xtensa_l32r_opcode
5809 && opcode
!= xtensa_const16_opcode
)
5810 as_fatal (_("invalid relocation for '%s' instruction"),
5811 xtensa_opcode_name (isa
, opcode
));
5815 opnum
= get_relaxable_immed (opcode
);
5817 if (xtensa_operand_is_PCrelative (isa
, opcode
, opnum
) != 1
5818 || xtensa_operand_do_reloc (isa
, opcode
, opnum
, &opnd_value
, addr
))
5820 as_bad_where (fixP
->fx_file
,
5822 _("invalid relocation for operand %d of '%s'"),
5823 opnum
, xtensa_opcode_name (isa
, opcode
));
5826 return 0 - opnd_value
;
5830 /* TC_FORCE_RELOCATION hook */
5833 xtensa_force_relocation (fixS
*fix
)
5835 switch (fix
->fx_r_type
)
5837 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5838 case BFD_RELOC_XTENSA_SLOT0_ALT
:
5839 case BFD_RELOC_XTENSA_SLOT1_ALT
:
5840 case BFD_RELOC_XTENSA_SLOT2_ALT
:
5841 case BFD_RELOC_XTENSA_SLOT3_ALT
:
5842 case BFD_RELOC_XTENSA_SLOT4_ALT
:
5843 case BFD_RELOC_XTENSA_SLOT5_ALT
:
5844 case BFD_RELOC_XTENSA_SLOT6_ALT
:
5845 case BFD_RELOC_XTENSA_SLOT7_ALT
:
5846 case BFD_RELOC_XTENSA_SLOT8_ALT
:
5847 case BFD_RELOC_XTENSA_SLOT9_ALT
:
5848 case BFD_RELOC_XTENSA_SLOT10_ALT
:
5849 case BFD_RELOC_XTENSA_SLOT11_ALT
:
5850 case BFD_RELOC_XTENSA_SLOT12_ALT
:
5851 case BFD_RELOC_XTENSA_SLOT13_ALT
:
5852 case BFD_RELOC_XTENSA_SLOT14_ALT
:
5858 if (linkrelax
&& fix
->fx_addsy
5859 && relaxable_section (S_GET_SEGMENT (fix
->fx_addsy
)))
5862 return generic_force_reloc (fix
);
5866 /* TC_VALIDATE_FIX_SUB hook */
5869 xtensa_validate_fix_sub (fixS
*fix
)
5871 segT add_symbol_segment
, sub_symbol_segment
;
5873 /* The difference of two symbols should be resolved by the assembler when
5874 linkrelax is not set. If the linker may relax the section containing
5875 the symbols, then an Xtensa DIFF relocation must be generated so that
5876 the linker knows to adjust the difference value. */
5877 if (!linkrelax
|| fix
->fx_addsy
== NULL
)
5880 /* Make sure both symbols are in the same segment, and that segment is
5881 "normal" and relaxable. If the segment is not "normal", then the
5882 fix is not valid. If the segment is not "relaxable", then the fix
5883 should have been handled earlier. */
5884 add_symbol_segment
= S_GET_SEGMENT (fix
->fx_addsy
);
5885 if (! SEG_NORMAL (add_symbol_segment
) ||
5886 ! relaxable_section (add_symbol_segment
))
5888 sub_symbol_segment
= S_GET_SEGMENT (fix
->fx_subsy
);
5889 return (sub_symbol_segment
== add_symbol_segment
);
5893 /* NO_PSEUDO_DOT hook */
5895 /* This function has nothing to do with pseudo dots, but this is the
5896 nearest macro to where the check needs to take place. FIXME: This
5900 xtensa_check_inside_bundle (void)
5902 if (cur_vinsn
.inside_bundle
&& input_line_pointer
[-1] == '.')
5903 as_bad (_("directives are not valid inside bundles"));
5905 /* This function must always return FALSE because it is called via a
5906 macro that has nothing to do with bundling. */
5911 /* md_elf_section_change_hook */
5914 xtensa_elf_section_change_hook (void)
5916 /* Set up the assembly state. */
5917 if (!frag_now
->tc_frag_data
.is_assembly_state_set
)
5918 xtensa_set_frag_assembly_state (frag_now
);
5920 if (!use_literal_section
5921 && seg_info (now_seg
)->tc_segment_info_data
.literal_pool_loc
== NULL
5922 && !xtensa_is_init_fini (now_seg
))
5923 xtensa_mark_literal_pool_location ();
5927 /* tc_fix_adjustable hook */
5930 xtensa_fix_adjustable (fixS
*fixP
)
5932 /* We need the symbol name for the VTABLE entries. */
5933 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5934 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5941 /* tc_symbol_new_hook */
5943 symbolS
*expr_symbols
= NULL
;
5946 xtensa_symbol_new_hook (symbolS
*sym
)
5948 if (is_leb128_expr
&& S_GET_SEGMENT (sym
) == expr_section
)
5950 symbol_get_tc (sym
)->next_expr_symbol
= expr_symbols
;
5957 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
5959 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5962 /* Subtracted symbols are only allowed for a few relocation types, and
5963 unless linkrelax is enabled, they should not make it to this point. */
5964 if (fixP
->fx_subsy
&& !(linkrelax
&& (fixP
->fx_r_type
== BFD_RELOC_32
5965 || fixP
->fx_r_type
== BFD_RELOC_16
5966 || fixP
->fx_r_type
== BFD_RELOC_8
)))
5967 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
5969 switch (fixP
->fx_r_type
)
5971 case BFD_RELOC_32_PCREL
:
5977 bfd_boolean neg
= S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
5978 < S_GET_VALUE (fixP
->fx_subsy
);
5980 switch (fixP
->fx_r_type
)
5983 fixP
->fx_r_type
= neg
5984 ? BFD_RELOC_XTENSA_NDIFF8
: BFD_RELOC_XTENSA_PDIFF8
;
5985 fixP
->fx_signed
= 0;
5988 fixP
->fx_r_type
= neg
5989 ? BFD_RELOC_XTENSA_NDIFF16
: BFD_RELOC_XTENSA_PDIFF16
;
5990 fixP
->fx_signed
= 0;
5993 fixP
->fx_r_type
= neg
5994 ? BFD_RELOC_XTENSA_NDIFF32
: BFD_RELOC_XTENSA_PDIFF32
;
5995 fixP
->fx_signed
= 0;
6001 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6002 - S_GET_VALUE (fixP
->fx_subsy
));
6004 /* The difference value gets written out, and the DIFF reloc
6005 identifies the address of the subtracted symbol (i.e., the one
6006 with the lowest address). */
6008 fixP
->fx_offset
-= val
;
6009 fixP
->fx_subsy
= NULL
;
6011 else if (! fixP
->fx_addsy
)
6016 else if (S_GET_SEGMENT (fixP
->fx_addsy
) == absolute_section
)
6018 val
= S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
;
6024 case BFD_RELOC_XTENSA_PLT
:
6025 md_number_to_chars (fixpos
, val
, fixP
->fx_size
);
6026 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6029 case BFD_RELOC_XTENSA_TLSDESC_FN
:
6030 case BFD_RELOC_XTENSA_TLSDESC_ARG
:
6031 case BFD_RELOC_XTENSA_TLS_TPOFF
:
6032 case BFD_RELOC_XTENSA_TLS_DTPOFF
:
6033 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
6034 md_number_to_chars (fixpos
, 0, fixP
->fx_size
);
6035 fixP
->fx_no_overflow
= 0; /* Use the standard overflow check. */
6038 case BFD_RELOC_XTENSA_SLOT0_OP
:
6039 case BFD_RELOC_XTENSA_SLOT1_OP
:
6040 case BFD_RELOC_XTENSA_SLOT2_OP
:
6041 case BFD_RELOC_XTENSA_SLOT3_OP
:
6042 case BFD_RELOC_XTENSA_SLOT4_OP
:
6043 case BFD_RELOC_XTENSA_SLOT5_OP
:
6044 case BFD_RELOC_XTENSA_SLOT6_OP
:
6045 case BFD_RELOC_XTENSA_SLOT7_OP
:
6046 case BFD_RELOC_XTENSA_SLOT8_OP
:
6047 case BFD_RELOC_XTENSA_SLOT9_OP
:
6048 case BFD_RELOC_XTENSA_SLOT10_OP
:
6049 case BFD_RELOC_XTENSA_SLOT11_OP
:
6050 case BFD_RELOC_XTENSA_SLOT12_OP
:
6051 case BFD_RELOC_XTENSA_SLOT13_OP
:
6052 case BFD_RELOC_XTENSA_SLOT14_OP
:
6055 /* Write the tentative value of a PC-relative relocation to a
6056 local symbol into the instruction. The value will be ignored
6057 by the linker, and it makes the object file disassembly
6058 readable when all branch targets are encoded in relocations. */
6060 gas_assert (fixP
->fx_addsy
);
6061 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
6062 && !S_FORCE_RELOC (fixP
->fx_addsy
, 1))
6064 val
= (S_GET_VALUE (fixP
->fx_addsy
) + fixP
->fx_offset
6065 - md_pcrel_from (fixP
));
6066 (void) xg_apply_fix_value (fixP
, val
);
6069 else if (! fixP
->fx_addsy
)
6072 if (xg_apply_fix_value (fixP
, val
))
6077 case BFD_RELOC_XTENSA_ASM_EXPAND
:
6078 case BFD_RELOC_XTENSA_TLS_FUNC
:
6079 case BFD_RELOC_XTENSA_TLS_ARG
:
6080 case BFD_RELOC_XTENSA_TLS_CALL
:
6081 case BFD_RELOC_XTENSA_SLOT0_ALT
:
6082 case BFD_RELOC_XTENSA_SLOT1_ALT
:
6083 case BFD_RELOC_XTENSA_SLOT2_ALT
:
6084 case BFD_RELOC_XTENSA_SLOT3_ALT
:
6085 case BFD_RELOC_XTENSA_SLOT4_ALT
:
6086 case BFD_RELOC_XTENSA_SLOT5_ALT
:
6087 case BFD_RELOC_XTENSA_SLOT6_ALT
:
6088 case BFD_RELOC_XTENSA_SLOT7_ALT
:
6089 case BFD_RELOC_XTENSA_SLOT8_ALT
:
6090 case BFD_RELOC_XTENSA_SLOT9_ALT
:
6091 case BFD_RELOC_XTENSA_SLOT10_ALT
:
6092 case BFD_RELOC_XTENSA_SLOT11_ALT
:
6093 case BFD_RELOC_XTENSA_SLOT12_ALT
:
6094 case BFD_RELOC_XTENSA_SLOT13_ALT
:
6095 case BFD_RELOC_XTENSA_SLOT14_ALT
:
6096 /* These all need to be resolved at link-time. Do nothing now. */
6099 case BFD_RELOC_VTABLE_INHERIT
:
6100 case BFD_RELOC_VTABLE_ENTRY
:
6105 as_bad (_("unhandled local relocation fix %s"),
6106 bfd_get_reloc_code_name (fixP
->fx_r_type
));
6112 md_atof (int type
, char *litP
, int *sizeP
)
6114 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
6119 md_estimate_size_before_relax (fragS
*fragP
, segT seg ATTRIBUTE_UNUSED
)
6121 return total_frag_text_expansion (fragP
);
6125 /* Translate internal representation of relocation info to BFD target
6129 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
6133 reloc
= XNEW (arelent
);
6134 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
6135 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
6136 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
6138 /* Make sure none of our internal relocations make it this far.
6139 They'd better have been fully resolved by this point. */
6140 gas_assert ((int) fixp
->fx_r_type
> 0);
6142 reloc
->addend
= fixp
->fx_offset
;
6144 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
6145 if (reloc
->howto
== NULL
)
6147 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
6148 _("cannot represent `%s' relocation in object file"),
6149 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6150 free (reloc
->sym_ptr_ptr
);
6155 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
6156 as_fatal (_("internal error; cannot generate `%s' relocation"),
6157 bfd_get_reloc_code_name (fixp
->fx_r_type
));
6163 /* Checks for resource conflicts between instructions. */
6165 /* The func unit stuff could be implemented as bit-vectors rather
6166 than the iterative approach here. If it ends up being too
6167 slow, we will switch it. */
6170 new_resource_table (void *data
,
6173 unit_num_copies_func uncf
,
6174 opcode_num_units_func onuf
,
6175 opcode_funcUnit_use_unit_func ouuf
,
6176 opcode_funcUnit_use_stage_func ousf
)
6179 resource_table
*rt
= XNEW (resource_table
);
6181 rt
->cycles
= cycles
;
6182 rt
->allocated_cycles
= cycles
;
6184 rt
->unit_num_copies
= uncf
;
6185 rt
->opcode_num_units
= onuf
;
6186 rt
->opcode_unit_use
= ouuf
;
6187 rt
->opcode_unit_stage
= ousf
;
6189 rt
->units
= XCNEWVEC (unsigned char *, cycles
);
6190 for (i
= 0; i
< cycles
; i
++)
6191 rt
->units
[i
] = XCNEWVEC (unsigned char, nu
);
6198 clear_resource_table (resource_table
*rt
)
6201 for (i
= 0; i
< rt
->allocated_cycles
; i
++)
6202 for (j
= 0; j
< rt
->num_units
; j
++)
6203 rt
->units
[i
][j
] = 0;
6207 /* We never shrink it, just fake it into thinking so. */
6210 resize_resource_table (resource_table
*rt
, int cycles
)
6214 rt
->cycles
= cycles
;
6215 if (cycles
<= rt
->allocated_cycles
)
6218 old_cycles
= rt
->allocated_cycles
;
6219 rt
->allocated_cycles
= cycles
;
6221 rt
->units
= XRESIZEVEC (unsigned char *, rt
->units
, rt
->allocated_cycles
);
6222 for (i
= 0; i
< old_cycles
; i
++)
6223 rt
->units
[i
] = XRESIZEVEC (unsigned char, rt
->units
[i
], rt
->num_units
);
6224 for (i
= old_cycles
; i
< cycles
; i
++)
6225 rt
->units
[i
] = XCNEWVEC (unsigned char, rt
->num_units
);
6230 resources_available (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6233 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6235 for (i
= 0; i
< uses
; i
++)
6237 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6238 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6239 int copies_in_use
= rt
->units
[stage
+ cycle
][unit
];
6240 int copies
= (rt
->unit_num_copies
) (rt
->data
, unit
);
6241 if (copies_in_use
>= copies
)
6249 reserve_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6252 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6254 for (i
= 0; i
< uses
; i
++)
6256 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6257 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6258 /* Note that this allows resources to be oversubscribed. That's
6259 essential to the way the optional scheduler works.
6260 resources_available reports when a resource is over-subscribed,
6261 so it's easy to tell. */
6262 rt
->units
[stage
+ cycle
][unit
]++;
6268 release_resources (resource_table
*rt
, xtensa_opcode opcode
, int cycle
)
6271 int uses
= (rt
->opcode_num_units
) (rt
->data
, opcode
);
6273 for (i
= 0; i
< uses
; i
++)
6275 xtensa_funcUnit unit
= (rt
->opcode_unit_use
) (rt
->data
, opcode
, i
);
6276 int stage
= (rt
->opcode_unit_stage
) (rt
->data
, opcode
, i
);
6277 gas_assert (rt
->units
[stage
+ cycle
][unit
] > 0);
6278 rt
->units
[stage
+ cycle
][unit
]--;
6283 /* Wrapper functions make parameterized resource reservation
6287 opcode_funcUnit_use_unit (void *data
, xtensa_opcode opcode
, int idx
)
6289 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6295 opcode_funcUnit_use_stage (void *data
, xtensa_opcode opcode
, int idx
)
6297 xtensa_funcUnit_use
*use
= xtensa_opcode_funcUnit_use (data
, opcode
, idx
);
6302 /* Note that this function does not check issue constraints, but
6303 solely whether the hardware is available to execute the given
6304 instructions together. It also doesn't check if the tinsns
6305 write the same state, or access the same tieports. That is
6306 checked by check_t1_t2_reads_and_writes. */
6309 resources_conflict (vliw_insn
*vinsn
)
6312 static resource_table
*rt
= NULL
;
6314 /* This is the most common case by far. Optimize it. */
6315 if (vinsn
->num_slots
== 1)
6320 xtensa_isa isa
= xtensa_default_isa
;
6321 rt
= new_resource_table
6322 (isa
, xtensa_num_pipe_stages
,
6323 xtensa_isa_num_funcUnits (isa
),
6324 (unit_num_copies_func
) xtensa_funcUnit_num_copies
,
6325 (opcode_num_units_func
) xtensa_opcode_num_funcUnit_uses
,
6326 opcode_funcUnit_use_unit
,
6327 opcode_funcUnit_use_stage
);
6330 clear_resource_table (rt
);
6332 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6334 if (!resources_available (rt
, vinsn
->slots
[i
].opcode
, 0))
6336 reserve_resources (rt
, vinsn
->slots
[i
].opcode
, 0);
6343 /* finish_vinsn, emit_single_op and helper functions. */
6345 static bfd_boolean
find_vinsn_conflicts (vliw_insn
*);
6346 static xtensa_format
xg_find_narrowest_format (vliw_insn
*);
6347 static void xg_assemble_vliw_tokens (vliw_insn
*);
6350 /* We have reached the end of a bundle; emit into the frag. */
6353 finish_vinsn (vliw_insn
*vinsn
)
6359 if (find_vinsn_conflicts (vinsn
))
6361 xg_clear_vinsn (vinsn
);
6365 /* First, find a format that works. */
6366 if (vinsn
->format
== XTENSA_UNDEFINED
)
6367 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6369 slots
= xtensa_format_num_slots (xtensa_default_isa
, vinsn
->format
);
6371 && produce_flix
== FLIX_NONE
)
6373 as_bad (_("The option \"--no-allow-flix\" prohibits multi-slot flix."));
6374 xg_clear_vinsn (vinsn
);
6378 if (vinsn
->format
== XTENSA_UNDEFINED
)
6380 as_bad (_("couldn't find a valid instruction format"));
6381 fprintf (stderr
, _(" ops were: "));
6382 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6383 fprintf (stderr
, _(" %s;"),
6384 xtensa_opcode_name (xtensa_default_isa
,
6385 vinsn
->slots
[i
].opcode
));
6386 fprintf (stderr
, _("\n"));
6387 xg_clear_vinsn (vinsn
);
6391 if (vinsn
->num_slots
!= slots
)
6393 as_bad (_("mismatch for format '%s': #slots = %d, #opcodes = %d"),
6394 xtensa_format_name (xtensa_default_isa
, vinsn
->format
),
6395 slots
, vinsn
->num_slots
);
6396 xg_clear_vinsn (vinsn
);
6400 if (resources_conflict (vinsn
))
6402 as_bad (_("illegal resource usage in bundle"));
6403 fprintf (stderr
, " ops were: ");
6404 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6405 fprintf (stderr
, " %s;",
6406 xtensa_opcode_name (xtensa_default_isa
,
6407 vinsn
->slots
[i
].opcode
));
6408 fprintf (stderr
, "\n");
6409 xg_clear_vinsn (vinsn
);
6413 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6415 if (vinsn
->slots
[i
].opcode
!= XTENSA_UNDEFINED
)
6417 symbolS
*lit_sym
= NULL
;
6419 bfd_boolean e
= FALSE
;
6420 bfd_boolean saved_density
= density_supported
;
6422 /* We don't want to narrow ops inside multi-slot bundles. */
6423 if (vinsn
->num_slots
> 1)
6424 density_supported
= FALSE
;
6426 istack_init (&slotstack
);
6427 if (vinsn
->slots
[i
].opcode
== xtensa_nop_opcode
)
6429 vinsn
->slots
[i
].opcode
=
6430 xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6432 vinsn
->slots
[i
].ntok
= 0;
6435 if (xg_expand_assembly_insn (&slotstack
, &vinsn
->slots
[i
]))
6441 density_supported
= saved_density
;
6445 xg_clear_vinsn (vinsn
);
6449 for (j
= 0; j
< slotstack
.ninsn
; j
++)
6451 TInsn
*insn
= &slotstack
.insn
[j
];
6452 if (insn
->insn_type
== ITYPE_LITERAL
)
6454 gas_assert (lit_sym
== NULL
);
6455 lit_sym
= xg_assemble_literal (insn
);
6459 gas_assert (insn
->insn_type
== ITYPE_INSN
);
6461 xg_resolve_literals (insn
, lit_sym
);
6462 if (j
!= slotstack
.ninsn
- 1)
6463 emit_single_op (insn
);
6467 if (vinsn
->num_slots
> 1)
6469 if (opcode_fits_format_slot
6470 (slotstack
.insn
[slotstack
.ninsn
- 1].opcode
,
6473 vinsn
->slots
[i
] = slotstack
.insn
[slotstack
.ninsn
- 1];
6477 emit_single_op (&slotstack
.insn
[slotstack
.ninsn
- 1]);
6478 if (vinsn
->format
== XTENSA_UNDEFINED
)
6479 vinsn
->slots
[i
].opcode
= xtensa_nop_opcode
;
6481 vinsn
->slots
[i
].opcode
6482 = xtensa_format_slot_nop_opcode (xtensa_default_isa
,
6485 vinsn
->slots
[i
].ntok
= 0;
6490 vinsn
->slots
[0] = slotstack
.insn
[slotstack
.ninsn
- 1];
6491 vinsn
->format
= XTENSA_UNDEFINED
;
6496 /* Now check resource conflicts on the modified bundle. */
6497 if (resources_conflict (vinsn
))
6499 as_bad (_("illegal resource usage in bundle"));
6500 fprintf (stderr
, " ops were: ");
6501 for (i
= 0; i
< vinsn
->num_slots
; i
++)
6502 fprintf (stderr
, " %s;",
6503 xtensa_opcode_name (xtensa_default_isa
,
6504 vinsn
->slots
[i
].opcode
));
6505 fprintf (stderr
, "\n");
6506 xg_clear_vinsn (vinsn
);
6510 /* First, find a format that works. */
6511 if (vinsn
->format
== XTENSA_UNDEFINED
)
6512 vinsn
->format
= xg_find_narrowest_format (vinsn
);
6514 xg_assemble_vliw_tokens (vinsn
);
6516 xg_clear_vinsn (vinsn
);
6518 xtensa_check_frag_count ();
6522 /* Given an vliw instruction, what conflicts are there in register
6523 usage and in writes to states and queues?
6525 This function does two things:
6526 1. Reports an error when a vinsn contains illegal combinations
6527 of writes to registers states or queues.
6528 2. Marks individual tinsns as not relaxable if the combination
6529 contains antidependencies.
6531 Job 2 handles things like swap semantics in instructions that need
6532 to be relaxed. For example,
6536 normally would be relaxed to
6541 _but_, if the above instruction is bundled with an a0 reader, e.g.,
6543 { addi a0, a1, 10000 ; add a2, a0, a4 ; }
6545 then we can't relax it into
6548 { add a0, a1, a0 ; add a2, a0, a4 ; }
6550 because the value of a0 is trashed before the second add can read it. */
6552 static char check_t1_t2_reads_and_writes (TInsn
*, TInsn
*);
6555 find_vinsn_conflicts (vliw_insn
*vinsn
)
6559 xtensa_isa isa
= xtensa_default_isa
;
6561 gas_assert (!past_xtensa_end
);
6563 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6565 TInsn
*op1
= &vinsn
->slots
[i
];
6566 if (op1
->is_specific_opcode
)
6567 op1
->keep_wide
= TRUE
;
6569 op1
->keep_wide
= FALSE
;
6572 for (i
= 0 ; i
< vinsn
->num_slots
; i
++)
6574 TInsn
*op1
= &vinsn
->slots
[i
];
6576 if (xtensa_opcode_is_branch (isa
, op1
->opcode
) == 1)
6579 for (j
= 0; j
< vinsn
->num_slots
; j
++)
6583 TInsn
*op2
= &vinsn
->slots
[j
];
6584 char conflict_type
= check_t1_t2_reads_and_writes (op1
, op2
);
6585 switch (conflict_type
)
6588 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same register"),
6589 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6590 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6593 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same state"),
6594 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6595 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6598 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) write the same port"),
6599 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6600 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6603 as_bad (_("opcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accesses"),
6604 xtensa_opcode_name (isa
, op1
->opcode
), i
,
6605 xtensa_opcode_name (isa
, op2
->opcode
), j
);
6608 /* Everything is OK. */
6611 op2
->is_specific_opcode
= (op2
->is_specific_opcode
6612 || conflict_type
== 'a');
6619 as_bad (_("multiple branches or jumps in the same bundle"));
6627 /* Check how the state used by t1 and t2 relate.
6630 case A: t1 reads a register t2 writes (an antidependency within a bundle)
6631 case B: no relationship between what is read and written (both could
6632 read the same reg though)
6633 case C: t1 writes a register t2 writes (a register conflict within a
6635 case D: t1 writes a state that t2 also writes
6636 case E: t1 writes a tie queue that t2 also writes
6637 case F: two volatile queue accesses
6641 check_t1_t2_reads_and_writes (TInsn
*t1
, TInsn
*t2
)
6643 xtensa_isa isa
= xtensa_default_isa
;
6644 xtensa_regfile t1_regfile
, t2_regfile
;
6646 int t1_base_reg
, t1_last_reg
;
6647 int t2_base_reg
, t2_last_reg
;
6648 char t1_inout
, t2_inout
;
6650 char conflict
= 'b';
6655 bfd_boolean t1_volatile
= FALSE
;
6656 bfd_boolean t2_volatile
= FALSE
;
6658 /* Check registers. */
6659 for (j
= 0; j
< t2
->ntok
; j
++)
6661 if (xtensa_operand_is_register (isa
, t2
->opcode
, j
) != 1)
6664 t2_regfile
= xtensa_operand_regfile (isa
, t2
->opcode
, j
);
6665 t2_base_reg
= t2
->tok
[j
].X_add_number
;
6666 t2_last_reg
= t2_base_reg
+ xtensa_operand_num_regs (isa
, t2
->opcode
, j
);
6668 for (i
= 0; i
< t1
->ntok
; i
++)
6670 if (xtensa_operand_is_register (isa
, t1
->opcode
, i
) != 1)
6673 t1_regfile
= xtensa_operand_regfile (isa
, t1
->opcode
, i
);
6675 if (t1_regfile
!= t2_regfile
)
6678 t1_inout
= xtensa_operand_inout (isa
, t1
->opcode
, i
);
6679 t2_inout
= xtensa_operand_inout (isa
, t2
->opcode
, j
);
6681 if (xtensa_operand_is_known_reg (isa
, t1
->opcode
, i
) == 0
6682 || xtensa_operand_is_known_reg (isa
, t2
->opcode
, j
) == 0)
6684 if (t1_inout
== 'm' || t1_inout
== 'o'
6685 || t2_inout
== 'm' || t2_inout
== 'o')
6692 t1_base_reg
= t1
->tok
[i
].X_add_number
;
6693 t1_last_reg
= (t1_base_reg
6694 + xtensa_operand_num_regs (isa
, t1
->opcode
, i
));
6696 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
6698 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
6700 if (t1_reg
!= t2_reg
)
6703 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6709 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6715 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6723 t1_states
= xtensa_opcode_num_stateOperands (isa
, t1
->opcode
);
6724 t2_states
= xtensa_opcode_num_stateOperands (isa
, t2
->opcode
);
6725 for (j
= 0; j
< t2_states
; j
++)
6727 xtensa_state t2_so
= xtensa_stateOperand_state (isa
, t2
->opcode
, j
);
6728 t2_inout
= xtensa_stateOperand_inout (isa
, t2
->opcode
, j
);
6729 for (i
= 0; i
< t1_states
; i
++)
6731 xtensa_state t1_so
= xtensa_stateOperand_state (isa
, t1
->opcode
, i
);
6732 t1_inout
= xtensa_stateOperand_inout (isa
, t1
->opcode
, i
);
6733 if (t1_so
!= t2_so
|| xtensa_state_is_shared_or (isa
, t1_so
) == 1)
6736 if (t2_inout
== 'i' && (t1_inout
== 'm' || t1_inout
== 'o'))
6742 if (t1_inout
== 'i' && (t2_inout
== 'm' || t2_inout
== 'o'))
6748 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6753 /* Check tieports. */
6754 t1_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t1
->opcode
);
6755 t2_interfaces
= xtensa_opcode_num_interfaceOperands (isa
, t2
->opcode
);
6756 for (j
= 0; j
< t2_interfaces
; j
++)
6758 xtensa_interface t2_int
6759 = xtensa_interfaceOperand_interface (isa
, t2
->opcode
, j
);
6760 int t2_class
= xtensa_interface_class_id (isa
, t2_int
);
6762 t2_inout
= xtensa_interface_inout (isa
, t2_int
);
6763 if (xtensa_interface_has_side_effect (isa
, t2_int
) == 1)
6766 for (i
= 0; i
< t1_interfaces
; i
++)
6768 xtensa_interface t1_int
6769 = xtensa_interfaceOperand_interface (isa
, t1
->opcode
, j
);
6770 int t1_class
= xtensa_interface_class_id (isa
, t1_int
);
6772 t1_inout
= xtensa_interface_inout (isa
, t1_int
);
6773 if (xtensa_interface_has_side_effect (isa
, t1_int
) == 1)
6776 if (t1_volatile
&& t2_volatile
&& (t1_class
== t2_class
))
6779 if (t1_int
!= t2_int
)
6782 if (t2_inout
== 'i' && t1_inout
== 'o')
6788 if (t1_inout
== 'i' && t2_inout
== 'o')
6794 if (t1_inout
!= 'i' && t2_inout
!= 'i')
6803 static xtensa_format
6804 xg_find_narrowest_format (vliw_insn
*vinsn
)
6806 /* Right now we assume that the ops within the vinsn are properly
6807 ordered for the slots that the programmer wanted them in. In
6808 other words, we don't rearrange the ops in hopes of finding a
6809 better format. The scheduler handles that. */
6811 xtensa_isa isa
= xtensa_default_isa
;
6812 xtensa_format format
;
6813 xtensa_opcode nop_opcode
= xtensa_nop_opcode
;
6815 if (vinsn
->num_slots
== 1)
6816 return xg_get_single_format (vinsn
->slots
[0].opcode
);
6818 for (format
= 0; format
< xtensa_isa_num_formats (isa
); format
++)
6821 xg_copy_vinsn (&v_copy
, vinsn
);
6822 if (xtensa_format_num_slots (isa
, format
) == v_copy
.num_slots
)
6826 for (slot
= 0; slot
< v_copy
.num_slots
; slot
++)
6828 if (v_copy
.slots
[slot
].opcode
== nop_opcode
)
6830 v_copy
.slots
[slot
].opcode
=
6831 xtensa_format_slot_nop_opcode (isa
, format
, slot
);
6832 v_copy
.slots
[slot
].ntok
= 0;
6835 if (opcode_fits_format_slot (v_copy
.slots
[slot
].opcode
,
6838 else if (v_copy
.num_slots
> 1)
6841 /* Try the widened version. */
6842 if (!v_copy
.slots
[slot
].keep_wide
6843 && !v_copy
.slots
[slot
].is_specific_opcode
6844 && xg_is_single_relaxable_insn (&v_copy
.slots
[slot
],
6846 && opcode_fits_format_slot (widened
.opcode
,
6849 v_copy
.slots
[slot
] = widened
;
6854 if (fit
== v_copy
.num_slots
)
6856 xg_copy_vinsn (vinsn
, &v_copy
);
6857 xtensa_format_encode (isa
, format
, vinsn
->insnbuf
);
6858 vinsn
->format
= format
;
6864 if (format
== xtensa_isa_num_formats (isa
))
6865 return XTENSA_UNDEFINED
;
6871 /* Return the additional space needed in a frag
6872 for possible relaxations of any ops in a VLIW insn.
6873 Also fill out the relaxations that might be required of
6874 each tinsn in the vinsn. */
6877 relaxation_requirements (vliw_insn
*vinsn
, bfd_boolean
*pfinish_frag
)
6879 bfd_boolean finish_frag
= FALSE
;
6880 int extra_space
= 0;
6883 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6885 TInsn
*tinsn
= &vinsn
->slots
[slot
];
6886 if (!tinsn_has_symbolic_operands (tinsn
))
6888 /* A narrow instruction could be widened later to help
6889 alignment issues. */
6890 if (xg_is_single_relaxable_insn (tinsn
, 0, TRUE
)
6891 && !tinsn
->is_specific_opcode
6892 && vinsn
->num_slots
== 1)
6894 /* Difference in bytes between narrow and wide insns... */
6896 tinsn
->subtype
= RELAX_NARROW
;
6901 if (workaround_b_j_loop_end
6902 && tinsn
->opcode
== xtensa_jx_opcode
6903 && use_transform ())
6905 /* Add 2 of these. */
6906 extra_space
+= 3; /* for the nop size */
6907 tinsn
->subtype
= RELAX_ADD_NOP_IF_PRE_LOOP_END
;
6910 /* Need to assemble it with space for the relocation. */
6911 if (xg_is_relaxable_insn (tinsn
, 0)
6912 && !tinsn
->is_specific_opcode
)
6914 int max_size
= xg_get_max_insn_widen_size (tinsn
->opcode
);
6915 int max_literal_size
=
6916 xg_get_max_insn_widen_literal_size (tinsn
->opcode
);
6918 tinsn
->literal_space
= max_literal_size
;
6920 tinsn
->subtype
= RELAX_IMMED
;
6921 extra_space
+= max_size
;
6925 /* A fix record will be added for this instruction prior
6926 to relaxation, so make it end the frag. */
6931 *pfinish_frag
= finish_frag
;
6937 bundle_tinsn (TInsn
*tinsn
, vliw_insn
*vinsn
)
6939 xtensa_isa isa
= xtensa_default_isa
;
6940 int slot
, chosen_slot
;
6942 vinsn
->format
= xg_get_single_format (tinsn
->opcode
);
6943 gas_assert (vinsn
->format
!= XTENSA_UNDEFINED
);
6944 vinsn
->num_slots
= xtensa_format_num_slots (isa
, vinsn
->format
);
6946 chosen_slot
= xg_get_single_slot (tinsn
->opcode
);
6947 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
6949 if (slot
== chosen_slot
)
6950 vinsn
->slots
[slot
] = *tinsn
;
6953 vinsn
->slots
[slot
].opcode
=
6954 xtensa_format_slot_nop_opcode (isa
, vinsn
->format
, slot
);
6955 vinsn
->slots
[slot
].ntok
= 0;
6956 vinsn
->slots
[slot
].insn_type
= ITYPE_INSN
;
6963 emit_single_op (TInsn
*orig_insn
)
6966 IStack istack
; /* put instructions into here */
6967 symbolS
*lit_sym
= NULL
;
6968 symbolS
*label_sym
= NULL
;
6970 istack_init (&istack
);
6972 /* Special-case for "movi aX, foo" which is guaranteed to need relaxing.
6973 Because the scheduling and bundling characteristics of movi and
6974 l32r or const16 are so different, we can do much better if we relax
6975 it prior to scheduling and bundling, rather than after. */
6976 if ((orig_insn
->opcode
== xtensa_movi_opcode
6977 || orig_insn
->opcode
== xtensa_movi_n_opcode
)
6978 && !cur_vinsn
.inside_bundle
6979 && (orig_insn
->tok
[1].X_op
== O_symbol
6980 || orig_insn
->tok
[1].X_op
== O_pltrel
6981 || orig_insn
->tok
[1].X_op
== O_tlsfunc
6982 || orig_insn
->tok
[1].X_op
== O_tlsarg
6983 || orig_insn
->tok
[1].X_op
== O_tpoff
6984 || orig_insn
->tok
[1].X_op
== O_dtpoff
)
6985 && !orig_insn
->is_specific_opcode
&& use_transform ())
6986 xg_assembly_relax (&istack
, orig_insn
, now_seg
, frag_now
, 0, 1, 0);
6988 if (xg_expand_assembly_insn (&istack
, orig_insn
))
6991 for (i
= 0; i
< istack
.ninsn
; i
++)
6993 TInsn
*insn
= &istack
.insn
[i
];
6994 switch (insn
->insn_type
)
6997 gas_assert (lit_sym
== NULL
);
6998 lit_sym
= xg_assemble_literal (insn
);
7002 static int relaxed_sym_idx
= 0;
7003 char *label
= XNEWVEC (char, strlen (FAKE_LABEL_NAME
) + 12);
7004 sprintf (label
, "%s_rl_%x", FAKE_LABEL_NAME
, relaxed_sym_idx
++);
7006 gas_assert (label_sym
== NULL
);
7007 label_sym
= symbol_find_or_make (label
);
7008 gas_assert (label_sym
);
7016 xg_resolve_literals (insn
, lit_sym
);
7018 xg_resolve_labels (insn
, label_sym
);
7020 bundle_tinsn (insn
, &v
);
7035 total_frag_text_expansion (fragS
*fragP
)
7038 int total_expansion
= 0;
7040 for (slot
= 0; slot
< config_max_slots
; slot
++)
7041 total_expansion
+= fragP
->tc_frag_data
.text_expansion
[slot
];
7043 return total_expansion
;
7047 /* Emit a vliw instruction to the current fragment. */
7050 xg_assemble_vliw_tokens (vliw_insn
*vinsn
)
7052 bfd_boolean finish_frag
;
7053 bfd_boolean is_jump
= FALSE
;
7054 bfd_boolean is_branch
= FALSE
;
7055 xtensa_isa isa
= xtensa_default_isa
;
7060 struct dwarf2_line_info debug_line
;
7061 bfd_boolean loc_directive_seen
= FALSE
;
7064 memset (&debug_line
, 0, sizeof (struct dwarf2_line_info
));
7066 if (generating_literals
)
7068 static int reported
= 0;
7070 as_bad_where (frag_now
->fr_file
, frag_now
->fr_line
,
7071 _("cannot assemble into a literal fragment"));
7078 if (frag_now_fix () != 0
7079 && (! frag_now
->tc_frag_data
.is_insn
7080 || (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7081 || (!use_transform ()) != frag_now
->tc_frag_data
.is_no_transform
7082 || (directive_state
[directive_longcalls
]
7083 != frag_now
->tc_frag_data
.use_longcalls
)
7084 || (directive_state
[directive_absolute_literals
]
7085 != frag_now
->tc_frag_data
.use_absolute_literals
)))
7087 frag_wane (frag_now
);
7089 xtensa_set_frag_assembly_state (frag_now
);
7092 if (workaround_a0_b_retw
7093 && vinsn
->num_slots
== 1
7094 && (get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
7095 && xtensa_opcode_is_branch (isa
, vinsn
->slots
[0].opcode
) == 1
7096 && use_transform ())
7098 has_a0_b_retw
= TRUE
;
7100 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
7101 After the first assembly pass we will check all of them and
7102 add a nop if needed. */
7103 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7104 frag_var (rs_machine_dependent
, 4, 4,
7105 RELAX_ADD_NOP_IF_A0_B_RETW
,
7106 frag_now
->fr_symbol
,
7107 frag_now
->fr_offset
,
7109 xtensa_set_frag_assembly_state (frag_now
);
7110 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7111 frag_var (rs_machine_dependent
, 4, 4,
7112 RELAX_ADD_NOP_IF_A0_B_RETW
,
7113 frag_now
->fr_symbol
,
7114 frag_now
->fr_offset
,
7116 xtensa_set_frag_assembly_state (frag_now
);
7119 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7121 tinsn
= &vinsn
->slots
[slot
];
7123 /* See if the instruction implies an aligned section. */
7124 if (xtensa_opcode_is_loop (isa
, tinsn
->opcode
) == 1)
7125 record_alignment (now_seg
, 2);
7127 /* Determine the best line number for debug info. */
7128 if ((tinsn
->loc_directive_seen
|| !loc_directive_seen
)
7129 && (tinsn
->debug_line
.filenum
!= debug_line
.filenum
7130 || tinsn
->debug_line
.line
< debug_line
.line
7131 || tinsn
->debug_line
.column
< debug_line
.column
))
7132 debug_line
= tinsn
->debug_line
;
7133 if (tinsn
->loc_directive_seen
)
7134 loc_directive_seen
= TRUE
;
7137 /* Special cases for instructions that force an alignment... */
7138 /* None of these opcodes are bundle-able. */
7139 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1)
7143 /* Remember the symbol that marks the end of the loop in the frag
7144 that marks the start of the loop. This way we can easily find
7145 the end of the loop at the beginning, without adding special code
7146 to mark the loop instructions themselves. */
7147 symbolS
*target_sym
= NULL
;
7148 if (vinsn
->slots
[0].tok
[1].X_op
== O_symbol
)
7149 target_sym
= vinsn
->slots
[0].tok
[1].X_add_symbol
;
7151 xtensa_set_frag_assembly_state (frag_now
);
7152 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7154 max_fill
= get_text_align_max_fill_size
7155 (get_text_align_power (xtensa_fetch_width
),
7156 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
7158 if (use_transform ())
7159 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
7160 RELAX_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7162 frag_var (rs_machine_dependent
, 0, 0,
7163 RELAX_CHECK_ALIGN_NEXT_OPCODE
, target_sym
, 0, NULL
);
7164 xtensa_set_frag_assembly_state (frag_now
);
7167 if (vinsn
->slots
[0].opcode
== xtensa_entry_opcode
7168 && !vinsn
->slots
[0].is_specific_opcode
)
7170 xtensa_mark_literal_pool_location ();
7171 xtensa_move_labels (frag_now
, 0);
7172 frag_var (rs_align_test
, 1, 1, 0, NULL
, 2, NULL
);
7175 if (vinsn
->num_slots
== 1)
7177 if (workaround_a0_b_retw
&& use_transform ())
7178 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
7179 is_register_writer (&vinsn
->slots
[0], "a", 0));
7181 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
7182 is_bad_loopend_opcode (&vinsn
->slots
[0]));
7185 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
, FALSE
);
7187 insn_size
= xtensa_format_length (isa
, vinsn
->format
);
7189 extra_space
= relaxation_requirements (vinsn
, &finish_frag
);
7191 /* vinsn_to_insnbuf will produce the error. */
7192 if (vinsn
->format
!= XTENSA_UNDEFINED
)
7194 f
= frag_more (insn_size
+ extra_space
);
7195 xtensa_set_frag_assembly_state (frag_now
);
7196 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7199 vinsn_to_insnbuf (vinsn
, f
, frag_now
, FALSE
);
7200 if (vinsn
->format
== XTENSA_UNDEFINED
)
7203 xtensa_insnbuf_to_chars (isa
, vinsn
->insnbuf
, (unsigned char *) f
, 0);
7205 if (debug_type
== DEBUG_DWARF2
|| loc_directive_seen
)
7206 dwarf2_gen_line_info (frag_now_fix () - (insn_size
+ extra_space
),
7209 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
7211 tinsn
= &vinsn
->slots
[slot
];
7212 frag_now
->tc_frag_data
.slot_subtypes
[slot
] = tinsn
->subtype
;
7213 frag_now
->tc_frag_data
.slot_symbols
[slot
] = tinsn
->symbol
;
7214 frag_now
->tc_frag_data
.slot_offsets
[slot
] = tinsn
->offset
;
7215 frag_now
->tc_frag_data
.literal_frags
[slot
] = tinsn
->literal_frag
;
7216 if (tinsn
->opcode
== xtensa_l32r_opcode
)
7217 frag_now
->tc_frag_data
.literal_frags
[slot
]
7218 = symbol_get_frag (tinsn
->tok
[1].X_add_symbol
);
7219 if (tinsn
->literal_space
!= 0)
7220 xg_assemble_literal_space (tinsn
->literal_space
, slot
);
7221 frag_now
->tc_frag_data
.free_reg
[slot
] = tinsn
->extra_arg
;
7223 if (tinsn
->subtype
== RELAX_NARROW
)
7224 gas_assert (vinsn
->num_slots
== 1);
7225 if (xtensa_opcode_is_jump (isa
, tinsn
->opcode
) == 1)
7227 if (xtensa_opcode_is_branch (isa
, tinsn
->opcode
) == 1)
7230 if (tinsn
->subtype
|| tinsn
->symbol
|| tinsn
->offset
7231 || tinsn
->literal_frag
|| is_jump
|| is_branch
)
7235 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7236 frag_now
->tc_frag_data
.is_specific_opcode
= TRUE
;
7240 frag_variant (rs_machine_dependent
,
7241 extra_space
, extra_space
, RELAX_SLOTS
,
7242 frag_now
->fr_symbol
, frag_now
->fr_offset
, f
);
7243 xtensa_set_frag_assembly_state (frag_now
);
7246 /* Special cases for loops:
7247 close_loop_end should be inserted AFTER short_loop.
7248 Make sure that CLOSE loops are processed BEFORE short_loops
7249 when converting them. */
7251 /* "short_loop": Add a NOP if the loop is < 4 bytes. */
7252 if (xtensa_opcode_is_loop (isa
, vinsn
->slots
[0].opcode
) == 1
7253 && !vinsn
->slots
[0].is_specific_opcode
)
7255 if (workaround_short_loop
&& use_transform ())
7257 maybe_has_short_loop
= TRUE
;
7258 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7259 frag_var (rs_machine_dependent
, 4, 4,
7260 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7261 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7262 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7263 frag_var (rs_machine_dependent
, 4, 4,
7264 RELAX_ADD_NOP_IF_SHORT_LOOP
,
7265 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7268 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
7269 loop at least 12 bytes away from another loop's end. */
7270 if (workaround_close_loop_end
&& use_transform ())
7272 maybe_has_close_loop_end
= TRUE
;
7273 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7274 frag_var (rs_machine_dependent
, 12, 12,
7275 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
7276 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7280 if (use_transform ())
7284 gas_assert (finish_frag
);
7285 frag_var (rs_machine_dependent
,
7286 xtensa_fetch_width
, xtensa_fetch_width
,
7288 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7289 xtensa_set_frag_assembly_state (frag_now
);
7290 xtensa_maybe_create_trampoline_frag ();
7291 /* Always create one here. */
7292 xtensa_maybe_create_literal_pool_frag (TRUE
, FALSE
);
7294 else if (is_branch
&& do_align_targets ())
7296 gas_assert (finish_frag
);
7297 frag_var (rs_machine_dependent
,
7298 xtensa_fetch_width
, xtensa_fetch_width
,
7299 RELAX_MAYBE_UNREACHABLE
,
7300 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7301 xtensa_set_frag_assembly_state (frag_now
);
7302 frag_var (rs_machine_dependent
,
7304 RELAX_MAYBE_DESIRE_ALIGN
,
7305 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7306 xtensa_set_frag_assembly_state (frag_now
);
7310 /* Now, if the original opcode was a call... */
7311 if (do_align_targets ()
7312 && xtensa_opcode_is_call (isa
, vinsn
->slots
[0].opcode
) == 1)
7314 float freq
= get_subseg_total_freq (now_seg
, now_subseg
);
7315 frag_now
->tc_frag_data
.is_insn
= TRUE
;
7316 frag_var (rs_machine_dependent
, 4, (int) freq
, RELAX_DESIRE_ALIGN
,
7317 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
7318 xtensa_set_frag_assembly_state (frag_now
);
7321 if (vinsn_has_specific_opcodes (vinsn
) && use_transform ())
7323 frag_wane (frag_now
);
7325 xtensa_set_frag_assembly_state (frag_now
);
7330 /* xtensa_end and helper functions. */
7332 static void xtensa_cleanup_align_frags (void);
7333 static void xtensa_fix_target_frags (void);
7334 static void xtensa_mark_narrow_branches (void);
7335 static void xtensa_mark_zcl_first_insns (void);
7336 static void xtensa_mark_difference_of_two_symbols (void);
7337 static void xtensa_fix_a0_b_retw_frags (void);
7338 static void xtensa_fix_b_j_loop_end_frags (void);
7339 static void xtensa_fix_close_loop_end_frags (void);
7340 static void xtensa_fix_short_loop_frags (void);
7341 static void xtensa_sanity_check (void);
7342 static void xtensa_add_config_info (void);
7347 directive_balance ();
7348 xtensa_flush_pending_output ();
7350 past_xtensa_end
= TRUE
;
7352 xtensa_move_literals ();
7354 xtensa_reorder_segments ();
7355 xtensa_cleanup_align_frags ();
7356 xtensa_fix_target_frags ();
7357 if (workaround_a0_b_retw
&& has_a0_b_retw
)
7358 xtensa_fix_a0_b_retw_frags ();
7359 if (workaround_b_j_loop_end
)
7360 xtensa_fix_b_j_loop_end_frags ();
7362 /* "close_loop_end" should be processed BEFORE "short_loop". */
7363 if (workaround_close_loop_end
&& maybe_has_close_loop_end
)
7364 xtensa_fix_close_loop_end_frags ();
7366 if (workaround_short_loop
&& maybe_has_short_loop
)
7367 xtensa_fix_short_loop_frags ();
7369 xtensa_mark_narrow_branches ();
7370 xtensa_mark_zcl_first_insns ();
7372 xtensa_sanity_check ();
7374 xtensa_add_config_info ();
7376 xtensa_check_frag_count ();
7379 struct trampoline_chain_entry
7385 /* Trampoline chain for a given (sym, offset) pair is a sorted array
7386 of locations of trampoline jumps leading there. Jumps are represented
7387 as pairs (sym, offset): trampoline frag symbol and offset of the jump
7389 struct trampoline_chain
7391 struct trampoline_chain_entry target
;
7392 struct trampoline_chain_entry
*entry
;
7395 bfd_boolean needs_sorting
;
7398 struct trampoline_chain_index
7400 struct trampoline_chain
*entry
;
7403 bfd_boolean needs_sorting
;
7406 struct trampoline_index
7413 struct trampoline_seg
7415 struct trampoline_seg
*next
;
7417 /* Trampolines ordered by their frag fr_address */
7418 struct trampoline_index index
;
7419 /* Known trampoline chains ordered by (sym, offset) pair */
7420 struct trampoline_chain_index chain_index
;
7423 static struct trampoline_seg trampoline_seg_list
;
7424 #define J_RANGE (128 * 1024)
7425 #define J_MARGIN 4096
7427 static int unreachable_count
= 0;
7431 xtensa_maybe_create_trampoline_frag (void)
7433 if (!use_trampolines
)
7436 /* We create an area for possible trampolines every 10 unreachable frags.
7437 These are preferred over the ones not preceded by an unreachable frag,
7438 because we don't have to jump around them. This function is called after
7439 each RELAX_UNREACHABLE frag is created. */
7441 if (++unreachable_count
> 10)
7443 xtensa_create_trampoline_frag (FALSE
);
7444 clear_frag_count ();
7445 unreachable_count
= 0;
7450 xtensa_check_frag_count (void)
7452 if (!use_trampolines
|| frag_now
->tc_frag_data
.is_no_transform
)
7455 /* We create an area for possible trampolines every 8000 frags or so. This
7456 is an estimate based on the max range of a "j" insn (+/-128K) divided
7457 by a typical frag byte count (16), minus a few for safety. This function
7458 is called after each source line is processed. */
7460 if (get_frag_count () > 8000)
7462 xtensa_create_trampoline_frag (TRUE
);
7463 clear_frag_count ();
7464 unreachable_count
= 0;
7467 /* We create an area for a possible literal pool every N (default 5000)
7469 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
7472 static xtensa_insnbuf trampoline_buf
= NULL
;
7473 static xtensa_insnbuf trampoline_slotbuf
= NULL
;
7475 static xtensa_insnbuf litpool_buf
= NULL
;
7476 static xtensa_insnbuf litpool_slotbuf
= NULL
;
7478 #define TRAMPOLINE_FRAG_SIZE 3000
7480 static struct trampoline_seg
*
7481 find_trampoline_seg (asection
*seg
)
7483 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7484 static struct trampoline_seg
*mr
;
7486 if (mr
&& mr
->seg
== seg
)
7489 for ( ; ts
; ts
= ts
->next
)
7501 static size_t xg_find_trampoline (const struct trampoline_index
*idx
,
7505 size_t b
= idx
->n_entries
;
7509 size_t c
= (a
+ b
) / 2;
7511 if (idx
->entry
[c
]->fr_address
<= addr
)
7519 static void xg_add_trampoline_to_index (struct trampoline_index
*idx
,
7522 if (idx
->n_entries
== idx
->n_max
)
7524 idx
->n_max
= (idx
->n_entries
+ 1) * 2;
7525 idx
->entry
= xrealloc (idx
->entry
,
7526 sizeof (*idx
->entry
) * idx
->n_max
);
7528 idx
->entry
[idx
->n_entries
] = fragP
;
7532 static void xg_remove_trampoline_from_index (struct trampoline_index
*idx
,
7535 gas_assert (i
< idx
->n_entries
);
7536 memmove (idx
->entry
+ i
, idx
->entry
+ i
+ 1,
7537 (idx
->n_entries
- i
- 1) * sizeof (*idx
->entry
));
7541 static void xg_add_trampoline_to_seg (struct trampoline_seg
*ts
,
7544 xg_add_trampoline_to_index (&ts
->index
, fragP
);
7548 xtensa_create_trampoline_frag (bfd_boolean needs_jump_around
)
7550 /* Emit a frag where we can place intermediate jump instructions,
7551 in case we need to jump farther than 128K bytes.
7552 Each jump instruction takes three bytes.
7553 We allocate enough for 1000 trampolines in each frag.
7554 If that's not enough, oh well. */
7556 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
7559 int size
= TRAMPOLINE_FRAG_SIZE
;
7563 ts
= XCNEW(struct trampoline_seg
);
7564 ts
->next
= trampoline_seg_list
.next
;
7565 trampoline_seg_list
.next
= ts
;
7569 frag_wane (frag_now
);
7571 xtensa_set_frag_assembly_state (frag_now
);
7572 varP
= frag_var (rs_machine_dependent
, size
, size
, RELAX_TRAMPOLINE
, NULL
, 0, NULL
);
7573 fragP
= (fragS
*)(varP
- SIZEOF_STRUCT_FRAG
);
7574 if (trampoline_buf
== NULL
)
7576 trampoline_buf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7577 trampoline_slotbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7579 fragP
->tc_frag_data
.needs_jump_around
= needs_jump_around
;
7580 xg_add_trampoline_to_seg (ts
, fragP
);
7583 static bfd_boolean
xg_is_trampoline_frag_full (const fragS
*fragP
)
7585 return fragP
->fr_var
< 3;
7588 static int xg_order_trampoline_chain_entry (const void *a
, const void *b
)
7590 const struct trampoline_chain_entry
*pa
= a
;
7591 const struct trampoline_chain_entry
*pb
= b
;
7593 if (pa
->sym
!= pb
->sym
)
7595 valueT aval
= S_GET_VALUE (pa
->sym
);
7596 valueT bval
= S_GET_VALUE (pb
->sym
);
7599 return aval
< bval
? -1 : 1;
7601 if (pa
->offset
!= pb
->offset
)
7602 return pa
->offset
< pb
->offset
? -1 : 1;
7606 static void xg_sort_trampoline_chain (struct trampoline_chain
*tc
)
7608 qsort (tc
->entry
, tc
->n_entries
, sizeof (*tc
->entry
),
7609 xg_order_trampoline_chain_entry
);
7610 tc
->needs_sorting
= FALSE
;
7613 /* Find entry index in the given chain with maximal address <= source. */
7614 static size_t xg_find_chain_entry (struct trampoline_chain
*tc
,
7618 size_t b
= tc
->n_entries
;
7620 if (tc
->needs_sorting
)
7621 xg_sort_trampoline_chain (tc
);
7625 size_t c
= (a
+ b
) / 2;
7626 struct trampoline_chain_entry
*e
= tc
->entry
+ c
;
7628 if (S_GET_VALUE(e
->sym
) + e
->offset
<= source
)
7636 /* Find the best jump target for the source in the given trampoline chain.
7637 The best jump target is the one that results in the shortest path to the
7638 final target, it's the location of the jump closest to the final target,
7639 but within the J_RANGE - J_MARGIN from the source. */
7640 static struct trampoline_chain_entry
*
7641 xg_get_best_chain_entry (struct trampoline_chain
*tc
, addressT source
)
7643 addressT target
= S_GET_VALUE(tc
->target
.sym
) + tc
->target
.offset
;
7644 size_t i
= xg_find_chain_entry (tc
, source
);
7645 struct trampoline_chain_entry
*e
= tc
->entry
+ i
;
7646 int step
= target
< source
? -1 : 1;
7647 addressT chained_target
;
7650 if (target
> source
&&
7651 S_GET_VALUE(e
->sym
) + e
->offset
<= source
&&
7652 i
+ 1 < tc
->n_entries
)
7655 while (i
+ step
< tc
->n_entries
)
7657 struct trampoline_chain_entry
*next
= tc
->entry
+ i
+ step
;
7659 chained_target
= S_GET_VALUE(next
->sym
) + next
->offset
;
7660 off
= source
- chained_target
;
7662 if (labs (off
) >= J_RANGE
- J_MARGIN
)
7669 chained_target
= S_GET_VALUE(e
->sym
) + e
->offset
;
7670 off
= source
- chained_target
;
7672 if (labs (off
) < J_MARGIN
||
7673 labs (off
) >= J_RANGE
- J_MARGIN
)
7675 return tc
->entry
+ i
;
7678 static int xg_order_trampoline_chain (const void *a
, const void *b
)
7680 const struct trampoline_chain
*_pa
= a
;
7681 const struct trampoline_chain
*_pb
= b
;
7682 const struct trampoline_chain_entry
*pa
= &_pa
->target
;
7683 const struct trampoline_chain_entry
*pb
= &_pb
->target
;
7684 symbolS
*s1
= pa
->sym
;
7685 symbolS
*s2
= pb
->sym
;
7689 symbolS
*tmp
= symbol_symbolS (s1
);
7693 tmp
= symbol_symbolS (s2
);
7698 return s1
< s2
? -1 : 1;
7701 if (pa
->offset
!= pb
->offset
)
7702 return pa
->offset
< pb
->offset
? -1 : 1;
7706 static struct trampoline_chain
*
7707 xg_get_trampoline_chain (struct trampoline_seg
*ts
,
7711 struct trampoline_chain_index
*idx
= &ts
->chain_index
;
7712 struct trampoline_chain c
;
7714 if (idx
->needs_sorting
)
7716 qsort (idx
->entry
, idx
->n_entries
, sizeof (*idx
->entry
),
7717 xg_order_trampoline_chain
);
7718 idx
->needs_sorting
= FALSE
;
7721 c
.target
.offset
= offset
;
7722 return bsearch (&c
, idx
->entry
, idx
->n_entries
,
7723 sizeof (struct trampoline_chain
),
7724 xg_order_trampoline_chain
);
7727 /* Find trampoline chain in the given trampoline segment that is going
7728 to the *sym + *offset. If found, replace *sym and *offset with the
7729 best jump target in that chain. */
7730 static struct trampoline_chain
*
7731 xg_find_best_eq_target (struct trampoline_seg
*ts
,
7732 addressT source
, symbolS
**sym
,
7735 struct trampoline_chain
*tc
= xg_get_trampoline_chain (ts
, *sym
, *offset
);
7739 struct trampoline_chain_entry
*e
= xg_get_best_chain_entry (tc
, source
);
7742 *offset
= e
->offset
;
7747 static void xg_add_location_to_chain (struct trampoline_chain
*tc
,
7748 symbolS
*sym
, addressT offset
)
7750 struct trampoline_chain_entry
*e
;
7752 if (tc
->n_entries
== tc
->n_max
)
7754 tc
->n_max
= (tc
->n_max
+ 1) * 2;
7755 tc
->entry
= xrealloc (tc
->entry
, sizeof (*tc
->entry
) * tc
->n_max
);
7757 e
= tc
->entry
+ tc
->n_entries
;
7761 tc
->needs_sorting
= TRUE
;
7764 static struct trampoline_chain
*
7765 xg_create_trampoline_chain (struct trampoline_seg
*ts
,
7766 symbolS
*sym
, addressT offset
)
7768 struct trampoline_chain_index
*idx
= &ts
->chain_index
;
7769 struct trampoline_chain
*tc
;
7771 if (idx
->n_entries
== idx
->n_max
)
7773 idx
->n_max
= (idx
->n_max
+ 1) * 2;
7774 idx
->entry
= xrealloc (idx
->entry
,
7775 sizeof (*idx
->entry
) * idx
->n_max
);
7778 tc
= idx
->entry
+ idx
->n_entries
;
7779 tc
->target
.sym
= sym
;
7780 tc
->target
.offset
= offset
;
7784 xg_add_location_to_chain (tc
, sym
, offset
);
7787 idx
->needs_sorting
= TRUE
;
7792 void dump_trampolines (void);
7795 dump_trampolines (void)
7797 struct trampoline_seg
*ts
= trampoline_seg_list
.next
;
7799 for ( ; ts
; ts
= ts
->next
)
7802 asection
*seg
= ts
->seg
;
7806 fprintf(stderr
, "SECTION %s\n", seg
->name
);
7808 for (i
= 0; i
< ts
->index
.n_entries
; ++i
)
7810 fragS
*tf
= ts
->index
.entry
[i
];
7812 fprintf(stderr
, " 0x%08x: fix=%d, jump_around=%s\n",
7813 (int)tf
->fr_address
, (int)tf
->fr_fix
,
7814 tf
->tc_frag_data
.needs_jump_around
? "T" : "F");
7819 static void dump_litpools (void) __attribute__ ((unused
));
7822 dump_litpools (void)
7824 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7825 struct litpool_frag
*lpf
;
7827 for ( ; lps
; lps
= lps
->next
)
7829 printf("litpool seg %s\n", lps
->seg
->name
);
7830 for ( lpf
= lps
->frag_list
.next
; lpf
->fragP
; lpf
= lpf
->next
)
7832 fragS
*litfrag
= lpf
->fragP
->fr_next
;
7834 while (litfrag
&& litfrag
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7836 if (litfrag
->fr_fix
== 4)
7838 litfrag
= litfrag
->fr_next
;
7840 printf(" %ld <%d:%d> (%d) [%d]: ",
7841 lpf
->addr
, lpf
->priority
, lpf
->original_priority
,
7842 lpf
->fragP
->fr_line
, count
);
7843 //dump_frag(lpf->fragP);
7849 xtensa_maybe_create_literal_pool_frag (bfd_boolean create
,
7850 bfd_boolean only_if_needed
)
7852 struct litpool_seg
*lps
= litpool_seg_list
.next
;
7854 struct litpool_frag
*lpf
;
7855 bfd_boolean needed
= FALSE
;
7857 if (use_literal_section
|| !auto_litpools
)
7860 for ( ; lps
; lps
= lps
->next
)
7862 if (lps
->seg
== now_seg
)
7868 lps
= XCNEW (struct litpool_seg
);
7869 lps
->next
= litpool_seg_list
.next
;
7870 litpool_seg_list
.next
= lps
;
7872 lps
->frag_list
.next
= &lps
->frag_list
;
7873 lps
->frag_list
.prev
= &lps
->frag_list
;
7874 /* Put candidate literal pool at the beginning of every section,
7875 so that even when section starts with literal load there's a
7876 literal pool available. */
7877 lps
->frag_count
= auto_litpool_limit
;
7886 if (past_xtensa_end
|| !use_transform() ||
7887 frag_now
->tc_frag_data
.is_no_transform
)
7891 if (auto_litpool_limit
<= 0)
7893 /* Don't create a litpool based only on frag count. */
7896 else if (lps
->frag_count
> auto_litpool_limit
)
7913 int size
= (only_if_needed
) ? 3 : 0; /* Space for a "j" insn. */
7914 /* Create a potential site for a literal pool. */
7915 frag_wane (frag_now
);
7917 xtensa_set_frag_assembly_state (frag_now
);
7919 fragP
->tc_frag_data
.lit_frchain
= frchain_now
;
7920 fragP
->tc_frag_data
.literal_frag
= fragP
;
7921 frag_var (rs_machine_dependent
, size
, size
,
7923 RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
7924 RELAX_LITERAL_POOL_BEGIN
,
7926 frag_now
->tc_frag_data
.lit_seg
= now_seg
;
7927 frag_variant (rs_machine_dependent
, 0, 0,
7928 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
7929 xtensa_set_frag_assembly_state (frag_now
);
7933 /* RELAX_LITERAL_POOL_BEGIN frag is being created;
7934 just record it here. */
7938 lpf
= XNEW (struct litpool_frag
);
7939 /* Insert at tail of circular list. */
7941 lps
->frag_list
.prev
->next
= lpf
;
7942 lpf
->next
= &lps
->frag_list
;
7943 lpf
->prev
= lps
->frag_list
.prev
;
7944 lps
->frag_list
.prev
= lpf
;
7946 lpf
->priority
= (needed
) ? (only_if_needed
) ? 3 : 2 : 1;
7947 lpf
->original_priority
= lpf
->priority
;
7948 lpf
->literal_count
= 0;
7950 lps
->frag_count
= 0;
7954 xtensa_cleanup_align_frags (void)
7959 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
7960 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
7963 /* Walk over all of the fragments in a subsection. */
7964 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
7966 if ((fragP
->fr_type
== rs_align
7967 || fragP
->fr_type
== rs_align_code
7968 || (fragP
->fr_type
== rs_machine_dependent
7969 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
7970 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
7971 && fragP
->fr_fix
== 0)
7973 fragS
*next
= fragP
->fr_next
;
7976 && next
->fr_fix
== 0
7977 && next
->fr_type
== rs_machine_dependent
7978 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
7981 next
= next
->fr_next
;
7984 /* If we don't widen branch targets, then they
7985 will be easier to align. */
7986 if (fragP
->tc_frag_data
.is_branch_target
7987 && fragP
->fr_opcode
== fragP
->fr_literal
7988 && fragP
->fr_type
== rs_machine_dependent
7989 && fragP
->fr_subtype
== RELAX_SLOTS
7990 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
7992 if (fragP
->fr_type
== rs_machine_dependent
7993 && fragP
->fr_subtype
== RELAX_UNREACHABLE
)
7994 fragP
->tc_frag_data
.is_unreachable
= TRUE
;
8000 /* Re-process all of the fragments looking to convert all of the
8001 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
8002 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
8003 Otherwise, convert to a .fill 0. */
8006 xtensa_fix_target_frags (void)
8011 /* When this routine is called, all of the subsections are still intact
8012 so we walk over subsections instead of sections. */
8013 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8014 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8018 /* Walk over all of the fragments in a subsection. */
8019 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8021 if (fragP
->fr_type
== rs_machine_dependent
8022 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
8024 if (next_frag_is_branch_target (fragP
))
8025 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
8034 static bfd_boolean
is_narrow_branch_guaranteed_in_range (fragS
*, TInsn
*);
8037 xtensa_mark_narrow_branches (void)
8042 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8043 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8046 /* Walk over all of the fragments in a subsection. */
8047 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8049 if (fragP
->fr_type
== rs_machine_dependent
8050 && fragP
->fr_subtype
== RELAX_SLOTS
8051 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8055 vinsn_from_chars (&vinsn
, fragP
->fr_opcode
);
8056 tinsn_immed_from_frag (&vinsn
.slots
[0], fragP
, 0);
8058 if (vinsn
.num_slots
== 1
8059 && xtensa_opcode_is_branch (xtensa_default_isa
,
8060 vinsn
.slots
[0].opcode
) == 1
8061 && xg_get_single_size (vinsn
.slots
[0].opcode
) == 2
8062 && is_narrow_branch_guaranteed_in_range (fragP
,
8065 fragP
->fr_subtype
= RELAX_SLOTS
;
8066 fragP
->tc_frag_data
.slot_subtypes
[0] = RELAX_NARROW
;
8067 fragP
->tc_frag_data
.is_aligning_branch
= 1;
8075 /* A branch is typically widened only when its target is out of
8076 range. However, we would like to widen them to align a subsequent
8077 branch target when possible.
8079 Because the branch relaxation code is so convoluted, the optimal solution
8080 (combining the two cases) is difficult to get right in all circumstances.
8081 We therefore go with an "almost as good" solution, where we only
8082 use for alignment narrow branches that definitely will not expand to a
8083 jump and a branch. These functions find and mark these cases. */
8085 /* The range in bytes of BNEZ.N and BEQZ.N. The target operand is encoded
8086 as PC + 4 + imm6, where imm6 is a 6-bit immediate ranging from 0 to 63.
8087 We start counting beginning with the frag after the 2-byte branch, so the
8088 maximum offset is (4 - 2) + 63 = 65. */
8089 #define MAX_IMMED6 65
8091 static offsetT
unrelaxed_frag_max_size (fragS
*);
8094 is_narrow_branch_guaranteed_in_range (fragS
*fragP
, TInsn
*tinsn
)
8096 const expressionS
*exp
= &tinsn
->tok
[1];
8097 symbolS
*symbolP
= exp
->X_add_symbol
;
8098 offsetT max_distance
= exp
->X_add_number
;
8101 if (exp
->X_op
!= O_symbol
)
8104 target_frag
= symbol_get_frag (symbolP
);
8106 max_distance
+= (S_GET_VALUE (symbolP
) - target_frag
->fr_address
);
8107 if (is_branch_jmp_to_next (tinsn
, fragP
))
8110 /* The branch doesn't branch over it's own frag,
8111 but over the subsequent ones. */
8112 fragP
= fragP
->fr_next
;
8113 while (fragP
!= NULL
&& fragP
!= target_frag
&& max_distance
<= MAX_IMMED6
)
8115 max_distance
+= unrelaxed_frag_max_size (fragP
);
8116 fragP
= fragP
->fr_next
;
8118 if (max_distance
<= MAX_IMMED6
&& fragP
== target_frag
)
8125 xtensa_mark_zcl_first_insns (void)
8130 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8131 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8134 /* Walk over all of the fragments in a subsection. */
8135 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8137 if (fragP
->fr_type
== rs_machine_dependent
8138 && (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
8139 || fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
))
8141 /* Find the loop frag. */
8142 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8143 /* Find the first insn frag. */
8144 fragS
*targ_frag
= next_non_empty_frag (loop_frag
);
8146 /* Handle a corner case that comes up in hardware
8147 diagnostics. The original assembly looks like this:
8150 <empty_frag>--not found by next_non_empty_frag
8153 Depending on the start address, the assembler may or
8154 may not change it to look something like this:
8157 nop--frag isn't empty anymore
8160 So set up to check the alignment of the nop if it
8162 while (loop_frag
!= targ_frag
)
8164 if (loop_frag
->fr_type
== rs_machine_dependent
8165 && (loop_frag
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
8166 || loop_frag
->fr_subtype
8167 == RELAX_CHECK_ALIGN_NEXT_OPCODE
))
8168 targ_frag
= loop_frag
;
8170 loop_frag
= loop_frag
->fr_next
;
8173 /* Of course, sometimes (mostly for toy test cases) a
8174 zero-cost loop instruction is the last in a section. */
8177 targ_frag
->tc_frag_data
.is_first_loop_insn
= TRUE
;
8178 /* Do not widen a frag that is the first instruction of a
8179 zero-cost loop. It makes that loop harder to align. */
8180 if (targ_frag
->fr_type
== rs_machine_dependent
8181 && targ_frag
->fr_subtype
== RELAX_SLOTS
8182 && (targ_frag
->tc_frag_data
.slot_subtypes
[0]
8185 if (targ_frag
->tc_frag_data
.is_aligning_branch
)
8186 targ_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
8189 frag_wane (targ_frag
);
8190 targ_frag
->tc_frag_data
.slot_subtypes
[0] = 0;
8194 if (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)
8202 /* When a difference-of-symbols expression is encoded as a uleb128 or
8203 sleb128 value, the linker is unable to adjust that value to account for
8204 link-time relaxation. Mark all the code between such symbols so that
8205 its size cannot be changed by linker relaxation. */
8208 xtensa_mark_difference_of_two_symbols (void)
8212 for (expr_sym
= expr_symbols
; expr_sym
;
8213 expr_sym
= symbol_get_tc (expr_sym
)->next_expr_symbol
)
8215 expressionS
*exp
= symbol_get_value_expression (expr_sym
);
8217 if (exp
->X_op
== O_subtract
)
8219 symbolS
*left
= exp
->X_add_symbol
;
8220 symbolS
*right
= exp
->X_op_symbol
;
8222 /* Difference of two symbols not in the same section
8223 are handled with relocations in the linker. */
8224 if (S_GET_SEGMENT (left
) == S_GET_SEGMENT (right
))
8230 if (symbol_get_frag (left
)->fr_address
8231 <= symbol_get_frag (right
)->fr_address
)
8233 start
= symbol_get_frag (left
);
8234 end
= symbol_get_frag (right
);
8238 start
= symbol_get_frag (right
);
8239 end
= symbol_get_frag (left
);
8242 if (start
->tc_frag_data
.no_transform_end
!= NULL
)
8243 walk
= start
->tc_frag_data
.no_transform_end
;
8248 walk
->tc_frag_data
.is_no_transform
= 1;
8249 walk
= walk
->fr_next
;
8251 while (walk
&& walk
->fr_address
< end
->fr_address
);
8253 start
->tc_frag_data
.no_transform_end
= walk
;
8260 /* Re-process all of the fragments looking to convert all of the
8261 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
8262 conditional branch or a retw/retw.n, convert this frag to one that
8263 will generate a NOP. In any case close it off with a .fill 0. */
8265 static bfd_boolean
next_instrs_are_b_retw (fragS
*);
8268 xtensa_fix_a0_b_retw_frags (void)
8273 /* When this routine is called, all of the subsections are still intact
8274 so we walk over subsections instead of sections. */
8275 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8276 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8280 /* Walk over all of the fragments in a subsection. */
8281 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8283 if (fragP
->fr_type
== rs_machine_dependent
8284 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
8286 if (next_instrs_are_b_retw (fragP
))
8288 if (fragP
->tc_frag_data
.is_no_transform
)
8289 as_bad (_("instruction sequence (write a0, branch, retw) may trigger hardware errata"));
8291 relax_frag_add_nop (fragP
);
8301 next_instrs_are_b_retw (fragS
*fragP
)
8303 xtensa_opcode opcode
;
8305 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
8306 static xtensa_insnbuf insnbuf
= NULL
;
8307 static xtensa_insnbuf slotbuf
= NULL
;
8308 xtensa_isa isa
= xtensa_default_isa
;
8309 unsigned int offset
= 0;
8311 bfd_boolean branch_seen
= FALSE
;
8315 insnbuf
= xtensa_insnbuf_alloc (isa
);
8316 slotbuf
= xtensa_insnbuf_alloc (isa
);
8319 if (next_fragP
== NULL
)
8322 /* Check for the conditional branch. */
8323 xtensa_insnbuf_from_chars
8324 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8325 fmt
= xtensa_format_decode (isa
, insnbuf
);
8326 if (fmt
== XTENSA_UNDEFINED
)
8329 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8331 xtensa_format_get_slot (isa
, fmt
, slot
, insnbuf
, slotbuf
);
8332 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
8334 branch_seen
= (branch_seen
8335 || xtensa_opcode_is_branch (isa
, opcode
) == 1);
8341 offset
+= xtensa_format_length (isa
, fmt
);
8342 if (offset
== next_fragP
->fr_fix
)
8344 next_fragP
= next_non_empty_frag (next_fragP
);
8348 if (next_fragP
== NULL
)
8351 /* Check for the retw/retw.n. */
8352 xtensa_insnbuf_from_chars
8353 (isa
, insnbuf
, (unsigned char *) &next_fragP
->fr_literal
[offset
], 0);
8354 fmt
= xtensa_format_decode (isa
, insnbuf
);
8356 /* Because RETW[.N] is not bundleable, a VLIW bundle here means that we
8357 have no problems. */
8358 if (fmt
== XTENSA_UNDEFINED
8359 || xtensa_format_num_slots (isa
, fmt
) != 1)
8362 xtensa_format_get_slot (isa
, fmt
, 0, insnbuf
, slotbuf
);
8363 opcode
= xtensa_opcode_decode (isa
, fmt
, 0, slotbuf
);
8365 if (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
)
8372 /* Re-process all of the fragments looking to convert all of the
8373 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
8374 loop end label, convert this frag to one that will generate a NOP.
8375 In any case close it off with a .fill 0. */
8377 static bfd_boolean
next_instr_is_loop_end (fragS
*);
8380 xtensa_fix_b_j_loop_end_frags (void)
8385 /* When this routine is called, all of the subsections are still intact
8386 so we walk over subsections instead of sections. */
8387 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8388 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8392 /* Walk over all of the fragments in a subsection. */
8393 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8395 if (fragP
->fr_type
== rs_machine_dependent
8396 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
8398 if (next_instr_is_loop_end (fragP
))
8400 if (fragP
->tc_frag_data
.is_no_transform
)
8401 as_bad (_("branching or jumping to a loop end may trigger hardware errata"));
8403 relax_frag_add_nop (fragP
);
8413 next_instr_is_loop_end (fragS
*fragP
)
8415 const fragS
*next_fragP
;
8417 if (next_frag_is_loop_target (fragP
))
8420 next_fragP
= next_non_empty_frag (fragP
);
8421 if (next_fragP
== NULL
)
8424 if (!next_frag_is_loop_target (next_fragP
))
8427 /* If the size is >= 3 then there is more than one instruction here.
8428 The hardware bug will not fire. */
8429 if (next_fragP
->fr_fix
> 3)
8436 /* Re-process all of the fragments looking to convert all of the
8437 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
8438 not MY loop's loop end within 12 bytes, add enough nops here to
8439 make it at least 12 bytes away. In any case close it off with a
8442 static offsetT min_bytes_to_other_loop_end
8443 (fragS
*, fragS
*, offsetT
);
8446 xtensa_fix_close_loop_end_frags (void)
8451 /* When this routine is called, all of the subsections are still intact
8452 so we walk over subsections instead of sections. */
8453 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8454 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8458 fragS
*current_target
= NULL
;
8460 /* Walk over all of the fragments in a subsection. */
8461 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8463 if (fragP
->fr_type
== rs_machine_dependent
8464 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8465 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8466 current_target
= symbol_get_frag (fragP
->fr_symbol
);
8469 && fragP
->fr_type
== rs_machine_dependent
8470 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
8473 int bytes_added
= 0;
8475 #define REQUIRED_LOOP_DIVIDING_BYTES 12
8476 /* Max out at 12. */
8477 min_bytes
= min_bytes_to_other_loop_end
8478 (fragP
->fr_next
, current_target
, REQUIRED_LOOP_DIVIDING_BYTES
);
8480 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
8482 if (fragP
->tc_frag_data
.is_no_transform
)
8483 as_bad (_("loop end too close to another loop end may trigger hardware errata"));
8486 while (min_bytes
+ bytes_added
8487 < REQUIRED_LOOP_DIVIDING_BYTES
)
8491 if (fragP
->fr_var
< length
)
8492 as_fatal (_("fr_var %lu < length %d"),
8493 (long) fragP
->fr_var
, length
);
8496 assemble_nop (length
,
8497 fragP
->fr_literal
+ fragP
->fr_fix
);
8498 fragP
->fr_fix
+= length
;
8499 fragP
->fr_var
-= length
;
8501 bytes_added
+= length
;
8507 gas_assert (fragP
->fr_type
!= rs_machine_dependent
8508 || fragP
->fr_subtype
!= RELAX_ADD_NOP_IF_CLOSE_LOOP_END
);
8514 static offsetT
unrelaxed_frag_min_size (fragS
*);
8517 min_bytes_to_other_loop_end (fragS
*fragP
,
8518 fragS
*current_target
,
8522 fragS
*current_fragP
;
8524 for (current_fragP
= fragP
;
8526 current_fragP
= current_fragP
->fr_next
)
8528 if (current_fragP
->tc_frag_data
.is_loop_target
8529 && current_fragP
!= current_target
)
8532 offset
+= unrelaxed_frag_min_size (current_fragP
);
8534 if (offset
>= max_size
)
8542 unrelaxed_frag_min_size (fragS
*fragP
)
8544 offsetT size
= fragP
->fr_fix
;
8546 /* Add fill size. */
8547 if (fragP
->fr_type
== rs_fill
)
8548 size
+= fragP
->fr_offset
;
8555 unrelaxed_frag_max_size (fragS
*fragP
)
8557 offsetT size
= fragP
->fr_fix
;
8558 switch (fragP
->fr_type
)
8561 /* Empty frags created by the obstack allocation scheme
8562 end up with type 0. */
8567 size
+= fragP
->fr_offset
;
8575 /* No further adjustments needed. */
8577 case rs_machine_dependent
:
8578 if (fragP
->fr_subtype
!= RELAX_DESIRE_ALIGN
)
8579 size
+= fragP
->fr_var
;
8582 /* We had darn well better know how big it is. */
8591 /* Re-process all of the fragments looking to convert all
8592 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
8595 1) the instruction size count to the loop end label
8596 is too short (<= 2 instructions),
8597 2) loop has a jump or branch in it
8600 1) workaround_all_short_loops is TRUE
8601 2) The generating loop was a 'loopgtz' or 'loopnez'
8602 3) the instruction size count to the loop end label is too short
8604 then convert this frag (and maybe the next one) to generate a NOP.
8605 In any case close it off with a .fill 0. */
8607 static int count_insns_to_loop_end (fragS
*, bfd_boolean
, int);
8608 static bfd_boolean
branch_before_loop_end (fragS
*);
8611 xtensa_fix_short_loop_frags (void)
8616 /* When this routine is called, all of the subsections are still intact
8617 so we walk over subsections instead of sections. */
8618 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8619 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8622 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
8624 /* Walk over all of the fragments in a subsection. */
8625 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8627 if (fragP
->fr_type
== rs_machine_dependent
8628 && ((fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
8629 || (fragP
->fr_subtype
== RELAX_CHECK_ALIGN_NEXT_OPCODE
)))
8632 fragS
*loop_frag
= next_non_empty_frag (fragP
);
8633 tinsn_from_chars (&t_insn
, loop_frag
->fr_opcode
, 0);
8634 current_opcode
= t_insn
.opcode
;
8635 gas_assert (xtensa_opcode_is_loop (xtensa_default_isa
,
8636 current_opcode
) == 1);
8639 if (fragP
->fr_type
== rs_machine_dependent
8640 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8642 if (count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3) < 3
8643 && (branch_before_loop_end (fragP
->fr_next
)
8644 || (workaround_all_short_loops
8645 && current_opcode
!= XTENSA_UNDEFINED
8646 && current_opcode
!= xtensa_loop_opcode
)))
8648 if (fragP
->tc_frag_data
.is_no_transform
)
8649 as_bad (_("loop containing less than three instructions may trigger hardware errata"));
8651 relax_frag_add_nop (fragP
);
8660 static int unrelaxed_frag_min_insn_count (fragS
*);
8663 count_insns_to_loop_end (fragS
*base_fragP
,
8664 bfd_boolean count_relax_add
,
8667 fragS
*fragP
= NULL
;
8672 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
8674 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
8675 if (insn_count
>= max_count
)
8678 if (count_relax_add
)
8680 if (fragP
->fr_type
== rs_machine_dependent
8681 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
8683 /* In order to add the appropriate number of
8684 NOPs, we count an instruction for downstream
8687 if (insn_count
>= max_count
)
8697 unrelaxed_frag_min_insn_count (fragS
*fragP
)
8699 xtensa_isa isa
= xtensa_default_isa
;
8700 static xtensa_insnbuf insnbuf
= NULL
;
8702 unsigned int offset
= 0;
8704 if (!fragP
->tc_frag_data
.is_insn
)
8708 insnbuf
= xtensa_insnbuf_alloc (isa
);
8710 /* Decode the fixed instructions. */
8711 while (offset
< fragP
->fr_fix
)
8715 xtensa_insnbuf_from_chars
8716 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8717 fmt
= xtensa_format_decode (isa
, insnbuf
);
8719 if (fmt
== XTENSA_UNDEFINED
)
8721 as_fatal (_("undecodable instruction in instruction frag"));
8724 offset
+= xtensa_format_length (isa
, fmt
);
8732 static bfd_boolean
unrelaxed_frag_has_b_j (fragS
*);
8735 branch_before_loop_end (fragS
*base_fragP
)
8739 for (fragP
= base_fragP
;
8740 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
8741 fragP
= fragP
->fr_next
)
8743 if (unrelaxed_frag_has_b_j (fragP
))
8751 unrelaxed_frag_has_b_j (fragS
*fragP
)
8753 static xtensa_insnbuf insnbuf
= NULL
;
8754 xtensa_isa isa
= xtensa_default_isa
;
8755 unsigned int offset
= 0;
8757 if (!fragP
->tc_frag_data
.is_insn
)
8761 insnbuf
= xtensa_insnbuf_alloc (isa
);
8763 /* Decode the fixed instructions. */
8764 while (offset
< fragP
->fr_fix
)
8769 xtensa_insnbuf_from_chars
8770 (isa
, insnbuf
, (unsigned char *) fragP
->fr_literal
+ offset
, 0);
8771 fmt
= xtensa_format_decode (isa
, insnbuf
);
8772 if (fmt
== XTENSA_UNDEFINED
)
8775 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
8777 xtensa_opcode opcode
=
8778 get_opcode_from_buf (fragP
->fr_literal
+ offset
, slot
);
8779 if (xtensa_opcode_is_branch (isa
, opcode
) == 1
8780 || xtensa_opcode_is_jump (isa
, opcode
) == 1)
8783 offset
+= xtensa_format_length (isa
, fmt
);
8789 /* Checks to be made after initial assembly but before relaxation. */
8791 static bfd_boolean
is_empty_loop (const TInsn
*, fragS
*);
8792 static bfd_boolean
is_local_forward_loop (const TInsn
*, fragS
*);
8795 xtensa_sanity_check (void)
8797 const char *file_name
;
8802 file_name
= as_where (&line
);
8803 for (s
= stdoutput
->sections
; s
; s
= s
->next
)
8804 for (frchP
= seg_info (s
)->frchainP
; frchP
; frchP
= frchP
->frch_next
)
8808 /* Walk over all of the fragments in a subsection. */
8809 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8811 if (fragP
->fr_type
== rs_machine_dependent
8812 && fragP
->fr_subtype
== RELAX_SLOTS
8813 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_IMMED
)
8815 static xtensa_insnbuf insnbuf
= NULL
;
8818 if (fragP
->fr_opcode
!= NULL
)
8821 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
8822 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
, 0);
8823 tinsn_immed_from_frag (&t_insn
, fragP
, 0);
8825 if (xtensa_opcode_is_loop (xtensa_default_isa
,
8826 t_insn
.opcode
) == 1)
8828 if (is_empty_loop (&t_insn
, fragP
))
8830 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8831 as_bad (_("invalid empty loop"));
8833 if (!is_local_forward_loop (&t_insn
, fragP
))
8835 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
8836 as_bad (_("loop target does not follow "
8837 "loop instruction in section"));
8844 new_logical_line (file_name
, line
);
8848 #define LOOP_IMMED_OPN 1
8850 /* Return TRUE if the loop target is the next non-zero fragment. */
8853 is_empty_loop (const TInsn
*insn
, fragS
*fragP
)
8855 const expressionS
*exp
;
8859 if (insn
->insn_type
!= ITYPE_INSN
)
8862 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8865 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8868 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8870 if (exp
->X_op
!= O_symbol
)
8873 symbolP
= exp
->X_add_symbol
;
8877 if (symbol_get_frag (symbolP
) == NULL
)
8880 if (S_GET_VALUE (symbolP
) != 0)
8883 /* Walk through the zero-size fragments from this one. If we find
8884 the target fragment, then this is a zero-size loop. */
8886 for (next_fragP
= fragP
->fr_next
;
8888 next_fragP
= next_fragP
->fr_next
)
8890 if (next_fragP
== symbol_get_frag (symbolP
))
8892 if (next_fragP
->fr_fix
!= 0)
8900 is_local_forward_loop (const TInsn
*insn
, fragS
*fragP
)
8902 const expressionS
*exp
;
8906 if (insn
->insn_type
!= ITYPE_INSN
)
8909 if (xtensa_opcode_is_loop (xtensa_default_isa
, insn
->opcode
) != 1)
8912 if (insn
->ntok
<= LOOP_IMMED_OPN
)
8915 exp
= &insn
->tok
[LOOP_IMMED_OPN
];
8917 if (exp
->X_op
!= O_symbol
)
8920 symbolP
= exp
->X_add_symbol
;
8924 if (symbol_get_frag (symbolP
) == NULL
)
8927 /* Walk through fragments until we find the target.
8928 If we do not find the target, then this is an invalid loop. */
8930 for (next_fragP
= fragP
->fr_next
;
8932 next_fragP
= next_fragP
->fr_next
)
8934 if (next_fragP
== symbol_get_frag (symbolP
))
8942 #define XTINFO_NAME "Xtensa_Info"
8943 #define XTINFO_NAMESZ 12
8944 #define XTINFO_TYPE 1
8947 xtensa_add_config_info (void)
8953 info_sec
= subseg_new (".xtensa.info", 0);
8954 bfd_set_section_flags (info_sec
, SEC_HAS_CONTENTS
| SEC_READONLY
);
8956 data
= XNEWVEC (char, 100);
8957 sprintf (data
, "USE_ABSOLUTE_LITERALS=%d\nABI=%d\n",
8958 XSHAL_USE_ABSOLUTE_LITERALS
, XSHAL_ABI
);
8959 sz
= strlen (data
) + 1;
8961 /* Add enough null terminators to pad to a word boundary. */
8964 while ((sz
& 3) != 0);
8966 /* Follow the standard note section layout:
8967 First write the length of the name string. */
8969 md_number_to_chars (p
, (valueT
) XTINFO_NAMESZ
, 4);
8971 /* Next comes the length of the "descriptor", i.e., the actual data. */
8973 md_number_to_chars (p
, (valueT
) sz
, 4);
8975 /* Write the note type. */
8977 md_number_to_chars (p
, (valueT
) XTINFO_TYPE
, 4);
8979 /* Write the name field. */
8980 p
= frag_more (XTINFO_NAMESZ
);
8981 memcpy (p
, XTINFO_NAME
, XTINFO_NAMESZ
);
8983 /* Finally, write the descriptor. */
8985 memcpy (p
, data
, sz
);
8991 /* Alignment Functions. */
8994 get_text_align_power (unsigned target_size
)
8996 if (target_size
<= 4)
8999 if (target_size
<= 8)
9002 if (target_size
<= 16)
9005 if (target_size
<= 32)
9008 if (target_size
<= 64)
9011 if (target_size
<= 128)
9014 if (target_size
<= 256)
9017 if (target_size
<= 512)
9020 if (target_size
<= 1024)
9029 get_text_align_max_fill_size (int align_pow
,
9030 bfd_boolean use_nops
,
9031 bfd_boolean use_no_density
)
9034 return (1 << align_pow
);
9036 return 3 * (1 << align_pow
);
9038 return 1 + (1 << align_pow
);
9042 /* Calculate the minimum bytes of fill needed at "address" to align a
9043 target instruction of size "target_size" so that it does not cross a
9044 power-of-two boundary specified by "align_pow". If "use_nops" is FALSE,
9045 the fill can be an arbitrary number of bytes. Otherwise, the space must
9046 be filled by NOP instructions. */
9049 get_text_align_fill_size (addressT address
,
9052 bfd_boolean use_nops
,
9053 bfd_boolean use_no_density
)
9055 addressT alignment
, fill
, fill_limit
, fill_step
;
9056 bfd_boolean skip_one
= FALSE
;
9058 alignment
= (1 << align_pow
);
9059 gas_assert (target_size
> 0 && alignment
>= (addressT
) target_size
);
9063 fill_limit
= alignment
;
9066 else if (!use_no_density
)
9068 /* Combine 2- and 3-byte NOPs to fill anything larger than one. */
9069 fill_limit
= alignment
* 2;
9075 /* Fill with 3-byte NOPs -- can only fill multiples of 3. */
9076 fill_limit
= alignment
* 3;
9080 /* Try all fill sizes until finding one that works. */
9081 for (fill
= 0; fill
< fill_limit
; fill
+= fill_step
)
9083 if (skip_one
&& fill
== 1)
9085 if ((address
+ fill
) >> align_pow
9086 == (address
+ fill
+ target_size
- 1) >> align_pow
)
9095 branch_align_power (segT sec
)
9097 /* If the Xtensa processor has a fetch width of X, and
9098 the section is aligned to at least that boundary, then a branch
9099 target need only fit within that aligned block of memory to avoid
9100 a stall. Otherwise, try to fit branch targets within 4-byte
9101 aligned blocks (which may be insufficient, e.g., if the section
9102 has no alignment, but it's good enough). */
9103 int fetch_align
= get_text_align_power(xtensa_fetch_width
);
9104 int sec_align
= get_recorded_alignment (sec
);
9106 if (sec_align
>= fetch_align
)
9113 /* This will assert if it is not possible. */
9116 get_text_align_nop_count (offsetT fill_size
, bfd_boolean use_no_density
)
9122 gas_assert (fill_size
% 3 == 0);
9123 return (fill_size
/ 3);
9126 gas_assert (fill_size
!= 1); /* Bad argument. */
9128 while (fill_size
> 1)
9131 if (fill_size
== 2 || fill_size
== 4)
9133 fill_size
-= insn_size
;
9136 gas_assert (fill_size
!= 1); /* Bad algorithm. */
9142 get_text_align_nth_nop_size (offsetT fill_size
,
9144 bfd_boolean use_no_density
)
9151 gas_assert (fill_size
!= 1); /* Bad argument. */
9153 while (fill_size
> 1)
9156 if (fill_size
== 2 || fill_size
== 4)
9158 fill_size
-= insn_size
;
9168 /* For the given fragment, find the appropriate address
9169 for it to begin at if we are using NOPs to align it. */
9172 get_noop_aligned_address (fragS
*fragP
, addressT address
)
9174 /* The rule is: get next fragment's FIRST instruction. Find
9175 the smallest number of bytes that need to be added to
9176 ensure that the next fragment's FIRST instruction will fit
9179 E.G., 2 bytes : 0, 1, 2 mod 4
9182 If the FIRST instruction MIGHT be relaxed,
9183 assume that it will become a 3-byte instruction.
9185 Note again here that LOOP instructions are not bundleable,
9186 and this relaxation only applies to LOOP opcodes. */
9189 int first_insn_size
;
9191 addressT pre_opcode_bytes
;
9194 xtensa_opcode opcode
;
9195 bfd_boolean is_loop
;
9197 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
9198 gas_assert (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
);
9200 /* Find the loop frag. */
9201 first_insn
= next_non_empty_frag (fragP
);
9202 /* Now find the first insn frag. */
9203 first_insn
= next_non_empty_frag (first_insn
);
9205 is_loop
= next_frag_opcode_is_loop (fragP
, &opcode
);
9206 gas_assert (is_loop
);
9207 loop_insn_size
= xg_get_single_size (opcode
);
9209 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
9210 pre_opcode_bytes
+= loop_insn_size
;
9212 /* For loops, the alignment depends on the size of the
9213 instruction following the loop, not the LOOP instruction. */
9215 if (first_insn
== NULL
)
9216 first_insn_size
= xtensa_fetch_width
;
9218 first_insn_size
= get_loop_align_size (frag_format_size (first_insn
));
9220 /* If it was 8, then we'll need a larger alignment for the section. */
9221 align_power
= get_text_align_power (first_insn_size
);
9222 record_alignment (now_seg
, align_power
);
9224 fill_size
= get_text_align_fill_size
9225 (address
+ pre_opcode_bytes
, align_power
, first_insn_size
, TRUE
,
9226 fragP
->tc_frag_data
.is_no_density
);
9228 return address
+ fill_size
;
9232 /* 3 mechanisms for relaxing an alignment:
9234 Align to a power of 2.
9235 Align so the next fragment's instruction does not cross a word boundary.
9236 Align the current instruction so that if the next instruction
9237 were 3 bytes, it would not cross a word boundary.
9241 zeros - This is easy; always insert zeros.
9242 nops - 3-byte and 2-byte instructions
9246 >=5 : 3-byte instruction + fn (n-3)
9247 widening - widen previous instructions. */
9250 get_aligned_diff (fragS
*fragP
, addressT address
, offsetT
*max_diff
)
9252 addressT target_address
, loop_insn_offset
;
9254 xtensa_opcode loop_opcode
;
9255 bfd_boolean is_loop
;
9258 offsetT branch_align
;
9261 gas_assert (fragP
->fr_type
== rs_machine_dependent
);
9262 switch (fragP
->fr_subtype
)
9264 case RELAX_DESIRE_ALIGN
:
9265 target_size
= next_frag_format_size (fragP
);
9266 if (target_size
== XTENSA_UNDEFINED
)
9268 align_power
= branch_align_power (now_seg
);
9269 branch_align
= 1 << align_power
;
9270 /* Don't count on the section alignment being as large as the target. */
9271 if (target_size
> branch_align
)
9272 target_size
= branch_align
;
9273 opt_diff
= get_text_align_fill_size (address
, align_power
,
9274 target_size
, FALSE
, FALSE
);
9276 *max_diff
= (opt_diff
+ branch_align
9277 - (target_size
+ ((address
+ opt_diff
) % branch_align
)));
9278 gas_assert (*max_diff
>= opt_diff
);
9281 case RELAX_ALIGN_NEXT_OPCODE
:
9282 /* The next non-empty frag after this one holds the LOOP instruction
9283 that needs to be aligned. The required alignment depends on the
9284 size of the next non-empty frag after the loop frag, i.e., the
9285 first instruction in the loop. */
9286 loop_frag
= next_non_empty_frag (fragP
);
9287 target_size
= get_loop_align_size (next_frag_format_size (loop_frag
));
9288 loop_insn_offset
= 0;
9289 is_loop
= next_frag_opcode_is_loop (fragP
, &loop_opcode
);
9290 gas_assert (is_loop
);
9292 /* If the loop has been expanded then the LOOP instruction
9293 could be at an offset from this fragment. */
9294 if (loop_frag
->tc_frag_data
.slot_subtypes
[0] != RELAX_IMMED
)
9295 loop_insn_offset
= get_expanded_loop_offset (loop_opcode
);
9297 /* In an ideal world, which is what we are shooting for here,
9298 we wouldn't need to use any NOPs immediately prior to the
9299 LOOP instruction. If this approach fails, relax_frag_loop_align
9300 will call get_noop_aligned_address. */
9302 address
+ loop_insn_offset
+ xg_get_single_size (loop_opcode
);
9303 align_power
= get_text_align_power (target_size
);
9304 opt_diff
= get_text_align_fill_size (target_address
, align_power
,
9305 target_size
, FALSE
, FALSE
);
9307 *max_diff
= xtensa_fetch_width
9308 - ((target_address
+ opt_diff
) % xtensa_fetch_width
)
9309 - target_size
+ opt_diff
;
9310 gas_assert (*max_diff
>= opt_diff
);
9321 /* md_relax_frag Hook and Helper Functions. */
9323 static long relax_frag_loop_align (fragS
*, long);
9324 static long relax_frag_for_align (fragS
*, long);
9325 static long relax_frag_immed
9326 (segT
, fragS
*, long, int, xtensa_format
, int, int *, bfd_boolean
);
9328 /* Get projected address for the first fulcrum on a path from source to
9330 static addressT
xg_get_fulcrum (addressT source
, addressT target
)
9332 offsetT delta
= target
- source
;
9335 n
= (labs (delta
) + J_RANGE
- J_MARGIN
- 1) / (J_RANGE
- J_MARGIN
);
9336 return source
+ delta
/ n
;
9339 /* Given trampoline index, source and target of a jump find the best
9340 candidate trampoline for the first fulcrum. The best trampoline is
9341 the one in the reach of "j' instruction from the source, closest to
9342 the projected fulcrum address, and preferrably w/o a jump around or
9343 with already initialized jump around. */
9344 static size_t xg_find_best_trampoline (struct trampoline_index
*idx
,
9345 addressT source
, addressT target
)
9347 addressT fulcrum
= xg_get_fulcrum (source
, target
);
9350 size_t base_tr
= xg_find_trampoline (idx
, fulcrum
);
9353 /* Check trampoline frags around the base_tr to find the best. */
9354 for (dist
= 0; checked
; ++dist
)
9357 size_t tr
= base_tr
- dist
;
9361 /* Trampolines are checked in the following order:
9362 base_tr, base_tr + 1, base_tr - 1, base_tr + 2, base_tr - 2 */
9363 for (i
= 0; i
< 2; ++i
, tr
= base_tr
+ dist
+ 1)
9364 if (tr
< idx
->n_entries
)
9366 fragS
*trampoline_frag
= idx
->entry
[tr
];
9369 /* Don't check trampolines outside source - target interval. */
9370 if ((trampoline_frag
->fr_address
< source
&&
9371 trampoline_frag
->fr_address
< target
) ||
9372 (trampoline_frag
->fr_address
> source
&&
9373 trampoline_frag
->fr_address
> target
))
9376 /* Don't choose trampoline that contains the source. */
9377 if (source
>= trampoline_frag
->fr_address
9378 && source
<= trampoline_frag
->fr_address
+
9379 trampoline_frag
->fr_fix
)
9382 off
= trampoline_frag
->fr_address
- fulcrum
;
9383 /* Stop if some trampoline is found and the search is more than
9384 J_RANGE / 4 from the projected fulcrum. A trampoline w/o jump
9385 around is nice, but it shouldn't have much overhead. */
9386 if (best
< idx
->n_entries
&& labs (off
) > J_RANGE
/ 4)
9389 off
= trampoline_frag
->fr_address
- source
;
9390 if (labs (off
) < J_RANGE
- J_MARGIN
)
9393 /* Stop if a trampoline w/o jump around is found or initialized
9394 trampoline with jump around is found. */
9395 if (!trampoline_frag
->tc_frag_data
.needs_jump_around
||
9396 trampoline_frag
->fr_fix
)
9398 else if (best
>= idx
->n_entries
)
9404 if (best
< idx
->n_entries
)
9407 as_fatal (_("cannot find suitable trampoline"));
9410 static fixS
*xg_relax_fixup (struct trampoline_index
*idx
, fixS
*fixP
)
9412 symbolS
*s
= fixP
->fx_addsy
;
9413 addressT source
= fixP
->fx_frag
->fr_address
;
9414 addressT target
= S_GET_VALUE (s
) + fixP
->fx_offset
;
9415 size_t tr
= xg_find_best_trampoline (idx
, source
, target
);
9416 fragS
*trampoline_frag
= idx
->entry
[tr
];
9419 init_trampoline_frag (trampoline_frag
);
9420 newfixP
= xg_append_jump (trampoline_frag
,
9421 fixP
->fx_addsy
, fixP
->fx_offset
);
9423 /* Adjust the fixup for the original "j" instruction to
9424 point to the newly added jump. */
9425 fixP
->fx_addsy
= trampoline_frag
->fr_symbol
;
9426 fixP
->fx_offset
= trampoline_frag
->fr_fix
- 3;
9427 fixP
->tc_fix_data
.X_add_symbol
= trampoline_frag
->fr_symbol
;
9428 fixP
->tc_fix_data
.X_add_number
= trampoline_frag
->fr_fix
- 3;
9430 trampoline_frag
->tc_frag_data
.relax_seen
= FALSE
;
9432 if (xg_is_trampoline_frag_full (trampoline_frag
))
9433 xg_remove_trampoline_from_index (idx
, tr
);
9438 static bfd_boolean
xg_is_relaxable_fixup (fixS
*fixP
)
9440 xtensa_isa isa
= xtensa_default_isa
;
9441 addressT addr
= fixP
->fx_frag
->fr_address
;
9444 symbolS
*s
= fixP
->fx_addsy
;
9447 xtensa_opcode opcode
;
9449 if (fixP
->fx_r_type
< BFD_RELOC_XTENSA_SLOT0_OP
||
9450 fixP
->fx_r_type
> BFD_RELOC_XTENSA_SLOT14_OP
)
9453 target
= S_GET_VALUE (s
) + fixP
->fx_offset
;
9454 delta
= target
- addr
;
9456 if (labs (delta
) < J_RANGE
- J_MARGIN
)
9459 xtensa_insnbuf_from_chars (isa
, trampoline_buf
,
9460 (unsigned char *) fixP
->fx_frag
->fr_literal
+
9462 fmt
= xtensa_format_decode (isa
, trampoline_buf
);
9463 gas_assert (fmt
!= XTENSA_UNDEFINED
);
9464 slot
= fixP
->tc_fix_data
.slot
;
9465 xtensa_format_get_slot (isa
, fmt
, slot
, trampoline_buf
, trampoline_slotbuf
);
9466 opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, trampoline_slotbuf
);
9467 return opcode
== xtensa_j_opcode
;
9470 static void xg_relax_fixups (struct trampoline_seg
*ts
)
9472 struct trampoline_index
*idx
= &ts
->index
;
9473 segment_info_type
*seginfo
= seg_info (now_seg
);
9476 for (fx
= seginfo
->fix_root
; fx
; fx
= fx
->fx_next
)
9479 struct trampoline_chain
*tc
= NULL
;
9481 if (xg_is_relaxable_fixup (fixP
))
9483 tc
= xg_find_best_eq_target (ts
, fixP
->fx_frag
->fr_address
,
9484 &fixP
->fx_addsy
, &fixP
->fx_offset
);
9486 tc
= xg_create_trampoline_chain (ts
, fixP
->fx_addsy
,
9491 while (xg_is_relaxable_fixup (fixP
))
9493 fixP
= xg_relax_fixup (idx
, fixP
);
9494 xg_add_location_to_chain (tc
, fixP
->fx_frag
->fr_symbol
,
9500 /* Given a trampoline frag relax all jumps that might want to use this
9501 trampoline. Only do real work once per relaxation cycle, when
9502 xg_relax_trampoline is called for the first trampoline in the now_seg.
9503 Don't use stretch, don't update new_stretch: place fulcrums with a
9504 slack to tolerate code movement. In the worst case if a jump between
9505 two trampolines wouldn't reach the next relaxation pass will fix it. */
9506 static void xg_relax_trampoline (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
,
9507 long *new_stretch ATTRIBUTE_UNUSED
)
9509 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
9511 if (ts
->index
.n_entries
&& ts
->index
.entry
[0] == fragP
)
9512 xg_relax_fixups (ts
);
9515 /* Return the number of bytes added to this fragment, given that the
9516 input has been stretched already by "stretch". */
9519 xtensa_relax_frag (fragS
*fragP
, long stretch
, int *stretched_p
)
9521 xtensa_isa isa
= xtensa_default_isa
;
9522 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
9523 long new_stretch
= 0;
9524 const char *file_name
;
9527 static xtensa_insnbuf vbuf
= NULL
;
9528 int slot
, num_slots
;
9531 file_name
= as_where (&line
);
9532 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
9534 fragP
->tc_frag_data
.unreported_expansion
= 0;
9536 switch (fragP
->fr_subtype
)
9538 case RELAX_ALIGN_NEXT_OPCODE
:
9539 /* Always convert. */
9540 if (fragP
->tc_frag_data
.relax_seen
)
9541 new_stretch
= relax_frag_loop_align (fragP
, stretch
);
9544 case RELAX_LOOP_END
:
9548 case RELAX_LOOP_END_ADD_NOP
:
9549 /* Add a NOP and switch to .fill 0. */
9550 new_stretch
= relax_frag_add_nop (fragP
);
9554 case RELAX_DESIRE_ALIGN
:
9555 /* Do nothing. The narrowing before this frag will either align
9560 case RELAX_LITERAL_FINAL
:
9563 case RELAX_LITERAL_NR
:
9565 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
9566 gas_assert (unreported
== lit_size
);
9567 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
9568 fragP
->fr_var
-= lit_size
;
9569 fragP
->fr_fix
+= lit_size
;
9575 vbuf
= xtensa_insnbuf_alloc (isa
);
9577 xtensa_insnbuf_from_chars
9578 (isa
, vbuf
, (unsigned char *) fragP
->fr_opcode
, 0);
9579 fmt
= xtensa_format_decode (isa
, vbuf
);
9580 num_slots
= xtensa_format_num_slots (isa
, fmt
);
9582 for (slot
= 0; slot
< num_slots
; slot
++)
9584 switch (fragP
->tc_frag_data
.slot_subtypes
[slot
])
9587 if (fragP
->tc_frag_data
.relax_seen
)
9588 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9592 case RELAX_IMMED_STEP1
:
9593 case RELAX_IMMED_STEP2
:
9594 case RELAX_IMMED_STEP3
:
9595 /* Place the immediate. */
9596 new_stretch
+= relax_frag_immed
9597 (now_seg
, fragP
, stretch
,
9598 fragP
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
9599 fmt
, slot
, stretched_p
, FALSE
);
9603 /* This is OK; see the note in xg_assemble_vliw_tokens. */
9609 case RELAX_LITERAL_POOL_BEGIN
:
9610 if (fragP
->fr_var
!= 0)
9612 /* We have a converted "candidate" literal pool;
9613 assemble a jump around it. */
9615 if (!litpool_slotbuf
)
9617 litpool_buf
= xtensa_insnbuf_alloc (isa
);
9618 litpool_slotbuf
= xtensa_insnbuf_alloc (isa
);
9621 fragP
->tc_frag_data
.relax_seen
= FALSE
; /* Need another pass. */
9622 fragP
->tc_frag_data
.is_insn
= TRUE
;
9624 insn
.insn_type
= ITYPE_INSN
;
9625 insn
.opcode
= xtensa_j_opcode
;
9627 set_expr_symbol_offset (&insn
.tok
[0], fragP
->fr_symbol
,
9629 fmt
= xg_get_single_format (xtensa_j_opcode
);
9630 tinsn_to_slotbuf (fmt
, 0, &insn
, litpool_slotbuf
);
9631 xtensa_format_set_slot (isa
, fmt
, 0, litpool_buf
, litpool_slotbuf
);
9632 xtensa_insnbuf_to_chars (isa
, litpool_buf
,
9633 (unsigned char *)fragP
->fr_literal
+
9638 fix_new (fragP
, 0, 3, fragP
->fr_symbol
, 0, TRUE
,
9639 BFD_RELOC_XTENSA_SLOT0_OP
);
9643 case RELAX_LITERAL_POOL_END
:
9644 case RELAX_LITERAL_POOL_CANDIDATE_BEGIN
:
9645 case RELAX_MAYBE_UNREACHABLE
:
9646 case RELAX_MAYBE_DESIRE_ALIGN
:
9647 /* No relaxation required. */
9650 case RELAX_FILL_NOP
:
9651 case RELAX_UNREACHABLE
:
9652 if (fragP
->tc_frag_data
.relax_seen
)
9653 new_stretch
+= relax_frag_for_align (fragP
, stretch
);
9656 case RELAX_TRAMPOLINE
:
9657 if (fragP
->tc_frag_data
.relax_seen
)
9658 xg_relax_trampoline (fragP
, stretch
, &new_stretch
);
9662 as_bad (_("bad relaxation state"));
9665 /* Tell gas we need another relaxation pass. */
9666 if (! fragP
->tc_frag_data
.relax_seen
)
9668 fragP
->tc_frag_data
.relax_seen
= TRUE
;
9672 new_logical_line (file_name
, line
);
9678 relax_frag_loop_align (fragS
*fragP
, long stretch
)
9680 addressT old_address
, old_next_address
, old_size
;
9681 addressT new_address
, new_next_address
, new_size
;
9684 /* All the frags with relax_frag_for_alignment prior to this one in the
9685 section have been done, hopefully eliminating the need for a NOP here.
9686 But, this will put it in if necessary. */
9688 /* Calculate the old address of this fragment and the next fragment. */
9689 old_address
= fragP
->fr_address
- stretch
;
9690 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
9691 fragP
->tc_frag_data
.text_expansion
[0]);
9692 old_size
= old_next_address
- old_address
;
9694 /* Calculate the new address of this fragment and the next fragment. */
9695 new_address
= fragP
->fr_address
;
9697 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
9698 new_size
= new_next_address
- new_address
;
9700 growth
= new_size
- old_size
;
9702 /* Fix up the text_expansion field and return the new growth. */
9703 fragP
->tc_frag_data
.text_expansion
[0] += growth
;
9708 /* Add a NOP instruction. */
9711 relax_frag_add_nop (fragS
*fragP
)
9713 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
9714 int length
= fragP
->tc_frag_data
.is_no_density
? 3 : 2;
9715 assemble_nop (length
, nop_buf
);
9716 fragP
->tc_frag_data
.is_insn
= TRUE
;
9718 if (fragP
->fr_var
< length
)
9720 as_fatal (_("fr_var (%ld) < length (%d)"), (long) fragP
->fr_var
, length
);
9724 fragP
->fr_fix
+= length
;
9725 fragP
->fr_var
-= length
;
9730 static long future_alignment_required (fragS
*, long);
9733 relax_frag_for_align (fragS
*fragP
, long stretch
)
9735 /* Overview of the relaxation procedure for alignment:
9736 We can widen with NOPs or by widening instructions or by filling
9737 bytes after jump instructions. Find the opportune places and widen
9738 them if necessary. */
9743 gas_assert (fragP
->fr_subtype
== RELAX_FILL_NOP
9744 || fragP
->fr_subtype
== RELAX_UNREACHABLE
9745 || (fragP
->fr_subtype
== RELAX_SLOTS
9746 && fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
));
9748 stretch_me
= future_alignment_required (fragP
, stretch
);
9749 diff
= stretch_me
- fragP
->tc_frag_data
.text_expansion
[0];
9755 /* We expanded on a previous pass. Can we shrink now? */
9756 long shrink
= fragP
->tc_frag_data
.text_expansion
[0] - stretch_me
;
9757 if (shrink
<= stretch
&& stretch
> 0)
9759 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9765 /* Below here, diff > 0. */
9766 fragP
->tc_frag_data
.text_expansion
[0] = stretch_me
;
9772 /* Return the address of the next frag that should be aligned.
9774 By "address" we mean the address it _would_ be at if there
9775 is no action taken to align it between here and the target frag.
9776 In other words, if no narrows and no fill nops are used between
9777 here and the frag to align, _even_if_ some of the frags we use
9778 to align targets have already expanded on a previous relaxation
9781 Also, count each frag that may be used to help align the target.
9783 Return 0 if there are no frags left in the chain that need to be
9787 find_address_of_next_align_frag (fragS
**fragPP
,
9791 bfd_boolean
*paddable
)
9793 fragS
*fragP
= *fragPP
;
9794 addressT address
= fragP
->fr_address
;
9796 /* Do not reset the counts to 0. */
9800 /* Limit this to a small search. */
9801 if (*widens
>= (int) xtensa_fetch_width
)
9806 address
+= fragP
->fr_fix
;
9808 if (fragP
->fr_type
== rs_fill
)
9809 address
+= fragP
->fr_offset
* fragP
->fr_var
;
9810 else if (fragP
->fr_type
== rs_machine_dependent
)
9812 switch (fragP
->fr_subtype
)
9814 case RELAX_UNREACHABLE
:
9818 case RELAX_FILL_NOP
:
9820 if (!fragP
->tc_frag_data
.is_no_density
)
9825 if (fragP
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9830 address
+= total_frag_text_expansion (fragP
);
9834 address
+= fragP
->tc_frag_data
.text_expansion
[0];
9837 case RELAX_ALIGN_NEXT_OPCODE
:
9838 case RELAX_DESIRE_ALIGN
:
9842 case RELAX_MAYBE_UNREACHABLE
:
9843 case RELAX_MAYBE_DESIRE_ALIGN
:
9848 /* Just punt if we don't know the type. */
9855 /* Just punt if we don't know the type. */
9859 fragP
= fragP
->fr_next
;
9867 static long bytes_to_stretch (fragS
*, int, int, int, int);
9870 future_alignment_required (fragS
*fragP
, long stretch ATTRIBUTE_UNUSED
)
9872 fragS
*this_frag
= fragP
;
9876 int narrow_nops
= 0;
9877 bfd_boolean paddable
= FALSE
;
9878 offsetT local_opt_diff
;
9881 int stretch_amount
= 0;
9882 int local_stretch_amount
;
9883 int global_stretch_amount
;
9885 address
= find_address_of_next_align_frag
9886 (&fragP
, &wide_nops
, &narrow_nops
, &num_widens
, &paddable
);
9890 if (this_frag
->tc_frag_data
.is_aligning_branch
)
9891 this_frag
->tc_frag_data
.slot_subtypes
[0] = RELAX_IMMED
;
9893 frag_wane (this_frag
);
9897 local_opt_diff
= get_aligned_diff (fragP
, address
, &max_diff
);
9898 opt_diff
= local_opt_diff
;
9899 gas_assert (opt_diff
>= 0);
9900 gas_assert (max_diff
>= opt_diff
);
9905 fragP
= fragP
->fr_next
;
9907 while (fragP
&& opt_diff
< max_diff
&& address
)
9909 /* We only use these to determine if we can exit early
9910 because there will be plenty of ways to align future
9912 int glob_widens
= 0;
9915 bfd_boolean glob_pad
= 0;
9916 address
= find_address_of_next_align_frag
9917 (&fragP
, &glob_widens
, &dnn
, &dw
, &glob_pad
);
9918 /* If there is a padable portion, then skip. */
9919 if (glob_pad
|| glob_widens
>= (1 << branch_align_power (now_seg
)))
9924 offsetT next_m_diff
;
9925 offsetT next_o_diff
;
9927 /* Downrange frags haven't had stretch added to them yet. */
9930 /* The address also includes any text expansion from this
9931 frag in a previous pass, but we don't want that. */
9932 address
-= this_frag
->tc_frag_data
.text_expansion
[0];
9934 /* Assume we are going to move at least opt_diff. In
9935 reality, we might not be able to, but assuming that
9936 we will helps catch cases where moving opt_diff pushes
9937 the next target from aligned to unaligned. */
9938 address
+= opt_diff
;
9940 next_o_diff
= get_aligned_diff (fragP
, address
, &next_m_diff
);
9942 /* Now cleanup for the adjustments to address. */
9943 next_o_diff
+= opt_diff
;
9944 next_m_diff
+= opt_diff
;
9945 if (next_o_diff
<= max_diff
&& next_o_diff
> opt_diff
)
9946 opt_diff
= next_o_diff
;
9947 if (next_m_diff
< max_diff
)
9948 max_diff
= next_m_diff
;
9949 fragP
= fragP
->fr_next
;
9953 /* If there are enough wideners in between, do it. */
9956 if (this_frag
->fr_subtype
== RELAX_UNREACHABLE
)
9958 gas_assert (opt_diff
<= (signed) xtensa_fetch_width
);
9963 local_stretch_amount
9964 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9965 num_widens
, local_opt_diff
);
9966 global_stretch_amount
9967 = bytes_to_stretch (this_frag
, wide_nops
, narrow_nops
,
9968 num_widens
, opt_diff
);
9969 /* If the condition below is true, then the frag couldn't
9970 stretch the correct amount for the global case, so we just
9971 optimize locally. We'll rely on the subsequent frags to get
9972 the correct alignment in the global case. */
9973 if (global_stretch_amount
< local_stretch_amount
)
9974 stretch_amount
= local_stretch_amount
;
9976 stretch_amount
= global_stretch_amount
;
9978 if (this_frag
->fr_subtype
== RELAX_SLOTS
9979 && this_frag
->tc_frag_data
.slot_subtypes
[0] == RELAX_NARROW
)
9980 gas_assert (stretch_amount
<= 1);
9981 else if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
9983 if (this_frag
->tc_frag_data
.is_no_density
)
9984 gas_assert (stretch_amount
== 3 || stretch_amount
== 0);
9986 gas_assert (stretch_amount
<= 3);
9989 return stretch_amount
;
9993 /* The idea: widen everything you can to get a target or loop aligned,
9994 then start using NOPs.
9996 wide_nops = the number of wide NOPs available for aligning
9997 narrow_nops = the number of narrow NOPs available for aligning
9998 (a subset of wide_nops)
9999 widens = the number of narrow instructions that should be widened
10004 bytes_to_stretch (fragS
*this_frag
,
10013 int bytes_short
= desired_diff
- num_widens
;
10015 gas_assert (desired_diff
>= 0
10016 && desired_diff
< (signed) xtensa_fetch_width
);
10017 if (desired_diff
== 0)
10020 gas_assert (wide_nops
> 0 || num_widens
> 0);
10022 /* Always prefer widening to NOP-filling. */
10023 if (bytes_short
< 0)
10025 /* There are enough RELAX_NARROW frags after this one
10026 to align the target without widening this frag in any way. */
10030 if (bytes_short
== 0)
10032 /* Widen every narrow between here and the align target
10033 and the align target will be properly aligned. */
10034 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10040 /* From here we will need at least one NOP to get an alignment.
10041 However, we may not be able to align at all, in which case,
10043 nops_needed
= desired_diff
/ 3;
10045 /* If there aren't enough nops, don't widen. */
10046 if (nops_needed
> wide_nops
)
10049 /* First try it with all wide nops. */
10050 nop_bytes
= nops_needed
* 3;
10051 extra_bytes
= desired_diff
- nop_bytes
;
10053 if (nop_bytes
+ num_widens
>= desired_diff
)
10055 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10057 else if (num_widens
== extra_bytes
)
10062 /* Add a narrow nop. */
10066 if (narrow_nops
== 0 || nops_needed
> wide_nops
)
10069 if (nop_bytes
+ num_widens
>= desired_diff
&& extra_bytes
>= 0)
10071 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10072 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
10073 else if (num_widens
== extra_bytes
)
10078 /* Replace a wide nop with a narrow nop--we can get here if
10079 extra_bytes was negative in the previous conditional. */
10080 if (narrow_nops
== 1)
10084 if (nop_bytes
+ num_widens
>= desired_diff
)
10086 if (this_frag
->fr_subtype
== RELAX_FILL_NOP
)
10087 return !this_frag
->tc_frag_data
.is_no_density
? 2 : 3;
10088 else if (num_widens
== extra_bytes
)
10093 /* If we can't satisfy any of the above cases, then we can't align
10094 using padding or fill nops. */
10100 xg_find_best_trampoline_for_tinsn (TInsn
*tinsn
, fragS
*fragP
)
10102 symbolS
*sym
= tinsn
->tok
[0].X_add_symbol
;
10103 addressT source
= fragP
->fr_address
;
10104 addressT target
= S_GET_VALUE (sym
) + tinsn
->tok
[0].X_add_number
;
10105 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10108 if (!ts
|| !ts
->index
.n_entries
)
10111 i
= xg_find_best_trampoline (&ts
->index
, source
, target
);
10113 return ts
->index
.entry
[i
];
10117 /* Append jump to sym + offset to the end of the trampoline frag fragP.
10118 Adjust fragP's jump around if it's present. Adjust fragP's fr_fix/fr_var
10119 and finish the frag if it's full (but don't remove it from the trampoline
10120 frag index). Return fixup for the newly created jump. */
10121 static fixS
*xg_append_jump (fragS
*fragP
, symbolS
*sym
, offsetT offset
)
10126 xtensa_isa isa
= xtensa_default_isa
;
10128 gas_assert (fragP
->fr_var
>= 3);
10129 tinsn_init (&insn
);
10130 insn
.insn_type
= ITYPE_INSN
;
10131 insn
.opcode
= xtensa_j_opcode
;
10133 set_expr_symbol_offset (&insn
.tok
[0], sym
, offset
);
10134 fmt
= xg_get_single_format (xtensa_j_opcode
);
10135 tinsn_to_slotbuf (fmt
, 0, &insn
, trampoline_slotbuf
);
10136 xtensa_format_set_slot (isa
, fmt
, 0, trampoline_buf
, trampoline_slotbuf
);
10137 xtensa_insnbuf_to_chars (isa
, trampoline_buf
,
10138 (unsigned char *)fragP
->fr_literal
+ fragP
->fr_fix
, 3);
10139 fixP
= fix_new (fragP
, fragP
->fr_fix
, 3, sym
, offset
, TRUE
,
10140 BFD_RELOC_XTENSA_SLOT0_OP
);
10141 fixP
->tc_fix_data
.slot
= 0;
10143 fragP
->fr_fix
+= 3;
10144 fragP
->fr_var
-= 3;
10146 /* Adjust the jump around this trampoline (if present). */
10147 if (fragP
->tc_frag_data
.jump_around_fix
)
10148 fragP
->tc_frag_data
.jump_around_fix
->fx_offset
+= 3;
10150 /* Do we have room for more? */
10151 if (xg_is_trampoline_frag_full (fragP
))
10154 fragP
->fr_subtype
= 0;
10162 init_trampoline_frag (fragS
*fp
)
10166 if (fp
->fr_fix
== 0)
10169 char label
[10 + 2 * sizeof(fp
)];
10171 sprintf (label
, ".L0_TR_%p", fp
);
10172 lsym
= (symbolS
*)local_symbol_make (label
, now_seg
, 0, fp
);
10173 fp
->fr_symbol
= lsym
;
10174 if (fp
->tc_frag_data
.needs_jump_around
)
10176 fp
->tc_frag_data
.jump_around_fix
= xg_append_jump (fp
, lsym
, 3);
10184 xg_get_single_symbol_slot (fragS
*fragP
)
10189 for (i
= 0; i
< MAX_SLOTS
; ++i
)
10190 if (fragP
->tc_frag_data
.slot_symbols
[i
])
10192 gas_assert (slot
== -1);
10196 gas_assert (slot
>= 0 && slot
< MAX_SLOTS
);
10202 add_jump_to_trampoline (fragS
*tramp
, fragS
*origfrag
)
10204 int slot
= xg_get_single_symbol_slot (origfrag
);
10207 /* Assemble a jump to the target label in the trampoline frag. */
10208 fixP
= xg_append_jump (tramp
,
10209 origfrag
->tc_frag_data
.slot_symbols
[slot
],
10210 origfrag
->tc_frag_data
.slot_offsets
[slot
]);
10212 /* Modify the original j to point here. */
10213 origfrag
->tc_frag_data
.slot_symbols
[slot
] = tramp
->fr_symbol
;
10214 origfrag
->tc_frag_data
.slot_offsets
[slot
] = tramp
->fr_fix
- 3;
10216 /* If trampoline is full, remove it from the list. */
10217 if (xg_is_trampoline_frag_full (tramp
))
10219 struct trampoline_seg
*ts
= find_trampoline_seg (now_seg
);
10220 size_t tr
= xg_find_trampoline (&ts
->index
, tramp
->fr_address
);
10222 gas_assert (ts
->index
.entry
[tr
] == tramp
);
10223 xg_remove_trampoline_from_index (&ts
->index
, tr
);
10231 relax_frag_immed (segT segP
,
10238 bfd_boolean estimate_only
)
10242 bfd_boolean negatable_branch
= FALSE
;
10243 bfd_boolean branch_jmp_to_next
= FALSE
;
10244 bfd_boolean from_wide_insn
= FALSE
;
10245 xtensa_isa isa
= xtensa_default_isa
;
10247 offsetT frag_offset
;
10249 int num_text_bytes
, num_literal_bytes
;
10250 int literal_diff
, total_text_diff
, this_text_diff
;
10252 gas_assert (fragP
->fr_opcode
!= NULL
);
10254 xg_clear_vinsn (&cur_vinsn
);
10255 vinsn_from_chars (&cur_vinsn
, fragP
->fr_opcode
);
10256 if (cur_vinsn
.num_slots
> 1)
10257 from_wide_insn
= TRUE
;
10259 tinsn
= cur_vinsn
.slots
[slot
];
10260 tinsn_immed_from_frag (&tinsn
, fragP
, slot
);
10262 if (estimate_only
&& xtensa_opcode_is_loop (isa
, tinsn
.opcode
) == 1)
10265 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10266 branch_jmp_to_next
= is_branch_jmp_to_next (&tinsn
, fragP
);
10268 negatable_branch
= (xtensa_opcode_is_branch (isa
, tinsn
.opcode
) == 1);
10270 old_size
= xtensa_format_length (isa
, fmt
);
10272 /* Special case: replace a branch to the next instruction with a NOP.
10273 This is required to work around a hardware bug in T1040.0 and also
10274 serves as an optimization. */
10276 if (branch_jmp_to_next
10277 && ((old_size
== 2) || (old_size
== 3))
10278 && !next_frag_is_loop_target (fragP
))
10281 /* Here is the fun stuff: Get the immediate field from this
10282 instruction. If it fits, we are done. If not, find the next
10283 instruction sequence that fits. */
10285 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10286 istack_init (&istack
);
10287 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
, frag_offset
,
10288 min_steps
, stretch
);
10289 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10291 fragP
->tc_frag_data
.slot_subtypes
[slot
] = (int) RELAX_IMMED
+ num_steps
;
10293 /* Figure out the number of bytes needed. */
10294 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10296 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10297 num_text_bytes
= get_num_stack_text_bytes (&istack
);
10299 if (from_wide_insn
)
10302 while (istack
.insn
[first
].opcode
== XTENSA_UNDEFINED
)
10305 num_text_bytes
+= old_size
;
10306 if (opcode_fits_format_slot (istack
.insn
[first
].opcode
, fmt
, slot
))
10307 num_text_bytes
-= xg_get_single_size (istack
.insn
[first
].opcode
);
10310 /* The first instruction in the relaxed sequence will go after
10311 the current wide instruction, and thus its symbolic immediates
10314 istack_init (&istack
);
10315 num_steps
= xg_assembly_relax (&istack
, &tinsn
, segP
, fragP
,
10316 frag_offset
+ old_size
,
10317 min_steps
, stretch
+ old_size
);
10318 gas_assert (num_steps
>= min_steps
&& num_steps
<= RELAX_IMMED_MAXSTEPS
);
10320 fragP
->tc_frag_data
.slot_subtypes
[slot
]
10321 = (int) RELAX_IMMED
+ num_steps
;
10323 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
10325 = num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
[slot
];
10327 num_text_bytes
= get_num_stack_text_bytes (&istack
) + old_size
;
10331 total_text_diff
= num_text_bytes
- old_size
;
10332 this_text_diff
= total_text_diff
- fragP
->tc_frag_data
.text_expansion
[slot
];
10334 /* It MUST get larger. If not, we could get an infinite loop. */
10335 gas_assert (num_text_bytes
>= 0);
10336 gas_assert (literal_diff
>= 0);
10337 gas_assert (total_text_diff
>= 0);
10339 fragP
->tc_frag_data
.text_expansion
[slot
] = total_text_diff
;
10340 fragP
->tc_frag_data
.literal_expansion
[slot
] = num_literal_bytes
;
10341 gas_assert (fragP
->tc_frag_data
.text_expansion
[slot
] >= 0);
10342 gas_assert (fragP
->tc_frag_data
.literal_expansion
[slot
] >= 0);
10344 /* Find the associated expandable literal for this. */
10345 if (literal_diff
!= 0)
10347 fragS
*lit_fragP
= fragP
->tc_frag_data
.literal_frags
[slot
];
10350 gas_assert (literal_diff
== 4);
10351 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
10353 /* We expect that the literal section state has NOT been
10355 gas_assert (lit_fragP
->fr_type
== rs_machine_dependent
10356 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
10357 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
10359 /* We need to mark this section for another iteration
10365 if (negatable_branch
&& istack
.ninsn
> 1)
10366 update_next_frag_state (fragP
);
10368 /* If last insn is a jump, and it cannot reach its target, try to find a trampoline. */
10369 if (istack
.ninsn
> 2 &&
10370 istack
.insn
[istack
.ninsn
- 1].insn_type
== ITYPE_LABEL
&&
10371 istack
.insn
[istack
.ninsn
- 2].insn_type
== ITYPE_INSN
&&
10372 istack
.insn
[istack
.ninsn
- 2].opcode
== xtensa_j_opcode
)
10374 TInsn
*jinsn
= &istack
.insn
[istack
.ninsn
- 2];
10375 struct trampoline_seg
*ts
= find_trampoline_seg (segP
);
10376 struct trampoline_chain
*tc
= NULL
;
10379 !xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
,
10382 int s
= xg_get_single_symbol_slot (fragP
);
10383 addressT offset
= fragP
->tc_frag_data
.slot_offsets
[s
];
10385 tc
= xg_find_best_eq_target (ts
, fragP
->fr_address
,
10386 &fragP
->tc_frag_data
.slot_symbols
[s
],
10390 tc
= xg_create_trampoline_chain (ts
,
10391 fragP
->tc_frag_data
.slot_symbols
[s
],
10393 fragP
->tc_frag_data
.slot_offsets
[s
] = offset
;
10394 tinsn_immed_from_frag (jinsn
, fragP
, s
);
10397 if (!xg_symbolic_immeds_fit (jinsn
, segP
, fragP
, fragP
->fr_offset
,
10400 fragS
*tf
= xg_find_best_trampoline_for_tinsn (jinsn
, fragP
);
10406 this_text_diff
+= init_trampoline_frag (tf
) + 3;
10407 fixP
= add_jump_to_trampoline (tf
, fragP
);
10408 xg_add_location_to_chain (tc
, fixP
->fx_frag
->fr_symbol
,
10410 fragP
->tc_frag_data
.relax_seen
= FALSE
;
10414 /* If target symbol is undefined, assume it will reach once linked. */
10415 expressionS
*exp
= &istack
.insn
[istack
.ninsn
- 2].tok
[0];
10417 if (exp
->X_op
== O_symbol
&& S_IS_DEFINED (exp
->X_add_symbol
))
10419 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
10420 _("jump target out of range; no usable trampoline found"));
10426 return this_text_diff
;
10430 /* md_convert_frag Hook and Helper Functions. */
10432 static void convert_frag_align_next_opcode (fragS
*);
10433 static void convert_frag_narrow (segT
, fragS
*, xtensa_format
, int);
10434 static void convert_frag_fill_nop (fragS
*);
10435 static void convert_frag_immed (segT
, fragS
*, int, xtensa_format
, int);
10438 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec
, fragS
*fragp
)
10440 static xtensa_insnbuf vbuf
= NULL
;
10441 xtensa_isa isa
= xtensa_default_isa
;
10445 const char *file_name
;
10448 file_name
= as_where (&line
);
10449 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
10451 switch (fragp
->fr_subtype
)
10453 case RELAX_ALIGN_NEXT_OPCODE
:
10454 /* Always convert. */
10455 convert_frag_align_next_opcode (fragp
);
10458 case RELAX_DESIRE_ALIGN
:
10459 /* Do nothing. If not aligned already, too bad. */
10462 case RELAX_LITERAL
:
10463 case RELAX_LITERAL_FINAL
:
10468 vbuf
= xtensa_insnbuf_alloc (isa
);
10470 xtensa_insnbuf_from_chars
10471 (isa
, vbuf
, (unsigned char *) fragp
->fr_opcode
, 0);
10472 fmt
= xtensa_format_decode (isa
, vbuf
);
10473 num_slots
= xtensa_format_num_slots (isa
, fmt
);
10475 for (slot
= 0; slot
< num_slots
; slot
++)
10477 switch (fragp
->tc_frag_data
.slot_subtypes
[slot
])
10480 convert_frag_narrow (sec
, fragp
, fmt
, slot
);
10484 case RELAX_IMMED_STEP1
:
10485 case RELAX_IMMED_STEP2
:
10486 case RELAX_IMMED_STEP3
:
10487 /* Place the immediate. */
10490 fragp
->tc_frag_data
.slot_subtypes
[slot
] - RELAX_IMMED
,
10495 /* This is OK because some slots could have
10496 relaxations and others have none. */
10502 case RELAX_UNREACHABLE
:
10503 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, fragp
->fr_var
);
10504 fragp
->fr_fix
+= fragp
->tc_frag_data
.text_expansion
[0];
10505 fragp
->fr_var
-= fragp
->tc_frag_data
.text_expansion
[0];
10509 case RELAX_MAYBE_UNREACHABLE
:
10510 case RELAX_MAYBE_DESIRE_ALIGN
:
10514 case RELAX_FILL_NOP
:
10515 convert_frag_fill_nop (fragp
);
10518 case RELAX_LITERAL_NR
:
10519 if (use_literal_section
)
10521 /* This should have been handled during relaxation. When
10522 relaxing a code segment, literals sometimes need to be
10523 added to the corresponding literal segment. If that
10524 literal segment has already been relaxed, then we end up
10525 in this situation. Marking the literal segments as data
10526 would make this happen less often (since GAS always relaxes
10527 code before data), but we could still get into trouble if
10528 there are instructions in a segment that is not marked as
10529 containing code. Until we can implement a better solution,
10530 cheat and adjust the addresses of all the following frags.
10531 This could break subsequent alignments, but the linker's
10532 literal coalescing will do that anyway. */
10535 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
10536 gas_assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
10537 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
10538 fragp
->fr_var
-= 4;
10539 fragp
->fr_fix
+= 4;
10540 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
10541 f
->fr_address
+= 4;
10544 as_bad (_("invalid relaxation fragment result"));
10547 case RELAX_TRAMPOLINE
:
10552 new_logical_line (file_name
, line
);
10557 convert_frag_align_next_opcode (fragS
*fragp
)
10559 char *nop_buf
; /* Location for Writing. */
10560 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
10561 addressT aligned_address
;
10563 int nop
, nop_count
;
10565 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
10567 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
10568 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
10569 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
10571 for (nop
= 0; nop
< nop_count
; nop
++)
10574 nop_size
= get_text_align_nth_nop_size (fill_size
, nop
, use_no_density
);
10576 assemble_nop (nop_size
, nop_buf
);
10577 nop_buf
+= nop_size
;
10580 fragp
->fr_fix
+= fill_size
;
10581 fragp
->fr_var
-= fill_size
;
10586 convert_frag_narrow (segT segP
, fragS
*fragP
, xtensa_format fmt
, int slot
)
10588 TInsn tinsn
, single_target
;
10589 int size
, old_size
, diff
;
10590 offsetT frag_offset
;
10592 gas_assert (slot
== 0);
10593 tinsn_from_chars (&tinsn
, fragP
->fr_opcode
, 0);
10595 if (fragP
->tc_frag_data
.is_aligning_branch
== 1)
10597 gas_assert (fragP
->tc_frag_data
.text_expansion
[0] == 1
10598 || fragP
->tc_frag_data
.text_expansion
[0] == 0);
10599 convert_frag_immed (segP
, fragP
, fragP
->tc_frag_data
.text_expansion
[0],
10604 if (fragP
->tc_frag_data
.text_expansion
[0] == 0)
10606 /* No conversion. */
10611 gas_assert (fragP
->fr_opcode
!= NULL
);
10613 /* Frags in this relaxation state should only contain
10614 single instruction bundles. */
10615 tinsn_immed_from_frag (&tinsn
, fragP
, 0);
10617 /* Just convert it to a wide form.... */
10619 old_size
= xg_get_single_size (tinsn
.opcode
);
10621 tinsn_init (&single_target
);
10622 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
10624 if (! xg_is_single_relaxable_insn (&tinsn
, &single_target
, FALSE
))
10626 as_bad (_("unable to widen instruction"));
10630 size
= xg_get_single_size (single_target
.opcode
);
10631 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
, fragP
,
10632 frag_offset
, TRUE
);
10634 diff
= size
- old_size
;
10635 gas_assert (diff
>= 0);
10636 gas_assert (diff
<= fragP
->fr_var
);
10637 fragP
->fr_var
-= diff
;
10638 fragP
->fr_fix
+= diff
;
10646 convert_frag_fill_nop (fragS
*fragP
)
10648 char *loc
= &fragP
->fr_literal
[fragP
->fr_fix
];
10649 int size
= fragP
->tc_frag_data
.text_expansion
[0];
10650 gas_assert ((unsigned) size
== (fragP
->fr_next
->fr_address
10651 - fragP
->fr_address
- fragP
->fr_fix
));
10654 /* No conversion. */
10658 assemble_nop (size
, loc
);
10659 fragP
->tc_frag_data
.is_insn
= TRUE
;
10660 fragP
->fr_var
-= size
;
10661 fragP
->fr_fix
+= size
;
10666 static fixS
*fix_new_exp_in_seg
10667 (segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
10668 bfd_reloc_code_real_type
);
10671 convert_frag_immed (segT segP
,
10677 char *immed_instr
= fragP
->fr_opcode
;
10679 bfd_boolean expanded
= FALSE
;
10680 bfd_boolean branch_jmp_to_next
= FALSE
;
10681 char *fr_opcode
= fragP
->fr_opcode
;
10682 xtensa_isa isa
= xtensa_default_isa
;
10683 bfd_boolean from_wide_insn
= FALSE
;
10685 bfd_boolean is_loop
;
10687 gas_assert (fr_opcode
!= NULL
);
10689 xg_clear_vinsn (&cur_vinsn
);
10691 vinsn_from_chars (&cur_vinsn
, fr_opcode
);
10692 if (cur_vinsn
.num_slots
> 1)
10693 from_wide_insn
= TRUE
;
10695 orig_tinsn
= cur_vinsn
.slots
[slot
];
10696 tinsn_immed_from_frag (&orig_tinsn
, fragP
, slot
);
10698 is_loop
= xtensa_opcode_is_loop (xtensa_default_isa
, orig_tinsn
.opcode
) == 1;
10700 if (workaround_b_j_loop_end
&& ! fragP
->tc_frag_data
.is_no_transform
)
10701 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_tinsn
, fragP
);
10703 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
10705 /* Conversion just inserts a NOP and marks the fix as completed. */
10706 bytes
= xtensa_format_length (isa
, fmt
);
10709 cur_vinsn
.slots
[slot
].opcode
=
10710 xtensa_format_slot_nop_opcode (isa
, cur_vinsn
.format
, slot
);
10711 cur_vinsn
.slots
[slot
].ntok
= 0;
10715 bytes
+= fragP
->tc_frag_data
.text_expansion
[0];
10716 gas_assert (bytes
== 2 || bytes
== 3);
10717 build_nop (&cur_vinsn
.slots
[0], bytes
);
10718 fragP
->fr_fix
+= fragP
->tc_frag_data
.text_expansion
[0];
10720 vinsn_to_insnbuf (&cur_vinsn
, fr_opcode
, frag_now
, TRUE
);
10721 xtensa_insnbuf_to_chars
10722 (isa
, cur_vinsn
.insnbuf
, (unsigned char *) fr_opcode
, 0);
10727 /* Here is the fun stuff: Get the immediate field from this
10728 instruction. If it fits, we're done. If not, find the next
10729 instruction sequence that fits. */
10733 symbolS
*lit_sym
= NULL
;
10734 int total_size
= 0;
10735 int target_offset
= 0;
10738 symbolS
*gen_label
= NULL
;
10739 offsetT frag_offset
;
10740 bfd_boolean first
= TRUE
;
10742 /* It does not fit. Find something that does and
10743 convert immediately. */
10744 frag_offset
= fr_opcode
- fragP
->fr_literal
;
10745 istack_init (&istack
);
10746 xg_assembly_relax (&istack
, &orig_tinsn
,
10747 segP
, fragP
, frag_offset
, min_steps
, 0);
10749 old_size
= xtensa_format_length (isa
, fmt
);
10751 /* Assemble this right inline. */
10753 /* First, create the mapping from a label name to the REAL label. */
10755 for (i
= 0; i
< istack
.ninsn
; i
++)
10757 TInsn
*tinsn
= &istack
.insn
[i
];
10760 switch (tinsn
->insn_type
)
10762 case ITYPE_LITERAL
:
10763 if (lit_sym
!= NULL
)
10764 as_bad (_("multiple literals in expansion"));
10765 /* First find the appropriate space in the literal pool. */
10766 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10767 if (lit_frag
== NULL
)
10768 as_bad (_("no registered fragment for literal"));
10769 if (tinsn
->ntok
!= 1)
10770 as_bad (_("number of literal tokens != 1"));
10772 /* Set the literal symbol and add a fixup. */
10773 lit_sym
= lit_frag
->fr_symbol
;
10777 if (align_targets
&& !is_loop
)
10779 fragS
*unreach
= fragP
->fr_next
;
10780 while (!(unreach
->fr_type
== rs_machine_dependent
10781 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10782 || unreach
->fr_subtype
== RELAX_UNREACHABLE
)))
10784 unreach
= unreach
->fr_next
;
10787 gas_assert (unreach
->fr_type
== rs_machine_dependent
10788 && (unreach
->fr_subtype
== RELAX_MAYBE_UNREACHABLE
10789 || unreach
->fr_subtype
== RELAX_UNREACHABLE
));
10791 target_offset
+= unreach
->tc_frag_data
.text_expansion
[0];
10793 gas_assert (gen_label
== NULL
);
10794 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
10795 fr_opcode
- fragP
->fr_literal
10796 + target_offset
, fragP
);
10800 if (first
&& from_wide_insn
)
10802 target_offset
+= xtensa_format_length (isa
, fmt
);
10804 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10805 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10808 target_offset
+= xg_get_single_size (tinsn
->opcode
);
10815 for (i
= 0; i
< istack
.ninsn
; i
++)
10817 TInsn
*tinsn
= &istack
.insn
[i
];
10821 bfd_reloc_code_real_type reloc_type
;
10823 switch (tinsn
->insn_type
)
10825 case ITYPE_LITERAL
:
10826 lit_frag
= fragP
->tc_frag_data
.literal_frags
[slot
];
10827 /* Already checked. */
10828 gas_assert (lit_frag
!= NULL
);
10829 gas_assert (lit_sym
!= NULL
);
10830 gas_assert (tinsn
->ntok
== 1);
10832 target_seg
= S_GET_SEGMENT (lit_sym
);
10833 gas_assert (target_seg
);
10834 reloc_type
= map_operator_to_reloc (tinsn
->tok
[0].X_op
, TRUE
);
10835 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
10836 &tinsn
->tok
[0], FALSE
, reloc_type
);
10843 xg_resolve_labels (tinsn
, gen_label
);
10844 xg_resolve_literals (tinsn
, lit_sym
);
10845 if (from_wide_insn
&& first
)
10848 if (opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10850 cur_vinsn
.slots
[slot
] = *tinsn
;
10854 cur_vinsn
.slots
[slot
].opcode
=
10855 xtensa_format_slot_nop_opcode (isa
, fmt
, slot
);
10856 cur_vinsn
.slots
[slot
].ntok
= 0;
10858 vinsn_to_insnbuf (&cur_vinsn
, immed_instr
, fragP
, TRUE
);
10859 xtensa_insnbuf_to_chars (isa
, cur_vinsn
.insnbuf
,
10860 (unsigned char *) immed_instr
, 0);
10861 fragP
->tc_frag_data
.is_insn
= TRUE
;
10862 size
= xtensa_format_length (isa
, fmt
);
10863 if (!opcode_fits_format_slot (tinsn
->opcode
, fmt
, slot
))
10865 xg_emit_insn_to_buf
10866 (tinsn
, immed_instr
+ size
, fragP
,
10867 immed_instr
- fragP
->fr_literal
+ size
, TRUE
);
10868 size
+= xg_get_single_size (tinsn
->opcode
);
10873 size
= xg_get_single_size (tinsn
->opcode
);
10874 xg_emit_insn_to_buf (tinsn
, immed_instr
, fragP
,
10875 immed_instr
- fragP
->fr_literal
, TRUE
);
10877 immed_instr
+= size
;
10878 total_size
+= size
;
10883 diff
= total_size
- old_size
;
10884 gas_assert (diff
>= 0);
10887 gas_assert (diff
<= fragP
->fr_var
);
10888 fragP
->fr_var
-= diff
;
10889 fragP
->fr_fix
+= diff
;
10892 /* Check for undefined immediates in LOOP instructions. */
10896 sym
= orig_tinsn
.tok
[1].X_add_symbol
;
10897 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10899 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10902 sym
= orig_tinsn
.tok
[1].X_op_symbol
;
10903 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
10905 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
10910 if (expanded
&& is_direct_call_opcode (orig_tinsn
.opcode
))
10912 /* Add an expansion note on the expanded instruction. */
10913 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
10914 &orig_tinsn
.tok
[0], TRUE
,
10915 BFD_RELOC_XTENSA_ASM_EXPAND
);
10920 /* Add a new fix expression into the desired segment. We have to
10921 switch to that segment to do this. */
10924 fix_new_exp_in_seg (segT new_seg
,
10925 subsegT new_subseg
,
10931 bfd_reloc_code_real_type r_type
)
10934 segT seg
= now_seg
;
10935 subsegT subseg
= now_subseg
;
10937 gas_assert (new_seg
!= 0);
10938 subseg_set (new_seg
, new_subseg
);
10940 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
10941 subseg_set (seg
, subseg
);
10947 /* A map that keeps information on a per-subsegment basis. This is
10948 maintained during initial assembly, but is invalid once the
10949 subsegments are smashed together. I.E., it cannot be used during
10952 typedef struct subseg_map_struct
10960 float total_freq
; /* fall-through + branch target frequency */
10961 float target_freq
; /* branch target frequency alone */
10963 struct subseg_map_struct
*next
;
10967 static subseg_map
*sseg_map
= NULL
;
10969 static subseg_map
*
10970 get_subseg_info (segT seg
, subsegT subseg
)
10972 subseg_map
*subseg_e
;
10974 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
10976 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
10983 static subseg_map
*
10984 add_subseg_info (segT seg
, subsegT subseg
)
10986 subseg_map
*subseg_e
= XNEW (subseg_map
);
10987 memset (subseg_e
, 0, sizeof (subseg_map
));
10988 subseg_e
->seg
= seg
;
10989 subseg_e
->subseg
= subseg
;
10990 subseg_e
->flags
= 0;
10991 /* Start off considering every branch target very important. */
10992 subseg_e
->target_freq
= 1.0;
10993 subseg_e
->total_freq
= 1.0;
10994 subseg_e
->next
= sseg_map
;
10995 sseg_map
= subseg_e
;
11001 get_last_insn_flags (segT seg
, subsegT subseg
)
11003 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11005 return subseg_e
->flags
;
11011 set_last_insn_flags (segT seg
,
11016 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11018 subseg_e
= add_subseg_info (seg
, subseg
);
11020 subseg_e
->flags
|= fl
;
11022 subseg_e
->flags
&= ~fl
;
11027 get_subseg_total_freq (segT seg
, subsegT subseg
)
11029 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11031 return subseg_e
->total_freq
;
11037 get_subseg_target_freq (segT seg
, subsegT subseg
)
11039 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11041 return subseg_e
->target_freq
;
11047 set_subseg_freq (segT seg
, subsegT subseg
, float total_f
, float target_f
)
11049 subseg_map
*subseg_e
= get_subseg_info (seg
, subseg
);
11051 subseg_e
= add_subseg_info (seg
, subseg
);
11052 subseg_e
->total_freq
= total_f
;
11053 subseg_e
->target_freq
= target_f
;
11057 /* Segment Lists and emit_state Stuff. */
11060 xtensa_move_seg_list_to_beginning (seg_list
*head
)
11065 segT literal_section
= head
->seg
;
11067 /* Move the literal section to the front of the section list. */
11068 gas_assert (literal_section
);
11069 if (literal_section
!= stdoutput
->sections
)
11071 bfd_section_list_remove (stdoutput
, literal_section
);
11072 bfd_section_list_prepend (stdoutput
, literal_section
);
11079 static void mark_literal_frags (seg_list
*);
11082 xg_promote_candidate_litpool (struct litpool_seg
*lps
,
11083 struct litpool_frag
*lp
)
11088 char label
[10 + 2 * sizeof (fragS
*)];
11090 poolbeg
= lp
->fragP
;
11092 poolbeg
->fr_subtype
= RELAX_LITERAL_POOL_BEGIN
;
11093 poolend
= poolbeg
->fr_next
;
11094 gas_assert (poolend
->fr_type
== rs_machine_dependent
&&
11095 poolend
->fr_subtype
== RELAX_LITERAL_POOL_END
);
11096 /* Create a local symbol pointing to the
11097 end of the pool. */
11098 sprintf (label
, ".L0_LT_%p", poolbeg
);
11099 lsym
= (symbolS
*)local_symbol_make (label
, lps
->seg
,
11101 poolbeg
->fr_symbol
= lsym
;
11102 /* Rest is done in xtensa_relax_frag. */
11105 static struct litpool_frag
*xg_find_litpool (struct litpool_seg
*lps
,
11106 struct litpool_frag
*lpf
,
11109 struct litpool_frag
*lp
= lpf
->prev
;
11111 gas_assert (lp
->fragP
);
11113 while (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11116 if (lp
->fragP
== NULL
)
11118 /* End of list; have to bite the bullet.
11119 Take the nearest. */
11123 /* Does it (conservatively) reach? */
11124 if (addr
- lp
->addr
<= 128 * 1024)
11126 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
&&
11127 lp
->literal_count
< MAX_POOL_LITERALS
)
11129 /* Found a good one. */
11132 else if (lp
->prev
->fragP
&&
11133 addr
- lp
->prev
->addr
> 128 * 1024 &&
11134 lp
->prev
->literal_count
< MAX_POOL_LITERALS
)
11136 /* This is still a "candidate" but the next one
11137 will be too far away, so revert to the nearest
11138 one, convert it and add the jump around. */
11145 if (lp
->literal_count
>= MAX_POOL_LITERALS
)
11148 while (lp
&& lp
->fragP
&& lp
->literal_count
>= MAX_POOL_LITERALS
)
11155 gas_assert (lp
&& lp
->fragP
&& lp
->literal_count
< MAX_POOL_LITERALS
);
11156 ++lp
->literal_count
;
11158 /* Convert candidate and add the jump around. */
11159 if (lp
->fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
)
11160 xg_promote_candidate_litpool (lps
, lp
);
11165 static bfd_boolean
xtensa_is_init_fini (segT seg
)
11169 return strcmp (segment_name (seg
), INIT_SECTION_NAME
) == 0
11170 || strcmp (segment_name (seg
), FINI_SECTION_NAME
) == 0;
11174 xtensa_assign_litpool_addresses (void)
11176 struct litpool_seg
*lps
;
11178 for (lps
= litpool_seg_list
.next
; lps
; lps
= lps
->next
)
11180 frchainS
*frchP
= seg_info (lps
->seg
)->frchainP
;
11181 struct litpool_frag
*lpf
= lps
->frag_list
.next
;
11184 if (xtensa_is_init_fini (lps
->seg
))
11187 for ( ; frchP
; frchP
= frchP
->frch_next
)
11190 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11192 if (lpf
&& fragP
== lpf
->fragP
)
11194 gas_assert(fragP
->fr_type
== rs_machine_dependent
&&
11195 (fragP
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
||
11196 fragP
->fr_subtype
== RELAX_LITERAL_POOL_CANDIDATE_BEGIN
));
11197 /* Found a litpool location. */
11201 if (fragP
->fr_type
== rs_machine_dependent
&&
11202 fragP
->fr_subtype
== RELAX_SLOTS
)
11205 for (slot
= 0; slot
< MAX_SLOTS
; slot
++)
11207 fragS
*litfrag
= fragP
->tc_frag_data
.literal_frags
[slot
];
11210 && litfrag
->tc_frag_data
.is_literal
11211 && !litfrag
->tc_frag_data
.literal_frag
)
11213 /* L32R referring .literal or generated as a result
11214 of relaxation. Point its literal to the nearest
11215 litpool preferring non-"candidate" positions to
11216 avoid the jump-around. */
11218 struct litpool_frag
*lp
;
11220 lp
= xg_find_litpool (lps
, lpf
, addr
);
11221 /* Take earliest use of this literal to avoid
11223 litfrag
->tc_frag_data
.literal_frag
= lp
->fragP
;
11227 addr
+= fragP
->fr_fix
;
11228 if (fragP
->fr_type
== rs_fill
)
11229 addr
+= fragP
->fr_offset
;
11236 xtensa_move_literals (void)
11239 frchainS
*frchain_from
, *frchain_to
;
11240 fragS
*search_frag
, *next_frag
, *literal_pool
, *insert_after
;
11241 fragS
**frag_splice
;
11244 fixS
*fix
, *next_fix
, **fix_splice
;
11246 const char *init_name
= INIT_SECTION_NAME
;
11247 const char *fini_name
= FINI_SECTION_NAME
;
11248 int init_name_len
= strlen(init_name
);
11249 int fini_name_len
= strlen(fini_name
);
11251 mark_literal_frags (literal_head
->next
);
11253 if (use_literal_section
)
11256 /* Assign addresses (rough estimates) to the potential literal pool locations
11257 and create new ones if the gaps are too large. */
11259 xtensa_assign_litpool_addresses ();
11261 /* Walk through the literal segments. */
11262 for (segment
= literal_head
->next
; segment
; segment
= segment
->next
)
11264 const char *seg_name
= segment_name (segment
->seg
);
11266 /* Keep the literals for .init and .fini in separate sections. */
11267 if ((!memcmp (seg_name
, init_name
, init_name_len
) &&
11268 !strcmp (seg_name
+ init_name_len
, ".literal")) ||
11269 (!memcmp (seg_name
, fini_name
, fini_name_len
) &&
11270 !strcmp (seg_name
+ fini_name_len
, ".literal")))
11273 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11274 search_frag
= frchain_from
->frch_root
;
11275 literal_pool
= NULL
;
11277 frag_splice
= &(frchain_from
->frch_root
);
11279 while (search_frag
&& !search_frag
->tc_frag_data
.literal_frag
)
11281 gas_assert (search_frag
->fr_fix
== 0
11282 || search_frag
->fr_type
== rs_align
);
11283 search_frag
= search_frag
->fr_next
;
11289 gas_assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
11290 == RELAX_LITERAL_POOL_BEGIN
);
11291 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
11293 /* Make sure that all the frags in this series are closed, and
11294 that there is at least one left over of zero-size. This
11295 prevents us from making a segment with an frchain without any
11297 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11298 xtensa_set_frag_assembly_state (frag_now
);
11299 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11300 xtensa_set_frag_assembly_state (frag_now
);
11302 while (search_frag
!= frag_now
)
11304 next_frag
= search_frag
->fr_next
;
11305 if (search_frag
->tc_frag_data
.literal_frag
)
11307 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
11308 gas_assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
11309 frchain_to
= literal_pool
->tc_frag_data
.lit_frchain
;
11310 gas_assert (frchain_to
);
11313 if (search_frag
->fr_type
== rs_fill
&& search_frag
->fr_fix
== 0)
11315 /* Skip empty fill frags. */
11316 *frag_splice
= next_frag
;
11317 search_frag
= next_frag
;
11321 if (search_frag
->fr_type
== rs_align
)
11323 /* Skip alignment frags, because the pool as a whole will be
11324 aligned if used, and we don't want to force alignment if the
11326 *frag_splice
= next_frag
;
11327 search_frag
= next_frag
;
11331 /* First, move the frag out of the literal section and
11332 to the appropriate place. */
11334 /* Insert an alignment frag at start of pool. */
11335 if (literal_pool
->fr_next
->fr_type
== rs_machine_dependent
&&
11336 literal_pool
->fr_next
->fr_subtype
== RELAX_LITERAL_POOL_END
)
11338 segT pool_seg
= literal_pool
->fr_next
->tc_frag_data
.lit_seg
;
11339 emit_state prev_state
;
11342 xtensa_switch_section_emit_state (&prev_state
, pool_seg
, 0);
11343 prev_frag
= frag_now
;
11344 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11345 align_frag
= frag_now
;
11346 frag_align (2, 0, 0);
11347 /* Splice it into the right place. */
11348 prev_frag
->fr_next
= align_frag
->fr_next
;
11349 align_frag
->fr_next
= literal_pool
->fr_next
;
11350 literal_pool
->fr_next
= align_frag
;
11351 /* Insert after this one. */
11352 literal_pool
->tc_frag_data
.literal_frag
= align_frag
;
11353 xtensa_restore_emit_state (&prev_state
);
11355 insert_after
= literal_pool
->tc_frag_data
.literal_frag
;
11356 dest_seg
= insert_after
->fr_next
->tc_frag_data
.lit_seg
;
11357 /* Skip align frag. */
11358 if (insert_after
->fr_next
->fr_type
== rs_align
)
11360 insert_after
= insert_after
->fr_next
;
11363 *frag_splice
= next_frag
;
11364 search_frag
->fr_next
= insert_after
->fr_next
;
11365 insert_after
->fr_next
= search_frag
;
11366 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
11367 literal_pool
->tc_frag_data
.literal_frag
= search_frag
;
11369 /* Now move any fixups associated with this frag to the
11371 fix
= frchain_from
->fix_root
;
11372 fix_splice
= &(frchain_from
->fix_root
);
11375 next_fix
= fix
->fx_next
;
11376 if (fix
->fx_frag
== search_frag
)
11378 *fix_splice
= next_fix
;
11379 fix
->fx_next
= frchain_to
->fix_root
;
11380 frchain_to
->fix_root
= fix
;
11381 if (frchain_to
->fix_tail
== NULL
)
11382 frchain_to
->fix_tail
= fix
;
11385 fix_splice
= &(fix
->fx_next
);
11388 search_frag
= next_frag
;
11391 if (frchain_from
->fix_root
!= NULL
)
11393 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11394 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
11396 gas_assert (frchain_from
->fix_root
== NULL
);
11398 frchain_from
->fix_tail
= NULL
;
11399 xtensa_restore_emit_state (&state
);
11402 /* Now fix up the SEGMENT value for all the literal symbols. */
11403 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
11405 symbolS
*lit_sym
= lit
->sym
;
11406 segT dseg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
11408 S_SET_SEGMENT (lit_sym
, dseg
);
11413 /* Walk over all the frags for segments in a list and mark them as
11414 containing literals. As clunky as this is, we can't rely on frag_var
11415 and frag_variant to get called in all situations. */
11418 mark_literal_frags (seg_list
*segment
)
11420 frchainS
*frchain_from
;
11421 fragS
*search_frag
;
11425 frchain_from
= seg_info (segment
->seg
)->frchainP
;
11426 search_frag
= frchain_from
->frch_root
;
11427 while (search_frag
)
11429 search_frag
->tc_frag_data
.is_literal
= TRUE
;
11430 search_frag
= search_frag
->fr_next
;
11432 segment
= segment
->next
;
11438 xtensa_reorder_seg_list (seg_list
*head
, segT after
)
11440 /* Move all of the sections in the section list to come
11441 after "after" in the gnu segment list. */
11446 segT literal_section
= head
->seg
;
11448 /* Move the literal section after "after". */
11449 gas_assert (literal_section
);
11450 if (literal_section
!= after
)
11452 bfd_section_list_remove (stdoutput
, literal_section
);
11453 bfd_section_list_insert_after (stdoutput
, after
, literal_section
);
11461 /* Push all the literal segments to the end of the gnu list. */
11464 xtensa_reorder_segments (void)
11471 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11477 /* Now that we have the last section, push all the literal
11478 sections to the end. */
11479 xtensa_reorder_seg_list (literal_head
, last_sec
);
11481 /* Now perform the final error check. */
11482 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
11484 gas_assert (new_count
== old_count
);
11488 /* Change the emit state (seg, subseg, and frag related stuff) to the
11489 correct location. Return a emit_state which can be passed to
11490 xtensa_restore_emit_state to return to current fragment. */
11493 xtensa_switch_to_literal_fragment (emit_state
*result
)
11495 if (directive_state
[directive_absolute_literals
])
11497 segT lit4_seg
= cache_literal_section (TRUE
);
11498 xtensa_switch_section_emit_state (result
, lit4_seg
, 0);
11501 xtensa_switch_to_non_abs_literal_fragment (result
);
11503 /* Do a 4-byte align here. */
11504 frag_align (2, 0, 0);
11505 record_alignment (now_seg
, 2);
11510 xtensa_switch_to_non_abs_literal_fragment (emit_state
*result
)
11512 fragS
*pool_location
= get_literal_pool_location (now_seg
);
11514 bfd_boolean is_init_fini
= xtensa_is_init_fini (now_seg
);
11516 if (pool_location
== NULL
11517 && !use_literal_section
11520 if (!auto_litpools
)
11522 as_bad (_("literal pool location required for text-section-literals; specify with .literal_position"));
11524 xtensa_maybe_create_literal_pool_frag (TRUE
, TRUE
);
11525 pool_location
= get_literal_pool_location (now_seg
);
11528 lit_seg
= cache_literal_section (FALSE
);
11529 xtensa_switch_section_emit_state (result
, lit_seg
, 0);
11531 if (!use_literal_section
11533 && get_literal_pool_location (now_seg
) != pool_location
)
11535 /* Close whatever frag is there. */
11536 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11537 xtensa_set_frag_assembly_state (frag_now
);
11538 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
11539 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
11540 xtensa_set_frag_assembly_state (frag_now
);
11545 /* Call this function before emitting data into the literal section.
11546 This is a helper function for xtensa_switch_to_literal_fragment.
11547 This is similar to a .section new_now_seg subseg. */
11550 xtensa_switch_section_emit_state (emit_state
*state
,
11552 subsegT new_now_subseg
)
11554 state
->name
= now_seg
->name
;
11555 state
->now_seg
= now_seg
;
11556 state
->now_subseg
= now_subseg
;
11557 state
->generating_literals
= generating_literals
;
11558 generating_literals
++;
11559 subseg_set (new_now_seg
, new_now_subseg
);
11563 /* Use to restore the emitting into the normal place. */
11566 xtensa_restore_emit_state (emit_state
*state
)
11568 generating_literals
= state
->generating_literals
;
11569 subseg_set (state
->now_seg
, state
->now_subseg
);
11573 /* Predicate function used to look up a section in a particular group. */
11576 match_section_group (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, void *inf
)
11578 const char *gname
= inf
;
11579 const char *group_name
= elf_group_name (sec
);
11581 return (group_name
== gname
11582 || (group_name
!= NULL
11584 && strcmp (group_name
, gname
) == 0));
11588 /* Get the literal section to be used for the current text section.
11589 The result may be cached in the default_lit_sections structure. */
11592 cache_literal_section (bfd_boolean use_abs_literals
)
11594 const char *text_name
, *group_name
= 0;
11595 const char *base_name
, *suffix
;
11598 segT seg
, current_section
;
11599 int current_subsec
;
11600 bfd_boolean linkonce
= FALSE
;
11602 /* Save the current section/subsection. */
11603 current_section
= now_seg
;
11604 current_subsec
= now_subseg
;
11606 /* Clear the cached values if they are no longer valid. */
11607 if (now_seg
!= default_lit_sections
.current_text_seg
)
11609 default_lit_sections
.current_text_seg
= now_seg
;
11610 default_lit_sections
.lit_seg
= NULL
;
11611 default_lit_sections
.lit4_seg
= NULL
;
11614 /* Check if the literal section is already cached. */
11615 if (use_abs_literals
)
11616 pcached
= &default_lit_sections
.lit4_seg
;
11618 pcached
= &default_lit_sections
.lit_seg
;
11623 text_name
= default_lit_sections
.lit_prefix
;
11624 if (! text_name
|| ! *text_name
)
11626 text_name
= segment_name (current_section
);
11627 group_name
= elf_group_name (current_section
);
11628 linkonce
= (current_section
->flags
& SEC_LINK_ONCE
) != 0;
11631 base_name
= use_abs_literals
? ".lit4" : ".literal";
11634 name
= concat (base_name
, ".", group_name
, (char *) NULL
);
11636 else if (strncmp (text_name
, ".gnu.linkonce.", linkonce_len
) == 0)
11638 suffix
= strchr (text_name
+ linkonce_len
, '.');
11640 name
= concat (".gnu.linkonce", base_name
, suffix
? suffix
: "",
11646 /* If the section name begins or ends with ".text", then replace
11647 that portion instead of appending an additional suffix. */
11648 size_t len
= strlen (text_name
);
11650 && (strcmp (text_name
+ len
- 5, ".text") == 0
11651 || strncmp (text_name
, ".text", 5) == 0))
11654 name
= XNEWVEC (char, len
+ strlen (base_name
) + 1);
11655 if (strncmp (text_name
, ".text", 5) == 0)
11657 strcpy (name
, base_name
);
11658 strcat (name
, text_name
+ 5);
11662 strcpy (name
, text_name
);
11663 strcpy (name
+ len
, base_name
);
11667 /* Canonicalize section names to allow renaming literal sections.
11668 The group name, if any, came from the current text section and
11669 has already been canonicalized. */
11670 name
= tc_canonicalize_symbol_name (name
);
11672 seg
= bfd_get_section_by_name_if (stdoutput
, name
, match_section_group
,
11673 (void *) group_name
);
11678 seg
= subseg_force_new (name
, 0);
11680 if (! use_abs_literals
)
11682 /* Add the newly created literal segment to the list. */
11683 seg_list
*n
= XNEW (seg_list
);
11685 n
->next
= literal_head
->next
;
11686 literal_head
->next
= n
;
11689 flags
= (SEC_HAS_CONTENTS
| SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
11690 | (linkonce
? (SEC_LINK_ONCE
| SEC_LINK_DUPLICATES_DISCARD
) : 0)
11691 | (use_abs_literals
? SEC_DATA
: SEC_CODE
));
11693 elf_group_name (seg
) = group_name
;
11695 bfd_set_section_flags (seg
, flags
);
11696 bfd_set_section_alignment (seg
, 2);
11700 subseg_set (current_section
, current_subsec
);
11705 /* Property Tables Stuff. */
11707 #define XTENSA_INSN_SEC_NAME ".xt.insn"
11708 #define XTENSA_LIT_SEC_NAME ".xt.lit"
11709 #define XTENSA_PROP_SEC_NAME ".xt.prop"
11711 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
11712 typedef void (*frag_flags_fn
) (const fragS
*, frag_flags
*);
11714 static bfd_boolean
get_frag_is_literal (const fragS
*);
11715 static void xtensa_create_property_segments
11716 (frag_predicate
, frag_predicate
, const char *, xt_section_type
);
11717 static void xtensa_create_xproperty_segments
11718 (frag_flags_fn
, const char *, xt_section_type
);
11719 static bfd_boolean
exclude_section_from_property_tables (segT
);
11720 static bfd_boolean
section_has_property (segT
, frag_predicate
);
11721 static bfd_boolean
section_has_xproperty (segT
, frag_flags_fn
);
11722 static void add_xt_block_frags
11723 (segT
, xtensa_block_info
**, frag_predicate
, frag_predicate
);
11724 static bfd_boolean
xtensa_frag_flags_is_empty (const frag_flags
*);
11725 static void xtensa_frag_flags_init (frag_flags
*);
11726 static void get_frag_property_flags (const fragS
*, frag_flags
*);
11727 static flagword
frag_flags_to_number (const frag_flags
*);
11728 static void add_xt_prop_frags (segT
, xtensa_block_info
**, frag_flags_fn
);
11730 /* Set up property tables after relaxation. */
11733 xtensa_post_relax_hook (void)
11735 xtensa_move_seg_list_to_beginning (literal_head
);
11737 xtensa_find_unmarked_state_frags ();
11738 xtensa_mark_frags_for_org ();
11739 xtensa_mark_difference_of_two_symbols ();
11741 xtensa_create_property_segments (get_frag_is_literal
,
11743 XTENSA_LIT_SEC_NAME
,
11745 xtensa_create_xproperty_segments (get_frag_property_flags
,
11746 XTENSA_PROP_SEC_NAME
,
11749 if (warn_unaligned_branch_targets
)
11750 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_branch_targets
, 0);
11751 bfd_map_over_sections (stdoutput
, xtensa_find_unaligned_loops
, 0);
11755 /* This function is only meaningful after xtensa_move_literals. */
11758 get_frag_is_literal (const fragS
*fragP
)
11760 gas_assert (fragP
!= NULL
);
11761 return fragP
->tc_frag_data
.is_literal
;
11766 xtensa_create_property_segments (frag_predicate property_function
,
11767 frag_predicate end_property_function
,
11768 const char *section_name_base
,
11769 xt_section_type sec_type
)
11773 /* Walk over all of the current segments.
11774 Walk over each fragment
11775 For each non-empty fragment,
11776 Build a property record (append where possible). */
11778 for (seclist
= &stdoutput
->sections
;
11779 seclist
&& *seclist
;
11780 seclist
= &(*seclist
)->next
)
11782 segT sec
= *seclist
;
11784 if (exclude_section_from_property_tables (sec
))
11787 if (section_has_property (sec
, property_function
))
11789 segment_info_type
*xt_seg_info
;
11790 xtensa_block_info
**xt_blocks
;
11791 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11793 prop_sec
->output_section
= prop_sec
;
11794 subseg_set (prop_sec
, 0);
11795 xt_seg_info
= seg_info (prop_sec
);
11796 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11798 /* Walk over all of the frchains here and add new sections. */
11799 add_xt_block_frags (sec
, xt_blocks
, property_function
,
11800 end_property_function
);
11804 /* Now we fill them out.... */
11806 for (seclist
= &stdoutput
->sections
;
11807 seclist
&& *seclist
;
11808 seclist
= &(*seclist
)->next
)
11810 segment_info_type
*seginfo
;
11811 xtensa_block_info
*block
;
11812 segT sec
= *seclist
;
11814 seginfo
= seg_info (sec
);
11815 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11819 xtensa_block_info
*cur_block
;
11821 bfd_size_type rec_size
;
11823 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11826 rec_size
= num_recs
* 8;
11827 bfd_set_section_size (sec
, rec_size
);
11834 subseg_set (sec
, 0);
11835 frag_data
= frag_more (rec_size
);
11837 for (i
= 0; i
< num_recs
; i
++)
11841 /* Write the fixup. */
11842 gas_assert (cur_block
);
11843 fix
= fix_new (frag_now
, i
* 8, 4,
11844 section_symbol (cur_block
->sec
),
11846 FALSE
, BFD_RELOC_32
);
11847 fix
->fx_file
= "<internal>";
11850 /* Write the length. */
11851 md_number_to_chars (&frag_data
[4 + i
* 8],
11852 cur_block
->size
, 4);
11853 cur_block
= cur_block
->next
;
11855 frag_wane (frag_now
);
11857 frag_wane (frag_now
);
11865 xtensa_create_xproperty_segments (frag_flags_fn flag_fn
,
11866 const char *section_name_base
,
11867 xt_section_type sec_type
)
11871 /* Walk over all of the current segments.
11872 Walk over each fragment.
11873 For each fragment that has instructions,
11874 build an instruction record (append where possible). */
11876 for (seclist
= &stdoutput
->sections
;
11877 seclist
&& *seclist
;
11878 seclist
= &(*seclist
)->next
)
11880 segT sec
= *seclist
;
11882 if (exclude_section_from_property_tables (sec
))
11885 if (section_has_xproperty (sec
, flag_fn
))
11887 segment_info_type
*xt_seg_info
;
11888 xtensa_block_info
**xt_blocks
;
11889 segT prop_sec
= xtensa_make_property_section (sec
, section_name_base
);
11891 prop_sec
->output_section
= prop_sec
;
11892 subseg_set (prop_sec
, 0);
11893 xt_seg_info
= seg_info (prop_sec
);
11894 xt_blocks
= &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
11896 /* Walk over all of the frchains here and add new sections. */
11897 add_xt_prop_frags (sec
, xt_blocks
, flag_fn
);
11901 /* Now we fill them out.... */
11903 for (seclist
= &stdoutput
->sections
;
11904 seclist
&& *seclist
;
11905 seclist
= &(*seclist
)->next
)
11907 segment_info_type
*seginfo
;
11908 xtensa_block_info
*block
;
11909 segT sec
= *seclist
;
11911 seginfo
= seg_info (sec
);
11912 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
11916 xtensa_block_info
*cur_block
;
11918 bfd_size_type rec_size
;
11920 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
11923 rec_size
= num_recs
* (8 + 4);
11924 bfd_set_section_size (sec
, rec_size
);
11925 /* elf_section_data (sec)->this_hdr.sh_entsize = 12; */
11932 subseg_set (sec
, 0);
11933 frag_data
= frag_more (rec_size
);
11935 for (i
= 0; i
< num_recs
; i
++)
11939 /* Write the fixup. */
11940 gas_assert (cur_block
);
11941 fix
= fix_new (frag_now
, i
* 12, 4,
11942 section_symbol (cur_block
->sec
),
11944 FALSE
, BFD_RELOC_32
);
11945 fix
->fx_file
= "<internal>";
11948 /* Write the length. */
11949 md_number_to_chars (&frag_data
[4 + i
* 12],
11950 cur_block
->size
, 4);
11951 md_number_to_chars (&frag_data
[8 + i
* 12],
11952 frag_flags_to_number (&cur_block
->flags
),
11953 sizeof (flagword
));
11954 cur_block
= cur_block
->next
;
11956 frag_wane (frag_now
);
11958 frag_wane (frag_now
);
11966 exclude_section_from_property_tables (segT sec
)
11968 flagword flags
= bfd_section_flags (sec
);
11970 /* Sections that don't contribute to the memory footprint are excluded. */
11971 if ((flags
& SEC_DEBUGGING
)
11972 || !(flags
& SEC_ALLOC
)
11973 || (flags
& SEC_MERGE
))
11976 /* Linker cie and fde optimizations mess up property entries for
11977 eh_frame sections, but there is nothing inside them relevant to
11978 property tables anyway. */
11979 if (strcmp (sec
->name
, ".eh_frame") == 0)
11987 section_has_property (segT sec
, frag_predicate property_function
)
11989 segment_info_type
*seginfo
= seg_info (sec
);
11992 if (seginfo
&& seginfo
->frchainP
)
11994 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
11996 if (property_function (fragP
)
11997 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
12006 section_has_xproperty (segT sec
, frag_flags_fn property_function
)
12008 segment_info_type
*seginfo
= seg_info (sec
);
12011 if (seginfo
&& seginfo
->frchainP
)
12013 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
12015 frag_flags prop_flags
;
12016 property_function (fragP
, &prop_flags
);
12017 if (!xtensa_frag_flags_is_empty (&prop_flags
))
12025 /* Two types of block sections exist right now: literal and insns. */
12028 add_xt_block_frags (segT sec
,
12029 xtensa_block_info
**xt_block
,
12030 frag_predicate property_function
,
12031 frag_predicate end_property_function
)
12035 /* Build it if needed. */
12036 while (*xt_block
!= NULL
)
12037 xt_block
= &(*xt_block
)->next
;
12038 /* We are either at NULL at the beginning or at the end. */
12040 /* Walk through the frags. */
12041 if (seg_info (sec
)->frchainP
)
12043 for (fragP
= seg_info (sec
)->frchainP
->frch_root
;
12045 fragP
= fragP
->fr_next
)
12047 if (property_function (fragP
)
12048 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
12050 if (*xt_block
!= NULL
)
12052 if ((*xt_block
)->offset
+ (*xt_block
)->size
12053 == fragP
->fr_address
)
12054 (*xt_block
)->size
+= fragP
->fr_fix
;
12056 xt_block
= &((*xt_block
)->next
);
12058 if (*xt_block
== NULL
)
12060 xtensa_block_info
*new_block
= XNEW (xtensa_block_info
);
12061 new_block
->sec
= sec
;
12062 new_block
->offset
= fragP
->fr_address
;
12063 new_block
->size
= fragP
->fr_fix
;
12064 new_block
->next
= NULL
;
12065 xtensa_frag_flags_init (&new_block
->flags
);
12066 *xt_block
= new_block
;
12068 if (end_property_function
12069 && end_property_function (fragP
))
12071 xt_block
= &((*xt_block
)->next
);
12079 /* Break the encapsulation of add_xt_prop_frags here. */
12082 xtensa_frag_flags_is_empty (const frag_flags
*prop_flags
)
12084 if (prop_flags
->is_literal
12085 || prop_flags
->is_insn
12086 || prop_flags
->is_data
12087 || prop_flags
->is_unreachable
)
12094 xtensa_frag_flags_init (frag_flags
*prop_flags
)
12096 memset (prop_flags
, 0, sizeof (frag_flags
));
12101 get_frag_property_flags (const fragS
*fragP
, frag_flags
*prop_flags
)
12103 xtensa_frag_flags_init (prop_flags
);
12104 if (fragP
->tc_frag_data
.is_literal
)
12105 prop_flags
->is_literal
= TRUE
;
12106 if (fragP
->tc_frag_data
.is_specific_opcode
12107 || fragP
->tc_frag_data
.is_no_transform
)
12109 prop_flags
->is_no_transform
= TRUE
;
12110 if (xtensa_frag_flags_is_empty (prop_flags
))
12111 prop_flags
->is_data
= TRUE
;
12113 if (fragP
->tc_frag_data
.is_unreachable
)
12114 prop_flags
->is_unreachable
= TRUE
;
12115 else if (fragP
->tc_frag_data
.is_insn
)
12117 prop_flags
->is_insn
= TRUE
;
12118 if (fragP
->tc_frag_data
.is_loop_target
)
12119 prop_flags
->insn
.is_loop_target
= TRUE
;
12120 if (fragP
->tc_frag_data
.is_branch_target
)
12121 prop_flags
->insn
.is_branch_target
= TRUE
;
12122 if (fragP
->tc_frag_data
.is_no_density
)
12123 prop_flags
->insn
.is_no_density
= TRUE
;
12124 if (fragP
->tc_frag_data
.use_absolute_literals
)
12125 prop_flags
->insn
.is_abslit
= TRUE
;
12127 if (fragP
->tc_frag_data
.is_align
)
12129 prop_flags
->is_align
= TRUE
;
12130 prop_flags
->alignment
= fragP
->tc_frag_data
.alignment
;
12131 if (xtensa_frag_flags_is_empty (prop_flags
))
12132 prop_flags
->is_data
= TRUE
;
12138 frag_flags_to_number (const frag_flags
*prop_flags
)
12141 if (prop_flags
->is_literal
)
12142 num
|= XTENSA_PROP_LITERAL
;
12143 if (prop_flags
->is_insn
)
12144 num
|= XTENSA_PROP_INSN
;
12145 if (prop_flags
->is_data
)
12146 num
|= XTENSA_PROP_DATA
;
12147 if (prop_flags
->is_unreachable
)
12148 num
|= XTENSA_PROP_UNREACHABLE
;
12149 if (prop_flags
->insn
.is_loop_target
)
12150 num
|= XTENSA_PROP_INSN_LOOP_TARGET
;
12151 if (prop_flags
->insn
.is_branch_target
)
12153 num
|= XTENSA_PROP_INSN_BRANCH_TARGET
;
12154 num
= SET_XTENSA_PROP_BT_ALIGN (num
, prop_flags
->insn
.bt_align_priority
);
12157 if (prop_flags
->insn
.is_no_density
)
12158 num
|= XTENSA_PROP_INSN_NO_DENSITY
;
12159 if (prop_flags
->is_no_transform
)
12160 num
|= XTENSA_PROP_NO_TRANSFORM
;
12161 if (prop_flags
->insn
.is_no_reorder
)
12162 num
|= XTENSA_PROP_INSN_NO_REORDER
;
12163 if (prop_flags
->insn
.is_abslit
)
12164 num
|= XTENSA_PROP_INSN_ABSLIT
;
12166 if (prop_flags
->is_align
)
12168 num
|= XTENSA_PROP_ALIGN
;
12169 num
= SET_XTENSA_PROP_ALIGNMENT (num
, prop_flags
->alignment
);
12177 xtensa_frag_flags_combinable (const frag_flags
*prop_flags_1
,
12178 const frag_flags
*prop_flags_2
)
12180 /* Cannot combine with an end marker. */
12182 if (prop_flags_1
->is_literal
!= prop_flags_2
->is_literal
)
12184 if (prop_flags_1
->is_insn
!= prop_flags_2
->is_insn
)
12186 if (prop_flags_1
->is_data
!= prop_flags_2
->is_data
)
12189 if (prop_flags_1
->is_insn
)
12191 /* Properties of the beginning of the frag. */
12192 if (prop_flags_2
->insn
.is_loop_target
)
12194 if (prop_flags_2
->insn
.is_branch_target
)
12196 if (prop_flags_1
->insn
.is_no_density
!=
12197 prop_flags_2
->insn
.is_no_density
)
12199 if (prop_flags_1
->is_no_transform
!=
12200 prop_flags_2
->is_no_transform
)
12202 if (prop_flags_1
->insn
.is_no_reorder
!=
12203 prop_flags_2
->insn
.is_no_reorder
)
12205 if (prop_flags_1
->insn
.is_abslit
!=
12206 prop_flags_2
->insn
.is_abslit
)
12210 if (prop_flags_1
->is_align
)
12218 xt_block_aligned_size (const xtensa_block_info
*xt_block
)
12221 unsigned align_bits
;
12223 if (!xt_block
->flags
.is_align
)
12224 return xt_block
->size
;
12226 end_addr
= xt_block
->offset
+ xt_block
->size
;
12227 align_bits
= xt_block
->flags
.alignment
;
12228 end_addr
= ((end_addr
+ ((1 << align_bits
) -1)) >> align_bits
) << align_bits
;
12229 return end_addr
- xt_block
->offset
;
12234 xtensa_xt_block_combine (xtensa_block_info
*xt_block
,
12235 const xtensa_block_info
*xt_block_2
)
12237 if (xt_block
->sec
!= xt_block_2
->sec
)
12239 if (xt_block
->offset
+ xt_block_aligned_size (xt_block
)
12240 != xt_block_2
->offset
)
12243 if (xt_block_2
->size
== 0
12244 && (!xt_block_2
->flags
.is_unreachable
12245 || xt_block
->flags
.is_unreachable
))
12247 if (xt_block_2
->flags
.is_align
12248 && xt_block
->flags
.is_align
)
12250 /* Nothing needed. */
12251 if (xt_block
->flags
.alignment
>= xt_block_2
->flags
.alignment
)
12256 if (xt_block_2
->flags
.is_align
)
12258 /* Push alignment to previous entry. */
12259 xt_block
->flags
.is_align
= xt_block_2
->flags
.is_align
;
12260 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12265 if (!xtensa_frag_flags_combinable (&xt_block
->flags
,
12266 &xt_block_2
->flags
))
12269 xt_block
->size
+= xt_block_2
->size
;
12271 if (xt_block_2
->flags
.is_align
)
12273 xt_block
->flags
.is_align
= TRUE
;
12274 xt_block
->flags
.alignment
= xt_block_2
->flags
.alignment
;
12282 add_xt_prop_frags (segT sec
,
12283 xtensa_block_info
**xt_block
,
12284 frag_flags_fn property_function
)
12288 /* Build it if needed. */
12289 while (*xt_block
!= NULL
)
12291 xt_block
= &(*xt_block
)->next
;
12293 /* We are either at NULL at the beginning or at the end. */
12295 /* Walk through the frags. */
12296 if (seg_info (sec
)->frchainP
)
12298 for (fragP
= seg_info (sec
)->frchainP
->frch_root
; fragP
;
12299 fragP
= fragP
->fr_next
)
12301 xtensa_block_info tmp_block
;
12302 tmp_block
.sec
= sec
;
12303 tmp_block
.offset
= fragP
->fr_address
;
12304 tmp_block
.size
= fragP
->fr_fix
;
12305 tmp_block
.next
= NULL
;
12306 property_function (fragP
, &tmp_block
.flags
);
12308 if (!xtensa_frag_flags_is_empty (&tmp_block
.flags
))
12309 /* && fragP->fr_fix != 0) */
12311 if ((*xt_block
) == NULL
12312 || !xtensa_xt_block_combine (*xt_block
, &tmp_block
))
12314 xtensa_block_info
*new_block
;
12315 if ((*xt_block
) != NULL
)
12316 xt_block
= &(*xt_block
)->next
;
12317 new_block
= XNEW (xtensa_block_info
);
12318 *new_block
= tmp_block
;
12319 *xt_block
= new_block
;
12327 /* op_placement_info_table */
12329 /* op_placement_info makes it easier to determine which
12330 ops can go in which slots. */
12333 init_op_placement_info_table (void)
12335 xtensa_isa isa
= xtensa_default_isa
;
12336 xtensa_insnbuf ibuf
= xtensa_insnbuf_alloc (isa
);
12337 xtensa_opcode opcode
;
12340 int num_opcodes
= xtensa_isa_num_opcodes (isa
);
12342 op_placement_table
= XNEWVEC (op_placement_info
, num_opcodes
);
12343 gas_assert (xtensa_isa_num_formats (isa
) < MAX_FORMATS
);
12345 for (opcode
= 0; opcode
< num_opcodes
; opcode
++)
12347 op_placement_info
*opi
= &op_placement_table
[opcode
];
12348 /* FIXME: Make tinsn allocation dynamic. */
12349 if (xtensa_opcode_num_operands (isa
, opcode
) > MAX_INSN_ARGS
)
12350 as_fatal (_("too many operands in instruction"));
12351 opi
->narrowest
= XTENSA_UNDEFINED
;
12352 opi
->narrowest_size
= 0x7F;
12353 opi
->narrowest_slot
= 0;
12355 opi
->num_formats
= 0;
12357 for (fmt
= 0; fmt
< xtensa_isa_num_formats (isa
); fmt
++)
12359 opi
->slots
[fmt
] = 0;
12360 for (slot
= 0; slot
< xtensa_format_num_slots (isa
, fmt
); slot
++)
12362 if (xtensa_opcode_encode (isa
, fmt
, slot
, ibuf
, opcode
) == 0)
12364 int fmt_length
= xtensa_format_length (isa
, fmt
);
12366 set_bit (fmt
, opi
->formats
);
12367 set_bit (slot
, opi
->slots
[fmt
]);
12368 if (fmt_length
< opi
->narrowest_size
12369 || (fmt_length
== opi
->narrowest_size
12370 && (xtensa_format_num_slots (isa
, fmt
)
12371 < xtensa_format_num_slots (isa
,
12374 opi
->narrowest
= fmt
;
12375 opi
->narrowest_size
= fmt_length
;
12376 opi
->narrowest_slot
= slot
;
12381 opi
->num_formats
++;
12384 xtensa_insnbuf_free (isa
, ibuf
);
12389 opcode_fits_format_slot (xtensa_opcode opcode
, xtensa_format fmt
, int slot
)
12391 return bit_is_set (slot
, op_placement_table
[opcode
].slots
[fmt
]);
12395 /* If the opcode is available in a single slot format, return its size. */
12398 xg_get_single_size (xtensa_opcode opcode
)
12400 return op_placement_table
[opcode
].narrowest_size
;
12404 static xtensa_format
12405 xg_get_single_format (xtensa_opcode opcode
)
12407 return op_placement_table
[opcode
].narrowest
;
12412 xg_get_single_slot (xtensa_opcode opcode
)
12414 return op_placement_table
[opcode
].narrowest_slot
;
12418 /* Instruction Stack Functions (from "xtensa-istack.h"). */
12421 istack_init (IStack
*stack
)
12428 istack_empty (IStack
*stack
)
12430 return (stack
->ninsn
== 0);
12435 istack_full (IStack
*stack
)
12437 return (stack
->ninsn
== MAX_ISTACK
);
12441 /* Return a pointer to the top IStack entry.
12442 It is an error to call this if istack_empty () is TRUE. */
12445 istack_top (IStack
*stack
)
12447 int rec
= stack
->ninsn
- 1;
12448 gas_assert (!istack_empty (stack
));
12449 return &stack
->insn
[rec
];
12453 /* Add a new TInsn to an IStack.
12454 It is an error to call this if istack_full () is TRUE. */
12457 istack_push (IStack
*stack
, TInsn
*insn
)
12459 int rec
= stack
->ninsn
;
12460 gas_assert (!istack_full (stack
));
12461 stack
->insn
[rec
] = *insn
;
12466 /* Clear space for the next TInsn on the IStack and return a pointer
12467 to it. It is an error to call this if istack_full () is TRUE. */
12470 istack_push_space (IStack
*stack
)
12472 int rec
= stack
->ninsn
;
12474 gas_assert (!istack_full (stack
));
12475 insn
= &stack
->insn
[rec
];
12482 /* Remove the last pushed instruction. It is an error to call this if
12483 istack_empty () returns TRUE. */
12486 istack_pop (IStack
*stack
)
12488 int rec
= stack
->ninsn
- 1;
12489 gas_assert (!istack_empty (stack
));
12491 tinsn_init (&stack
->insn
[rec
]);
12495 /* TInsn functions. */
12498 tinsn_init (TInsn
*dst
)
12500 memset (dst
, 0, sizeof (TInsn
));
12504 /* Return TRUE if ANY of the operands in the insn are symbolic. */
12507 tinsn_has_symbolic_operands (const TInsn
*insn
)
12510 int n
= insn
->ntok
;
12512 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12514 for (i
= 0; i
< n
; ++i
)
12516 switch (insn
->tok
[i
].X_op
)
12530 tinsn_has_invalid_symbolic_operands (const TInsn
*insn
)
12532 xtensa_isa isa
= xtensa_default_isa
;
12534 int n
= insn
->ntok
;
12536 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12538 for (i
= 0; i
< n
; ++i
)
12540 switch (insn
->tok
[i
].X_op
)
12548 /* Errors for these types are caught later. */
12553 /* Symbolic immediates are only allowed on the last immediate
12554 operand. At this time, CONST16 is the only opcode where we
12555 support non-PC-relative relocations. */
12556 if (i
!= get_relaxable_immed (insn
->opcode
)
12557 || (xtensa_operand_is_PCrelative (isa
, insn
->opcode
, i
) != 1
12558 && insn
->opcode
!= xtensa_const16_opcode
))
12560 as_bad (_("invalid symbolic operand"));
12569 /* For assembly code with complex expressions (e.g. subtraction),
12570 we have to build them in the literal pool so that
12571 their results are calculated correctly after relaxation.
12572 The relaxation only handles expressions that
12573 boil down to SYMBOL + OFFSET. */
12576 tinsn_has_complex_operands (const TInsn
*insn
)
12579 int n
= insn
->ntok
;
12580 gas_assert (insn
->insn_type
== ITYPE_INSN
);
12581 for (i
= 0; i
< n
; ++i
)
12583 switch (insn
->tok
[i
].X_op
)
12599 /* Encode a TInsn opcode and its constant operands into slotbuf.
12600 Return TRUE if there is a symbol in the immediate field. This
12601 function assumes that:
12602 1) The number of operands are correct.
12603 2) The insn_type is ITYPE_INSN.
12604 3) The opcode can be encoded in the specified format and slot.
12605 4) Operands are either O_constant or O_symbol, and all constants fit. */
12608 tinsn_to_slotbuf (xtensa_format fmt
,
12611 xtensa_insnbuf slotbuf
)
12613 xtensa_isa isa
= xtensa_default_isa
;
12614 xtensa_opcode opcode
= tinsn
->opcode
;
12615 bfd_boolean has_fixup
= FALSE
;
12616 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
12619 gas_assert (tinsn
->insn_type
== ITYPE_INSN
);
12620 if (noperands
!= tinsn
->ntok
)
12621 as_fatal (_("operand number mismatch"));
12623 if (xtensa_opcode_encode (isa
, fmt
, slot
, slotbuf
, opcode
))
12625 as_bad (_("cannot encode opcode \"%s\" in the given format \"%s\""),
12626 xtensa_opcode_name (isa
, opcode
), xtensa_format_name (isa
, fmt
));
12630 for (i
= 0; i
< noperands
; i
++)
12632 expressionS
*exp
= &tinsn
->tok
[i
];
12635 const char *file_name
;
12641 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12643 /* The register number has already been checked in
12644 expression_maybe_register, so we don't need to check here. */
12645 opnd_value
= exp
->X_add_number
;
12646 (void) xtensa_operand_encode (isa
, opcode
, i
, &opnd_value
);
12647 rc
= xtensa_operand_set_field (isa
, opcode
, i
, fmt
, slot
, slotbuf
,
12650 as_warn (_("xtensa-isa failure: %s"), xtensa_isa_error_msg (isa
));
12654 if (xtensa_operand_is_visible (isa
, opcode
, i
) == 0)
12656 file_name
= as_where (&line
);
12657 /* It is a constant and we called this function
12658 then we have to try to fit it. */
12659 xtensa_insnbuf_set_operand (slotbuf
, fmt
, slot
, opcode
, i
,
12660 exp
->X_add_number
, file_name
, line
);
12673 /* Encode a single TInsn into an insnbuf. If the opcode can only be encoded
12674 into a multi-slot instruction, fill the other slots with NOPs.
12675 Return TRUE if there is a symbol in the immediate field. See also the
12676 assumptions listed for tinsn_to_slotbuf. */
12679 tinsn_to_insnbuf (TInsn
*tinsn
, xtensa_insnbuf insnbuf
)
12681 static xtensa_insnbuf slotbuf
= 0;
12682 static vliw_insn vinsn
;
12683 xtensa_isa isa
= xtensa_default_isa
;
12684 bfd_boolean has_fixup
= FALSE
;
12689 slotbuf
= xtensa_insnbuf_alloc (isa
);
12690 xg_init_vinsn (&vinsn
);
12693 xg_clear_vinsn (&vinsn
);
12695 bundle_tinsn (tinsn
, &vinsn
);
12697 xtensa_format_encode (isa
, vinsn
.format
, insnbuf
);
12699 for (i
= 0; i
< vinsn
.num_slots
; i
++)
12701 /* Only one slot may have a fix-up because the rest contains NOPs. */
12703 tinsn_to_slotbuf (vinsn
.format
, i
, &vinsn
.slots
[i
], vinsn
.slotbuf
[i
]);
12704 xtensa_format_set_slot (isa
, vinsn
.format
, i
, insnbuf
, vinsn
.slotbuf
[i
]);
12711 /* Check the instruction arguments. Return TRUE on failure. */
12714 tinsn_check_arguments (const TInsn
*insn
)
12716 xtensa_isa isa
= xtensa_default_isa
;
12717 xtensa_opcode opcode
= insn
->opcode
;
12718 xtensa_regfile t1_regfile
, t2_regfile
;
12719 int t1_reg
, t2_reg
;
12720 int t1_base_reg
, t1_last_reg
;
12721 int t2_base_reg
, t2_last_reg
;
12722 char t1_inout
, t2_inout
;
12725 if (opcode
== XTENSA_UNDEFINED
)
12727 as_bad (_("invalid opcode"));
12731 if (xtensa_opcode_num_operands (isa
, opcode
) > insn
->ntok
)
12733 as_bad (_("too few operands"));
12737 if (xtensa_opcode_num_operands (isa
, opcode
) < insn
->ntok
)
12739 as_bad (_("too many operands"));
12743 /* Check registers. */
12744 for (j
= 0; j
< insn
->ntok
; j
++)
12746 if (xtensa_operand_is_register (isa
, insn
->opcode
, j
) != 1)
12749 t2_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, j
);
12750 t2_base_reg
= insn
->tok
[j
].X_add_number
;
12752 = t2_base_reg
+ xtensa_operand_num_regs (isa
, insn
->opcode
, j
);
12754 for (i
= 0; i
< insn
->ntok
; i
++)
12759 if (xtensa_operand_is_register (isa
, insn
->opcode
, i
) != 1)
12762 t1_regfile
= xtensa_operand_regfile (isa
, insn
->opcode
, i
);
12764 if (t1_regfile
!= t2_regfile
)
12767 t1_inout
= xtensa_operand_inout (isa
, insn
->opcode
, i
);
12768 t2_inout
= xtensa_operand_inout (isa
, insn
->opcode
, j
);
12770 t1_base_reg
= insn
->tok
[i
].X_add_number
;
12771 t1_last_reg
= (t1_base_reg
12772 + xtensa_operand_num_regs (isa
, insn
->opcode
, i
));
12774 for (t1_reg
= t1_base_reg
; t1_reg
< t1_last_reg
; t1_reg
++)
12776 for (t2_reg
= t2_base_reg
; t2_reg
< t2_last_reg
; t2_reg
++)
12778 if (t1_reg
!= t2_reg
)
12781 if (t1_inout
!= 'i' && t2_inout
!= 'i')
12783 as_bad (_("multiple writes to the same register"));
12794 /* Load an instruction from its encoded form. */
12797 tinsn_from_chars (TInsn
*tinsn
, char *f
, int slot
)
12801 xg_init_vinsn (&vinsn
);
12802 vinsn_from_chars (&vinsn
, f
);
12804 *tinsn
= vinsn
.slots
[slot
];
12805 xg_free_vinsn (&vinsn
);
12810 tinsn_from_insnbuf (TInsn
*tinsn
,
12811 xtensa_insnbuf slotbuf
,
12816 xtensa_isa isa
= xtensa_default_isa
;
12818 /* Find the immed. */
12819 tinsn_init (tinsn
);
12820 tinsn
->insn_type
= ITYPE_INSN
;
12821 tinsn
->is_specific_opcode
= FALSE
; /* must not be specific */
12822 tinsn
->opcode
= xtensa_opcode_decode (isa
, fmt
, slot
, slotbuf
);
12823 tinsn
->ntok
= xtensa_opcode_num_operands (isa
, tinsn
->opcode
);
12824 for (i
= 0; i
< tinsn
->ntok
; i
++)
12826 set_expr_const (&tinsn
->tok
[i
],
12827 xtensa_insnbuf_get_operand (slotbuf
, fmt
, slot
,
12828 tinsn
->opcode
, i
));
12833 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
12836 tinsn_immed_from_frag (TInsn
*tinsn
, fragS
*fragP
, int slot
)
12838 xtensa_opcode opcode
= tinsn
->opcode
;
12841 if (fragP
->tc_frag_data
.slot_symbols
[slot
])
12843 opnum
= get_relaxable_immed (opcode
);
12844 gas_assert (opnum
>= 0);
12845 set_expr_symbol_offset (&tinsn
->tok
[opnum
],
12846 fragP
->tc_frag_data
.slot_symbols
[slot
],
12847 fragP
->tc_frag_data
.slot_offsets
[slot
]);
12849 tinsn
->extra_arg
= fragP
->tc_frag_data
.free_reg
[slot
];
12854 get_num_stack_text_bytes (IStack
*istack
)
12857 int text_bytes
= 0;
12859 for (i
= 0; i
< istack
->ninsn
; i
++)
12861 TInsn
*tinsn
= &istack
->insn
[i
];
12862 if (tinsn
->insn_type
== ITYPE_INSN
)
12863 text_bytes
+= xg_get_single_size (tinsn
->opcode
);
12870 get_num_stack_literal_bytes (IStack
*istack
)
12875 for (i
= 0; i
< istack
->ninsn
; i
++)
12877 TInsn
*tinsn
= &istack
->insn
[i
];
12878 if (tinsn
->insn_type
== ITYPE_LITERAL
&& tinsn
->ntok
== 1)
12885 /* vliw_insn functions. */
12888 xg_init_vinsn (vliw_insn
*v
)
12891 xtensa_isa isa
= xtensa_default_isa
;
12893 xg_clear_vinsn (v
);
12895 v
->insnbuf
= xtensa_insnbuf_alloc (isa
);
12896 if (v
->insnbuf
== NULL
)
12897 as_fatal (_("out of memory"));
12899 for (i
= 0; i
< config_max_slots
; i
++)
12901 v
->slotbuf
[i
] = xtensa_insnbuf_alloc (isa
);
12902 if (v
->slotbuf
[i
] == NULL
)
12903 as_fatal (_("out of memory"));
12909 xg_clear_vinsn (vliw_insn
*v
)
12913 memset (v
, 0, offsetof (vliw_insn
, slots
)
12914 + sizeof(TInsn
) * config_max_slots
);
12916 v
->format
= XTENSA_UNDEFINED
;
12918 v
->inside_bundle
= FALSE
;
12920 if (xt_saved_debug_type
!= DEBUG_NONE
)
12921 debug_type
= xt_saved_debug_type
;
12923 for (i
= 0; i
< config_max_slots
; i
++)
12924 v
->slots
[i
].opcode
= XTENSA_UNDEFINED
;
12929 xg_copy_vinsn (vliw_insn
*dst
, vliw_insn
*src
)
12932 offsetof(vliw_insn
, slots
) + src
->num_slots
* sizeof(TInsn
));
12933 dst
->insnbuf
= src
->insnbuf
;
12934 memcpy (dst
->slotbuf
, src
->slotbuf
, src
->num_slots
* sizeof(xtensa_insnbuf
));
12939 vinsn_has_specific_opcodes (vliw_insn
*v
)
12943 for (i
= 0; i
< v
->num_slots
; i
++)
12945 if (v
->slots
[i
].is_specific_opcode
)
12953 xg_free_vinsn (vliw_insn
*v
)
12956 xtensa_insnbuf_free (xtensa_default_isa
, v
->insnbuf
);
12957 for (i
= 0; i
< config_max_slots
; i
++)
12958 xtensa_insnbuf_free (xtensa_default_isa
, v
->slotbuf
[i
]);
12962 /* Encode a vliw_insn into an insnbuf. Return TRUE if there are any symbolic
12963 operands. See also the assumptions listed for tinsn_to_slotbuf. */
12966 vinsn_to_insnbuf (vliw_insn
*vinsn
,
12969 bfd_boolean record_fixup
)
12971 xtensa_isa isa
= xtensa_default_isa
;
12972 xtensa_format fmt
= vinsn
->format
;
12973 xtensa_insnbuf insnbuf
= vinsn
->insnbuf
;
12975 bfd_boolean has_fixup
= FALSE
;
12977 xtensa_format_encode (isa
, fmt
, insnbuf
);
12979 for (slot
= 0; slot
< vinsn
->num_slots
; slot
++)
12981 TInsn
*tinsn
= &vinsn
->slots
[slot
];
12982 expressionS
*extra_arg
= &tinsn
->extra_arg
;
12983 bfd_boolean tinsn_has_fixup
=
12984 tinsn_to_slotbuf (vinsn
->format
, slot
, tinsn
,
12985 vinsn
->slotbuf
[slot
]);
12987 xtensa_format_set_slot (isa
, fmt
, slot
,
12988 insnbuf
, vinsn
->slotbuf
[slot
]);
12989 if (extra_arg
->X_op
!= O_illegal
&& extra_arg
->X_op
!= O_register
)
12991 if (vinsn
->num_slots
!= 1)
12992 as_bad (_("TLS relocation not allowed in FLIX bundle"));
12993 else if (record_fixup
)
12994 /* Instructions that generate TLS relocations should always be
12995 relaxed in the front-end. If "record_fixup" is set, then this
12996 function is being called during back-end relaxation, so flag
12997 the unexpected behavior as an error. */
12998 as_bad (_("unexpected TLS relocation"));
13000 fix_new (fragP
, frag_offset
- fragP
->fr_literal
,
13001 xtensa_format_length (isa
, fmt
),
13002 extra_arg
->X_add_symbol
, extra_arg
->X_add_number
,
13003 FALSE
, map_operator_to_reloc (extra_arg
->X_op
, FALSE
));
13005 if (tinsn_has_fixup
)
13008 xtensa_opcode opcode
= tinsn
->opcode
;
13009 int noperands
= xtensa_opcode_num_operands (isa
, opcode
);
13012 for (i
= 0; i
< noperands
; i
++)
13014 expressionS
* exp
= &tinsn
->tok
[i
];
13020 if (get_relaxable_immed (opcode
) == i
)
13022 /* Add a fix record for the instruction, except if this
13023 function is being called prior to relaxation, i.e.,
13024 if record_fixup is false, and the instruction might
13025 be relaxed later. */
13027 || tinsn
->is_specific_opcode
13028 || !xg_is_relaxable_insn (tinsn
, 0))
13030 xg_add_opcode_fix (tinsn
, i
, fmt
, slot
, exp
, fragP
,
13031 frag_offset
- fragP
->fr_literal
);
13035 if (exp
->X_op
!= O_symbol
)
13036 as_bad (_("invalid operand"));
13037 tinsn
->symbol
= exp
->X_add_symbol
;
13038 tinsn
->offset
= exp
->X_add_number
;
13042 as_bad (_("symbolic operand not allowed"));
13050 as_bad (_("expression too complex"));
13062 vinsn_from_chars (vliw_insn
*vinsn
, char *f
)
13064 static xtensa_insnbuf insnbuf
= NULL
;
13065 static xtensa_insnbuf slotbuf
= NULL
;
13068 xtensa_isa isa
= xtensa_default_isa
;
13072 insnbuf
= xtensa_insnbuf_alloc (isa
);
13073 slotbuf
= xtensa_insnbuf_alloc (isa
);
13076 xtensa_insnbuf_from_chars (isa
, insnbuf
, (unsigned char *) f
, 0);
13077 fmt
= xtensa_format_decode (isa
, insnbuf
);
13078 if (fmt
== XTENSA_UNDEFINED
)
13079 as_fatal (_("cannot decode instruction format"));
13080 vinsn
->format
= fmt
;
13081 vinsn
->num_slots
= xtensa_format_num_slots (isa
, fmt
);
13083 for (i
= 0; i
< vinsn
->num_slots
; i
++)
13085 TInsn
*tinsn
= &vinsn
->slots
[i
];
13086 xtensa_format_get_slot (isa
, fmt
, i
, insnbuf
, slotbuf
);
13087 tinsn_from_insnbuf (tinsn
, slotbuf
, fmt
, i
);
13092 /* Expression utilities. */
13094 /* Return TRUE if the expression is an integer constant. */
13097 expr_is_const (const expressionS
*s
)
13099 return (s
->X_op
== O_constant
);
13103 /* Get the expression constant.
13104 Calling this is illegal if expr_is_const () returns TRUE. */
13107 get_expr_const (const expressionS
*s
)
13109 gas_assert (expr_is_const (s
));
13110 return s
->X_add_number
;
13114 /* Set the expression to a constant value. */
13117 set_expr_const (expressionS
*s
, offsetT val
)
13119 s
->X_op
= O_constant
;
13120 s
->X_add_number
= val
;
13121 s
->X_add_symbol
= NULL
;
13122 s
->X_op_symbol
= NULL
;
13127 expr_is_register (const expressionS
*s
)
13129 return (s
->X_op
== O_register
);
13133 /* Get the expression constant.
13134 Calling this is illegal if expr_is_const () returns TRUE. */
13137 get_expr_register (const expressionS
*s
)
13139 gas_assert (expr_is_register (s
));
13140 return s
->X_add_number
;
13144 /* Set the expression to a symbol + constant offset. */
13147 set_expr_symbol_offset (expressionS
*s
, symbolS
*sym
, offsetT offset
)
13149 s
->X_op
= O_symbol
;
13150 s
->X_add_symbol
= sym
;
13151 s
->X_op_symbol
= NULL
; /* unused */
13152 s
->X_add_number
= offset
;
13156 /* Return TRUE if the two expressions are equal. */
13159 expr_is_equal (expressionS
*s1
, expressionS
*s2
)
13161 if (s1
->X_op
!= s2
->X_op
)
13163 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
13165 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
13167 if (s1
->X_add_number
!= s2
->X_add_number
)
13174 copy_expr (expressionS
*dst
, const expressionS
*src
)
13176 memcpy (dst
, src
, sizeof (expressionS
));
13180 /* Support for the "--rename-section" option. */
13182 struct rename_section_struct
13184 const char *old_name
;
13186 struct rename_section_struct
*next
;
13189 static struct rename_section_struct
*section_rename
;
13192 /* Parse the string "oldname=new_name(:oldname2=new_name2)*" and add
13193 entries to the section_rename list. Note: Specifying multiple
13194 renamings separated by colons is not documented and is retained only
13195 for backward compatibility. */
13198 build_section_rename (const char *arg
)
13200 struct rename_section_struct
*r
;
13201 char *this_arg
= NULL
;
13202 char *next_arg
= NULL
;
13204 for (this_arg
= xstrdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
13206 char *old_name
, *new_name
;
13210 next_arg
= strchr (this_arg
, ':');
13218 old_name
= this_arg
;
13219 new_name
= strchr (this_arg
, '=');
13221 if (*old_name
== '\0')
13223 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
13226 if (!new_name
|| new_name
[1] == '\0')
13228 as_warn (_("ignoring invalid '-rename-section' specification: '%s'"),
13235 /* Check for invalid section renaming. */
13236 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13238 if (strcmp (r
->old_name
, old_name
) == 0)
13239 as_bad (_("section %s renamed multiple times"), old_name
);
13240 if (strcmp (r
->new_name
, new_name
) == 0)
13241 as_bad (_("multiple sections remapped to output section %s"),
13246 r
= XNEW (struct rename_section_struct
);
13247 r
->old_name
= xstrdup (old_name
);
13248 r
->new_name
= xstrdup (new_name
);
13249 r
->next
= section_rename
;
13250 section_rename
= r
;
13256 xtensa_section_rename (const char *name
)
13258 struct rename_section_struct
*r
= section_rename
;
13260 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
13262 if (strcmp (r
->old_name
, name
) == 0)
13263 return r
->new_name
;
13266 return (char *) name
;