1 /* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright 2003 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
19 MA 02111-1307, USA. */
24 #include "safe-ctype.h"
25 #include "tc-xtensa.h"
28 #include "xtensa-relax.h"
29 #include "xtensa-istack.h"
30 #include "struc-symbol.h"
31 #include "xtensa-config.h"
34 #define uint32 unsigned int
37 #define int32 signed int
42 There are 3 forms for instructions,
43 1) the MEMORY format -- this is the encoding 2 or 3 byte instruction
44 2) the TInsn -- handles instructions/labels and literals;
45 all operands are assumed to be expressions
46 3) the IStack -- a stack of TInsn. this allows us to
47 reason about the generated expansion instructions
49 Naming conventions (used somewhat inconsistently):
50 The xtensa_ functions are exported
51 The xg_ functions are internal
53 We also have a couple of different extensibility mechanisms.
54 1) The idiom replacement:
55 This is used when a line is first parsed to
56 replace an instruction pattern with another instruction
57 It is currently limited to replacements of instructions
58 with constant operands.
59 2) The xtensa-relax.c mechanism that has stronger instruction
60 replacement patterns. When an instruction's immediate field
61 does not fit the next instruction sequence is attempted.
62 In addition, "narrow" opcodes are supported this way. */
65 /* Define characters with special meanings to GAS. */
66 const char comment_chars
[] = "#";
67 const char line_comment_chars
[] = "#";
68 const char line_separator_chars
[] = ";";
69 const char EXP_CHARS
[] = "eE";
70 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
73 /* Flag to indicate whether the hardware supports the density option.
74 If not, enabling density instructions (via directives or --density flag)
78 bfd_boolean density_supported
= XCHAL_HAVE_DENSITY
;
80 bfd_boolean density_supported
= TRUE
;
83 #define XTENSA_FETCH_WIDTH 4
85 /* Flags for properties of the last instruction in a segment. */
86 #define FLAG_IS_A0_WRITER 0x1
87 #define FLAG_IS_BAD_LOOPEND 0x2
90 /* We define a special segment names ".literal" to place literals
91 into. The .fini and .init sections are special because they
92 contain code that is moved together by the linker. We give them
93 their own special .fini.literal and .init.literal sections. */
95 #define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
96 #define FINI_SECTION_NAME xtensa_section_rename (".fini")
97 #define INIT_SECTION_NAME xtensa_section_rename (".init")
98 #define FINI_LITERAL_SECTION_NAME xtensa_section_rename (".fini.literal")
99 #define INIT_LITERAL_SECTION_NAME xtensa_section_rename (".init.literal")
102 /* This type is used for the directive_stack to keep track of the
103 state of the literal collection pools. */
105 typedef struct lit_state_struct
107 const char *lit_seg_name
;
108 const char *init_lit_seg_name
;
109 const char *fini_lit_seg_name
;
115 static lit_state default_lit_sections
;
118 /* We keep lists of literal segments. The seg_list type is the node
119 for such a list. The *_literal_head locals are the heads of the
120 various lists. All of these lists have a dummy node at the start. */
122 typedef struct seg_list_struct
124 struct seg_list_struct
*next
;
128 static seg_list literal_head_h
;
129 static seg_list
*literal_head
= &literal_head_h
;
130 static seg_list init_literal_head_h
;
131 static seg_list
*init_literal_head
= &init_literal_head_h
;
132 static seg_list fini_literal_head_h
;
133 static seg_list
*fini_literal_head
= &fini_literal_head_h
;
136 /* Lists of symbols. We keep a list of symbols that label the current
137 instruction, so that we can adjust the symbols when inserting alignment
138 for various instructions. We also keep a list of all the symbols on
139 literals, so that we can fix up those symbols when the literals are
140 later moved into the text sections. */
142 typedef struct sym_list_struct
144 struct sym_list_struct
*next
;
148 static sym_list
*insn_labels
= NULL
;
149 static sym_list
*free_insn_labels
= NULL
;
150 static sym_list
*saved_insn_labels
= NULL
;
152 static sym_list
*literal_syms
;
155 /* Global flag to indicate when we are emitting literals. */
156 int generating_literals
= 0;
159 /* Structure for saving the current state before emitting literals. */
160 typedef struct emit_state_struct
165 int generating_literals
;
180 directive_literal_prefix
186 bfd_boolean can_be_negated
;
189 const directive_infoS directive_info
[] =
198 {"literal_prefix", FALSE
}
201 bfd_boolean directive_state
[] =
205 #if STATIC_LIBISA && !XCHAL_HAVE_DENSITY
212 FALSE
, /* freeregs */
213 FALSE
, /* longcalls */
214 FALSE
/* literal_prefix */
218 enum xtensa_relax_statesE
220 RELAX_ALIGN_NEXT_OPCODE
,
221 /* Use the first opcode of the next fragment to determine the
222 alignment requirements. This is ONLY used for LOOPS
225 RELAX_DESIRE_ALIGN_IF_TARGET
,
226 /* These are placed in front of labels. They will all be converted
227 to RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
228 relaxation begins. */
230 RELAX_ADD_NOP_IF_A0_B_RETW
,
231 /* These are placed in front of conditional branches. It will be
232 turned into a NOP (using a1) if the branch is immediately
233 followed by a RETW or RETW.N. Otherwise it will be turned into
234 an rs_fill of 0 before relaxation begins. */
236 RELAX_ADD_NOP_IF_PRE_LOOP_END
,
237 /* These are placed after JX instructions. It will be turned into a
238 NOP if there is one instruction before a loop end label.
239 Otherwise it will be turned into an rs_fill of 0 before
240 relaxation begins. This is used to avoid a hardware TIE
241 interlock issue prior to T1040. */
243 RELAX_ADD_NOP_IF_SHORT_LOOP
,
244 /* These are placed after LOOP instructions. It will be turned into
245 a NOP when: (1) there are less than 3 instructions in the loop;
246 we place 2 of these in a row to add up to 2 NOPS in short loops;
247 or (2) The instructions in the loop do not include a branch or
248 jump. Otherwise it will be turned into an rs_fill of 0 before
249 relaxation begins. This is used to avoid hardware bug
252 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
253 /* These are placed after LOOP instructions. It will be turned into
254 a NOP if there are less than 12 bytes to the end of some other
255 loop's end. Otherwise it will be turned into an rs_fill of 0
256 before relaxation begins. This is used to avoid hardware bug
260 /* The next fragment like its first instruction to NOT cross a
264 /* This will be turned into a NOP or NOP.N if the previous
265 instruction is expanded to negate a loop. */
267 RELAX_LOOP_END_ADD_NOP
,
268 /* When the code density option is available, this will generate a
269 NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
270 fragment with a NOP in it. */
273 /* Another fragment could generate an expansion here but has not yet. */
276 /* Expansion has been generated by an instruction that generates a
277 literal. However, the stretch has NOT been reported yet in this
281 /* Expansion has been generated by an instruction that generates a
284 RELAX_LITERAL_POOL_BEGIN
,
285 RELAX_LITERAL_POOL_END
,
286 /* Technically these are not relaxations at all, but mark a location
287 to store literals later. Note that fr_var stores the frchain for
288 BEGIN frags and fr_var stores now_seg for END frags. */
291 /* The last instruction in this fragment (at->fr_opcode) can be
292 freely replaced with a single wider instruction if a future
293 alignment desires or needs it. */
296 /* The last instruction in this fragment (at->fr_opcode) contains
297 the value defined by fr_symbol (fr_offset = 0). If the value
298 does not fit, use the specified expansion. This is similar to
299 "NARROW", except that these may not be expanded in order to align
303 /* The last instruction in this fragment (at->fr_opcode) contains a
304 literal. It has already been expanded at least 1 step. */
307 /* The last instruction in this fragment (at->fr_opcode) contains a
308 literal. It has already been expanded at least 2 steps. */
311 /* This is used as a stopper to bound the number of steps that
313 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
316 typedef bfd_boolean (*frag_predicate
) (const fragS
*);
319 /* Directive functions. */
321 static bfd_boolean use_generics
323 static bfd_boolean use_longcalls
325 static bfd_boolean code_density_available
327 static bfd_boolean can_relax
329 static void directive_push
330 PARAMS ((directiveE
, bfd_boolean
, const void *));
331 static void directive_pop
332 PARAMS ((directiveE
*, bfd_boolean
*, const char **,
333 unsigned int *, const void **));
334 static void directive_balance
336 static bfd_boolean inside_directive
337 PARAMS ((directiveE
));
338 static void get_directive
339 PARAMS ((directiveE
*, bfd_boolean
*));
340 static void xtensa_begin_directive
342 static void xtensa_end_directive
344 static void xtensa_literal_prefix
345 PARAMS ((char const *, int));
346 static void xtensa_literal_position
348 static void xtensa_literal_pseudo
351 /* Parsing and Idiom Translation Functions. */
353 static const char *expression_end
354 PARAMS ((const char *));
355 static unsigned tc_get_register
356 PARAMS ((const char *));
357 static void expression_maybe_register
358 PARAMS ((xtensa_operand
, expressionS
*));
359 static int tokenize_arguments
360 PARAMS ((char **, char *));
361 static bfd_boolean parse_arguments
362 PARAMS ((TInsn
*, int, char **));
363 static int xg_translate_idioms
364 PARAMS ((char **, int *, char **));
365 static int xg_translate_sysreg_op
366 PARAMS ((char **, int *, char **));
367 static void xg_reverse_shift_count
369 static int xg_arg_is_constant
370 PARAMS ((char *, offsetT
*));
371 static void xg_replace_opname
372 PARAMS ((char **, char *));
373 static int xg_check_num_args
374 PARAMS ((int *, int, char *, char **));
376 /* Functions for dealing with the Xtensa ISA. */
378 static bfd_boolean operand_is_immed
379 PARAMS ((xtensa_operand
));
380 static bfd_boolean operand_is_pcrel_label
381 PARAMS ((xtensa_operand
));
382 static int get_relaxable_immed
383 PARAMS ((xtensa_opcode
));
384 static xtensa_opcode get_opcode_from_buf
385 PARAMS ((const char *));
386 static bfd_boolean is_direct_call_opcode
387 PARAMS ((xtensa_opcode
));
388 static bfd_boolean is_call_opcode
389 PARAMS ((xtensa_opcode
));
390 static bfd_boolean is_entry_opcode
391 PARAMS ((xtensa_opcode
));
392 static bfd_boolean is_loop_opcode
393 PARAMS ((xtensa_opcode
));
394 static bfd_boolean is_the_loop_opcode
395 PARAMS ((xtensa_opcode
));
396 static bfd_boolean is_jx_opcode
397 PARAMS ((xtensa_opcode
));
398 static bfd_boolean is_windowed_return_opcode
399 PARAMS ((xtensa_opcode
));
400 static bfd_boolean is_conditional_branch_opcode
401 PARAMS ((xtensa_opcode
));
402 static bfd_boolean is_branch_or_jump_opcode
403 PARAMS ((xtensa_opcode
));
404 static bfd_reloc_code_real_type opnum_to_reloc
406 static int reloc_to_opnum
407 PARAMS ((bfd_reloc_code_real_type
));
408 static void xtensa_insnbuf_set_operand
409 PARAMS ((xtensa_insnbuf
, xtensa_opcode
, xtensa_operand
, int32
,
410 const char *, unsigned int));
411 static uint32 xtensa_insnbuf_get_operand
412 PARAMS ((xtensa_insnbuf
, xtensa_opcode
, int));
413 static void xtensa_insnbuf_set_immediate_field
414 PARAMS ((xtensa_opcode
, xtensa_insnbuf
, int32
, const char *,
416 static bfd_boolean is_negatable_branch
419 /* Various Other Internal Functions. */
421 static bfd_boolean is_unique_insn_expansion
422 PARAMS ((TransitionRule
*));
423 static int xg_get_insn_size
425 static int xg_get_build_instr_size
426 PARAMS ((BuildInstr
*));
427 static bfd_boolean xg_is_narrow_insn
429 static bfd_boolean xg_is_single_relaxable_insn
431 static int xg_get_max_narrow_insn_size
432 PARAMS ((xtensa_opcode
));
433 static int xg_get_max_insn_widen_size
434 PARAMS ((xtensa_opcode
));
435 static int xg_get_max_insn_widen_literal_size
436 PARAMS ((xtensa_opcode
));
437 static bfd_boolean xg_is_relaxable_insn
438 PARAMS ((TInsn
*, int));
439 static symbolS
*get_special_literal_symbol
441 static symbolS
*get_special_label_symbol
443 static bfd_boolean xg_build_to_insn
444 PARAMS ((TInsn
*, TInsn
*, BuildInstr
*));
445 static bfd_boolean xg_build_to_stack
446 PARAMS ((IStack
*, TInsn
*, BuildInstr
*));
447 static bfd_boolean xg_expand_to_stack
448 PARAMS ((IStack
*, TInsn
*, int));
449 static bfd_boolean xg_expand_narrow
450 PARAMS ((TInsn
*, TInsn
*));
451 static bfd_boolean xg_immeds_fit
452 PARAMS ((const TInsn
*));
453 static bfd_boolean xg_symbolic_immeds_fit
454 PARAMS ((const TInsn
*, segT
, fragS
*, offsetT
, long));
455 static bfd_boolean xg_check_operand
456 PARAMS ((int32
, xtensa_operand
));
457 static int is_dnrange
458 PARAMS ((fragS
*, symbolS
*, long));
459 static int xg_assembly_relax
460 PARAMS ((IStack
*, TInsn
*, segT
, fragS
*, offsetT
, int, long));
461 static void xg_force_frag_space
463 static void xg_finish_frag
464 PARAMS ((char *, enum xtensa_relax_statesE
, int, bfd_boolean
));
465 static bfd_boolean is_branch_jmp_to_next
466 PARAMS ((TInsn
*, fragS
*));
467 static void xg_add_branch_and_loop_targets
469 static bfd_boolean xg_instruction_matches_rule
470 PARAMS ((TInsn
*, TransitionRule
*));
471 static TransitionRule
*xg_instruction_match
473 static bfd_boolean xg_build_token_insn
474 PARAMS ((BuildInstr
*, TInsn
*, TInsn
*));
475 static bfd_boolean xg_simplify_insn
476 PARAMS ((TInsn
*, TInsn
*));
477 static bfd_boolean xg_expand_assembly_insn
478 PARAMS ((IStack
*, TInsn
*));
479 static symbolS
*xg_assemble_literal
481 static void xg_assemble_literal_space
483 static symbolS
*xtensa_create_literal_symbol
484 PARAMS ((segT
, fragS
*));
485 static void xtensa_add_literal_sym
486 PARAMS ((symbolS
*));
487 static void xtensa_add_insn_label
488 PARAMS ((symbolS
*));
489 static void xtensa_clear_insn_labels
491 static bfd_boolean get_is_linkonce_section
492 PARAMS ((bfd
*, segT
));
493 static bfd_boolean xg_emit_insn
494 PARAMS ((TInsn
*, bfd_boolean
));
495 static bfd_boolean xg_emit_insn_to_buf
496 PARAMS ((TInsn
*, char *, fragS
*, offsetT
, bfd_boolean
));
497 static bfd_boolean xg_add_opcode_fix
498 PARAMS ((xtensa_opcode
, int, expressionS
*, fragS
*, offsetT
));
499 static void xg_resolve_literals
500 PARAMS ((TInsn
*, symbolS
*));
501 static void xg_resolve_labels
502 PARAMS ((TInsn
*, symbolS
*));
503 static void xg_assemble_tokens
505 static bfd_boolean is_register_writer
506 PARAMS ((const TInsn
*, const char *, int));
507 static bfd_boolean is_bad_loopend_opcode
508 PARAMS ((const TInsn
*));
509 static bfd_boolean is_unaligned_label
510 PARAMS ((symbolS
*));
511 static fragS
*next_non_empty_frag
512 PARAMS ((const fragS
*));
513 static xtensa_opcode next_frag_opcode
514 PARAMS ((const fragS
*));
515 static void update_next_frag_nop_state
517 static bfd_boolean next_frag_is_branch_target
518 PARAMS ((const fragS
*));
519 static bfd_boolean next_frag_is_loop_target
520 PARAMS ((const fragS
*));
521 static addressT next_frag_pre_opcode_bytes
522 PARAMS ((const fragS
*));
523 static bfd_boolean is_next_frag_target
524 PARAMS ((const fragS
*, const fragS
*));
525 static void xtensa_mark_literal_pool_location
527 static void xtensa_move_labels
528 PARAMS ((fragS
*, valueT
, bfd_boolean
));
529 static void assemble_nop
530 PARAMS ((size_t, char *));
531 static addressT get_expanded_loop_offset
532 PARAMS ((xtensa_opcode
));
533 static fragS
*get_literal_pool_location
535 static void set_literal_pool_location
536 PARAMS ((segT
, fragS
*));
538 /* Helpers for xtensa_end(). */
540 static void xtensa_cleanup_align_frags
542 static void xtensa_fix_target_frags
544 static bfd_boolean frag_can_negate_branch
546 static void xtensa_fix_a0_b_retw_frags
548 static bfd_boolean next_instrs_are_b_retw
550 static void xtensa_fix_b_j_loop_end_frags
552 static bfd_boolean next_instr_is_loop_end
554 static void xtensa_fix_close_loop_end_frags
556 static size_t min_bytes_to_other_loop_end
557 PARAMS ((fragS
*, fragS
*, offsetT
, size_t));
558 static size_t unrelaxed_frag_min_size
560 static void xtensa_fix_short_loop_frags
562 static size_t count_insns_to_loop_end
563 PARAMS ((fragS
*, bfd_boolean
, size_t));
564 static size_t unrelaxed_frag_min_insn_count
566 static bfd_boolean branch_before_loop_end
568 static bfd_boolean unrelaxed_frag_has_b_j
570 static void xtensa_sanity_check
572 static bfd_boolean is_empty_loop
573 PARAMS ((const TInsn
*, fragS
*));
574 static bfd_boolean is_local_forward_loop
575 PARAMS ((const TInsn
*, fragS
*));
577 /* Alignment Functions. */
579 static size_t get_text_align_power
581 static addressT get_text_align_max_fill_size
582 PARAMS ((int, bfd_boolean
, bfd_boolean
));
583 static addressT get_text_align_fill_size
584 PARAMS ((addressT
, int, int, bfd_boolean
, bfd_boolean
));
585 static size_t get_text_align_nop_count
586 PARAMS ((size_t, bfd_boolean
));
587 static size_t get_text_align_nth_nop_size
588 PARAMS ((size_t, size_t, bfd_boolean
));
589 static addressT get_noop_aligned_address
590 PARAMS ((fragS
*, addressT
));
591 static addressT get_widen_aligned_address
592 PARAMS ((fragS
*, addressT
));
594 /* Helpers for xtensa_relax_frag(). */
596 static long relax_frag_text_align
597 PARAMS ((fragS
*, long));
598 static long relax_frag_add_nop
600 static long relax_frag_narrow
601 PARAMS ((fragS
*, long));
602 static bfd_boolean future_alignment_required
603 PARAMS ((fragS
*, long));
604 static long relax_frag_immed
605 PARAMS ((segT
, fragS
*, long, int, int *));
607 /* Helpers for md_convert_frag(). */
609 static void convert_frag_align_next_opcode
611 static void convert_frag_narrow
613 static void convert_frag_immed
614 PARAMS ((segT
, fragS
*, int));
615 static fixS
*fix_new_exp_in_seg
616 PARAMS ((segT
, subsegT
, fragS
*, int, int, expressionS
*, int,
617 bfd_reloc_code_real_type
));
618 static void convert_frag_immed_finish_loop
619 PARAMS ((segT
, fragS
*, TInsn
*));
620 static offsetT get_expression_value
621 PARAMS ((segT
, expressionS
*));
623 /* Flags for the Last Instruction in Each Subsegment. */
625 static unsigned get_last_insn_flags
626 PARAMS ((segT
, subsegT
));
627 static void set_last_insn_flags
628 PARAMS ((segT
, subsegT
, unsigned, bfd_boolean
));
630 /* Segment list functions. */
632 static void xtensa_remove_section
634 static void xtensa_insert_section
635 PARAMS ((segT
, segT
));
636 static void xtensa_move_seg_list_to_beginning
637 PARAMS ((seg_list
*));
638 static void xtensa_move_literals
640 static void xtensa_reorder_seg_list
641 PARAMS ((seg_list
*, segT
));
642 static void xtensa_reorder_segments
644 static segT get_last_sec
646 static void xtensa_switch_to_literal_fragment
647 PARAMS ((emit_state
*));
648 static void xtensa_switch_section_emit_state
649 PARAMS ((emit_state
*, segT
, subsegT
));
650 static void xtensa_restore_emit_state
651 PARAMS ((emit_state
*));
652 static void cache_literal_section
653 PARAMS ((seg_list
*, const char *, segT
*));
654 static segT retrieve_literal_seg
655 PARAMS ((seg_list
*, const char *));
656 static segT seg_present
657 PARAMS ((const char *));
658 static void add_seg_list
659 PARAMS ((seg_list
*, segT
));
661 /* Property Table (e.g., ".xt.insn" and ".xt.lit") Functions. */
663 static void xtensa_create_property_segments
664 PARAMS ((frag_predicate
, const char *, xt_section_type
));
665 static segment_info_type
*retrieve_segment_info
667 static segT retrieve_xtensa_section
669 static bfd_boolean section_has_property
670 PARAMS ((segT sec
, frag_predicate
));
671 static void add_xt_block_frags
672 PARAMS ((segT
, segT
, xtensa_block_info
**, frag_predicate
));
673 static bfd_boolean get_frag_is_literal
674 PARAMS ((const fragS
*));
675 static bfd_boolean get_frag_is_insn
676 PARAMS ((const fragS
*));
678 /* Import from elf32-xtensa.c in BFD library. */
679 extern char *xtensa_get_property_section_name
680 PARAMS ((bfd
*, asection
*, const char *));
682 /* TInsn and IStack functions. */
683 static bfd_boolean tinsn_has_symbolic_operands
684 PARAMS ((const TInsn
*));
685 static bfd_boolean tinsn_has_invalid_symbolic_operands
686 PARAMS ((const TInsn
*));
687 static bfd_boolean tinsn_has_complex_operands
688 PARAMS ((const TInsn
*));
689 static bfd_boolean tinsn_to_insnbuf
690 PARAMS ((TInsn
*, xtensa_insnbuf
));
691 static bfd_boolean tinsn_check_arguments
692 PARAMS ((const TInsn
*));
693 static void tinsn_from_chars
694 PARAMS ((TInsn
*, char *));
695 static void tinsn_immed_from_frag
696 PARAMS ((TInsn
*, fragS
*));
697 static int get_num_stack_text_bytes
699 static int get_num_stack_literal_bytes
702 /* Expression Utilities. */
703 bfd_boolean expr_is_const
704 PARAMS ((const expressionS
*));
705 offsetT get_expr_const
706 PARAMS ((const expressionS
*));
708 PARAMS ((expressionS
*, offsetT
));
709 void set_expr_symbol_offset
710 PARAMS ((expressionS
*, symbolS
*, offsetT
));
711 bfd_boolean expr_is_equal
712 PARAMS ((expressionS
*, expressionS
*));
713 static void copy_expr
714 PARAMS ((expressionS
*, const expressionS
*));
716 #ifdef XTENSA_SECTION_RENAME
717 static void build_section_rename
718 PARAMS ((const char *));
719 static void add_section_rename
720 PARAMS ((char *, char *));
724 /* ISA imported from bfd. */
725 extern xtensa_isa xtensa_default_isa
;
727 extern int target_big_endian
;
729 static xtensa_opcode xtensa_addi_opcode
;
730 static xtensa_opcode xtensa_addmi_opcode
;
731 static xtensa_opcode xtensa_call0_opcode
;
732 static xtensa_opcode xtensa_call4_opcode
;
733 static xtensa_opcode xtensa_call8_opcode
;
734 static xtensa_opcode xtensa_call12_opcode
;
735 static xtensa_opcode xtensa_callx0_opcode
;
736 static xtensa_opcode xtensa_callx4_opcode
;
737 static xtensa_opcode xtensa_callx8_opcode
;
738 static xtensa_opcode xtensa_callx12_opcode
;
739 static xtensa_opcode xtensa_entry_opcode
;
740 static xtensa_opcode xtensa_isync_opcode
;
741 static xtensa_opcode xtensa_j_opcode
;
742 static xtensa_opcode xtensa_jx_opcode
;
743 static xtensa_opcode xtensa_loop_opcode
;
744 static xtensa_opcode xtensa_loopnez_opcode
;
745 static xtensa_opcode xtensa_loopgtz_opcode
;
746 static xtensa_opcode xtensa_nop_n_opcode
;
747 static xtensa_opcode xtensa_or_opcode
;
748 static xtensa_opcode xtensa_ret_opcode
;
749 static xtensa_opcode xtensa_ret_n_opcode
;
750 static xtensa_opcode xtensa_retw_opcode
;
751 static xtensa_opcode xtensa_retw_n_opcode
;
752 static xtensa_opcode xtensa_rsr_opcode
;
753 static xtensa_opcode xtensa_waiti_opcode
;
756 /* Command-line Options. */
758 bfd_boolean use_literal_section
= TRUE
;
759 static bfd_boolean align_targets
= TRUE
;
760 static bfd_boolean align_only_targets
= FALSE
;
761 static bfd_boolean software_a0_b_retw_interlock
= TRUE
;
762 static bfd_boolean has_a0_b_retw
= FALSE
;
763 static bfd_boolean workaround_a0_b_retw
= TRUE
;
765 static bfd_boolean software_avoid_b_j_loop_end
= TRUE
;
766 static bfd_boolean workaround_b_j_loop_end
= TRUE
;
767 static bfd_boolean maybe_has_b_j_loop_end
= FALSE
;
769 static bfd_boolean software_avoid_short_loop
= TRUE
;
770 static bfd_boolean workaround_short_loop
= TRUE
;
771 static bfd_boolean maybe_has_short_loop
= FALSE
;
773 static bfd_boolean software_avoid_close_loop_end
= TRUE
;
774 static bfd_boolean workaround_close_loop_end
= TRUE
;
775 static bfd_boolean maybe_has_close_loop_end
= FALSE
;
777 /* When avoid_short_loops is true, all loops with early exits must
778 have at least 3 instructions. avoid_all_short_loops is a modifier
779 to the avoid_short_loop flag. In addition to the avoid_short_loop
780 actions, all straightline loopgtz and loopnez must have at least 3
783 static bfd_boolean software_avoid_all_short_loops
= TRUE
;
784 static bfd_boolean workaround_all_short_loops
= TRUE
;
786 /* This is on a per-instruction basis. */
787 static bfd_boolean specific_opcode
= FALSE
;
791 option_density
= OPTION_MD_BASE
,
800 option_text_section_literals
,
801 option_no_text_section_literals
,
803 option_align_targets
,
804 option_no_align_targets
,
806 option_align_only_targets
,
807 option_no_align_only_targets
,
812 option_workaround_a0_b_retw
,
813 option_no_workaround_a0_b_retw
,
815 option_workaround_b_j_loop_end
,
816 option_no_workaround_b_j_loop_end
,
818 option_workaround_short_loop
,
819 option_no_workaround_short_loop
,
821 option_workaround_all_short_loops
,
822 option_no_workaround_all_short_loops
,
824 option_workaround_close_loop_end
,
825 option_no_workaround_close_loop_end
,
827 option_no_workarounds
,
829 #ifdef XTENSA_SECTION_RENAME
830 option_literal_section_name
,
831 option_text_section_name
,
832 option_data_section_name
,
833 option_bss_section_name
,
834 option_rename_section_name
,
841 const char *md_shortopts
= "";
843 struct option md_longopts
[] =
845 {"density", no_argument
, NULL
, option_density
},
846 {"no-density", no_argument
, NULL
, option_no_density
},
847 /* At least as early as alameda, --[no-]relax didn't work as
848 documented, so as of albany, --[no-]relax is equivalent to
849 --[no-]generics. Both of these will be deprecated in
851 {"relax", no_argument
, NULL
, option_generics
},
852 {"no-relax", no_argument
, NULL
, option_no_generics
},
853 {"generics", no_argument
, NULL
, option_generics
},
854 {"no-generics", no_argument
, NULL
, option_no_generics
},
855 {"text-section-literals", no_argument
, NULL
, option_text_section_literals
},
856 {"no-text-section-literals", no_argument
, NULL
,
857 option_no_text_section_literals
},
858 /* This option was changed from -align-target to -target-align
859 because it conflicted with the "-al" option. */
860 {"target-align", no_argument
, NULL
, option_align_targets
},
861 {"no-target-align", no_argument
, NULL
,
862 option_no_align_targets
},
864 /* This option should do a better job aligning targets because
865 it will only attempt to align targets that are the target of a
867 { "target-align-only", no_argument
, NULL
, option_align_only_targets
},
868 { "no-target-align-only", no_argument
, NULL
, option_no_align_only_targets
},
870 {"longcalls", no_argument
, NULL
, option_longcalls
},
871 {"no-longcalls", no_argument
, NULL
, option_no_longcalls
},
873 {"no-workaround-a0-b-retw", no_argument
, NULL
,
874 option_no_workaround_a0_b_retw
},
875 {"workaround-a0-b-retw", no_argument
, NULL
, option_workaround_a0_b_retw
},
877 {"no-workaround-b-j-loop-end", no_argument
, NULL
,
878 option_no_workaround_b_j_loop_end
},
879 {"workaround-b-j-loop-end", no_argument
, NULL
,
880 option_workaround_b_j_loop_end
},
882 {"no-workaround-short-loops", no_argument
, NULL
,
883 option_no_workaround_short_loop
},
884 {"workaround-short-loops", no_argument
, NULL
, option_workaround_short_loop
},
886 {"no-workaround-all-short-loops", no_argument
, NULL
,
887 option_no_workaround_all_short_loops
},
888 {"workaround-all-short-loop", no_argument
, NULL
,
889 option_workaround_all_short_loops
},
891 {"no-workaround-close-loop-end", no_argument
, NULL
,
892 option_no_workaround_close_loop_end
},
893 {"workaround-close-loop-end", no_argument
, NULL
,
894 option_workaround_close_loop_end
},
896 {"no-workarounds", no_argument
, NULL
, option_no_workarounds
},
898 #ifdef XTENSA_SECTION_RENAME
899 {"literal-section-name", required_argument
, NULL
,
900 option_literal_section_name
},
901 {"text-section-name", required_argument
, NULL
,
902 option_text_section_name
},
903 {"data-section-name", required_argument
, NULL
,
904 option_data_section_name
},
905 {"rename-section", required_argument
, NULL
,
906 option_rename_section_name
},
907 {"bss-section-name", required_argument
, NULL
,
908 option_bss_section_name
},
909 #endif /* XTENSA_SECTION_RENAME */
911 {NULL
, no_argument
, NULL
, 0}
914 size_t md_longopts_size
= sizeof md_longopts
;
918 md_parse_option (c
, arg
)
925 if (!density_supported
)
927 as_bad (_("'--density' option not supported in this Xtensa "
931 directive_state
[directive_density
] = TRUE
;
933 case option_no_density
:
934 directive_state
[directive_density
] = FALSE
;
936 case option_generics
:
937 directive_state
[directive_generics
] = TRUE
;
939 case option_no_generics
:
940 directive_state
[directive_generics
] = FALSE
;
942 case option_longcalls
:
943 directive_state
[directive_longcalls
] = TRUE
;
945 case option_no_longcalls
:
946 directive_state
[directive_longcalls
] = FALSE
;
948 case option_text_section_literals
:
949 use_literal_section
= FALSE
;
951 case option_no_text_section_literals
:
952 use_literal_section
= TRUE
;
954 case option_workaround_a0_b_retw
:
955 workaround_a0_b_retw
= TRUE
;
956 software_a0_b_retw_interlock
= TRUE
;
958 case option_no_workaround_a0_b_retw
:
959 workaround_a0_b_retw
= FALSE
;
960 software_a0_b_retw_interlock
= FALSE
;
962 case option_workaround_b_j_loop_end
:
963 workaround_b_j_loop_end
= TRUE
;
964 software_avoid_b_j_loop_end
= TRUE
;
966 case option_no_workaround_b_j_loop_end
:
967 workaround_b_j_loop_end
= FALSE
;
968 software_avoid_b_j_loop_end
= FALSE
;
971 case option_workaround_short_loop
:
972 workaround_short_loop
= TRUE
;
973 software_avoid_short_loop
= TRUE
;
975 case option_no_workaround_short_loop
:
976 workaround_short_loop
= FALSE
;
977 software_avoid_short_loop
= FALSE
;
980 case option_workaround_all_short_loops
:
981 workaround_all_short_loops
= TRUE
;
982 software_avoid_all_short_loops
= TRUE
;
984 case option_no_workaround_all_short_loops
:
985 workaround_all_short_loops
= FALSE
;
986 software_avoid_all_short_loops
= FALSE
;
989 case option_workaround_close_loop_end
:
990 workaround_close_loop_end
= TRUE
;
991 software_avoid_close_loop_end
= TRUE
;
993 case option_no_workaround_close_loop_end
:
994 workaround_close_loop_end
= FALSE
;
995 software_avoid_close_loop_end
= FALSE
;
998 case option_no_workarounds
:
999 workaround_a0_b_retw
= FALSE
;
1000 software_a0_b_retw_interlock
= FALSE
;
1001 workaround_b_j_loop_end
= FALSE
;
1002 software_avoid_b_j_loop_end
= FALSE
;
1003 workaround_short_loop
= FALSE
;
1004 software_avoid_short_loop
= FALSE
;
1005 workaround_all_short_loops
= FALSE
;
1006 software_avoid_all_short_loops
= FALSE
;
1007 workaround_close_loop_end
= FALSE
;
1008 software_avoid_close_loop_end
= FALSE
;
1011 case option_align_targets
:
1012 align_targets
= TRUE
;
1014 case option_no_align_targets
:
1015 align_targets
= FALSE
;
1018 case option_align_only_targets
:
1019 align_only_targets
= TRUE
;
1021 case option_no_align_only_targets
:
1022 align_only_targets
= FALSE
;
1025 #ifdef XTENSA_SECTION_RENAME
1026 case option_literal_section_name
:
1027 add_section_rename (".literal", arg
);
1028 as_warn (_("'--literal-section-name' is deprecated; "
1029 "use '--rename-section .literal=NEWNAME'"));
1032 case option_text_section_name
:
1033 add_section_rename (".text", arg
);
1034 as_warn (_("'--text-section-name' is deprecated; "
1035 "use '--rename-section .text=NEWNAME'"));
1038 case option_data_section_name
:
1039 add_section_rename (".data", arg
);
1040 as_warn (_("'--data-section-name' is deprecated; "
1041 "use '--rename-section .data=NEWNAME'"));
1044 case option_bss_section_name
:
1045 add_section_rename (".bss", arg
);
1046 as_warn (_("'--bss-section-name' is deprecated; "
1047 "use '--rename-section .bss=NEWNAME'"));
1050 case option_rename_section_name
:
1051 build_section_rename (arg
);
1053 #endif /* XTENSA_SECTION_RENAME */
1056 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1057 should be emitted or not. FIXME: Not implemented. */
1067 md_show_usage (stream
)
1070 fputs ("\nXtensa options:\n"
1071 "--[no-]density [Do not] emit density instructions\n"
1072 "--[no-]relax [Do not] perform branch relaxation\n"
1073 "--[no-]generics [Do not] transform instructions\n"
1074 "--[no-]longcalls [Do not] emit 32-bit call sequences\n"
1075 "--[no-]target-align [Do not] try to align branch targets\n"
1076 "--[no-]text-section-literals\n"
1077 " [Do not] put literals in the text section\n"
1078 "--no-workarounds Do not use any Xtensa workarounds\n"
1079 #ifdef XTENSA_SECTION_RENAME
1080 "--rename-section old=new(:old1=new1)*\n"
1081 " Rename section 'old' to 'new'\n"
1082 "\nThe following Xtensa options are deprecated\n"
1083 "--literal-section-name Name of literal section (default .literal)\n"
1084 "--text-section-name Name of text section (default .text)\n"
1085 "--data-section-name Name of data section (default .data)\n"
1086 "--bss-section-name Name of bss section (default .bss)\n"
1092 /* Directive data and functions. */
1094 typedef struct state_stackS_struct
1096 directiveE directive
;
1097 bfd_boolean negated
;
1098 bfd_boolean old_state
;
1102 struct state_stackS_struct
*prev
;
1105 state_stackS
*directive_state_stack
;
1107 const pseudo_typeS md_pseudo_table
[] =
1109 {"align", s_align_bytes
, 0}, /* Defaulting is invalid (0) */
1110 {"literal_position", xtensa_literal_position
, 0},
1111 {"frame", s_ignore
, 0}, /* formerly used for STABS debugging */
1113 {"begin", xtensa_begin_directive
, 0},
1114 {"end", xtensa_end_directive
, 0},
1115 {"literal", xtensa_literal_pseudo
, 0},
1123 return directive_state
[directive_generics
];
1130 return directive_state
[directive_longcalls
];
1135 code_density_available ()
1137 return directive_state
[directive_density
];
1144 return use_generics ();
1149 directive_push (directive
, negated
, datum
)
1150 directiveE directive
;
1151 bfd_boolean negated
;
1156 state_stackS
*stack
= (state_stackS
*) xmalloc (sizeof (state_stackS
));
1158 as_where (&file
, &line
);
1160 stack
->directive
= directive
;
1161 stack
->negated
= negated
;
1162 stack
->old_state
= directive_state
[directive
];
1165 stack
->datum
= datum
;
1166 stack
->prev
= directive_state_stack
;
1167 directive_state_stack
= stack
;
1169 directive_state
[directive
] = !negated
;
1173 directive_pop (directive
, negated
, file
, line
, datum
)
1174 directiveE
*directive
;
1175 bfd_boolean
*negated
;
1180 state_stackS
*top
= directive_state_stack
;
1182 if (!directive_state_stack
)
1184 as_bad (_("unmatched end directive"));
1185 *directive
= directive_none
;
1189 directive_state
[directive_state_stack
->directive
] = top
->old_state
;
1190 *directive
= top
->directive
;
1191 *negated
= top
->negated
;
1194 *datum
= top
->datum
;
1195 directive_state_stack
= top
->prev
;
1201 directive_balance ()
1203 while (directive_state_stack
)
1205 directiveE directive
;
1206 bfd_boolean negated
;
1211 directive_pop (&directive
, &negated
, &file
, &line
, &datum
);
1212 as_warn_where ((char *) file
, line
,
1213 _(".begin directive with no matching .end directive"));
1219 inside_directive (dir
)
1222 state_stackS
*top
= directive_state_stack
;
1224 while (top
&& top
->directive
!= dir
)
1227 return (top
!= NULL
);
1232 get_directive (directive
, negated
)
1233 directiveE
*directive
;
1234 bfd_boolean
*negated
;
1239 if (strncmp (input_line_pointer
, "no-", 3) != 0)
1244 input_line_pointer
+= 3;
1247 len
= strspn (input_line_pointer
,
1248 "abcdefghijklmnopqrstuvwxyz_/0123456789.");
1250 for (i
= 0; i
< sizeof (directive_info
) / sizeof (*directive_info
); ++i
)
1252 if (strncmp (input_line_pointer
, directive_info
[i
].name
, len
) == 0)
1254 input_line_pointer
+= len
;
1255 *directive
= (directiveE
) i
;
1256 if (*negated
&& !directive_info
[i
].can_be_negated
)
1257 as_bad (_("directive %s can't be negated"),
1258 directive_info
[i
].name
);
1263 as_bad (_("unknown directive"));
1264 *directive
= (directiveE
) XTENSA_UNDEFINED
;
1269 xtensa_begin_directive (ignore
)
1270 int ignore ATTRIBUTE_UNUSED
;
1272 directiveE directive
;
1273 bfd_boolean negated
;
1278 md_flush_pending_output ();
1280 get_directive (&directive
, &negated
);
1281 if (directive
== (directiveE
) XTENSA_UNDEFINED
)
1283 discard_rest_of_line ();
1289 case directive_literal
:
1290 if (!inside_directive (directive_literal
))
1292 /* Previous labels go with whatever follows this directive, not with
1293 the literal, so save them now. */
1294 saved_insn_labels
= insn_labels
;
1297 state
= (emit_state
*) xmalloc (sizeof (emit_state
));
1298 xtensa_switch_to_literal_fragment (state
);
1299 directive_push (directive_literal
, negated
, state
);
1302 case directive_literal_prefix
:
1303 /* Check to see if the current fragment is a literal
1304 fragment. If it is, then this operation is not allowed. */
1305 if (frag_now
->tc_frag_data
.is_literal
)
1307 as_bad (_("cannot set literal_prefix inside literal fragment"));
1311 /* Allocate the literal state for this section and push
1312 onto the directive stack. */
1313 ls
= xmalloc (sizeof (lit_state
));
1316 *ls
= default_lit_sections
;
1318 directive_push (directive_literal_prefix
, negated
, ls
);
1320 /* Parse the new prefix from the input_line_pointer. */
1322 len
= strspn (input_line_pointer
,
1323 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1324 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1326 /* Process the new prefix. */
1327 xtensa_literal_prefix (input_line_pointer
, len
);
1329 /* Skip the name in the input line. */
1330 input_line_pointer
+= len
;
1333 case directive_freeregs
:
1334 /* This information is currently unused, but we'll accept the statement
1335 and just discard the rest of the line. This won't check the syntax,
1336 but it will accept every correct freeregs directive. */
1337 input_line_pointer
+= strcspn (input_line_pointer
, "\n");
1338 directive_push (directive_freeregs
, negated
, 0);
1341 case directive_density
:
1342 if (!density_supported
&& !negated
)
1344 as_warn (_("Xtensa density option not supported; ignored"));
1350 directive_push (directive
, negated
, 0);
1354 demand_empty_rest_of_line ();
1359 xtensa_end_directive (ignore
)
1360 int ignore ATTRIBUTE_UNUSED
;
1362 directiveE begin_directive
, end_directive
;
1363 bfd_boolean begin_negated
, end_negated
;
1369 md_flush_pending_output ();
1371 get_directive (&end_directive
, &end_negated
);
1372 if (end_directive
== (directiveE
) XTENSA_UNDEFINED
)
1374 discard_rest_of_line ();
1378 if (end_directive
== directive_density
&& !density_supported
&& !end_negated
)
1380 as_warn (_("Xtensa density option not supported; ignored"));
1381 demand_empty_rest_of_line ();
1385 directive_pop (&begin_directive
, &begin_negated
, &file
, &line
,
1386 (const void **) &state
);
1388 if (begin_directive
!= directive_none
)
1390 if (begin_directive
!= end_directive
|| begin_negated
!= end_negated
)
1392 as_bad (_("does not match begin %s%s at %s:%d"),
1393 begin_negated
? "no-" : "",
1394 directive_info
[begin_directive
].name
, file
, line
);
1398 switch (end_directive
)
1400 case directive_literal
:
1401 frag_var (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
1402 xtensa_restore_emit_state (state
);
1404 if (!inside_directive (directive_literal
))
1406 /* Restore the list of current labels. */
1407 xtensa_clear_insn_labels ();
1408 insn_labels
= saved_insn_labels
;
1412 case directive_freeregs
:
1415 case directive_literal_prefix
:
1416 /* Restore the default collection sections from saved state. */
1417 s
= (lit_state
*) state
;
1420 if (use_literal_section
)
1421 default_lit_sections
= *s
;
1423 /* free the state storage */
1433 demand_empty_rest_of_line ();
1437 /* Place an aligned literal fragment at the current location. */
1440 xtensa_literal_position (ignore
)
1441 int ignore ATTRIBUTE_UNUSED
;
1443 if (inside_directive (directive_literal
))
1444 as_warn (_(".literal_position inside literal directive; ignoring"));
1445 else if (!use_literal_section
)
1446 xtensa_mark_literal_pool_location ();
1448 demand_empty_rest_of_line ();
1449 xtensa_clear_insn_labels ();
1453 /* Support .literal label, value@plt + offset. */
1456 xtensa_literal_pseudo (ignored
)
1457 int ignored ATTRIBUTE_UNUSED
;
1460 char *p
, *base_name
;
1465 if (inside_directive (directive_literal
))
1467 as_bad (_(".literal not allowed inside .begin literal region"));
1468 ignore_rest_of_line ();
1472 /* Previous labels go with whatever follows this directive, not with
1473 the literal, so save them now. */
1474 saved_insn_labels
= insn_labels
;
1477 /* If we are using text-section literals, then this is the right value... */
1480 base_name
= input_line_pointer
;
1482 xtensa_switch_to_literal_fragment (&state
);
1484 /* ...but if we aren't using text-section-literals, then we
1485 need to put them in the section we just switched to. */
1486 if (use_literal_section
)
1489 /* All literals are aligned to four-byte boundaries
1490 which is handled by switch to literal fragment. */
1491 /* frag_align (2, 0, 0); */
1493 c
= get_symbol_end ();
1494 /* Just after name is now '\0'. */
1495 p
= input_line_pointer
;
1499 if (*input_line_pointer
!= ',' && *input_line_pointer
!= ':')
1501 as_bad (_("expected comma or colon after symbol name; "
1502 "rest of line ignored"));
1503 ignore_rest_of_line ();
1504 xtensa_restore_emit_state (&state
);
1513 input_line_pointer
++; /* skip ',' or ':' */
1517 /* We only support 4-byte literals with .literal. */
1518 emit_expr (&expP
, 4);
1520 while (*input_line_pointer
== ',');
1524 demand_empty_rest_of_line ();
1526 xtensa_restore_emit_state (&state
);
1528 /* Restore the list of current labels. */
1529 xtensa_clear_insn_labels ();
1530 insn_labels
= saved_insn_labels
;
1535 xtensa_literal_prefix (start
, len
)
1539 segT s_now
; /* Storage for the current seg and subseg. */
1541 char *name
; /* Pointer to the name itself. */
1544 if (!use_literal_section
)
1547 /* Store away the current section and subsection. */
1549 ss_now
= now_subseg
;
1551 /* Get a null-terminated copy of the name. */
1552 name
= xmalloc (len
+ 1);
1555 strncpy (name
, start
, len
);
1558 /* Allocate the sections (interesting note: the memory pointing to
1559 the name is actually used for the name by the new section). */
1560 newname
= xmalloc (len
+ strlen (".literal") + 1);
1561 strcpy (newname
, name
);
1562 strcpy (newname
+ len
, ".literal");
1564 /* Note that retrieve_literal_seg does not create a segment if
1565 it already exists. */
1566 default_lit_sections
.lit_seg
= NULL
; /* retrieved on demand */
1568 /* Canonicalizing section names allows renaming literal
1569 sections to occur correctly. */
1570 default_lit_sections
.lit_seg_name
=
1571 tc_canonicalize_symbol_name (newname
);
1575 /* Restore the current section and subsection and set the
1576 generation into the old segment. */
1577 subseg_set (s_now
, ss_now
);
1581 /* Parsing and Idiom Translation. */
1584 expression_end (name
)
1606 #define ERROR_REG_NUM ((unsigned) -1)
1609 tc_get_register (prefix
)
1613 const char *next_expr
;
1614 const char *old_line_pointer
;
1617 old_line_pointer
= input_line_pointer
;
1619 if (*input_line_pointer
== '$')
1620 ++input_line_pointer
;
1622 /* Accept "sp" as a synonym for "a1". */
1623 if (input_line_pointer
[0] == 's' && input_line_pointer
[1] == 'p'
1624 && expression_end (input_line_pointer
+ 2))
1626 input_line_pointer
+= 2;
1627 return 1; /* AR[1] */
1630 while (*input_line_pointer
++ == *prefix
++)
1632 --input_line_pointer
;
1637 as_bad (_("bad register name: %s"), old_line_pointer
);
1638 return ERROR_REG_NUM
;
1641 if (!ISDIGIT ((unsigned char) *input_line_pointer
))
1643 as_bad (_("bad register number: %s"), input_line_pointer
);
1644 return ERROR_REG_NUM
;
1649 while (ISDIGIT ((int) *input_line_pointer
))
1650 reg
= reg
* 10 + *input_line_pointer
++ - '0';
1652 if (!(next_expr
= expression_end (input_line_pointer
)))
1654 as_bad (_("bad register name: %s"), old_line_pointer
);
1655 return ERROR_REG_NUM
;
1658 input_line_pointer
= (char *) next_expr
;
1664 #define PLT_SUFFIX "@PLT"
1665 #define plt_suffix "@plt"
1668 expression_maybe_register (opnd
, tok
)
1669 xtensa_operand opnd
;
1672 char *kind
= xtensa_operand_kind (opnd
);
1674 if ((strlen (kind
) == 1)
1675 && (*kind
== 'l' || *kind
== 'L' || *kind
== 'i' || *kind
== 'r'))
1677 segT t
= expression (tok
);
1678 if (t
== absolute_section
&& operand_is_pcrel_label (opnd
))
1680 assert (tok
->X_op
== O_constant
);
1681 tok
->X_op
= O_symbol
;
1682 tok
->X_add_symbol
= &abs_symbol
;
1684 if (tok
->X_op
== O_symbol
1685 && (!strncmp (input_line_pointer
, PLT_SUFFIX
,
1686 strlen (PLT_SUFFIX
) - 1)
1687 || !strncmp (input_line_pointer
, plt_suffix
,
1688 strlen (plt_suffix
) - 1)))
1690 symbol_get_tc (tok
->X_add_symbol
)->plt
= 1;
1691 input_line_pointer
+= strlen (plt_suffix
);
1696 unsigned reg
= tc_get_register (kind
);
1698 if (reg
!= ERROR_REG_NUM
) /* Already errored */
1701 if ((xtensa_operand_encode (opnd
, &buf
) != xtensa_encode_result_ok
)
1702 || (reg
!= xtensa_operand_decode (opnd
, buf
)))
1703 as_bad (_("register number out of range"));
1706 tok
->X_op
= O_register
;
1707 tok
->X_add_symbol
= 0;
1708 tok
->X_add_number
= reg
;
1713 /* Split up the arguments for an opcode or pseudo-op. */
1716 tokenize_arguments (args
, str
)
1720 char *old_input_line_pointer
;
1721 bfd_boolean saw_comma
= FALSE
;
1722 bfd_boolean saw_arg
= FALSE
;
1724 char *arg_end
, *arg
;
1727 /* Save and restore input_line_pointer around this function. */
1728 old_input_line_pointer
= input_line_pointer
;
1729 input_line_pointer
= str
;
1731 while (*input_line_pointer
)
1734 switch (*input_line_pointer
)
1740 input_line_pointer
++;
1741 if (saw_comma
|| !saw_arg
)
1747 if (!saw_comma
&& saw_arg
)
1750 arg_end
= input_line_pointer
+ 1;
1751 while (!expression_end (arg_end
))
1754 arg_len
= arg_end
- input_line_pointer
;
1755 arg
= (char *) xmalloc (arg_len
+ 1);
1756 args
[num_args
] = arg
;
1758 strncpy (arg
, input_line_pointer
, arg_len
);
1759 arg
[arg_len
] = '\0';
1761 input_line_pointer
= arg_end
;
1772 input_line_pointer
= old_input_line_pointer
;
1776 input_line_pointer
= old_input_line_pointer
;
1781 /* Parse the arguments to an opcode. Return true on error. */
1784 parse_arguments (insn
, num_args
, arg_strings
)
1789 expressionS
*tok
= insn
->tok
;
1790 xtensa_opcode opcode
= insn
->opcode
;
1791 bfd_boolean had_error
= TRUE
;
1792 xtensa_isa isa
= xtensa_default_isa
;
1794 int opcode_operand_count
;
1795 int actual_operand_count
= 0;
1796 xtensa_operand opnd
= NULL
;
1797 char *old_input_line_pointer
;
1799 if (insn
->insn_type
== ITYPE_LITERAL
)
1800 opcode_operand_count
= 1;
1802 opcode_operand_count
= xtensa_num_operands (isa
, opcode
);
1804 memset (tok
, 0, sizeof (*tok
) * MAX_INSN_ARGS
);
1806 /* Save and restore input_line_pointer around this function. */
1807 old_input_line_pointer
= input_line_pointer
;
1809 for (n
= 0; n
< num_args
; n
++)
1811 input_line_pointer
= arg_strings
[n
];
1813 if (actual_operand_count
>= opcode_operand_count
)
1815 as_warn (_("too many arguments"));
1818 assert (actual_operand_count
< MAX_INSN_ARGS
);
1820 opnd
= xtensa_get_operand (isa
, opcode
, actual_operand_count
);
1821 expression_maybe_register (opnd
, tok
);
1823 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
1825 actual_operand_count
++;
1829 insn
->ntok
= tok
- insn
->tok
;
1833 input_line_pointer
= old_input_line_pointer
;
1839 xg_reverse_shift_count (cnt_argp
)
1842 char *cnt_arg
, *new_arg
;
1843 cnt_arg
= *cnt_argp
;
1845 /* replace the argument with "31-(argument)" */
1846 new_arg
= (char *) xmalloc (strlen (cnt_arg
) + 6);
1847 sprintf (new_arg
, "31-(%s)", cnt_arg
);
1850 *cnt_argp
= new_arg
;
1854 /* If "arg" is a constant expression, return non-zero with the value
1858 xg_arg_is_constant (arg
, valp
)
1863 char *save_ptr
= input_line_pointer
;
1865 input_line_pointer
= arg
;
1867 input_line_pointer
= save_ptr
;
1869 if (exp
.X_op
== O_constant
)
1871 *valp
= exp
.X_add_number
;
1880 xg_replace_opname (popname
, newop
)
1885 *popname
= (char *) xmalloc (strlen (newop
) + 1);
1886 strcpy (*popname
, newop
);
1891 xg_check_num_args (pnum_args
, expected_num
, opname
, arg_strings
)
1897 int num_args
= *pnum_args
;
1899 if (num_args
< expected_num
)
1901 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
1902 num_args
, opname
, expected_num
);
1906 if (num_args
> expected_num
)
1908 as_warn (_("too many operands (%d) for '%s'; expected %d"),
1909 num_args
, opname
, expected_num
);
1910 while (num_args
-- > expected_num
)
1912 free (arg_strings
[num_args
]);
1913 arg_strings
[num_args
] = 0;
1915 *pnum_args
= expected_num
;
1924 xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
)
1929 char *opname
, *new_opname
;
1931 bfd_boolean has_underbar
= FALSE
;
1936 has_underbar
= TRUE
;
1940 /* Opname == [rw]ur... */
1942 if (opname
[3] == '\0')
1944 /* If the register is not specified as part of the opcode,
1945 then get it from the operand and move it to the opcode. */
1947 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
1950 if (!xg_arg_is_constant (arg_strings
[1], &val
))
1952 as_bad (_("register number for `%s' is not a constant"), opname
);
1955 if ((unsigned) val
> 255)
1957 as_bad (_("register number (%ld) for `%s' is out of range"),
1962 /* Remove the last argument, which is now part of the opcode. */
1963 free (arg_strings
[1]);
1967 /* Translate the opcode. */
1968 new_opname
= (char *) xmalloc (8);
1969 sprintf (new_opname
, "%s%cur%u", (has_underbar
? "_" : ""),
1970 opname
[0], (unsigned) val
);
1972 *popname
= new_opname
;
1979 /* If the instruction is an idiom (i.e., a built-in macro), translate it.
1980 Returns non-zero if an error was found. */
1983 xg_translate_idioms (popname
, pnum_args
, arg_strings
)
1988 char *opname
= *popname
;
1989 bfd_boolean has_underbar
= FALSE
;
1993 has_underbar
= TRUE
;
1997 if (strcmp (opname
, "mov") == 0)
1999 if (!has_underbar
&& code_density_available ())
2000 xg_replace_opname (popname
, "mov.n");
2003 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2005 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2006 arg_strings
[2] = (char *) xmalloc (strlen (arg_strings
[1]) + 1);
2007 strcpy (arg_strings
[2], arg_strings
[1]);
2013 if (strcmp (opname
, "bbsi.l") == 0)
2015 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2017 xg_replace_opname (popname
, (has_underbar
? "_bbsi" : "bbsi"));
2018 if (target_big_endian
)
2019 xg_reverse_shift_count (&arg_strings
[1]);
2023 if (strcmp (opname
, "bbci.l") == 0)
2025 if (xg_check_num_args (pnum_args
, 3, opname
, arg_strings
))
2027 xg_replace_opname (popname
, (has_underbar
? "_bbci" : "bbci"));
2028 if (target_big_endian
)
2029 xg_reverse_shift_count (&arg_strings
[1]);
2033 if (strcmp (opname
, "nop") == 0)
2035 if (!has_underbar
&& code_density_available ())
2036 xg_replace_opname (popname
, "nop.n");
2039 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2041 xg_replace_opname (popname
, (has_underbar
? "_or" : "or"));
2042 arg_strings
[0] = (char *) xmalloc (3);
2043 arg_strings
[1] = (char *) xmalloc (3);
2044 arg_strings
[2] = (char *) xmalloc (3);
2045 strcpy (arg_strings
[0], "a1");
2046 strcpy (arg_strings
[1], "a1");
2047 strcpy (arg_strings
[2], "a1");
2053 if ((opname
[0] == 'r' || opname
[0] == 'w')
2055 && opname
[2] == 'r')
2056 return xg_translate_sysreg_op (popname
, pnum_args
, arg_strings
);
2059 /* WIDENING DENSITY OPCODES
2061 questionable relaxations (widening) from old "tai" idioms:
2071 Note: this incomplete list was imported to match the "tai"
2072 behavior; other density opcodes are not handled.
2074 The xtensa-relax code may know how to do these but it doesn't do
2075 anything when these density opcodes appear inside a no-density
2076 region. Somehow GAS should either print an error when that happens
2077 or do the widening. The old "tai" behavior was to do the widening.
2078 For now, I'll make it widen but print a warning.
2080 FIXME: GAS needs to detect density opcodes inside no-density
2081 regions and treat them as errors. This code should be removed
2082 when that is done. */
2086 && density_supported
2087 && !code_density_available ())
2089 if (strcmp (opname
, "add.n") == 0)
2090 xg_replace_opname (popname
, "add");
2092 else if (strcmp (opname
, "beqz.n") == 0)
2093 xg_replace_opname (popname
, "beqz");
2095 else if (strcmp (opname
, "ret.n") == 0)
2096 xg_replace_opname (popname
, "ret");
2098 else if (strcmp (opname
, "retw.n") == 0)
2099 xg_replace_opname (popname
, "retw");
2101 else if (strcmp (opname
, "movi.n") == 0)
2102 xg_replace_opname (popname
, "movi");
2104 else if (strcmp (opname
, "mov.n") == 0)
2106 if (xg_check_num_args (pnum_args
, 2, opname
, arg_strings
))
2108 xg_replace_opname (popname
, "or");
2109 arg_strings
[2] = (char *) xmalloc (strlen (arg_strings
[1]) + 1);
2110 strcpy (arg_strings
[2], arg_strings
[1]);
2114 else if (strcmp (opname
, "nop.n") == 0)
2116 if (xg_check_num_args (pnum_args
, 0, opname
, arg_strings
))
2118 xg_replace_opname (popname
, "or");
2119 arg_strings
[0] = (char *) xmalloc (3);
2120 arg_strings
[1] = (char *) xmalloc (3);
2121 arg_strings
[2] = (char *) xmalloc (3);
2122 strcpy (arg_strings
[0], "a1");
2123 strcpy (arg_strings
[1], "a1");
2124 strcpy (arg_strings
[2], "a1");
2133 /* Functions for dealing with the Xtensa ISA. */
2135 /* Return true if the given operand is an immed or target instruction,
2136 i.e., has a reloc associated with it. Currently, this is only true
2137 if the operand kind is "i, "l" or "L". */
2140 operand_is_immed (opnd
)
2141 xtensa_operand opnd
;
2143 const char *opkind
= xtensa_operand_kind (opnd
);
2144 if (opkind
[0] == '\0' || opkind
[1] != '\0')
2157 /* Return true if the given operand is a pc-relative label. This is
2158 true for "l", "L", and "r" operand kinds. */
2161 operand_is_pcrel_label (opnd
)
2162 xtensa_operand opnd
;
2164 const char *opkind
= xtensa_operand_kind (opnd
);
2165 if (opkind
[0] == '\0' || opkind
[1] != '\0')
2178 /* Currently the assembler only allows us to use a single target per
2179 fragment. Because of this, only one operand for a given
2180 instruction may be symbolic. If there is an operand of kind "lrL",
2181 the last one is chosen. Otherwise, the result is the number of the
2182 last operand of type "i", and if there are none of those, we fail
2186 get_relaxable_immed (opcode
)
2187 xtensa_opcode opcode
;
2189 int last_immed
= -1;
2191 xtensa_operand operand
;
2193 if (opcode
== XTENSA_UNDEFINED
)
2196 noperands
= xtensa_num_operands (xtensa_default_isa
, opcode
);
2197 for (opi
= noperands
- 1; opi
>= 0; opi
--)
2199 operand
= xtensa_get_operand (xtensa_default_isa
, opcode
, opi
);
2200 if (operand_is_pcrel_label (operand
))
2202 if (last_immed
== -1 && operand_is_immed (operand
))
2210 get_opcode_from_buf (buf
)
2213 static xtensa_insnbuf insnbuf
= NULL
;
2214 xtensa_opcode opcode
;
2215 xtensa_isa isa
= xtensa_default_isa
;
2217 insnbuf
= xtensa_insnbuf_alloc (isa
);
2219 xtensa_insnbuf_from_chars (isa
, insnbuf
, buf
);
2220 opcode
= xtensa_decode_insn (isa
, insnbuf
);
2226 is_direct_call_opcode (opcode
)
2227 xtensa_opcode opcode
;
2229 if (opcode
== XTENSA_UNDEFINED
)
2232 return (opcode
== xtensa_call0_opcode
2233 || opcode
== xtensa_call4_opcode
2234 || opcode
== xtensa_call8_opcode
2235 || opcode
== xtensa_call12_opcode
);
2240 is_call_opcode (opcode
)
2241 xtensa_opcode opcode
;
2243 if (is_direct_call_opcode (opcode
))
2246 if (opcode
== XTENSA_UNDEFINED
)
2249 return (opcode
== xtensa_callx0_opcode
2250 || opcode
== xtensa_callx4_opcode
2251 || opcode
== xtensa_callx8_opcode
2252 || opcode
== xtensa_callx12_opcode
);
2256 /* Return true if the opcode is an entry opcode. This is used because
2257 "entry" adds an implicit ".align 4" and also the entry instruction
2258 has an extra check for an operand value. */
2261 is_entry_opcode (opcode
)
2262 xtensa_opcode opcode
;
2264 if (opcode
== XTENSA_UNDEFINED
)
2267 return (opcode
== xtensa_entry_opcode
);
2271 /* Return true if it is one of the loop opcodes. Loops are special
2272 because they need automatic alignment and they have a relaxation so
2273 complex that we hard-coded it. */
2276 is_loop_opcode (opcode
)
2277 xtensa_opcode opcode
;
2279 if (opcode
== XTENSA_UNDEFINED
)
2282 return (opcode
== xtensa_loop_opcode
2283 || opcode
== xtensa_loopnez_opcode
2284 || opcode
== xtensa_loopgtz_opcode
);
2289 is_the_loop_opcode (opcode
)
2290 xtensa_opcode opcode
;
2292 if (opcode
== XTENSA_UNDEFINED
)
2295 return (opcode
== xtensa_loop_opcode
);
2300 is_jx_opcode (opcode
)
2301 xtensa_opcode opcode
;
2303 if (opcode
== XTENSA_UNDEFINED
)
2306 return (opcode
== xtensa_jx_opcode
);
2310 /* Return true if the opcode is a retw or retw.n.
2311 Needed to add nops to avoid a hardware interlock issue. */
2314 is_windowed_return_opcode (opcode
)
2315 xtensa_opcode opcode
;
2317 if (opcode
== XTENSA_UNDEFINED
)
2320 return (opcode
== xtensa_retw_opcode
|| opcode
== xtensa_retw_n_opcode
);
2324 /* Return true if the opcode type is "l" and the opcode is NOT a jump. */
2327 is_conditional_branch_opcode (opcode
)
2328 xtensa_opcode opcode
;
2330 xtensa_isa isa
= xtensa_default_isa
;
2333 if (opcode
== xtensa_j_opcode
&& opcode
!= XTENSA_UNDEFINED
)
2336 num_ops
= xtensa_num_operands (isa
, opcode
);
2337 for (i
= 0; i
< num_ops
; i
++)
2339 xtensa_operand operand
= xtensa_get_operand (isa
, opcode
, i
);
2340 if (strcmp (xtensa_operand_kind (operand
), "l") == 0)
2347 /* Return true if the given opcode is a conditional branch
2348 instruction, i.e., currently this is true if the instruction
2349 is a jx or has an operand with 'l' type and is not a loop. */
2352 is_branch_or_jump_opcode (opcode
)
2353 xtensa_opcode opcode
;
2357 if (opcode
== XTENSA_UNDEFINED
)
2360 if (is_loop_opcode (opcode
))
2363 if (is_jx_opcode (opcode
))
2366 op_count
= xtensa_num_operands (xtensa_default_isa
, opcode
);
2367 for (opn
= 0; opn
< op_count
; opn
++)
2369 xtensa_operand opnd
=
2370 xtensa_get_operand (xtensa_default_isa
, opcode
, opn
);
2371 const char *opkind
= xtensa_operand_kind (opnd
);
2372 if (opkind
&& opkind
[0] == 'l' && opkind
[1] == '\0')
2379 /* Convert from operand numbers to BFD relocation type code.
2380 Return BFD_RELOC_NONE on failure. */
2382 bfd_reloc_code_real_type
2383 opnum_to_reloc (opnum
)
2389 return BFD_RELOC_XTENSA_OP0
;
2391 return BFD_RELOC_XTENSA_OP1
;
2393 return BFD_RELOC_XTENSA_OP2
;
2397 return BFD_RELOC_NONE
;
2401 /* Convert from BFD relocation type code to operand number.
2402 Return -1 on failure. */
2405 reloc_to_opnum (reloc
)
2406 bfd_reloc_code_real_type reloc
;
2410 case BFD_RELOC_XTENSA_OP0
:
2412 case BFD_RELOC_XTENSA_OP1
:
2414 case BFD_RELOC_XTENSA_OP2
:
2424 xtensa_insnbuf_set_operand (insnbuf
, opcode
, operand
, value
, file
, line
)
2425 xtensa_insnbuf insnbuf
;
2426 xtensa_opcode opcode
;
2427 xtensa_operand operand
;
2432 xtensa_encode_result encode_result
;
2433 uint32 valbuf
= value
;
2435 encode_result
= xtensa_operand_encode (operand
, &valbuf
);
2437 switch (encode_result
)
2439 case xtensa_encode_result_ok
:
2441 case xtensa_encode_result_align
:
2442 as_bad_where ((char *) file
, line
,
2443 _("operand %d not properly aligned for '%s'"),
2444 value
, xtensa_opcode_name (xtensa_default_isa
, opcode
));
2446 case xtensa_encode_result_not_in_table
:
2447 as_bad_where ((char *) file
, line
,
2448 _("operand %d not in immediate table for '%s'"),
2449 value
, xtensa_opcode_name (xtensa_default_isa
, opcode
));
2451 case xtensa_encode_result_too_high
:
2452 as_bad_where ((char *) file
, line
,
2453 _("operand %d too large for '%s'"), value
,
2454 xtensa_opcode_name (xtensa_default_isa
, opcode
));
2456 case xtensa_encode_result_too_low
:
2457 as_bad_where ((char *) file
, line
,
2458 _("operand %d too small for '%s'"), value
,
2459 xtensa_opcode_name (xtensa_default_isa
, opcode
));
2461 case xtensa_encode_result_not_ok
:
2462 as_bad_where ((char *) file
, line
,
2463 _("operand %d is invalid for '%s'"), value
,
2464 xtensa_opcode_name (xtensa_default_isa
, opcode
));
2470 xtensa_operand_set_field (operand
, insnbuf
, valbuf
);
2475 xtensa_insnbuf_get_operand (insnbuf
, opcode
, opnum
)
2476 xtensa_insnbuf insnbuf
;
2477 xtensa_opcode opcode
;
2480 xtensa_operand op
= xtensa_get_operand (xtensa_default_isa
, opcode
, opnum
);
2481 return xtensa_operand_decode (op
, xtensa_operand_get_field (op
, insnbuf
));
2486 xtensa_insnbuf_set_immediate_field (opcode
, insnbuf
, value
, file
, line
)
2487 xtensa_opcode opcode
;
2488 xtensa_insnbuf insnbuf
;
2493 xtensa_isa isa
= xtensa_default_isa
;
2494 int last_opnd
= xtensa_num_operands (isa
, opcode
) - 1;
2495 xtensa_operand operand
= xtensa_get_operand (isa
, opcode
, last_opnd
);
2496 xtensa_insnbuf_set_operand (insnbuf
, opcode
, operand
, value
, file
, line
);
2501 is_negatable_branch (insn
)
2504 xtensa_isa isa
= xtensa_default_isa
;
2506 int num_ops
= xtensa_num_operands (isa
, insn
->opcode
);
2508 for (i
= 0; i
< num_ops
; i
++)
2510 xtensa_operand opnd
= xtensa_get_operand (isa
, insn
->opcode
, i
);
2511 char *kind
= xtensa_operand_kind (opnd
);
2512 if (strlen (kind
) == 1 && *kind
== 'l')
2519 /* Various Other Internal Functions. */
2522 is_unique_insn_expansion (r
)
2525 if (!r
->to_instr
|| r
->to_instr
->next
!= NULL
)
2527 if (r
->to_instr
->typ
!= INSTR_INSTR
)
2534 xg_get_insn_size (insn
)
2537 assert (insn
->insn_type
== ITYPE_INSN
);
2538 return xtensa_insn_length (xtensa_default_isa
, insn
->opcode
);
2543 xg_get_build_instr_size (insn
)
2546 assert (insn
->typ
== INSTR_INSTR
);
2547 return xtensa_insn_length (xtensa_default_isa
, insn
->opcode
);
2552 xg_is_narrow_insn (insn
)
2555 TransitionTable
*table
= xg_build_widen_table ();
2558 assert (insn
->insn_type
== ITYPE_INSN
);
2559 assert (insn
->opcode
< table
->num_opcodes
);
2561 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
2563 TransitionRule
*rule
= l
->rule
;
2565 if (xg_instruction_matches_rule (insn
, rule
)
2566 && is_unique_insn_expansion (rule
))
2568 /* It only generates one instruction... */
2569 assert (insn
->insn_type
== ITYPE_INSN
);
2570 /* ...and it is a larger instruction. */
2571 if (xg_get_insn_size (insn
)
2572 < xg_get_build_instr_size (rule
->to_instr
))
2580 return (num_match
== 1);
2585 xg_is_single_relaxable_insn (insn
)
2588 TransitionTable
*table
= xg_build_widen_table ();
2591 assert (insn
->insn_type
== ITYPE_INSN
);
2592 assert (insn
->opcode
< table
->num_opcodes
);
2594 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
2596 TransitionRule
*rule
= l
->rule
;
2598 if (xg_instruction_matches_rule (insn
, rule
)
2599 && is_unique_insn_expansion (rule
))
2601 assert (insn
->insn_type
== ITYPE_INSN
);
2602 /* ... and it is a larger instruction. */
2603 if (xg_get_insn_size (insn
)
2604 <= xg_get_build_instr_size (rule
->to_instr
))
2612 return (num_match
== 1);
2616 /* Return the largest size instruction that this instruction can
2617 expand to. Currently, in all cases, this is 3 bytes. Of course we
2618 could just calculate this once and generate a table. */
2621 xg_get_max_narrow_insn_size (opcode
)
2622 xtensa_opcode opcode
;
2624 /* Go ahead and compute it, but it better be 3. */
2625 TransitionTable
*table
= xg_build_widen_table ();
2627 int old_size
= xtensa_insn_length (xtensa_default_isa
, opcode
);
2628 assert (opcode
< table
->num_opcodes
);
2630 /* Actually we can do better. Check to see of Only one applies. */
2631 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
2633 TransitionRule
*rule
= l
->rule
;
2635 /* If it only generates one instruction. */
2636 if (is_unique_insn_expansion (rule
))
2638 int new_size
= xtensa_insn_length (xtensa_default_isa
,
2639 rule
->to_instr
->opcode
);
2640 if (new_size
> old_size
)
2642 assert (new_size
== 3);
2651 /* Return the maximum number of bytes this opcode can expand to. */
2654 xg_get_max_insn_widen_size (opcode
)
2655 xtensa_opcode opcode
;
2657 TransitionTable
*table
= xg_build_widen_table ();
2659 int max_size
= xtensa_insn_length (xtensa_default_isa
, opcode
);
2661 assert (opcode
< table
->num_opcodes
);
2663 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
2665 TransitionRule
*rule
= l
->rule
;
2666 BuildInstr
*build_list
;
2671 build_list
= rule
->to_instr
;
2672 if (is_unique_insn_expansion (rule
))
2674 assert (build_list
->typ
== INSTR_INSTR
);
2675 this_size
= xg_get_max_insn_widen_size (build_list
->opcode
);
2678 for (; build_list
!= NULL
; build_list
= build_list
->next
)
2680 switch (build_list
->typ
)
2683 this_size
+= xtensa_insn_length (xtensa_default_isa
,
2684 build_list
->opcode
);
2687 case INSTR_LITERAL_DEF
:
2688 case INSTR_LABEL_DEF
:
2693 if (this_size
> max_size
)
2694 max_size
= this_size
;
2700 /* Return the maximum number of literal bytes this opcode can generate. */
2703 xg_get_max_insn_widen_literal_size (opcode
)
2704 xtensa_opcode opcode
;
2706 TransitionTable
*table
= xg_build_widen_table ();
2710 assert (opcode
< table
->num_opcodes
);
2712 for (l
= table
->table
[opcode
]; l
!= NULL
; l
= l
->next
)
2714 TransitionRule
*rule
= l
->rule
;
2715 BuildInstr
*build_list
;
2720 build_list
= rule
->to_instr
;
2721 if (is_unique_insn_expansion (rule
))
2723 assert (build_list
->typ
== INSTR_INSTR
);
2724 this_size
= xg_get_max_insn_widen_literal_size (build_list
->opcode
);
2727 for (; build_list
!= NULL
; build_list
= build_list
->next
)
2729 switch (build_list
->typ
)
2731 case INSTR_LITERAL_DEF
:
2732 /* hard coded 4-byte literal. */
2736 case INSTR_LABEL_DEF
:
2741 if (this_size
> max_size
)
2742 max_size
= this_size
;
2749 xg_is_relaxable_insn (insn
, lateral_steps
)
2753 int steps_taken
= 0;
2754 TransitionTable
*table
= xg_build_widen_table ();
2757 assert (insn
->insn_type
== ITYPE_INSN
);
2758 assert (insn
->opcode
< table
->num_opcodes
);
2760 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
2762 TransitionRule
*rule
= l
->rule
;
2764 if (xg_instruction_matches_rule (insn
, rule
))
2766 if (steps_taken
== lateral_steps
)
2776 get_special_literal_symbol ()
2778 static symbolS
*sym
= NULL
;
2781 sym
= symbol_find_or_make ("SPECIAL_LITERAL0\001");
2787 get_special_label_symbol ()
2789 static symbolS
*sym
= NULL
;
2792 sym
= symbol_find_or_make ("SPECIAL_LABEL0\001");
2797 /* Return true on success. */
2800 xg_build_to_insn (targ
, insn
, bi
)
2808 memset (targ
, 0, sizeof (TInsn
));
2813 targ
->opcode
= bi
->opcode
;
2814 targ
->insn_type
= ITYPE_INSN
;
2815 targ
->is_specific_opcode
= FALSE
;
2817 for (; op
!= NULL
; op
= op
->next
)
2819 int op_num
= op
->op_num
;
2820 int op_data
= op
->op_data
;
2822 assert (op
->op_num
< MAX_INSN_ARGS
);
2824 if (targ
->ntok
<= op_num
)
2825 targ
->ntok
= op_num
+ 1;
2830 set_expr_const (&targ
->tok
[op_num
], op_data
);
2833 assert (op_data
< insn
->ntok
);
2834 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
2837 sym
= get_special_literal_symbol ();
2838 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
2841 sym
= get_special_label_symbol ();
2842 set_expr_symbol_offset (&targ
->tok
[op_num
], sym
, 0);
2845 /* currently handles:
2848 OP_OPERAND_F32MINUS */
2849 if (xg_has_userdef_op_fn (op
->typ
))
2851 assert (op_data
< insn
->ntok
);
2852 if (expr_is_const (&insn
->tok
[op_data
]))
2855 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
2856 val
= xg_apply_userdef_op_fn (op
->typ
,
2859 targ
->tok
[op_num
].X_add_number
= val
;
2862 return FALSE
; /* We cannot use a relocation for this. */
2871 case INSTR_LITERAL_DEF
:
2873 targ
->opcode
= XTENSA_UNDEFINED
;
2874 targ
->insn_type
= ITYPE_LITERAL
;
2875 targ
->is_specific_opcode
= FALSE
;
2876 for (; op
!= NULL
; op
= op
->next
)
2878 int op_num
= op
->op_num
;
2879 int op_data
= op
->op_data
;
2880 assert (op
->op_num
< MAX_INSN_ARGS
);
2882 if (targ
->ntok
<= op_num
)
2883 targ
->ntok
= op_num
+ 1;
2888 assert (op_data
< insn
->ntok
);
2889 copy_expr (&targ
->tok
[op_num
], &insn
->tok
[op_data
]);
2901 case INSTR_LABEL_DEF
:
2903 targ
->opcode
= XTENSA_UNDEFINED
;
2904 targ
->insn_type
= ITYPE_LABEL
;
2905 targ
->is_specific_opcode
= FALSE
;
2906 /* Literal with no ops. is a label? */
2907 assert (op
== NULL
);
2918 /* Return true on success. */
2921 xg_build_to_stack (istack
, insn
, bi
)
2926 for (; bi
!= NULL
; bi
= bi
->next
)
2928 TInsn
*next_insn
= istack_push_space (istack
);
2930 if (!xg_build_to_insn (next_insn
, insn
, bi
))
2937 /* Return true on valid expansion. */
2940 xg_expand_to_stack (istack
, insn
, lateral_steps
)
2945 int stack_size
= istack
->ninsn
;
2946 int steps_taken
= 0;
2947 TransitionTable
*table
= xg_build_widen_table ();
2950 assert (insn
->insn_type
== ITYPE_INSN
);
2951 assert (insn
->opcode
< table
->num_opcodes
);
2953 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
2955 TransitionRule
*rule
= l
->rule
;
2957 if (xg_instruction_matches_rule (insn
, rule
))
2959 if (lateral_steps
== steps_taken
)
2963 /* This is it. Expand the rule to the stack. */
2964 if (!xg_build_to_stack (istack
, insn
, rule
->to_instr
))
2967 /* Check to see if it fits. */
2968 for (i
= stack_size
; i
< istack
->ninsn
; i
++)
2970 TInsn
*insn
= &istack
->insn
[i
];
2972 if (insn
->insn_type
== ITYPE_INSN
2973 && !tinsn_has_symbolic_operands (insn
)
2974 && !xg_immeds_fit (insn
))
2976 istack
->ninsn
= stack_size
;
2990 xg_expand_narrow (targ
, insn
)
2994 TransitionTable
*table
= xg_build_widen_table ();
2997 assert (insn
->insn_type
== ITYPE_INSN
);
2998 assert (insn
->opcode
< table
->num_opcodes
);
3000 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3002 TransitionRule
*rule
= l
->rule
;
3003 if (xg_instruction_matches_rule (insn
, rule
)
3004 && is_unique_insn_expansion (rule
))
3006 /* Is it a larger instruction? */
3007 if (xg_get_insn_size (insn
)
3008 <= xg_get_build_instr_size (rule
->to_instr
))
3010 xg_build_to_insn (targ
, insn
, rule
->to_instr
);
3019 /* Assumes: All immeds are constants. Check that all constants fit
3020 into their immeds; return false if not. */
3023 xg_immeds_fit (insn
)
3029 assert (insn
->insn_type
== ITYPE_INSN
);
3030 for (i
= 0; i
< n
; ++i
)
3032 const expressionS
*expr
= &insn
->tok
[i
];
3033 xtensa_operand opnd
= xtensa_get_operand (xtensa_default_isa
,
3035 if (!operand_is_immed (opnd
))
3043 if (xg_check_operand (expr
->X_add_number
, opnd
))
3048 /* The symbol should have a fixup associated with it. */
3057 /* This should only be called after we have an initial
3058 estimate of the addresses. */
3061 xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3069 offsetT target
, pc
, new_offset
;
3073 assert (insn
->insn_type
== ITYPE_INSN
);
3075 for (i
= 0; i
< n
; ++i
)
3077 const expressionS
*expr
= &insn
->tok
[i
];
3078 xtensa_operand opnd
= xtensa_get_operand (xtensa_default_isa
,
3080 if (!operand_is_immed (opnd
))
3087 if (xg_check_operand (expr
->X_add_number
, opnd
))
3092 /* We only allow symbols for pc-relative stuff.
3093 If pc_frag == 0, then we don't have frag locations yet. */
3097 /* If it is PC-relative and the symbol is in the same segment as
3099 if (!xtensa_operand_isPCRelative (opnd
)
3100 || S_GET_SEGMENT (expr
->X_add_symbol
) != pc_seg
)
3103 symbolP
= expr
->X_add_symbol
;
3104 target
= S_GET_VALUE (symbolP
) + expr
->X_add_number
;
3105 pc
= pc_frag
->fr_address
+ pc_offset
;
3107 /* If frag has yet to be reached on this pass, assume it
3108 will move by STRETCH just as we did. If this is not so,
3109 it will be because some frag between grows, and that will
3110 force another pass. Beware zero-length frags. There
3111 should be a faster way to do this. */
3113 if (stretch
&& is_dnrange (pc_frag
, symbolP
, stretch
))
3116 new_offset
= xtensa_operand_do_reloc (opnd
, target
, pc
);
3117 if (xg_check_operand (new_offset
, opnd
))
3122 /* The symbol should have a fixup associated with it. */
3131 /* This will check to see if the value can be converted into the
3132 operand type. It will return true if it does not fit. */
3135 xg_check_operand (value
, operand
)
3137 xtensa_operand operand
;
3139 uint32 valbuf
= value
;
3140 return (xtensa_operand_encode (operand
, &valbuf
) != xtensa_encode_result_ok
);
3144 /* Check if a symbol is pointing to somewhere after
3145 the start frag, given that the segment has stretched
3146 by stretch during relaxation.
3148 This is more complicated than it might appear at first blush
3149 because of the stretching that goes on. Here is how the check
3152 If the symbol and the frag are in the same segment, then
3153 the symbol could be down range. Note that this function
3154 assumes that start_frag is in now_seg.
3156 If the symbol is pointing to a frag with an address greater than
3157 than the start_frag's address, then it _could_ be down range.
3159 The problem comes because target_frag may or may not have had
3160 stretch bytes added to its address already, depending on if it is
3161 before or after start frag. (And if we knew that, then we wouldn't
3162 need this function.) start_frag has definitely already had stretch
3163 bytes added to its address.
3165 If target_frag's address hasn't been adjusted yet, then to
3166 determine if it comes after start_frag, we need to subtract
3167 stretch from start_frag's address.
3169 If target_frag's address has been adjusted, then it might have
3170 been adjusted such that it comes after start_frag's address minus
3173 So, in that case, we scan for it down stream to within
3174 stretch bytes. We could search to the end of the fr_chain, but
3175 that ends up taking too much time (over a minute on some gnu
3179 is_dnrange (start_frag
, sym
, stretch
)
3184 if (S_GET_SEGMENT (sym
) == now_seg
)
3186 fragS
*cur_frag
= symbol_get_frag (sym
);
3188 if (cur_frag
->fr_address
>= start_frag
->fr_address
- stretch
)
3190 int distance
= stretch
;
3192 while (cur_frag
&& distance
>= 0)
3194 distance
-= cur_frag
->fr_fix
;
3195 if (cur_frag
== start_frag
)
3197 cur_frag
= cur_frag
->fr_next
;
3206 /* Relax the assembly instruction at least "min_steps".
3207 Return the number of steps taken. */
3210 xg_assembly_relax (istack
, insn
, pc_seg
, pc_frag
, pc_offset
, min_steps
,
3215 fragS
*pc_frag
; /* If pc_frag == 0, then no pc-relative. */
3216 offsetT pc_offset
; /* Offset in fragment. */
3217 int min_steps
; /* Minimum number of conversion steps. */
3218 long stretch
; /* Number of bytes stretched so far. */
3220 int steps_taken
= 0;
3222 /* assert (has no symbolic operands)
3223 Some of its immeds don't fit.
3224 Try to build a relaxed version.
3225 This may go through a couple of stages
3226 of single instruction transformations before
3229 TInsn single_target
;
3231 int lateral_steps
= 0;
3232 int istack_size
= istack
->ninsn
;
3234 if (xg_symbolic_immeds_fit (insn
, pc_seg
, pc_frag
, pc_offset
, stretch
)
3235 && steps_taken
>= min_steps
)
3237 istack_push (istack
, insn
);
3240 tinsn_copy (¤t_insn
, insn
);
3242 /* Walk through all of the single instruction expansions. */
3243 while (xg_is_single_relaxable_insn (¤t_insn
))
3245 int error_val
= xg_expand_narrow (&single_target
, ¤t_insn
);
3247 assert (!error_val
);
3249 if (xg_symbolic_immeds_fit (&single_target
, pc_seg
, pc_frag
, pc_offset
,
3253 if (steps_taken
>= min_steps
)
3255 istack_push (istack
, &single_target
);
3259 tinsn_copy (¤t_insn
, &single_target
);
3262 /* Now check for a multi-instruction expansion. */
3263 while (xg_is_relaxable_insn (¤t_insn
, lateral_steps
))
3265 if (xg_symbolic_immeds_fit (¤t_insn
, pc_seg
, pc_frag
, pc_offset
,
3268 if (steps_taken
>= min_steps
)
3270 istack_push (istack
, ¤t_insn
);
3275 if (xg_expand_to_stack (istack
, ¤t_insn
, lateral_steps
))
3277 if (steps_taken
>= min_steps
)
3281 istack
->ninsn
= istack_size
;
3284 /* It's not going to work -- use the original. */
3285 istack_push (istack
, insn
);
3291 xg_force_frag_space (size
)
3294 /* This may have the side effect of creating a new fragment for the
3295 space to go into. I just do not like the name of the "frag"
3302 xg_finish_frag (last_insn
, state
, max_growth
, is_insn
)
3304 enum xtensa_relax_statesE state
;
3306 bfd_boolean is_insn
;
3308 /* Finish off this fragment so that it has at LEAST the desired
3309 max_growth. If it doesn't fit in this fragment, close this one
3310 and start a new one. In either case, return a pointer to the
3311 beginning of the growth area. */
3314 xg_force_frag_space (max_growth
);
3316 old_frag
= frag_now
;
3318 frag_now
->fr_opcode
= last_insn
;
3320 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3322 frag_var (rs_machine_dependent
, max_growth
, max_growth
,
3323 state
, frag_now
->fr_symbol
, frag_now
->fr_offset
, last_insn
);
3325 /* Just to make sure that we did not split it up. */
3326 assert (old_frag
->fr_next
== frag_now
);
3331 is_branch_jmp_to_next (insn
, fragP
)
3335 xtensa_isa isa
= xtensa_default_isa
;
3337 int num_ops
= xtensa_num_operands (isa
, insn
->opcode
);
3342 if (is_loop_opcode (insn
->opcode
))
3345 for (i
= 0; i
< num_ops
; i
++)
3347 xtensa_operand opnd
= xtensa_get_operand (isa
, insn
->opcode
, i
);
3348 char *kind
= xtensa_operand_kind (opnd
);
3349 if (strlen (kind
) == 1 && *kind
== 'l')
3355 if (target_op
== -1)
3358 if (insn
->ntok
<= target_op
)
3361 if (insn
->tok
[target_op
].X_op
!= O_symbol
)
3364 sym
= insn
->tok
[target_op
].X_add_symbol
;
3368 if (insn
->tok
[target_op
].X_add_number
!= 0)
3371 target_frag
= symbol_get_frag (sym
);
3372 if (target_frag
== NULL
)
3375 if (is_next_frag_target (fragP
->fr_next
, target_frag
)
3376 && S_GET_VALUE (sym
) == target_frag
->fr_address
)
3384 xg_add_branch_and_loop_targets (insn
)
3387 xtensa_isa isa
= xtensa_default_isa
;
3388 int num_ops
= xtensa_num_operands (isa
, insn
->opcode
);
3390 if (is_loop_opcode (insn
->opcode
))
3393 xtensa_operand opnd
= xtensa_get_operand (isa
, insn
->opcode
, i
);
3394 char *kind
= xtensa_operand_kind (opnd
);
3395 if (strlen (kind
) == 1 && *kind
== 'l')
3396 if (insn
->tok
[i
].X_op
== O_symbol
)
3397 symbol_get_tc (insn
->tok
[i
].X_add_symbol
)->is_loop_target
= TRUE
;
3401 /* Currently, we do not add branch targets. This is an optimization
3402 for later that tries to align only branch targets, not just any
3403 label in a text section. */
3405 if (align_only_targets
)
3409 for (i
= 0; i
< insn
->ntok
&& i
< num_ops
; i
++)
3411 xtensa_operand opnd
= xtensa_get_operand (isa
, insn
->opcode
, i
);
3412 char *kind
= xtensa_operand_kind (opnd
);
3413 if (strlen (kind
) == 1 && *kind
== 'l'
3414 && insn
->tok
[i
].X_op
== O_symbol
)
3416 symbolS
*sym
= insn
->tok
[i
].X_add_symbol
;
3417 symbol_get_tc (sym
)->is_branch_target
= TRUE
;
3418 if (S_IS_DEFINED (sym
))
3419 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
3426 /* Return the transition rule that matches or NULL if none matches. */
3429 xg_instruction_matches_rule (insn
, rule
)
3431 TransitionRule
*rule
;
3433 PreconditionList
*condition_l
;
3435 if (rule
->opcode
!= insn
->opcode
)
3438 for (condition_l
= rule
->conditions
;
3439 condition_l
!= NULL
;
3440 condition_l
= condition_l
->next
)
3444 Precondition
*cond
= condition_l
->precond
;
3449 /* The expression must be the constant. */
3450 assert (cond
->op_num
< insn
->ntok
);
3451 exp1
= &insn
->tok
[cond
->op_num
];
3452 if (!expr_is_const (exp1
))
3457 if (get_expr_const (exp1
) != cond
->op_data
)
3461 if (get_expr_const (exp1
) == cond
->op_data
)
3468 assert (cond
->op_num
< insn
->ntok
);
3469 assert (cond
->op_data
< insn
->ntok
);
3470 exp1
= &insn
->tok
[cond
->op_num
];
3471 exp2
= &insn
->tok
[cond
->op_data
];
3476 if (!expr_is_equal (exp1
, exp2
))
3480 if (expr_is_equal (exp1
, exp2
))
3497 xg_instruction_match (insn
)
3500 TransitionTable
*table
= xg_build_simplify_table ();
3502 assert (insn
->opcode
< table
->num_opcodes
);
3504 /* Walk through all of the possible transitions. */
3505 for (l
= table
->table
[insn
->opcode
]; l
!= NULL
; l
= l
->next
)
3507 TransitionRule
*rule
= l
->rule
;
3508 if (xg_instruction_matches_rule (insn
, rule
))
3515 /* Return false if no error. */
3518 xg_build_token_insn (instr_spec
, old_insn
, new_insn
)
3519 BuildInstr
*instr_spec
;
3526 switch (instr_spec
->typ
)
3529 new_insn
->insn_type
= ITYPE_INSN
;
3530 new_insn
->opcode
= instr_spec
->opcode
;
3531 new_insn
->is_specific_opcode
= FALSE
;
3533 case INSTR_LITERAL_DEF
:
3534 new_insn
->insn_type
= ITYPE_LITERAL
;
3535 new_insn
->opcode
= XTENSA_UNDEFINED
;
3536 new_insn
->is_specific_opcode
= FALSE
;
3538 case INSTR_LABEL_DEF
:
3539 as_bad (_("INSTR_LABEL_DEF not supported yet"));
3543 for (b_op
= instr_spec
->ops
; b_op
!= NULL
; b_op
= b_op
->next
)
3546 const expressionS
*src_exp
;
3552 /* The expression must be the constant. */
3553 assert (b_op
->op_num
< MAX_INSN_ARGS
);
3554 exp
= &new_insn
->tok
[b_op
->op_num
];
3555 set_expr_const (exp
, b_op
->op_data
);
3559 assert (b_op
->op_num
< MAX_INSN_ARGS
);
3560 assert (b_op
->op_data
< (unsigned) old_insn
->ntok
);
3561 src_exp
= &old_insn
->tok
[b_op
->op_data
];
3562 exp
= &new_insn
->tok
[b_op
->op_num
];
3563 copy_expr (exp
, src_exp
);
3568 as_bad (_("can't handle generation of literal/labels yet"));
3572 as_bad (_("can't handle undefined OP TYPE"));
3577 new_insn
->ntok
= num_ops
;
3582 /* Return true if it was simplified. */
3585 xg_simplify_insn (old_insn
, new_insn
)
3589 TransitionRule
*rule
= xg_instruction_match (old_insn
);
3590 BuildInstr
*insn_spec
;
3594 insn_spec
= rule
->to_instr
;
3595 /* There should only be one. */
3596 assert (insn_spec
!= NULL
);
3597 assert (insn_spec
->next
== NULL
);
3598 if (insn_spec
->next
!= NULL
)
3601 xg_build_token_insn (insn_spec
, old_insn
, new_insn
);
3607 /* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
3608 l32i.n. (2) Check the number of operands. (3) Place the instruction
3609 tokens into the stack or if we can relax it at assembly time, place
3610 multiple instructions/literals onto the stack. Return false if no
3614 xg_expand_assembly_insn (istack
, orig_insn
)
3620 memset (&new_insn
, 0, sizeof (TInsn
));
3622 /* On return, we will be using the "use_tokens" with "use_ntok".
3623 This will reduce things like addi to addi.n. */
3624 if (code_density_available () && !orig_insn
->is_specific_opcode
)
3626 if (xg_simplify_insn (orig_insn
, &new_insn
))
3627 orig_insn
= &new_insn
;
3630 noperands
= xtensa_num_operands (xtensa_default_isa
, orig_insn
->opcode
);
3631 if (orig_insn
->ntok
< noperands
)
3633 as_bad (_("found %d operands for '%s': Expected %d"),
3635 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
3639 if (orig_insn
->ntok
> noperands
)
3640 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
3642 xtensa_opcode_name (xtensa_default_isa
, orig_insn
->opcode
),
3645 /* If there are not enough operands, we will assert above. If there
3646 are too many, just cut out the extras here. */
3648 orig_insn
->ntok
= noperands
;
3652 Instructions with all constant immeds:
3653 Assemble them and relax the instruction if possible.
3654 Give error if not possible; no fixup needed.
3656 Instructions with symbolic immeds:
3657 Assemble them with a Fix up (that may cause instruction expansion).
3658 Also close out the fragment if the fixup may cause instruction expansion.
3660 There are some other special cases where we need alignment.
3661 1) before certain instructions with required alignment (OPCODE_ALIGN)
3662 2) before labels that have jumps (LABEL_ALIGN)
3663 3) after call instructions (RETURN_ALIGN)
3664 Multiple of these may be possible on the same fragment.
3665 If so, make sure to satisfy the required alignment.
3666 Then try to get the desired alignment. */
3668 if (tinsn_has_invalid_symbolic_operands (orig_insn
))
3671 if (orig_insn
->is_specific_opcode
|| !can_relax ())
3673 istack_push (istack
, orig_insn
);
3677 if (tinsn_has_symbolic_operands (orig_insn
))
3679 if (tinsn_has_complex_operands (orig_insn
))
3680 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
3682 istack_push (istack
, orig_insn
);
3686 if (xg_immeds_fit (orig_insn
))
3687 istack_push (istack
, orig_insn
);
3689 xg_assembly_relax (istack
, orig_insn
, 0, 0, 0, 0, 0);
3693 for (i
= 0; i
< istack
->ninsn
; i
++)
3695 if (xg_simplify_insn (&new_insn
, &istack
->insn
[i
]))
3696 istack
->insn
[i
] = new_insn
;
3704 /* Currently all literals that are generated here are 32-bit L32R targets. */
3707 xg_assemble_literal (insn
)
3708 /* const */ TInsn
*insn
;
3711 symbolS
*lit_sym
= NULL
;
3713 /* size = 4 for L32R. It could easily be larger when we move to
3714 larger constants. Add a parameter later. */
3715 offsetT litsize
= 4;
3716 offsetT litalign
= 2; /* 2^2 = 4 */
3717 expressionS saved_loc
;
3718 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
3720 assert (insn
->insn_type
== ITYPE_LITERAL
);
3721 assert (insn
->ntok
= 1); /* must be only one token here */
3723 xtensa_switch_to_literal_fragment (&state
);
3725 /* Force a 4-byte align here. Note that this opens a new frag, so all
3726 literals done with this function have a frag to themselves. That's
3727 important for the way text section literals work. */
3728 frag_align (litalign
, 0, 0);
3730 emit_expr (&insn
->tok
[0], litsize
);
3732 assert (frag_now
->tc_frag_data
.literal_frag
== NULL
);
3733 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
3734 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
3735 lit_sym
= frag_now
->fr_symbol
;
3736 frag_now
->tc_frag_data
.is_literal
= TRUE
;
3739 xtensa_restore_emit_state (&state
);
3745 xg_assemble_literal_space (size
)
3746 /* const */ int size
;
3749 /* We might have to do something about this alignment. It only
3750 takes effect if something is placed here. */
3751 offsetT litalign
= 2; /* 2^2 = 4 */
3752 fragS
*lit_saved_frag
;
3754 expressionS saved_loc
;
3756 assert (size
% 4 == 0);
3757 set_expr_symbol_offset (&saved_loc
, frag_now
->fr_symbol
, frag_now_fix ());
3759 xtensa_switch_to_literal_fragment (&state
);
3761 /* Force a 4-byte align here. */
3762 frag_align (litalign
, 0, 0);
3764 xg_force_frag_space (size
);
3766 lit_saved_frag
= frag_now
;
3767 frag_now
->tc_frag_data
.literal_frag
= get_literal_pool_location (now_seg
);
3768 frag_now
->tc_frag_data
.is_literal
= TRUE
;
3769 frag_now
->fr_symbol
= xtensa_create_literal_symbol (now_seg
, frag_now
);
3770 xg_finish_frag (0, RELAX_LITERAL
, size
, FALSE
);
3773 xtensa_restore_emit_state (&state
);
3774 frag_now
->tc_frag_data
.literal_frag
= lit_saved_frag
;
3779 xtensa_create_literal_symbol (sec
, frag
)
3783 static int lit_num
= 0;
3784 static char name
[256];
3787 sprintf (name
, ".L_lit_sym%d", lit_num
);
3789 /* Create a local symbol. If it is in a linkonce section, we have to
3790 be careful to make sure that if it is used in a relocation that the
3791 symbol will be in the output file. */
3792 if (get_is_linkonce_section (stdoutput
, sec
))
3794 symbolP
= symbol_new (name
, sec
, 0, frag
);
3795 S_CLEAR_EXTERNAL (symbolP
);
3796 /* symbolP->local = 1; */
3799 symbolP
= symbol_new (name
, sec
, 0, frag
);
3801 xtensa_add_literal_sym (symbolP
);
3803 frag
->tc_frag_data
.is_literal
= TRUE
;
3810 xtensa_add_literal_sym (sym
)
3815 l
= (sym_list
*) xmalloc (sizeof (sym_list
));
3817 l
->next
= literal_syms
;
3823 xtensa_add_insn_label (sym
)
3828 if (!free_insn_labels
)
3829 l
= (sym_list
*) xmalloc (sizeof (sym_list
));
3832 l
= free_insn_labels
;
3833 free_insn_labels
= l
->next
;
3837 l
->next
= insn_labels
;
3843 xtensa_clear_insn_labels (void)
3847 for (pl
= &free_insn_labels
; *pl
!= NULL
; pl
= &(*pl
)->next
)
3854 /* Return true if the section flags are marked linkonce
3855 or the name is .gnu.linkonce*. */
3858 get_is_linkonce_section (abfd
, sec
)
3859 bfd
*abfd ATTRIBUTE_UNUSED
;
3862 flagword flags
, link_once_flags
;
3864 flags
= bfd_get_section_flags (abfd
, sec
);
3865 link_once_flags
= (flags
& SEC_LINK_ONCE
);
3867 /* Flags might not be set yet. */
3868 if (!link_once_flags
)
3870 static size_t len
= sizeof ".gnu.linkonce.t.";
3872 if (strncmp (segment_name (sec
), ".gnu.linkonce.t.", len
- 1) == 0)
3873 link_once_flags
= SEC_LINK_ONCE
;
3875 return (link_once_flags
!= 0);
3879 /* Emit an instruction to the current fragment. If record_fix is true,
3880 then this instruction will not change and we can go ahead and record
3881 the fixup. If record_fix is false, then the instruction may change
3882 and we are going to close out this fragment. Go ahead and set the
3883 fr_symbol and fr_offset instead of adding a fixup. */
3886 xg_emit_insn (t_insn
, record_fix
)
3888 bfd_boolean record_fix
;
3890 bfd_boolean ok
= TRUE
;
3891 xtensa_isa isa
= xtensa_default_isa
;
3892 xtensa_opcode opcode
= t_insn
->opcode
;
3893 bfd_boolean has_fixup
= FALSE
;
3899 static xtensa_insnbuf insnbuf
= NULL
;
3901 /* Use a static pointer to the insn buffer so we don't have to call
3902 malloc each time through. */
3904 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
3906 has_fixup
= tinsn_to_insnbuf (t_insn
, insnbuf
);
3908 noperands
= xtensa_num_operands (isa
, opcode
);
3909 assert (noperands
== t_insn
->ntok
);
3911 byte_count
= xtensa_insn_length (isa
, opcode
);
3913 /* This should NEVER cause us to jump into a new frag;
3914 we've already reserved space. */
3915 old_size
= frag_now_fix ();
3916 f
= frag_more (byte_count
);
3917 assert (oldfrag
== frag_now
);
3919 /* This needs to generate a record that lists the parts that are
3921 if (!frag_now
->tc_frag_data
.is_insn
)
3923 /* If we are at the beginning of a fragment, switch this
3924 fragment to an instruction fragment. */
3925 if (now_seg
!= absolute_section
&& old_size
!= 0)
3926 as_warn (_("instruction fragment may contain data"));
3927 frag_now
->tc_frag_data
.is_insn
= TRUE
;
3930 xtensa_insnbuf_to_chars (isa
, insnbuf
, f
);
3932 /* Now spit out the opcode fixup.... */
3936 for (i
= 0; i
< noperands
; ++i
)
3938 expressionS
*expr
= &t_insn
->tok
[i
];
3942 if (get_relaxable_immed (opcode
) == i
)
3946 if (!xg_add_opcode_fix (opcode
, i
, expr
, frag_now
,
3947 f
- frag_now
->fr_literal
))
3952 /* Write it to the fr_offset, fr_symbol. */
3953 frag_now
->fr_symbol
= expr
->X_add_symbol
;
3954 frag_now
->fr_offset
= expr
->X_add_number
;
3959 as_bad (_("invalid operand %d on '%s'"),
3960 i
, xtensa_opcode_name (isa
, opcode
));
3970 as_bad (_("invalid expression for operand %d on '%s'"),
3971 i
, xtensa_opcode_name (isa
, opcode
));
3982 xg_emit_insn_to_buf (t_insn
, buf
, fragP
, offset
, build_fix
)
3987 bfd_boolean build_fix
;
3989 static xtensa_insnbuf insnbuf
= NULL
;
3990 bfd_boolean has_symbolic_immed
= FALSE
;
3991 bfd_boolean ok
= TRUE
;
3993 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
3995 has_symbolic_immed
= tinsn_to_insnbuf (t_insn
, insnbuf
);
3996 if (has_symbolic_immed
&& build_fix
)
3999 int opnum
= get_relaxable_immed (t_insn
->opcode
);
4000 expressionS
*exp
= &t_insn
->tok
[opnum
];
4002 if (!xg_add_opcode_fix (t_insn
->opcode
,
4003 opnum
, exp
, fragP
, offset
))
4006 fragP
->tc_frag_data
.is_insn
= TRUE
;
4007 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
, buf
);
4012 /* Put in a fixup record based on the opcode.
4013 Return true on success. */
4016 xg_add_opcode_fix (opcode
, opnum
, expr
, fragP
, offset
)
4017 xtensa_opcode opcode
;
4023 bfd_reloc_code_real_type reloc
;
4024 reloc_howto_type
*howto
;
4028 reloc
= opnum_to_reloc (opnum
);
4029 if (reloc
== BFD_RELOC_NONE
)
4031 as_bad (_("invalid relocation operand %i on '%s'"),
4032 opnum
, xtensa_opcode_name (xtensa_default_isa
, opcode
));
4036 howto
= bfd_reloc_type_lookup (stdoutput
, reloc
);
4040 as_bad (_("undefined symbol for opcode \"%s\"."),
4041 xtensa_opcode_name (xtensa_default_isa
, opcode
));
4045 insn_length
= xtensa_insn_length (xtensa_default_isa
, opcode
);
4046 the_fix
= fix_new_exp (fragP
, offset
, insn_length
, expr
,
4047 howto
->pc_relative
, reloc
);
4049 if (expr
->X_add_symbol
&&
4050 (S_IS_EXTERNAL (expr
->X_add_symbol
) || S_IS_WEAK (expr
->X_add_symbol
)))
4051 the_fix
->fx_plt
= TRUE
;
4058 xg_resolve_literals (insn
, lit_sym
)
4062 symbolS
*sym
= get_special_literal_symbol ();
4066 assert (insn
->insn_type
== ITYPE_INSN
);
4067 for (i
= 0; i
< insn
->ntok
; i
++)
4068 if (insn
->tok
[i
].X_add_symbol
== sym
)
4069 insn
->tok
[i
].X_add_symbol
= lit_sym
;
4075 xg_resolve_labels (insn
, label_sym
)
4079 symbolS
*sym
= get_special_label_symbol ();
4081 /* assert(!insn->is_literal); */
4082 for (i
= 0; i
< insn
->ntok
; i
++)
4083 if (insn
->tok
[i
].X_add_symbol
== sym
)
4084 insn
->tok
[i
].X_add_symbol
= label_sym
;
4090 xg_assemble_tokens (insn
)
4091 /*const */ TInsn
*insn
;
4093 /* By the time we get here, there's not too much left to do.
4094 1) Check our assumptions.
4095 2) Check if the current instruction is "narrow".
4096 If so, then finish the frag, create another one.
4097 We could also go back to change some previous
4098 "narrow" frags into no-change ones if we have more than
4099 MAX_NARROW_ALIGNMENT of them without alignment restrictions
4103 1) It has constant operands and doesn't fit.
4104 Go ahead and assemble it so it will fail.
4105 2) It has constant operands that fit.
4106 If narrow and !is_specific_opcode,
4107 assemble it and put in a relocation
4110 3) It has a symbolic immediate operand
4111 a) Find the worst-case relaxation required
4112 b) Find the worst-case literal pool space required.
4113 Insert appropriate alignment & space in the literal.
4115 Add the relocation. */
4117 assert (insn
->insn_type
== ITYPE_INSN
);
4119 if (!tinsn_has_symbolic_operands (insn
))
4121 if (xg_is_narrow_insn (insn
) && !insn
->is_specific_opcode
)
4123 /* assemble it but add max required space */
4124 int max_size
= xg_get_max_narrow_insn_size (insn
->opcode
);
4125 int min_size
= xg_get_insn_size (insn
);
4127 assert (max_size
== 3);
4128 /* make sure we have enough space to widen it */
4129 xg_force_frag_space (max_size
);
4130 /* Output the instruction. It may cause an error if some
4131 operands do not fit. */
4132 last_insn
= frag_more (0);
4133 if (xg_emit_insn (insn
, TRUE
))
4134 as_warn (_("instruction with constant operands does not fit"));
4135 xg_finish_frag (last_insn
, RELAX_NARROW
, max_size
- min_size
, TRUE
);
4139 /* Assemble it. No relocation needed. */
4140 int max_size
= xg_get_insn_size (insn
);
4141 xg_force_frag_space (max_size
);
4142 if (xg_emit_insn (insn
, FALSE
))
4143 as_warn (_("instruction with constant operands does not "
4144 "fit without widening"));
4145 /* frag_more (max_size); */
4147 /* Special case for jx. If the jx is the next to last
4148 instruction in a loop, we will add a NOP after it. This
4149 avoids a hardware issue that could occur if the jx jumped
4150 to the next instruction. */
4151 if (software_avoid_b_j_loop_end
4152 && is_jx_opcode (insn
->opcode
))
4154 maybe_has_b_j_loop_end
= TRUE
;
4155 /* add 2 of these */
4156 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4157 frag_var (rs_machine_dependent
, 4, 4,
4158 RELAX_ADD_NOP_IF_PRE_LOOP_END
,
4159 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4165 /* Need to assemble it with space for the relocation. */
4166 if (!insn
->is_specific_opcode
)
4168 /* Assemble it but add max required space. */
4170 int min_size
= xg_get_insn_size (insn
);
4171 int max_size
= xg_get_max_insn_widen_size (insn
->opcode
);
4172 int max_literal_size
=
4173 xg_get_max_insn_widen_literal_size (insn
->opcode
);
4176 symbolS
*immed_sym
= xg_get_insn_immed_symbol (insn
);
4177 set_frag_segment (frag_now
, now_seg
);
4180 /* Make sure we have enough space to widen the instruction.
4181 This may open a new fragment. */
4182 xg_force_frag_space (max_size
);
4183 if (max_literal_size
!= 0)
4184 xg_assemble_literal_space (max_literal_size
);
4186 /* Output the instruction. It may cause an error if some
4187 operands do not fit. Emit the incomplete instruction. */
4188 last_insn
= frag_more (0);
4189 xg_emit_insn (insn
, FALSE
);
4191 xg_finish_frag (last_insn
, RELAX_IMMED
, max_size
- min_size
, TRUE
);
4193 /* Special cases for loops:
4194 close_loop_end should be inserted AFTER short_loop.
4195 Make sure that CLOSE loops are processed BEFORE short_loops
4196 when converting them. */
4198 /* "short_loop": add a NOP if the loop is < 4 bytes. */
4199 if (software_avoid_short_loop
4200 && is_loop_opcode (insn
->opcode
))
4202 maybe_has_short_loop
= TRUE
;
4203 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4204 frag_var (rs_machine_dependent
, 4, 4,
4205 RELAX_ADD_NOP_IF_SHORT_LOOP
,
4206 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4207 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4208 frag_var (rs_machine_dependent
, 4, 4,
4209 RELAX_ADD_NOP_IF_SHORT_LOOP
,
4210 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4213 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
4214 loop at least 12 bytes away from another loop's loop
4216 if (software_avoid_close_loop_end
4217 && is_loop_opcode (insn
->opcode
))
4219 maybe_has_close_loop_end
= TRUE
;
4220 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4221 frag_var (rs_machine_dependent
, 12, 12,
4222 RELAX_ADD_NOP_IF_CLOSE_LOOP_END
,
4223 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4228 /* Assemble it in place. No expansion will be required,
4229 but we'll still need a relocation record. */
4230 int max_size
= xg_get_insn_size (insn
);
4231 xg_force_frag_space (max_size
);
4232 if (xg_emit_insn (insn
, TRUE
))
4233 as_warn (_("instruction's constant operands do not fit"));
4239 /* Return true if the instruction can write to the specified
4240 integer register. */
4243 is_register_writer (insn
, regset
, regnum
)
4250 xtensa_isa isa
= xtensa_default_isa
;
4252 num_ops
= xtensa_num_operands (isa
, insn
->opcode
);
4254 for (i
= 0; i
< num_ops
; i
++)
4256 xtensa_operand operand
= xtensa_get_operand (isa
, insn
->opcode
, i
);
4257 char inout
= xtensa_operand_inout (operand
);
4259 if (inout
== '>' || inout
== '=')
4261 if (strcmp (xtensa_operand_kind (operand
), regset
) == 0)
4263 if ((insn
->tok
[i
].X_op
== O_register
)
4264 && (insn
->tok
[i
].X_add_number
== regnum
))
4274 is_bad_loopend_opcode (tinsn
)
4275 const TInsn
* tinsn
;
4277 xtensa_opcode opcode
= tinsn
->opcode
;
4279 if (opcode
== XTENSA_UNDEFINED
)
4282 if (opcode
== xtensa_call0_opcode
4283 || opcode
== xtensa_callx0_opcode
4284 || opcode
== xtensa_call4_opcode
4285 || opcode
== xtensa_callx4_opcode
4286 || opcode
== xtensa_call8_opcode
4287 || opcode
== xtensa_callx8_opcode
4288 || opcode
== xtensa_call12_opcode
4289 || opcode
== xtensa_callx12_opcode
4290 || opcode
== xtensa_isync_opcode
4291 || opcode
== xtensa_ret_opcode
4292 || opcode
== xtensa_ret_n_opcode
4293 || opcode
== xtensa_retw_opcode
4294 || opcode
== xtensa_retw_n_opcode
4295 || opcode
== xtensa_waiti_opcode
)
4298 /* An RSR of LCOUNT is illegal as the last opcode in a loop. */
4299 if (opcode
== xtensa_rsr_opcode
4301 && tinsn
->tok
[1].X_op
== O_constant
4302 && tinsn
->tok
[1].X_add_number
== 2)
4309 /* Labels that begin with ".Ln" or ".LM" are unaligned.
4310 This allows the debugger to add unaligned labels.
4311 Also, the assembler generates stabs labels that need
4312 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4315 is_unaligned_label (sym
)
4318 const char *name
= S_GET_NAME (sym
);
4319 static size_t fake_size
= 0;
4323 && name
[1] == 'L' && (name
[2] == 'n' || name
[2] == 'M'))
4326 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4328 fake_size
= strlen (FAKE_LABEL_NAME
);
4331 && strncmp (FAKE_LABEL_NAME
, name
, fake_size
) == 0
4332 && (name
[fake_size
] == 'F'
4333 || name
[fake_size
] == 'L'
4334 || (name
[fake_size
] == 'e'
4335 && strncmp ("endfunc", name
+fake_size
, 7) == 0)))
4343 next_non_empty_frag (fragP
)
4346 fragS
*next_fragP
= fragP
->fr_next
;
4348 /* Sometimes an empty will end up here due storage allocation issues.
4349 So we have to skip until we find something legit. */
4350 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4351 next_fragP
= next_fragP
->fr_next
;
4353 if (next_fragP
== NULL
|| next_fragP
->fr_fix
== 0)
4361 next_frag_opcode (fragP
)
4362 const fragS
* fragP
;
4364 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
4365 static xtensa_insnbuf insnbuf
= NULL
;
4366 xtensa_isa isa
= xtensa_default_isa
;
4369 insnbuf
= xtensa_insnbuf_alloc (isa
);
4371 if (next_fragP
== NULL
)
4372 return XTENSA_UNDEFINED
;
4374 xtensa_insnbuf_from_chars (isa
, insnbuf
, next_fragP
->fr_literal
);
4375 return xtensa_decode_insn (isa
, insnbuf
);
4379 /* Return true if the target frag is one of the next non-empty frags. */
4382 is_next_frag_target (fragP
, target
)
4384 const fragS
*target
;
4389 for (; fragP
; fragP
= fragP
->fr_next
)
4391 if (fragP
== target
)
4393 if (fragP
->fr_fix
!= 0)
4395 if (fragP
->fr_type
== rs_fill
&& fragP
->fr_offset
!= 0)
4397 if ((fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
4398 && ((fragP
->fr_address
% (1 << fragP
->fr_offset
)) != 0))
4400 if (fragP
->fr_type
== rs_space
)
4407 /* If the next legit fragment is an end-of-loop marker,
4408 switch its state so it will instantiate a NOP. */
4411 update_next_frag_nop_state (fragP
)
4414 fragS
*next_fragP
= fragP
->fr_next
;
4416 while (next_fragP
&& next_fragP
->fr_fix
== 0)
4418 if (next_fragP
->fr_type
== rs_machine_dependent
4419 && next_fragP
->fr_subtype
== RELAX_LOOP_END
)
4421 next_fragP
->fr_subtype
= RELAX_LOOP_END_ADD_NOP
;
4424 next_fragP
= next_fragP
->fr_next
;
4430 next_frag_is_branch_target (fragP
)
4433 /* Sometimes an empty will end up here due storage allocation issues,
4434 so we have to skip until we find something legit. */
4435 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4437 if (fragP
->tc_frag_data
.is_branch_target
)
4439 if (fragP
->fr_fix
!= 0)
4447 next_frag_is_loop_target (fragP
)
4450 /* Sometimes an empty will end up here due storage allocation issues.
4451 So we have to skip until we find something legit. */
4452 for (fragP
= fragP
->fr_next
; fragP
; fragP
= fragP
->fr_next
)
4454 if (fragP
->tc_frag_data
.is_loop_target
)
4456 if (fragP
->fr_fix
!= 0)
4464 next_frag_pre_opcode_bytes (fragp
)
4467 const fragS
*next_fragp
= fragp
->fr_next
;
4469 xtensa_opcode next_opcode
= next_frag_opcode (fragp
);
4470 if (!is_loop_opcode (next_opcode
))
4473 /* Sometimes an empty will end up here due storage allocation issues.
4474 So we have to skip until we find something legit. */
4475 while (next_fragp
->fr_fix
== 0)
4476 next_fragp
= next_fragp
->fr_next
;
4478 if (next_fragp
->fr_type
!= rs_machine_dependent
)
4481 /* There is some implicit knowledge encoded in here.
4482 The LOOP instructions that are NOT RELAX_IMMED have
4484 if (next_fragp
->fr_subtype
> RELAX_IMMED
)
4485 return get_expanded_loop_offset (next_opcode
);
4491 /* Mark a location where we can later insert literal frags. Update
4492 the section's literal_pool_loc, so subsequent literals can be
4493 placed nearest to their use. */
4496 xtensa_mark_literal_pool_location ()
4498 /* Any labels pointing to the current location need
4499 to be adjusted to after the literal pool. */
4501 fragS
*pool_location
;
4503 frag_align (2, 0, 0);
4505 /* We stash info in the fr_var of these frags
4506 so we can later move the literal's fixes into this
4507 frchain's fix list. We can use fr_var because fr_var's
4508 interpretation depends solely on the fr_type and subtype. */
4509 pool_location
= frag_now
;
4510 frag_variant (rs_machine_dependent
, 0, (int) frchain_now
,
4511 RELAX_LITERAL_POOL_BEGIN
, NULL
, 0, NULL
);
4512 frag_variant (rs_machine_dependent
, 0, (int) now_seg
,
4513 RELAX_LITERAL_POOL_END
, NULL
, 0, NULL
);
4515 /* Now put a frag into the literal pool that points to this location. */
4516 set_literal_pool_location (now_seg
, pool_location
);
4517 xtensa_switch_to_literal_fragment (&s
);
4519 /* Close whatever frag is there. */
4520 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4521 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
4522 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
4523 xtensa_restore_emit_state (&s
);
4527 /* The "loops_ok" argument is provided to allow ignoring labels that
4528 define loop ends. This fixes a bug where the NOPs to align a
4529 loop opcode were included in a previous zero-cost loop:
4548 This argument is used to prevent moving the NOP to before the
4549 loop-end label, which is what you want in this special case. */
4552 xtensa_move_labels (new_frag
, new_offset
, loops_ok
)
4555 bfd_boolean loops_ok
;
4559 for (lit
= insn_labels
; lit
; lit
= lit
->next
)
4561 symbolS
*lit_sym
= lit
->sym
;
4562 if (loops_ok
|| symbol_get_tc (lit_sym
)->is_loop_target
== 0)
4564 S_SET_VALUE (lit_sym
, new_offset
);
4565 symbol_set_frag (lit_sym
, new_frag
);
4571 /* Assemble a NOP of the requested size in the buffer. User must have
4572 allocated "buf" with at least "size" bytes. */
4575 assemble_nop (size
, buf
)
4579 static xtensa_insnbuf insnbuf
= NULL
;
4582 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
4584 tinsn_init (&t_insn
);
4588 t_insn
.opcode
= xtensa_nop_n_opcode
;
4590 if (t_insn
.opcode
== XTENSA_UNDEFINED
)
4591 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4592 tinsn_to_insnbuf (&t_insn
, insnbuf
);
4593 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
, buf
);
4597 t_insn
.opcode
= xtensa_or_opcode
;
4598 assert (t_insn
.opcode
!= XTENSA_UNDEFINED
);
4599 if (t_insn
.opcode
== XTENSA_UNDEFINED
)
4600 as_fatal (_("opcode 'OR' unavailable in this configuration"));
4601 set_expr_const (&t_insn
.tok
[0], 1);
4602 set_expr_const (&t_insn
.tok
[1], 1);
4603 set_expr_const (&t_insn
.tok
[2], 1);
4605 tinsn_to_insnbuf (&t_insn
, insnbuf
);
4606 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
, buf
);
4610 as_fatal (_("invalid %d-byte NOP requested"), size
);
4615 /* Return the number of bytes for the offset of the expanded loop
4616 instruction. This should be incorporated into the relaxation
4617 specification but is hard-coded here. This is used to auto-align
4618 the loop instruction. It is invalid to call this function if the
4619 configuration does not have loops or if the opcode is not a loop
4623 get_expanded_loop_offset (opcode
)
4624 xtensa_opcode opcode
;
4626 /* This is the OFFSET of the loop instruction in the expanded loop.
4627 This MUST correspond directly to the specification of the loop
4628 expansion. It will be validated on fragment conversion. */
4629 if (opcode
== XTENSA_UNDEFINED
)
4630 as_fatal (_("get_expanded_loop_offset: undefined opcode"));
4631 if (opcode
== xtensa_loop_opcode
)
4633 if (opcode
== xtensa_loopnez_opcode
)
4635 if (opcode
== xtensa_loopgtz_opcode
)
4637 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4643 get_literal_pool_location (seg
)
4646 return seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
;
4651 set_literal_pool_location (seg
, literal_pool_loc
)
4653 fragS
*literal_pool_loc
;
4655 seg_info (seg
)->tc_segment_info_data
.literal_pool_loc
= literal_pool_loc
;
4659 /* External Functions and Other GAS Hooks. */
4662 xtensa_target_format ()
4664 return (target_big_endian
? "elf32-xtensa-be" : "elf32-xtensa-le");
4669 xtensa_file_arch_init (abfd
)
4672 bfd_set_private_flags (abfd
, 0x100 | 0x200);
4677 md_number_to_chars (buf
, val
, n
)
4682 if (target_big_endian
)
4683 number_to_chars_bigendian (buf
, val
, n
);
4685 number_to_chars_littleendian (buf
, val
, n
);
4689 /* This function is called once, at assembler startup time. It should
4690 set up all the tables, etc. that the MD part of the assembler will
4696 segT current_section
= now_seg
;
4697 int current_subsec
= now_subseg
;
4701 isa
= xtensa_isa_init ();
4703 /* ISA was already initialized by xtensa_init(). */
4704 isa
= xtensa_default_isa
;
4707 /* Set up the .literal, .fini.literal and .init.literal sections. */
4708 memset (&default_lit_sections
, 0, sizeof (default_lit_sections
));
4709 default_lit_sections
.init_lit_seg_name
= INIT_LITERAL_SECTION_NAME
;
4710 default_lit_sections
.fini_lit_seg_name
= FINI_LITERAL_SECTION_NAME
;
4711 default_lit_sections
.lit_seg_name
= LITERAL_SECTION_NAME
;
4713 subseg_set (current_section
, current_subsec
);
4715 xtensa_addi_opcode
= xtensa_opcode_lookup (isa
, "addi");
4716 xtensa_addmi_opcode
= xtensa_opcode_lookup (isa
, "addmi");
4717 xtensa_call0_opcode
= xtensa_opcode_lookup (isa
, "call0");
4718 xtensa_call4_opcode
= xtensa_opcode_lookup (isa
, "call4");
4719 xtensa_call8_opcode
= xtensa_opcode_lookup (isa
, "call8");
4720 xtensa_call12_opcode
= xtensa_opcode_lookup (isa
, "call12");
4721 xtensa_callx0_opcode
= xtensa_opcode_lookup (isa
, "callx0");
4722 xtensa_callx4_opcode
= xtensa_opcode_lookup (isa
, "callx4");
4723 xtensa_callx8_opcode
= xtensa_opcode_lookup (isa
, "callx8");
4724 xtensa_callx12_opcode
= xtensa_opcode_lookup (isa
, "callx12");
4725 xtensa_entry_opcode
= xtensa_opcode_lookup (isa
, "entry");
4726 xtensa_isync_opcode
= xtensa_opcode_lookup (isa
, "isync");
4727 xtensa_j_opcode
= xtensa_opcode_lookup (isa
, "j");
4728 xtensa_jx_opcode
= xtensa_opcode_lookup (isa
, "jx");
4729 xtensa_loop_opcode
= xtensa_opcode_lookup (isa
, "loop");
4730 xtensa_loopnez_opcode
= xtensa_opcode_lookup (isa
, "loopnez");
4731 xtensa_loopgtz_opcode
= xtensa_opcode_lookup (isa
, "loopgtz");
4732 xtensa_nop_n_opcode
= xtensa_opcode_lookup (isa
, "nop.n");
4733 xtensa_or_opcode
= xtensa_opcode_lookup (isa
, "or");
4734 xtensa_ret_opcode
= xtensa_opcode_lookup (isa
, "ret");
4735 xtensa_ret_n_opcode
= xtensa_opcode_lookup (isa
, "ret.n");
4736 xtensa_retw_opcode
= xtensa_opcode_lookup (isa
, "retw");
4737 xtensa_retw_n_opcode
= xtensa_opcode_lookup (isa
, "retw.n");
4738 xtensa_rsr_opcode
= xtensa_opcode_lookup (isa
, "rsr");
4739 xtensa_waiti_opcode
= xtensa_opcode_lookup (isa
, "waiti");
4743 /* tc_frob_label hook */
4746 xtensa_frob_label (sym
)
4749 if (generating_literals
)
4750 xtensa_add_literal_sym (sym
);
4752 xtensa_add_insn_label (sym
);
4754 if (symbol_get_tc (sym
)->is_loop_target
4755 && (get_last_insn_flags (now_seg
, now_subseg
)
4756 & FLAG_IS_BAD_LOOPEND
) != 0)
4757 as_bad (_("invalid last instruction for a zero-overhead loop"));
4759 /* No target aligning in the absolute section. */
4760 if (now_seg
!= absolute_section
4762 && !is_unaligned_label (sym
)
4763 && !frag_now
->tc_frag_data
.is_literal
)
4765 /* frag_now->tc_frag_data.is_insn = TRUE; */
4766 frag_var (rs_machine_dependent
, 4, 4,
4767 RELAX_DESIRE_ALIGN_IF_TARGET
,
4768 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4769 xtensa_move_labels (frag_now
, 0, TRUE
);
4771 /* If the label is already known to be a branch target, i.e., a
4772 forward branch, mark the frag accordingly. Backward branches
4773 are handled by xg_add_branch_and_loop_targets. */
4774 if (symbol_get_tc (sym
)->is_branch_target
)
4775 symbol_get_frag (sym
)->tc_frag_data
.is_branch_target
= TRUE
;
4777 /* Loops only go forward, so they can be identified here. */
4778 if (symbol_get_tc (sym
)->is_loop_target
)
4779 symbol_get_frag (sym
)->tc_frag_data
.is_loop_target
= TRUE
;
4784 /* md_flush_pending_output hook */
4787 xtensa_flush_pending_output ()
4789 /* If there is a non-zero instruction fragment, close it. */
4790 if (frag_now_fix () != 0 && frag_now
->tc_frag_data
.is_insn
)
4792 frag_wane (frag_now
);
4795 frag_now
->tc_frag_data
.is_insn
= FALSE
;
4797 xtensa_clear_insn_labels ();
4805 xtensa_isa isa
= xtensa_default_isa
;
4808 bfd_boolean has_underbar
= FALSE
;
4809 char *arg_strings
[MAX_INSN_ARGS
];
4811 IStack istack
; /* Put instructions into here. */
4812 TInsn orig_insn
; /* Original instruction from the input. */
4814 symbolS
*lit_sym
= NULL
;
4816 if (frag_now
->tc_frag_data
.is_literal
)
4818 static bfd_boolean reported
= 0;
4820 as_bad (_("cannot assemble '%s' into a literal fragment"), str
);
4827 istack_init (&istack
);
4828 tinsn_init (&orig_insn
);
4830 /* Split off the opcode. */
4831 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
4832 opname
= xmalloc (opnamelen
+ 1);
4833 memcpy (opname
, str
, opnamelen
);
4834 opname
[opnamelen
] = '\0';
4836 num_args
= tokenize_arguments (arg_strings
, str
+ opnamelen
);
4839 as_bad (_("syntax error"));
4843 if (xg_translate_idioms (&opname
, &num_args
, arg_strings
))
4846 /* Check for an underbar prefix. */
4849 has_underbar
= TRUE
;
4853 orig_insn
.insn_type
= ITYPE_INSN
;
4855 orig_insn
.is_specific_opcode
= (has_underbar
|| !use_generics ());
4856 specific_opcode
= orig_insn
.is_specific_opcode
;
4858 orig_insn
.opcode
= xtensa_opcode_lookup (isa
, opname
);
4859 if (orig_insn
.opcode
== XTENSA_UNDEFINED
)
4861 as_bad (_("unknown opcode %s"), opname
);
4865 if (frag_now_fix () != 0 && !frag_now
->tc_frag_data
.is_insn
)
4867 frag_wane (frag_now
);
4871 if (software_a0_b_retw_interlock
)
4873 if ((get_last_insn_flags (now_seg
, now_subseg
) & FLAG_IS_A0_WRITER
) != 0
4874 && is_conditional_branch_opcode (orig_insn
.opcode
))
4876 has_a0_b_retw
= TRUE
;
4878 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
4879 After the first assembly pass we will check all of them and
4880 add a nop if needed. */
4881 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4882 frag_var (rs_machine_dependent
, 4, 4,
4883 RELAX_ADD_NOP_IF_A0_B_RETW
,
4884 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4885 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4886 frag_var (rs_machine_dependent
, 4, 4,
4887 RELAX_ADD_NOP_IF_A0_B_RETW
,
4888 frag_now
->fr_symbol
, frag_now
->fr_offset
, NULL
);
4892 /* Special case: The call instructions should be marked "specific opcode"
4893 to keep them from expanding. */
4894 if (!use_longcalls () && is_direct_call_opcode (orig_insn
.opcode
))
4895 orig_insn
.is_specific_opcode
= TRUE
;
4897 /* Parse the arguments. */
4898 if (parse_arguments (&orig_insn
, num_args
, arg_strings
))
4900 as_bad (_("syntax error"));
4904 /* Free the opcode and argument strings, now that they've been parsed. */
4905 free (has_underbar
? opname
- 1 : opname
);
4907 while (num_args
-- > 0)
4908 free (arg_strings
[num_args
]);
4910 /* Check for the right number and type of arguments. */
4911 if (tinsn_check_arguments (&orig_insn
))
4914 /* See if the instruction implies an aligned section. */
4915 if (is_entry_opcode (orig_insn
.opcode
) || is_loop_opcode (orig_insn
.opcode
))
4916 record_alignment (now_seg
, 2);
4918 xg_add_branch_and_loop_targets (&orig_insn
);
4920 /* Special cases for instructions that force an alignment... */
4921 if (!orig_insn
.is_specific_opcode
&& is_loop_opcode (orig_insn
.opcode
))
4925 frag_now
->tc_frag_data
.is_insn
= TRUE
;
4926 frag_now
->tc_frag_data
.is_no_density
= !code_density_available ();
4927 max_fill
= get_text_align_max_fill_size
4928 (get_text_align_power (XTENSA_FETCH_WIDTH
),
4929 TRUE
, frag_now
->tc_frag_data
.is_no_density
);
4930 frag_var (rs_machine_dependent
, max_fill
, max_fill
,
4931 RELAX_ALIGN_NEXT_OPCODE
, frag_now
->fr_symbol
,
4932 frag_now
->fr_offset
, NULL
);
4934 xtensa_move_labels (frag_now
, 0, FALSE
);
4937 /* Special-case for "entry" instruction. */
4938 if (is_entry_opcode (orig_insn
.opcode
))
4940 /* Check that the second opcode (#1) is >= 16. */
4941 if (orig_insn
.ntok
>= 2)
4943 expressionS
*exp
= &orig_insn
.tok
[1];
4947 if (exp
->X_add_number
< 16)
4948 as_warn (_("entry instruction with stack decrement < 16"));
4952 as_warn (_("entry instruction with non-constant decrement"));
4956 if (!orig_insn
.is_specific_opcode
)
4958 xtensa_mark_literal_pool_location ();
4960 /* Automatically align ENTRY instructions. */
4961 xtensa_move_labels (frag_now
, 0, TRUE
);
4962 frag_align (2, 0, 0);
4966 /* Any extra alignment frags have been inserted now, and we're about to
4967 emit a new instruction so clear the list of labels. */
4968 xtensa_clear_insn_labels ();
4970 if (software_a0_b_retw_interlock
)
4971 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_A0_WRITER
,
4972 is_register_writer (&orig_insn
, "a", 0));
4974 set_last_insn_flags (now_seg
, now_subseg
, FLAG_IS_BAD_LOOPEND
,
4975 is_bad_loopend_opcode (&orig_insn
));
4978 assemble_tokens (opcode, tok, ntok);
4979 expand the tokens from the orig_insn into the
4980 stack of instructions that will not expand
4981 unless required at relaxation time. */
4982 if (xg_expand_assembly_insn (&istack
, &orig_insn
))
4985 for (i
= 0; i
< istack
.ninsn
; i
++)
4987 TInsn
*insn
= &istack
.insn
[i
];
4988 if (insn
->insn_type
== ITYPE_LITERAL
)
4990 assert (lit_sym
== NULL
);
4991 lit_sym
= xg_assemble_literal (insn
);
4996 xg_resolve_literals (insn
, lit_sym
);
4997 xg_assemble_tokens (insn
);
5001 /* Now, if the original opcode was a call... */
5002 if (align_targets
&& is_call_opcode (orig_insn
.opcode
))
5004 frag_now
->tc_frag_data
.is_insn
= TRUE
;
5005 frag_var (rs_machine_dependent
, 4, 4,
5007 frag_now
->fr_symbol
,
5008 frag_now
->fr_offset
,
5014 /* TC_CONS_FIX_NEW hook: Check for "@PLT" suffix on symbol references.
5015 If found, use an XTENSA_PLT reloc for 4-byte values. Otherwise, this
5016 is the same as the standard code in read.c. */
5019 xtensa_cons_fix_new (frag
, where
, size
, exp
)
5025 bfd_reloc_code_real_type r
;
5026 bfd_boolean plt
= FALSE
;
5028 if (*input_line_pointer
== '@')
5030 if (!strncmp (input_line_pointer
, PLT_SUFFIX
, strlen (PLT_SUFFIX
) - 1)
5031 && !strncmp (input_line_pointer
, plt_suffix
,
5032 strlen (plt_suffix
) - 1))
5034 as_bad (_("undefined @ suffix '%s', expected '%s'"),
5035 input_line_pointer
, plt_suffix
);
5036 ignore_rest_of_line ();
5040 input_line_pointer
+= strlen (plt_suffix
);
5053 r
= plt
? BFD_RELOC_XTENSA_PLT
: BFD_RELOC_32
;
5059 as_bad (_("unsupported BFD relocation size %u"), size
);
5063 fix_new_exp (frag
, where
, size
, exp
, 0, r
);
5067 /* TC_FRAG_INIT hook */
5070 xtensa_frag_init (frag
)
5073 frag
->tc_frag_data
.is_no_density
= !code_density_available ();
5078 md_undefined_symbol (name
)
5079 char *name ATTRIBUTE_UNUSED
;
5085 /* Round up a section size to the appropriate boundary. */
5088 md_section_align (segment
, size
)
5089 segT segment ATTRIBUTE_UNUSED
;
5092 return size
; /* Byte alignment is fine. */
5097 md_pcrel_from (fixP
)
5101 static xtensa_insnbuf insnbuf
= NULL
;
5103 xtensa_operand operand
;
5104 xtensa_opcode opcode
;
5105 xtensa_isa isa
= xtensa_default_isa
;
5106 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
5111 if (fixP
->fx_r_type
== BFD_RELOC_XTENSA_ASM_EXPAND
)
5115 insnbuf
= xtensa_insnbuf_alloc (isa
);
5117 insn_p
= &fixP
->fx_frag
->fr_literal
[fixP
->fx_where
];
5118 xtensa_insnbuf_from_chars (isa
, insnbuf
, insn_p
);
5119 opcode
= xtensa_decode_insn (isa
, insnbuf
);
5121 opnum
= reloc_to_opnum (fixP
->fx_r_type
);
5124 as_fatal (_("invalid operand relocation for '%s' instruction"),
5125 xtensa_opcode_name (isa
, opcode
));
5126 if (opnum
>= xtensa_num_operands (isa
, opcode
))
5127 as_fatal (_("invalid relocation for operand %d in '%s' instruction"),
5128 opnum
, xtensa_opcode_name (isa
, opcode
));
5129 operand
= xtensa_get_operand (isa
, opcode
, opnum
);
5132 as_warn_where (fixP
->fx_file
,
5134 _("invalid relocation type %d for %s instruction"),
5135 fixP
->fx_r_type
, xtensa_opcode_name (isa
, opcode
));
5139 if (!operand_is_pcrel_label (operand
))
5141 as_bad_where (fixP
->fx_file
,
5143 _("invalid relocation for operand %d of '%s'"),
5144 opnum
, xtensa_opcode_name (isa
, opcode
));
5147 if (!xtensa_operand_isPCRelative (operand
))
5149 as_warn_where (fixP
->fx_file
,
5151 _("non-PCREL relocation operand %d for '%s': %s"),
5152 opnum
, xtensa_opcode_name (isa
, opcode
),
5153 bfd_get_reloc_code_name (fixP
->fx_r_type
));
5157 return 0 - xtensa_operand_do_reloc (operand
, 0, addr
);
5161 /* tc_symbol_new_hook */
5164 xtensa_symbol_new_hook (symbolP
)
5167 symbol_get_tc (symbolP
)->plt
= 0;
5171 /* tc_fix_adjustable hook */
5174 xtensa_fix_adjustable (fixP
)
5177 /* We need the symbol name for the VTABLE entries. */
5178 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
5179 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
5187 md_apply_fix3 (fixP
, valP
, seg
)
5190 segT seg ATTRIBUTE_UNUSED
;
5192 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
5194 /* This happens when the relocation is within the current section.
5195 It seems this implies a PCREL operation. We'll catch it and error
5198 char *const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
5199 static xtensa_insnbuf insnbuf
= NULL
;
5200 xtensa_opcode opcode
;
5203 switch (fixP
->fx_r_type
)
5205 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5209 case BFD_RELOC_XTENSA_ASM_SIMPLIFY
:
5210 as_bad (_("unhandled local relocation fix %s"),
5211 bfd_get_reloc_code_name (fixP
->fx_r_type
));
5217 /* The only one we support that isn't an instruction field. */
5218 md_number_to_chars (fixpos
, *valP
, fixP
->fx_size
);
5222 case BFD_RELOC_XTENSA_OP0
:
5223 case BFD_RELOC_XTENSA_OP1
:
5224 case BFD_RELOC_XTENSA_OP2
:
5225 isa
= xtensa_default_isa
;
5227 insnbuf
= xtensa_insnbuf_alloc (isa
);
5229 xtensa_insnbuf_from_chars (isa
, insnbuf
, fixpos
);
5230 opcode
= xtensa_decode_insn (isa
, insnbuf
);
5231 if (opcode
== XTENSA_UNDEFINED
)
5232 as_fatal (_("undecodable FIX"));
5234 xtensa_insnbuf_set_immediate_field (opcode
, insnbuf
, *valP
,
5235 fixP
->fx_file
, fixP
->fx_line
);
5237 fixP
->fx_frag
->tc_frag_data
.is_insn
= TRUE
;
5238 xtensa_insnbuf_to_chars (isa
, insnbuf
, fixpos
);
5242 case BFD_RELOC_VTABLE_INHERIT
:
5243 case BFD_RELOC_VTABLE_ENTRY
:
5248 as_bad (_("unhandled local relocation fix %s"),
5249 bfd_get_reloc_code_name (fixP
->fx_r_type
));
5256 md_atof (type
, litP
, sizeP
)
5262 LITTLENUM_TYPE words
[4];
5278 return "bad call to md_atof";
5281 t
= atof_ieee (input_line_pointer
, type
, words
);
5283 input_line_pointer
= t
;
5287 for (i
= prec
- 1; i
>= 0; i
--)
5290 if (target_big_endian
)
5291 idx
= (prec
- 1 - i
);
5293 md_number_to_chars (litP
, (valueT
) words
[idx
], 2);
5302 md_estimate_size_before_relax (fragP
, seg
)
5304 segT seg ATTRIBUTE_UNUSED
;
5306 return fragP
->tc_frag_data
.text_expansion
;
5310 /* Translate internal representation of relocation info to BFD target
5314 tc_gen_reloc (section
, fixp
)
5315 asection
*section ATTRIBUTE_UNUSED
;
5320 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
5321 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
5322 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
5323 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
5325 /* Make sure none of our internal relocations make it this far.
5326 They'd better have been fully resolved by this point. */
5327 assert ((int) fixp
->fx_r_type
> 0);
5329 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
5330 if (reloc
->howto
== NULL
)
5332 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
5333 _("cannot represent `%s' relocation in object file"),
5334 bfd_get_reloc_code_name (fixp
->fx_r_type
));
5338 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
5340 as_fatal (_("internal error? cannot generate `%s' relocation"),
5341 bfd_get_reloc_code_name (fixp
->fx_r_type
));
5343 assert (!fixp
->fx_pcrel
== !reloc
->howto
->pc_relative
);
5345 reloc
->addend
= fixp
->fx_offset
;
5347 switch (fixp
->fx_r_type
)
5349 case BFD_RELOC_XTENSA_OP0
:
5350 case BFD_RELOC_XTENSA_OP1
:
5351 case BFD_RELOC_XTENSA_OP2
:
5352 case BFD_RELOC_XTENSA_ASM_EXPAND
:
5354 case BFD_RELOC_XTENSA_PLT
:
5355 case BFD_RELOC_VTABLE_INHERIT
:
5356 case BFD_RELOC_VTABLE_ENTRY
:
5359 case BFD_RELOC_XTENSA_ASM_SIMPLIFY
:
5360 as_warn (_("emitting simplification relocation"));
5364 as_warn (_("emitting unknown relocation"));
5374 directive_balance ();
5375 xtensa_move_literals ();
5377 xtensa_reorder_segments ();
5378 xtensa_cleanup_align_frags ();
5379 xtensa_fix_target_frags ();
5380 if (software_a0_b_retw_interlock
&& has_a0_b_retw
)
5381 xtensa_fix_a0_b_retw_frags ();
5382 if (software_avoid_b_j_loop_end
&& maybe_has_b_j_loop_end
)
5383 xtensa_fix_b_j_loop_end_frags ();
5385 /* "close_loop_end" should be processed BEFORE "short_loop". */
5386 if (software_avoid_close_loop_end
&& maybe_has_close_loop_end
)
5387 xtensa_fix_close_loop_end_frags ();
5389 if (software_avoid_short_loop
&& maybe_has_short_loop
)
5390 xtensa_fix_short_loop_frags ();
5392 xtensa_sanity_check ();
5397 xtensa_cleanup_align_frags ()
5401 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5405 /* Walk over all of the fragments in a subsection. */
5406 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5408 if ((fragP
->fr_type
== rs_align
5409 || fragP
->fr_type
== rs_align_code
5410 || (fragP
->fr_type
== rs_machine_dependent
5411 && (fragP
->fr_subtype
== RELAX_DESIRE_ALIGN
5412 || fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)))
5413 && fragP
->fr_fix
== 0)
5415 fragS
* next
= fragP
->fr_next
;
5418 && next
->fr_type
== rs_machine_dependent
5419 && next
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
5422 next
= next
->fr_next
;
5430 /* Re-process all of the fragments looking to convert all of the
5431 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
5432 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
5433 If the next fragment starts with a loop target, AND the previous
5434 fragment can be expanded to negate the branch, convert this to a
5435 RELAX_LOOP_END. Otherwise, convert to a .fill 0. */
5438 xtensa_fix_target_frags ()
5442 /* When this routine is called, all of the subsections are still intact
5443 so we walk over subsections instead of sections. */
5444 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5446 bfd_boolean prev_frag_can_negate_branch
= FALSE
;
5449 /* Walk over all of the fragments in a subsection. */
5450 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5452 if (fragP
->fr_type
== rs_machine_dependent
5453 && fragP
->fr_subtype
== RELAX_DESIRE_ALIGN_IF_TARGET
)
5455 if (next_frag_is_loop_target (fragP
))
5457 if (prev_frag_can_negate_branch
)
5458 fragP
->fr_subtype
= RELAX_LOOP_END
;
5461 if (!align_only_targets
||
5462 next_frag_is_branch_target (fragP
))
5463 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
5468 else if (!align_only_targets
5469 || next_frag_is_branch_target (fragP
))
5470 fragP
->fr_subtype
= RELAX_DESIRE_ALIGN
;
5474 if (fragP
->fr_fix
!= 0)
5475 prev_frag_can_negate_branch
= FALSE
;
5476 if (frag_can_negate_branch (fragP
))
5477 prev_frag_can_negate_branch
= TRUE
;
5484 frag_can_negate_branch (fragP
)
5487 if (fragP
->fr_type
== rs_machine_dependent
5488 && fragP
->fr_subtype
== RELAX_IMMED
)
5491 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
5492 if (is_negatable_branch (&t_insn
))
5499 /* Re-process all of the fragments looking to convert all of the
5500 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
5501 conditional branch or a retw/retw.n, convert this frag to one that
5502 will generate a NOP. In any case close it off with a .fill 0. */
5505 xtensa_fix_a0_b_retw_frags ()
5509 /* When this routine is called, all of the subsections are still intact
5510 so we walk over subsections instead of sections. */
5511 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5515 /* Walk over all of the fragments in a subsection. */
5516 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5518 if (fragP
->fr_type
== rs_machine_dependent
5519 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_A0_B_RETW
)
5521 if (next_instrs_are_b_retw (fragP
))
5522 relax_frag_add_nop (fragP
);
5532 next_instrs_are_b_retw (fragP
)
5535 xtensa_opcode opcode
;
5536 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
5537 static xtensa_insnbuf insnbuf
= NULL
;
5538 xtensa_isa isa
= xtensa_default_isa
;
5542 insnbuf
= xtensa_insnbuf_alloc (isa
);
5544 if (next_fragP
== NULL
)
5547 /* Check for the conditional branch. */
5548 xtensa_insnbuf_from_chars (isa
, insnbuf
, &next_fragP
->fr_literal
[offset
]);
5549 opcode
= xtensa_decode_insn (isa
, insnbuf
);
5551 if (!is_conditional_branch_opcode (opcode
))
5554 offset
+= xtensa_insn_length (isa
, opcode
);
5555 if (offset
== next_fragP
->fr_fix
)
5557 next_fragP
= next_non_empty_frag (next_fragP
);
5560 if (next_fragP
== NULL
)
5563 /* Check for the retw/retw.n. */
5564 xtensa_insnbuf_from_chars (isa
, insnbuf
, &next_fragP
->fr_literal
[offset
]);
5565 opcode
= xtensa_decode_insn (isa
, insnbuf
);
5567 if (is_windowed_return_opcode (opcode
))
5573 /* Re-process all of the fragments looking to convert all of the
5574 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
5575 loop end label, convert this frag to one that will generate a NOP.
5576 In any case close it off with a .fill 0. */
5579 xtensa_fix_b_j_loop_end_frags ()
5583 /* When this routine is called, all of the subsections are still intact
5584 so we walk over subsections instead of sections. */
5585 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5589 /* Walk over all of the fragments in a subsection. */
5590 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5592 if (fragP
->fr_type
== rs_machine_dependent
5593 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_PRE_LOOP_END
)
5595 if (next_instr_is_loop_end (fragP
))
5596 relax_frag_add_nop (fragP
);
5606 next_instr_is_loop_end (fragP
)
5609 const fragS
*next_fragP
;
5611 if (next_frag_is_loop_target (fragP
))
5614 next_fragP
= next_non_empty_frag (fragP
);
5615 if (next_fragP
== NULL
)
5618 if (!next_frag_is_loop_target (next_fragP
))
5621 /* If the size is >= 3 then there is more than one instruction here.
5622 The hardware bug will not fire. */
5623 if (next_fragP
->fr_fix
> 3)
5630 /* Re-process all of the fragments looking to convert all of the
5631 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
5632 not MY loop's loop end within 12 bytes, add enough nops here to
5633 make it at least 12 bytes away. In any case close it off with a
5637 xtensa_fix_close_loop_end_frags ()
5641 /* When this routine is called, all of the subsections are still intact
5642 so we walk over subsections instead of sections. */
5643 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5647 fragS
*current_target
= NULL
;
5648 offsetT current_offset
= 0;
5650 /* Walk over all of the fragments in a subsection. */
5651 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5653 if (fragP
->fr_type
== rs_machine_dependent
5654 && fragP
->fr_subtype
== RELAX_IMMED
)
5656 /* Read it. If the instruction is a loop, get the target. */
5657 xtensa_opcode opcode
= get_opcode_from_buf (fragP
->fr_opcode
);
5658 if (is_loop_opcode (opcode
))
5662 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
5663 tinsn_immed_from_frag (&t_insn
, fragP
);
5665 /* Get the current fragment target. */
5666 if (fragP
->fr_symbol
)
5668 current_target
= symbol_get_frag (fragP
->fr_symbol
);
5669 current_offset
= fragP
->fr_offset
;
5675 && fragP
->fr_type
== rs_machine_dependent
5676 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_CLOSE_LOOP_END
)
5679 size_t bytes_added
= 0;
5681 #define REQUIRED_LOOP_DIVIDING_BYTES 12
5682 /* Max out at 12. */
5683 min_bytes
= min_bytes_to_other_loop_end
5684 (fragP
->fr_next
, current_target
, current_offset
,
5685 REQUIRED_LOOP_DIVIDING_BYTES
);
5687 if (min_bytes
< REQUIRED_LOOP_DIVIDING_BYTES
)
5689 while (min_bytes
+ bytes_added
5690 < REQUIRED_LOOP_DIVIDING_BYTES
)
5694 if (fragP
->fr_var
< length
)
5695 as_warn (_("fr_var %lu < length %d; ignoring"),
5696 fragP
->fr_var
, length
);
5699 assemble_nop (length
,
5700 fragP
->fr_literal
+ fragP
->fr_fix
);
5701 fragP
->fr_fix
+= length
;
5702 fragP
->fr_var
-= length
;
5704 bytes_added
+= length
;
5715 min_bytes_to_other_loop_end (fragP
, current_target
, current_offset
, max_size
)
5717 fragS
*current_target
;
5718 offsetT current_offset
;
5722 fragS
*current_fragP
;
5724 for (current_fragP
= fragP
;
5726 current_fragP
= current_fragP
->fr_next
)
5728 if (current_fragP
->tc_frag_data
.is_loop_target
5729 && current_fragP
!= current_target
)
5730 return offset
+ current_offset
;
5732 offset
+= unrelaxed_frag_min_size (current_fragP
);
5734 if (offset
+ current_offset
>= max_size
)
5742 unrelaxed_frag_min_size (fragP
)
5745 size_t size
= fragP
->fr_fix
;
5748 if (fragP
->fr_type
== rs_fill
)
5749 size
+= fragP
->fr_offset
;
5755 /* Re-process all of the fragments looking to convert all
5756 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
5759 1) the instruction size count to the loop end label
5760 is too short (<= 2 instructions),
5761 2) loop has a jump or branch in it
5764 1) software_avoid_all_short_loops is true
5765 2) The generating loop was a 'loopgtz' or 'loopnez'
5766 3) the instruction size count to the loop end label is too short
5768 then convert this frag (and maybe the next one) to generate a NOP.
5769 In any case close it off with a .fill 0. */
5772 xtensa_fix_short_loop_frags ()
5776 /* When this routine is called, all of the subsections are still intact
5777 so we walk over subsections instead of sections. */
5778 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5781 fragS
*current_target
= NULL
;
5782 offsetT current_offset
= 0;
5783 xtensa_opcode current_opcode
= XTENSA_UNDEFINED
;
5785 /* Walk over all of the fragments in a subsection. */
5786 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5788 /* check on the current loop */
5789 if (fragP
->fr_type
== rs_machine_dependent
5790 && fragP
->fr_subtype
== RELAX_IMMED
)
5792 /* Read it. If the instruction is a loop, get the target. */
5793 xtensa_opcode opcode
= get_opcode_from_buf (fragP
->fr_opcode
);
5794 if (is_loop_opcode (opcode
))
5798 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
5799 tinsn_immed_from_frag (&t_insn
, fragP
);
5801 /* Get the current fragment target. */
5802 if (fragP
->fr_symbol
)
5804 current_target
= symbol_get_frag (fragP
->fr_symbol
);
5805 current_offset
= fragP
->fr_offset
;
5806 current_opcode
= opcode
;
5811 if (fragP
->fr_type
== rs_machine_dependent
5812 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
5815 count_insns_to_loop_end (fragP
->fr_next
, TRUE
, 3);
5817 && (branch_before_loop_end (fragP
->fr_next
)
5818 || (software_avoid_all_short_loops
5819 && current_opcode
!= XTENSA_UNDEFINED
5820 && !is_the_loop_opcode (current_opcode
))))
5821 relax_frag_add_nop (fragP
);
5831 count_insns_to_loop_end (base_fragP
, count_relax_add
, max_count
)
5833 bfd_boolean count_relax_add
;
5836 fragS
*fragP
= NULL
;
5837 size_t insn_count
= 0;
5841 for (; fragP
&& !fragP
->tc_frag_data
.is_loop_target
; fragP
= fragP
->fr_next
)
5843 insn_count
+= unrelaxed_frag_min_insn_count (fragP
);
5844 if (insn_count
>= max_count
)
5847 if (count_relax_add
)
5849 if (fragP
->fr_type
== rs_machine_dependent
5850 && fragP
->fr_subtype
== RELAX_ADD_NOP_IF_SHORT_LOOP
)
5852 /* In order to add the appropriate number of
5853 NOPs, we count an instruction for downstream
5856 if (insn_count
>= max_count
)
5866 unrelaxed_frag_min_insn_count (fragP
)
5869 size_t insn_count
= 0;
5872 if (!fragP
->tc_frag_data
.is_insn
)
5875 /* Decode the fixed instructions. */
5876 while (offset
< fragP
->fr_fix
)
5878 xtensa_opcode opcode
= get_opcode_from_buf (fragP
->fr_literal
+ offset
);
5879 if (opcode
== XTENSA_UNDEFINED
)
5881 as_fatal (_("undecodable instruction in instruction frag"));
5884 offset
+= xtensa_insn_length (xtensa_default_isa
, opcode
);
5893 branch_before_loop_end (base_fragP
)
5898 for (fragP
= base_fragP
;
5899 fragP
&& !fragP
->tc_frag_data
.is_loop_target
;
5900 fragP
= fragP
->fr_next
)
5902 if (unrelaxed_frag_has_b_j (fragP
))
5910 unrelaxed_frag_has_b_j (fragP
)
5913 size_t insn_count
= 0;
5916 if (!fragP
->tc_frag_data
.is_insn
)
5919 /* Decode the fixed instructions. */
5920 while (offset
< fragP
->fr_fix
)
5922 xtensa_opcode opcode
= get_opcode_from_buf (fragP
->fr_literal
+ offset
);
5923 if (opcode
== XTENSA_UNDEFINED
)
5925 as_fatal (_("undecodable instruction in instruction frag"));
5928 if (is_branch_or_jump_opcode (opcode
))
5930 offset
+= xtensa_insn_length (xtensa_default_isa
, opcode
);
5936 /* Checks to be made after initial assembly but before relaxation. */
5939 xtensa_sanity_check ()
5946 as_where (&file_name
, &line
);
5947 for (frchP
= frchain_root
; frchP
; frchP
= frchP
->frch_next
)
5951 /* Walk over all of the fragments in a subsection. */
5952 for (fragP
= frchP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
5954 /* Currently we only check for empty loops here. */
5955 if (fragP
->fr_type
== rs_machine_dependent
5956 && fragP
->fr_subtype
== RELAX_IMMED
)
5958 static xtensa_insnbuf insnbuf
= NULL
;
5961 if (fragP
->fr_opcode
!= NULL
)
5964 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
5965 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
5966 tinsn_immed_from_frag (&t_insn
, fragP
);
5968 if (is_loop_opcode (t_insn
.opcode
))
5970 if (is_empty_loop (&t_insn
, fragP
))
5972 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
5973 as_bad (_("invalid empty loop"));
5975 if (!is_local_forward_loop (&t_insn
, fragP
))
5977 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
5978 as_bad (_("loop target does not follow "
5979 "loop instruction in section"));
5986 new_logical_line (file_name
, line
);
5990 #define LOOP_IMMED_OPN 1
5992 /* Return true if the loop target is the next non-zero fragment. */
5995 is_empty_loop (insn
, fragP
)
5999 const expressionS
*expr
;
6003 if (insn
->insn_type
!= ITYPE_INSN
)
6006 if (!is_loop_opcode (insn
->opcode
))
6009 if (insn
->ntok
<= LOOP_IMMED_OPN
)
6012 expr
= &insn
->tok
[LOOP_IMMED_OPN
];
6014 if (expr
->X_op
!= O_symbol
)
6017 symbolP
= expr
->X_add_symbol
;
6021 if (symbol_get_frag (symbolP
) == NULL
)
6024 if (S_GET_VALUE (symbolP
) != 0)
6027 /* Walk through the zero-size fragments from this one. If we find
6028 the target fragment, then this is a zero-size loop. */
6029 for (next_fragP
= fragP
->fr_next
;
6031 next_fragP
= next_fragP
->fr_next
)
6033 if (next_fragP
== symbol_get_frag (symbolP
))
6035 if (next_fragP
->fr_fix
!= 0)
6043 is_local_forward_loop (insn
, fragP
)
6047 const expressionS
*expr
;
6051 if (insn
->insn_type
!= ITYPE_INSN
)
6054 if (!is_loop_opcode (insn
->opcode
))
6057 if (insn
->ntok
<= LOOP_IMMED_OPN
)
6060 expr
= &insn
->tok
[LOOP_IMMED_OPN
];
6062 if (expr
->X_op
!= O_symbol
)
6065 symbolP
= expr
->X_add_symbol
;
6069 if (symbol_get_frag (symbolP
) == NULL
)
6072 /* Walk through fragments until we find the target.
6073 If we do not find the target, then this is an invalid loop. */
6074 for (next_fragP
= fragP
->fr_next
;
6076 next_fragP
= next_fragP
->fr_next
)
6077 if (next_fragP
== symbol_get_frag (symbolP
))
6084 /* Alignment Functions. */
6087 get_text_align_power (target_size
)
6091 for (i
= 0; i
< sizeof (size_t); i
++)
6093 if (target_size
<= (1 << i
))
6096 as_fatal (_("get_text_align_power: argument too large"));
6102 get_text_align_max_fill_size (align_pow
, use_nops
, use_no_density
)
6104 bfd_boolean use_nops
;
6105 bfd_boolean use_no_density
;
6108 return (1 << align_pow
);
6110 return 3 * (1 << align_pow
);
6112 return 1 + (1 << align_pow
);
6116 /* get_text_align_fill_size ()
6120 target_size = size of next instruction
6121 align_pow = get_text_align_power (target_size).
6125 address = current address + loop instruction size;
6126 target_size = 3 (for 2 or 3 byte target)
6127 = 8 (for 8 byte target)
6128 align_pow = get_text_align_power (target_size);
6130 use_no_density = set appropriately
6132 address = current address + loop instruction size;
6134 align_pow = get_text_align_power (target_size);
6136 use_no_density = 0. */
6139 get_text_align_fill_size (address
, align_pow
, target_size
,
6140 use_nops
, use_no_density
)
6144 bfd_boolean use_nops
;
6145 bfd_boolean use_no_density
;
6149 align_pow: log2 (required alignment).
6151 target_size: alignment must allow the new_address and
6152 new_address+target_size-1.
6154 use_nops: if true, then we can only use 2 or 3 byte nops.
6156 use_no_density: if use_nops and use_no_density, we can only use
6159 Usually, for non-zero target_size, the align_pow is the power of 2
6160 that is greater than or equal to the target_size. This handles the
6161 2-byte, 3-byte and 8-byte instructions. */
6163 size_t alignment
= (1 << align_pow
);
6166 /* This is the easy case. */
6168 mod
= address
% alignment
;
6170 mod
= alignment
- mod
;
6171 assert ((address
+ mod
) % alignment
== 0);
6175 /* This is the slightly harder case. */
6176 assert ((int) alignment
>= target_size
);
6177 assert (target_size
> 0);
6178 if (!use_no_density
)
6181 for (i
= 0; i
< alignment
* 2; i
++)
6185 if ((address
+ i
) >> align_pow
==
6186 (address
+ i
+ target_size
- 1) >> align_pow
)
6194 /* Can only fill multiples of 3. */
6195 for (i
= 0; i
<= alignment
* 3; i
+= 3)
6197 if ((address
+ i
) >> align_pow
==
6198 (address
+ i
+ target_size
- 1) >> align_pow
)
6207 /* This will assert if it is not possible. */
6210 get_text_align_nop_count (fill_size
, use_no_density
)
6212 bfd_boolean use_no_density
;
6217 assert (fill_size
% 3 == 0);
6218 return (fill_size
/ 3);
6221 assert (fill_size
!= 1); /* Bad argument. */
6223 while (fill_size
> 1)
6225 size_t insn_size
= 3;
6226 if (fill_size
== 2 || fill_size
== 4)
6228 fill_size
-= insn_size
;
6231 assert (fill_size
!= 1); /* Bad algorithm. */
6237 get_text_align_nth_nop_size (fill_size
, n
, use_no_density
)
6240 bfd_boolean use_no_density
;
6244 assert (get_text_align_nop_count (fill_size
, use_no_density
) > n
);
6249 while (fill_size
> 1)
6251 size_t insn_size
= 3;
6252 if (fill_size
== 2 || fill_size
== 4)
6254 fill_size
-= insn_size
;
6264 /* For the given fragment, find the appropriate address
6265 for it to begin at if we are using NOPs to align it. */
6268 get_noop_aligned_address (fragP
, address
)
6272 static xtensa_insnbuf insnbuf
= NULL
;
6273 size_t fill_size
= 0;
6276 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6278 switch (fragP
->fr_type
)
6280 case rs_machine_dependent
:
6281 if (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
6283 /* The rule is: get next fragment's FIRST instruction. Find
6284 the smallest number of bytes that need to be added to
6285 ensure that the next fragment's FIRST instruction will fit
6288 E.G., 2 bytes : 0, 1, 2 mod 4
6291 If the FIRST instruction MIGHT be relaxed,
6292 assume that it will become a 3 byte instruction. */
6294 int target_insn_size
;
6295 xtensa_opcode opcode
= next_frag_opcode (fragP
);
6296 addressT pre_opcode_bytes
;
6298 if (opcode
== XTENSA_UNDEFINED
)
6300 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6301 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6302 as_fatal (_("cannot continue"));
6305 target_insn_size
= xtensa_insn_length (xtensa_default_isa
, opcode
);
6307 pre_opcode_bytes
= next_frag_pre_opcode_bytes (fragP
);
6309 if (is_loop_opcode (opcode
))
6311 /* next_fragP should be the loop. */
6312 const fragS
*next_fragP
= next_non_empty_frag (fragP
);
6313 xtensa_opcode next_opcode
= next_frag_opcode (next_fragP
);
6316 pre_opcode_bytes
+= target_insn_size
;
6318 /* For loops, the alignment depends on the size of the
6319 instruction following the loop, not the loop instruction. */
6320 if (next_opcode
== XTENSA_UNDEFINED
)
6321 target_insn_size
= 3;
6325 xtensa_insn_length (xtensa_default_isa
, next_opcode
);
6327 if (target_insn_size
== 2)
6328 target_insn_size
= 3; /* ISA specifies this. */
6331 /* If it was 8, then we'll need a larger alignment
6333 alignment
= get_text_align_power (target_insn_size
);
6335 /* Is Now_seg valid */
6336 record_alignment (now_seg
, alignment
);
6339 as_fatal (_("expected loop opcode in relax align next target"));
6341 fill_size
= get_text_align_fill_size
6342 (address
+ pre_opcode_bytes
,
6343 get_text_align_power (target_insn_size
),
6344 target_insn_size
, TRUE
, fragP
->tc_frag_data
.is_no_density
);
6350 fill_size
= get_text_align_fill_size
6351 (address
, fragP
->fr_offset
, 1, TRUE
,
6352 fragP
->tc_frag_data
.is_no_density
);
6356 as_fatal (_("expected align_code or RELAX_ALIGN_NEXT_OPCODE"));
6359 return address
+ fill_size
;
6363 /* 3 mechanisms for relaxing an alignment:
6365 Align to a power of 2.
6366 Align so the next fragment's instruction does not cross a word boundary.
6367 Align the current instruction so that if the next instruction
6368 were 3 bytes, it would not cross a word boundary.
6372 zeros - This is easy; always insert zeros.
6373 nops - 3 and 2 byte instructions
6377 >=5 : 3 byte instruction + fn(n-3)
6378 widening - widen previous instructions. */
6381 get_widen_aligned_address (fragP
, address
)
6385 addressT align_pow
, new_address
, loop_insn_offset
;
6388 xtensa_opcode opcode
, next_opcode
;
6389 static xtensa_insnbuf insnbuf
= NULL
;
6392 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6394 if (fragP
->fr_type
== rs_align
|| fragP
->fr_type
== rs_align_code
)
6396 align_pow
= fragP
->fr_offset
;
6397 new_address
= ((address
+ ((1 << align_pow
) - 1))
6398 << align_pow
) >> align_pow
;
6402 if (fragP
->fr_type
== rs_machine_dependent
)
6404 switch (fragP
->fr_subtype
)
6406 case RELAX_DESIRE_ALIGN
:
6408 /* The rule is: get the next fragment's FIRST instruction.
6409 Find the smallest number of bytes needed to be added
6410 in order to ensure that the next fragment is FIRST
6411 instruction will fit in a single word.
6412 i.e. 2 bytes : 0, 1, 2. mod 4
6414 If the FIRST instruction MIGHT be relaxed,
6415 assume that it will become a 3-byte instruction. */
6418 /* Check to see if it might be 2 bytes. */
6419 next_opcode
= next_frag_opcode (fragP
);
6420 if (next_opcode
!= XTENSA_UNDEFINED
6421 && xtensa_insn_length (xtensa_default_isa
, next_opcode
) == 2)
6424 assert (insn_size
<= 4);
6425 for (new_address
= address
; new_address
< address
+ 4; new_address
++)
6427 if (new_address
>> 2 == (new_address
+ insn_size
- 1) >> 2)
6430 as_bad (_("internal error aligning"));
6433 case RELAX_ALIGN_NEXT_OPCODE
:
6434 /* The rule is: get next fragment's FIRST instruction.
6435 Find the smallest number of bytes needed to be added
6436 in order to ensure that the next fragment's FIRST
6437 instruction will fit in a single word.
6438 i.e. 2 bytes : 0, 1, 2. mod 4
6440 If the FIRST instruction MIGHT be relaxed,
6441 assume that it will become a 3 byte instruction. */
6443 opcode
= next_frag_opcode (fragP
);
6444 if (opcode
== XTENSA_UNDEFINED
)
6446 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
6447 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6448 as_fatal (_("cannot continue"));
6450 insn_size
= xtensa_insn_length (xtensa_default_isa
, opcode
);
6451 assert (insn_size
<= 4);
6452 assert (is_loop_opcode (opcode
));
6454 loop_insn_offset
= 0;
6455 next_frag
= next_non_empty_frag (fragP
);
6457 /* If the loop has been expanded then the loop
6458 instruction could be at an offset from this fragment. */
6459 if (next_frag
->fr_subtype
!= RELAX_IMMED
)
6460 loop_insn_offset
= get_expanded_loop_offset (opcode
);
6462 for (new_address
= address
; new_address
< address
+ 4; new_address
++)
6464 if ((new_address
+ loop_insn_offset
+ insn_size
) >> 2 ==
6465 (new_address
+ loop_insn_offset
+ insn_size
+ 2) >> 2)
6468 as_bad (_("internal error aligning"));
6472 as_bad (_("internal error aligning"));
6476 as_bad (_("internal error aligning"));
6481 /* md_relax_frag Hook and Helper Functions. */
6483 /* Return the number of bytes added to this fragment, given that the
6484 input has been stretched already by "stretch". */
6487 xtensa_relax_frag (fragP
, stretch
, stretched_p
)
6492 int unreported
= fragP
->tc_frag_data
.unreported_expansion
;
6493 long new_stretch
= 0;
6497 as_where (&file_name
, &line
);
6498 new_logical_line (fragP
->fr_file
, fragP
->fr_line
);
6500 fragP
->tc_frag_data
.unreported_expansion
= 0;
6502 switch (fragP
->fr_subtype
)
6504 case RELAX_ALIGN_NEXT_OPCODE
:
6505 /* Always convert. */
6506 new_stretch
= relax_frag_text_align (fragP
, stretch
);
6509 case RELAX_LOOP_END
:
6513 case RELAX_LOOP_END_ADD_NOP
:
6514 /* Add a NOP and switch to .fill 0. */
6515 new_stretch
= relax_frag_add_nop (fragP
);
6518 case RELAX_DESIRE_ALIGN
:
6519 /* We REALLY want to change the relaxation order here. This
6520 should do NOTHING. The narrowing before it will either align
6525 case RELAX_LITERAL_FINAL
:
6528 case RELAX_LITERAL_NR
:
6530 fragP
->fr_subtype
= RELAX_LITERAL_FINAL
;
6531 assert (unreported
== lit_size
);
6532 memset (&fragP
->fr_literal
[fragP
->fr_fix
], 0, 4);
6533 fragP
->fr_var
-= lit_size
;
6534 fragP
->fr_fix
+= lit_size
;
6539 new_stretch
= relax_frag_narrow (fragP
, stretch
);
6543 case RELAX_IMMED_STEP1
:
6544 case RELAX_IMMED_STEP2
:
6545 /* Place the immediate. */
6546 new_stretch
= relax_frag_immed (now_seg
, fragP
, stretch
,
6547 fragP
->fr_subtype
- RELAX_IMMED
,
6551 case RELAX_LITERAL_POOL_BEGIN
:
6552 case RELAX_LITERAL_POOL_END
:
6553 /* No relaxation required. */
6557 as_bad (_("bad relaxation state"));
6560 new_logical_line (file_name
, line
);
6566 relax_frag_text_align (fragP
, stretch
)
6570 addressT old_address
, old_next_address
, old_size
;
6571 addressT new_address
, new_next_address
, new_size
;
6574 /* Overview of the relaxation procedure for alignment
6575 inside an executable section:
6577 The old size is stored in the tc_frag_data.text_expansion field.
6579 Calculate the new address, fix up the text_expansion and
6580 return the growth. */
6582 /* Calculate the old address of this fragment and the next fragment. */
6583 old_address
= fragP
->fr_address
- stretch
;
6584 old_next_address
= (fragP
->fr_address
- stretch
+ fragP
->fr_fix
+
6585 fragP
->tc_frag_data
.text_expansion
);
6586 old_size
= old_next_address
- old_address
;
6588 /* Calculate the new address of this fragment and the next fragment. */
6589 new_address
= fragP
->fr_address
;
6591 get_noop_aligned_address (fragP
, fragP
->fr_address
+ fragP
->fr_fix
);
6592 new_size
= new_next_address
- new_address
;
6594 growth
= new_size
- old_size
;
6596 /* Fix up the text_expansion field and return the new growth. */
6597 fragP
->tc_frag_data
.text_expansion
+= growth
;
6602 /* Add a NOP (i.e., "or a1, a1, a1"). Use the 3-byte one because we
6603 don't know about the availability of density yet. TODO: When the
6604 flags are stored per fragment, use NOP.N when possible. */
6607 relax_frag_add_nop (fragP
)
6610 static xtensa_insnbuf insnbuf
= NULL
;
6612 char *nop_buf
= fragP
->fr_literal
+ fragP
->fr_fix
;
6615 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6617 tinsn_init (&t_insn
);
6618 t_insn
.opcode
= xtensa_or_opcode
;
6619 assert (t_insn
.opcode
!= XTENSA_UNDEFINED
);
6622 set_expr_const (&t_insn
.tok
[0], 1);
6623 set_expr_const (&t_insn
.tok
[1], 1);
6624 set_expr_const (&t_insn
.tok
[2], 1);
6626 tinsn_to_insnbuf (&t_insn
, insnbuf
);
6627 fragP
->tc_frag_data
.is_insn
= TRUE
;
6628 xtensa_insnbuf_to_chars (xtensa_default_isa
, insnbuf
, nop_buf
);
6630 length
= xtensa_insn_length (xtensa_default_isa
, t_insn
.opcode
);
6631 if (fragP
->fr_var
< length
)
6633 as_warn (_("fr_var (%ld) < length (%d); ignoring"),
6634 fragP
->fr_var
, length
);
6639 fragP
->fr_fix
+= length
;
6640 fragP
->fr_var
-= length
;
6647 relax_frag_narrow (fragP
, stretch
)
6651 /* Overview of the relaxation procedure for alignment inside an
6652 executable section: Find the number of widenings required and the
6653 number of nop bytes required. Store the number of bytes ALREADY
6654 widened. If there are enough instructions to widen (must go back
6655 ONLY through NARROW fragments), mark each of the fragments as TO BE
6656 widened, recalculate the fragment addresses. */
6658 assert (fragP
->fr_type
== rs_machine_dependent
6659 && fragP
->fr_subtype
== RELAX_NARROW
);
6661 if (!future_alignment_required (fragP
, 0))
6663 /* If already expanded but no longer needed because of a prior
6664 stretch, it is SAFE to unexpand because the next fragment will
6665 NEVER start at an address > the previous time through the
6667 if (fragP
->tc_frag_data
.text_expansion
)
6671 fragP
->tc_frag_data
.text_expansion
= 0;
6674 /* Otherwise we have to live with this bad choice. */
6680 if (fragP
->tc_frag_data
.text_expansion
== 0)
6682 fragP
->tc_frag_data
.text_expansion
= 1;
6691 future_alignment_required (fragP
, stretch
)
6695 long address
= fragP
->fr_address
+ stretch
;
6697 addressT aligned_address
;
6698 offsetT desired_diff
;
6702 /* Limit this to a small search. */
6705 address
+= fragP
->fr_fix
;
6707 switch (fragP
->fr_type
)
6710 address
+= fragP
->fr_offset
* fragP
->fr_var
;
6713 case rs_machine_dependent
:
6714 switch (fragP
->fr_subtype
)
6717 /* address += fragP->fr_fix; */
6722 address
+= (/* fragP->fr_fix + */
6723 fragP
->tc_frag_data
.text_expansion
);
6726 case RELAX_ALIGN_NEXT_OPCODE
:
6727 case RELAX_DESIRE_ALIGN
:
6728 /* address += fragP->fr_fix; */
6729 aligned_address
= get_widen_aligned_address (fragP
, address
);
6730 desired_diff
= aligned_address
- address
;
6731 assert (desired_diff
>= 0);
6732 /* If there are enough wideners in between do it. */
6733 /* return (num_widens == desired_diff); */
6734 if (num_widens
== desired_diff
)
6736 if (fragP
->fr_subtype
== RELAX_ALIGN_NEXT_OPCODE
)
6748 fragP
= fragP
->fr_next
;
6756 relax_frag_immed (segP
, fragP
, stretch
, min_steps
, stretched_p
)
6763 static xtensa_insnbuf insnbuf
= NULL
;
6766 bfd_boolean negatable_branch
= FALSE
;
6767 bfd_boolean branch_jmp_to_next
= FALSE
;
6769 offsetT frag_offset
;
6772 int num_text_bytes
, num_literal_bytes
;
6773 int literal_diff
, text_diff
;
6775 assert (fragP
->fr_opcode
!= NULL
);
6778 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6780 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
6781 tinsn_immed_from_frag (&t_insn
, fragP
);
6783 negatable_branch
= is_negatable_branch (&t_insn
);
6785 old_size
= xtensa_insn_length (xtensa_default_isa
, t_insn
.opcode
);
6787 if (software_avoid_b_j_loop_end
)
6788 branch_jmp_to_next
= is_branch_jmp_to_next (&t_insn
, fragP
);
6790 /* Special case: replace a branch to the next instruction with a NOP.
6791 This is required to work around a hardware bug in T1040.0 and also
6792 serves as an optimization. */
6794 if (branch_jmp_to_next
6795 && ((old_size
== 2) || (old_size
== 3))
6796 && !next_frag_is_loop_target (fragP
))
6799 /* Here is the fun stuff: Get the immediate field from this
6800 instruction. If it fits, we are done. If not, find the next
6801 instruction sequence that fits. */
6803 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
6804 istack_init (&istack
);
6805 num_steps
= xg_assembly_relax (&istack
, &t_insn
, segP
, fragP
, frag_offset
,
6806 min_steps
, stretch
);
6807 if (num_steps
< min_steps
)
6809 as_fatal (_("internal error: relaxation failed"));
6813 if (num_steps
> RELAX_IMMED_MAXSTEPS
)
6815 as_fatal (_("internal error: relaxation requires too many steps"));
6819 fragP
->fr_subtype
= (int) RELAX_IMMED
+ num_steps
;
6821 /* Figure out the number of bytes needed. */
6823 num_text_bytes
= get_num_stack_text_bytes (&istack
) - old_size
;
6824 num_literal_bytes
= get_num_stack_literal_bytes (&istack
);
6825 literal_diff
= num_literal_bytes
- fragP
->tc_frag_data
.literal_expansion
;
6826 text_diff
= num_text_bytes
- fragP
->tc_frag_data
.text_expansion
;
6828 /* It MUST get larger. If not, we could get an infinite loop. */
6829 know (num_text_bytes
>= 0);
6830 know (literal_diff
>= 0 && text_diff
>= 0);
6832 fragP
->tc_frag_data
.text_expansion
= num_text_bytes
;
6833 fragP
->tc_frag_data
.literal_expansion
= num_literal_bytes
;
6835 /* Find the associated expandable literal for this. */
6836 if (literal_diff
!= 0)
6838 lit_fragP
= fragP
->tc_frag_data
.literal_frag
;
6841 assert (literal_diff
== 4);
6842 lit_fragP
->tc_frag_data
.unreported_expansion
+= literal_diff
;
6844 /* We expect that the literal section state has NOT been
6846 assert (lit_fragP
->fr_type
== rs_machine_dependent
6847 && lit_fragP
->fr_subtype
== RELAX_LITERAL
);
6848 lit_fragP
->fr_subtype
= RELAX_LITERAL_NR
;
6850 /* We need to mark this section for another iteration
6856 /* This implicitly uses the assumption that a branch is negated
6857 when the size of the output increases by at least 2 bytes. */
6859 if (negatable_branch
&& num_text_bytes
>= 2)
6861 /* If next frag is a loop end, then switch it to add a NOP. */
6862 update_next_frag_nop_state (fragP
);
6869 /* md_convert_frag Hook and Helper Functions. */
6872 md_convert_frag (abfd
, sec
, fragp
)
6873 bfd
*abfd ATTRIBUTE_UNUSED
;
6880 as_where (&file_name
, &line
);
6881 new_logical_line (fragp
->fr_file
, fragp
->fr_line
);
6883 switch (fragp
->fr_subtype
)
6885 case RELAX_ALIGN_NEXT_OPCODE
:
6886 /* Always convert. */
6887 convert_frag_align_next_opcode (fragp
);
6890 case RELAX_DESIRE_ALIGN
:
6891 /* Do nothing. If not aligned already, too bad. */
6895 case RELAX_LITERAL_FINAL
:
6899 /* No conversion. */
6900 convert_frag_narrow (fragp
);
6904 case RELAX_IMMED_STEP1
:
6905 case RELAX_IMMED_STEP2
:
6906 /* Place the immediate. */
6907 convert_frag_immed (sec
, fragp
, fragp
->fr_subtype
- RELAX_IMMED
);
6910 case RELAX_LITERAL_NR
:
6911 if (use_literal_section
)
6913 /* This should have been handled during relaxation. When
6914 relaxing a code segment, literals sometimes need to be
6915 added to the corresponding literal segment. If that
6916 literal segment has already been relaxed, then we end up
6917 in this situation. Marking the literal segments as data
6918 would make this happen less often (since GAS always relaxes
6919 code before data), but we could still get into trouble if
6920 there are instructions in a segment that is not marked as
6921 containing code. Until we can implement a better solution,
6922 cheat and adjust the addresses of all the following frags.
6923 This could break subsequent alignments, but the linker's
6924 literal coalescing will do that anyway. */
6927 fragp
->fr_subtype
= RELAX_LITERAL_FINAL
;
6928 assert (fragp
->tc_frag_data
.unreported_expansion
== 4);
6929 memset (&fragp
->fr_literal
[fragp
->fr_fix
], 0, 4);
6932 for (f
= fragp
->fr_next
; f
; f
= f
->fr_next
)
6936 as_bad (_("invalid relaxation fragment result"));
6941 new_logical_line (file_name
, line
);
6946 convert_frag_align_next_opcode (fragp
)
6949 char *nop_buf
; /* Location for Writing. */
6952 bfd_boolean use_no_density
= fragp
->tc_frag_data
.is_no_density
;
6953 addressT aligned_address
;
6954 size_t fill_size
, nop_count
;
6956 aligned_address
= get_noop_aligned_address (fragp
, fragp
->fr_address
+
6958 fill_size
= aligned_address
- (fragp
->fr_address
+ fragp
->fr_fix
);
6959 nop_count
= get_text_align_nop_count (fill_size
, use_no_density
);
6960 nop_buf
= fragp
->fr_literal
+ fragp
->fr_fix
;
6962 for (i
= 0; i
< nop_count
; i
++)
6965 nop_size
= get_text_align_nth_nop_size (fill_size
, i
, use_no_density
);
6967 assemble_nop (nop_size
, nop_buf
);
6968 nop_buf
+= nop_size
;
6971 fragp
->fr_fix
+= fill_size
;
6972 fragp
->fr_var
-= fill_size
;
6977 convert_frag_narrow (fragP
)
6980 static xtensa_insnbuf insnbuf
= NULL
;
6981 TInsn t_insn
, single_target
;
6982 int size
, old_size
, diff
, error_val
;
6983 offsetT frag_offset
;
6985 if (fragP
->tc_frag_data
.text_expansion
== 0)
6987 /* No conversion. */
6992 assert (fragP
->fr_opcode
!= NULL
);
6995 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
6997 tinsn_from_chars (&t_insn
, fragP
->fr_opcode
);
6998 tinsn_immed_from_frag (&t_insn
, fragP
);
7000 /* Just convert it to a wide form.... */
7002 old_size
= xtensa_insn_length (xtensa_default_isa
, t_insn
.opcode
);
7004 tinsn_init (&single_target
);
7005 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
7007 error_val
= xg_expand_narrow (&single_target
, &t_insn
);
7009 as_bad (_("unable to widen instruction"));
7011 size
= xtensa_insn_length (xtensa_default_isa
, single_target
.opcode
);
7012 xg_emit_insn_to_buf (&single_target
, fragP
->fr_opcode
,
7013 fragP
, frag_offset
, TRUE
);
7015 diff
= size
- old_size
;
7017 assert (diff
<= fragP
->fr_var
);
7018 fragP
->fr_var
-= diff
;
7019 fragP
->fr_fix
+= diff
;
7027 convert_frag_immed (segP
, fragP
, min_steps
)
7032 char *immed_instr
= fragP
->fr_opcode
;
7033 static xtensa_insnbuf insnbuf
= NULL
;
7035 bfd_boolean expanded
= FALSE
;
7036 char *fr_opcode
= fragP
->fr_opcode
;
7037 bfd_boolean branch_jmp_to_next
= FALSE
;
7040 assert (fragP
->fr_opcode
!= NULL
);
7043 insnbuf
= xtensa_insnbuf_alloc (xtensa_default_isa
);
7045 tinsn_from_chars (&orig_t_insn
, fragP
->fr_opcode
);
7046 tinsn_immed_from_frag (&orig_t_insn
, fragP
);
7048 /* Here is the fun stuff: Get the immediate field from this
7049 instruction. If it fits, we're done. If not, find the next
7050 instruction sequence that fits. */
7052 if (software_avoid_b_j_loop_end
)
7053 branch_jmp_to_next
= is_branch_jmp_to_next (&orig_t_insn
, fragP
);
7055 if (branch_jmp_to_next
&& !next_frag_is_loop_target (fragP
))
7057 /* Conversion just inserts a NOP and marks the fix as completed. */
7058 size
= xtensa_insn_length (xtensa_default_isa
, orig_t_insn
.opcode
);
7059 assemble_nop (size
, fragP
->fr_opcode
);
7066 symbolS
*lit_sym
= NULL
;
7070 symbolS
*gen_label
= NULL
;
7071 offsetT frag_offset
;
7073 /* It does not fit. Find something that does and
7074 convert immediately. */
7075 frag_offset
= fragP
->fr_opcode
- fragP
->fr_literal
;
7076 istack_init (&istack
);
7077 xg_assembly_relax (&istack
, &orig_t_insn
,
7078 segP
, fragP
, frag_offset
, min_steps
, 0);
7080 old_size
= xtensa_insn_length (xtensa_default_isa
, orig_t_insn
.opcode
);
7082 /* Assemble this right inline. */
7084 /* First, create the mapping from a label name to the REAL label. */
7086 for (i
= 0; i
< istack
.ninsn
; i
++)
7088 TInsn
*t_insn
= &istack
.insn
[i
];
7092 switch (t_insn
->insn_type
)
7095 if (lit_sym
!= NULL
)
7096 as_bad (_("multiple literals in expansion"));
7097 /* First find the appropriate space in the literal pool. */
7098 lit_frag
= fragP
->tc_frag_data
.literal_frag
;
7099 if (lit_frag
== NULL
)
7100 as_bad (_("no registered fragment for literal"));
7101 if (t_insn
->ntok
!= 1)
7102 as_bad (_("number of literal tokens != 1"));
7104 /* Set the literal symbol and add a fixup. */
7105 lit_sym
= lit_frag
->fr_symbol
;
7109 assert (gen_label
== NULL
);
7110 gen_label
= symbol_new (FAKE_LABEL_NAME
, now_seg
,
7111 fragP
->fr_opcode
- fragP
->fr_literal
+
7116 size
= xtensa_insn_length (xtensa_default_isa
, t_insn
->opcode
);
7123 for (i
= 0; i
< istack
.ninsn
; i
++)
7125 TInsn
*t_insn
= &istack
.insn
[i
];
7130 switch (t_insn
->insn_type
)
7133 lit_frag
= fragP
->tc_frag_data
.literal_frag
;
7134 /* already checked */
7135 assert (lit_frag
!= NULL
);
7136 assert (lit_sym
!= NULL
);
7137 assert (t_insn
->ntok
== 1);
7139 target_seg
= S_GET_SEGMENT (lit_sym
);
7140 assert (target_seg
);
7141 fix_new_exp_in_seg (target_seg
, 0, lit_frag
, 0, 4,
7142 &t_insn
->tok
[0], FALSE
, BFD_RELOC_32
);
7149 xg_resolve_labels (t_insn
, gen_label
);
7150 xg_resolve_literals (t_insn
, lit_sym
);
7151 size
= xtensa_insn_length (xtensa_default_isa
, t_insn
->opcode
);
7153 xg_emit_insn_to_buf (t_insn
, immed_instr
, fragP
,
7154 immed_instr
- fragP
->fr_literal
, TRUE
);
7155 immed_instr
+= size
;
7160 diff
= total_size
- old_size
;
7164 assert (diff
<= fragP
->fr_var
);
7165 fragP
->fr_var
-= diff
;
7166 fragP
->fr_fix
+= diff
;
7172 /* Check for undefined immediates in LOOP instructions. */
7173 if (is_loop_opcode (orig_t_insn
.opcode
))
7176 sym
= orig_t_insn
.tok
[1].X_add_symbol
;
7177 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
7179 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
7182 sym
= orig_t_insn
.tok
[1].X_op_symbol
;
7183 if (sym
!= NULL
&& !S_IS_DEFINED (sym
))
7185 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym
));
7190 if (expanded
&& is_loop_opcode (orig_t_insn
.opcode
))
7191 convert_frag_immed_finish_loop (segP
, fragP
, &orig_t_insn
);
7193 if (expanded
&& is_direct_call_opcode (orig_t_insn
.opcode
))
7195 /* Add an expansion note on the expanded instruction. */
7196 fix_new_exp_in_seg (now_seg
, 0, fragP
, fr_opcode
- fragP
->fr_literal
, 4,
7197 &orig_t_insn
.tok
[0], TRUE
,
7198 BFD_RELOC_XTENSA_ASM_EXPAND
);
7204 /* Add a new fix expression into the desired segment. We have to
7205 switch to that segment to do this. */
7208 fix_new_exp_in_seg (new_seg
, new_subseg
,
7209 frag
, where
, size
, exp
, pcrel
, r_type
)
7217 bfd_reloc_code_real_type r_type
;
7221 subsegT subseg
= now_subseg
;
7222 assert (new_seg
!= 0);
7223 subseg_set (new_seg
, new_subseg
);
7225 if (r_type
== BFD_RELOC_32
7226 && exp
->X_add_symbol
7227 && symbol_get_tc (exp
->X_add_symbol
)->plt
== 1)
7229 r_type
= BFD_RELOC_XTENSA_PLT
;
7232 new_fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
7233 subseg_set (seg
, subseg
);
7238 /* Relax a loop instruction so that it can span loop >256 bytes. */
7244 addi as, as, lo8(label-.L1)
7245 addmi as, as, mid8(label-.L1)
7255 convert_frag_immed_finish_loop (segP
, fragP
, t_insn
)
7263 unsigned long target
;
7264 static xtensa_insnbuf insnbuf
= NULL
;
7265 unsigned int loop_length
, loop_length_hi
, loop_length_lo
;
7266 xtensa_isa isa
= xtensa_default_isa
;
7267 addressT loop_offset
;
7268 addressT addi_offset
= 9;
7269 addressT addmi_offset
= 12;
7272 insnbuf
= xtensa_insnbuf_alloc (isa
);
7274 /* Get the loop offset. */
7275 loop_offset
= get_expanded_loop_offset (t_insn
->opcode
);
7276 /* Validate that there really is a LOOP at the loop_offset. */
7277 tinsn_from_chars (&loop_insn
, fragP
->fr_opcode
+ loop_offset
);
7279 if (!is_loop_opcode (loop_insn
.opcode
))
7281 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7282 _("loop relaxation specification does not correspond"));
7285 addi_offset
+= loop_offset
;
7286 addmi_offset
+= loop_offset
;
7288 assert (t_insn
->ntok
== 2);
7289 target
= get_expression_value (segP
, &t_insn
->tok
[1]);
7292 know (symbolP
->sy_frag
);
7293 know (!(S_GET_SEGMENT (symbolP
) == absolute_section
)
7294 || symbol_get_frag (symbolP
) == &zero_address_frag
);
7296 loop_length
= target
- (fragP
->fr_address
+ fragP
->fr_fix
);
7297 loop_length_hi
= loop_length
& ~0x0ff;
7298 loop_length_lo
= loop_length
& 0x0ff;
7299 if (loop_length_lo
>= 128)
7301 loop_length_lo
-= 256;
7302 loop_length_hi
+= 256;
7305 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
7306 32512. If the loop is larger than that, then we just fail. */
7307 if (loop_length_hi
> 32512)
7308 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
7309 _("loop too long for LOOP instruction"));
7311 tinsn_from_chars (&addi_insn
, fragP
->fr_opcode
+ addi_offset
);
7312 assert (addi_insn
.opcode
== xtensa_addi_opcode
);
7314 tinsn_from_chars (&addmi_insn
, fragP
->fr_opcode
+ addmi_offset
);
7315 assert (addmi_insn
.opcode
== xtensa_addmi_opcode
);
7317 set_expr_const (&addi_insn
.tok
[2], loop_length_lo
);
7318 tinsn_to_insnbuf (&addi_insn
, insnbuf
);
7320 fragP
->tc_frag_data
.is_insn
= TRUE
;
7321 xtensa_insnbuf_to_chars (isa
, insnbuf
, fragP
->fr_opcode
+ addi_offset
);
7323 set_expr_const (&addmi_insn
.tok
[2], loop_length_hi
);
7324 tinsn_to_insnbuf (&addmi_insn
, insnbuf
);
7325 xtensa_insnbuf_to_chars (isa
, insnbuf
, fragP
->fr_opcode
+ addmi_offset
);
7330 get_expression_value (segP
, exp
)
7334 if (exp
->X_op
== O_constant
)
7335 return exp
->X_add_number
;
7336 if (exp
->X_op
== O_symbol
)
7338 /* Find the fragment. */
7339 symbolS
*sym
= exp
->X_add_symbol
;
7341 assert (S_GET_SEGMENT (sym
) == segP
7342 || S_GET_SEGMENT (sym
) == absolute_section
);
7344 return (S_GET_VALUE (sym
) + exp
->X_add_number
);
7346 as_bad (_("invalid expression evaluation type %d"), exp
->X_op
);
7351 /* A map that keeps information on a per-subsegment basis. This is
7352 maintained during initial assembly, but is invalid once the
7353 subsegments are smashed together. I.E., it cannot be used during
7356 typedef struct subseg_map_struct
7365 struct subseg_map_struct
*next
;
7368 static subseg_map
*sseg_map
= NULL
;
7372 get_last_insn_flags (seg
, subseg
)
7376 subseg_map
*subseg_e
;
7378 for (subseg_e
= sseg_map
; subseg_e
!= NULL
; subseg_e
= subseg_e
->next
)
7379 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
7380 return subseg_e
->flags
;
7387 set_last_insn_flags (seg
, subseg
, fl
, val
)
7393 subseg_map
*subseg_e
;
7395 for (subseg_e
= sseg_map
; subseg_e
; subseg_e
= subseg_e
->next
)
7396 if (seg
== subseg_e
->seg
&& subseg
== subseg_e
->subseg
)
7401 subseg_e
= (subseg_map
*) xmalloc (sizeof (subseg_map
));
7402 memset (subseg_e
, 0, sizeof (subseg_map
));
7403 subseg_e
->seg
= seg
;
7404 subseg_e
->subseg
= subseg
;
7405 subseg_e
->flags
= 0;
7406 subseg_e
->next
= sseg_map
;
7407 sseg_map
= subseg_e
;
7411 subseg_e
->flags
|= fl
;
7413 subseg_e
->flags
&= ~fl
;
7417 /* Segment Lists and emit_state Stuff. */
7419 /* Remove the segment from the global sections list. */
7422 xtensa_remove_section (sec
)
7425 /* Handle brain-dead bfd_section_list_remove macro, which
7426 expect the address of the prior section's "next" field, not
7427 just the address of the section to remove. */
7429 segT
*ps_next_ptr
= &stdoutput
->sections
;
7430 while (*ps_next_ptr
!= sec
&& *ps_next_ptr
!= NULL
)
7431 ps_next_ptr
= &(*ps_next_ptr
)->next
;
7433 assert (*ps_next_ptr
!= NULL
);
7435 bfd_section_list_remove (stdoutput
, ps_next_ptr
);
7440 xtensa_insert_section (after_sec
, sec
)
7444 segT
*after_sec_next
;
7445 if (after_sec
== NULL
)
7446 after_sec_next
= &stdoutput
->sections
;
7448 after_sec_next
= &after_sec
->next
;
7450 bfd_section_list_insert (stdoutput
, after_sec_next
, sec
);
7455 xtensa_move_seg_list_to_beginning (head
)
7461 segT literal_section
= head
->seg
;
7463 /* Move the literal section to the front of the section list. */
7464 assert (literal_section
);
7465 xtensa_remove_section (literal_section
);
7466 xtensa_insert_section (NULL
, literal_section
);
7474 xtensa_move_literals ()
7477 frchainS
*frchain_from
, *frchain_to
;
7478 fragS
*search_frag
, *next_frag
, *last_frag
, *literal_pool
, *insert_after
;
7479 fragS
**frag_splice
;
7482 fixS
*fix
, *next_fix
, **fix_splice
;
7485 /* As clunky as this is, we can't rely on frag_var
7486 and frag_variant to get called in all situations. */
7488 segment
= literal_head
->next
;
7491 frchain_from
= seg_info (segment
->seg
)->frchainP
;
7492 search_frag
= frchain_from
->frch_root
;
7495 search_frag
->tc_frag_data
.is_literal
= TRUE
;
7496 search_frag
= search_frag
->fr_next
;
7498 segment
= segment
->next
;
7501 if (use_literal_section
)
7504 segment
= literal_head
->next
;
7507 frchain_from
= seg_info (segment
->seg
)->frchainP
;
7508 search_frag
= frchain_from
->frch_root
;
7509 literal_pool
= NULL
;
7511 frag_splice
= &(frchain_from
->frch_root
);
7513 while (!search_frag
->tc_frag_data
.literal_frag
)
7515 assert (search_frag
->fr_fix
== 0
7516 || search_frag
->fr_type
== rs_align
);
7517 search_frag
= search_frag
->fr_next
;
7520 assert (search_frag
->tc_frag_data
.literal_frag
->fr_subtype
7521 == RELAX_LITERAL_POOL_BEGIN
);
7522 xtensa_switch_section_emit_state (&state
, segment
->seg
, 0);
7524 /* Make sure that all the frags in this series are closed, and
7525 that there is at least one left over of zero-size. This
7526 prevents us from making a segment with an frchain without any
7528 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
7529 last_frag
= frag_now
;
7530 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
7532 while (search_frag
!= frag_now
)
7534 next_frag
= search_frag
->fr_next
;
7536 /* First, move the frag out of the literal section and
7537 to the appropriate place. */
7538 if (search_frag
->tc_frag_data
.literal_frag
)
7540 literal_pool
= search_frag
->tc_frag_data
.literal_frag
;
7541 assert (literal_pool
->fr_subtype
== RELAX_LITERAL_POOL_BEGIN
);
7542 /* Note that we set this fr_var to be a fix
7543 chain when we created the literal pool location
7544 as RELAX_LITERAL_POOL_BEGIN. */
7545 frchain_to
= (frchainS
*) literal_pool
->fr_var
;
7547 insert_after
= literal_pool
;
7549 while (insert_after
->fr_next
->fr_subtype
!= RELAX_LITERAL_POOL_END
)
7550 insert_after
= insert_after
->fr_next
;
7552 dest_seg
= (segT
) insert_after
->fr_next
->fr_var
;
7554 *frag_splice
= next_frag
;
7555 search_frag
->fr_next
= insert_after
->fr_next
;
7556 insert_after
->fr_next
= search_frag
;
7557 search_frag
->tc_frag_data
.lit_seg
= dest_seg
;
7559 /* Now move any fixups associated with this frag to the
7561 fix
= frchain_from
->fix_root
;
7562 fix_splice
= &(frchain_from
->fix_root
);
7565 next_fix
= fix
->fx_next
;
7566 if (fix
->fx_frag
== search_frag
)
7568 *fix_splice
= next_fix
;
7569 fix
->fx_next
= frchain_to
->fix_root
;
7570 frchain_to
->fix_root
= fix
;
7571 if (frchain_to
->fix_tail
== NULL
)
7572 frchain_to
->fix_tail
= fix
;
7575 fix_splice
= &(fix
->fx_next
);
7578 search_frag
= next_frag
;
7581 if (frchain_from
->fix_root
!= NULL
)
7583 frchain_from
= seg_info (segment
->seg
)->frchainP
;
7584 as_warn (_("fixes not all moved from %s"), segment
->seg
->name
);
7586 assert (frchain_from
->fix_root
== NULL
);
7588 frchain_from
->fix_tail
= NULL
;
7589 xtensa_restore_emit_state (&state
);
7590 segment
= segment
->next
;
7593 /* Now fix up the SEGMENT value for all the literal symbols. */
7594 for (lit
= literal_syms
; lit
; lit
= lit
->next
)
7596 symbolS
*lit_sym
= lit
->sym
;
7597 segT dest_seg
= symbol_get_frag (lit_sym
)->tc_frag_data
.lit_seg
;
7598 S_SET_SEGMENT (lit_sym
, dest_seg
);
7604 xtensa_reorder_seg_list (head
, after
)
7608 /* Move all of the sections in the section list to come
7609 after "after" in the gnu segment list. */
7614 segT literal_section
= head
->seg
;
7616 /* Move the literal section after "after". */
7617 assert (literal_section
);
7618 if (literal_section
!= after
)
7620 xtensa_remove_section (literal_section
);
7621 xtensa_insert_section (after
, literal_section
);
7629 /* Push all the literal segments to the end of the gnu list. */
7632 xtensa_reorder_segments ()
7639 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
7642 /* Now that we have the last section, push all the literal
7643 sections to the end. */
7644 last_sec
= get_last_sec ();
7645 xtensa_reorder_seg_list (literal_head
, last_sec
);
7646 xtensa_reorder_seg_list (init_literal_head
, last_sec
);
7647 xtensa_reorder_seg_list (fini_literal_head
, last_sec
);
7649 /* Now perform the final error check. */
7650 for (sec
= stdoutput
->sections
; sec
!= NULL
; sec
= sec
->next
)
7652 assert (new_count
== old_count
);
7659 segT last_sec
= stdoutput
->sections
;
7660 while (last_sec
->next
!= NULL
)
7661 last_sec
= last_sec
->next
;
7667 /* Change the emit state (seg, subseg, and frag related stuff) to the
7668 correct location. Return a emit_state which can be passed to
7669 xtensa_restore_emit_state to return to current fragment. */
7672 xtensa_switch_to_literal_fragment (result
)
7675 /* When we mark a literal pool location, we want to put a frag in
7676 the literal pool that points to it. But to do that, we want to
7677 switch_to_literal_fragment. But literal sections don't have
7678 literal pools, so their location is always null, so we would
7679 recurse forever. This is kind of hacky, but it works. */
7681 static bfd_boolean recursive
= FALSE
;
7682 fragS
*pool_location
= get_literal_pool_location (now_seg
);
7683 bfd_boolean is_init
=
7684 (now_seg
&& !strcmp (segment_name (now_seg
), INIT_SECTION_NAME
));
7686 bfd_boolean is_fini
=
7687 (now_seg
&& !strcmp (segment_name (now_seg
), FINI_SECTION_NAME
));
7690 if (pool_location
== NULL
7691 && !use_literal_section
7693 && !is_init
&& ! is_fini
)
7695 as_warn (_("inlining literal pool; "
7696 "specify location with .literal_position."));
7698 xtensa_mark_literal_pool_location ();
7702 /* Special case: If we are in the ".fini" or ".init" section, then
7703 we will ALWAYS be generating to the ".fini.literal" and
7704 ".init.literal" sections. */
7708 cache_literal_section (init_literal_head
,
7709 default_lit_sections
.init_lit_seg_name
,
7710 &default_lit_sections
.init_lit_seg
);
7711 xtensa_switch_section_emit_state (result
,
7712 default_lit_sections
.init_lit_seg
, 0);
7716 cache_literal_section (fini_literal_head
,
7717 default_lit_sections
.fini_lit_seg_name
,
7718 &default_lit_sections
.fini_lit_seg
);
7719 xtensa_switch_section_emit_state (result
,
7720 default_lit_sections
.fini_lit_seg
, 0);
7724 cache_literal_section (literal_head
,
7725 default_lit_sections
.lit_seg_name
,
7726 &default_lit_sections
.lit_seg
);
7727 xtensa_switch_section_emit_state (result
,
7728 default_lit_sections
.lit_seg
, 0);
7731 if (!use_literal_section
&&
7732 !is_init
&& !is_fini
&&
7733 get_literal_pool_location (now_seg
) != pool_location
)
7735 /* Close whatever frag is there. */
7736 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
7737 frag_now
->tc_frag_data
.literal_frag
= pool_location
;
7738 frag_variant (rs_fill
, 0, 0, 0, NULL
, 0, NULL
);
7741 /* Do a 4 byte align here. */
7742 frag_align (2, 0, 0);
7746 /* Call this function before emitting data into the literal section.
7747 This is a helper function for xtensa_switch_to_literal_fragment.
7748 This is similar to a .section new_now_seg subseg. */
7751 xtensa_switch_section_emit_state (state
, new_now_seg
, new_now_subseg
)
7754 subsegT new_now_subseg
;
7756 state
->name
= now_seg
->name
;
7757 state
->now_seg
= now_seg
;
7758 state
->now_subseg
= now_subseg
;
7759 state
->generating_literals
= generating_literals
;
7760 generating_literals
++;
7761 subseg_new (segment_name (new_now_seg
), new_now_subseg
);
7765 /* Use to restore the emitting into the normal place. */
7768 xtensa_restore_emit_state (state
)
7771 generating_literals
= state
->generating_literals
;
7772 subseg_new (state
->name
, state
->now_subseg
);
7776 /* Get a segment of a given name. If the segment is already
7777 present, return it; otherwise, create a new one. */
7780 cache_literal_section (head
, name
, seg
)
7785 segT current_section
= now_seg
;
7786 int current_subsec
= now_subseg
;
7790 *seg
= retrieve_literal_seg (head
, name
);
7791 subseg_set (current_section
, current_subsec
);
7795 /* Get a segment of a given name. If the segment is already
7796 present, return it; otherwise, create a new one. */
7799 retrieve_literal_seg (head
, name
)
7807 ret
= seg_present (name
);
7810 ret
= subseg_new (name
, (subsegT
) 0);
7811 add_seg_list (head
, ret
);
7812 bfd_set_section_flags (stdoutput
, ret
, SEC_HAS_CONTENTS
|
7813 SEC_READONLY
| SEC_ALLOC
| SEC_LOAD
| SEC_CODE
);
7814 bfd_set_section_alignment (stdoutput
, ret
, 2);
7821 /* Return a segment of a given name if it is present. */
7828 seg
= stdoutput
->sections
;
7832 if (!strcmp (segment_name (seg
), name
))
7841 /* Add a segment to a segment list. */
7844 add_seg_list (head
, seg
)
7849 n
= (seg_list
*) xmalloc (sizeof (seg_list
));
7853 n
->next
= head
->next
;
7858 /* Set up Property Tables after Relaxation. */
7860 #define XTENSA_INSN_SEC_NAME ".xt.insn"
7861 #define XTENSA_LIT_SEC_NAME ".xt.lit"
7864 xtensa_post_relax_hook ()
7866 xtensa_move_seg_list_to_beginning (literal_head
);
7867 xtensa_move_seg_list_to_beginning (init_literal_head
);
7868 xtensa_move_seg_list_to_beginning (fini_literal_head
);
7870 xtensa_create_property_segments (get_frag_is_insn
,
7871 XTENSA_INSN_SEC_NAME
,
7873 if (use_literal_section
)
7874 xtensa_create_property_segments (get_frag_is_literal
,
7875 XTENSA_LIT_SEC_NAME
,
7881 get_frag_is_literal (fragP
)
7884 assert (fragP
!= NULL
);
7885 return (fragP
->tc_frag_data
.is_literal
);
7890 get_frag_is_insn (fragP
)
7893 assert (fragP
!= NULL
);
7894 return (fragP
->tc_frag_data
.is_insn
);
7899 xtensa_create_property_segments (property_function
, section_name_base
,
7901 frag_predicate property_function
;
7902 const char * section_name_base
;
7903 xt_section_type sec_type
;
7907 /* Walk over all of the current segments.
7908 Walk over each fragment
7909 For each fragment that has instructions
7910 Build an instruction record (append where possible). */
7912 for (seclist
= &stdoutput
->sections
;
7913 seclist
&& *seclist
;
7914 seclist
= &(*seclist
)->next
)
7916 segT sec
= *seclist
;
7917 if (section_has_property (sec
, property_function
))
7919 char * property_section_name
=
7920 xtensa_get_property_section_name (stdoutput
, sec
,
7922 segT insn_sec
= retrieve_xtensa_section (property_section_name
);
7923 segment_info_type
*xt_seg_info
= retrieve_segment_info (insn_sec
);
7924 xtensa_block_info
** xt_blocks
=
7925 &xt_seg_info
->tc_segment_info_data
.blocks
[sec_type
];
7926 /* Walk over all of the frchains here and add new sections. */
7927 add_xt_block_frags (sec
, insn_sec
, xt_blocks
, property_function
);
7931 /* Now we fill them out.... */
7933 for (seclist
= &stdoutput
->sections
;
7934 seclist
&& *seclist
;
7935 seclist
= &(*seclist
)->next
)
7937 segment_info_type
*seginfo
;
7938 xtensa_block_info
*block
;
7939 segT sec
= *seclist
;
7940 seginfo
= seg_info (sec
);
7941 block
= seginfo
->tc_segment_info_data
.blocks
[sec_type
];
7945 xtensa_block_info
*cur_block
;
7946 /* This is a section with some data. */
7947 size_t num_recs
= 0;
7950 for (cur_block
= block
; cur_block
; cur_block
= cur_block
->next
)
7953 rec_size
= num_recs
* 8;
7954 bfd_set_section_size (stdoutput
, sec
, rec_size
);
7956 /* In order to make this work with the assembler, we have to
7957 build some frags and then build the "fixups" for it. It
7958 would be easier to just set the contents then set the
7963 /* Allocate a fragment and leak it. */
7971 frag_size
= sizeof (fragS
) + rec_size
;
7972 fragP
= (fragS
*) xmalloc (frag_size
);
7974 memset (fragP
, 0, frag_size
);
7975 fragP
->fr_address
= 0;
7976 fragP
->fr_next
= NULL
;
7977 fragP
->fr_fix
= rec_size
;
7979 fragP
->fr_type
= rs_fill
;
7980 /* the rest are zeros */
7982 frchainP
= seginfo
->frchainP
;
7983 frchainP
->frch_root
= fragP
;
7984 frchainP
->frch_last
= fragP
;
7986 fixes
= (fixS
*) xmalloc (sizeof (fixS
) * num_recs
);
7987 memset (fixes
, 0, sizeof (fixS
) * num_recs
);
7989 seginfo
->fix_root
= fixes
;
7990 seginfo
->fix_tail
= &fixes
[num_recs
- 1];
7992 frag_data
= &fragP
->fr_literal
[0];
7993 for (i
= 0; i
< num_recs
; i
++)
7995 fixS
*fix
= &fixes
[i
];
7998 /* Write the fixup. */
7999 if (i
!= num_recs
- 1)
8000 fix
->fx_next
= &fixes
[i
+ 1];
8002 fix
->fx_next
= NULL
;
8005 fix
->fx_frag
= fragP
;
8006 fix
->fx_where
= i
* 8;
8007 fix
->fx_addsy
= section_symbol (cur_block
->sec
);
8008 fix
->fx_offset
= cur_block
->offset
;
8009 fix
->fx_r_type
= BFD_RELOC_32
;
8010 fix
->fx_file
= "Internal Assembly";
8013 /* Write the length. */
8014 md_number_to_chars (&frag_data
[4 + 8 * i
],
8015 cur_block
->size
, 4);
8016 cur_block
= cur_block
->next
;
8025 retrieve_segment_info (seg
)
8028 segment_info_type
*seginfo
;
8029 seginfo
= (segment_info_type
*) bfd_get_section_userdata (stdoutput
, seg
);
8034 seginfo
= (segment_info_type
*) xmalloc (sizeof (*seginfo
));
8035 memset ((PTR
) seginfo
, 0, sizeof (*seginfo
));
8036 seginfo
->fix_root
= NULL
;
8037 seginfo
->fix_tail
= NULL
;
8038 seginfo
->bfd_section
= seg
;
8040 /* We will not be dealing with these, only our special ones. */
8042 if (seg
== bfd_abs_section_ptr
)
8043 abs_seg_info
= seginfo
;
8044 else if (seg
== bfd_und_section_ptr
)
8045 und_seg_info
= seginfo
;
8048 bfd_set_section_userdata (stdoutput
, seg
, (PTR
) seginfo
);
8050 seg_fix_rootP
= &segment_info
[seg
].fix_root
;
8051 seg_fix_tailP
= &segment_info
[seg
].fix_tail
;
8054 frchainP
= (frchainS
*) xmalloc (sizeof (frchainS
));
8055 frchainP
->frch_root
= NULL
;
8056 frchainP
->frch_last
= NULL
;
8057 frchainP
->frch_next
= NULL
;
8058 frchainP
->frch_seg
= seg
;
8059 frchainP
->frch_subseg
= 0;
8060 frchainP
->fix_root
= NULL
;
8061 frchainP
->fix_tail
= NULL
;
8062 /* Do not init the objstack. */
8063 /* obstack_begin (&frchainP->frch_obstack, chunksize); */
8064 /* frchainP->frch_frag_now = fragP; */
8065 frchainP
->frch_frag_now
= NULL
;
8067 seginfo
->frchainP
= frchainP
;
8075 retrieve_xtensa_section (sec_name
)
8078 bfd
*abfd
= stdoutput
;
8079 flagword flags
, out_flags
, link_once_flags
;
8082 flags
= bfd_get_section_flags (abfd
, now_seg
);
8083 link_once_flags
= (flags
& SEC_LINK_ONCE
);
8084 if (link_once_flags
)
8085 link_once_flags
|= (flags
& SEC_LINK_DUPLICATES
);
8086 out_flags
= (SEC_RELOC
| SEC_HAS_CONTENTS
| SEC_READONLY
| link_once_flags
);
8088 s
= bfd_make_section_old_way (abfd
, sec_name
);
8090 as_bad (_("could not create section %s"), sec_name
);
8091 if (!bfd_set_section_flags (abfd
, s
, out_flags
))
8092 as_bad (_("invalid flag combination on section %s"), sec_name
);
8099 section_has_property (sec
, property_function
)
8101 frag_predicate property_function
;
8103 segment_info_type
*seginfo
= seg_info (sec
);
8106 if (seginfo
&& seginfo
->frchainP
)
8108 for (fragP
= seginfo
->frchainP
->frch_root
; fragP
; fragP
= fragP
->fr_next
)
8110 if (property_function (fragP
)
8111 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
8119 /* Two types of block sections exist right now: literal and insns. */
8122 add_xt_block_frags (sec
, xt_block_sec
, xt_block
, property_function
)
8125 xtensa_block_info
**xt_block
;
8126 frag_predicate property_function
;
8128 segment_info_type
*seg_info
;
8129 segment_info_type
*xt_seg_info
;
8133 xt_seg_info
= retrieve_segment_info (xt_block_sec
);
8134 seg_info
= retrieve_segment_info (sec
);
8136 /* Build it if needed. */
8137 while (*xt_block
!= NULL
)
8138 xt_block
= &(*xt_block
)->next
;
8139 /* We are either at NULL at the beginning or at the end. */
8141 /* Walk through the frags. */
8144 if (seg_info
->frchainP
)
8146 for (fragP
= seg_info
->frchainP
->frch_root
;
8148 fragP
= fragP
->fr_next
)
8150 if (property_function (fragP
)
8151 && (fragP
->fr_type
!= rs_fill
|| fragP
->fr_fix
!= 0))
8153 if (*xt_block
!= NULL
)
8155 if ((*xt_block
)->offset
+ (*xt_block
)->size
8156 == fragP
->fr_address
)
8157 (*xt_block
)->size
+= fragP
->fr_fix
;
8159 xt_block
= &((*xt_block
)->next
);
8161 if (*xt_block
== NULL
)
8163 xtensa_block_info
*new_block
= (xtensa_block_info
*)
8164 xmalloc (sizeof (xtensa_block_info
));
8165 new_block
->sec
= sec
;
8166 new_block
->offset
= fragP
->fr_address
;
8167 new_block
->size
= fragP
->fr_fix
;
8168 new_block
->next
= NULL
;
8169 *xt_block
= new_block
;
8177 /* Instruction Stack Functions (from "xtensa-istack.h"). */
8183 memset (stack
, 0, sizeof (IStack
));
8189 istack_empty (stack
)
8192 return (stack
->ninsn
== 0);
8200 return (stack
->ninsn
== MAX_ISTACK
);
8204 /* Return a pointer to the top IStack entry.
8205 It is an error to call this if istack_empty () is true. */
8211 int rec
= stack
->ninsn
- 1;
8212 assert (!istack_empty (stack
));
8213 return &stack
->insn
[rec
];
8217 /* Add a new TInsn to an IStack.
8218 It is an error to call this if istack_full () is true. */
8221 istack_push (stack
, insn
)
8225 int rec
= stack
->ninsn
;
8226 assert (!istack_full (stack
));
8227 tinsn_copy (&stack
->insn
[rec
], insn
);
8232 /* Clear space for the next TInsn on the IStack and return a pointer
8233 to it. It is an error to call this if istack_full () is true. */
8236 istack_push_space (stack
)
8239 int rec
= stack
->ninsn
;
8241 assert (!istack_full (stack
));
8242 insn
= &stack
->insn
[rec
];
8243 memset (insn
, 0, sizeof (TInsn
));
8249 /* Remove the last pushed instruction. It is an error to call this if
8250 istack_empty () returns true. */
8256 int rec
= stack
->ninsn
- 1;
8257 assert (!istack_empty (stack
));
8259 memset (&stack
->insn
[rec
], 0, sizeof (TInsn
));
8263 /* TInsn functions. */
8269 memset (dst
, 0, sizeof (TInsn
));
8274 tinsn_copy (dst
, src
)
8279 memcpy (dst
, src
, sizeof (TInsn
));
8283 /* Get the ``num''th token of the TInsn.
8284 It is illegal to call this if num > insn->ntoks. */
8287 tinsn_get_tok (insn
, num
)
8291 assert (num
< insn
->ntok
);
8292 return &insn
->tok
[num
];
8296 /* Return true if ANY of the operands in the insn are symbolic. */
8299 tinsn_has_symbolic_operands (insn
)
8305 assert (insn
->insn_type
== ITYPE_INSN
);
8307 for (i
= 0; i
< n
; ++i
)
8309 switch (insn
->tok
[i
].X_op
)
8323 tinsn_has_invalid_symbolic_operands (insn
)
8329 assert (insn
->insn_type
== ITYPE_INSN
);
8331 for (i
= 0; i
< n
; ++i
)
8333 switch (insn
->tok
[i
].X_op
)
8339 if (i
== get_relaxable_immed (insn
->opcode
))
8341 as_bad (_("invalid symbolic operand %d on '%s'"),
8342 i
, xtensa_opcode_name (xtensa_default_isa
, insn
->opcode
));
8350 /* For assembly code with complex expressions (e.g. subtraction),
8351 we have to build them in the literal pool so that
8352 their results are calculated correctly after relaxation.
8353 The relaxation only handles expressions that
8354 boil down to SYMBOL + OFFSET. */
8357 tinsn_has_complex_operands (insn
)
8362 assert (insn
->insn_type
== ITYPE_INSN
);
8363 for (i
= 0; i
< n
; ++i
)
8365 switch (insn
->tok
[i
].X_op
)
8379 /* Convert the constant operands in the t_insn to insnbuf.
8380 Return true if there is a symbol in the immediate field.
8382 Before this is called,
8383 1) the number of operands are correct
8384 2) the t_insn is a ITYPE_INSN
8385 3) ONLY the relaxable_ is built
8386 4) All operands are O_constant, O_symbol. All constants fit
8387 The return value tells whether there are any remaining O_symbols. */
8390 tinsn_to_insnbuf (t_insn
, insnbuf
)
8392 xtensa_insnbuf insnbuf
;
8394 xtensa_isa isa
= xtensa_default_isa
;
8395 xtensa_opcode opcode
= t_insn
->opcode
;
8396 bfd_boolean has_fixup
= FALSE
;
8397 int noperands
= xtensa_num_operands (isa
, opcode
);
8403 assert (t_insn
->insn_type
== ITYPE_INSN
);
8404 if (noperands
!= t_insn
->ntok
)
8405 as_fatal (_("operand number mismatch"));
8407 xtensa_encode_insn (isa
, opcode
, insnbuf
);
8409 for (i
= 0; i
< noperands
; ++i
)
8411 expressionS
*expr
= &t_insn
->tok
[i
];
8412 xtensa_operand operand
= xtensa_get_operand (isa
, opcode
, i
);
8416 /* The register number has already been checked in
8417 expression_maybe_register, so we don't need to check here. */
8418 opnd_value
= expr
->X_add_number
;
8419 (void) xtensa_operand_encode (operand
, &opnd_value
);
8420 xtensa_operand_set_field (operand
, insnbuf
, opnd_value
);
8424 as_where (&file_name
, &line
);
8425 /* It is a constant and we called this function,
8426 then we have to try to fit it. */
8427 xtensa_insnbuf_set_operand (insnbuf
, opcode
, operand
,
8428 expr
->X_add_number
, file_name
, line
);
8441 /* Check the instruction arguments. Return true on failure. */
8444 tinsn_check_arguments (insn
)
8447 xtensa_isa isa
= xtensa_default_isa
;
8448 xtensa_opcode opcode
= insn
->opcode
;
8450 if (opcode
== XTENSA_UNDEFINED
)
8452 as_bad (_("invalid opcode"));
8456 if (xtensa_num_operands (isa
, opcode
) > insn
->ntok
)
8458 as_bad (_("too few operands"));
8462 if (xtensa_num_operands (isa
, opcode
) < insn
->ntok
)
8464 as_bad (_("too many operands"));
8471 /* Load an instruction from its encoded form. */
8474 tinsn_from_chars (t_insn
, f
)
8478 static xtensa_insnbuf insnbuf
= NULL
;
8480 xtensa_opcode opcode
;
8481 xtensa_isa isa
= xtensa_default_isa
;
8484 insnbuf
= xtensa_insnbuf_alloc (isa
);
8486 xtensa_insnbuf_from_chars (isa
, insnbuf
, f
);
8487 opcode
= xtensa_decode_insn (isa
, insnbuf
);
8489 /* Find the immed. */
8490 tinsn_init (t_insn
);
8491 t_insn
->insn_type
= ITYPE_INSN
;
8492 t_insn
->is_specific_opcode
= FALSE
; /* Must not be specific. */
8493 t_insn
->opcode
= opcode
;
8494 t_insn
->ntok
= xtensa_num_operands (isa
, opcode
);
8495 for (i
= 0; i
< t_insn
->ntok
; i
++)
8497 set_expr_const (&t_insn
->tok
[i
],
8498 xtensa_insnbuf_get_operand (insnbuf
, opcode
, i
));
8503 /* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
8506 tinsn_immed_from_frag (t_insn
, fragP
)
8510 xtensa_opcode opcode
= t_insn
->opcode
;
8513 if (fragP
->fr_symbol
)
8515 opnum
= get_relaxable_immed (opcode
);
8516 set_expr_symbol_offset (&t_insn
->tok
[opnum
],
8517 fragP
->fr_symbol
, fragP
->fr_offset
);
8523 get_num_stack_text_bytes (istack
)
8529 for (i
= 0; i
< istack
->ninsn
; i
++)
8531 TInsn
*t_insn
= &istack
->insn
[i
];
8532 if (t_insn
->insn_type
== ITYPE_INSN
)
8533 text_bytes
+= xg_get_insn_size (t_insn
);
8540 get_num_stack_literal_bytes (istack
)
8546 for (i
= 0; i
< istack
->ninsn
; i
++)
8548 TInsn
*t_insn
= &istack
->insn
[i
];
8550 if (t_insn
->insn_type
== ITYPE_LITERAL
&& t_insn
->ntok
== 1)
8557 /* Expression utilities. */
8559 /* Return true if the expression is an integer constant. */
8563 const expressionS
*s
;
8565 return (s
->X_op
== O_constant
);
8569 /* Get the expression constant.
8570 Calling this is illegal if expr_is_const () returns true. */
8574 const expressionS
*s
;
8576 assert (expr_is_const (s
));
8577 return s
->X_add_number
;
8581 /* Set the expression to a constant value. */
8584 set_expr_const (s
, val
)
8588 s
->X_op
= O_constant
;
8589 s
->X_add_number
= val
;
8590 s
->X_add_symbol
= NULL
;
8591 s
->X_op_symbol
= NULL
;
8595 /* Set the expression to a symbol + constant offset. */
8598 set_expr_symbol_offset (s
, sym
, offset
)
8604 s
->X_add_symbol
= sym
;
8605 s
->X_op_symbol
= NULL
; /* unused */
8606 s
->X_add_number
= offset
;
8611 expr_is_equal (s1
, s2
)
8615 if (s1
->X_op
!= s2
->X_op
)
8617 if (s1
->X_add_symbol
!= s2
->X_add_symbol
)
8619 if (s1
->X_op_symbol
!= s2
->X_op_symbol
)
8621 if (s1
->X_add_number
!= s2
->X_add_number
)
8628 copy_expr (dst
, src
)
8630 const expressionS
*src
;
8632 memcpy (dst
, src
, sizeof (expressionS
));
8636 /* Support for Tensilica's "--rename-section" option. */
8638 #ifdef XTENSA_SECTION_RENAME
8640 struct rename_section_struct
8644 struct rename_section_struct
*next
;
8647 static struct rename_section_struct
*section_rename
;
8650 /* Parse the string oldname=new_name:oldname2=new_name2
8651 and call add_section_rename. */
8654 build_section_rename (arg
)
8657 char *this_arg
= NULL
;
8658 char *next_arg
= NULL
;
8660 for (this_arg
= strdup (arg
); this_arg
!= NULL
; this_arg
= next_arg
)
8664 next_arg
= strchr (this_arg
, ':');
8672 char *old_name
= this_arg
;
8673 char *new_name
= strchr (this_arg
, '=');
8675 if (*old_name
== '\0')
8677 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
8680 if (!new_name
|| new_name
[1] == '\0')
8682 as_warn (_("ignoring invalid '-rename-section' "
8683 "specification: '%s'"), old_name
);
8688 add_section_rename (old_name
, new_name
);
8695 add_section_rename (old_name
, new_name
)
8699 struct rename_section_struct
*r
= section_rename
;
8701 /* Check for invalid section renaming. */
8702 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
8704 if (strcmp (r
->old_name
, old_name
) == 0)
8705 as_bad (_("section %s renamed multiple times"), old_name
);
8706 if (strcmp (r
->new_name
, new_name
) == 0)
8707 as_bad (_("multiple sections remapped to output section %s"),
8712 r
= (struct rename_section_struct
*)
8713 xmalloc (sizeof (struct rename_section_struct
));
8714 r
->old_name
= strdup (old_name
);
8715 r
->new_name
= strdup (new_name
);
8716 r
->next
= section_rename
;
8722 xtensa_section_rename (name
)
8725 struct rename_section_struct
*r
= section_rename
;
8727 for (r
= section_rename
; r
!= NULL
; r
= r
->next
)
8728 if (strcmp (r
->old_name
, name
) == 0)
8734 #endif /* XTENSA_SECTION_RENAME */