gas/doc/c-h8500.texi

   1 @c Copyright (C) 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
   2 @c This is part of the GAS manual.
   3 @c For copying conditions, see the file as.texinfo.
   4 @page
   5 @node H8/500-Dependent
   6 @chapter H8/500 Dependent Features
   7
   8 @cindex H8/500 support
   9 @menu
  10 * H8/500 Options::              Options
  11 * H8/500 Syntax::               Syntax
  12 * H8/500 Floating Point::       Floating Point
  13 * H8/500 Directives::           H8/500 Machine Directives
  14 * H8/500 Opcodes::              Opcodes
  15 @end menu
  16
  17 @node H8/500 Options
  18 @section Options
  19
  20 @cindex H8/500 options (none)
  21 @cindex options, H8/500 (none)
  22 @code{@value{AS}} has no additional command-line options for the Hitachi
  23 H8/500 family.
  24
  25 @node H8/500 Syntax
  26 @section Syntax
  27
  28 @menu
  29 * H8/500-Chars::                Special Characters
  30 * H8/500-Regs::                 Register Names
  31 * H8/500-Addressing::           Addressing Modes
  32 @end menu
  33
  34 @node H8/500-Chars
  35 @subsection Special Characters
  36
  37 @cindex line comment character, H8/500
  38 @cindex H8/500 line comment character
  39 @samp{!} is the line comment character.
  40
  41 @cindex line separator, H8/500
  42 @cindex statement separator, H8/500
  43 @cindex H8/500 line separator
  44 @samp{;} can be used instead of a newline to separate statements.
  45
  46 @cindex symbol names, @samp{$} in
  47 @cindex @code{$} in symbol names
  48 Since @samp{$} has no special meaning, you may use it in symbol names.
  49
  50 @node H8/500-Regs
  51 @subsection Register Names
  52
  53 @cindex H8/500 registers
  54 @cindex registers, H8/500
  55 You can use the predefined symbols @samp{r0}, @samp{r1}, @samp{r2},
  56 @samp{r3}, @samp{r4}, @samp{r5}, @samp{r6}, and @samp{r7} to refer to
  57 the H8/500 registers.
  58
  59 The H8/500 also has these control registers:
  60
  61 @table @code
  62 @item cp
  63 code pointer
  64
  65 @item dp
  66 data pointer
  67
  68 @item bp
  69 base pointer
  70
  71 @item tp
  72 stack top pointer
  73
  74 @item ep
  75 extra pointer
  76
  77 @item sr
  78 status register
  79
  80 @item ccr
  81 condition code register
  82 @end table
  83
  84 All registers are 16 bits long.  To represent 32 bit numbers, use two
  85 adjacent registers; for distant memory addresses, use one of the segment
  86 pointers (@code{cp} for the program counter; @code{dp} for
  87 @code{r0}--@code{r3}; @code{ep} for @code{r4} and @code{r5}; and
  88 @code{tp} for @code{r6} and @code{r7}.
  89
  90 @node H8/500-Addressing
  91 @subsection Addressing Modes
  92
  93 @cindex addressing modes, H8/500
  94 @cindex H8/500 addressing modes
  95 @value{AS} understands the following addressing modes for the H8/500:
  96 @table @code
  97 @item R@var{n}
  98 Register direct
  99
 100 @item @@R@var{n}
 101 Register indirect
 102
 103 @item @@(d:8, R@var{n})
 104 Register indirect with 8 bit signed displacement
 105
 106 @item @@(d:16, R@var{n})
 107 Register indirect with 16 bit signed displacement
 108
 109 @item @@-R@var{n}
 110 Register indirect with pre-decrement
 111
 112 @item @@R@var{n}+
 113 Register indirect with post-increment
 114
 115 @item @@@var{aa}:8
 116 8 bit absolute address
 117
 118 @item @@@var{aa}:16
 119 16 bit absolute address
 120
 121 @item #@var{xx}:8
 122 8 bit immediate
 123
 124 @item #@var{xx}:16
 125 16 bit immediate
 126 @end table
 127
 128 @node H8/500 Floating Point
 129 @section Floating Point
 130
 131 @cindex floating point, H8/500 (@sc{ieee})
 132 @cindex H8/500 floating point (@sc{ieee})
 133 The H8/500 family has no hardware floating point, but the @code{.float}
 134 directive generates @sc{ieee} floating-point numbers for compatibility
 135 with other development tools.
 136
 137 @node H8/500 Directives
 138 @section H8/500 Machine Directives
 139
 140 @cindex H8/500 machine directives (none)
 141 @cindex machine directives, H8/500 (none)
 142 @cindex @code{word} directive, H8/500
 143 @cindex @code{int} directive, H8/500
 144 @code{@value{AS}} has no machine-dependent directives for the H8/500.
 145 However, on this platform the @samp{.int} and @samp{.word} directives
 146 generate 16-bit numbers.
 147
 148 @node H8/500 Opcodes
 149 @section Opcodes
 150
 151 @cindex H8/500 opcode summary
 152 @cindex opcode summary, H8/500
 153 @cindex mnemonics, H8/500
 154 @cindex instruction summary, H8/500
 155 For detailed information on the H8/500 machine instruction set, see
 156 @cite{H8/500 Series Programming Manual} (Hitachi M21T001).
 157
 158 @code{@value{AS}} implements all the standard H8/500 opcodes.  No additional
 159 pseudo-instructions are needed on this family.
 160
 161 @ifset SMALL
 162 @c this table, due to the multi-col faking and hardcoded order, looks silly
 163 @c except in smallbook.  See comments below "@set SMALL" near top of this file.
 164
 165 The following table summarizes H8/500 opcodes and their operands:
 166
 167 @c Use @group if it ever works, instead of @page
 168 @page
 169 @smallexample
 170 @i{Legend:}
 171 abs8      @r{8-bit absolute address}
 172 abs16     @r{16-bit absolute address}
 173 abs24     @r{24-bit absolute address}
 174 crb       @r{@code{ccr}, @code{br}, @code{ep}, @code{dp}, @code{tp}, @code{dp}}
 175 disp8     @r{8-bit displacement}
 176 ea        @r{@code{rn}, @code{@@rn}, @code{@@(d:8, rn)}, @code{@@(d:16, rn)},}
 177           @r{@code{@@-rn}, @code{@@rn+}, @code{@@aa:8}, @code{@@aa:16},}
 178           @r{@code{#xx:8}, @code{#xx:16}}
 179 ea_mem    @r{@code{@@rn}, @code{@@(d:8, rn)}, @code{@@(d:16, rn)},}
 180           @r{@code{@@-rn}, @code{@@rn+}, @code{@@aa:8}, @code{@@aa:16}}
 181 ea_noimm  @r{@code{rn}, @code{@@rn}, @code{@@(d:8, rn)}, @code{@@(d:16, rn)},}
 182           @r{@code{@@-rn}, @code{@@rn+}, @code{@@aa:8}, @code{@@aa:16}}
 183 fp        r6
 184 imm4      @r{4-bit immediate data}
 185 imm8      @r{8-bit immediate data}
 186 imm16     @r{16-bit immediate data}
 187 pcrel8    @r{8-bit offset from program counter}
 188 pcrel16   @r{16-bit offset from program counter}
 189 qim       @r{@code{-2}, @code{-1}, @code{1}, @code{2}}
 190 rd        @r{any register}
 191 rs        @r{a register distinct from rd}
 192 rlist     @r{comma-separated list of registers in parentheses;}
 193           @r{register ranges @code{rd-rs} are allowed}
 194 sp        @r{stack pointer (@code{r7})}
 195 sr        @r{status register}
 196 sz        @r{size; @samp{.b} or @samp{.w}.  If omitted, default @samp{.w}}
 197
 198 ldc[.b] ea,crb                 bcc[.w] pcrel16
 199 ldc[.w] ea,sr                  bcc[.b] pcrel8
 200 add[:q] sz qim,ea_noimm        bhs[.w] pcrel16
 201 add[:g] sz ea,rd               bhs[.b] pcrel8
 202 adds sz ea,rd                  bcs[.w] pcrel16
 203 addx sz ea,rd                  bcs[.b] pcrel8
 204 and sz ea,rd                   blo[.w] pcrel16
 205 andc[.b] imm8,crb              blo[.b] pcrel8
 206 andc[.w] imm16,sr              bne[.w] pcrel16
 207 bpt                            bne[.b] pcrel8
 208 bra[.w] pcrel16                beq[.w] pcrel16
 209 bra[.b] pcrel8                 beq[.b] pcrel8
 210 bt[.w] pcrel16                 bvc[.w] pcrel16
 211 bt[.b] pcrel8                  bvc[.b] pcrel8
 212 brn[.w] pcrel16                bvs[.w] pcrel16
 213 brn[.b] pcrel8                 bvs[.b] pcrel8
 214 bf[.w] pcrel16                 bpl[.w] pcrel16
 215 bf[.b] pcrel8                  bpl[.b] pcrel8
 216 bhi[.w] pcrel16                bmi[.w] pcrel16
 217 bhi[.b] pcrel8                 bmi[.b] pcrel8
 218 bls[.w] pcrel16                bge[.w] pcrel16
 219 bls[.b] pcrel8                 bge[.b] pcrel8
 220 @page
 221 blt[.w] pcrel16                mov[:g][.b] imm8,ea_mem
 222 blt[.b] pcrel8                 mov[:g][.w] imm16,ea_mem
 223 bgt[.w] pcrel16                movfpe[.b] ea,rd
 224 bgt[.b] pcrel8                 movtpe[.b] rs,ea_noimm
 225 ble[.w] pcrel16                mulxu sz ea,rd
 226 ble[.b] pcrel8                 neg sz ea
 227 bclr sz imm4,ea_noimm          nop
 228 bclr sz rs,ea_noimm            not sz ea
 229 bnot sz imm4,ea_noimm          or sz ea,rd
 230 bnot sz rs,ea_noimm            orc[.b] imm8,crb
 231 bset sz imm4,ea_noimm          orc[.w] imm16,sr
 232 bset sz rs,ea_noimm            pjmp abs24
 233 bsr[.b] pcrel8                 pjmp @@rd
 234 bsr[.w] pcrel16                pjsr abs24
 235 btst sz imm4,ea_noimm          pjsr @@rd
 236 btst sz rs,ea_noimm            prtd imm8
 237 clr sz ea                      prtd imm16
 238 cmp[:e][.b] imm8,rd            prts
 239 cmp[:i][.w] imm16,rd           rotl sz ea
 240 cmp[:g].b imm8,ea_noimm        rotr sz ea
 241 cmp[:g][.w] imm16,ea_noimm     rotxl sz ea
 242 Cmp[:g] sz ea,rd               rotxr sz ea
 243 dadd rs,rd                     rtd imm8
 244 divxu sz ea,rd                 rtd imm16
 245 dsub rs,rd                     rts
 246 exts[.b] rd                    scb/f rs,pcrel8
 247 extu[.b] rd                    scb/ne rs,pcrel8
 248 jmp @@rd                        scb/eq rs,pcrel8
 249 jmp @@(imm8,rd)                 shal sz ea
 250 jmp @@(imm16,rd)                shar sz ea
 251 jmp abs16                      shll sz ea
 252 jsr @@rd                        shlr sz ea
 253 jsr @@(imm8,rd)                 sleep
 254 jsr @@(imm16,rd)                stc[.b] crb,ea_noimm
 255 jsr abs16                      stc[.w] sr,ea_noimm
 256 ldm @@sp+,(rlist)               stm (rlist),@@-sp
 257 link fp,imm8                   sub sz ea,rd
 258 link fp,imm16                  subs sz ea,rd
 259 mov[:e][.b] imm8,rd            subx sz ea,rd
 260 mov[:i][.w] imm16,rd           swap[.b] rd
 261 mov[:l][.w] abs8,rd            tas[.b] ea
 262 mov[:l].b abs8,rd              trapa imm4
 263 mov[:s][.w] rs,abs8            trap/vs
 264 mov[:s].b rs,abs8              tst sz ea
 265 mov[:f][.w] @@(disp8,fp),rd     unlk fp
 266 mov[:f][.w] rs,@@(disp8,fp)     xch[.w] rs,rd
 267 mov[:f].b @@(disp8,fp),rd       xor sz ea,rd
 268 mov[:f].b rs,@@(disp8,fp)       xorc.b imm8,crb
 269 mov[:g] sz rs,ea_mem           xorc.w imm16,sr
 270 mov[:g] sz ea,rd
 271 @end smallexample
 272 @end ifset