gas/doc/c-m68k.texi

   1 @c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
   2 @c This is part of the GAS manual.
   3 @c For copying conditions, see the file as.texinfo.
   4 @ifset GENERIC
   5 @page
   6 @node M68K-Dependent
   7 @chapter M680x0 Dependent Features
   8 @end ifset
   9 @ifclear GENERIC
  10 @node Machine Dependencies
  11 @chapter M680x0 Dependent Features
  12 @end ifclear
  13
  14 @cindex M680x0 support
  15 @menu
  16 * M68K-Opts::                   M680x0 Options
  17 * M68K-Syntax::                 Syntax
  18 * M68K-Moto-Syntax::            Motorola Syntax
  19 * M68K-Float::                  Floating Point
  20 * M68K-Directives::             680x0 Machine Directives
  21 * M68K-opcodes::                Opcodes
  22 @end menu
  23
  24 @node M68K-Opts
  25 @section M680x0 Options
  26
  27 @cindex options, M680x0
  28 @cindex M680x0 options
  29 The Motorola 680x0 version of @code{@value{AS}} has a few machine
  30 dependent options.
  31
  32 @cindex @samp{-l} option, M680x0
  33 You can use the @samp{-l} option to shorten the size of references to undefined
  34 symbols.  If you do not use the @samp{-l} option, references to undefined
  35 symbols are wide enough for a full @code{long} (32 bits).  (Since
  36 @code{@value{AS}} cannot know where these symbols end up, @code{@value{AS}} can
  37 only allocate space for the linker to fill in later.  Since @code{@value{AS}}
  38 does not know how far away these symbols are, it allocates as much space as it
  39 can.)  If you use this option, the references are only one word wide (16 bits).
  40 This may be useful if you want the object file to be as small as possible, and
  41 you know that the relevant symbols are always less than 17 bits away.
  42
  43 @cindex @samp{--register-prefix-optional} option, M680x0
  44 For some configurations, especially those where the compiler normally
  45 does not prepend an underscore to the names of user variables, the
  46 assembler requires a @samp{%} before any use of a register name.  This
  47 is intended to let the assembler distinguish between C variables and
  48 functions named @samp{a0} through @samp{a7}, and so on.  The @samp{%} is
  49 always accepted, but is not required for certain configurations, notably
  50 @samp{sun3}.  The @samp{--register-prefix-optional} option may be used
  51 to permit omitting the @samp{%} even for configurations for which it is
  52 normally required.  If this is done, it will generally be impossible to
  53 refer to C variables and functions with the same names as register
  54 names.
  55
  56 @cindex @samp{--bitwise-or} option, M680x0
  57 Normally the character @samp{|} is treated as a comment character, which
  58 means that it can not be used in expressions.  The @samp{--bitwise-or}
  59 option turns @samp{|} into a normal character.  In this mode, you must
  60 either use C style comments, or start comments with a @samp{#} character
  61 at the beginning of a line.
  62
  63 @cindex @samp{--base-size-default-16}
  64 @cindex @samp{--base-size-default-32}
  65 If you use an addressing mode with a base register without specifying
  66 the size, @code{@value{AS}} will normally use the full 32 bit value.
  67 For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to
  68 @samp{%a0@@(%d0:l)}.  You may use the @samp{--base-size-default-16}
  69 option to tell @code{@value{AS}} to default to using the 16 bit value.
  70 In this case, @samp{%a0@@(%d0)} is equivalent to @samp{%a0@@(%d0:w)}.
  71 You may use the @samp{--base-size-default-32} option to restore the
  72 default behaviour.
  73
  74 @cindex @samp{--disp-size-default-16}
  75 @cindex @samp{--disp-size-default-32}
  76 If you use an addressing mode with a displacement, and the value of the
  77 displacement is not known, @code{@value{AS}} will normally assume that
  78 the value is 32 bits.  For example, if the symbol @samp{disp} has not
  79 been defined, @code{@value{AS}} will assemble the addressing mode
  80 @samp{%a0@@(disp,%d0)} as though @samp{disp} is a 32 bit value.  You may
  81 use the @samp{--disp-size-default-16} option to tell @code{@value{AS}}
  82 to instead assume that the displacement is 16 bits.  In this case,
  83 @code{@value{AS}} will assemble @samp{%a0@@(disp,%d0)} as though
  84 @samp{disp} is a 16 bit value.  You may use the
  85 @samp{--disp-size-default-32} option to restore the default behaviour.
  86
  87 @cindex @samp{-m68000} and related options
  88 @cindex architecture options, M680x0
  89 @cindex M680x0 architecture options
  90 @code{@value{AS}} can assemble code for several different members of the
  91 Motorola 680x0 family.  The default depends upon how @code{@value{AS}}
  92 was configured when it was built; normally, the default is to assemble
  93 code for the 68020 microprocessor.  The following options may be used to
  94 change the default.  These options control which instructions and
  95 addressing modes are permitted.  The members of the 680x0 family are
  96 very similar.  For detailed information about the differences, see the
  97 Motorola manuals.
  98
  99 @table @samp
 100 @item -m68000
 101 @itemx -m68ec000
 102 @itemx -m68hc000
 103 @itemx -m68hc001
 104 @itemx -m68008
 105 @itemx -m68302
 106 @itemx -m68306
 107 @itemx -m68307
 108 @itemx -m68322
 109 @itemx -m68356
 110 Assemble for the 68000. @samp{-m68008}, @samp{-m68302}, and so on are synonyms
 111 for @samp{-m68000}, since the chips are the same from the point of view
 112 of the assembler.
 113
 114 @item -m68010
 115 Assemble for the 68010.
 116
 117 @item -m68020
 118 @itemx -m68ec020
 119 Assemble for the 68020.  This is normally the default.
 120
 121 @item -m68030
 122 @itemx -m68ec030
 123 Assemble for the 68030.
 124
 125 @item -m68040
 126 @itemx -m68ec040
 127 Assemble for the 68040.
 128
 129 @item -m68060
 130 @itemx -m68ec060
 131 Assemble for the 68060.
 132
 133 @item -mcpu32
 134 @itemx -m68330
 135 @itemx -m68331
 136 @itemx -m68332
 137 @itemx -m68333
 138 @itemx -m68334
 139 @itemx -m68336
 140 @itemx -m68340
 141 @itemx -m68341
 142 @itemx -m68349
 143 @itemx -m68360
 144 Assemble for the CPU32 family of chips.
 145
 146 @item -m5200
 147 Assemble for the ColdFire family of chips.
 148
 149 @item -m68881
 150 @itemx -m68882
 151 Assemble 68881 floating point instructions.  This is the default for the
 152 68020, 68030, and the CPU32.  The 68040 and 68060 always support
 153 floating point instructions.
 154
 155 @item -mno-68881
 156 Do not assemble 68881 floating point instructions.  This is the default
 157 for 68000 and the 68010.  The 68040 and 68060 always support floating
 158 point instructions, even if this option is used.
 159
 160 @item -m68851
 161 Assemble 68851 MMU instructions.  This is the default for the 68020,
 162 68030, and 68060.  The 68040 accepts a somewhat different set of MMU
 163 instructions; @samp{-m68851} and @samp{-m68040} should not be used
 164 together.
 165
 166 @item -mno-68851
 167 Do not assemble 68851 MMU instructions.  This is the default for the
 168 68000, 68010, and the CPU32.  The 68040 accepts a somewhat different set
 169 of MMU instructions.
 170 @end table
 171
 172 @node M68K-Syntax
 173 @section Syntax
 174
 175 @cindex @sc{mit}
 176 This syntax for the Motorola 680x0 was developed at @sc{mit}.
 177
 178 @cindex M680x0 syntax
 179 @cindex syntax, M680x0
 180 @cindex M680x0 size modifiers
 181 @cindex size modifiers, M680x0
 182 The 680x0 version of @code{@value{AS}} uses instructions names and
 183 syntax compatible with the Sun assembler.  Intervening periods are
 184 ignored; for example, @samp{movl} is equivalent to @samp{mov.l}.
 185
 186 In the following table @var{apc} stands for any of the address registers
 187 (@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the
 188 zero-address relative to the program counter (@samp{%zpc}), a suppressed
 189 address register (@samp{%za0} through @samp{%za7}), or it may be omitted
 190 entirely.  The use of @var{size} means one of @samp{w} or @samp{l}, and
 191 it may be omitted, along with the leading colon, unless a scale is also
 192 specified.  The use of @var{scale} means one of @samp{1}, @samp{2},
 193 @samp{4}, or @samp{8}, and it may always be omitted along with the
 194 leading colon.
 195
 196 @cindex M680x0 addressing modes
 197 @cindex addressing modes, M680x0
 198 The following addressing modes are understood:
 199 @table @dfn
 200 @item Immediate
 201 @samp{#@var{number}}
 202
 203 @item Data Register
 204 @samp{%d0} through @samp{%d7}
 205
 206 @item Address Register
 207 @samp{%a0} through @samp{%a7}@*
 208 @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}
 209 is also known as @samp{%fp}, the Frame Pointer.
 210
 211 @item Address Register Indirect
 212 @samp{%a0@@} through @samp{%a7@@}
 213
 214 @item Address Register Postincrement
 215 @samp{%a0@@+} through @samp{%a7@@+}
 216
 217 @item Address Register Predecrement
 218 @samp{%a0@@-} through @samp{%a7@@-}
 219
 220 @item Indirect Plus Offset
 221 @samp{@var{apc}@@(@var{number})}
 222
 223 @item Index
 224 @samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})}
 225
 226 The @var{number} may be omitted.
 227
 228 @item Postindex
 229 @samp{@var{apc}@@(@var{number})@@(@var{onumber},@var{register}:@var{size}:@var{scale})}
 230
 231 The @var{onumber} or the @var{register}, but not both, may be omitted.
 232
 233 @item Preindex
 234 @samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})@@(@var{onumber})}
 235
 236 The @var{number} may be omitted.  Omitting the @var{register} produces
 237 the Postindex addressing mode.
 238
 239 @item Absolute
 240 @samp{@var{symbol}}, or @samp{@var{digits}}, optionally followed by
 241 @samp{:b}, @samp{:w}, or @samp{:l}.
 242 @end table
 243
 244 @node M68K-Moto-Syntax
 245 @section Motorola Syntax
 246
 247 @cindex Motorola syntax for the 680x0
 248 @cindex alternate syntax for the 680x0
 249
 250 The standard Motorola syntax for this chip differs from the syntax
 251 already discussed (@pxref{M68K-Syntax,,Syntax}).  @code{@value{AS}} can
 252 accept Motorola syntax for operands, even if @sc{mit} syntax is used for
 253 other operands in the same instruction.  The two kinds of syntax are
 254 fully compatible.
 255
 256 In the following table @var{apc} stands for any of the address registers
 257 (@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the
 258 zero-address relative to the program counter (@samp{%zpc}), or a
 259 suppressed address register (@samp{%za0} through @samp{%za7}).  The use
 260 of @var{size} means one of @samp{w} or @samp{l}, and it may always be
 261 omitted along with the leading dot.  The use of @var{scale} means one of
 262 @samp{1}, @samp{2}, @samp{4}, or @samp{8}, and it may always be omitted
 263 along with the leading asterisk.
 264
 265 The following additional addressing modes are understood:
 266
 267 @table @dfn
 268 @item Address Register Indirect
 269 @samp{(%a0)} through @samp{(%a7)}@*
 270 @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}
 271 is also known as @samp{%fp}, the Frame Pointer.
 272
 273 @item Address Register Postincrement
 274 @samp{(%a0)+} through @samp{(%a7)+}
 275
 276 @item Address Register Predecrement
 277 @samp{-(%a0)} through @samp{-(%a7)}
 278
 279 @item Indirect Plus Offset
 280 @samp{@var{number}(@var{%a0})} through @samp{@var{number}(@var{%a7})},
 281 or @samp{@var{number}(@var{%pc})}.
 282
 283 The @var{number} may also appear within the parentheses, as in
 284 @samp{(@var{number},@var{%a0})}.  When used with the @var{pc}, the
 285 @var{number} may be omitted (with an address register, omitting the
 286 @var{number} produces Address Register Indirect mode).
 287
 288 @item Index
 289 @samp{@var{number}(@var{apc},@var{register}.@var{size}*@var{scale})}
 290
 291 The @var{number} may be omitted, or it may appear within the
 292 parentheses.  The @var{apc} may be omitted.  The @var{register} and the
 293 @var{apc} may appear in either order.  If both @var{apc} and
 294 @var{register} are address registers, and the @var{size} and @var{scale}
 295 are omitted, then the first register is taken as the base register, and
 296 the second as the index register.
 297
 298 @item Postindex
 299 @samp{([@var{number},@var{apc}],@var{register}.@var{size}*@var{scale},@var{onumber})}
 300
 301 The @var{onumber}, or the @var{register}, or both, may be omitted.
 302 Either the @var{number} or the @var{apc} may be omitted, but not both.
 303
 304 @item Preindex
 305 @samp{([@var{number},@var{apc},@var{register}.@var{size}*@var{scale}],@var{onumber})}
 306
 307 The @var{number}, or the @var{apc}, or the @var{register}, or any two of
 308 them, may be omitted.  The @var{onumber} may be omitted.  The
 309 @var{register} and the @var{apc} may appear in either order.  If both
 310 @var{apc} and @var{register} are address registers, and the @var{size}
 311 and @var{scale} are omitted, then the first register is taken as the
 312 base register, and the second as the index register.
 313 @end table
 314
 315 @node M68K-Float
 316 @section Floating Point
 317
 318 @cindex floating point, M680x0
 319 @cindex M680x0 floating point
 320 Packed decimal (P) format floating literals are not supported.
 321 Feel free to add the code!
 322
 323 The floating point formats generated by directives are these.
 324
 325 @table @code
 326 @cindex @code{float} directive, M680x0
 327 @item .float
 328 @code{Single} precision floating point constants.
 329
 330 @cindex @code{double} directive, M680x0
 331 @item .double
 332 @code{Double} precision floating point constants.
 333
 334 @cindex @code{extend} directive M680x0
 335 @cindex @code{ldouble} directive M680x0
 336 @item .extend
 337 @itemx .ldouble
 338 @code{Extended} precision (@code{long double}) floating point constants.
 339 @end table
 340
 341 @node M68K-Directives
 342 @section 680x0 Machine Directives
 343
 344 @cindex M680x0 directives
 345 @cindex directives, M680x0
 346 In order to be compatible with the Sun assembler the 680x0 assembler
 347 understands the following directives.
 348
 349 @table @code
 350 @cindex @code{data1} directive, M680x0
 351 @item .data1
 352 This directive is identical to a @code{.data 1} directive.
 353
 354 @cindex @code{data2} directive, M680x0
 355 @item .data2
 356 This directive is identical to a @code{.data 2} directive.
 357
 358 @cindex @code{even} directive, M680x0
 359 @item .even
 360 This directive is a special case of the @code{.align} directive; it
 361 aligns the output to an even byte boundary.
 362
 363 @cindex @code{skip} directive, M680x0
 364 @item .skip
 365 This directive is identical to a @code{.space} directive.
 366 @end table
 367
 368 @need 2000
 369 @node M68K-opcodes
 370 @section Opcodes
 371
 372 @cindex M680x0 opcodes
 373 @cindex opcodes, M680x0
 374 @cindex instruction set, M680x0
 375 @c doc@cygnus.com: I don't see any point in the following
 376 @c                   paragraph.  Bugs are bugs; how does saying this
 377 @c                   help anyone?
 378 @ignore
 379 Danger:  Several bugs have been found in the opcode table (and
 380 fixed).  More bugs may exist.  Be careful when using obscure
 381 instructions.
 382 @end ignore
 383
 384 @menu
 385 * M68K-Branch::                 Branch Improvement
 386 * M68K-Chars::                  Special Characters
 387 @end menu
 388
 389 @node M68K-Branch
 390 @subsection Branch Improvement
 391
 392 @cindex pseudo-opcodes, M680x0
 393 @cindex M680x0 pseudo-opcodes
 394 @cindex branch improvement, M680x0
 395 @cindex M680x0 branch improvement
 396 Certain pseudo opcodes are permitted for branch instructions.
 397 They expand to the shortest branch instruction that reach the
 398 target.  Generally these mnemonics are made by substituting @samp{j} for
 399 @samp{b} at the start of a Motorola mnemonic.
 400
 401 The following table summarizes the pseudo-operations.  A @code{*} flags
 402 cases that are more fully described after the table:
 403
 404 @smallexample
 405           Displacement
 406           +-------------------------------------------------
 407           |                68020   68000/10
 408 Pseudo-Op |BYTE    WORD    LONG    LONG      non-PC relative
 409           +-------------------------------------------------
 410      jbsr |bsrs    bsr     bsrl    jsr       jsr
 411       jra |bras    bra     bral    jmp       jmp
 412 *     jXX |bXXs    bXX     bXXl    bNXs;jmpl bNXs;jmp
 413 *    dbXX |dbXX    dbXX        dbXX; bra; jmpl
 414 *    fjXX |fbXXw   fbXXw   fbXXl             fbNXw;jmp
 415
 416 XX: condition
 417 NX: negative of condition XX
 418
 419 @end smallexample
 420 @center @code{*}---see full description below
 421
 422 @table @code
 423 @item jbsr
 424 @itemx jra
 425 These are the simplest jump pseudo-operations; they always map to one
 426 particular machine instruction, depending on the displacement to the
 427 branch target.
 428
 429 @item j@var{XX}
 430 Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations,
 431 where @var{XX} is a conditional branch or condition-code test.  The full
 432 list of pseudo-ops in this family is:
 433 @smallexample
 434  jhi   jls   jcc   jcs   jne   jeq   jvc
 435  jvs   jpl   jmi   jge   jlt   jgt   jle
 436 @end smallexample
 437
 438 For the cases of non-PC relative displacements and long displacements on
 439 the 68000 or 68010, @code{@value{AS}} issues a longer code fragment in terms of
 440 @var{NX}, the opposite condition to @var{XX}.  For example, for the
 441 non-PC relative case:
 442 @smallexample
 443     j@var{XX} foo
 444 @end smallexample
 445 gives
 446 @smallexample
 447      b@var{NX}s oof
 448      jmp foo
 449  oof:
 450 @end smallexample
 451
 452 @item db@var{XX}
 453 The full family of pseudo-operations covered here is
 454 @smallexample
 455  dbhi   dbls   dbcc   dbcs   dbne   dbeq   dbvc
 456  dbvs   dbpl   dbmi   dbge   dblt   dbgt   dble
 457  dbf    dbra   dbt
 458 @end smallexample
 459
 460 Other than for word and byte displacements, when the source reads
 461 @samp{db@var{XX} foo}, @code{@value{AS}} emits
 462 @smallexample
 463      db@var{XX} oo1
 464      bra oo2
 465  oo1:jmpl foo
 466  oo2:
 467 @end smallexample
 468
 469 @item fj@var{XX}
 470 This family includes
 471 @smallexample
 472  fjne   fjeq   fjge   fjlt   fjgt   fjle   fjf
 473  fjt    fjgl   fjgle  fjnge  fjngl  fjngle fjngt
 474  fjnle  fjnlt  fjoge  fjogl  fjogt  fjole  fjolt
 475  fjor   fjseq  fjsf   fjsne  fjst   fjueq  fjuge
 476  fjugt  fjule  fjult  fjun
 477 @end smallexample
 478
 479 For branch targets that are not PC relative, @code{@value{AS}} emits
 480 @smallexample
 481      fb@var{NX} oof
 482      jmp foo
 483  oof:
 484 @end smallexample
 485 when it encounters @samp{fj@var{XX} foo}.
 486
 487 @end table
 488
 489 @node M68K-Chars
 490 @subsection Special Characters
 491
 492 @cindex special characters, M680x0
 493 @cindex M680x0 immediate character
 494 @cindex immediate character, M680x0
 495 @cindex M680x0 line comment character
 496 @cindex line comment character, M680x0
 497 @cindex comments, M680x0
 498 The immediate character is @samp{#} for Sun compatibility.  The
 499 line-comment character is @samp{|} (unless the @samp{--bitwise-or}
 500 option is used).  If a @samp{#} appears at the beginning of a line, it
 501 is treated as a comment unless it looks like @samp{# line file}, in
 502 which case it is treated normally.
 503