gas/doc/c-m68k.texi

   1 @c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
   2 @c This is part of the GAS manual.
   3 @c For copying conditions, see the file as.texinfo.
   4 @ifset GENERIC
   5 @page
   6 @node M68K-Dependent
   7 @chapter M680x0 Dependent Features
   8 @end ifset
   9 @ifclear GENERIC
  10 @node Machine Dependencies
  11 @chapter M680x0 Dependent Features
  12 @end ifclear
  13
  14 @cindex M680x0 support
  15 @menu
  16 * M68K-Opts::                   M680x0 Options
  17 * M68K-Syntax::                 Syntax
  18 * M68K-Moto-Syntax::            Motorola Syntax
  19 * M68K-Float::                  Floating Point
  20 * M68K-Directives::             680x0 Machine Directives
  21 * M68K-opcodes::                Opcodes
  22 @end menu
  23
  24 @node M68K-Opts
  25 @section M680x0 Options
  26
  27 @cindex options, M680x0
  28 @cindex M680x0 options
  29 The Motorola 680x0 version of @code{@value{AS}} has a few machine
  30 dependent options.
  31
  32 @cindex @samp{-l} option, M680x0
  33 You can use the @samp{-l} option to shorten the size of references to undefined
  34 symbols.  If you do not use the @samp{-l} option, references to undefined
  35 symbols are wide enough for a full @code{long} (32 bits).  (Since
  36 @code{@value{AS}} cannot know where these symbols end up, @code{@value{AS}} can
  37 only allocate space for the linker to fill in later.  Since @code{@value{AS}}
  38 does not know how far away these symbols are, it allocates as much space as it
  39 can.)  If you use this option, the references are only one word wide (16 bits).
  40 This may be useful if you want the object file to be as small as possible, and
  41 you know that the relevant symbols are always less than 17 bits away.
  42
  43 @cindex @samp{--register-prefix-optional} option, M680x0
  44 For some configurations, especially those where the compiler normally
  45 does not prepend an underscore to the names of user variables, the
  46 assembler requires a @samp{%} before any use of a register name.  This
  47 is intended to let the assembler distinguish between C variables and
  48 functions named @samp{a0} through @samp{a7}, and so on.  The @samp{%} is
  49 always accepted, but is not required for certain configurations, notably
  50 @samp{sun3}.  The @samp{--register-prefix-optional} option may be used
  51 to permit omitting the @samp{%} even for configurations for which it is
  52 normally required.  If this is done, it will generally be impossible to
  53 refer to C variables and functions with the same names as register
  54 names.
  55
  56 @cindex @samp{--bitwise-or} option, M680x0
  57 Normally the character @samp{|} is treated as a comment character, which
  58 means that it can not be used in expressions.  The @samp{--bitwise-or}
  59 option turns @samp{|} into a normal character.  In this mode, you must
  60 either use C style comments, or start comments with a @samp{#} character
  61 at the beginning of a line.
  62
  63 @cindex @samp{--base-size-default-16}
  64 @cindex @samp{--base-size-default-32}
  65 If you use an addressing mode with a base register without specifying
  66 the size, @code{@value{AS}} will normally use the full 32 bit value.
  67 For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to
  68 @samp{%a0@@(%d0:l)}.  You may use the @samp{--base-size-default-16}
  69 option to tell @code{@value{AS}} to default to using the 16 bit value.
  70 In this case, @samp{%a0@@(%d0)} is equivalent to @samp{%a0@@(%d0:w)}.
  71 You may use the @samp{--base-size-default-32} option to restore the
  72 default behaviour.
  73
  74 @cindex @samp{--disp-size-default-16}
  75 @cindex @samp{--disp-size-default-32}
  76 If you use an addressing mode with a displacement, and the value of the
  77 displacement is not known, @code{@value{AS}} will normally assume that
  78 the value is 32 bits.  For example, if the symbol @samp{disp} has not
  79 been defined, @code{@value{AS}} will assemble the addressing mode
  80 @samp{%a0@@(disp,%d0)} as though @samp{disp} is a 32 bit value.  You may
  81 use the @samp{--disp-size-default-16} option to tell @code{@value{AS}}
  82 to instead assume that the displacement is 16 bits.  In this case,
  83 @code{@value{AS}} will assemble @samp{%a0@@(disp,%d0)} as though
  84 @samp{disp} is a 16 bit value.  You may use the
  85 @samp{--disp-size-default-32} option to restore the default behaviour.
  86
  87 @cindex @samp{--pcrel}
  88 Always generate PC relative branches.  Actually what this option really
  89 does is to prevent PC relative branches from being turned into absolute
  90 jumps.  If this cannot be done (because the specific architecture does
  91 not have a suitable PC relative branch instruction), the assembler will
  92 generate an error message.
  93
  94 @cindex @samp{-m68000} and related options
  95 @cindex architecture options, M680x0
  96 @cindex M680x0 architecture options
  97 @code{@value{AS}} can assemble code for several different members of the
  98 Motorola 680x0 family.  The default depends upon how @code{@value{AS}}
  99 was configured when it was built; normally, the default is to assemble
 100 code for the 68020 microprocessor.  The following options may be used to
 101 change the default.  These options control which instructions and
 102 addressing modes are permitted.  The members of the 680x0 family are
 103 very similar.  For detailed information about the differences, see the
 104 Motorola manuals.
 105
 106 @table @samp
 107 @item -m68000
 108 @itemx -m68ec000
 109 @itemx -m68hc000
 110 @itemx -m68hc001
 111 @itemx -m68008
 112 @itemx -m68302
 113 @itemx -m68306
 114 @itemx -m68307
 115 @itemx -m68322
 116 @itemx -m68356
 117 Assemble for the 68000. @samp{-m68008}, @samp{-m68302}, and so on are synonyms
 118 for @samp{-m68000}, since the chips are the same from the point of view
 119 of the assembler.
 120
 121 @item -m68010
 122 Assemble for the 68010.
 123
 124 @item -m68020
 125 @itemx -m68ec020
 126 Assemble for the 68020.  This is normally the default.
 127
 128 @item -m68030
 129 @itemx -m68ec030
 130 Assemble for the 68030.
 131
 132 @item -m68040
 133 @itemx -m68ec040
 134 Assemble for the 68040.
 135
 136 @item -m68060
 137 @itemx -m68ec060
 138 Assemble for the 68060.
 139
 140 @item -mcpu32
 141 @itemx -m68330
 142 @itemx -m68331
 143 @itemx -m68332
 144 @itemx -m68333
 145 @itemx -m68334
 146 @itemx -m68336
 147 @itemx -m68340
 148 @itemx -m68341
 149 @itemx -m68349
 150 @itemx -m68360
 151 Assemble for the CPU32 family of chips.
 152
 153 @item -m5200
 154 Assemble for the ColdFire family of chips.
 155
 156 @item -m68881
 157 @itemx -m68882
 158 Assemble 68881 floating point instructions.  This is the default for the
 159 68020, 68030, and the CPU32.  The 68040 and 68060 always support
 160 floating point instructions.
 161
 162 @item -mno-68881
 163 Do not assemble 68881 floating point instructions.  This is the default
 164 for 68000 and the 68010.  The 68040 and 68060 always support floating
 165 point instructions, even if this option is used.
 166
 167 @item -m68851
 168 Assemble 68851 MMU instructions.  This is the default for the 68020,
 169 68030, and 68060.  The 68040 accepts a somewhat different set of MMU
 170 instructions; @samp{-m68851} and @samp{-m68040} should not be used
 171 together.
 172
 173 @item -mno-68851
 174 Do not assemble 68851 MMU instructions.  This is the default for the
 175 68000, 68010, and the CPU32.  The 68040 accepts a somewhat different set
 176 of MMU instructions.
 177 @end table
 178
 179 @node M68K-Syntax
 180 @section Syntax
 181
 182 @cindex @sc{mit}
 183 This syntax for the Motorola 680x0 was developed at @sc{mit}.
 184
 185 @cindex M680x0 syntax
 186 @cindex syntax, M680x0
 187 @cindex M680x0 size modifiers
 188 @cindex size modifiers, M680x0
 189 The 680x0 version of @code{@value{AS}} uses instructions names and
 190 syntax compatible with the Sun assembler.  Intervening periods are
 191 ignored; for example, @samp{movl} is equivalent to @samp{mov.l}.
 192
 193 In the following table @var{apc} stands for any of the address registers
 194 (@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the
 195 zero-address relative to the program counter (@samp{%zpc}), a suppressed
 196 address register (@samp{%za0} through @samp{%za7}), or it may be omitted
 197 entirely.  The use of @var{size} means one of @samp{w} or @samp{l}, and
 198 it may be omitted, along with the leading colon, unless a scale is also
 199 specified.  The use of @var{scale} means one of @samp{1}, @samp{2},
 200 @samp{4}, or @samp{8}, and it may always be omitted along with the
 201 leading colon.
 202
 203 @cindex M680x0 addressing modes
 204 @cindex addressing modes, M680x0
 205 The following addressing modes are understood:
 206 @table @dfn
 207 @item Immediate
 208 @samp{#@var{number}}
 209
 210 @item Data Register
 211 @samp{%d0} through @samp{%d7}
 212
 213 @item Address Register
 214 @samp{%a0} through @samp{%a7}@*
 215 @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}
 216 is also known as @samp{%fp}, the Frame Pointer.
 217
 218 @item Address Register Indirect
 219 @samp{%a0@@} through @samp{%a7@@}
 220
 221 @item Address Register Postincrement
 222 @samp{%a0@@+} through @samp{%a7@@+}
 223
 224 @item Address Register Predecrement
 225 @samp{%a0@@-} through @samp{%a7@@-}
 226
 227 @item Indirect Plus Offset
 228 @samp{@var{apc}@@(@var{number})}
 229
 230 @item Index
 231 @samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})}
 232
 233 The @var{number} may be omitted.
 234
 235 @item Postindex
 236 @samp{@var{apc}@@(@var{number})@@(@var{onumber},@var{register}:@var{size}:@var{scale})}
 237
 238 The @var{onumber} or the @var{register}, but not both, may be omitted.
 239
 240 @item Preindex
 241 @samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})@@(@var{onumber})}
 242
 243 The @var{number} may be omitted.  Omitting the @var{register} produces
 244 the Postindex addressing mode.
 245
 246 @item Absolute
 247 @samp{@var{symbol}}, or @samp{@var{digits}}, optionally followed by
 248 @samp{:b}, @samp{:w}, or @samp{:l}.
 249 @end table
 250
 251 @node M68K-Moto-Syntax
 252 @section Motorola Syntax
 253
 254 @cindex Motorola syntax for the 680x0
 255 @cindex alternate syntax for the 680x0
 256
 257 The standard Motorola syntax for this chip differs from the syntax
 258 already discussed (@pxref{M68K-Syntax,,Syntax}).  @code{@value{AS}} can
 259 accept Motorola syntax for operands, even if @sc{mit} syntax is used for
 260 other operands in the same instruction.  The two kinds of syntax are
 261 fully compatible.
 262
 263 In the following table @var{apc} stands for any of the address registers
 264 (@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the
 265 zero-address relative to the program counter (@samp{%zpc}), or a
 266 suppressed address register (@samp{%za0} through @samp{%za7}).  The use
 267 of @var{size} means one of @samp{w} or @samp{l}, and it may always be
 268 omitted along with the leading dot.  The use of @var{scale} means one of
 269 @samp{1}, @samp{2}, @samp{4}, or @samp{8}, and it may always be omitted
 270 along with the leading asterisk.
 271
 272 The following additional addressing modes are understood:
 273
 274 @table @dfn
 275 @item Address Register Indirect
 276 @samp{(%a0)} through @samp{(%a7)}@*
 277 @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}
 278 is also known as @samp{%fp}, the Frame Pointer.
 279
 280 @item Address Register Postincrement
 281 @samp{(%a0)+} through @samp{(%a7)+}
 282
 283 @item Address Register Predecrement
 284 @samp{-(%a0)} through @samp{-(%a7)}
 285
 286 @item Indirect Plus Offset
 287 @samp{@var{number}(@var{%a0})} through @samp{@var{number}(@var{%a7})},
 288 or @samp{@var{number}(@var{%pc})}.
 289
 290 The @var{number} may also appear within the parentheses, as in
 291 @samp{(@var{number},@var{%a0})}.  When used with the @var{pc}, the
 292 @var{number} may be omitted (with an address register, omitting the
 293 @var{number} produces Address Register Indirect mode).
 294
 295 @item Index
 296 @samp{@var{number}(@var{apc},@var{register}.@var{size}*@var{scale})}
 297
 298 The @var{number} may be omitted, or it may appear within the
 299 parentheses.  The @var{apc} may be omitted.  The @var{register} and the
 300 @var{apc} may appear in either order.  If both @var{apc} and
 301 @var{register} are address registers, and the @var{size} and @var{scale}
 302 are omitted, then the first register is taken as the base register, and
 303 the second as the index register.
 304
 305 @item Postindex
 306 @samp{([@var{number},@var{apc}],@var{register}.@var{size}*@var{scale},@var{onumber})}
 307
 308 The @var{onumber}, or the @var{register}, or both, may be omitted.
 309 Either the @var{number} or the @var{apc} may be omitted, but not both.
 310
 311 @item Preindex
 312 @samp{([@var{number},@var{apc},@var{register}.@var{size}*@var{scale}],@var{onumber})}
 313
 314 The @var{number}, or the @var{apc}, or the @var{register}, or any two of
 315 them, may be omitted.  The @var{onumber} may be omitted.  The
 316 @var{register} and the @var{apc} may appear in either order.  If both
 317 @var{apc} and @var{register} are address registers, and the @var{size}
 318 and @var{scale} are omitted, then the first register is taken as the
 319 base register, and the second as the index register.
 320 @end table
 321
 322 @node M68K-Float
 323 @section Floating Point
 324
 325 @cindex floating point, M680x0
 326 @cindex M680x0 floating point
 327 Packed decimal (P) format floating literals are not supported.
 328 Feel free to add the code!
 329
 330 The floating point formats generated by directives are these.
 331
 332 @table @code
 333 @cindex @code{float} directive, M680x0
 334 @item .float
 335 @code{Single} precision floating point constants.
 336
 337 @cindex @code{double} directive, M680x0
 338 @item .double
 339 @code{Double} precision floating point constants.
 340
 341 @cindex @code{extend} directive M680x0
 342 @cindex @code{ldouble} directive M680x0
 343 @item .extend
 344 @itemx .ldouble
 345 @code{Extended} precision (@code{long double}) floating point constants.
 346 @end table
 347
 348 @node M68K-Directives
 349 @section 680x0 Machine Directives
 350
 351 @cindex M680x0 directives
 352 @cindex directives, M680x0
 353 In order to be compatible with the Sun assembler the 680x0 assembler
 354 understands the following directives.
 355
 356 @table @code
 357 @cindex @code{data1} directive, M680x0
 358 @item .data1
 359 This directive is identical to a @code{.data 1} directive.
 360
 361 @cindex @code{data2} directive, M680x0
 362 @item .data2
 363 This directive is identical to a @code{.data 2} directive.
 364
 365 @cindex @code{even} directive, M680x0
 366 @item .even
 367 This directive is a special case of the @code{.align} directive; it
 368 aligns the output to an even byte boundary.
 369
 370 @cindex @code{skip} directive, M680x0
 371 @item .skip
 372 This directive is identical to a @code{.space} directive.
 373 @end table
 374
 375 @need 2000
 376 @node M68K-opcodes
 377 @section Opcodes
 378
 379 @cindex M680x0 opcodes
 380 @cindex opcodes, M680x0
 381 @cindex instruction set, M680x0
 382 @c doc@cygnus.com: I don't see any point in the following
 383 @c                   paragraph.  Bugs are bugs; how does saying this
 384 @c                   help anyone?
 385 @ignore
 386 Danger:  Several bugs have been found in the opcode table (and
 387 fixed).  More bugs may exist.  Be careful when using obscure
 388 instructions.
 389 @end ignore
 390
 391 @menu
 392 * M68K-Branch::                 Branch Improvement
 393 * M68K-Chars::                  Special Characters
 394 @end menu
 395
 396 @node M68K-Branch
 397 @subsection Branch Improvement
 398
 399 @cindex pseudo-opcodes, M680x0
 400 @cindex M680x0 pseudo-opcodes
 401 @cindex branch improvement, M680x0
 402 @cindex M680x0 branch improvement
 403 Certain pseudo opcodes are permitted for branch instructions.
 404 They expand to the shortest branch instruction that reach the
 405 target.  Generally these mnemonics are made by substituting @samp{j} for
 406 @samp{b} at the start of a Motorola mnemonic.
 407
 408 The following table summarizes the pseudo-operations.  A @code{*} flags
 409 cases that are more fully described after the table:
 410
 411 @smallexample
 412           Displacement
 413           +-------------------------------------------------
 414           |                68020   68000/10
 415 Pseudo-Op |BYTE    WORD    LONG    LONG      non-PC relative
 416           +-------------------------------------------------
 417      jbsr |bsrs    bsr     bsrl    jsr       jsr
 418       jra |bras    bra     bral    jmp       jmp
 419 *     jXX |bXXs    bXX     bXXl    bNXs;jmpl bNXs;jmp
 420 *    dbXX |dbXX    dbXX        dbXX; bra; jmpl
 421 *    fjXX |fbXXw   fbXXw   fbXXl             fbNXw;jmp
 422
 423 XX: condition
 424 NX: negative of condition XX
 425
 426 @end smallexample
 427 @center @code{*}---see full description below
 428
 429 @table @code
 430 @item jbsr
 431 @itemx jra
 432 These are the simplest jump pseudo-operations; they always map to one
 433 particular machine instruction, depending on the displacement to the
 434 branch target.
 435
 436 @item j@var{XX}
 437 Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations,
 438 where @var{XX} is a conditional branch or condition-code test.  The full
 439 list of pseudo-ops in this family is:
 440 @smallexample
 441  jhi   jls   jcc   jcs   jne   jeq   jvc
 442  jvs   jpl   jmi   jge   jlt   jgt   jle
 443 @end smallexample
 444
 445 For the cases of non-PC relative displacements and long displacements on
 446 the 68000 or 68010, @code{@value{AS}} issues a longer code fragment in terms of
 447 @var{NX}, the opposite condition to @var{XX}.  For example, for the
 448 non-PC relative case:
 449 @smallexample
 450     j@var{XX} foo
 451 @end smallexample
 452 gives
 453 @smallexample
 454      b@var{NX}s oof
 455      jmp foo
 456  oof:
 457 @end smallexample
 458
 459 @item db@var{XX}
 460 The full family of pseudo-operations covered here is
 461 @smallexample
 462  dbhi   dbls   dbcc   dbcs   dbne   dbeq   dbvc
 463  dbvs   dbpl   dbmi   dbge   dblt   dbgt   dble
 464  dbf    dbra   dbt
 465 @end smallexample
 466
 467 Other than for word and byte displacements, when the source reads
 468 @samp{db@var{XX} foo}, @code{@value{AS}} emits
 469 @smallexample
 470      db@var{XX} oo1
 471      bra oo2
 472  oo1:jmpl foo
 473  oo2:
 474 @end smallexample
 475
 476 @item fj@var{XX}
 477 This family includes
 478 @smallexample
 479  fjne   fjeq   fjge   fjlt   fjgt   fjle   fjf
 480  fjt    fjgl   fjgle  fjnge  fjngl  fjngle fjngt
 481  fjnle  fjnlt  fjoge  fjogl  fjogt  fjole  fjolt
 482  fjor   fjseq  fjsf   fjsne  fjst   fjueq  fjuge
 483  fjugt  fjule  fjult  fjun
 484 @end smallexample
 485
 486 For branch targets that are not PC relative, @code{@value{AS}} emits
 487 @smallexample
 488      fb@var{NX} oof
 489      jmp foo
 490  oof:
 491 @end smallexample
 492 when it encounters @samp{fj@var{XX} foo}.
 493
 494 @end table
 495
 496 @node M68K-Chars
 497 @subsection Special Characters
 498
 499 @cindex special characters, M680x0
 500 @cindex M680x0 immediate character
 501 @cindex immediate character, M680x0
 502 @cindex M680x0 line comment character
 503 @cindex line comment character, M680x0
 504 @cindex comments, M680x0
 505 The immediate character is @samp{#} for Sun compatibility.  The
 506 line-comment character is @samp{|} (unless the @samp{--bitwise-or}
 507 option is used).  If a @samp{#} appears at the beginning of a line, it
 508 is treated as a comment unless it looks like @samp{# line file}, in
 509 which case it is treated normally.
 510