gas/doc/c-sh64.texi

   1 @c Copyright (C) 2001, 2002 Free Software Foundation, Inc.
   2 @c This is part of the GAS manual.
   3 @c For copying conditions, see the file as.texinfo.
   4 @page
   5 @node SH64-Dependent
   6 @chapter SuperH SH64 Dependent Features
   7
   8 @cindex SH64 support
   9 @menu
  10 * SH64 Options::              Options
  11 * SH64 Syntax::               Syntax
  12 * SH64 Directives::           SH64 Machine Directives
  13 * SH64 Opcodes::              Opcodes
  14 @end menu
  15
  16 @node SH64 Options
  17 @section Options
  18
  19 @cindex SH64 options
  20 @cindex options, SH64
  21 @table @code
  22
  23 @cindex SH64 ISA options
  24 @cindex ISA options, SH64
  25 @item -isa=shmedia | -isa=shcompact
  26 Specify the default instruction set.  @code{SHmedia} specifies the
  27 32-bit opcodes, and @code{SHcompact} specifies the 16-bit opcodes
  28 compatible with previous SH families.  The default depends on the ABI
  29 selected; the default for the 64-bit ABI is SHmedia, and the default for
  30 the 32-bit ABI is SHcompact.  If neither the ABI nor the ISA is
  31 specified, the default is 32-bit SHcompact.
  32
  33 Note that the @code{.mode} pseudo-op is not permitted if the ISA is not
  34 specified on the command line.
  35
  36 @cindex SH64 ABI options
  37 @cindex ABI options, SH64
  38 @item -abi=32 | -abi=64
  39 Specify the default ABI.  If the ISA is specified and the ABI is not,
  40 the default ABI depends on the ISA, with SHmedia defaulting to 64-bit
  41 and SHcompact defaulting to 32-bit.
  42
  43 Note that the @code{.abi} pseudo-op is not permitted if the ABI is not
  44 specified on the command line.  When the ABI is specified on the command
  45 line, any @code{.abi} pseudo-ops in the source must match it.
  46
  47 @item -shcompact-const-crange
  48 Emit code-range descriptors for constants in SHcompact code sections.
  49
  50 @item -no-mix
  51 Disallow SHmedia code in the same section as constants and SHcompact
  52 code.
  53
  54 @item -no-expand
  55 Do not expand MOVI, PT, PTA or PTB instructions.
  56
  57 @item -expand-pt32
  58 With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
  59
  60 @end table
  61
  62 @node SH64 Syntax
  63 @section Syntax
  64
  65 @menu
  66 * SH64-Chars::                Special Characters
  67 * SH64-Regs::                 Register Names
  68 * SH64-Addressing::           Addressing Modes
  69 @end menu
  70
  71 @node SH64-Chars
  72 @subsection Special Characters
  73
  74 @cindex line comment character, SH64
  75 @cindex SH64 line comment character
  76 @samp{!} is the line comment character.
  77
  78 @cindex line separator, SH64
  79 @cindex statement separator, SH64
  80 @cindex SH64 line separator
  81 You can use @samp{;} instead of a newline to separate statements.
  82
  83 @cindex symbol names, @samp{$} in
  84 @cindex @code{$} in symbol names
  85 Since @samp{$} has no special meaning, you may use it in symbol names.
  86
  87 @node SH64-Regs
  88 @subsection Register Names
  89
  90 @cindex SH64 registers
  91 @cindex registers, SH64
  92 You can use the predefined symbols @samp{r0} through @samp{r63} to refer
  93 to the SH64 general registers, @samp{cr0} through @code{cr63} for
  94 control registers, @samp{tr0} through @samp{tr7} for target address
  95 registers, @samp{fr0} through @samp{fr63} for single-precision floating
  96 point registers, @samp{dr0} through @samp{dr62} (even numbered registers
  97 only) for double-precision floating point registers, @samp{fv0} through
  98 @samp{fv60} (multiples of four only) for single-precision floating point
  99 vectors, @samp{fp0} through @samp{fp62} (even numbered registers only)
 100 for single-precision floating point pairs, @samp{mtrx0} through
 101 @samp{mtrx48} (multiples of 16 only) for 4x4 matrices of
 102 single-precision floating point registers, @samp{pc} for the program
 103 counter, and @samp{fpscr} for the floating point status and control
 104 register.
 105
 106 You can also refer to the control registers by the mnemonics @samp{sr},
 107 @samp{ssr}, @samp{pssr}, @samp{intevt}, @samp{expevt}, @samp{pexpevt},
 108 @samp{tra}, @samp{spc}, @samp{pspc}, @samp{resvec}, @samp{vbr},
 109 @samp{tea}, @samp{dcr}, @samp{kcr0}, @samp{kcr1}, @samp{ctc}, and
 110 @samp{usr}.
 111
 112 @node SH64-Addressing
 113 @subsection Addressing Modes
 114
 115 @cindex addressing modes, SH64
 116 @cindex SH64 addressing modes
 117
 118 SH64 operands consist of either a register or immediate value.  The
 119 immediate value can be a constant or label reference (or portion of a
 120 label reference), as in this example:
 121
 122 @example
 123         movi    4,r2
 124         pt      function, tr4
 125         movi    (function >> 16) & 65535,r0
 126         shori   function & 65535, r0
 127         ld.l    r0,4,r0
 128 @end example
 129
 130 @cindex datalabel, SH64
 131 Instruction label references can reference labels in either SHmedia or
 132 SHcompact.  To differentiate between the two, labels in SHmedia sections
 133 will always have the least significant bit set (i.e. they will be odd),
 134 which SHcompact labels will have the least significant bit reset
 135 (i.e. they will be even).  If you need to reference the actual address
 136 of a label, you can use the @code{datalabel} modifier, as in this
 137 example:
 138
 139 @example
 140         .long   function
 141         .long   datalabel function
 142 @end example
 143
 144 In that example, the first longword may or may not have the least
 145 significant bit set depending on whether the label is an SHmedia label
 146 or an SHcompact label.  The second longword will be the actual address
 147 of the label, regardless of what type of label it is.
 148
 149 @node SH64 Directives
 150 @section SH64 Machine Directives
 151
 152 In addition to the SH directives, the SH64 provides the following
 153 directives:
 154
 155 @cindex SH64 machine directives
 156 @cindex machine directives, SH64
 157
 158 @table @code
 159
 160 @item .mode [shmedia|shcompact]
 161 @itemx .isa [shmedia|shcompact]
 162 Specify the ISA for the following instructions (the two directives are
 163 equivalent).  Note that programs such as @code{objdump} rely on symbolic
 164 labels to determine when such mode switches occur (by checking the least
 165 significant bit of the label's address), so such mode/isa changes should
 166 always be followed by a label (in practice, this is true anyway).  Note
 167 that you cannot use these directives if you didn't specify an ISA on the
 168 command line.
 169
 170 @item .abi [32|64]
 171 Specify the ABI for the following instructions.  Note that you cannot use
 172 this directive unless you specified an ABI on the command line, and the
 173 ABIs specified must match.
 174
 175 @item .uaquad
 176 Like .uaword and .ualong, this allows you to specify an intensionally
 177 unaligned quadword (64 bit word).
 178
 179 @end table
 180
 181 @node SH64 Opcodes
 182 @section Opcodes
 183
 184 @cindex SH64 opcode summary
 185 @cindex opcode summary, SH64
 186 @cindex mnemonics, SH64
 187 @cindex instruction summary, SH64
 188 For detailed information on the SH64 machine instruction set, see
 189 @cite{SuperH 64 bit RISC Series Architecture Manual} (SuperH, Inc.).
 190
 191 @code{@value{AS}} implements all the standard SH64 opcodes.  In
 192 addition, the following pseudo-opcodes may be expanded into one or more
 193 alternate opcodes:
 194
 195 @table @code
 196
 197 @item movi
 198 If the value doesn't fit into a standard @code{movi} opcode,
 199 @code{@value{AS}} will replace the @code{movi} with a sequence of
 200 @code{movi} and @code{shori} opcodes.
 201
 202 @item pt
 203 This expands to a sequence of @code{movi} and @code{shori} opcode,
 204 followed by a @code{ptrel} opcode, or to a @code{pta} or @code{ptb}
 205 opcode, depending on the label referenced.
 206
 207 @end table