Added documentation of v850 assembler options.
[deliverable/binutils-gdb.git] / gas / doc / c-v850.texi
1 @c Copyright (C) 1997 Free Software Foundation, Inc.
2 @c This is part of the GAS manual.
3 @c For copying conditions, see the file as.texinfo.
4
5 @node Machine Dependencies
6 @chapter v850 Dependent Features
7
8 @cindex V850 support
9 @menu
10 * V850 Options:: Options
11 * V850 Syntax:: Syntax
12 * V850 Floating Point:: Floating Point
13 * V850 Directives:: V850 Machine Directives
14 * V850 Opcodes:: Opcodes
15 @end menu
16
17 @node V850 Options
18 @section Options
19 @cindex V850 options (none)
20 @cindex options for V850 (none)
21 @code{@value{AS}} has no additional command-line options for the V850
22 processor family.
23
24 @node V850 Syntax
25 @section Syntax
26 @menu
27 * V850-Chars:: Special Characters
28 * V850-Regs:: Register Names
29 @end menu
30
31 @node V850-Chars
32 @subsection Special Characters
33
34 @cindex line comment character, V850
35 @cindex V850 line comment character
36 @samp{#} is the line comment character.
37 @node V850-Regs
38 @subsection Register Names
39
40 @cindex V850 register names
41 @cindex register names, V850
42 @code{@value{AS}} supports the following names for registers:
43 @table @code
44 @cindex @code{zero} register, V850
45 @item general register 0
46 r0, zero
47 @item general register 1
48 r1
49 @item general register 2
50 r2
51 @cindex @code{sp} register, V850
52 @item general register 3
53 r3, sp
54 @cindex @code{gp} register, V850
55 @item general register 4
56 r4, gp
57 @cindex @code{tp} register, V850
58 @item general register 5
59 r5, tp
60 @item general register 6
61 r6
62 @item general register 7
63 r7
64 @item general register 8
65 r8
66 @item general register 9
67 r9
68 @item general register 10
69 r10
70 @item general register 11
71 r11
72 @item general register 12
73 r12
74 @item general register 13
75 r13
76 @item general register 14
77 r14
78 @item general register 15
79 r15
80 @item general register 16
81 r16
82 @item general register 17
83 r17
84 @item general register 18
85 r18
86 @item general register 19
87 r19
88 @item general register 20
89 r20
90 @item general register 21
91 r21
92 @item general register 22
93 r22
94 @item general register 23
95 r23
96 @item general register 24
97 r24
98 @item general register 25
99 r25
100 @item general register 26
101 r26
102 @item general register 27
103 r27
104 @item general register 28
105 r28
106 @item general register 29
107 r29
108 @cindex @code{ep} register, V850
109 @item general register 30
110 r30, ep
111 @cindex @code{lp} register, V850
112 @item general register 31
113 r31, lp
114 @cindex @code{eipc} register, V850
115 @item system register 0
116 eipc
117 @cindex @code{eipsw} register, V850
118 @item system register 1
119 eipsw
120 @cindex @code{fepc} register, V850
121 @item system register 2
122 fepc
123 @cindex @code{fepsw} register, V850
124 @item system register 3
125 fepsw
126 @cindex @code{ecr} register, V850
127 @item system register 4
128 ecr
129 @cindex @code{psw} register, V850
130 @item system register 5
131 psw
132 @c start-santize-v850e
133 @cindex @code{ctpc} register, V850
134 @item system register 16
135 ctpc
136 @cindex @code{ctpsw} register, V850
137 @item system register 17
138 ctpsw
139 @cindex @code{dbpc} register, V850
140 @item system register 18
141 dbpc
142 @cindex @code{dbpsw} register, V850
143 @item system register 19
144 dbpsw
145 @cindex @code{ctbp} register, V850
146 @item system register 20
147 ctbp
148 @c end-santize-v850e
149 @end table
150
151 @node V850 Floating Point
152 @section Floating Point
153
154 @cindex floating point, V850 (@sc{ieee})
155 @cindex V850 floating point (@sc{ieee})
156 The V850 family uses @sc{ieee} floating-point numbers.
157
158 @node V850 Directives
159 @section V850 Machine Directives
160
161 @cindex machine directives, V850
162 @cindex V850 machine directives
163 @table @code
164 @cindex @code{offset} directive, V850
165 @item .offset @var{<expression>}
166 Moves the offset into the current section to the specified amount.
167
168 @cindex @code{section} directive, V850
169 @item .section "name", <type>
170 This is an extension to the standard .section directive. It sets the
171 current section to be <type> and creates an alias for this section
172 called "name".
173
174 @end table
175
176 @node V850 Opcodes
177 @section Opcodes
178
179 @cindex V850 opcodes
180 @cindex opcodes for V850
181 @code{@value{AS}} implements all the standard V850 opcodes.
182
183 @code{@value{AS}} also implements the following pseudo ops:
184
185 @table @code
186
187 @cindex @code{hi} pseudo-op, V850
188 @item hi()
189 Computes the higher 16 bits of the given expression and stores it into
190 the immediate operand field of the given instruction. For example:
191
192 @samp{mulhi hi(here - there), r5, r6}
193
194 computes the difference between the address of labels 'here' and
195 'there', takes the upper 16 bits of this difference, shifts it down 16
196 bits and then mutliplies it by the lower 16 bits in register 5, putting
197 the result into register 6.
198
199
200 @cindex @code{lo} pseudo-op, V850
201 @item lo()
202 Computes the lower 16 bits of the given expression and stores it into
203 the immediate operand field of the given instruction. For example:
204
205 @samp{addi lo(here - there), r5, r6}
206
207 computes the difference between the address of labels 'here' and
208 'there', takes the lower 16 bits of this difference and adds it to
209 register 5, putting the result into register 6.
210
211 @cindex @code{sdaoff} pseudo-op, V850
212 @item sdaoff()
213 Computes the offset of the named variable from the start of the Small
214 Data Area (whoes address is held in register 4, the GP register) and
215 stores the result as a 16 bit signed value in the immediate operand
216 field of the given instruction. For example:
217
218 @samp{ld.w sdaoff(_a_variable)[gp],r6}
219
220 loads the contents of the location pointed to by the label '_a_variable'
221 into register 6, provided that the label is located somewhere within +/-
222 32K of the address held in the GP register. [Note the linker assumes
223 that the GP register contains a fixed address set to the address of the
224 label called '__gp'].
225
226 @cindex @code{tdaoff} pseudo-op, V850
227 @item tdaoff()
228 Computes the offset of the named variable from the start of the Tiny
229 Data Area (whoes address is held in register 30, the EP register) and
230 stores the result as a 4,5,7 or 8 bit unsigned value in the immediate
231 operand field of the given instruction. For example:
232
233 @samp{sld.w tdaoff(_a_variable)[ep],r6}
234
235 loads the contents of the location pointed to by the label '_a_variable'
236 into register 6, provided that the label is located somewhere within 256
237 bytes of the address held in the EP register. [Note the linker assumes
238 that the EP register contains a fixed address set to the address of the
239 label called '--ep'].
240
241 @cindex @code{zdaoff} pseudo-op, V850
242 @item zdaoff()
243 Computes the offset of the named variable from address 0 and stores the
244 result as a 16 bit signed value in the immediate operand field of the
245 given instruction. For example:
246
247 @samp{movea zdaoff(_a_variable),zero,r6}
248
249 puts the address of the label '_a_variable' into register 6, assuming
250 that the label is somewhere within the first 32K of memory.
251
252 @end table
253
254
255 For information on the V850 or Thumb instruction sets, see @cite{V850
256 Family 32-/16-Bit single-Chip Microcontroller Architecture Manual} from NEC.
257 Ltd.
258
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