1 /* ldst-reg-reg-offset.s Test file for AArch64 load-store reg. (reg.offset)
4 Copyright (C) 2011-2020 Free Software Foundation, Inc.
5 Contributed by ARM Ltd.
7 This file is part of GAS.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the license, or
12 (at your option) any later version.
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING3. If not,
21 see <http://www.gnu.org/licenses/>. */
23 /* Only instructions loading from/storing to FP/SIMD register are
26 .macro op3_32 op, reg, ext, imm
28 \op \reg\()7, [sp, w7, \ext]
30 \op \reg\()7, [sp, w7, \ext #\imm]
34 .macro op3_64 op, reg, ext, imm
36 \op \reg\()7, [sp, x7, \ext]
38 \op \reg\()7, [sp, x7, \ext #\imm]
42 .macro op3 op, reg, ext, imm=-1
44 op3_32 \op, \reg, \ext, \imm
47 op3_32 \op, \reg, \ext, \imm
51 // shift <amount> is mandatory when 'lsl' is used
52 op3_64 \op, \reg, \ext, \imm
54 // absent shift; lsl by default
55 \op \reg\()7, [sp, x7]
59 op3_64 \op, \reg, \ext, \imm
77 .irp ext, uxtw, lsl, sxtw, sxtx
90 /* When the index register is of register 31, it should be ZR. */
91 ldr x1, [sp, xzr, sxtx #3]
92 str x1, [sp, xzr, sxtx #3]
93 ldr w1, [sp, wzr, sxtw #2]
94 str w1, [sp, wzr, sxtw #2]