1 // programmer-friendly.s Test file for AArch64 instructions variants that are
2 // not part of the architectural assembly syntax but are supported for the
3 // ease of assembly level programming.
6 // The preferred architectural syntax does not accept the shifter
7 // LSL or any other shift operator, when the destination register
8 // has the shape of 16B or 8B.
9 movi v0.16b, 97, lsl 0 // N.B.: this is now part of the architecture specification.
11 // LDR Wt, label | =value
12 // As a convenience assemblers will typically permit the notation
13 // "=value" in conjunction with the pc-relative literal load
14 // instructions to automatically place an immediate value or
15 // symbolic address in a nearby literal pool and generate a hidden
16 // label which references it.
18 ldrsw x7, u16_lable + 4
20 // CCMN Xn, Xm, #uimm4, cond
21 // As a convenience, GAS accepts a string representation for #uimm4,
22 // e.g. NzCv for #0xa (0b1010).
32 // Unsigned Extend Byte|Halfword|Word: UXT[BH] is architectural alias
33 // for UBFM Wd,Wn,#0,#7|15, while UXTW is pseudo instruction which is
34 // encoded using ORR Wd, WZR, Wn (MOV Wd,Wn).
35 // A programmer-friendly assembler should accept a destination Xd in
36 // place of Wd, however that is not the preferred form for disassembly.
42 // ADDS <Xd>, <Xn|SP>, <R><m>{, UXTB {#<amount>}}
43 // In the 64-bit form, the final register operand is written as Wm
44 // for all but the (possibly omitted) UXTX/LSL and SXTX
46 // As a programmer-friendly assembler, we allow e.g.
47 // ADDS <Xd>, <Xn|SP>, <Xm>{, UXTB {#<amount>}} by changing it to
48 // ADDS <Xd>, <Xn|SP>, <Wm>{, UXTB {#<amount>}}.
49 adds x0, sp, x0, uxtb #4
50 adds x0, sp, x0, uxth #4
51 adds x0, sp, x0, uxtw #4
53 adds x0, sp, x0, sxtb #0
54 adds x0, sp, x0, sxth #1
55 adds x0, sp, x0, sxtw #2
58 // LDR Wt, label | =value
59 // Find more comment above.
60 ldr q0, =0xdeadcafebeefbabe0123456789abcedf
61 ldr d0, =0xfebeefbabe012345
62 ldr x0, =0xfebeefbabe012345