gas/testsuite/gas/aarch64/sysreg-4.s

   1 /* sysreg-4.s Test file for ARMv8.5 system registers.  */
   2 func:
   3         cfp rctx, x1
   4         dvp rctx, x2
   5         cpp rctx, x3
   6         dc cvadp, x4
   7         mrs x5, rndr
   8         mrs x6, rndrrs
   9         mrs x7, scxtnum_el0
  10         mrs x7, scxtnum_el1
  11         mrs x7, scxtnum_el2
  12         mrs x7, scxtnum_el3
  13         mrs x7, scxtnum_el12
  14         mrs x8, id_pfr2_el1
  15
  16         # ARMv8.5-a+memtag
  17         # MRS (register)
  18         mrs x1, tco
  19         mrs x2, TCO
  20         mrs x1, tfsre0_el1
  21         mrs x1, TFSR_EL1
  22         mrs x2, TFSR_EL2
  23         mrs x3, TFSR_EL3
  24         mrs x12, TFSR_EL12
  25         mrs x1, rgsr_el1
  26         mrs x3, gcr_el1
  27         mrs x4, gmid_el1
  28
  29         # MSR (register)
  30         msr tco, x1
  31         msr TCO, x2
  32         msr tfsre0_el1, x1
  33         msr TFSR_EL1, x1
  34         msr TFSR_EL2, x2
  35         msr TFSR_EL3, x3
  36         msr TFSR_EL12, x12
  37         msr rgsr_el1, x1
  38         msr gcr_el1, x3
  39
  40         # MSR (immediate)
  41         msr TCO, #8
  42
  43         # Data cache
  44         dc igvac, x1
  45         dc igsw, x2
  46         dc cgsw, x3
  47         dc cigsw, x4
  48         dc cgvac, x5
  49         dc cgvap, x6
  50         dc cgvadp, x7
  51         dc cigvac, x8
  52
  53         dc gva, x9
  54
  55         dc igdvac, x10
  56         dc igdsw, x11
  57         dc cgdsw, x12
  58         dc cigdsw, x13
  59         dc cgdvac, x14
  60         dc cgdvap, x15
  61         dc cgdvadp, x16
  62         dc cigdvac, x17
  63
  64         dc gzva, x18