[GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vabav-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:13: Error: bad type in SIMD instruction -- `vabav.s64 r0,q0,q1'
3 [^:]*:14: Error: bad type in SIMD instruction -- `vabav.f16 r0,q0,q1'
4 [^:]*:15: Error: bad type in SIMD instruction -- `vabav.f32 r0,q0,q1'
5 [^:]*:16: Error: bad type in SIMD instruction -- `vabav.p8 r0,q0,q1'
6 [^:]*:17: Error: bad type in SIMD instruction -- `vabav.p16 r0,q0,q1'
7 [^:]*:18: Error: r13 not allowed here -- `vabav.s32 r13,q0,q1'
8 [^:]*:19: Error: r15 not allowed here -- `vabav.s32 r15,q0,q1'
9 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
10 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
11 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
12 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
13 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
14 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
15 [^:]*:22: Error: syntax error -- `vabaveq.s32 r0,q0,q1'
16 [^:]*:23: Error: syntax error -- `vabaveq.s32 r0,q0,q1'
17 [^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vabavt.s32 r0,q0,q1'
18 [^:]*:26: Error: vector predicated instruction should be in VPT/VPST block -- `vabavt.s32 r0,q0,q1'
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