[PATCH 15/57][Arm][GAS] Add support for MVE instructions: vcls, vclz and vfmas
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vcls-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:10: Error: bad type in SIMD instruction -- `vcls.f32 q0,q1'
3 [^:]*:11: Error: bad type in SIMD instruction -- `vcls.u32 q0,q1'
4 [^:]*:12: Error: bad type in SIMD instruction -- `vcls.32 q0,q1'
5 [^:]*:13: Error: bad type in SIMD instruction -- `vcls.i32 q0,q1'
6 [^:]*:14: Error: bad type in SIMD instruction -- `vcls.s64 q0,q1'
7 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
8 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
9 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
10 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
11 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
12 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
13 [^:]*:17: Error: syntax error -- `vclseq.s16 q0,q1'
14 [^:]*:18: Error: syntax error -- `vclseq.s16 q0,q1'
15 [^:]*:20: Error: syntax error -- `vclseq.s16 q0,q1'
16 [^:]*:21: Error: vector predicated instruction should be in VPT/VPST block -- `vclst.s16 q0,q1'
17 [^:]*:23: Error: instruction missing MVE vector predication code -- `vcls.s16 q0,q1'
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