[PATCH 10/57][Arm][GAS] Add support for MVE instructions: vcmp and vpt
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vcmp-bad-1.l
1 [^:]*: Assembler messages:
2 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
3 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
4 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
5 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
6 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
7 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
8 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
9 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
10 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
11 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
12 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
13 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
14 [^:]*:24: Error: selected FPU does not support instruction -- `vcmp.f32 eq,q0,q1'
15 [^:]*:25: Error: selected FPU does not support instruction -- `vcmp.f32 eq,q0,r1'
16 [^:]*:26: Error: bad type in SIMD instruction -- `vcmp.i64 eq,q0,q1'
17 [^:]*:27: Error: invalid condition -- `vcmp.s32 eq,q0,q1'
18 [^:]*:28: Error: invalid condition -- `vcmp.s16 cs,q0,q1'
19 [^:]*:29: Error: invalid condition -- `vcmp.u8 le,q0,q1'
20 [^:]*:30: Error: condition required -- `vcmp.s16 q0,q1'
21 [^:]*:31: Warning: instruction is UNPREDICTABLE with SP operand
22 [^:]*:33: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
23 [^:]*:34: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
24 [^:]*:36: Error: syntax error -- `vcmpeq.i32 eq,q0,q1'
25 [^:]*:37: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.i32 eq,q0,q1'
26 [^:]*:39: Error: instruction missing MVE vector predication code -- `vcmp.i32 eq,q0,q1'
27 [^:]*:41: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
28 [^:]*:42: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
29 [^:]*:44: Error: syntax error -- `vcmpeq.i32 eq,q0,r1'
30 [^:]*:45: Error: vector predicated instruction should be in VPT/VPST block -- `vcmpt.i32 eq,q0,r1'
31 [^:]*:47: Error: instruction missing MVE vector predication code -- `vcmp.i32 eq,q0,r1'
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