gas/testsuite/gas/arm/mve-vddup-bad.l

   1 [^:]*: Assembler messages:
   2 [^:]*:16: Error: bad type in SIMD instruction -- `vddup.s16 q0,r0,#1'
   3 [^:]*:17: Error: bad type in SIMD instruction -- `vddup.u64 q0,r0,#1'
   4 [^:]*:18: Error: immediate must be either 1, 2, 4 or 8 -- `vddup.u32 q0,r0,#3'
   5 [^:]*:19: Error: immediate must be either 1, 2, 4 or 8 -- `vddup.u32 q0,r0,#0'
   6 [^:]*:20: Error: bad type in SIMD instruction -- `vdwdup.s16 q0,r0,r1,#1'
   7 [^:]*:21: Error: bad type in SIMD instruction -- `vdwdup.u64 q0,r0,r1,#1'
   8 [^:]*:22: Error: immediate must be either 1, 2, 4 or 8 -- `vdwdup.u32 q0,r0,r1,#3'
   9 [^:]*:23: Error: immediate must be either 1, 2, 4 or 8 -- `vdwdup.u32 q0,r0,r1,#0'
  10 [^:]*:24: Warning: instruction is UNPREDICTABLE with SP operand
  11 [^:]*:25: Error: r15 not allowed here -- `vdwdup.u32 q0,r0,pc,#1'
  12 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
  13 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
  14 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
  15 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
  16 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
  17 [^:]*:26: Warning: instruction is UNPREDICTABLE in an IT block
  18 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
  19 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
  20 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
  21 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
  22 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
  23 [^:]*:27: Warning: instruction is UNPREDICTABLE in an IT block
  24 [^:]*:29: Error: syntax error -- `vddupeq.u32 q0,r0,#1'
  25 [^:]*:30: Error: syntax error -- `vddupeq.u32 q0,r0,#1'
  26 [^:]*:32: Error: syntax error -- `vddupeq.u32 q0,r0,#1'
  27 [^:]*:33: Error: vector predicated instruction should be in VPT/VPST block -- `vddupt.u32 q0,r0,#1'
  28 [^:]*:35: Error: instruction missing MVE vector predication code -- `vddup.u32 q0,r0,#1'
  29 [^:]*:37: Error: syntax error -- `vdwdupeq.u32 q0,r0,r1,#1'
  30 [^:]*:38: Error: syntax error -- `vdwdupeq.u32 q0,r0,r1,#1'
  31 [^:]*:40: Error: syntax error -- `vdwdupeq.u32 q0,r0,r1,#1'
  32 [^:]*:41: Error: vector predicated instruction should be in VPT/VPST block -- `vdwdupt.u32 q0,r0,r1,#1'
  33 [^:]*:43: Error: instruction missing MVE vector predication code -- `vdwdup.u32 q0,r0,r1,#1'