[PATCH 21/57][Arm][GAS] Add support for MVE instructions: vmaxv, vmaxav, vminv and...
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vmaxv-vminv-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:10: Error: bad type in SIMD instruction -- `vmaxv.u64 r0,q1'
3 [^:]*:11: Error: bad type in SIMD instruction -- `vmaxv.f16 r0,q1'
4 [^:]*:12: Error: bad type in SIMD instruction -- `vminv.s64 r0,q1'
5 [^:]*:13: Error: bad type in SIMD instruction -- `vminv.f32 r0,q1'
6 [^:]*:14: Error: bad type in SIMD instruction -- `vmaxav.u16 r0,q1'
7 [^:]*:15: Error: bad type in SIMD instruction -- `vmaxav.f32 r0,q1'
8 [^:]*:16: Error: bad type in SIMD instruction -- `vminav.u32 r0,q1'
9 [^:]*:17: Error: bad type in SIMD instruction -- `vminav.f16 r0,q1'
10 [^:]*:18: Warning: instruction is UNPREDICTABLE with SP operand
11 [^:]*:19: Warning: instruction is UNPREDICTABLE with PC operand
12 [^:]*:20: Warning: instruction is UNPREDICTABLE with PC operand
13 [^:]*:21: Warning: instruction is UNPREDICTABLE with SP operand
14 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
15 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
16 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
17 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
18 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
19 [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
20 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
21 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
22 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
23 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
24 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
25 [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
26 [^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
27 [^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
28 [^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
29 [^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
30 [^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
31 [^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
32 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
33 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
34 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
35 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
36 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
37 [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
38 [^:]*:27: Error: syntax error -- `vmaxveq.s32 r0,q1'
39 [^:]*:28: Error: syntax error -- `vmaxveq.s32 r0,q1'
40 [^:]*:30: Error: syntax error -- `vmaxveq.s32 r0,q1'
41 [^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vmaxvt.s32 r0,q1'
42 [^:]*:33: Error: instruction missing MVE vector predication code -- `vmaxv.s32 r0,q1'
43 [^:]*:35: Error: syntax error -- `vmaxaveq.s32 r0,q1'
44 [^:]*:36: Error: syntax error -- `vmaxaveq.s32 r0,q1'
45 [^:]*:38: Error: syntax error -- `vmaxaveq.s32 r0,q1'
46 [^:]*:39: Error: vector predicated instruction should be in VPT/VPST block -- `vmaxavt.s32 r0,q1'
47 [^:]*:41: Error: instruction missing MVE vector predication code -- `vmaxav.s32 r0,q1'
48 [^:]*:43: Error: syntax error -- `vminveq.s32 r0,q1'
49 [^:]*:44: Error: syntax error -- `vminveq.s32 r0,q1'
50 [^:]*:46: Error: syntax error -- `vminveq.s32 r0,q1'
51 [^:]*:47: Error: vector predicated instruction should be in VPT/VPST block -- `vminvt.s32 r0,q1'
52 [^:]*:49: Error: instruction missing MVE vector predication code -- `vminv.s32 r0,q1'
53 [^:]*:51: Error: syntax error -- `vminaveq.s32 r0,q1'
54 [^:]*:52: Error: syntax error -- `vminaveq.s32 r0,q1'
55 [^:]*:54: Error: syntax error -- `vminaveq.s32 r0,q1'
56 [^:]*:55: Error: vector predicated instruction should be in VPT/VPST block -- `vminavt.s32 r0,q1'
57 [^:]*:57: Error: instruction missing MVE vector predication code -- `vminav.s32 r0,q1'
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