gas/testsuite/gas/arm/mve-vmlsldav-bad.l

   1 [^:]*: Assembler messages:
   2 [^:]*:10: Warning: instruction is UNPREDICTABLE with SP operand
   3 [^:]*:11: Error: bad type in SIMD instruction -- `vmlsldav.u16 r0,r1,q1,q2'
   4 [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
   5 [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
   6 [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
   7 [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
   8 [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
   9 [^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
  10 [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
  11 [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
  12 [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
  13 [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
  14 [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
  15 [^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
  16 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
  17 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
  18 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
  19 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
  20 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
  21 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
  22 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
  23 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
  24 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
  25 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
  26 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
  27 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
  28 [^:]*:16: Error: bad type in SIMD instruction -- `vmlsldav.s64 r0,r1,q1,q2'
  29 [^:]*:17: Error: bad type in SIMD instruction -- `vmlsldav.f32 r0,r1,q1,q2'
  30 [^:]*:18: Error: bad type in SIMD instruction -- `vmlsldav.s8 r0,r1,q1,q2'
  31 [^:]*:19: Error: ARM register expected -- `vmlsldav.s16 r0,q1,q2'
  32 [^:]*:20: Error: bad type in SIMD instruction -- `vmlsldava.s64 r0,r1,q1,q2'
  33 [^:]*:21: Error: bad type in SIMD instruction -- `vmlsldava.f32 r0,r1,q1,q2'
  34 [^:]*:22: Error: bad type in SIMD instruction -- `vmlsldava.s8 r0,r1,q1,q2'
  35 [^:]*:23: Error: ARM register expected -- `vmlsldava.s16 r0,q1,q2'
  36 [^:]*:24: Error: bad type in SIMD instruction -- `vmlsldavx.s64 r0,r1,q1,q2'
  37 [^:]*:25: Error: bad type in SIMD instruction -- `vmlsldavx.f32 r0,r1,q1,q2'
  38 [^:]*:26: Error: bad type in SIMD instruction -- `vmlsldavx.s8 r0,r1,q1,q2'
  39 [^:]*:27: Error: ARM register expected -- `vmlsldavx.s16 r0,q1,q2'
  40 [^:]*:28: Error: bad type in SIMD instruction -- `vmlsldavax.s64 r0,r1,q1,q2'
  41 [^:]*:29: Error: bad type in SIMD instruction -- `vmlsldavax.f32 r0,r1,q1,q2'
  42 [^:]*:30: Error: bad type in SIMD instruction -- `vmlsldavax.s8 r0,r1,q1,q2'
  43 [^:]*:31: Error: ARM register expected -- `vmlsldavax.s16 r0,q1,q2'
  44 [^:]*:33: Error: syntax error -- `vmlsldaveq.s16 r0,r1,q1,q2'
  45 [^:]*:34: Error: syntax error -- `vmlsldaveq.s16 r0,r1,q1,q2'
  46 [^:]*:35: Error: syntax error -- `vmlsldaveq.s16 r0,r1,q1,q2'
  47 [^:]*:36: Error: vector predicated instruction should be in VPT/VPST block -- `vmlsldavt.s16 r0,r1,q1,q2'
  48 [^:]*:38: Error: instruction missing MVE vector predication code -- `vmlsldav.s16 r0,r1,q1,q2'
  49 [^:]*:40: Error: syntax error -- `vmlsldavaeq.s16 r0,r1,q1,q2'
  50 [^:]*:41: Error: syntax error -- `vmlsldavaeq.s16 r0,r1,q1,q2'
  51 [^:]*:42: Error: syntax error -- `vmlsldavaeq.s16 r0,r1,q1,q2'
  52 [^:]*:43: Error: vector predicated instruction should be in VPT/VPST block -- `vmlsldavat.s16 r0,r1,q1,q2'
  53 [^:]*:45: Error: instruction missing MVE vector predication code -- `vmlsldava.s16 r0,r1,q1,q2'
  54 [^:]*:47: Error: syntax error -- `vmlsldavxeq.s16 r0,r1,q1,q2'
  55 [^:]*:48: Error: syntax error -- `vmlsldavxeq.s16 r0,r1,q1,q2'
  56 [^:]*:49: Error: syntax error -- `vmlsldavxeq.s16 r0,r1,q1,q2'
  57 [^:]*:50: Error: vector predicated instruction should be in VPT/VPST block -- `vmlsldavxt.s16 r0,r1,q1,q2'
  58 [^:]*:52: Error: instruction missing MVE vector predication code -- `vmlsldavx.s16 r0,r1,q1,q2'
  59 [^:]*:54: Error: syntax error -- `vmlsldavaxeq.s16 r0,r1,q1,q2'
  60 [^:]*:55: Error: syntax error -- `vmlsldavaxeq.s16 r0,r1,q1,q2'
  61 [^:]*:56: Error: syntax error -- `vmlsldavaxeq.s16 r0,r1,q1,q2'
  62 [^:]*:57: Error: vector predicated instruction should be in VPT/VPST block -- `vmlsldavaxt.s16 r0,r1,q1,q2'
  63 [^:]*:59: Error: instruction missing MVE vector predication code -- `vmlsldavax.s16 r0,r1,q1,q2'