[GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vqabsneg-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:10: Error: bad type in SIMD instruction -- `vqabs.u8 q0,q1'
3 [^:]*:11: Error: bad type in SIMD instruction -- `vqneg.u16 q0,q1'
4 [^:]*:12: Error: bad type in SIMD instruction -- `vqabs.s64 q0,q1'
5 [^:]*:13: Error: bad instruction `vqnegs.s64 q0,q1'
6 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
7 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
8 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
9 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
10 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
11 [^:]*:14: Warning: instruction is UNPREDICTABLE in an IT block
12 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
13 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
14 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
15 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
16 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
17 [^:]*:15: Warning: instruction is UNPREDICTABLE in an IT block
18 [^:]*:17: Error: syntax error -- `vqabseq.s32 q0,q1'
19 [^:]*:18: Error: syntax error -- `vqabseq.s32 q0,q1'
20 [^:]*:19: Error: syntax error -- `vqabseq.s32 q0,q1'
21 [^:]*:20: Error: vector predicated instruction should be in VPT/VPST block -- `vqabst.s32 q0,q1'
22 [^:]*:22: Error: instruction missing MVE vector predication code -- `vqabs.s32 q0,q1'
23 [^:]*:24: Error: syntax error -- `vqnegeq.s32 q0,q1'
24 [^:]*:25: Error: syntax error -- `vqnegeq.s32 q0,q1'
25 [^:]*:26: Error: syntax error -- `vqnegeq.s32 q0,q1'
26 [^:]*:27: Error: vector predicated instruction should be in VPT/VPST block -- `vqnegt.s32 q0,q1'
27 [^:]*:29: Error: instruction missing MVE vector predication code -- `vqneg.s32 q0,q1'
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