This patch addresses the change in the June Armv8.1-M Mainline specification, that...
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vqdmlsdh-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:10: Error: bad type in SIMD instruction -- `vqdmlsdh.u32 q0,q1,q2'
3 [^:]*:11: Error: bad type in SIMD instruction -- `vqdmlsdh.s64 q0,q1,q2'
4 [^:]*:12: Error: bad type in SIMD instruction -- `vqdmlsdhx.u32 q0,q1,q2'
5 [^:]*:13: Error: bad type in SIMD instruction -- `vqdmlsdhx.s64 q0,q1,q2'
6 [^:]*:14: Error: bad type in SIMD instruction -- `vqrdmlsdh.u32 q0,q1,q2'
7 [^:]*:15: Error: bad type in SIMD instruction -- `vqrdmlsdh.s64 q0,q1,q2'
8 [^:]*:16: Error: bad type in SIMD instruction -- `vqrdmlsdhx.u32 q0,q1,q2'
9 [^:]*:17: Error: bad type in SIMD instruction -- `vqrdmlsdhx.s64 q0,q1,q2'
10 [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
11 [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
12 [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
13 [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
14 [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
15 [^:]*:18: Warning: instruction is UNPREDICTABLE in an IT block
16 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
17 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
18 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
19 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
20 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
21 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
22 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
23 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
24 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
25 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
26 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
27 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
28 [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
29 [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
30 [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
31 [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
32 [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
33 [^:]*:21: Warning: instruction is UNPREDICTABLE in an IT block
34 [^:]*:23: Error: syntax error -- `vqdmlsdheq.s32 q0,q1,q2'
35 [^:]*:24: Error: syntax error -- `vqdmlsdheq.s32 q0,q1,q2'
36 [^:]*:26: Error: syntax error -- `vqdmlsdheq.s32 q0,q1,q2'
37 [^:]*:27: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmlsdht.s32 q0,q1,q2'
38 [^:]*:29: Error: instruction missing MVE vector predication code -- `vqdmlsdh.s32 q0,q1,q2'
39 [^:]*:31: Error: syntax error -- `vqdmlsdhxeq.s32 q0,q1,q2'
40 [^:]*:32: Error: syntax error -- `vqdmlsdhxeq.s32 q0,q1,q2'
41 [^:]*:34: Error: syntax error -- `vqdmlsdhxeq.s32 q0,q1,q2'
42 [^:]*:35: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmlsdhxt.s32 q0,q1,q2'
43 [^:]*:37: Error: instruction missing MVE vector predication code -- `vqdmlsdhx.s32 q0,q1,q2'
44 [^:]*:39: Error: syntax error -- `vqrdmlsdheq.s32 q0,q1,q2'
45 [^:]*:40: Error: syntax error -- `vqrdmlsdheq.s32 q0,q1,q2'
46 [^:]*:42: Error: syntax error -- `vqrdmlsdheq.s32 q0,q1,q2'
47 [^:]*:43: Error: vector predicated instruction should be in VPT/VPST block -- `vqrdmlsdht.s32 q0,q1,q2'
48 [^:]*:45: Error: instruction missing MVE vector predication code -- `vqrdmlsdh.s32 q0,q1,q2'
49 [^:]*:47: Error: syntax error -- `vqrdmlsdhxeq.s32 q0,q1,q2'
50 [^:]*:48: Error: syntax error -- `vqrdmlsdhxeq.s32 q0,q1,q2'
51 [^:]*:50: Error: syntax error -- `vqrdmlsdhxeq.s32 q0,q1,q2'
52 [^:]*:51: Error: vector predicated instruction should be in VPT/VPST block -- `vqrdmlsdhxt.s32 q0,q1,q2'
53 [^:]*:53: Error: instruction missing MVE vector predication code -- `vqrdmlsdhx.s32 q0,q1,q2'
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