[PATCH 29/57][Arm][GAS] Add support for MVE instructions: vqdmullt and vqdmullb
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vqdmull-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:10: Error: bad type in SIMD instruction -- `vqdmullt.s8 q0,q1,q2'
3 [^:]*:11: Error: bad type in SIMD instruction -- `vqdmullt.u8 q0,q1,q2'
4 [^:]*:12: Error: bad type in SIMD instruction -- `vqdmullt.i16 q0,q1,q2'
5 [^:]*:13: Error: bad type in SIMD instruction -- `vqdmullt.s64 q0,q1,q2'
6 [^:]*:14: Error: bad type in SIMD instruction -- `vqdmullb.s8 q0,q1,q2'
7 [^:]*:15: Error: bad type in SIMD instruction -- `vqdmullb.u8 q0,q1,q2'
8 [^:]*:16: Error: bad type in SIMD instruction -- `vqdmullb.i16 q0,q1,q2'
9 [^:]*:17: Error: bad type in SIMD instruction -- `vqdmullb.s64 q0,q1,q2'
10 [^:]*:18: Error: bad type in SIMD instruction -- `vqdmullt.s8 q0,q1,r2'
11 [^:]*:19: Error: bad type in SIMD instruction -- `vqdmullt.u8 q0,q1,r2'
12 [^:]*:20: Error: bad type in SIMD instruction -- `vqdmullt.i16 q0,q1,r2'
13 [^:]*:21: Error: bad type in SIMD instruction -- `vqdmullt.s64 q0,q1,r2'
14 [^:]*:22: Error: bad type in SIMD instruction -- `vqdmullb.s8 q0,q1,r2'
15 [^:]*:23: Error: bad type in SIMD instruction -- `vqdmullb.u8 q0,q1,r2'
16 [^:]*:24: Error: bad type in SIMD instruction -- `vqdmullb.i16 q0,q1,r2'
17 [^:]*:25: Error: bad type in SIMD instruction -- `vqdmullb.s64 q0,q1,r2'
18 [^:]*:26: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
19 [^:]*:27: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
20 [^:]*:28: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
21 [^:]*:29: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
22 [^:]*:30: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
23 [^:]*:31: Warning: 32-bit element size and same destination and source operands makes instruction UNPREDICTABLE
24 [^:]*:32: Warning: instruction is UNPREDICTABLE with SP operand
25 [^:]*:33: Warning: instruction is UNPREDICTABLE with PC operand
26 [^:]*:34: Warning: instruction is UNPREDICTABLE with SP operand
27 [^:]*:35: Warning: instruction is UNPREDICTABLE with PC operand
28 [^:]*:36: Warning: instruction is UNPREDICTABLE in an IT block
29 [^:]*:36: Warning: instruction is UNPREDICTABLE in an IT block
30 [^:]*:36: Warning: instruction is UNPREDICTABLE in an IT block
31 [^:]*:36: Warning: instruction is UNPREDICTABLE in an IT block
32 [^:]*:36: Warning: instruction is UNPREDICTABLE in an IT block
33 [^:]*:36: Warning: instruction is UNPREDICTABLE in an IT block
34 [^:]*:37: Warning: instruction is UNPREDICTABLE in an IT block
35 [^:]*:37: Warning: instruction is UNPREDICTABLE in an IT block
36 [^:]*:37: Warning: instruction is UNPREDICTABLE in an IT block
37 [^:]*:37: Warning: instruction is UNPREDICTABLE in an IT block
38 [^:]*:37: Warning: instruction is UNPREDICTABLE in an IT block
39 [^:]*:37: Warning: instruction is UNPREDICTABLE in an IT block
40 [^:]*:38: Warning: instruction is UNPREDICTABLE in an IT block
41 [^:]*:38: Warning: instruction is UNPREDICTABLE in an IT block
42 [^:]*:38: Warning: instruction is UNPREDICTABLE in an IT block
43 [^:]*:38: Warning: instruction is UNPREDICTABLE in an IT block
44 [^:]*:38: Warning: instruction is UNPREDICTABLE in an IT block
45 [^:]*:38: Warning: instruction is UNPREDICTABLE in an IT block
46 [^:]*:39: Warning: instruction is UNPREDICTABLE in an IT block
47 [^:]*:39: Warning: instruction is UNPREDICTABLE in an IT block
48 [^:]*:39: Warning: instruction is UNPREDICTABLE in an IT block
49 [^:]*:39: Warning: instruction is UNPREDICTABLE in an IT block
50 [^:]*:39: Warning: instruction is UNPREDICTABLE in an IT block
51 [^:]*:39: Warning: instruction is UNPREDICTABLE in an IT block
52 [^:]*:41: Error: syntax error -- `vqdmullteq.s32 q0,q1,q2'
53 [^:]*:42: Error: syntax error -- `vqdmullteq.s32 q0,q1,q2'
54 [^:]*:44: Error: syntax error -- `vqdmullteq.s32 q0,q1,q2'
55 [^:]*:45: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmulltt.s32 q0,q1,q2'
56 [^:]*:47: Error: instruction missing MVE vector predication code -- `vqdmullt.s32 q0,q1,q2'
57 [^:]*:49: Error: syntax error -- `vqdmullbeq.s32 q0,q1,q2'
58 [^:]*:50: Error: syntax error -- `vqdmullbeq.s32 q0,q1,q2'
59 [^:]*:52: Error: syntax error -- `vqdmullbeq.s32 q0,q1,q2'
60 [^:]*:53: Error: vector predicated instruction should be in VPT/VPST block -- `vqdmullbt.s32 q0,q1,q2'
61 [^:]*:55: Error: instruction missing MVE vector predication code -- `vqdmullb.s32 q0,q1,q2'
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