Power10 Copy/Paste Extensions
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / mve-vqrshl-bad.l
1 [^:]*: Assembler messages:
2 [^:]*:10: Error: bad type in SIMD instruction -- `vqrshl.s64 q0,q1,q2'
3 [^:]*:11: Error: bad type in SIMD instruction -- `vqrshl.u64 q0,q1,q2'
4 [^:]*:12: Error: bad type in SIMD instruction -- `vqrshl.i32 q0,q1,q2'
5 [^:]*:13: Error: bad type in SIMD instruction -- `vqrshl.s64 q0,r2'
6 [^:]*:14: Error: bad type in SIMD instruction -- `vqrshl.u64 q0,r2'
7 [^:]*:15: Error: bad type in SIMD instruction -- `vqrshl.i32 q0,r2'
8 [^:]*:16: Error: invalid instruction shape -- `vqrshl.s32 q0,q1,r2'
9 [^:]*:17: Warning: instruction is UNPREDICTABLE with PC operand
10 [^:]*:18: Warning: instruction is UNPREDICTABLE with SP operand
11 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
12 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
13 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
14 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
15 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
16 [^:]*:19: Warning: instruction is UNPREDICTABLE in an IT block
17 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
18 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
19 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
20 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
21 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
22 [^:]*:20: Warning: instruction is UNPREDICTABLE in an IT block
23 [^:]*:22: Error: syntax error -- `vqrshleq.s32 q0,q1,q2'
24 [^:]*:23: Error: syntax error -- `vqrshleq.s32 q0,q1,q2'
25 [^:]*:25: Error: syntax error -- `vqrshleq.s32 q0,q1,q2'
26 [^:]*:26: Error: vector predicated instruction should be in VPT/VPST block -- `vqrshlt.s32 q0,q1,q2'
27 [^:]*:28: Error: instruction missing MVE vector predication code -- `vqrshl.s32 q0,q1,q2'
28 [^:]*:30: Error: syntax error -- `vqrshleq.s32 q0,r2'
29 [^:]*:31: Error: syntax error -- `vqrshleq.s32 q0,r2'
30 [^:]*:33: Error: syntax error -- `vqrshleq.s32 q0,r2'
31 [^:]*:34: Error: vector predicated instruction should be in VPT/VPST block -- `vqrshlt.s32 q0,r2'
32 [^:]*:36: Error: instruction missing MVE vector predication code -- `vqrshl.s32 q0,r2'
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