Adds the speculation barrier instructions to the ARM assembler and disassembler.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / vfpv3xd-ldr_immediate.s
1 .arm
2 .syntax unified
3 # VFPv3xD has no VMOV instruction for double precision registers...
4 # 15 * 2^-7 =0.1171875 Not convertible to VMOV
5 .align 3
6 vldr d0,=0x3FBE000000000000
7 vldr s0,=0x3df00000
8 .pool
9
10 # -16 * 2^-7 =0.125 Convertible to VMOV
11 .align 3
12 vldr d0,=0xbfc0000000000000
13 vldr s0,=0xbe000000
14 .pool
15
16 # 16 * 2^-7 =0.125 Convertible to VMOV
17 .align 3
18 vldr d0,=0x3fc0000000000000
19 vldr s0,=0x3e000000
20 .pool
21
22 # 16.5 * 2^-7 =0.125 Not convertible to VMOV
23 .align 3
24 vldr d0,=0x3fe0800000000000
25 vldr s0,=0x3f040000
26 .pool
27
28 # 31 * 2^-5 = 0.96875 Convertible to VMOV
29 .align 3
30 vldr d0,=0x3fef000000000000
31 vldr s0,=0x3f780000
32 .pool
33
34 # 31 * 2^ 0 = 31 Convertible to VMOV
35 .align 3
36 vldr d0,=0x403F000000000000
37 vldr s0,=0x41f80000
38 .pool
39
40 # 16 * 2^ 1 = 32 Not convertible to VMOV
41 .align 3
42 vldr d0,=0x4040000000000000
43 vldr s0,=0x42000000
44 .pool
45
46 nop
47
This page took 0.050112 seconds and 4 git commands to generate.