17 .macro VERIFY ra,rb,ref,label
24 /*****************************************/
25 /*INITIALIZING REGISTERS */
26 /*****************************************/
27 /*Check that sum is correct*/
28 START: MOV R0, #TABLE ; //Setting R0 to TABLE
29 LSL R0,R0,#2 ; //Create 00020000
31 ;; Load r1.63 with 1..63
42 mov r62,#2016 ;//Correct sum of 1..63 = 63*32 + 63
43 VERIFY r63,r63,R62,BRANCH1;//CHECK SUM
46 /*****************************************/
48 /*****************************************/
49 //Check that all condition codes work
50 BRANCH1: BEQ BRANCH2 ; //taken
55 BRANCH2: BNE FAIL_BRANCH ; //not taken
56 BRANCH3: BGT FAIL_BRANCH ; //not taken
57 BRANCH4: BGTE BRANCH5 ; //taken
59 BRANCH5: BLTE BRANCH6 ; //taken
61 BRANCH6: BLT FAIL_BRANCH ; //not taken
62 BRANCH8: B LONGJUMP ; //taken
64 RETURN: bl FUNCTION ; //jump to subroutine
65 MOV R63,JARLAB ;//REGISTER JUMP
68 JARLAB: MOV R63,FUNCTION ; //REGISTER CALL
70 B NEXT ; //jump over fail
73 FAIL_BRANCH: FAIL ; //fail branch
75 /*****************************************/
76 /*LOAD-STORE DISPLACEMENT */
77 /*****************************************/
78 //Check max displacement value(0xf)
79 //Check that offset is correct
80 //all load/stores are aligned
81 //this gives greater range(2 more bits)
82 //offset is shifted by 2x bits
84 NEXT: STRB R4,[R0,#0x0] ;//Store Byte
85 LDRB R63,[R0,#0x0] ;//Load Byte
86 VERIFY R63,R63,R4,STOREB ;
88 STOREB: STRB R5,[R0,#0xf] ;//Store Byte
89 LDRB R63,[R0,#0xf] ;//Load Byte
90 VERIFY R63,R63,R5,STORES ;
92 STORES: STRH R4,[R0,#0x0] ;//Store Short
93 LDRH R63,[R0,#0x0] ;//Load Short
94 VERIFY R63,R63,R4,STORES2 ;
96 STORES2: STRH R5,[R0,#0xe] ;//Store Short
97 LDRH R63,[R0,#0xe] ;//Load Short
98 VERIFY R63,R63,R5,STORE ;
100 STORE: STR R4,[R0,#0x0] ;//Store Word
101 LDR R63,[R0,#0x0] ;//Load Word
102 VERIFY R63,R63,R4,STORE2 ;
104 STORE2: STR R5,[R0,#0xc] ;//Store Word
105 LDR R63,[R0,#0xc] ;//Load Word
106 VERIFY R63,R63,R5,STOREBI ;
109 /*****************************************/
110 /*LOAD-STORE INDEX */
111 /*****************************************/
113 STOREBI: STRB R4,[R0,R4] ;//Store Word
114 LDRB R63,[R0,R4] ;//Load Word
115 VERIFY R63,R63,R4,STORESI ;
117 STORESI: STRH R5,[R0,R4] ;//Store Word
118 LDRH R63,[R0,R4] ;//Load Word
119 VERIFY R63,R63,R5,STOREI ;
121 STOREI: STR R6,[R0,R4] ;//Store Word
122 LDR R63,[R0,R4] ;//Load Word
123 VERIFY R63,R63,R6,PMB ;
125 /*****************************************/
126 /*LOAD-STORE POSTMODIFY */
127 /*****************************************/
129 PMB: STRB R4,[R0],R4 ;//Store Word
130 SUB R0,R0,#0x4 ;//restoring R0
131 LDRB R63,[R0],R4 ;//Load Word
132 SUB R0,R0,#0x4 ;//restoring R0
133 VERIFY R63,R63,R4,PMS ;
135 PMS: STRH R5,[R0],R4 ;//Store Word
136 SUB R0,R0,#0x4 ;//restoring R0
137 LDRH R63,[R0],R4 ;//Load Word
138 VERIFY R63,R63,R5,PM ;
140 PM: SUB R0,R0,#0x4 ;//restoring R0
141 STR R6,[R0],R4 ;//Store Word
142 SUB R0,R0,#0x4 ;//restoring R0
143 LDR R63,[R0],R4 ;//Load Word
144 SUB R0,R0,#0x4 ;//restoring R0
145 VERIFY R63,R63,R6,MOVLAB ;
149 /*****************************************/
151 /*****************************************/
152 MOVLAB: MOV R63,#0xFF;
154 VERIFY R63,R63,R1,ADDLAB ;
156 /*****************************************/
157 /*2 REG ADD/SUB PROCESSING */
158 /*****************************************/
159 ADDLAB: ADD R63,R2,#3; //2+3=5
160 VERIFY R63,R63,#5,SUBLAB ;
161 SUBLAB: SUB R63,R2,#1; //2+1=1
162 VERIFY R63,R63,#1,LSRLAB ;
164 /*****************************************/
166 /*****************************************/
167 //Note ASR does not work
170 LSRLAB: LSR R63,R6,#0x2 ; //6>>2=1
171 VERIFY R63,R63,#1,LSLLAB ;
172 LSLLAB: LSL R63,R3,#0x2 ; //3<<2=12
173 VERIFY R63,R63,#12,LSRILAB ;
175 LSRILAB: LSR R63,R6,R2 ; //6>>2=1
176 VERIFY R63,R63,#1,LSLILAB ;
177 LSLILAB: LSL R63,R3,R2 ; //3<<2=12
178 VERIFY R63,R63,#12,ORRLAB ;
181 /*****************************************/
183 /*****************************************/
184 ORRLAB: ORR R5,R3,R4 ; //0x3 | 0x4 -->0x7
185 VERIFY R63,R5,#7,ANDLAB ;
186 ANDLAB: AND R5,R3,R4 ; //0x3 & 0x4 -->0
187 VERIFY R63,R5,#0,EORLAB ;
188 EORLAB: EOR R5,R3,R2 ; //0x3 ^ 0x2 -->1
189 VERIFY R63,R5,#1,ADD3LAB ;
192 /****************************************/
193 /*3-REGISTER ADD/SUB */
194 /*****************************************/
195 ADD3LAB: ADD R63,R2,R3 ; //3+2=5
196 VERIFY R63,R63,#5,SUB3LAB ;
197 SUB3LAB: SUB R63,R6,R4 ; //6-4=2
198 VERIFY R63,R63,#2,MOVRLAB ;
200 /*****************************************/
202 /*****************************************/
203 MOVRLAB: MOV R63,R2 ;
204 VERIFY R63,R63,#2,NOPLAB ;
206 /*****************************************/
207 /*MOVE TO/FROM SPECIAL REGISTER */
208 /*****************************************/
209 MOVTFLAB: MOVTS status,R0 ;
211 VERIFY R63,R63,R0,MOVTFLAB ;
214 /*****************************************/
216 /*****************************************/
222 /*****************************************/
224 /*****************************************/
227 /*****************************************/
229 /*****************************************/
233 /*****************************************/
234 /*LONG JUMP INDICATOR */
235 /*****************************************/
236 LONGJUMP: B RETURN; //jump back to next
237 /*****************************************/
239 /*****************************************/
240 FUNCTION: RTS; //return from subroutine