[AArch64] Make register indices be full 64-bit values
[deliverable/binutils-gdb.git] / gas / testsuite / gas / frv / fr450-spr.d
1 #as: -mcpu=fr450
2 #objdump: -dr
3
4 .*: file format .*
5
6 Disassembly of section \.text:
7
8 .* <\.text>:
9 .*: 80 0c 01 84 movgs gr4,psr
10 .*: 80 0c 11 84 movgs gr4,pcsr
11 .*: 80 0c 21 84 movgs gr4,bpcsr
12 .*: 80 0c 31 84 movgs gr4,tbr
13 .*: 80 0c 41 84 movgs gr4,bpsr
14 .*: 80 0d 01 84 movgs gr4,hsr0
15 .*: 88 0c 01 84 movgs gr4,ccr
16 .*: 88 0c 71 84 movgs gr4,cccr
17 .*: 88 0d 01 84 movgs gr4,lr
18 .*: 88 0d 11 84 movgs gr4,lcr
19 .*: 88 0d 81 84 movgs gr4,iacc0h
20 .*: 88 0d 91 84 movgs gr4,iacc0l
21 .*: 88 0e 01 84 movgs gr4,isr
22 .*: 90 0c 01 84 movgs gr4,epcr0
23 .*: 92 0c 01 84 movgs gr4,esr0
24 .*: 92 0c e1 84 movgs gr4,esr14
25 .*: 92 0c f1 84 movgs gr4,esr15
26 .*: 94 0e 11 84 movgs gr4,esfr1
27 .*: 9a 0c 01 84 movgs gr4,scr0
28 .*: 9a 0c 11 84 movgs gr4,scr1
29 .*: 9a 0c 21 84 movgs gr4,scr2
30 .*: 9a 0c 31 84 movgs gr4,scr3
31 .*: a8 0c 01 84 movgs gr4,msr0
32 .*: a8 0c 11 84 movgs gr4,msr1
33 .*: b0 0c 01 84 movgs gr4,ear0
34 .*: b0 0c f1 84 movgs gr4,ear15
35 .*: b4 0c 01 84 movgs gr4,iamlr0
36 .*: b4 0c 11 84 movgs gr4,iamlr1
37 .*: b4 0c 21 84 movgs gr4,iamlr2
38 .*: b4 0c 31 84 movgs gr4,iamlr3
39 .*: b4 0c 41 84 movgs gr4,iamlr4
40 .*: b4 0c 51 84 movgs gr4,iamlr5
41 .*: b4 0c 61 84 movgs gr4,iamlr6
42 .*: b4 0c 71 84 movgs gr4,iamlr7
43 .*: b6 0c 01 84 movgs gr4,iampr0
44 .*: b6 0c 11 84 movgs gr4,iampr1
45 .*: b6 0c 21 84 movgs gr4,iampr2
46 .*: b6 0c 31 84 movgs gr4,iampr3
47 .*: b6 0c 41 84 movgs gr4,iampr4
48 .*: b6 0c 51 84 movgs gr4,iampr5
49 .*: b6 0c 61 84 movgs gr4,iampr6
50 .*: b6 0c 71 84 movgs gr4,iampr7
51 .*: b8 0c 01 84 movgs gr4,damlr0
52 .*: b8 0c 11 84 movgs gr4,damlr1
53 .*: b8 0c 21 84 movgs gr4,damlr2
54 .*: b8 0c 31 84 movgs gr4,damlr3
55 .*: b8 0c 41 84 movgs gr4,damlr4
56 .*: b8 0c 51 84 movgs gr4,damlr5
57 .*: b8 0c 61 84 movgs gr4,damlr6
58 .*: b8 0c 71 84 movgs gr4,damlr7
59 .*: b8 0c 81 84 movgs gr4,damlr8
60 .*: b8 0c 91 84 movgs gr4,damlr9
61 .*: b8 0c a1 84 movgs gr4,damlr10
62 .*: b8 0c b1 84 movgs gr4,damlr11
63 .*: ba 0c 01 84 movgs gr4,dampr0
64 .*: ba 0c 11 84 movgs gr4,dampr1
65 .*: ba 0c 21 84 movgs gr4,dampr2
66 .*: ba 0c 31 84 movgs gr4,dampr3
67 .*: ba 0c 41 84 movgs gr4,dampr4
68 .*: ba 0c 51 84 movgs gr4,dampr5
69 .*: ba 0c 61 84 movgs gr4,dampr6
70 .*: ba 0c 71 84 movgs gr4,dampr7
71 .*: ba 0c 81 84 movgs gr4,dampr8
72 .*: ba 0c 91 84 movgs gr4,dampr9
73 .*: ba 0c a1 84 movgs gr4,dampr10
74 .*: ba 0c b1 84 movgs gr4,dampr11
75 .*: bc 0c 01 84 movgs gr4,amcr
76 .*: bc 0c 51 84 movgs gr4,iamvr1
77 .*: bc 0c 71 84 movgs gr4,damvr1
78 .*: bc 0d 01 84 movgs gr4,cxnr
79 .*: bc 0d 11 84 movgs gr4,ttbr
80 .*: bc 0d 21 84 movgs gr4,tplr
81 .*: bc 0d 31 84 movgs gr4,tppr
82 .*: bc 0d 41 84 movgs gr4,tpxr
83 .*: bc 0e 01 84 movgs gr4,timerh
84 .*: bc 0e 11 84 movgs gr4,timerl
85 .*: bc 0e 21 84 movgs gr4,timerd
86 .*: c0 0c 01 84 movgs gr4,dcr
87 .*: c0 0c 11 84 movgs gr4,brr
88 .*: c0 0c 21 84 movgs gr4,nmar
89 .*: c0 0c 31 84 movgs gr4,btbr
90 .*: c0 0c 41 84 movgs gr4,ibar0
91 .*: c0 0c 51 84 movgs gr4,ibar1
92 .*: c0 0c 61 84 movgs gr4,ibar2
93 .*: c0 0c 71 84 movgs gr4,ibar3
94 .*: c0 0c 81 84 movgs gr4,dbar0
95 .*: c0 0c 91 84 movgs gr4,dbar1
96 .*: c0 0c a1 84 movgs gr4,dbar2
97 .*: c0 0c b1 84 movgs gr4,dbar3
98 .*: c0 0c c1 84 movgs gr4,dbdr00
99 .*: c0 0c d1 84 movgs gr4,dbdr01
100 .*: c0 0c e1 84 movgs gr4,dbdr02
101 .*: c0 0c f1 84 movgs gr4,dbdr03
102 .*: c0 0d 01 84 movgs gr4,dbdr10
103 .*: c0 0d 11 84 movgs gr4,dbdr11
104 .*: c0 0d c1 84 movgs gr4,dbmr00
105 .*: c0 0d d1 84 movgs gr4,dbmr01
106 .*: c0 0e 01 84 movgs gr4,dbmr10
107 .*: c0 0e 11 84 movgs gr4,dbmr11
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