i386: Also check R12-R15 registers when optimizing testq to testb
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / avx512_bf16.s
1 # Check 32bit AVX512_BF16 instructions
2
3 .allow_index_reg
4 .text
5 _start:
6 vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6 #AVX512_BF16
7 vcvtne2ps2bf16 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7} #AVX512_BF16 MASK_ENABLING
8 vcvtne2ps2bf16 (%ecx){1to16}, %zmm5, %zmm6 #AVX512_BF16 BROADCAST_EN
9 vcvtne2ps2bf16 8128(%ecx), %zmm5, %zmm6 #AVX512_BF16 Disp8
10 vcvtne2ps2bf16 -8192(%edx){1to16}, %zmm5, %zmm6{%k7}{z} #AVX512_BF16 Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
11 vcvtneps2bf16 %zmm5, %ymm6 #AVX512_BF16
12 vcvtneps2bf16 0x10000000(%esp, %esi, 8), %ymm6{%k7} #AVX512_BF16 MASK_ENABLING
13 vcvtneps2bf16 (%ecx){1to16}, %ymm6 #AVX512_BF16 BROADCAST_EN
14 vcvtneps2bf16 8128(%ecx), %ymm6 #AVX512_BF16 Disp8
15 vcvtneps2bf16 -8192(%edx){1to16}, %ymm6{%k7}{z} #AVX512_BF16 Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
16 vdpbf16ps %zmm4, %zmm5, %zmm6 #AVX512_BF16
17 vdpbf16ps 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7} #AVX512_BF16 MASK_ENABLING
18 vdpbf16ps (%ecx){1to16}, %zmm5, %zmm6 #AVX512_BF16 BROADCAST_EN
19 vdpbf16ps 8128(%ecx), %zmm5, %zmm6 #AVX512_BF16 Disp8
20 vdpbf16ps -8192(%edx){1to16}, %zmm5, %zmm6{%k7}{z} #AVX512_BF16 Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
21
22 .intel_syntax noprefix
23 vcvtne2ps2bf16 zmm6, zmm5, zmm4 #AVX512_BF16
24 vcvtne2ps2bf16 zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000] #AVX512_BF16 MASK_ENABLING
25 vcvtne2ps2bf16 zmm6, zmm5, DWORD PTR [ecx]{1to16} #AVX512_BF16 BROADCAST_EN
26 vcvtne2ps2bf16 zmm6, zmm5, ZMMWORD PTR [ecx+8128] #AVX512_BF16 Disp8
27 vcvtne2ps2bf16 zmm6{k7}{z}, zmm5, DWORD PTR [edx-8192]{1to16} #AVX512_BF16 Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
28 vcvtneps2bf16 ymm6, zmm5 #AVX512_BF16
29 vcvtneps2bf16 ymm6{k7}, ZMMWORD PTR [esp+esi*8+0x10000000] #AVX512_BF16 MASK_ENABLING
30 vcvtneps2bf16 ymm6, DWORD PTR [ecx]{1to16} #AVX512_BF16 BROADCAST_EN
31 vcvtneps2bf16 ymm6, ZMMWORD PTR [ecx+8128] #AVX512_BF16 Disp8
32 vcvtneps2bf16 ymm6{k7}{z}, DWORD PTR [edx-8192]{1to16} #AVX512_BF16 Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
33 vdpbf16ps zmm6, zmm5, zmm4 #AVX512_BF16
34 vdpbf16ps zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000] #AVX512_BF16 MASK_ENABLING
35 vdpbf16ps zmm6, zmm5, DWORD PTR [ecx]{1to16} #AVX512_BF16 BROADCAST_EN
36 vdpbf16ps zmm6, zmm5, ZMMWORD PTR [ecx+8128] #AVX512_BF16 Disp8
37 vdpbf16ps zmm6{k7}{z}, zmm5, DWORD PTR [edx-8192]{1to16} #AVX512_BF16 Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
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