gas/testsuite/gas/i386/avx512_bf16_vl.s

   1 # Check 32bit AVX512{BF16,VL} instructions
   2
   3         .allow_index_reg
   4         .text
   5 _start:
   6         vcvtne2ps2bf16  %ymm4, %ymm5, %ymm6      #AVX512{BF16,VL}
   7         vcvtne2ps2bf16  %xmm4, %xmm5, %xmm6      #AVX512{BF16,VL}
   8         vcvtne2ps2bf16  0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}     #AVX512{BF16,VL} MASK_ENABLING
   9         vcvtne2ps2bf16  (%ecx){1to8}, %ymm5, %ymm6       #AVX512{BF16,VL} BROADCAST_EN
  10         vcvtne2ps2bf16  4064(%ecx), %ymm5, %ymm6         #AVX512{BF16,VL} Disp8
  11         vcvtne2ps2bf16  -4096(%edx){1to8}, %ymm5, %ymm6{%k7}{z}  #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  12         vcvtne2ps2bf16  0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}     #AVX512{BF16,VL} MASK_ENABLING
  13         vcvtne2ps2bf16  (%ecx){1to4}, %xmm5, %xmm6       #AVX512{BF16,VL} BROADCAST_EN
  14         vcvtne2ps2bf16  2032(%ecx), %xmm5, %xmm6         #AVX512{BF16,VL} Disp8
  15         vcvtne2ps2bf16  -2048(%edx){1to4}, %xmm5, %xmm6{%k7}{z}  #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  16         vcvtneps2bf16   %xmm5, %xmm6     #AVX512{BF16,VL}
  17         vcvtneps2bf16   %ymm5, %xmm6     #AVX512{BF16,VL}
  18         vcvtneps2bf16x  0x10000000(%esp, %esi, 8), %xmm6{%k7}    #AVX512{BF16,VL} MASK_ENABLING
  19         vcvtneps2bf16   (%ecx){1to4}, %xmm6      #AVX512{BF16,VL} BROADCAST_EN
  20         vcvtneps2bf16x  2032(%ecx), %xmm6        #AVX512{BF16,VL} Disp8
  21         vcvtneps2bf16   -2048(%edx){1to4}, %xmm6{%k7}{z}         #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  22         vcvtneps2bf16   (%ecx){1to8}, %xmm6      #AVX512{BF16,VL} BROADCAST_EN
  23         vcvtneps2bf16y  4064(%ecx), %xmm6        #AVX512{BF16,VL} Disp8
  24         vcvtneps2bf16   -4096(%edx){1to8}, %xmm6{%k7}{z}         #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  25         vdpbf16ps       %ymm4, %ymm5, %ymm6      #AVX512{BF16,VL}
  26         vdpbf16ps       %xmm4, %xmm5, %xmm6      #AVX512{BF16,VL}
  27         vdpbf16ps       0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}     #AVX512{BF16,VL} MASK_ENABLING
  28         vdpbf16ps       (%ecx){1to8}, %ymm5, %ymm6       #AVX512{BF16,VL} BROADCAST_EN
  29         vdpbf16ps       4064(%ecx), %ymm5, %ymm6         #AVX512{BF16,VL} Disp8
  30         vdpbf16ps       -4096(%edx){1to8}, %ymm5, %ymm6{%k7}{z}  #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  31         vdpbf16ps       0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}     #AVX512{BF16,VL} MASK_ENABLING
  32         vdpbf16ps       (%ecx){1to4}, %xmm5, %xmm6       #AVX512{BF16,VL} BROADCAST_EN
  33         vdpbf16ps       2032(%ecx), %xmm5, %xmm6         #AVX512{BF16,VL} Disp8
  34         vdpbf16ps       -2048(%edx){1to4}, %xmm5, %xmm6{%k7}{z}  #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  35
  36 .intel_syntax noprefix
  37         vcvtne2ps2bf16  ymm6, ymm5, ymm4         #AVX512{BF16,VL}
  38         vcvtne2ps2bf16  xmm6, xmm5, xmm4         #AVX512{BF16,VL}
  39         vcvtne2ps2bf16  ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]       #AVX512{BF16,VL} MASK_ENABLING
  40         vcvtne2ps2bf16  ymm6, ymm5, DWORD PTR [ecx]{1to8}        #AVX512{BF16,VL} BROADCAST_EN
  41         vcvtne2ps2bf16  ymm6, ymm5, YMMWORD PTR [ecx+4064]       #AVX512{BF16,VL} Disp8
  42         vcvtne2ps2bf16  ymm6{k7}{z}, ymm5, DWORD PTR [edx-4096]{1to8}    #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  43         vcvtne2ps2bf16  xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]       #AVX512{BF16,VL} MASK_ENABLING
  44         vcvtne2ps2bf16  xmm6, xmm5, DWORD PTR [ecx]{1to4}        #AVX512{BF16,VL} BROADCAST_EN
  45         vcvtne2ps2bf16  xmm6, xmm5, XMMWORD PTR [ecx+2032]       #AVX512{BF16,VL} Disp8
  46         vcvtne2ps2bf16  xmm6{k7}{z}, xmm5, DWORD PTR [edx-2048]{1to4}    #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  47         vcvtneps2bf16   xmm6, xmm5       #AVX512{BF16,VL}
  48         vcvtneps2bf16   xmm6, ymm5       #AVX512{BF16,VL}
  49         vcvtneps2bf16   xmm6{k7}, XMMWORD PTR [esp+esi*8+0x10000000]     #AVX512{BF16,VL} MASK_ENABLING
  50         vcvtneps2bf16   xmm6, DWORD PTR [ecx]{1to4}      #AVX512{BF16,VL} BROADCAST_EN
  51         vcvtneps2bf16   xmm6, XMMWORD PTR [ecx+2032]     #AVX512{BF16,VL} Disp8
  52         vcvtneps2bf16   xmm6{k7}{z}, DWORD PTR [edx-2048]{1to4}  #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  53         vcvtneps2bf16   xmm6, DWORD PTR [ecx]{1to8}      #AVX512{BF16,VL} BROADCAST_EN
  54         vcvtneps2bf16   xmm6, YMMWORD PTR [ecx+4064]     #AVX512{BF16,VL} Disp8
  55         vcvtneps2bf16   xmm6{k7}{z}, DWORD PTR [edx-4096]{1to8}  #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  56         vdpbf16ps       ymm6, ymm5, ymm4         #AVX512{BF16,VL}
  57         vdpbf16ps       xmm6, xmm5, xmm4         #AVX512{BF16,VL}
  58         vdpbf16ps       ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000]       #AVX512{BF16,VL} MASK_ENABLING
  59         vdpbf16ps       ymm6, ymm5, DWORD PTR [ecx]{1to8}        #AVX512{BF16,VL} BROADCAST_EN
  60         vdpbf16ps       ymm6, ymm5, YMMWORD PTR [ecx+4064]       #AVX512{BF16,VL} Disp8
  61         vdpbf16ps       ymm6{k7}{z}, ymm5, DWORD PTR [edx-4096]{1to8}    #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
  62         vdpbf16ps       xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]       #AVX512{BF16,VL} MASK_ENABLING
  63         vdpbf16ps       xmm6, xmm5, DWORD PTR [ecx]{1to4}        #AVX512{BF16,VL} BROADCAST_EN
  64         vdpbf16ps       xmm6, xmm5, XMMWORD PTR [ecx+2032]       #AVX512{BF16,VL} Disp8
  65         vdpbf16ps       xmm6{k7}{z}, xmm5, DWORD PTR [edx-2048]{1to4}    #AVX512{BF16,VL} Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL