Add -mevexrcig={rne|rd|ru|rz} option to x86 assembler.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / avx512dq-rcigrd.d
1 #as: -mevexrcig=rd
2 #objdump: -dw
3 #name: i386 AVX512DQ rcig insns
4 #source: avx512dq-rcig.s
5
6 .*: +file format .*
7
8
9 Disassembly of section \.text:
10
11 00000000 <_start>:
12 [ ]*[a-f0-9]+:[ ]*62 f3 d5 38 50 f4 ab[ ]*vrangepd \$0xab,\{sae\},%zmm4,%zmm5,%zmm6
13 [ ]*[a-f0-9]+:[ ]*62 f3 d5 38 50 f4 7b[ ]*vrangepd \$0x7b,\{sae\},%zmm4,%zmm5,%zmm6
14 [ ]*[a-f0-9]+:[ ]*62 f3 55 38 50 f4 ab[ ]*vrangeps \$0xab,\{sae\},%zmm4,%zmm5,%zmm6
15 [ ]*[a-f0-9]+:[ ]*62 f3 55 38 50 f4 7b[ ]*vrangeps \$0x7b,\{sae\},%zmm4,%zmm5,%zmm6
16 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 51 f4 ab[ ]*vrangesd \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
17 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 51 f4 7b[ ]*vrangesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
18 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 51 f4 ab[ ]*vrangess \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
19 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 51 f4 7b[ ]*vrangess \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
20 [ ]*[a-f0-9]+:[ ]*62 f3 fd 38 56 f5 ab[ ]*vreducepd \$0xab,\{sae\},%zmm5,%zmm6
21 [ ]*[a-f0-9]+:[ ]*62 f3 fd 38 56 f5 7b[ ]*vreducepd \$0x7b,\{sae\},%zmm5,%zmm6
22 [ ]*[a-f0-9]+:[ ]*62 f3 7d 38 56 f5 ab[ ]*vreduceps \$0xab,\{sae\},%zmm5,%zmm6
23 [ ]*[a-f0-9]+:[ ]*62 f3 7d 38 56 f5 7b[ ]*vreduceps \$0x7b,\{sae\},%zmm5,%zmm6
24 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 57 f4 ab[ ]*vreducesd \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
25 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 57 f4 7b[ ]*vreducesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
26 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 57 f4 ab[ ]*vreducess \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
27 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 57 f4 7b[ ]*vreducess \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
28 [ ]*[a-f0-9]+:[ ]*62 f1 fd 38 7a f5[ ]*vcvttpd2qq \{sae\},%zmm5,%zmm6
29 [ ]*[a-f0-9]+:[ ]*62 f1 fd 38 78 f5[ ]*vcvttpd2uqq \{sae\},%zmm5,%zmm6
30 [ ]*[a-f0-9]+:[ ]*62 f1 7d 3f 7a f5[ ]*vcvttps2qq \{sae\},%ymm5,%zmm6\{%k7\}
31 [ ]*[a-f0-9]+:[ ]*62 f1 7d 3f 78 f5[ ]*vcvttps2uqq \{sae\},%ymm5,%zmm6\{%k7\}
32 [ ]*[a-f0-9]+:[ ]*62 f3 d5 38 50 f4 ab[ ]*vrangepd \$0xab,\{sae\},%zmm4,%zmm5,%zmm6
33 [ ]*[a-f0-9]+:[ ]*62 f3 d5 38 50 f4 7b[ ]*vrangepd \$0x7b,\{sae\},%zmm4,%zmm5,%zmm6
34 [ ]*[a-f0-9]+:[ ]*62 f3 55 38 50 f4 ab[ ]*vrangeps \$0xab,\{sae\},%zmm4,%zmm5,%zmm6
35 [ ]*[a-f0-9]+:[ ]*62 f3 55 38 50 f4 7b[ ]*vrangeps \$0x7b,\{sae\},%zmm4,%zmm5,%zmm6
36 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 51 f4 ab[ ]*vrangesd \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
37 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 51 f4 7b[ ]*vrangesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
38 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 51 f4 ab[ ]*vrangess \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
39 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 51 f4 7b[ ]*vrangess \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
40 [ ]*[a-f0-9]+:[ ]*62 f3 fd 38 56 f5 ab[ ]*vreducepd \$0xab,\{sae\},%zmm5,%zmm6
41 [ ]*[a-f0-9]+:[ ]*62 f3 fd 38 56 f5 7b[ ]*vreducepd \$0x7b,\{sae\},%zmm5,%zmm6
42 [ ]*[a-f0-9]+:[ ]*62 f3 7d 38 56 f5 ab[ ]*vreduceps \$0xab,\{sae\},%zmm5,%zmm6
43 [ ]*[a-f0-9]+:[ ]*62 f3 7d 38 56 f5 7b[ ]*vreduceps \$0x7b,\{sae\},%zmm5,%zmm6
44 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 57 f4 ab[ ]*vreducesd \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
45 [ ]*[a-f0-9]+:[ ]*62 f3 d5 3f 57 f4 7b[ ]*vreducesd \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
46 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 57 f4 ab[ ]*vreducess \$0xab,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
47 [ ]*[a-f0-9]+:[ ]*62 f3 55 3f 57 f4 7b[ ]*vreducess \$0x7b,\{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
48 [ ]*[a-f0-9]+:[ ]*62 f1 fd 38 7a f5[ ]*vcvttpd2qq \{sae\},%zmm5,%zmm6
49 [ ]*[a-f0-9]+:[ ]*62 f1 fd 38 78 f5[ ]*vcvttpd2uqq \{sae\},%zmm5,%zmm6
50 [ ]*[a-f0-9]+:[ ]*62 f1 7d 3f 7a f5[ ]*vcvttps2qq \{sae\},%ymm5,%zmm6\{%k7\}
51 [ ]*[a-f0-9]+:[ ]*62 f1 7d 3f 78 f5[ ]*vcvttps2uqq \{sae\},%ymm5,%zmm6\{%k7\}
52 #pass
This page took 0.03094 seconds and 4 git commands to generate.