Add Intel MCU support to opcodes
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / bmi.s
1 # Check 32bit BMI instructions
2
3 .allow_index_reg
4 .text
5 _start:
6
7 # Test for op r16, r/m16
8 tzcnt %ax,%bx
9 tzcnt (%ecx),%bx
10
11 # Test for op r32, r32, r/m32
12 andn %eax,%ebx,%esi
13 andn (%ecx),%ebx,%esi
14
15 # Test for op r32, r/m32, r32
16 bextr %eax,%ebx,%esi
17 bextr %ebx,(%ecx),%esi
18
19 # Test for op r32, r/m32
20 tzcnt %eax,%ebx
21 tzcnt (%ecx),%ebx
22 blsi %eax,%ebx
23 blsi (%ecx),%ebx
24 blsmsk %eax,%ebx
25 blsmsk (%ecx),%ebx
26 blsr %eax,%ebx
27 blsr (%ecx),%ebx
28
29 .intel_syntax noprefix
30
31 # Test for op r16, r/m16
32 tzcnt bx,ax
33 tzcnt bx,WORD PTR [ecx]
34 tzcnt bx,[ecx]
35
36 # Test for op r32, r32, r/m32
37 andn esi,ebx,eax
38 andn esi,ebx,DWORD PTR [ecx]
39 andn esi,ebx,[ecx]
40
41 # Test for op r32, r/m32, r32
42 bextr esi,ebx,eax
43 bextr esi,DWORD PTR [ecx],ebx
44 bextr esi,[ecx],ebx
45
46 # Test for op r32, r/m32
47 tzcnt ebx,eax
48 tzcnt ebx,DWORD PTR [ecx]
49 tzcnt ebx,[ecx]
50 blsi ebx,eax
51 blsi ebx,DWORD PTR [ecx]
52 blsi ebx,[ecx]
53 blsmsk ebx,eax
54 blsmsk ebx,DWORD PTR [ecx]
55 blsmsk ebx,[ecx]
56 blsr ebx,eax
57 blsr ebx,DWORD PTR [ecx]
58 blsr ebx,[ecx]
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