x86: fix various non-LIG templates
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / evex-lig-2.d
1 #as: -mevexlig=256
2 #objdump: -dw
3 #name: i386 EVEX non-LIG insns with -mevexlig=256
4
5 .*: +file format .*
6
7
8 Disassembly of section .text:
9
10 0+ <_start>:
11 +[a-f0-9]+: 62 f1 7d 08 7e 21 vmovd %xmm4,\(%ecx\)
12 +[a-f0-9]+: 62 f1 7d 08 7e e1 vmovd %xmm4,%ecx
13 +[a-f0-9]+: 62 f1 7d 08 6e 21 vmovd \(%ecx\),%xmm4
14 +[a-f0-9]+: 62 f1 7d 08 6e e1 vmovd %ecx,%xmm4
15 +[a-f0-9]+: 62 f1 fd 08 d6 21 vmovq %xmm4,\(%ecx\)
16 +[a-f0-9]+: 62 f1 fe 08 7e 21 vmovq \(%ecx\),%xmm4
17 +[a-f0-9]+: 62 f1 fe 08 7e f4 vmovq %xmm4,%xmm6
18 +[a-f0-9]+: 62 f3 7d 08 17 c0 00 vextractps \$0x0,%xmm0,%eax
19 +[a-f0-9]+: 62 f3 7d 08 17 00 00 vextractps \$0x0,%xmm0,\(%eax\)
20 +[a-f0-9]+: 62 f3 7d 08 14 c0 00 vpextrb \$0x0,%xmm0,%eax
21 +[a-f0-9]+: 62 f3 7d 08 14 00 00 vpextrb \$0x0,%xmm0,\(%eax\)
22 +[a-f0-9]+: 62 f1 7d 08 c5 c0 00 vpextrw \$0x0,%xmm0,%eax
23 +[a-f0-9]+: 62 f3 7d 08 15 c0 00 vpextrw \$0x0,%xmm0,%eax
24 +[a-f0-9]+: 62 f3 7d 08 15 00 00 vpextrw \$0x0,%xmm0,\(%eax\)
25 +[a-f0-9]+: 62 f3 7d 08 16 c0 00 vpextrd \$0x0,%xmm0,%eax
26 +[a-f0-9]+: 62 f3 7d 08 16 00 00 vpextrd \$0x0,%xmm0,\(%eax\)
27 +[a-f0-9]+: 62 f3 7d 08 21 c0 00 vinsertps \$0x0,%xmm0,%xmm0,%xmm0
28 +[a-f0-9]+: 62 f3 7d 08 21 00 00 vinsertps \$0x0,\(%eax\),%xmm0,%xmm0
29 +[a-f0-9]+: 62 f3 7d 08 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0
30 +[a-f0-9]+: 62 f3 7d 08 20 00 00 vpinsrb \$0x0,\(%eax\),%xmm0,%xmm0
31 +[a-f0-9]+: 62 f1 7d 08 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0
32 +[a-f0-9]+: 62 f1 7d 08 c4 00 00 vpinsrw \$0x0,\(%eax\),%xmm0,%xmm0
33 +[a-f0-9]+: 62 f3 7d 08 22 c0 00 vpinsrd \$0x0,%eax,%xmm0,%xmm0
34 +[a-f0-9]+: 62 f3 7d 08 22 00 00 vpinsrd \$0x0,\(%eax\),%xmm0,%xmm0
35 #pass
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